73521 lines
5.2 MiB
73521 lines
5.2 MiB
; --------------------------------------------------------------------------------
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; @Title: MB9DF125 MB9EF126 MB9DF126 MB9EF226 On-Chip Peripherals
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; @Props: Released
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; @Author: SLA, SOL, TPP, ZAN, KNO, MKK
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; @Changelog:
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; 2011-03-14
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; 2012-04-17
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; 2013-01-24
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; 2015-02-19 MKK
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; 2015-03-03 MKK
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; @Manufacturer: CYPRESS
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; @Doc: FCR4-Cluster-MN707-00001-0v16-E.pdf
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; FCR4-Cluster-MN707-00001-1v2-E.pdf
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; MB9DF125-DS707-00003-0v10-E.pdf
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; MB9EF226-DS707-00004-1v0-E.pdf
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; @Core: Cortex-R4
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; @Chip: MB9DF125, MB9DF126, MB9EF126, MB9EF226
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; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perfcr4.per 12528 2020-11-12 13:57:39Z bschroefel $
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;Known problems:
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;BootROM Hardware Interface base address described in memory map is 0xFFFF0000, while in MB9EF226-DS707-00004-1v0-E.pdf it is 0xFFFEF358 where registers start
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;BSU5 -> Base address mentioned in cluster documentation is completely different than one in MB9EF226-DS707-00004-1v0-E.pdf (0xB0CFFC00 vs 0xB0D00BC4)
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config 16. 8.
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width 0xb
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tree "Core Registers (Cortex-R4)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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width 0x8
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; --------------------------------------------------------------------------------
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; Identification registers
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; --------------------------------------------------------------------------------
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tree "ID Registers"
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rgroup c15:0x0--0x0
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line.long 0x0 "MIDR,Main ID Register"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
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bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7"
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textline " "
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hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number"
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bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rgroup c15:0x100--0x100
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line.long 0x0 "CTR,Cache Type Register"
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bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7"
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bitfld.long 0x0 16.--19. " DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
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bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical"
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textline " "
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bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
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rgroup c15:0x200--0x200
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line.long 0x0 "TCMSR,Tighly-Coupled Memory Status Register"
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bitfld.long 0x0 16.--19. " DTCMS ,Data Banks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0.--3. " ITCMS ,Instruction Banks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rgroup c15:0x400--0x400
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line.long 0x0 "MPUIR,MPU type register"
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hexmask.long.byte 0x00 8.--15. 1. " REGNUM ,Number of regions"
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bitfld.long 0x00 0. " TYPE ,Type of MPU regions" "Unified,Seperated"
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rgroup c15:0x500--0x500
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line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
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hexmask.long.byte 0x00 16.--23. 1. " AFFL2 ,Affitnity Level 2"
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hexmask.long.byte 0x00 8.--15. 1. " AFFL1 ,Affitnity Level 1"
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hexmask.long.byte 0x00 0.--7. 1. " AFFL0 ,Affitnity Level 0"
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textline " "
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rgroup c15:0x0410++0x00
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line.long 0x00 "MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 28.--31. " IT ,Instruction Type Support" "Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 20.--23. " ACR ,Auxiliary Control Register Support" "Reserved,Supported,?..."
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bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CC_PLEA ,Cache Coherency With PLE Agent/Shared Memory Support" "Not supported,?..."
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bitfld.long 0x00 8.--11. " CC_CPUA ,Cache Coherency Support With CPU Agent/Shared Memory Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,?..."
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rgroup c15:0x0510++0x00
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line.long 0x00 "MMFR1,Memory Model Feature Register 1"
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bitfld.long 0x00 28.--31. " BTB ,Branch Target Buffer Support" "Reserved,Reserved,Not required,?..."
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bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Harvard Architecture" "Supported,?..."
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rgroup c15:0x0610++0x00
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line.long 0x00 "MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..."
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bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
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rgroup c15:0x0710++0x00
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line.long 0x00 "MMFR3,Memory Model Feature Register 3"
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bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
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bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache by MVA/Clean by MVA/Invalidate and Clean by MVA/Invalidate All Support" "Reserved,Supported,?..."
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rgroup c15:0x0020++0x00
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line.long 0x00 "ISAR0,Instruction Set Attribute Register 0"
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bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..."
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bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " AI ,Atomic Load and Store Instructions Support" "Reserved,Supported,?..."
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rgroup c15:0x0120++0x00
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line.long 0x00 "ISAR1,Instruction Set Attribute Register 1"
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bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 24.--27. " INTI ,Instructions That Branch Between ARM and Thumb Code Support" "Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " EXTI ,Sign or Zero Extend Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 0.--3. " ENDI ,Endianness Control Instructions Support" "Reserved,Supported,?..."
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rgroup c15:0x0220++0x00
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line.long 0x00 "ISAR2,Instruction Set Attribute Register 2"
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bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,Supported,?..."
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rgroup c15:0x0320++0x00
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line.long 0x00 "ISAR3,Instruction Set Attribute Register 3"
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bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " SWII ,SWI Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..."
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rgroup c15:0x0420++0x00
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line.long 0x00 "ISAR4,Instruction Set Attribute Register 4"
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bitfld.long 0x00 20.--23. " EI ,Exclusive Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " SMII ,SMI Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
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rgroup c15:0x0520++0x00
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line.long 0x00 "ISAR5,Instruction Set Attribute Registers 5 (Reserved)"
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rgroup c15:0x0620++0x00
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line.long 0x00 "ISAR6,Instruction Set Attribute Registers 6 (Reserved)"
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rgroup c15:0x0720++0x00
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line.long 0x00 "ISAR7,Instruction Set Attribute Registers 7 (Reserved)"
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rgroup c15:0x0010++0x00
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 12.--15. " STATE3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " STATE2 ,Java Extension Interface Support" "Not supported,?..."
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..."
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rgroup c15:0x0110++0x00
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line.long 0x00 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Supported,?..."
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bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
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bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
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textline " "
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rgroup c15:0x0210++0x00
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line.long 0x00 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,?..."
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bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Reserved,Supported,?..."
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bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,?..."
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rgroup c15:0x0310++0x00
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line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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tree.end
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width 0x8
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tree "System Control and Configuration"
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group c15:0x1--0x1
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line.long 0x0 "SCTLR,Control Register"
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bitfld.long 0x0 31. " IE ,Instruction endianness" "Little,Big"
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bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
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bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable"
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bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disable,Enable"
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bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Disable,Enable"
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textline " "
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bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
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bitfld.long 0x0 24. " VE ,Vector Enable" "Disable,Vectored"
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bitfld.long 0x0 21. " FI ,Fast Interrupts enable" "Disable,Enable"
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bitfld.long 0x0 19. " DZ ,Divide by Zero exception bit" "Disable,Enable"
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bitfld.long 0x0 14. " RR ,Round-Robin bit" "Random,RRobin"
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bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
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textline " "
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bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disable,Enable"
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bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disable,Enable"
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bitfld.long 0x0 2. " C ,Enable data cache" "Disable,Enable"
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bitfld.long 0x0 1. " A ,Strict Alignment" "Disable,Enable"
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bitfld.long 0x0 0. " M ,MPU Enable" "Disable,Enable"
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textline " "
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group c15:0x101--0x101
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line.long 0x0 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 31. " DICDI ,Disable Case C dual issue control" "Enable,Disable"
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bitfld.long 0x00 30. " DIB2DI ,Disable Case B2 dual issue control" "Enable,Disable"
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bitfld.long 0x00 29. " DIB1DI ,Disable Case B1 dual issue control" "Enable,Disable"
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textline " "
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bitfld.long 0x00 28. " DIADI ,Disable Case A dual issue control" "Enable,Disable"
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bitfld.long 0x00 27. " B1TCMPCEN ,B1TCM parity or ECC check enable" "Disable,Enable"
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bitfld.long 0x00 26. " B0TCMPCEN ,B1TCM parity or ECC check enable" "Disable,Enable"
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textline " "
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bitfld.long 0x00 25. " ATCMPCEN ,B1TCM parity or ECC check enable" "Disable,Enable"
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bitfld.long 0x00 24. " AXISCEN ,AXI slave cache access enable" "Disable,Enable"
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bitfld.long 0x00 23. " AXISCUEN ,AXI slave cache User mode access enable" "Disable,Enable"
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textline " "
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bitfld.long 0x00 22. " DILSM ,Disable LIL on load/store multiples" "Disable,Enable"
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bitfld.long 0x00 21. " DEOLP ,Disable end of loop prediction" "Disable,Enable"
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bitfld.long 0x00 20. " DBHE ,Disable BH extension" "Enable,Disable"
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textline " "
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bitfld.long 0x00 19. " FRCDIS ,Fetch rate control disable" "Enable,Disable"
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bitfld.long 0x00 17. " RSDIS ,Return stack disable" "Enable,Disable"
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bitfld.long 0x00 15.--16. " BP ,Control of the branch prediction policy" "Normal,Taken,Not taken,?..."
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textline " "
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bitfld.long 0x00 14. " DBWR ,Disable write_burst on AXI master" "Enable,Disable"
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bitfld.long 0x00 13. " DSWT ,Disable should_wait on AXI master" "Enable,Disable"
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bitfld.long 0x00 12. " ERPEG ,Enable random parity error generation" "Disable,Enable"
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textline " "
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bitfld.long 0x00 11. " DOLT ,Disable outstanding line fill on AXI master" "Enable,Disable"
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bitfld.long 0x00 10. " FORA ,Force outer read allocate (ORA) for outer write allocate (OWA) regions" "Not forced,Forced"
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bitfld.long 0x00 9. " FWT ,Force write-through (WT) for write-back (WB) regions" "Not forced,Forced"
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textline " "
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bitfld.long 0x00 8. " FDSnS ,Force D-side to not-shared when MPU is off" "Not forced,Forced"
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bitfld.long 0x00 7. " sMOV ,sMOV disabled" "Enabled,Disabled"
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bitfld.long 0x0 6. " DILS ,Disable low interrupt latency on all load/store instructions" "Enable,Disable"
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textline " "
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bitfld.long 0x00 5. " DA ,DA Disable abort on cache parity error" "Enable,Disable"
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bitfld.long 0x00 4. " EHR ,Enable hardware recovery from cache parity errors" "Disable,Enable"
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bitfld.long 0x00 2. " I1TCMECEN ,Instruction 1 TCM error check enable" "Disable,Enable"
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textline " "
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bitfld.long 0x00 1. " I0TCMECEN ,Instruction 1 TCM error check enable" "Disable,Enable"
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bitfld.long 0x00 0. " ITCMECEN ,Instruction TCM error check enable" "Disable,Enable"
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textline " "
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group c15:0x0f--0x0f
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line.long 0x0 "SACTLR,Secondary Auxiliary Control Register"
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bitfld.long 0x00 22. " DCHE ,Disable hard-error support in the caches" "Enable,Disable"
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bitfld.long 0x00 21. " DR2B ,Enable random 2-bit error genration in cache RAMs" "Disable,Enable"
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bitfld.long 0x00 20. " DF6DI ,F6 dual issue control" "Enable,Disable"
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|
textline " "
|
|
bitfld.long 0x00 19. " DF2DI ,F2 dual issue control" "Enable,Disable"
|
|
bitfld.long 0x00 18. " DDI ,F1/F3/F4 dual issue control" "Enable,Disable"
|
|
bitfld.long 0x00 17. " DOODPFP ,Out-of-order Double Precision Floating-point control" "Enable,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DOOFMACS ,Out-of-order FMACS control" "Enable,Disable"
|
|
bitfld.long 0x00 13. " IXC ,Floating-point inexact exception output mask" "Mask,Propagate"
|
|
bitfld.long 0x00 12. " OFC ,Floating-point overflow exception output mask" "Mask,Propagate"
|
|
textline " "
|
|
bitfld.long 0x00 11. " UFC ,Floating-point underflow exception output mask" "Mask,Propagate"
|
|
bitfld.long 0x00 10. " IOC ,Floating-point invalid operation exception output mask" "Mask,Propagate"
|
|
bitfld.long 0x00 9. " DZC ,Floating-point divide-by-zero exception output mask" "Mask,Propagate"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDC ,Floating-point input denormal exception output mask" "Mask,Propagate"
|
|
bitfld.long 0x00 3. " BTCMECC ,Correction for internal ECC logic on BTCM ports" "Enable,Disable"
|
|
bitfld.long 0x00 2. " ATCMECC ,Correction for internal ECC logic on ATCM port" "Enable,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BTCMRMW ,Enable 64-bit stores on BTCMs" "Disable,Enable"
|
|
bitfld.long 0x00 0. " ATCMRMW ,Enable 64-bit stores on ATCM" "Disable,Enable"
|
|
textline " "
|
|
group c15:0x201--0x201
|
|
line.long 0x0 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x0 26.--27. " CP13 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 24.--25. " CP12 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " CP11 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 20.--21. " CP10 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " CP9 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 16.--17. " CP8 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " CP7 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 12.--13. " CP6 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 10.--11. " CP5 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 8.--9. " CP4 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " CP3 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 4.--5. " CP2 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " CP1 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 0.--1. " CP0 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
group.long c15:0x0b--0x0b
|
|
line.long 0x00 "SPC,Slave Port Control"
|
|
bitfld.long 0x00 1. " PRIV ,Privilege access only" "User/Privilege,Privilege only"
|
|
bitfld.long 0x00 0. " AXISLEN ,AXI slave port disable" "Enabled,Disabled"
|
|
tree.end
|
|
width 0x8
|
|
tree "MPU Control and Configuration"
|
|
group c15:0x0001--0x0001
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 31. " IE ,Instruction endianness" "Little,Big"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disable,Enable"
|
|
bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
|
|
bitfld.long 0x0 24. " VE ,Vector Enable" "Disable,Vectored"
|
|
bitfld.long 0x0 21. " FI ,Fast Interrupts enable" "Disable,Enable"
|
|
bitfld.long 0x0 19. " DZ ,Divide by Zero exception bit" "Disable,Enable"
|
|
bitfld.long 0x0 14. " RR ,Round-Robin bit" "Random,RRobin"
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
textline " "
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disable,Enable"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disable,Enable"
|
|
bitfld.long 0x0 2. " C ,Enable data cache" "Disable,Enable"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disable,Enable"
|
|
bitfld.long 0x0 0. " M ,MPU Enable" "Disable,Enable"
|
|
textline " "
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " RW ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
group.long c15:0x0015++0x00
|
|
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
|
|
group.long c15:0x0006++0x00
|
|
line.long 0x00 "DFAR,Data Fault Address Register"
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
group.long c15:0x0115++0x00
|
|
line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register"
|
|
group.long c15:0x0206++0x00
|
|
line.long 0x00 "IFAR,Instruction Fault Address Register"
|
|
textline " "
|
|
group c15:0x0016++0x00
|
|
line.long 0x00 "RBAR,Region Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
line.long 0x00 "RSER,Region Size and Enable Register"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
line.long 0x00 "RACR,Region Access Control Register"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " TYPE ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
group c15:0x0026++0x00
|
|
line.long 0x00 "MRNR,Memory Region Number Register"
|
|
bitfld.long 0x00 0.--3. " REGION ,Defines the group of registers to be accessed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
group c15:0x010d++0x00
|
|
line.long 0x00 "CIDR,Context ID Register"
|
|
group.long c15:0x20d++0x00
|
|
line.long 0x00 "TIDRURW,User read/write Thread and Process ID Register"
|
|
group.long c15:0x30d++0x00
|
|
line.long 0x00 "TIDRURO,User read only Thread and Process ID Register"
|
|
group.long c15:0x40d++0x00
|
|
line.long 0x00 "TIDRPRW,Privileged Only Thread and Process ID Register"
|
|
tree "MPU regions"
|
|
group c15:0x0016++0x00
|
|
saveout c15:0x26 %l 0x0
|
|
line.long 0x00 "RBAR0,Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
saveout c15:0x26 %l 0x0
|
|
line.long 0x00 "RSER0,Region Size and Enable Register 0"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
saveout c15:0x26 %l 0x0
|
|
line.long 0x00 "RACR0,Region Access Control Register 0"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
textline " "
|
|
group c15:0x0016++0x00
|
|
saveout c15:0x26 %l 0x1
|
|
line.long 0x00 "RBAR1,Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
saveout c15:0x26 %l 0x1
|
|
line.long 0x00 "RSER1,Region Size and Enable Register 1"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
saveout c15:0x26 %l 0x1
|
|
line.long 0x00 "RACR1,Region Access Control Register 1"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
textline " "
|
|
group c15:0x0016++0x00
|
|
saveout c15:0x26 %l 0x2
|
|
line.long 0x00 "RBAR2,Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
saveout c15:0x26 %l 0x2
|
|
line.long 0x00 "RSER2,Region Size and Enable Register 2"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
saveout c15:0x26 %l 0x2
|
|
line.long 0x00 "RACR2,Region Access Control Register 2"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
textline " "
|
|
group c15:0x0016++0x00
|
|
saveout c15:0x26 %l 0x3
|
|
line.long 0x00 "RBAR3,Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
saveout c15:0x26 %l 0x3
|
|
line.long 0x00 "RSER3,Region Size and Enable Register 3"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
saveout c15:0x26 %l 0x3
|
|
line.long 0x00 "RACR3,Region Access Control Register 3"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
textline " "
|
|
group c15:0x0016++0x00
|
|
saveout c15:0x26 %l 0x4
|
|
line.long 0x00 "RBAR4,Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
saveout c15:0x26 %l 0x4
|
|
line.long 0x00 "RSER4,Region Size and Enable Register 4"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
saveout c15:0x26 %l 0x4
|
|
line.long 0x00 "RACR4,Region Access Control Register 4"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
textline " "
|
|
group c15:0x0016++0x00
|
|
saveout c15:0x26 %l 0x5
|
|
line.long 0x00 "RBAR5,Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
saveout c15:0x26 %l 0x5
|
|
line.long 0x00 "RSER5,Region Size and Enable Register 5"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
saveout c15:0x26 %l 0x5
|
|
line.long 0x00 "RACR5,Region Access Control Register 5"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
textline " "
|
|
group c15:0x0016++0x00
|
|
saveout c15:0x26 %l 0x6
|
|
line.long 0x00 "RBAR6,Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
saveout c15:0x26 %l 0x6
|
|
line.long 0x00 "RSER6,Region Size and Enable Register 6"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
saveout c15:0x26 %l 0x6
|
|
line.long 0x00 "RACR6,Region Access Control Register 6"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
textline " "
|
|
group c15:0x0016++0x00
|
|
saveout c15:0x26 %l 0x7
|
|
line.long 0x00 "RBAR7,Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
saveout c15:0x26 %l 0x7
|
|
line.long 0x00 "RSER7,Region Size and Enable Register 7"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
saveout c15:0x26 %l 0x7
|
|
line.long 0x00 "RACR7,Region Access Control Register 7"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
textline " "
|
|
group c15:0x0016++0x00
|
|
saveout c15:0x26 %l 0x8
|
|
line.long 0x00 "RBAR8,Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
saveout c15:0x26 %l 0x8
|
|
line.long 0x00 "RSER8,Region Size and Enable Register 8"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
saveout c15:0x26 %l 0x8
|
|
line.long 0x00 "RACR8,Region Access Control Register 8"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
textline " "
|
|
group c15:0x0016++0x00
|
|
saveout c15:0x26 %l 0x9
|
|
line.long 0x00 "RBAR9,Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
saveout c15:0x26 %l 0x9
|
|
line.long 0x00 "RSER9,Region Size and Enable Register 9"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
saveout c15:0x26 %l 0x9
|
|
line.long 0x00 "RACR9,Region Access Control Register 9"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
textline " "
|
|
group c15:0x0016++0x00
|
|
saveout c15:0x26 %l 0xA
|
|
line.long 0x00 "RBAR10,Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
saveout c15:0x26 %l 0xA
|
|
line.long 0x00 "RSER10,Region Size and Enable Register 10"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
saveout c15:0x26 %l 0xA
|
|
line.long 0x00 "RACR10,Region Access Control Register 10"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
textline " "
|
|
group c15:0x0016++0x00
|
|
saveout c15:0x26 %l 0xB
|
|
line.long 0x00 "RBAR11,Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
|
|
group c15:0x0216++0x00
|
|
saveout c15:0x26 %l 0xB
|
|
line.long 0x00 "RSER11,Region Size and Enable Register 11"
|
|
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
|
|
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
|
|
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
|
|
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
|
|
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
|
|
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
|
|
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
|
|
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
|
|
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
group c15:0x0416++0x00
|
|
saveout c15:0x26 %l 0xB
|
|
line.long 0x00 "RACR11,Region Access Control Register 11"
|
|
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
|
|
bitfld.long 0x00 2. " S ,Share" "No,Yes"
|
|
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
|
|
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
|
|
textline " "
|
|
tree.end
|
|
tree.end
|
|
width 0x9
|
|
tree "TCM Control and Configuration"
|
|
rgroup.long c15:0x200++0x00
|
|
line.long 0x00 "TCMTR,TCM Type Register"
|
|
bitfld.long 0x00 16.--18. " BTCM ,Number of BTCMs implemented" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " ATCM ,Number of ATCMs implemented" "0,1,2,3,4,5,6,7"
|
|
group.long c15:0x019++0x00
|
|
line.long 0x00 "BTCMRR,BTCM Region Register"
|
|
hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address (physical address)"
|
|
bitfld.long 0x00 2.--6. " SIZE ,Size of instruction TCM on reads" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,?..."
|
|
bitfld.long 0x00 0. " EN ,Enable instruction TCM" "Disabled,Enabled"
|
|
group.long c15:0x119++0x00
|
|
line.long 0x00 "ATCMRR,ATCM Region Register"
|
|
hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address (physical address)"
|
|
bitfld.long 0x00 2.--6. " SIZE ,Size of instruction TCM on reads" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,?..."
|
|
bitfld.long 0x00 0. " EN ,Enable instruction TCM" "Disabled,Enabled"
|
|
rgroup.long c15:0x29++0x00
|
|
line.long 0x00 "TCMSEL,TCM Selection Register"
|
|
tree.end
|
|
width 0xC
|
|
tree "Cache Control and Configuration"
|
|
rgroup.long c15:0x1100--0x1100
|
|
line.long 0x0 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 27.--29. " LoU ,Level of Unification" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " LoC ,Level of Coherency" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " CL8 ,Cache Level (CL) 8" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " CL7 ,Cache Level (CL) 7" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. " CL6 ,Cache Level (CL) 6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " CL5 ,Cache Level (CL) 5" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CL4 ,Cache Level (CL) 4" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. " CL3 ,Cache Level (CL) 3" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " CL2 ,Cache Level (CL) 2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " CL1 ,Cache Level (CL) 1" "0,1,2,3,4,5,6,7"
|
|
rgroup.long c15:0x1000++0x00
|
|
line.long 0x00 "CCSIDR,Cache Size ID Register"
|
|
bitfld.long 0x00 31. " WT ,Write-Through" "Not supported,Supported"
|
|
bitfld.long 0x00 30. " WB ,Write-Back" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RA ,Read-Allocate" "Not supported,Supported"
|
|
bitfld.long 0x00 28. " WA ,Write-Allocate" "Not supported,Supported"
|
|
textline " "
|
|
hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Number of sets"
|
|
hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Associativity"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " LINESIZE ,Number of words in each cache line" "0,1,2,3,4,5,6,7"
|
|
group.long c15:0x2000--0x2000
|
|
line.long 0x0 "CSSELR,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. " Level ,Cache level to select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " InD ,Instruction or data or unified cache to use" "Data/unified,Instruction"
|
|
group.long c15:0x03f++0x00
|
|
line.long 0x00 "CFLR,Correctable Fault Location Register"
|
|
bitfld.long 0x00 26.--29. " WAY ,Way of the error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--25. " SIDE ,Source of the error" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.word 0x00 5.--13. 1. " INDEX ,index of the location where the error occurred"
|
|
bitfld.long 0x00 0.--1. " TYPE ,Type of access that caused the error" "Instruction cache,Data cache,Reserved,ACP"
|
|
rgroup.long c15:0x0ef++0x0
|
|
line.long 0x00 "CSOR,Cache Size Override Register"
|
|
bitfld.long 0x00 4.--6. " Dcache ,Validation data cache size" "Not presented,Reserved,Reserved,4k,8k,16k,32k,64k"
|
|
bitfld.long 0x00 0.--2. " Icache ,Validation instruction cache size" "Not presented,Reserved,Reserved,4k,8k,16k,32k,64k"
|
|
tree.end
|
|
width 8.
|
|
tree "System Performance Monitor"
|
|
group c15:0xC9--0xC9
|
|
line.long 0x0 "PMNC,Performance Monitor Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code"
|
|
hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code"
|
|
bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " X ,Export Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle"
|
|
bitfld.long 0x00 2. " C ,Clock Counter Reset" "No action,Reset"
|
|
bitfld.long 0x00 1. " P ,Performance Counter Reset" "No action,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " E ,Counters Enable" "Disabled,Enabled"
|
|
group c15:0x1C9--0x1C9
|
|
line.long 0x0 "CNTENS,Count Enable Set Register"
|
|
eventfld.long 0x00 31. " C ,CCNT Enabled / Enable / Disable CCNT" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " P3 ,PMN3 Enabled / Enable / Disable counter" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " P2 ,PMN2 Enabled / Enable / Disable counter" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " P1 ,PMN1 Enabled / Enable / Disable counter" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " P0 ,PMN0 Enabled / Enable / Disable counter" "Disabled,Enabled"
|
|
group c15:0x2C9--0x2C9
|
|
line.long 0x0 "CNTENC,Count Enable Clear Register"
|
|
eventfld.long 0x00 31. " C ,CCNT Enabled / Enable / Disable CCNT" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " P3 ,PMN3 Enabled / Enable / Disable counter" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " P2 ,PMN2 Enabled / Enable / Disable counter" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " P1 ,PMN1 Enabled / Enable / Disable counter" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " P0 ,PMN0 Enabled / Enable / Disable counter" "Disabled,Enabled"
|
|
group c15:0x3C9--0x3C9
|
|
line.long 0x0 "FLAG,Overflow Flag Status Register"
|
|
eventfld.long 0x00 31. " C ,CCNT overflowed" "No overflow,Overflow"
|
|
eventfld.long 0x00 3. " P3 ,PMN3 overflowed" "No overflow,Overflow"
|
|
eventfld.long 0x00 2. " P2 ,PMN2 overflowed" "No overflow,Overflow"
|
|
eventfld.long 0x00 1. " P1 ,PMN1 overflowed" "No overflow,Overflow"
|
|
eventfld.long 0x00 0. " P0 ,PMN0 overflowed" "No overflow,Overflow"
|
|
group c15:0x4C9--0x4C9
|
|
line.long 0x0 "SWINCR,Software Increment Register"
|
|
eventfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment"
|
|
eventfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment"
|
|
eventfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment"
|
|
eventfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment"
|
|
group c15:0x5C9--0x5C9
|
|
line.long 0x0 "PMNXSEL,Performance Counter Selection Register"
|
|
bitfld.long 0x00 0.--4. " SEL ,Selection value" "CNT0,CNT1,CNT2,CNT3,?..."
|
|
group c15:0xD9--0xD9
|
|
line.long 0x0 "CCNT,Cycle Count Register"
|
|
group c15:0x01d9++0x00
|
|
line.long 0x00 "ESR,Event Selection Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection"
|
|
group c15:0x02d9++0x00
|
|
line.long 0x00 "PMCR,Performance Monitor Count Register"
|
|
group c15:0x01d9++0x00
|
|
saveout c15:0x5C9 %l 0x0
|
|
line.long 0x00 "ESR0,Event Selection Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection"
|
|
group c15:0x02d9++0x00
|
|
saveout c15:0x5C9 %l 0x0
|
|
line.long 0x00 "PMCR0,Performance Monitor Count Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " PMC ,Performance Monitor Count"
|
|
group c15:0x01d9++0x00
|
|
saveout c15:0x5C9 %l 0x1
|
|
line.long 0x00 "ESR1,Event Selection Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection"
|
|
group c15:0x02d9++0x00
|
|
saveout c15:0x5C9 %l 0x1
|
|
line.long 0x00 "PMCR1,Performance Monitor Count Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " PMC ,Performance Monitor Count"
|
|
group c15:0x01d9++0x00
|
|
saveout c15:0x5C9 %l 0x2
|
|
line.long 0x00 "ESR2,Event Selection Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection"
|
|
group c15:0x02d9++0x00
|
|
saveout c15:0x5C9 %l 0x2
|
|
line.long 0x00 "PMCR2,Performance Monitor Count Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " PMC ,Performance Monitor Count"
|
|
group c15:0xE9--0xE9
|
|
line.long 0x0 "USEREN,User Enable Register"
|
|
bitfld.long 0x00 0. " EN ,User Mode Enable" "Disabled,Enabled"
|
|
group c15:0x1E9--0x1E9
|
|
line.long 0x0 "INTENS,Interrupt Enable Set Register"
|
|
eventfld.long 0x00 31. " C ,Interrupt on CCNT Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " P3 ,Interrupt on PMN3 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " P2 ,Interrupt on PMN2 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " P1 ,Interrupt on PMN1 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " P0 ,Interrupt on PMN0 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
|
|
group c15:0x2E9--0x2E9
|
|
line.long 0x0 "INTENC,Interrupt Enable Clear Register"
|
|
eventfld.long 0x00 31. " C ,Interrupt on CCNT Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " P3 ,Interrupt on PMN3 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " P2 ,Interrupt on PMN2 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " P1 ,Interrupt on PMN1 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " P0 ,Interrupt on PMN0 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
|
|
tree.end
|
|
width 8.
|
|
tree "Debug Registers"
|
|
width 11.
|
|
tree "Processor Identifier Registers"
|
|
rgroup c14:0x340--0x340
|
|
line.long 0x00 "MIDR,Main ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
|
|
hexmask.long.byte 0x0 20.--23. 0x1 " SPECREV ,Variant number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 16.--19. 0x1 " ARCH , Architecture"
|
|
hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Layout Revision"
|
|
rgroup c14:0x341--0x341
|
|
line.long 0x00 "CACHETYPE,Cache Type Register"
|
|
bitfld.long 0x00 16.--19. " DMINLINE ,Words of Smallest Line Length in L1 or L2 Data Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
|
|
bitfld.long 0x00 14.--15. " L1_IPOLICY ,VIPT Instruction Cache Support" "Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " IMINLINE ,Words of Smallest Line Length in L1 or L2 Instruction Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
|
|
rgroup c14:0x343--0x343
|
|
line.long 0x00 "TLBTYPE,TLB Type Register"
|
|
hexmask.long.byte 0x0 16.--23. 0x1 " ILSIZE ,Specifies the number of instruction TLB lockable entries"
|
|
hexmask.long.byte 0x0 8.--15. 0x1 " DLSIZE ,Specifies the number of unified or data TLB lockable entries"
|
|
textline " "
|
|
bitfld.long 0x0 0. " U ,Unified or separate instruction TLBs" "Unified,Separate"
|
|
rgroup c14:0x348--0x348
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 12.--15. " STATE3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " STATE2 ,Java Extension Interface Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x349--0x349
|
|
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Supported,?..."
|
|
bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x34a--0x34a
|
|
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,?..."
|
|
rgroup c14:0x34b--0x34b
|
|
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " AF ,Auxiliary Feature"
|
|
rgroup c14:0x34c--0x34c
|
|
line.long 0x00 "ID_MMFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " IT ,Instruction Type Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " ACR ,Auxiliary Control Register Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CC_PLEA ,Cache Coherency With PLE Agent/Shared Memory Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " CC_CPUA ,Cache Coherency Support With CPU Agent/Shared Memory Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
rgroup c14:0x34d--0x34d
|
|
line.long 0x00 "ID_MMFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " BTB ,Branch Target Buffer Support" "Reserved,Reserved,Not required,?..."
|
|
bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Harvard Architecture" "Supported,?..."
|
|
rgroup c14:0x34e--0x34e
|
|
line.long 0x00 "ID_MMFR2,Processor Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..."
|
|
bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
rgroup c14:0x34f--0x34f
|
|
line.long 0x00 "ID_MMFR3,Processor Feature Register 3"
|
|
bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache by MVA/Clean by MVA/Invalidate and Clean by MVA/Invalidate All Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x350--0x350
|
|
line.long 0x00 "ID_ISAR0,ISA Feature Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..."
|
|
bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " AI ,Atomic Load and Store Instructions Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x351--0x351
|
|
line.long 0x00 "ID_ISAR1,ISA Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " INTI ,Instructions That Branch Between ARM and Thumb Code Support" "Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " EXTI ,Sign or Zero Extend Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " ENDI ,Endianness Control Instructions Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x352--0x352
|
|
line.long 0x00 "ID_ISAR2,ISA Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x353--0x353
|
|
line.long 0x00 "ID_ISAR3,ISA Feature Register 3"
|
|
bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " SWII ,SWI Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x354--0x354
|
|
line.long 0x00 "ID_ISAR4,ISA Feature Register 4"
|
|
bitfld.long 0x00 20.--23. " EI ,Exclusive Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SMII ,SMI Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
rgroup c14:0x355--0x355
|
|
line.long 0x00 "ID_ISAR5,ISA Feature Register 5"
|
|
tree.end
|
|
tree "Coresight Management Registers"
|
|
width 0xC
|
|
textline " "
|
|
group c14:0x03bd++0x00
|
|
line.long 0x00 "ITCTRL_IOC,Integration Internal Output Control Register"
|
|
bitfld.long 0x00 5. " I_DBGTRIGGER ,Internal DBGTRIGGER" "0,1"
|
|
bitfld.long 0x00 4. " I_DBGRESTARTED ,Internal DBGRESTARTED" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " I_NPMUIRQ ,Internal nPMUIRQ" "0,1"
|
|
bitfld.long 0x00 2. " InternalCOMMTX ,Internal COMMTX" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " I_COMMRX ,Internal COMMRX" "0,1"
|
|
bitfld.long 0x00 0. " I_DBGACK ,Internal DBGACK" "0,1"
|
|
group c14:0x03be++0x00
|
|
line.long 0x00 "ITCTRL_EOC,Integration External Output Control Register"
|
|
bitfld.long 0x00 7. " NDMAEXTERRIQ ,External nDMAEXTERRIRQ" "0,1"
|
|
bitfld.long 0x00 6. " NDMASIRQ ,External nDMASIRQ" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " NDMAIRQ ,External nDMAIRQ" "0,1"
|
|
bitfld.long 0x00 4. " NPMUIRQ ,External nPMUIRQ" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STANDBYWFI ,External STANDBYWFI" "0,1"
|
|
bitfld.long 0x00 2. " COMMTX ,External COMMTX" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " COMMRX ,External COMMRX" "0,1"
|
|
bitfld.long 0x00 0. " DBGACK ,External DBGACK" "0,1"
|
|
rgroup c14:0x03bf++0x00
|
|
line.long 0x00 "ITCTRL_IS,Integration Input Status Register"
|
|
bitfld.long 0x00 11. " CTI_DBGRESTART ,CTI Debug Restart" "0,1"
|
|
bitfld.long 0x00 10. " CTI_EDBGRQ ,CTI Debug Request" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTI_PMUEXTIN[1] ,CTI PMUEXTIN[1] Signal" "0,1"
|
|
bitfld.long 0x00 8. " CTI_PMUEXTIN[0] ,CTI PMUEXTIN[0] Signal" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NFIQ ,nFIQ Input" "0,1"
|
|
bitfld.long 0x00 1. " NIRQ ,nIRQ Input" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EDBGRQ ,EDBGRQ Input" "0,1"
|
|
group c14:0x3c0--0x3c0
|
|
line.long 0x0 "ITCTRL,Integration Mode Control Register"
|
|
bitfld.long 0x0 0. " IME ,Integration Mode Enable" "Disabled,Enabled"
|
|
group c14:0x3e8--0x3e8
|
|
line.long 0x0 "CLAIMSET,Claim Tag Set Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Set"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Set"
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Set"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Set"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Set"
|
|
group c14:0x3e9--0x3e9
|
|
line.long 0x0 "CLAIMCLR,Claim Tag Clear Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Cleared"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Cleared"
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Cleared"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Cleared"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Cleared"
|
|
wgroup c14:0x3ec--0x3ec
|
|
line.long 0x0 "LAR,Lock Access Register"
|
|
hexmask.long.long 0x0 0.--31. 1. " LACK ,Lock Access Control Key"
|
|
rgroup c14:0x3ed--0x3ed
|
|
line.long 0x0 "LSR,Lock Status Register"
|
|
bitfld.long 0x0 2. " 32ACND ,32-bit Access Needed" "Needed,Not needed"
|
|
bitfld.long 0x0 1. " WLCK ,Writes Lock" "Permitted,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0 0. " LI ,Lock Implementation" "Lock ignored,Unlock required"
|
|
rgroup c14:0x3ee--0x3ee
|
|
line.long 0x0 "AUTHSTATUS,Authentication Status Register"
|
|
bitfld.long 0x0 7. " SNIDFI ,Secure Non-invasive Debug Features Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 6. " SNIDE ,Secure Non-invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SIDFI ,Secure Invasive Debug Feauter Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 4. " SIDE ,Secure Invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " NSNIDFI ,Non-secure Non-invasive Debug Feature Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 2. " NSNIDE ,Non-secure Non-invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " NSIDFI ,Non-secure Invasive Debug Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 0. " NSIDE ,Non-secure Invasive Debug Enable" "Disabled,Enabled"
|
|
hgroup c14:0x3f2--0x3f2
|
|
hide.long 0x0 "DEVID,Device Identifier (RESERVED)"
|
|
rgroup c14:0x3f3--0x3f3
|
|
line.long 0x0 "DEVTYPE,Device Type"
|
|
hexmask.long.byte 0x00 4.--7. 1. " SUBTYPE ,Subtype"
|
|
hexmask.long.byte 0x00 0.--3. 1. " MAIN_CLASS ,Main class"
|
|
rgroup c14:0x3f8--0x3f8
|
|
line.long 0x0 "PID0,Peripherial ID0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PN ,Part Number [7:0]"
|
|
rgroup c14:0x3f9--0x3f9
|
|
line.long 0x0 "PID1,Peripherial ID1"
|
|
hexmask.long.byte 0x0 4.--7. 1. " JEP106 ,JEP106 Identity Code [3:0]"
|
|
hexmask.long.byte 0x0 0.--3. 1. " PN ,Part Number [11:8]"
|
|
rgroup c14:0x3fa--0x3fa
|
|
line.long 0x0 "PID2,Peripherial ID2"
|
|
hexmask.long.byte 0x0 4.--7. 1. " REV ,Revision"
|
|
hexmask.long.byte 0x0 0.--2. 1. " JEP106 ,JEP106 Identity Code [6:4]"
|
|
rgroup c14:0x3fb--0x3fb
|
|
line.long 0x0 "PID3,Peripherial ID3"
|
|
hexmask.long.byte 0x0 4.--7. 1. " REVA ,RevAnd"
|
|
hexmask.long.byte 0x0 0.--3. 1. " CMOD ,Customer Modified"
|
|
rgroup c14:0x3f4--0x3f4
|
|
line.long 0x0 "PID4,Peripherial ID4"
|
|
bitfld.long 0x0 4.--7. " 4KBC ,Number of 4KB Blocks Occupied" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x0 0.--3. " JEP106 ,JEP106 Continuation Code" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
rgroup c14:0x3fc--0x3fc
|
|
line.long 0x0 "COMPONENTID0,Component ID0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
|
|
rgroup c14:0x3fd--0x3fd
|
|
line.long 0x0 "COMPONENTID1,Component ID1"
|
|
hexmask.long.byte 0x0 4.--7. 1. " CCLASS ,Component Class (CoreSight Component)"
|
|
hexmask.long.byte 0x0 0.--3. 1. " PRBL ,Preamble"
|
|
rgroup c14:0x3fe--0x3fe
|
|
line.long 0x0 "COMPONENTID2,Component ID2"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
|
|
rgroup c14:0x3ff--0x3ff
|
|
line.long 0x0 "COMPONENTID3,Component ID3"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
|
|
tree.end
|
|
textline " "
|
|
width 0x7
|
|
rgroup c14:0x000--0x000
|
|
line.long 0x0 "DIDR,Debug ID Register"
|
|
bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " VERSION ,Debug Architecture Version" "Reserved,ARMv6,ARMv6.1,ARMv7,?..."
|
|
textline " "
|
|
bitfld.long 0x0 13. " PCSAMPLE ,PC Sample register implemented" "Low,High"
|
|
bitfld.long 0x0 12. " SECURITY ,Security Extensions implemented" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x0 4.--7. " VARIANT ,Implementation-defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 0.--3. " REVISION ,Implementation-defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group c14:0x22--0x22
|
|
line.long 0x0 "DSCR,Debug Status and Control Register"
|
|
bitfld.long 0x0 30. " DTRRXFULL ,The DTRRX Full Flag" "Empty,Full"
|
|
bitfld.long 0x0 29. " DTRTXfull ,The DTRTX Full Flag" "Empty,Full"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DTRRXFULL_L ,The DTRRX Full Flag 1" "Empty,Full"
|
|
bitfld.long 0x00 26. " DTRTXFULL_L ,The DTRTX Full Flag 1" "Empty,Full"
|
|
textline " "
|
|
bitfld.long 0x0 25. " SPA ,Sticky Pipeline Advance" "No effect,Instruction retired"
|
|
bitfld.long 0x0 24. " IC ,Instruction Complete" "Executing,Not executing"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " DTR ,DTR Access Mode" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x0 19. " NSWS ,Imprecise Data Aborts discarded" "Not discarded,Discarded"
|
|
textline " "
|
|
bitfld.long 0x0 18. " NS ,Non-secure World Status" "Secured,Not secured"
|
|
bitfld.long 0x0 17. " NSPNIDEN ,Secure Non-invasive Debug Disabled" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0 16. " NSPIDEN ,Secure Invasive Debug Disabled" "Enabled,Disabled"
|
|
bitfld.long 0x0 15. " MONITOR ,Monitor Debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 14. " HDEN ,Halting Debug-mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 13. " EXECUTE ,Execute instruction enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 12. " COMMS ,User mode access to Comms Channel disable" "Enabled,Disabled"
|
|
bitfld.long 0x0 11. " INTDIS ,Disable Interrupts" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " DBGACK ,Force Debug Acknowledge" "Not forced,Forced"
|
|
bitfld.long 0x0 8. " UEXT ,Sticky Undefined Exception" "No exception,Exception"
|
|
textline " "
|
|
bitfld.long 0x0 7. " IABORT ,Sticky Imprecise Abort" "Not aborted,Aborted"
|
|
bitfld.long 0x0 6. " PABORT ,Sticky Precise Abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x0 2.--5. " MOE ,Method of Debug Entry" "Debug Entry,Breakpoint,Imprecise Watchpoint,BKPT instruction,External debug,Vector catch,Reserved,Reserved,OS Unlock,?..."
|
|
bitfld.long 0x0 1. " RESTARTED ,Core Restarted" "Debug not exited,Debug exited"
|
|
textline " "
|
|
bitfld.long 0x0 0. " HALTED ,Core Halted" "Normal state,Debug state"
|
|
if (((data.long(c14:0x00))&0x01000)==0x00000)
|
|
group c14:0x007--0x007
|
|
line.long 0x0 "VCR,Vector Catch Register"
|
|
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " DABORT ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
else
|
|
group c14:0x007--0x007
|
|
line.long 0x0 "VCR,Vector Catch Register"
|
|
bitfld.long 0x0 31. " FIQN ,Vector Catch Enable FIQ (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " IRQN ,Vector Catch Enable IRQ (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DABORTN ,Vector Catch Enable Data Abort (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " PABORTN ,Vector Catch Enable Prefetch abort (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 26. " SWIN ,Vector Catch Enable SWI (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " UNDEFS ,Vector Catch Enable Undefined (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " FIQS ,Vector Catch Enable FIQ (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " IRQS ,Vector Catch Enable IRQ (Secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 12. " DABORTS ,Vector Catch Enable Data Abort (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PABORTS ,Vector Catch Enable Prefetch abort (Secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SMI ,Vector Catch Enable SMI (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " DABORT0 ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
endif
|
|
hgroup c14:0x020--0x020
|
|
hide.long 0x0 "DTRRX,Target -> Host Data Transfer Register"
|
|
in
|
|
group c14:0x023--0x023
|
|
line.long 0x0 "DTRTX,Host -> Target Data Transfer Register"
|
|
hexmask.long 0x00 0.--31. 1. " HTD ,Host -> target data"
|
|
group c14:0x09++0x00
|
|
line.long 0x00 "ECR,Event Catch Register"
|
|
bitfld.long 0x00 0. " OSUC ,OS Unlock Catch" "Disabled,Enabled"
|
|
group c14:0x0a++0x00
|
|
line.long 0x00 "DSCCR,Debug State Cache Control Register"
|
|
bitfld.long 0x00 2. " NWT ,Not Write-Through" "Forced,Normal"
|
|
bitfld.long 0x00 0. " DUCL ,Data and Unified Cache Linefill" "Disabled,Normal"
|
|
wgroup c14:0x21++0x00
|
|
line.long 0x00 "ITR,Instruction Transfer Register"
|
|
hexmask.long 0x00 0.--31. 1. " Data ,ARM Instruction for the Processor in Debug State Execute"
|
|
wgroup c14:0x24++0x00
|
|
line.long 0x00 "DRCR,Debug Run Control Register"
|
|
bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance" "Not cleared,Cleared"
|
|
bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RR ,Restart Request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " HR ,Halt Request" "Not requested,Requested"
|
|
wgroup c14:0xc0++0x00
|
|
line.long 0x00 "OSLAR,Operating System Lock Access Register"
|
|
hexmask.long 0x00 0.--31. 1. " OSLA ,OS Lock Access"
|
|
rgroup c14:0xc1++0x00
|
|
line.long 0x00 "OSLSR,Operating System Lock Status Register"
|
|
bitfld.long 0x00 2. " 32_BA ,32-Bit Access" "Not required,Required"
|
|
bitfld.long 0x00 1. " LB ,Locked Bit" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LIB ,Lock Implemented Bit" "Not implemented,Implemented"
|
|
group c14:0xc2++0x00
|
|
line.long 0x00 "OSSRR,Operating System Save and Restore Register"
|
|
hexmask.long 0x00 0.--31. 1. " OSSR ,OS Save and Restore"
|
|
group c14:0xc4++0x00
|
|
line.long 0x00 "PRCR,Device Power-Down and Reset Control Register"
|
|
bitfld.long 0x00 2. " HIR ,Hold Internal Reset" "Not held,Held"
|
|
bitfld.long 0x00 1. " FIR ,Force Internal Reset" "Not forced,Forced"
|
|
bitfld.long 0x00 0. " NPD ,No Power-Down" "DBGNOPWRDWN low,DBGNOPWRDWN high"
|
|
hgroup c14:0xc5++0x00
|
|
hide.long 0x00 "PRSR,Device Power-Down and Reset Status Register"
|
|
in
|
|
tree.end
|
|
tree "Breakpoint Registers"
|
|
group c14:0x40++0x00
|
|
line.long 0x00 "BVR0,Breakpoint Value Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " BV0 ,Breakpoint Value 0"
|
|
group c14:0x50++0x00
|
|
line.long 0x00 "BCR0,Breakpoint Control Register 0"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x41++0x00
|
|
line.long 0x00 "BVR1,Breakpoint Value Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " BV1 ,Breakpoint Value 1"
|
|
group c14:0x51++0x00
|
|
line.long 0x00 "BCR1,Breakpoint Control Register 1"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x42++0x00
|
|
line.long 0x00 "BVR2,Breakpoint Value Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " BV2 ,Breakpoint Value 2"
|
|
group c14:0x52++0x00
|
|
line.long 0x00 "BCR2,Breakpoint Control Register 2"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x43++0x00
|
|
line.long 0x00 "BVR3,Breakpoint Value Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " BV3 ,Breakpoint Value 3"
|
|
group c14:0x53++0x00
|
|
line.long 0x00 "BCR3,Breakpoint Control Register 3"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x44++0x00
|
|
line.long 0x00 "BVR4,Breakpoint Value Register 4"
|
|
hexmask.long 0x00 0.--31. 1. " BV4 ,Breakpoint Value 4"
|
|
group c14:0x54++0x00
|
|
line.long 0x00 "BCR4,Breakpoint Control Register 4"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x45++0x00
|
|
line.long 0x00 "BVR5,Breakpoint Value Register 5"
|
|
hexmask.long 0x00 0.--31. 1. " BV5 ,Breakpoint Value 5"
|
|
group c14:0x55++0x00
|
|
line.long 0x00 "BCR5,Breakpoint Control Register 5"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x46++0x00
|
|
line.long 0x00 "BVR6,Breakpoint Value Register 6"
|
|
hexmask.long 0x00 0.--31. 1. " BV6 ,Breakpoint Value 6"
|
|
group c14:0x56++0x00
|
|
line.long 0x00 "BCR6,Breakpoint Control Register 6"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x47++0x00
|
|
line.long 0x00 "BVR7,Breakpoint Value Register 7"
|
|
hexmask.long 0x00 0.--31. 1. " BV7 ,Breakpoint Value 7"
|
|
group c14:0x57++0x00
|
|
line.long 0x00 "BCR7,Breakpoint Control Register 7"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Watchpoint Control Registers"
|
|
group c14:0x60++0x00
|
|
line.long 0x00 "WVR0,Watchpoint Value Register 0"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0"
|
|
group c14:0x70--0x70
|
|
line.long 0x0 "WCR0,Watchpoint Control Register 0"
|
|
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x61++0x00
|
|
line.long 0x00 "WVR1,Watchpoint Value Register 1"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA1 ,Watchpoint Address 1"
|
|
group c14:0x71--0x71
|
|
line.long 0x0 "WCR1,Watchpoint Control Register 1"
|
|
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x62++0x00
|
|
line.long 0x00 "WVR2,Watchpoint Value Register 2"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA2 ,Watchpoint Address 2"
|
|
group c14:0x72--0x72
|
|
line.long 0x0 "WCR2,Watchpoint Control Register 2"
|
|
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x63++0x00
|
|
line.long 0x00 "WVR3,Watchpoint Value Register 3"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA3 ,Watchpoint Address 3"
|
|
group c14:0x73--0x73
|
|
line.long 0x0 "WCR3,Watchpoint Control Register 3"
|
|
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x64++0x00
|
|
line.long 0x00 "WVR4,Watchpoint Value Register 4"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA4 ,Watchpoint Address 4"
|
|
group c14:0x74--0x74
|
|
line.long 0x0 "WCR4,Watchpoint Control Register 4"
|
|
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x65++0x00
|
|
line.long 0x00 "WVR5,Watchpoint Value Register 5"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA5 ,Watchpoint Address 5"
|
|
group c14:0x75--0x75
|
|
line.long 0x0 "WCR5,Watchpoint Control Register 5"
|
|
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x66++0x00
|
|
line.long 0x00 "WVR6,Watchpoint Value Register 6"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA6 ,Watchpoint Address 6"
|
|
group c14:0x76--0x76
|
|
line.long 0x0 "WCR6,Watchpoint Control Register 6"
|
|
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x67++0x00
|
|
line.long 0x00 "WVR7,Watchpoint Value Register 7"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA7 ,Watchpoint Address 7"
|
|
group c14:0x77--0x77
|
|
line.long 0x0 "WCR7,Watchpoint Control Register 7"
|
|
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x006--0x006
|
|
line.long 0x0 "WFAR,Watchpoint Fault Address Register"
|
|
hexmask.long.long 0x00 1.--31. 0x02 " WFAR ,Address of the watchpointed instruction"
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "System Controller"
|
|
base ad:0xb0600000
|
|
width 19.
|
|
textline " "
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SYSC_PROTKEYR,Protection Key Register"
|
|
group.word 0x80++0x03 "RUN Profile Registers"
|
|
line.word 0x00 "SYSC_RUNPDCFGR,RUN Profile Power Domain Configuration Register"
|
|
bitfld.word 0x00 3. " PD5ON ,Power Domain 5 Switch Request" "Off,On"
|
|
bitfld.word 0x00 2. " PD4ON ,Power Domain 4 Switch Request" "Off,On"
|
|
bitfld.word 0x00 1. " PD3ON ,Power Domain 3 Switch Request" "No effect,On"
|
|
bitfld.word 0x00 0. " PD2ON ,Power Domain 2 Switch Request" "No effect,On"
|
|
textline " "
|
|
line.word 0x02 "SYSC_RUNCKSRER,RUN Profile Clock Source Enable Register"
|
|
bitfld.word 0x02 6. " GFXPLLEN ,GFX PLL Control" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " SSCGPLLEN ,SSCG PLL Control" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " MAINPLLEN ,Main PLL Control" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " SOSCEN ,Sub Oscillator Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 2. " MOSCEN ,Main Oscillator Enable Control" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " RCOSCEN ,RC Oscillator Enable Control" "No effect,Enabled"
|
|
bitfld.word 0x02 0. " SRCOSCEN ,Slow RC Oscillator Enable Control" "Disabled,Enabled"
|
|
group.long (0x80+0x4)++0x2b
|
|
line.long 0x00 "SYSC_RUNCKSELR,RUN Profile Clock Select Register"
|
|
bitfld.long 0x00 28.--29. " SPICSL ,SPI Clock Select for Graphics Subsystem" "SPI,External,Tied low,Tied low"
|
|
bitfld.long 0x00 24.--25. " PIXCSL ,Pixel Clock Select for Graphics Subsystem" "GFX bus,External,GFX PLL,Tied low"
|
|
bitfld.long 0x00 12.--14. " PERI3CSL ,Peripheral Group 3 Clock Select Control" "RC clock,Sub oscillator,Main oscilator,Main PLL clock,SSCG PLL clk,Tied low,Tied low,Tied low"
|
|
bitfld.long 0x00 8.--10. " PERI1CSL ,Peripheral Group 1 Clock Select Control" "RC clock,Sub oscillator,Main oscilator,Main PLL clock,SSCG PLL clock,Tied low,Tied low,Tied low"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " PERI0CSL ,Peripheral Group 0 Clock Select Control" "RC clock,Sub oscillator,Main oscilator,Main PLL clock,SSCG PLL clock,Tied low,Tied low,Tied low"
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|
bitfld.long 0x00 0.--2. " SYSCSL ,System Clock Select Control" "RC clock,Sub oscillator,Main oscilator,Main PLL clock,SSCG PLL clock,Tied low,Tied low,Tied low"
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|
line.long 0x04 "SYSC_RUNCKER,RUN Profile Clock Enable Register"
|
|
bitfld.long 0x04 30. " ENSPIPD5 ,Graphics SPI Clock for Power Domain 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " ENPIXPD5 ,Graphics PLL Clock for Power Domain 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " ENGFXPD5 ,Graphics Bus Clock for Power Domain 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " ENCFGPD4 ,Enable Configuration Clock for Power Domain 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " ENEXTBUSPD3 ,Enable External Bus Clock for Power Domain 3" "Disabled,Enabled"
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|
bitfld.long 0x04 20. " ENSPIPD3 ,Enable SPI Clock for HSSPI for Power Domain 3" "Disabled,Enabled"
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|
textline " "
|
|
bitfld.long 0x04 19. " ENMEMEPD3 ,Enable Memory External Clock for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " ENHPMPD3 ,Enable HPM Clock for Power Domain 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 17. " ENTRACEPD3 ,Enable Trace Clock for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " ENSYSPD3 ,Enable System Clock for Power Domain 3" "No effect,Enabled"
|
|
bitfld.long 0x04 11. " ENPERI4PD2 ,Enable Peripheral Group 4 Clock for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " ENPERI3PD2 ,Enable Peripheral Group 3 Clock for Power Domain 2" "Disabled,Enabled"
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|
textline " "
|
|
bitfld.long 0x04 8. " ENPERI1PD2 ,Enable Peripheral Group 1 Clock for Power Domain 2" "Disabled,Enabled"
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|
bitfld.long 0x04 7. " ENPERI0PD2 ,Enable Peripheral Group 0 Clock for Power Domain 2" "Disabled,Enabled"
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|
bitfld.long 0x04 6. " ENDMAPD2 ,Enable DMA Clock for Power Domain 2" "Disabled,Enabled"
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|
bitfld.long 0x04 5. " ENTRACEPD2 ,Enable Trace Clock for Power Domain 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ENHPMPD2 ,Enable HPM Clock for Power Domain 2" "No effect,Enabled"
|
|
bitfld.long 0x04 0. " ENCFGPD1 ,Enable Configuration Clock for Power Domain 1" "No effect,Enabled"
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line.long 0x08 "SYSC_RUNCKDIVR0,RUN Profile Clock Divider Register 0"
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bitfld.long 0x08 24.--25. " CFGDIV ,Configuration Clock Division Value" "/1,/2,/4,/8"
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bitfld.long 0x08 16.--17. " HPMDIV ,HPM Clock Division Value" "/1,/2,/4,/8"
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|
bitfld.long 0x08 8.--9. " TRACEDIV ,Trace Clock Division Value" "/1,/2,/4,/8"
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|
bitfld.long 0x08 0.--3. " SYSDIV ,System Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
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line.long 0x0c "SYSC_RUNCKDIVR1,RUN Profile Clock Divider Register 1"
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bitfld.long 0x0c 24.--25. " GFXDIV ,Graphics Clock Division Value" "1,2,4,8"
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bitfld.long 0x0c 16.--17. " PERI4DIV ,Peripheral 4 Clock Division Value" "/1,/2,/4,/8"
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bitfld.long 0x0c 8.--9. " MEMEDIV ,Memory External Clock Division Value" "/1,/2,/4,/8"
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bitfld.long 0x0c 0.--2. " EXTBUSDIV ,External Bus Clock Division Value" "/1,/2,/4,/8,/16,/32,/64,/128"
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line.long 0x10 "SYSC_RUNCKDIVR2,RUN Profile Clock Divider Register 2"
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bitfld.long 0x10 24.--27. " PERI3DIV ,Peripheral Group 3 Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
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bitfld.long 0x10 8.--11. " PERI1DIV ,Peripheral Group 1 Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
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bitfld.long 0x10 0.--3. " PERI0DIV ,Peripheral Group 0 Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
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line.long 0x14 "SYSC_RUNPLLCNTR,RUN Profile PLL Control Register"
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hexmask.long.byte 0x14 16.--22. 1. " PLLDIVN ,PLL Multiplication-by-N Value"
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bitfld.long 0x14 8.--11. " PLLDIVM ,PLL Division-by-M Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
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bitfld.long 0x14 0.--1. " PLLDIVL ,PLL Input Division Value" "/1,/2,/4,/6"
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line.long 0x18 "SYSC_RUNSSCGCNTR0,RUN Profile SSCG Control Register 0"
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bitfld.long 0x18 24.--28. " SSCGDIVP ,SSCG PLL Multiplication-by-P Value" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x18 16.--21. " SSCGDIVN ,SSCG PLL Multiplication-by-N Value" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x18 8.--11. " SSCGDIVM ,SSCG PLL Division-by-M Value" ",/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
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bitfld.long 0x18 0.--1. " SSCGDIVL ,SSCG PLL Input Division Value" "/1,/2,/4,/6"
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line.long 0x1c "SYSC_RUNSSCGCNTR1,RUN Profile SSCG Control Register 1"
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bitfld.long 0x1c 24. " SSCGSSEN ,SSCG PLL Modulation Enable Control" "Disabled,Enabled"
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bitfld.long 0x1c 17.--18. " SSCGFREQ ,Modulation frequency rate for SSCG PLL" "1/1024 * Fin,1/2048 * Fin,1/4096 * Fin,1/4096 * Fin"
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bitfld.long 0x1c 16. " SSCGMODE ,SSCG PLL Modulator Mode" "Down spread,Center spread"
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hexmask.long.word 0x1c 0.--9. 1. " SSCGRATE ,Modulation rate for SSCG PLL for EMI reduction"
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line.long 0x20 "SYSC_RUNGFXCNTR0,RUN Profile Graphics PLL Control Register 0"
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bitfld.long 0x20 24.--28. " GFXDIVP ,Graphics PLL Division-by-P Value" ",/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31"
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bitfld.long 0x20 16.--21. " GFXDIVN ,Graphics PLL Division-by-N Value" ",,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63"
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bitfld.long 0x20 0.--1. " GFXDIVL ,Graphics PLL Input Division Value" "/1,/2,/4,/6"
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line.long 0x24 "SYSC_RUNGFXCNTR1,RUN Profile Graphics PLL Control Register 1"
|
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bitfld.long 0x24 24. " GFXSSEN ,GFX PLL Modulation Enable Control" "Disabled,Enabled"
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bitfld.long 0x24 17.--18. " GFXFREQ ,Graphics PLL Modulation Frequency Select" "1/1024 * Fin,1/2048 * Fin,1/4096 * Fin,1/4096 * Fin"
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bitfld.long 0x24 16. " GFXMODE ,Graphics PLL Modulator Mode" "Down spread,Center spread"
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hexmask.long.word 0x24 0.--9. 1. " GFXRATE ,Graphics PLL Modulation Rate Control Value"
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line.long 0x28 "SYSC_RUNLVDCFGR,RUN Profile Low Voltage Detector Configuration Register"
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bitfld.long 0x28 18.--20. " SV12 ,Reference Voltage Selection for 1.2 V LVD" "0.5V,0.6V,0.8V,0.7V,1.2V,1.1V,0.9V,1.0V"
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bitfld.long 0x28 17. " LVDR12 ,Low Voltage Detector Reset/Interrupt Select for 1.2 V" "Interrupt,Reset"
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|
bitfld.long 0x28 16. " LVDE12 ,Low Voltage Detector Enable for 1.2V" "Disabled,Enabled"
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|
bitfld.long 0x28 10.--12. " SV33 ,Reference Voltage Selection for 3.3V LVD" "2.2V,2.4V,2.7V,2.6V,..."
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textline " "
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bitfld.long 0x28 9. " LVDR33 ,Low Voltage Detector Reset/Interrupt Select for 3.3 V" "Interrupt,Reset"
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bitfld.long 0x28 8. " LVDE33 ,Low Voltage Detector Enable for 3.3V" "Disabled,Enabled"
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bitfld.long 0x28 2.--4. " SV50 ,Reference Voltage Selection for 5.0V LVD" "2.2V,2.4V,2.7V,2.6V,4.3V,4.1V,3.7V,3.9V"
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bitfld.long 0x28 1. " LVDR50 ,Low Voltage Detector Reset/Interrupt Select for 5.0 V" "Interrupt,Reset"
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textline " "
|
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bitfld.long 0x28 0. " LVDE50 ,Low Voltage Detector Enable for 5.0 V" "Disabled,Enabled"
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group.word (0x80+0x30)++0x01
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line.word 0x00 "SYSC_RUNCSVCFGR,RUN Profile Clock Supervisor Configuration Register"
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bitfld.word 0x00 4. " GPCSVE ,Graphics PLL Clock Supervisor Enable" "Disabled,Enabled"
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bitfld.word 0x00 3. " SPCSVE ,SSCG PLL Clock Supervisor Enable" "Disabled,Enabled"
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bitfld.word 0x00 2. " MPCSVE ,Main PLL Clock Supervisor Enable" "Disabled,Enabled"
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bitfld.word 0x00 1. " SOCSVE ,Sub Oscillator Clock Supervisor Enable" "Disabled,Enabled"
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textline " "
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bitfld.word 0x00 0. " MOCSVE ,Main Oscillator Clock Supervisor Enable" "Disabled,Enabled"
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wgroup.word (0x80+0x32)++0x01
|
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line.word 0x00 "SYSC_TRGRUNCNTR,Trigger RUN Control Register"
|
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hexmask.word.byte 0x00 0.--7. 1. " APPLYRUN ,Apply RUN Trigger"
|
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group.word 0x100++0x03 "PSS Profile Registers"
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line.word 0x00 "SYSC_PSSPDCFGR,PSS Profile Power Domain Configuration Register"
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bitfld.word 0x00 3. " PD5ON ,Power Domain 5 Switch Request" "Off,On"
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bitfld.word 0x00 2. " PD4ON ,Power Domain 4 Switch Request" "Off,On"
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|
bitfld.word 0x00 1. " PD3ON ,Power Domain 3 Switch Request" "Off,On"
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bitfld.word 0x00 0. " PD2ON ,Power Domain 2 Switch Request" "Off,On"
|
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textline " "
|
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line.word 0x02 "SYSC_PSSCKSRER,PSS Profile Clock Source Enable Register"
|
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bitfld.word 0x02 6. " GFXPLLEN ,GFX PLL Control" "Disabled,Enabled"
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bitfld.word 0x02 5. " SSCGPLLEN ,SSCG PLL Control" "Disabled,Enabled"
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bitfld.word 0x02 4. " MAINPLLEN ,Main PLL Control" "Disabled,Enabled"
|
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bitfld.word 0x02 3. " SOSCEN ,Sub Oscillator Control" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x02 2. " MOSCEN ,Main Oscillator Enable Control" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " RCOSCEN ,RC Oscillator Enable Control" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " SRCOSCEN ,Slow RC Oscillator Enable Control" "Disabled,Enabled"
|
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group.long (0x100+0x4)++0x2b
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line.long 0x00 "SYSC_PSSCKSELR,PSS Profile Clock Select Register"
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bitfld.long 0x00 28.--29. " SPICSL ,SPI Clock Select for Graphics Subsystem" "SPI,External,Tied low,Tied low"
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bitfld.long 0x00 24.--25. " PIXCSL ,Pixel Clock Select for Graphics Subsystem" "GFX bus,External,GFX PLL,Tied low"
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bitfld.long 0x00 12.--14. " PERI3CSL ,Peripheral Group 3 Clock Select Control" "RC clock,Sub oscillator,Main oscilator,Main PLL clock,SSCG PLL clk,Tied low,Tied low,Tied low"
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bitfld.long 0x00 8.--10. " PERI1CSL ,Peripheral Group 1 Clock Select Control" "RC clock,Sub oscillator,Main oscilator,Main PLL clock,SSCG PLL clock,Tied low,Tied low,Tied low"
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textline " "
|
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bitfld.long 0x00 4.--6. " PERI0CSL ,Peripheral Group 0 Clock Select Control" "RC clock,Sub oscillator,Main oscilator,Main PLL clock,SSCG PLL clock,Tied low,Tied low,Tied low"
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bitfld.long 0x00 0.--2. " SYSCSL ,System Clock Select Control" "RC clock,Sub oscillator,Main oscilator,Main PLL clock,SSCG PLL clock,Tied low,Tied low,Tied low"
|
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line.long 0x04 "SYSC_PSSCKER,PSS Profile Clock Enable Register"
|
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bitfld.long 0x04 30. " ENSPIPD5 ,Graphics SPI Clock for Power Domain 5" "Disabled,Enabled"
|
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bitfld.long 0x04 29. " ENPIXPD5 ,Graphics PLL Clock for Power Domain 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " ENGFXPD5 ,Graphics Bus Clock for Power Domain 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " ENCFGPD4 ,Enable Configuration Clock for Power Domain 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " ENEXTBUSPD3 ,Enable External Bus Clock for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " ENSPIPD3 ,Enable SPI Clock for HSSPI for Power Domain 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ENMEMEPD3 ,Enable Memory External Clock for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " ENHPMPD3 ,Enable HPM Clock for Power Domain 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 17. " ENTRACEPD3 ,Enable Trace Clock for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " ENSYSPD3 ,Enable System Clock for Power Domain 3" "Disabled,No effect"
|
|
bitfld.long 0x04 11. " ENPERI4PD2 ,Enable Peripheral Group 4 Clock for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " ENPERI3PD2 ,Enable Peripheral Group 3 Clock for Power Domain 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 8. " ENPERI1PD2 ,Enable Peripheral Group 1 Clock for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " ENPERI0PD2 ,Enable Peripheral Group 0 Clock for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " ENDMAPD2 ,Enable DMA Clock for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " ENTRACEPD2 ,Enable Trace Clock for Power Domain 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ENHPMPD2 ,Enable HPM Clock for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " ENCFGPD1 ,Enable Configuration Clock for Power Domain 1" "Disabled,Enabled"
|
|
line.long 0x08 "SYSC_PSSCKDIVR0,PSS Profile Clock Divider Register 0"
|
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bitfld.long 0x08 24.--25. " CFGDIV ,Configuration Clock Division Value" "/1,/2,/4,/8"
|
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bitfld.long 0x08 16.--17. " HPMDIV ,HPM Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x08 8.--9. " TRACEDIV ,Trace Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x08 0.--3. " SYSDIV ,System Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
line.long 0x0c "SYSC_PSSCKDIVR1,PSS Profile Clock Divider Register 1"
|
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bitfld.long 0x0c 24.--25. " GFXDIV ,Graphics Clock Division Value" "1,2,4,8"
|
|
bitfld.long 0x0c 16.--17. " PERI4DIV ,Peripheral 4 Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x0c 8.--9. " MEMEDIV ,Memory External Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x0c 0.--2. " EXTBUSDIV ,External Bus Clock Division Value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
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line.long 0x10 "SYSC_PSSCKDIVR2,PSS Profile Clock Divider Register 2"
|
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bitfld.long 0x10 24.--27. " PERI3DIV ,Peripheral Group 3 Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
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bitfld.long 0x10 8.--11. " PERI1DIV ,Peripheral Group 1 Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
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bitfld.long 0x10 0.--3. " PERI0DIV ,Peripheral Group 0 Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
line.long 0x14 "SYSC_PSSPLLCNTR,PSS Profile PLL Control Register"
|
|
hexmask.long.byte 0x14 16.--22. 1. " PLLDIVN ,PLL Multiplication-by-N Value"
|
|
bitfld.long 0x14 8.--11. " PLLDIVM ,PLL Division-by-M Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
bitfld.long 0x14 0.--1. " PLLDIVL ,PLL Input Division Value" "/1,/2,/4,/6"
|
|
line.long 0x18 "SYSC_PSSSSCGCNTR0,PSS Profile SSCG Control Register 0"
|
|
bitfld.long 0x18 24.--28. " SSCGDIVP ,SSCG PLL Multiplication-by-P Value" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x18 16.--21. " SSCGDIVN ,SSCG PLL Multiplication-by-N Value" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x18 8.--11. " SSCGDIVM ,SSCG PLL Division-by-M Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
bitfld.long 0x18 0.--1. " SSCGDIVL ,SSCG PLL Input Division Value" "/1,/2,/4,/6"
|
|
line.long 0x1c "SYSC_PSSSSCGCNTR1,PSS Profile SSCG Control Register 1"
|
|
bitfld.long 0x1c 24. " SSCGSSEN ,SSCG PLL Modulation Enable Control" "Disabled,Enabled"
|
|
bitfld.long 0x1c 17.--18. " SSCGFREQ ,Modulation frequency rate for SSCG PLL" "1/1024 * Fin,1/2048 * Fin,1/4096 * Fin,1/4096 * Fin"
|
|
bitfld.long 0x1c 16. " SSCGMODE ,SSCG PLL Modulator Mode" "Down spread,Center spread"
|
|
hexmask.long.word 0x1c 0.--9. 1. " SSCGRATE ,Modulation rate for SSCG PLL for EMI reduction"
|
|
line.long 0x20 "SYSC_PSSGFXCNTR0,PSS Profile Graphics PLL Control Register 0"
|
|
bitfld.long 0x20 24.--28. " GFXDIVP ,Graphics PLL Division-by-P Value" ",/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31"
|
|
bitfld.long 0x20 16.--21. " GFXDIVN ,Graphics PLL Division-by-N Value" ",,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63"
|
|
bitfld.long 0x20 0.--1. " GFXDIVL ,Graphics PLL Input Division Value" "/1,/2,/4,/6"
|
|
line.long 0x24 "SYSC_PSSGFXCNTR1,PSS Profile Graphics PLL Control Register 1"
|
|
bitfld.long 0x24 24. " GFXSSEN ,GFX PLL Modulation Enable Control" "Disabled,Enabled"
|
|
bitfld.long 0x24 17.--18. " GFXFREQ ,Graphics PLL Modulation Frequency Select" "1/1024 * Fin,1/2048 * Fin,1/4096 * Fin,1/4096 * Fin"
|
|
bitfld.long 0x24 16. " GFXMODE ,Graphics PLL Modulator Mode" "Down spread,Center spread"
|
|
hexmask.long.word 0x24 0.--9. 1. " GFXRATE ,Graphics PLL Modulation Rate Control Value"
|
|
line.long 0x28 "SYSC_PSSLVDCFGR,PSS Profile Low Voltage Detector Configuration Register"
|
|
bitfld.long 0x28 18.--20. " SV12 ,Reference Voltage Selection for 1.2 V LVD" "0.5V,0.6V,0.8V,0.7V,1.2V,1.1V,0.9V,1.0V"
|
|
bitfld.long 0x28 17. " LVDR12 ,Low Voltage Detector Reset/Interrupt Select for 1.2 V" "Interrupt,Reset"
|
|
bitfld.long 0x28 16. " LVDE12 ,Low Voltage Detector Enable for 1.2V" "Disabled,Enabled"
|
|
bitfld.long 0x28 10.--12. " SV33 ,Reference Voltage Selection for 3.3V LVD" "2.2V,2.4V,2.7V,2.6V,..."
|
|
textline " "
|
|
bitfld.long 0x28 9. " LVDR33 ,Low Voltage Detector Reset/Interrupt Select for 3.3 V" "Interrupt,Reset"
|
|
bitfld.long 0x28 8. " LVDE33 ,Low Voltage Detector Enable for 3.3V" "Disabled,Enabled"
|
|
bitfld.long 0x28 2.--4. " SV50 ,Reference Voltage Selection for 5.0V LVD" "2.2V,2.4V,2.7V,2.6V,4.3V,4.1V,3.7V,3.9V"
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|
bitfld.long 0x28 1. " LVDR50 ,Low Voltage Detector Reset/Interrupt Select for 5.0 V" "Interrupt,Reset"
|
|
textline " "
|
|
bitfld.long 0x28 0. " LVDE50 ,Low Voltage Detector Enable for 5.0 V" "Disabled,Enabled"
|
|
group.word (0x100+0x30)++0x01
|
|
line.word 0x00 "SYSC_PSSCSVCFGR,PSS Profile Clock Supervisor Configuration Register"
|
|
bitfld.word 0x00 4. " GPCSVE ,Graphics PLL Clock Supervisor Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " SPCSVE ,SSCG PLL Clock Supervisor Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " MPCSVE ,Main PLL Clock Supervisor Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " SOCSVE ,Sub Oscillator Clock Supervisor Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " MOCSVE ,Main Oscillator Clock Supervisor Enable" "Disabled,Enabled"
|
|
group.word (0x100+0x32)++0x01
|
|
line.word 0x00 "SYSC_PSSENR,PSS Enable Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSSEN ,PSS Switch Enable"
|
|
rgroup.word 0x180++0x03 "APPLIED Profile Registers"
|
|
line.word 0x00 "SYSC_APPPDCFGR,APPLIED Profile Power Domain Configuration Register"
|
|
bitfld.word 0x00 3. " PD5ON ,Power Domain 5 Switch Request" "Off,On"
|
|
bitfld.word 0x00 2. " PD4ON ,Power Domain 4 Switch Request" "Off,On"
|
|
bitfld.word 0x00 1. " PD3ON ,Power Domain 3 Switch Request" "Off,On"
|
|
bitfld.word 0x00 0. " PD2ON ,Power Domain 2 Switch Request" "Off,On"
|
|
textline " "
|
|
line.word 0x02 "SYSC_APPCKSRER,APPLIED Profile Clock Source Enable Register"
|
|
bitfld.word 0x02 6. " GFXPLLEN ,GFX PLL Control" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " SSCGPLLEN ,SSCG PLL Control" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " MAINPLLEN ,Main PLL Control" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " SOSCEN ,Sub Oscillator Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 2. " MOSCEN ,Main Oscillator Enable Control" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " RCOSCEN ,RC Oscillator Enable Control" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " SRCOSCEN ,Slow RC Oscillator Enable Control" "Disabled,Enabled"
|
|
rgroup.long (0x180+0x4)++0x2b
|
|
line.long 0x00 "SYSC_APPCKSELR,APPLIED Profile Clock Select Register"
|
|
bitfld.long 0x00 28.--29. " SPICSL ,SPI Clock Select for Graphics Subsystem" "SPI,External,Tied low,Tied low"
|
|
bitfld.long 0x00 24.--25. " PIXCSL ,Pixel Clock Select for Graphics Subsystem" "GFX bus,External,GFX PLL,Tied low"
|
|
bitfld.long 0x00 12.--14. " PERI3CSL ,Peripheral Group 3 Clock Select Control" "RC clock,Sub oscillator,Main oscilator,Main PLL clock,SSCG PLL clk,Tied low,Tied low,Tied low"
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bitfld.long 0x00 8.--10. " PERI1CSL ,Peripheral Group 1 Clock Select Control" "RC clock,Sub oscillator,Main oscilator,Main PLL clock,SSCG PLL clock,Tied low,Tied low,Tied low"
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|
textline " "
|
|
bitfld.long 0x00 4.--6. " PERI0CSL ,Peripheral Group 0 Clock Select Control" "RC clock,Sub oscillator,Main oscilator,Main PLL clock,SSCG PLL clock,Tied low,Tied low,Tied low"
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|
bitfld.long 0x00 0.--2. " SYSCSL ,System Clock Select Control" "RC clock,Sub oscillator,Main oscilator,Main PLL clock,SSCG PLL clock,Tied low,Tied low,Tied low"
|
|
line.long 0x04 "SYSC_APPCKER,APPLIED Profile Clock Enable Register"
|
|
bitfld.long 0x04 30. " ENSPIPD5 ,Graphics SPI Clock for Power Domain 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " ENPIXPD5 ,Graphics PLL Clock for Power Domain 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " ENGFXPD5 ,Graphics Bus Clock for Power Domain 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " ENCFGPD4 ,Enable Configuration Clock for Power Domain 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " ENEXTBUSPD3 ,Enable External Bus Clock for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " ENSPIPD3 ,Enable SPI Clock for HSSPI for Power Domain 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ENMEMEPD3 ,Enable Memory External Clock for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " ENHPMPD3 ,Enable HPM Clock for Power Domain 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 17. " ENTRACEPD3 ,Enable Trace Clock for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " ENSYSPD3 ,Enable System Clock for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " ENPERI4PD2 ,Enable Peripheral Group 4 Clock for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " ENPERI3PD2 ,Enable Peripheral Group 3 Clock for Power Domain 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 8. " ENPERI1PD2 ,Enable Peripheral Group 1 Clock for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " ENPERI0PD2 ,Enable Peripheral Group 0 Clock for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " ENDMAPD2 ,Enable DMA Clock for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " ENTRACEPD2 ,Enable Trace Clock for Power Domain 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ENHPMPD2 ,Enable HPM Clock for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " ENCFGPD1 ,Enable Configuration Clock for Power Domain 1" "Disabled,Enabled"
|
|
line.long 0x08 "SYSC_APPCKDIVR0,APPLIED Profile Clock Divider Register 0"
|
|
bitfld.long 0x08 24.--25. " CFGDIV ,Configuration Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x08 16.--17. " HPMDIV ,HPM Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x08 8.--9. " TRACEDIV ,Trace Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x08 0.--3. " SYSDIV ,System Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
line.long 0x0c "SYSC_APPCKDIVR1,APPLIED Profile Clock Divider Register 1"
|
|
bitfld.long 0x0c 24.--25. " GFXDIV ,Graphics Clock Division Value" "1,2,4,8"
|
|
bitfld.long 0x0c 16.--17. " PERI4DIV ,Peripheral 4 Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x0c 8.--9. " MEMEDIV ,Memory External Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x0c 0.--2. " EXTBUSDIV ,External Bus Clock Division Value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x10 "SYSC_APPCKDIVR2,APPLIED Profile Clock Divider Register 2"
|
|
bitfld.long 0x10 24.--27. " PERI3DIV ,Peripheral Group 3 Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
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|
bitfld.long 0x10 8.--11. " PERI1DIV ,Peripheral Group 1 Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
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|
bitfld.long 0x10 0.--3. " PERI0DIV ,Peripheral Group 0 Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
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|
line.long 0x14 "SYSC_APPPLLCNTR,APPLIED Profile PLL Control Register"
|
|
hexmask.long.byte 0x14 16.--22. 1. " PLLDIVN ,PLL Multiplication-by-N Value"
|
|
bitfld.long 0x14 8.--11. " PLLDIVM ,PLL Division-by-M Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
bitfld.long 0x14 0.--1. " PLLDIVL ,PLL Input Division Value" "/1,/2,/4,/6"
|
|
line.long 0x18 "SYSC_APPSSCGCNTR0,APPLIED Profile SSCG Control Register 0"
|
|
bitfld.long 0x18 24.--28. " SSCGDIVP ,SSCG PLL Multiplication-by-P Value" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x18 16.--21. " SSCGDIVN ,SSCG PLL Multiplication-by-N Value" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x18 8.--11. " SSCGDIVM ,SSCG PLL Division-by-M Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
bitfld.long 0x18 0.--1. " SSCGDIVL ,SSCG PLL Input Division Value" "/1,/2,/4,/6"
|
|
line.long 0x1c "SYSC_APPSSCGCNTR1,APPLIED Profile SSCG Control Register 1"
|
|
bitfld.long 0x1c 24. " SSCGSSEN ,SSCG PLL Modulation Enable Control" "Disabled,Enabled"
|
|
bitfld.long 0x1c 17.--18. " SSCGFREQ ,Modulation frequency rate for SSCG PLL" "1/1024 * Fin,1/2048 * Fin,1/4096 * Fin,1/4096 * Fin"
|
|
bitfld.long 0x1c 16. " SSCGMODE ,SSCG PLL Modulator Mode" "Down spread,Center spread"
|
|
hexmask.long.word 0x1c 0.--9. 1. " SSCGRATE ,Modulation rate for SSCG PLL for EMI reduction"
|
|
line.long 0x20 "SYSC_APPGFXCNTR0,APPLIED Profile Graphics PLL Control Register 0"
|
|
bitfld.long 0x20 24.--28. " GFXDIVP ,Graphics PLL Division-by-P Value" ",/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31"
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|
bitfld.long 0x20 16.--21. " GFXDIVN ,Graphics PLL Division-by-N Value" ",,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63"
|
|
bitfld.long 0x20 0.--1. " GFXDIVL ,Graphics PLL Input Division Value" "/1,/2,/4,/6"
|
|
line.long 0x24 "SYSC_APPGFXCNTR1,APPLIED Profile Graphics PLL Control Register 1"
|
|
bitfld.long 0x24 24. " GFXSSEN ,GFX PLL Modulation Enable Control" "Disabled,Enabled"
|
|
bitfld.long 0x24 17.--18. " GFXFREQ ,Graphics PLL Modulation Frequency Select" "1/1024 * Fin,1/2048 * Fin,1/4096 * Fin,1/4096 * Fin"
|
|
bitfld.long 0x24 16. " GFXMODE ,Graphics PLL Modulator Mode" "Down spread,Center spread"
|
|
hexmask.long.word 0x24 0.--9. 1. " GFXRATE ,Graphics PLL Modulation Rate Control Value"
|
|
line.long 0x28 "SYSC_APPLVDCFGR,APPLIED Profile Low Voltage Detector Configuration Register"
|
|
bitfld.long 0x28 18.--20. " SV12 ,Reference Voltage Selection for 1.2 V LVD" "0.5V,0.6V,0.8V,0.7V,1.2V,1.1V,0.9V,1.0V"
|
|
bitfld.long 0x28 17. " LVDR12 ,Low Voltage Detector Reset/Interrupt Select for 1.2 V" "Interrupt,Reset"
|
|
bitfld.long 0x28 16. " LVDE12 ,Low Voltage Detector Enable for 1.2V" "Disabled,Enabled"
|
|
bitfld.long 0x28 10.--12. " SV33 ,Reference Voltage Selection for 3.3V LVD" "2.2V,2.4V,2.7V,2.6V,..."
|
|
textline " "
|
|
bitfld.long 0x28 9. " LVDR33 ,Low Voltage Detector Reset/Interrupt Select for 3.3 V" "Interrupt,Reset"
|
|
bitfld.long 0x28 8. " LVDE33 ,Low Voltage Detector Enable for 3.3V" "Disabled,Enabled"
|
|
bitfld.long 0x28 2.--4. " SV50 ,Reference Voltage Selection for 5.0V LVD" "2.2V,2.4V,2.7V,2.6V,4.3V,4.1V,3.7V,3.9V"
|
|
bitfld.long 0x28 1. " LVDR50 ,Low Voltage Detector Reset/Interrupt Select for 5.0 V" "Interrupt,Reset"
|
|
textline " "
|
|
bitfld.long 0x28 0. " LVDE50 ,Low Voltage Detector Enable for 5.0 V" "Disabled,Enabled"
|
|
rgroup.word (0x180+0x30)++0x01
|
|
line.word 0x00 "SYSC_APPCSVCFGR,APPLIED Profile Clock Supervisor Configuration Register"
|
|
bitfld.word 0x00 4. " GPCSVE ,Graphics PLL Clock Supervisor Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " SPCSVE ,SSCG PLL Clock Supervisor Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " MPCSVE ,Main PLL Clock Supervisor Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " SOCSVE ,Sub Oscillator Clock Supervisor Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " MOCSVE ,Main Oscillator Clock Supervisor Enable" "Disabled,Enabled"
|
|
rgroup.word 0x200++0x03 "Profile Status Registers"
|
|
line.word 0x00 "SYSC_PDSTSR,Power Domain Status Register"
|
|
bitfld.word 0x00 3. " PD5ON ,Power Domain 5 Status" "Off,On"
|
|
bitfld.word 0x00 2. " PD4ON ,Power Domain 4 Status" "Off,On"
|
|
bitfld.word 0x00 1. " PD3ON ,Power Domain 3 Status" "Off,On"
|
|
bitfld.word 0x00 0. " PD2ON ,Power Domain 2 Status" "Off,On"
|
|
line.word 0x02 "SYSC_CKSRESTSR,$4 Profile Clock Source Enable Register"
|
|
bitfld.word 0x02 14. " GFXPLLRDY ,GFX PLL oscillation circuit stabilization status" "Not stabilized,Stabilized"
|
|
bitfld.word 0x02 13. " SSCGPLLRDY ,SSCG PLL oscillation circuit stabilization status" "Not stabilized,Stabilized"
|
|
bitfld.word 0x02 12. " MAINPLLRDY ,Main PLL oscillation circuit stabilization status" "Not stabilized,Stabilized"
|
|
bitfld.word 0x02 11. " SUBCLKRDY ,Sub oscillation circuit stabilization status" "Not stabilized,Stabilized"
|
|
textline " "
|
|
bitfld.word 0x02 10. " MAINCLKRDY ,Main Oscillator Ready" "Not ready,Ready"
|
|
bitfld.word 0x02 9. " RCCLKRDY ,RC Oscillator Ready" "Not ready,Ready"
|
|
bitfld.word 0x02 8. " SRCCLKRDY ,Slow RC Oscillator Ready" "Not ready,Ready"
|
|
bitfld.word 0x02 6. " GFXPLLEN ,GFX PLL Enable Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 5. " SSCGPLLEN ,SSCG PLL Enable Status" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " MAINPLLEN ,Main PLL Enable Status" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " SOSCEN ,Sub Oscillator Enable Status" "Disabled,Enabled"
|
|
bitfld.word 0x02 2. " MOSCEN ,Main Oscillator Enable Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 1. " RCOSCEN ,RC Oscillator Enable Status" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " SRCOSCEN ,Slow RC Oscillator Enable Status" "Disabled,Enabled"
|
|
rgroup.long 0x204++0x2b
|
|
line.long 0x00 "SYSC_CKSELSTSR,Clock Select Status Register"
|
|
bitfld.long 0x00 28.--29. " SPICSL ,SPI Clock Select Status for Graphics Subsystem" "SPI,External,Tied low,Tied low"
|
|
bitfld.long 0x00 24.--25. " PIXCSL ,Pixel Clock Select Status for Graphics Subsystem" "GFX bus clk,External clk,GFX PLL clk,Tied low"
|
|
bitfld.long 0x00 12.--14. " PERI3CSL ,Peripheral Group 3 Clock Select Status" "RC clk,Sub oscillator,Main oscilator,Main PLL clk,SSCG PLL clk,Tied low,Tied low,Tied low"
|
|
bitfld.long 0x00 8.--10. " PERI1CSL ,Peripheral Group 1 Clock Select Status" "RC clk,Sub oscillator,Main oscilator,Main PLL clk,SSCG PLL clk,Tied low,Tied low,Tied low"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " PERI0CSL ,Peripheral Group 0 Clock Select Status" "RC clk,Sub oscillator,Main oscilator,Main PLL clk,SSCG PLL clk,Tied low,Tied low,Tied low"
|
|
bitfld.long 0x00 0.--2. " SYSCSL ,System Clock Select Status" "RC clk,Sub oscillator,Main oscilator,Main PLL clk,SSCG PLL clk,Tied low,Tied low,Tied low"
|
|
line.long 0x04 "SYSC_CKESTSR,Clock Enable Status Register"
|
|
bitfld.long 0x04 30. " ENSPIPD5 ,Graphics SPI Clock Status for Power Domain 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " ENPIXPD5 ,Graphics PLL Clock Status for Power Domain 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " ENGFXPD5 ,Graphics Bus Clock Status for Power Domain 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " ENCFGPD4 ,Configuration Clock Status for Power Domain 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " ENEXTBUSPD3 ,External Bus Clock Status for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " ENSPIPD3 ,SPI Clock Status for HSSPI for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " ENMEMEPD3 ,Memory External Clock Status for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " ENHPMPD3 ,HPM Clock Status for Power Domain 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 17. " ENTRACEPD3 ,Trace Clock Status for Power Domain 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " ENSYSPD3 ,System Clock Status for Power Domain 3" "No effect,Enabled"
|
|
bitfld.long 0x04 11. " ENPERI4PD2 ,Peripheral Group 4 Clock Status for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " ENPERI3PD2 ,Peripheral Group 3 Clock Status for Power Domain 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 8. " ENPERI1PD2 ,Peripheral Group 1 Clock Status for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " ENPERI0PD2 ,Peripheral Group 0 Clock Status for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " ENDMAPD2 ,DMA Clock Status for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " ENTRACEPD2 ,Trace Clock Status for Power Domain 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ENHPMPD2 ,HPM Clock Status for Power Domain 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " ENCFGPD1 ,Configuration Clock Status for Power Domain 1" "Disabled,Enabled"
|
|
line.long 0x08 "SYSC_CKDIVSTSR0,Clock Divider Register 0"
|
|
bitfld.long 0x08 24.--25. " CFGDIV ,Configuration Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x08 16.--17. " HPMDIV ,HPM Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x08 8.--9. " TRACEDIV ,Trace Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x08 0.--3. " SYSDIV ,System Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
line.long 0x0c "SYSC_CKDIVSTSR1,Clock Divider Register 1"
|
|
bitfld.long 0x0c 24.--25. " GFXDIV ,Graphics Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x0c 16.--17. " PERI4DIV ,Peripheral 4 Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x0c 8.--9. " MEMEDIV ,Memory External Clock Division Value" "/1,/2,/4,/8"
|
|
bitfld.long 0x0c 0.--2. " EXTBUSDIV ,External Bus Clock Division Value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x10 "SYSC_CKDIVSTSR2,Clock Divider Register 2"
|
|
bitfld.long 0x10 24.--27. " PERI3DIV ,Peripheral Group 3 Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
bitfld.long 0x10 8.--11. " PERI1DIV ,Peripheral Group 1 Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
bitfld.long 0x10 0.--3. " PERI0DIV ,Peripheral Group 0 Clock Division Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
line.long 0x14 "SYSC_PLLSTSR,PLL Status Register"
|
|
hexmask.long.byte 0x14 16.--22. 1. " PLLDIVN ,PLL Multiplication-by-N Value"
|
|
bitfld.long 0x14 8.--11. " PLLDIVM ,PLL Division-by-M Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
bitfld.long 0x14 0.--1. " PLLDIVL ,PLL Input Division Value" "/1,/2,/4,/6"
|
|
line.long 0x18 "SYSC_SSCGSTSR0,SSCG PLL Status Register 0"
|
|
bitfld.long 0x18 24.--28. " SSCGDIVP ,SSCG PLL Multiplication-by-P Value" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x18 16.--21. " SSCGDIVN ,SSCG PLL Multiplication-by-N Value" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x18 8.--11. " SSCGDIVM ,SSCG PLL Division-by-M Value" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30"
|
|
bitfld.long 0x18 0.--1. " SSCGDIVL ,SSCG PLL Input Division Value" "/1,/2,/4,/6"
|
|
line.long 0x1c "SYSC_SSCGSTSR1,SSCG PLL Status Register 1"
|
|
bitfld.long 0x1c 24. " SSCGSSEN ,SSCG PLL Modulation Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x1c 17.--18. " SSCGFREQ ,SSCG PLL Modulation Frequency Select" "1/1024 * Fin,1/2048 * Fin,1/4096 * Fin,1/4096 * Fin"
|
|
bitfld.long 0x1c 16. " SSCGMODE ,SSCG PLL Modulator Mode" "Down spread,Center spread"
|
|
hexmask.long.word 0x1c 0.--9. 1. " SSCGRATE ,SSCG PLL Modulation Rate Control Value"
|
|
line.long 0x20 "SYSC_GFXSTSR0,Graphics PLL Status Register 0"
|
|
bitfld.long 0x20 24.--28. " GFXDIVP ,Graphics PLL Division-by-P Value" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x20 16.--21. " GFXDIVN ,Graphics PLL Division-by-N Value" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x20 0.--1. " GFXDIVL ,Graphics PLL Input Division Value" "1,2,4,6"
|
|
line.long 0x24 "SYSC_$2GFXCNTR1,$4 Profile Graphics PLL Control Register 1"
|
|
bitfld.long 0x24 24. " GFXSSEN ,GFX PLL Modulation Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x24 17.--18. " GFXFREQ ,Graphics PLL Modulation Frequency Select" "1/1024,1/2048,1/4096,1/4096"
|
|
bitfld.long 0x24 16. " GFXMODE ,Graphics PLL Modulator Mode" "Down spread,Center spread"
|
|
hexmask.long.word 0x24 0.--9. 1. " GFXRATE ,Graphics PLL Modulation Rate Control Value"
|
|
line.long 0x28 "SYSC_LVDCFGSTSR,LVD Configuration Status Register"
|
|
bitfld.long 0x28 21. " LVDRDY12 ,Low Voltage Detector Ready Status for 1.2V" "Not ready,Ready"
|
|
bitfld.long 0x28 18.--20. " SV12 ,Reference Voltage Selection for 1.2V LVD" "0.5V,0.6V,0.8V,0.7V,1.2V,1.1V,0.9V,1.0V"
|
|
bitfld.long 0x28 17. " LVDR12 ,Low Voltage Detector Reset/Interrupt Select Status for 1.2V" "Interrupt,Reset"
|
|
bitfld.long 0x28 16. " LVDE12 ,Low Voltage Detector Enable for 1.2V" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 13. " LVDRDY33 ,Low Voltage Detector Ready Status for 3.3V" "Not ready,Ready"
|
|
bitfld.long 0x28 10.--12. " SV33 ,Reference Voltage Selection for 3.3V LVD" "2.2V,2.4V,2.7V,2.6V,..."
|
|
bitfld.long 0x28 9. " LVDR33 ,Low Voltage Detector Reset/Interrupt Select Status for 3.3V" "Interrupt,Reset"
|
|
bitfld.long 0x28 8. " LVDE33 ,Low Voltage Detector Enable for 3.3 V" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 5. " LVDRDY50 ,Low Voltage Detector Ready Status for 5.0 V" "Not ready,Ready"
|
|
bitfld.long 0x28 2.--4. " SV50 ,Reference Voltage Selection for 5.0 V LVD" "2.2V,2.4V,2.7V,2.6V,4.3V,4.1V,3.7V,3.9V"
|
|
bitfld.long 0x28 1. " LVDR50 ,Low Voltage Detector Reset/Interrupt Select Status for 5.0V" "Interrupt,Reset"
|
|
bitfld.long 0x28 0. " LVDE50 ,Low Voltage Detector Enable for 5.0 V" "Disabled,Enabled"
|
|
rgroup.word 0x230++0x01
|
|
line.word 0x00 "SYSC_CSVCFGSTS,CSV Configuration Status Register"
|
|
bitfld.word 0x00 4. " GPCSVE ,Graphics PLL Clock Supervisor Status" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " SPCSVE ,SSCG PLL Clock Supervisor Status" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " MPCSVE ,Main PLL Clock Supervisor Status" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " SOCSVE ,Sub Oscillator Clock Supervisor Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " MOCSVE ,Main Oscillator Clock Supervisor Status" "Disabled,Enabled"
|
|
rgroup.long 0x280++0x07 "System Registers"
|
|
line.long 0x00 "SYSC_SYSIDR,System Identification Register"
|
|
line.long 0x04 "SYSC_SYSSTSR,System Status Register"
|
|
bitfld.long 0x04 17. " PSSBUSY ,PSS Profile Applying Status" "Not applied,Applied"
|
|
bitfld.long 0x04 16. " RUNBUSY ,RUN Profile Applying Status" "Not applied,Applied"
|
|
bitfld.long 0x04 10. " DEVSTAT ,Device State Status" "PSS,RUN"
|
|
bitfld.long 0x04 9. " PSSDN ,PSS Profile Done" "Not applied,Applied"
|
|
textline " "
|
|
bitfld.long 0x04 8. " RUNDN ,RUN Profile Done" "Not applied,Applied"
|
|
bitfld.long 0x04 2. " IPPAPSS ,Invalid PSS Profile for PSS Switching" "Valid,Not valid"
|
|
bitfld.long 0x04 1. " IRPAPSS ,Invalid RUN Profile for PSS Switching" "Valid,Not valid"
|
|
bitfld.long 0x04 0. " IRPARUN ,Invalid RUN Profile for Apply RUN" "Valid,Not valid"
|
|
group.long 0x288++0x03
|
|
line.long 0x00 "SYSC_SYSINTER,System Status Interrupt Enable Register"
|
|
bitfld.long 0x00 8. " RUNDNIE ,RUN Profile Applied Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x28c++0x03
|
|
line.long 0x00 "SYSC_SYSICLR,System Status Interrupt Clear Register"
|
|
bitfld.long 0x00 9. " PSSDNICLR ,PSS Profile Applied Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " RUNDNICLR ,RUN Profile Applied Interrupt Clear" "No effect,Clear"
|
|
rgroup.long 0x290++0x03
|
|
line.long 0x00 "SYSC_SYSERRR,System Error Register"
|
|
bitfld.long 0x00 26. " LVD12IF ,Low Voltage Detect for 1.2 V Interrupt Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 25. " LVD33IF ,Low Voltage Detect for 3.3 V Interrupt Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " LVD50IF ,Low Voltage Detect for 5.0 V Interrupt Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 21. " PSSENEIF ,PSS Profile Enable Error Interrupt Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 20. " RUNTRGEIF ,RUN Profile Trigger Error Interrupt Flag" "No error,Error"
|
|
bitfld.long 0x00 16. " TRGERRIF ,Trigger Error Interrupt Flag" "No error,Error"
|
|
bitfld.long 0x00 12. " GPMISS ,Graphics PLL Clock Missing Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 11. " SPMISS ,SSCG PLL Clock Missing Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPMISS ,Main PLL Clock Missing Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 9. " SOMISS ,Sub Oscillator Clock Missing Interrupt Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " MOMISS ,Main Oscillator Clock Missing Interrupt Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " PSSERRIF ,PSS Profile Error Interrupt Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RUNWKERRIF ,RUN Profile Error for Wakeup Interrupt Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " RUNERRIF ,RUN Profile Error Interrupt Flag" "Not detected,Detected"
|
|
wgroup.long 0x294++0x03
|
|
line.long 0x00 "SYSC_SYSERRICLR,System Error Interrupt Clear Register"
|
|
bitfld.long 0x00 26. " LVD12ICLR ,Low Voltage Detect for 1.2 V Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 25. " LVD33ICLR ,Low Voltage Detect for 3.3 V Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " LVD50ICLR ,Low Voltage Detect for 5.0 V Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " PSSENEICLR ,PSS Profile Enable Error Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 20. " RUNTRGEICLR ,RUN Profile Trigger Error Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " TRGERRICLR ,Trigger Error Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " GPMISSCLR ,Graphics PLL Clock Missing Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " SPMISSCLR ,SSCG PLL Clock Missing Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPMISSCLR ,Main PLL Clock Missing Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " SOMISSCLR ,Sub Oscillator Clock Missing Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " MOMISSCLR ,Main Oscillator Clock Missing Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSSERRICLR ,PSS Profile Error Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RUNWKERRICLR ,RUN Profile Error for Wakeup Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " RUNERRICLR ,RUN Profile Error Interrupt Clear" "No effect,Clear"
|
|
group.long 0x300++0x17 "Clock Supervisor Configuration Registers"
|
|
line.long 0x00 "SYSC_CSVMOCFGR,Clock Supervisor Configuration for Main Clock Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " UPTHR ,Upper Threshold Value"
|
|
hexmask.long.byte 0x00 8.--15. 1. " LOWTHR ,Lower Threshold Value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REFCLKWND ,Reference Clock Window Value"
|
|
line.long 0x04 "SYSC_CSVSOCFGR,Clock Supervisor Configuration for Sub Clock Register"
|
|
hexmask.long.byte 0x04 16.--23. 1. " UPTHR ,Upper Threshold Value"
|
|
hexmask.long.byte 0x04 8.--15. 1. " LOWTHR ,Lower Threshold Value"
|
|
hexmask.long.byte 0x04 0.--7. 1. " REFCLKWND ,Reference Clock Window Value"
|
|
line.long 0x08 "SYSC_CSVMPCFGR,Clock Supervisor Configuration for Main PLL Clock Register"
|
|
hexmask.long.byte 0x08 16.--23. 1. " UPTHR ,Upper Threshold Value"
|
|
hexmask.long.byte 0x08 8.--15. 1. " LOWTHR ,Lower Threshold Value"
|
|
hexmask.long.byte 0x08 0.--7. 1. " REFCLKWND ,Reference Clock Window Value"
|
|
line.long 0x0c "SYSC_CSVSPCFGR,Clock Supervisor Configuration for SSCG-PLL Clock Register"
|
|
hexmask.long.byte 0x0c 16.--23. 1. " UPTHR ,Upper Threshold Value"
|
|
hexmask.long.byte 0x0c 8.--15. 1. " LOWTHR ,Lower Threshold Value"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " REFCLKWND ,Reference Clock Window Value"
|
|
line.long 0x10 "SYSC_CSVGPCFGR,Clock Supervisor Configuration for Graphics PLL Clock Register"
|
|
hexmask.long.byte 0x10 16.--23. 1. " UPTHR ,Upper Threshold Value"
|
|
hexmask.long.byte 0x10 8.--15. 1. " LOWTHR ,Lower Threshold Value"
|
|
hexmask.long.byte 0x10 0.--7. 1. " REFCLKWND ,Reference Clock Window Value"
|
|
line.long 0x14 "SYSC_CSVTESTR,Clock Supervisor Test Register"
|
|
bitfld.long 0x14 4. " GPCLKGATE ,GFX PLL Clock Gate for CSV Test" "Disabled,Enabled"
|
|
bitfld.long 0x14 3. " SPCLKGATE ,SSCG PLL Clock Gate for CSV Test" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " MPCLKGATE ,Main PLL Clock Gate for CSV Test" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " SOCLKGATE ,Sub Oscillator Clock Gate for CSV Test" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " MOCLKGATE ,Main Oscillator Clock Gate for CSV Test" "Disabled,Enabled"
|
|
wgroup.long 0x380++0x03 "Reset Control Registers"
|
|
line.long 0x00 "SYSC_RSTCNTR,Reset Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DBGR ,Debug Reset"
|
|
hexmask.long.byte 0x00 16.--23. 1. " SWHRST ,Software Triggered Hardware Reset"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SWRST ,Software Reset"
|
|
group.long 0x384++0x07
|
|
line.long 0x00 "SYSC_RSTCAUSEUR,User Reset Cause Register"
|
|
bitfld.long 0x00 28. " PD5R ,Power Domain 5 Reset Status" "No reset,Reset"
|
|
bitfld.long 0x00 27. " PD4R ,Power Domain 4 Reset Status" "No reset,Reset"
|
|
bitfld.long 0x00 26. " PD3R ,Power Domain 3 Reset Status" "No reset,Reset"
|
|
bitfld.long 0x00 25. " PD2R ,Power Domain 2 Reset Status" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 24. " FAKEPDR ,Fake Power Down Reset Status" "No reset,Reset"
|
|
bitfld.long 0x00 16. " SWR ,Software Reset Status" "No reset,Reset"
|
|
bitfld.long 0x00 9. " CSVRGP ,Graphics PLL Clock Supervisor Reset Status" "No reset,Reset"
|
|
bitfld.long 0x00 8. " CSVRSP ,SSCG PLL Clock Supervisor Reset Status" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CSVRMP ,Main PLL Supervisor Reset Status" "No reset,Reset"
|
|
bitfld.long 0x00 6. " CSVRSC ,Sub Clock Supervisor Reset Status" "No reset,Reset"
|
|
bitfld.long 0x00 5. " CSVRMC ,Main Clock Supervisor Reset Status" "No reset,Reset"
|
|
bitfld.long 0x00 4. " WDR ,Watchdog Reset Status" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PRFERR ,Profile Error Reset Status" "No reset,Reset"
|
|
bitfld.long 0x00 2. " SWHRST ,Software Triggered Hardware Reset Status" "No reset,Reset"
|
|
bitfld.long 0x00 1. " RSTX ,External Reset Status" "No reset,Reset"
|
|
bitfld.long 0x00 0. " PRSTX ,Power ON Reset Status" "No reset,Reset"
|
|
line.long 0x04 "SYSC_RSTCAUSEBT,BootROM Reset Cause Register"
|
|
bitfld.long 0x04 28. " PD5R ,Power Domain 5 Reset Status" "No reset,Reset"
|
|
bitfld.long 0x04 27. " PD4R ,Power Domain 4 Reset Status" "No reset,Reset"
|
|
bitfld.long 0x04 26. " PD3R ,Power Domain 3 Reset Status" "No reset,Reset"
|
|
bitfld.long 0x04 25. " PD2R ,Power Domain 2 Reset Status" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 24. " FAKEPDR ,Fake Power Down Reset Status" "No reset,Reset"
|
|
bitfld.long 0x04 16. " SWR ,Software Reset Status" "No reset,Reset"
|
|
bitfld.long 0x04 9. " CSVRGP ,Graphics PLL Clock Supervisor Reset Status" "No reset,Reset"
|
|
bitfld.long 0x04 8. " CSVRSP ,SSCG PLL Clock Supervisor Reset Status" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 7. " CSVRMP ,Main PLL Supervisor Reset Status" "No reset,Reset"
|
|
bitfld.long 0x04 6. " CSVRSC ,Sub Clock Supervisor Reset Status" "No reset,Reset"
|
|
bitfld.long 0x04 5. " CSVRMC ,Main Clock Supervisor Reset Status" "No reset,Reset"
|
|
bitfld.long 0x04 4. " WDR ,Watchdog Reset Status" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PRFERR ,Profile Error Reset Status" "No reset,Reset"
|
|
bitfld.long 0x04 2. " SWHRST ,Software Triggered Hardware Reset Status" "No reset,Reset"
|
|
bitfld.long 0x04 1. " RSTX ,External Reset Status" "No reset,Reset"
|
|
bitfld.long 0x04 0. " PRSTX ,Power ON Reset Status" "No reset,Reset"
|
|
wgroup.long 0x400++0x03 "Slow RC Source Clock Timer Control Registers"
|
|
line.long 0x00 "SYSC_SRCSCTTRG,Slow RC SCT Trigger Register"
|
|
bitfld.long 0x00 0. " CGCPT ,Timer Configuration Capture Enable" "No effect,Enabled"
|
|
group.long (0x400+0x04)++0x07
|
|
line.long 0x00 "SYSC_SRCSCTCNTR,Slow RC SCT Control Register"
|
|
bitfld.long 0x00 1. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MODE ,Mode Control" "Single shot,Continuous"
|
|
line.long 0x04 "SYSC_SRCSCTCPR,Slow RC SCT Compare Prescaler Register"
|
|
bitfld.long 0x04 16.--19. " PSCL ,Prescale Control Value" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768"
|
|
hexmask.long.word 0x04 0.--15. 1. " CMPR ,Timer Compare Value"
|
|
rgroup.long (0x400+0x0c)++0x03
|
|
line.long 0x00 "SYSC_SRCSCTSTATR,Slow RC SCT Status Register"
|
|
bitfld.long 0x00 2. " BUSY ,Configuration Update Status" "Not busy,Busy"
|
|
bitfld.long 0x00 1. " TRSTS ,Source Clock Timer Status" "Not active,Active"
|
|
bitfld.long 0x00 0. " INTF ,Interrupt Status Flag" "No interrupt,Interrupt"
|
|
group.long (0x400+0x10)++0x03
|
|
line.long 0x00 "SYSC_SRCSCTINTER,Slow RC SCT Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long (0x400+0x14)++0x03
|
|
line.long 0x00 "SYSC_SRCSCTICLR,Slow RC SCT Interrupt Clear Register"
|
|
bitfld.long 0x00 0. " INTC ,Interrupt Request Clear" "No effect,Clear"
|
|
wgroup.long 0x480++0x03 "RC Source Clock Timer Control Registers"
|
|
line.long 0x00 "SYSC_RCSCTTRG,RC SCT Trigger Register"
|
|
bitfld.long 0x00 0. " CGCPT ,Timer Configuration Capture Enable" "No effect,Enabled"
|
|
group.long (0x480+0x04)++0x07
|
|
line.long 0x00 "SYSC_RCSCTCNTR,RC SCT Control Register"
|
|
bitfld.long 0x00 1. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MODE ,Mode Control" "Single shot,Continuous"
|
|
line.long 0x04 "SYSC_RCSCTCPR,RC SCT Compare Prescaler Register"
|
|
bitfld.long 0x04 16.--19. " PSCL ,Prescale Control Value" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768"
|
|
hexmask.long.word 0x04 0.--15. 1. " CMPR ,Timer Compare Value"
|
|
rgroup.long (0x480+0x0c)++0x03
|
|
line.long 0x00 "SYSC_RCSCTSTATR,RC SCT Status Register"
|
|
bitfld.long 0x00 2. " BUSY ,Configuration Update Status" "Not busy,Busy"
|
|
bitfld.long 0x00 1. " TRSTS ,Source Clock Timer Status" "Not active,Active"
|
|
bitfld.long 0x00 0. " INTF ,Interrupt Status Flag" "No interrupt,Interrupt"
|
|
group.long (0x480+0x10)++0x03
|
|
line.long 0x00 "SYSC_RCSCTINTER,RC SCT Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long (0x480+0x14)++0x03
|
|
line.long 0x00 "SYSC_RCSCTICLR,RC SCT Interrupt Clear Register"
|
|
bitfld.long 0x00 0. " INTC ,Interrupt Request Clear" "No effect,Clear"
|
|
wgroup.long 0x500++0x03 "Main Source Clock Timer Control Registers"
|
|
line.long 0x00 "SYSC_MAINSCTTRG,Main SCT Trigger Register"
|
|
bitfld.long 0x00 0. " CGCPT ,Timer Configuration Capture Enable" "No effect,Enabled"
|
|
group.long (0x500+0x04)++0x07
|
|
line.long 0x00 "SYSC_MAINSCTCNTR,Main SCT Control Register"
|
|
bitfld.long 0x00 1. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MODE ,Mode Control" "Single shot,Continuous"
|
|
line.long 0x04 "SYSC_MAINSCTCPR,Main SCT Compare Prescaler Register"
|
|
bitfld.long 0x04 16.--19. " PSCL ,Prescale Control Value" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768"
|
|
hexmask.long.word 0x04 0.--15. 1. " CMPR ,Timer Compare Value"
|
|
rgroup.long (0x500+0x0c)++0x03
|
|
line.long 0x00 "SYSC_MAINSCTSTATR,Main SCT Status Register"
|
|
bitfld.long 0x00 2. " BUSY ,Configuration Update Status" "Not busy,Busy"
|
|
bitfld.long 0x00 1. " TRSTS ,Source Clock Timer Status" "Not active,Active"
|
|
bitfld.long 0x00 0. " INTF ,Interrupt Status Flag" "No interrupt,Interrupt"
|
|
group.long (0x500+0x10)++0x03
|
|
line.long 0x00 "SYSC_MAINSCTINTER,Main SCT Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long (0x500+0x14)++0x03
|
|
line.long 0x00 "SYSC_MAINSCTICLR,Main SCT Interrupt Clear Register"
|
|
bitfld.long 0x00 0. " INTC ,Interrupt Request Clear" "No effect,Clear"
|
|
wgroup.long 0x580++0x03 "Sub Source Clock Timer Control Registers"
|
|
line.long 0x00 "SYSC_SUBSCTTRG,Sub SCT Trigger Register"
|
|
bitfld.long 0x00 0. " CGCPT ,Timer Configuration Capture Enable" "No effect,Enabled"
|
|
group.long (0x580+0x04)++0x07
|
|
line.long 0x00 "SYSC_SUBSCTCNTR,Sub SCT Control Register"
|
|
bitfld.long 0x00 1. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MODE ,Mode Control" "Single shot,Continuous"
|
|
line.long 0x04 "SYSC_SUBSCTCPR,Sub SCT Compare Prescaler Register"
|
|
bitfld.long 0x04 16.--19. " PSCL ,Prescale Control Value" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768"
|
|
hexmask.long.word 0x04 0.--15. 1. " CMPR ,Timer Compare Value"
|
|
rgroup.long (0x580+0x0c)++0x03
|
|
line.long 0x00 "SYSC_SUBSCTSTATR,Sub SCT Status Register"
|
|
bitfld.long 0x00 2. " BUSY ,Configuration Update Status" "Not busy,Busy"
|
|
bitfld.long 0x00 1. " TRSTS ,Source Clock Timer Status" "Not active,Active"
|
|
bitfld.long 0x00 0. " INTF ,Interrupt Status Flag" "No interrupt,Interrupt"
|
|
group.long (0x580+0x10)++0x03
|
|
line.long 0x00 "SYSC_SUBSCTINTER,Sub SCT Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long (0x580+0x14)++0x03
|
|
line.long 0x00 "SYSC_SUBSCTICLR,Sub SCT Interrupt Clear Register"
|
|
bitfld.long 0x00 0. " INTC ,Interrupt Request Clear" "No effect,Clear"
|
|
group.long 0x600++0x03 "Clock Output Function Configuration Registers"
|
|
line.long 0x00 "SYSC_CKOTCFGR,Clock Output Function Configuration Register"
|
|
bitfld.long 0x00 8.--10. " CKOUTDIV ,Clock Division" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 0.--2. " CKSEL ,Clock Select" "Slow RC,RC,Sub oscillator,Main oscillator,Main PLL,SSCG PLL,GFX PLL,0"
|
|
if ((d.l((ad:0xb0600000+0x680))&0x1000000)==0x1000000)
|
|
group.long 0x680++0x3 "Special Configuration Registers"
|
|
line.long 0x00 "SYSC_SPCCFGR,Special Configuration Register"
|
|
bitfld.long 0x00 24. " HOLDIO ,Hold IO Control" "Not hold,Hold"
|
|
bitfld.long 0x00 23. " PSSPADCTRL ,PSS State Pad Control" "Normal,Tristate"
|
|
bitfld.long 0x00 20.--21. " GPIL ,Global Pin Input Level Select" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.long 0x00 16. " FCIMEN ,Fast Main Clock Input Enable Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PLLINSEL ,PLL Input Clock Select Control" "Main clk,"
|
|
bitfld.long 0x00 10. " GFXSTABS ,Graphics PLL Stabilization Time Select Control" "2^14 CLK_MAIN_G,2^12 CLK_MAIN_G"
|
|
bitfld.long 0x00 9. " SSCGSTABS ,SSCG PLL Stabilization Time Select Control" "2^14 CLK_MAIN_G,2^12 CLK_MAIN_G"
|
|
bitfld.long 0x00 8. " PLLSTABS ,PLL Stabilization Time Select Control" "2^14 CLK_MAIN_G,2^12 CLK_MAIN_G"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FAKEPWRCNT ,Fake Power Down Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FASTON ,Fast On Control for Power Controller" "Serial,Parallel"
|
|
else
|
|
group.long 0x680++0x3 "Special Configuration Registers"
|
|
line.long 0x00 "SYSC_SPCCFGR,Special Configuration Register"
|
|
bitfld.long 0x00 24. " HOLDIO ,Hold IO Control" "Not hold,Hold"
|
|
bitfld.long 0x00 20.--21. " GPIL ,Global Pin Input Level Select" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.long 0x00 16. " FCIMEN ,Fast Main Clock Input Enable Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PLLINSEL ,PLL Input Clock Select Control" "Main clk,"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GFXSTABS ,Graphics PLL Stabilization Time Select Control" "2^14 CLK_MAIN_G,2^12 CLK_MAIN_G"
|
|
bitfld.long 0x00 9. " SSCGSTABS ,SSCG PLL Stabilization Time Select Control" "2^14 CLK_MAIN_G,2^12 CLK_MAIN_G"
|
|
bitfld.long 0x00 8. " PLLSTABS ,PLL Stabilization Time Select Control" "2^14 CLK_MAIN_G,2^12 CLK_MAIN_G"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FAKEPWRCNT ,Fake Power Down Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FASTON ,Fast On Control for Power Controller" "Serial,Parallel"
|
|
endif
|
|
group.long 0x684++0x03
|
|
line.long 0x00 "SYSC_RCCFGR,RC Configuration Register"
|
|
bitfld.long 0x00 8. " SFREQ ,RC Clock Frequency Select" "8 MHz,12 MHz"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RCTRM ,RC Oscillator Clock Trim"
|
|
hgroup.long 0x688++0x0b
|
|
hide.long 0x00 "SYSC_TESTR0,Test 0 Register"
|
|
hide.long 0x04 "SYSC_TESTR1,Test 1 Register"
|
|
hide.long 0x08 "SYSC_TESTR2,Test 2 Register"
|
|
rgroup.long 0x700++0x03 "Debugger Registers"
|
|
line.long 0x00 "SYSC_JTAGDETECT,JTAG Detect Register"
|
|
bitfld.long 0x00 0. " DBGCON ,Debugger Connected" "Not connected,Connected"
|
|
group.long 0x704++0x07
|
|
line.long 0x00 "SYSC_JTAGCNFG,JTAG Configuration Register"
|
|
bitfld.long 0x00 0. " DBGDONE ,Debugger Configuration Done" "Not done,Done"
|
|
line.long 0x04 "SYSC_JTAGWAKEUP,JTAG Wakeup Register"
|
|
bitfld.long 0x04 0. " DBGWKEN ,Debugger Wakeup Enable" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "Real Time Clock"
|
|
base ad:0xb0618000
|
|
width 13.
|
|
if (((d.l(ad:0xb0618000))&0x100)==0x0)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RTC_WTCR,Timer Control Register"
|
|
bitfld.long 0x00 15. " UPCAL ,Update Calibration Period Counter" "No update,Update"
|
|
bitfld.long 0x00 12.--14. " SCAL ,Scale Calibrated Value" "No change,Multiply by 2,Multiply by 4,Multiply by 8,Multiply by 16,..."
|
|
bitfld.long 0x00 11. " CCKSEL ,Clock Select for Calibration" "Sub clock,Slow RC clock"
|
|
bitfld.long 0x00 10. " ENUP ,Enable/Disable Calibration Value Update" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MTRG ,Manual Trigger for Calibration" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ACAL ,Automatic Calibration" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " RCKSEL ,Clock Select for RTC" "Main clock,Sub clock,Slow RC clock,"
|
|
bitfld.long 0x00 3. " CSM ,Clock Switching Mode" "Precise,Immediate"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UPDT ,Update" "No update,Update"
|
|
bitfld.long 0x00 1. " OE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ST ,Start/Stop of RTC" "Stopped,Started"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RTC_WTCR,Timer Control Register"
|
|
bitfld.long 0x00 15. " UPCAL ,Update Calibration Period Counter" "No update,Update"
|
|
bitfld.long 0x00 12.--14. " SCAL ,Scale Calibrated Value" "No change,Multiply by 2,Multiply by 4,Multiply by 8,Multiply by 16,..."
|
|
bitfld.long 0x00 11. " CCKSEL ,Clock Select for Calibration" "Sub clock,Slow RC clock"
|
|
bitfld.long 0x00 10. " ENUP ,Enable/Disable Calibration Value Update" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " MTRG ,Manual Trigger for Calibration" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ACAL ,Automatic Calibration" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " RCKSEL ,Clock Select for RTC" "Main clock,Sub clock,Slow RC clock,"
|
|
bitfld.long 0x00 3. " CSM ,Clock Switching Mode" "Precise,Immediate"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UPDT ,Update" "No update,Update"
|
|
bitfld.long 0x00 1. " OE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ST ,Start/Stop of RTC" "Stopped,Started"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RTC_WTSR,Timer Status Register"
|
|
rbitfld.long 0x00 8. " RUNC ,Run Calibration" "Inactive,In progress"
|
|
bitfld.long 0x00 1. " CSF ,Clock Switched Flag" "Not switched,Switched"
|
|
rbitfld.long 0x00 0. " RUN ,Run" "Inactive,Active"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RTC_WINS,Interrupt Status Register"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " CALD_set/clr ,Calibration Done" "Not done,Done"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " CFD_set/clr ,Calibration Failure Detection" "No failure,Failure"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DAY_set/clr ,Day Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " HOUR_set/clr ,Hour Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " MIN_set/clr ,Minute Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SEC_set/clr ,Second Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " SUBSEC_set/clr ,Sub-Second Flag" "No interrupt,Interrupt"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "RTC_WINE,Interrupt Enable Register"
|
|
bitfld.long 0x00 6. " CALDE ,Calibration Done Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CFDE ,Calibration Failure Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DAYE ,Day Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " HOURE ,Hour Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MINE ,Minute Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SECE ,Second Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SUBSECE ,Sub-Second Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "RTC_WINC,Interrupt Clear Register"
|
|
bitfld.long 0x00 6. " CALDC ,Calibration Done Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " CFDC ,Calibration Failure Detection Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " DAYC ,Day Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " HOURC ,Hour Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MINC ,Minute Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SECC ,Second Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " SUBSECC ,Sub-Second Interrupt Clear" "No effect,Clear"
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "RTC_WTBR,Sub-Second Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " WTBR ,Sub-Second Value"
|
|
line.long 0x04 "RTC_WRT,Real Time Register"
|
|
bitfld.long 0x04 16.--20. " WTHR ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x04 8.--13. " WTMR ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x04 0.--5. " WTSR ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "RTC_CNTCAL,Calibration Clock Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CNTCAL ,Calibration Clock Counter"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "RTC_CNTPCAL,Calibration Clock Period Counter Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " CNTPCAL ,Calibration Clock Period"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "RTC_CNTPCAL,Calibration Clock Period Counter Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " CNTPCAL ,Calibration Clock Period"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RTC_DURMW,Calibration Duration Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " DURMW ,Calibration Duration"
|
|
if (((d.l(ad:0xb0618000))&0x100)==0x100)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "RTC_CALTRG,Calibration Trigger Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " CALTRG ,Calibration Trigger"
|
|
else
|
|
hgroup.long 0x28++0x03
|
|
hide.long 0x00 "RTC_CALTRG,Calibration Trigger Register"
|
|
endif
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "RTC_DEBUG,Debug Register"
|
|
bitfld.long 0x00 0. " DBGEN ,Debug Enable for RTC" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "Watchdog Timer"
|
|
base ad:0xb0608000
|
|
width 14.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "WDG_PROT,Watchdog Protection Register"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "WDG_CNT,Watchdog Counter Register"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "WDG_RSTCAUSE,Watchdog Reset Cause Register"
|
|
bitfld.long 0x00 4. " RSTCAUSE4 ,Reset Cause 4" "Cleared,No effect"
|
|
bitfld.long 0x00 3. " RSTCAUSE3 ,Reset Cause 3" "Cleared,No effect"
|
|
bitfld.long 0x00 2. " RSTCAUSE2 ,Reset Cause 2" "Cleared,No effect"
|
|
bitfld.long 0x00 1. " RSTCAUSE1 ,Reset Cause 1" "Cleared,No effect"
|
|
bitfld.long 0x00 0. " RSTCAUSE0 ,Reset Cause 0" "Cleared,No effect"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "WDG_TRG0,Watchdog Trigger 0 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " WDGTRG0 ,Watchdog Trigger 0"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "WDG_TRG1,Watchdog Trigger 1 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " WDGTRG1 ,Watchdog Trigger 1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WDG_INT,Watchdog Interrupt Configuration Register"
|
|
bitfld.long 0x00 17. " NMIEN ,Reset/NMI Configuration" "Reset,NMI"
|
|
bitfld.long 0x00 16. " IRQEN ,Prewarn Interrupt Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 1. " NMIFLAG ,NMI Flag" "No error,Error"
|
|
rbitfld.long 0x00 0. " IRQFLAG ,Prewarn Interrupt Flag" "No error,Error"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "WDG_INTCLR,Watchdog Interrupt Clear Register"
|
|
bitfld.long 0x00 1. " NMICLR ,NMI Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " IRQCLR ,Prewarn Interrupt Clear" "No effect,Clear"
|
|
group.long 0x2c++0x17
|
|
line.long 0x00 "WDG_TRG0CFG,Watchdog Trigger 0 Configuration Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " WDGTRG0CFG ,Watchdog Trigger 0 Configuration"
|
|
line.long 0x04 "WDG_TRG1CFG,Watchdog Trigger 1 Configuration Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " WDGTRG1CFG ,Watchdog Trigger 1 Configuration"
|
|
line.long 0x08 "WDG_RUNLL,Watchdog Lower Limit RUN Register"
|
|
line.long 0x0c "WDG_RUNUL,Watchdog Upper Limit RUN Register"
|
|
line.long 0x10 "WDG_PSSLL,Watchdog Lower Limit PSS Register"
|
|
line.long 0x14 "WDG_PSSUL,Watchdog Upper Limit PSS Register"
|
|
wgroup.long 0x44++0x03
|
|
line.long 0x00 "WDG_RSTDLY,Watchdog Reset Delay Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " WDGRSTDLY ,Delay to Reset/NMI"
|
|
if (((d.l(ad:0xB0608048))&0x1000000)==0x1000000&&((d.l(ad:0xB0608048))&0x2)==0x2)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "WDG_CFG,Watchdog Configuration Register"
|
|
eventfld.long 0x00 24. " LOCK ,Write access to configuration registers" "Not locked,Locked"
|
|
bitfld.long 0x00 16.--20. " OBSSEL ,Observe bits for Watchdog Counter" "1st,2nd,3rd,4th,5th,6th,7th,8th,9th,10th,11th,12th,13th,14th,15th,16th,17th,18th,19th,20th,21st,22nd,23rd,24th,25th,26th,27th,28th,29th,30th,31st,32nd"
|
|
bitfld.long 0x00 8.--9. " CLKSEL ,Clock Selection" "RC clock,Slow RC clock,Sub clock,Main clock"
|
|
bitfld.long 0x00 3. " DEBUGEN ,Debug Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ALLOWSTOPCLK ,Configuration to Stop the Clock" "Not allowed,Allowed"
|
|
bitfld.long 0x00 1. " WDENPSS ,Enable bit for Watchdog Counter in PSS State" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " WDENRUN ,Enable bit for Watchdog Counter in RUN State" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xB0608048))&0x1000000)==0x1000000&&((d.l(ad:0xB0608048))&0x2)==0x0)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "WDG_CFG,Watchdog Configuration Register"
|
|
eventfld.long 0x00 24. " LOCK ,Write access to configuration registers" "Not locked,Locked"
|
|
bitfld.long 0x00 16.--20. " OBSSEL ,Observe bits for Watchdog Counter" "1st,2nd,3rd,4th,5th,6th,7th,8th,9th,10th,11th,12th,13th,14th,15th,16th,17th,18th,19th,20th,21st,22nd,23rd,24th,25th,26th,27th,28th,29th,30th,31st,32nd"
|
|
bitfld.long 0x00 8.--9. " CLKSEL ,Clock Selection" "RC clock,Slow RC clock,Sub clock,Main clock"
|
|
bitfld.long 0x00 3. " DEBUGEN ,Debug Mode" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " ALLOWSTOPCLK ,Configuration to Stop the Clock" "Not allowed,Allowed"
|
|
bitfld.long 0x00 1. " WDENPSS ,Enable bit for Watchdog Counter in PSS State" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " WDENRUN ,Enable bit for Watchdog Counter in RUN State" "Disabled,Enabled"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "WDG_CFG,Watchdog Configuration Register"
|
|
eventfld.long 0x00 24. " LOCK ,Write access to configuration registers" "Not locked,Locked"
|
|
bitfld.long 0x00 16.--20. " OBSSEL ,Observe bits for Watchdog Counter" "1st,2nd,3rd,4th,5th,6th,7th,8th,9th,10th,11th,12th,13th,14th,15th,16th,17th,18th,19th,20th,21st,22nd,23rd,24th,25th,26th,27th,28th,29th,30th,31st,32nd"
|
|
bitfld.long 0x00 8.--9. " CLKSEL ,Clock Selection" "RC clock,Slow RC clock,Sub clock,Main clock"
|
|
bitfld.long 0x00 3. " DEBUGEN ,Debug Mode" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " ALLOWSTOPCLK ,Configuration to Stop the Clock" "Not allowed,Allowed"
|
|
rbitfld.long 0x00 1. " WDENPSS ,Enable bit for Watchdog Counter in PSS State" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " WDENRUN ,Enable bit for Watchdog Counter in RUN State" "Disabled,Enabled"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
tree "Security Checker"
|
|
base ad:0xB050F000
|
|
width 15.
|
|
wgroup.long 0x120++0x1F
|
|
line.long 0x00 "TCFPUSRKEY0,TCFLASH Permission User Key Register 0"
|
|
bitfld.long 0x00 31. " SCCFGTCFPUSRKEY0[31] ,TCFLASH User Permission Key 31" "Primary,Secondary"
|
|
bitfld.long 0x00 30. " [30] ,TCFLASH User Permission Key 30" "Primary,Secondary"
|
|
bitfld.long 0x00 29. " [29] ,TCFLASH User Permission Key 29" "Primary,Secondary"
|
|
bitfld.long 0x00 28. " [28] ,TCFLASH User Permission Key 28" "Primary,Secondary"
|
|
bitfld.long 0x00 27. " [27] ,TCFLASH User Permission Key 27" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,TCFLASH User Permission Key 26" "Primary,Secondary"
|
|
bitfld.long 0x00 25. " [25] ,TCFLASH User Permission Key 25" "Primary,Secondary"
|
|
bitfld.long 0x00 24. " [24] ,TCFLASH User Permission Key 24" "Primary,Secondary"
|
|
bitfld.long 0x00 23. " [23] ,TCFLASH User Permission Key 23" "Primary,Secondary"
|
|
bitfld.long 0x00 22. " [22] ,TCFLASH User Permission Key 22" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,TCFLASH User Permission Key 21" "Primary,Secondary"
|
|
bitfld.long 0x00 20. " [20] ,TCFLASH User Permission Key 20" "Primary,Secondary"
|
|
bitfld.long 0x00 19. " [19] ,TCFLASH User Permission Key 19" "Primary,Secondary"
|
|
bitfld.long 0x00 18. " [18] ,TCFLASH User Permission Key 18" "Primary,Secondary"
|
|
bitfld.long 0x00 17. " [17] ,TCFLASH User Permission Key 17" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,TCFLASH User Permission Key 16" "Primary,Secondary"
|
|
bitfld.long 0x00 15. " [15] ,TCFLASH User Permission Key 15" "Primary,Secondary"
|
|
bitfld.long 0x00 14. " [14] ,TCFLASH User Permission Key 14" "Primary,Secondary"
|
|
bitfld.long 0x00 13. " [13] ,TCFLASH User Permission Key 13" "Primary,Secondary"
|
|
bitfld.long 0x00 12. " [12] ,TCFLASH User Permission Key 12" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,TCFLASH User Permission Key 11" "Primary,Secondary"
|
|
bitfld.long 0x00 10. " [10] ,TCFLASH User Permission Key 10" "Primary,Secondary"
|
|
bitfld.long 0x00 9. " [9] ,TCFLASH User Permission Key 9" "Primary,Secondary"
|
|
bitfld.long 0x00 8. " [8] ,TCFLASH User Permission Key 8" "Primary,Secondary"
|
|
bitfld.long 0x00 7. " [7] ,TCFLASH User Permission Key 7" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,TCFLASH User Permission Key 6" "Primary,Secondary"
|
|
bitfld.long 0x00 5. " [5] ,TCFLASH User Permission Key 5" "Primary,Secondary"
|
|
bitfld.long 0x00 4. " [4] ,TCFLASH User Permission Key 4" "Primary,Secondary"
|
|
bitfld.long 0x00 3. " [3] ,TCFLASH User Permission Key 3" "Primary,Secondary"
|
|
bitfld.long 0x00 2. " [2] ,TCFLASH User Permission Key 2" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,TCFLASH User Permission Key 1" "Primary,Secondary"
|
|
bitfld.long 0x00 0. " [0] ,TCFLASH User Permission Key 0" "Primary,Secondary"
|
|
line.long 0x04 "TCFPUSRKEY1,TCFLASH Permission User Key Register 1"
|
|
bitfld.long 0x04 31. " SCCFGTCFPUSRKEY1[63] ,TCFLASH User Permission Key 63" "Primary,Secondary"
|
|
bitfld.long 0x04 30. " [62] ,TCFLASH User Permission Key 62" "Primary,Secondary"
|
|
bitfld.long 0x04 29. " [61] ,TCFLASH User Permission Key 61" "Primary,Secondary"
|
|
bitfld.long 0x04 28. " [60] ,TCFLASH User Permission Key 60" "Primary,Secondary"
|
|
bitfld.long 0x04 27. " [59] ,TCFLASH User Permission Key 59" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x04 26. " [58] ,TCFLASH User Permission Key 58" "Primary,Secondary"
|
|
bitfld.long 0x04 25. " [57] ,TCFLASH User Permission Key 57" "Primary,Secondary"
|
|
bitfld.long 0x04 24. " [56] ,TCFLASH User Permission Key 56" "Primary,Secondary"
|
|
bitfld.long 0x04 23. " [55] ,TCFLASH User Permission Key 55" "Primary,Secondary"
|
|
bitfld.long 0x04 22. " [54] ,TCFLASH User Permission Key 54" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x04 21. " [53] ,TCFLASH User Permission Key 53" "Primary,Secondary"
|
|
bitfld.long 0x04 20. " [52] ,TCFLASH User Permission Key 52" "Primary,Secondary"
|
|
bitfld.long 0x04 19. " [51] ,TCFLASH User Permission Key 51" "Primary,Secondary"
|
|
bitfld.long 0x04 18. " [50] ,TCFLASH User Permission Key 50" "Primary,Secondary"
|
|
bitfld.long 0x04 17. " [49] ,TCFLASH User Permission Key 49" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x04 16. " [48] ,TCFLASH User Permission Key 48" "Primary,Secondary"
|
|
bitfld.long 0x04 15. " [47] ,TCFLASH User Permission Key 47" "Primary,Secondary"
|
|
bitfld.long 0x04 14. " [46] ,TCFLASH User Permission Key 46" "Primary,Secondary"
|
|
bitfld.long 0x04 13. " [45] ,TCFLASH User Permission Key 45" "Primary,Secondary"
|
|
bitfld.long 0x04 12. " [44] ,TCFLASH User Permission Key 44" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x04 11. " [43] ,TCFLASH User Permission Key 43" "Primary,Secondary"
|
|
bitfld.long 0x04 10. " [42] ,TCFLASH User Permission Key 42" "Primary,Secondary"
|
|
bitfld.long 0x04 9. " [41] ,TCFLASH User Permission Key 41" "Primary,Secondary"
|
|
bitfld.long 0x04 8. " [40] ,TCFLASH User Permission Key 40" "Primary,Secondary"
|
|
bitfld.long 0x04 7. " [39] ,TCFLASH User Permission Key 39" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x04 6. " [38] ,TCFLASH User Permission Key 38" "Primary,Secondary"
|
|
bitfld.long 0x04 5. " [37] ,TCFLASH User Permission Key 37" "Primary,Secondary"
|
|
bitfld.long 0x04 4. " [36] ,TCFLASH User Permission Key 36" "Primary,Secondary"
|
|
bitfld.long 0x04 3. " [35] ,TCFLASH User Permission Key 35" "Primary,Secondary"
|
|
bitfld.long 0x04 2. " [34] ,TCFLASH User Permission Key 34" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x04 1. " [33] ,TCFLASH User Permission Key 33" "Primary,Secondary"
|
|
bitfld.long 0x04 0. " [32] ,TCFLASH User Permission Key 32" "Primary,Secondary"
|
|
line.long 0x08 "TCFPUSRKEY2,TCFLASH Permission User Key Register 2"
|
|
bitfld.long 0x08 31. " SCCFGTCFPUSRKEY2[95] ,TCFLASH User Permission Key 95" "Primary,Secondary"
|
|
bitfld.long 0x08 30. " [94] ,TCFLASH User Permission Key 94" "Primary,Secondary"
|
|
bitfld.long 0x08 29. " [93] ,TCFLASH User Permission Key 93" "Primary,Secondary"
|
|
bitfld.long 0x08 28. " [92] ,TCFLASH User Permission Key 92" "Primary,Secondary"
|
|
bitfld.long 0x08 27. " [91] ,TCFLASH User Permission Key 91" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x08 26. " [90] ,TCFLASH User Permission Key 90" "Primary,Secondary"
|
|
bitfld.long 0x08 25. " [89] ,TCFLASH User Permission Key 89" "Primary,Secondary"
|
|
bitfld.long 0x08 24. " [88] ,TCFLASH User Permission Key 88" "Primary,Secondary"
|
|
bitfld.long 0x08 23. " [87] ,TCFLASH User Permission Key 87" "Primary,Secondary"
|
|
bitfld.long 0x08 22. " [86] ,TCFLASH User Permission Key 86" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x08 21. " [85] ,TCFLASH User Permission Key 85" "Primary,Secondary"
|
|
bitfld.long 0x08 20. " [84] ,TCFLASH User Permission Key 84" "Primary,Secondary"
|
|
bitfld.long 0x08 19. " [83] ,TCFLASH User Permission Key 83" "Primary,Secondary"
|
|
bitfld.long 0x08 18. " [82] ,TCFLASH User Permission Key 82" "Primary,Secondary"
|
|
bitfld.long 0x08 17. " [81] ,TCFLASH User Permission Key 81" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x08 16. " [80] ,TCFLASH User Permission Key 80" "Primary,Secondary"
|
|
bitfld.long 0x08 15. " [79] ,TCFLASH User Permission Key 79" "Primary,Secondary"
|
|
bitfld.long 0x08 14. " [78] ,TCFLASH User Permission Key 78" "Primary,Secondary"
|
|
bitfld.long 0x08 13. " [77] ,TCFLASH User Permission Key 77" "Primary,Secondary"
|
|
bitfld.long 0x08 12. " [76] ,TCFLASH User Permission Key 76" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x08 11. " [75] ,TCFLASH User Permission Key 75" "Primary,Secondary"
|
|
bitfld.long 0x08 10. " [74] ,TCFLASH User Permission Key 74" "Primary,Secondary"
|
|
bitfld.long 0x08 9. " [73] ,TCFLASH User Permission Key 73" "Primary,Secondary"
|
|
bitfld.long 0x08 8. " [72] ,TCFLASH User Permission Key 72" "Primary,Secondary"
|
|
bitfld.long 0x08 7. " [71] ,TCFLASH User Permission Key 71" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x08 6. " [70] ,TCFLASH User Permission Key 70" "Primary,Secondary"
|
|
bitfld.long 0x08 5. " [69] ,TCFLASH User Permission Key 69" "Primary,Secondary"
|
|
bitfld.long 0x08 4. " [68] ,TCFLASH User Permission Key 68" "Primary,Secondary"
|
|
bitfld.long 0x08 3. " [67] ,TCFLASH User Permission Key 67" "Primary,Secondary"
|
|
bitfld.long 0x08 2. " [66] ,TCFLASH User Permission Key 66" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x08 1. " [65] ,TCFLASH User Permission Key 65" "Primary,Secondary"
|
|
bitfld.long 0x08 0. " [64] ,TCFLASH User Permission Key 64" "Primary,Secondary"
|
|
line.long 0x0C "TCFPUSRKEY3,TCFLASH Permission User Key Register 3"
|
|
bitfld.long 0x0C 31. " SCCFGTCFPUSRKEY3[127] ,TCFLASH User Permission Key 127" "Primary,Secondary"
|
|
bitfld.long 0x0C 30. " [126] ,TCFLASH User Permission Key 126" "Primary,Secondary"
|
|
bitfld.long 0x0C 29. " [125] ,TCFLASH User Permission Key 125" "Primary,Secondary"
|
|
bitfld.long 0x0C 28. " [124] ,TCFLASH User Permission Key 124" "Primary,Secondary"
|
|
bitfld.long 0x0C 27. " [123] ,TCFLASH User Permission Key 123" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x0C 26. " [122] ,TCFLASH User Permission Key 122" "Primary,Secondary"
|
|
bitfld.long 0x0C 25. " [121] ,TCFLASH User Permission Key 121" "Primary,Secondary"
|
|
bitfld.long 0x0C 24. " [120] ,TCFLASH User Permission Key 120" "Primary,Secondary"
|
|
bitfld.long 0x0C 23. " [119] ,TCFLASH User Permission Key 119" "Primary,Secondary"
|
|
bitfld.long 0x0C 22. " [118] ,TCFLASH User Permission Key 118" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x0C 21. " [117] ,TCFLASH User Permission Key 117" "Primary,Secondary"
|
|
bitfld.long 0x0C 20. " [116] ,TCFLASH User Permission Key 116" "Primary,Secondary"
|
|
bitfld.long 0x0C 19. " [115] ,TCFLASH User Permission Key 115" "Primary,Secondary"
|
|
bitfld.long 0x0C 18. " [114] ,TCFLASH User Permission Key 114" "Primary,Secondary"
|
|
bitfld.long 0x0C 17. " [113] ,TCFLASH User Permission Key 113" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " [112] ,TCFLASH User Permission Key 112" "Primary,Secondary"
|
|
bitfld.long 0x0C 15. " [111] ,TCFLASH User Permission Key 111" "Primary,Secondary"
|
|
bitfld.long 0x0C 14. " [110] ,TCFLASH User Permission Key 110" "Primary,Secondary"
|
|
bitfld.long 0x0C 13. " [109] ,TCFLASH User Permission Key 109" "Primary,Secondary"
|
|
bitfld.long 0x0C 12. " [108] ,TCFLASH User Permission Key 108" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " [107] ,TCFLASH User Permission Key 107" "Primary,Secondary"
|
|
bitfld.long 0x0C 10. " [106] ,TCFLASH User Permission Key 106" "Primary,Secondary"
|
|
bitfld.long 0x0C 9. " [105] ,TCFLASH User Permission Key 105" "Primary,Secondary"
|
|
bitfld.long 0x0C 8. " [104] ,TCFLASH User Permission Key 104" "Primary,Secondary"
|
|
bitfld.long 0x0C 7. " [103] ,TCFLASH User Permission Key 103" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x0C 6. " [102] ,TCFLASH User Permission Key 102" "Primary,Secondary"
|
|
bitfld.long 0x0C 5. " [101] ,TCFLASH User Permission Key 101" "Primary,Secondary"
|
|
bitfld.long 0x0C 4. " [100] ,TCFLASH User Permission Key 100" "Primary,Secondary"
|
|
bitfld.long 0x0C 3. " [99] ,TCFLASH User Permission Key 99" "Primary,Secondary"
|
|
bitfld.long 0x0C 2. " [98] ,TCFLASH User Permission Key 98" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " [97] ,TCFLASH User Permission Key 97" "Primary,Secondary"
|
|
bitfld.long 0x0C 0. " [96] ,TCFLASH User Permission Key 96" "Primary,Secondary"
|
|
line.long 0x10 "EEFPUSRKEY0,EEFLASH Permission User Key Register 0"
|
|
bitfld.long 0x10 31. " SCCFGEEFPSYSKEY0[31] ,EEFLASH Nominal Permission Key 31" "Primary,Secondary"
|
|
bitfld.long 0x10 30. " [30] ,EEFLASH Nominal Permission Key 30" "Primary,Secondary"
|
|
bitfld.long 0x10 29. " [29] ,EEFLASH Nominal Permission Key 29" "Primary,Secondary"
|
|
bitfld.long 0x10 28. " [28] ,EEFLASH Nominal Permission Key 28" "Primary,Secondary"
|
|
bitfld.long 0x10 27. " [27] ,EEFLASH Nominal Permission Key 27" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x10 26. " [26] ,EEFLASH Nominal Permission Key 26" "Primary,Secondary"
|
|
bitfld.long 0x10 25. " [25] ,EEFLASH Nominal Permission Key 25" "Primary,Secondary"
|
|
bitfld.long 0x10 24. " [24] ,EEFLASH Nominal Permission Key 24" "Primary,Secondary"
|
|
bitfld.long 0x10 23. " [23] ,EEFLASH Nominal Permission Key 23" "Primary,Secondary"
|
|
bitfld.long 0x10 22. " [22] ,EEFLASH Nominal Permission Key 22" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x10 21. " [21] ,EEFLASH Nominal Permission Key 21" "Primary,Secondary"
|
|
bitfld.long 0x10 20. " [20] ,EEFLASH Nominal Permission Key 20" "Primary,Secondary"
|
|
bitfld.long 0x10 19. " [19] ,EEFLASH Nominal Permission Key 19" "Primary,Secondary"
|
|
bitfld.long 0x10 18. " [18] ,EEFLASH Nominal Permission Key 18" "Primary,Secondary"
|
|
bitfld.long 0x10 17. " [17] ,EEFLASH Nominal Permission Key 17" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x10 16. " [16] ,EEFLASH Nominal Permission Key 16" "Primary,Secondary"
|
|
bitfld.long 0x10 15. " [15] ,EEFLASH Nominal Permission Key 15" "Primary,Secondary"
|
|
bitfld.long 0x10 14. " [14] ,EEFLASH Nominal Permission Key 14" "Primary,Secondary"
|
|
bitfld.long 0x10 13. " [13] ,EEFLASH Nominal Permission Key 13" "Primary,Secondary"
|
|
bitfld.long 0x10 12. " [12] ,EEFLASH Nominal Permission Key 12" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x10 11. " [11] ,EEFLASH Nominal Permission Key 11" "Primary,Secondary"
|
|
bitfld.long 0x10 10. " [10] ,EEFLASH Nominal Permission Key 10" "Primary,Secondary"
|
|
bitfld.long 0x10 9. " [9] ,EEFLASH Nominal Permission Key 9" "Primary,Secondary"
|
|
bitfld.long 0x10 8. " [8] ,EEFLASH Nominal Permission Key 8" "Primary,Secondary"
|
|
bitfld.long 0x10 7. " [7] ,EEFLASH Nominal Permission Key 7" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x10 6. " [6] ,EEFLASH Nominal Permission Key 6" "Primary,Secondary"
|
|
bitfld.long 0x10 5. " [5] ,EEFLASH Nominal Permission Key 5" "Primary,Secondary"
|
|
bitfld.long 0x10 4. " [4] ,EEFLASH Nominal Permission Key 4" "Primary,Secondary"
|
|
bitfld.long 0x10 3. " [3] ,EEFLASH Nominal Permission Key 3" "Primary,Secondary"
|
|
bitfld.long 0x10 2. " [2] ,EEFLASH Nominal Permission Key 2" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x10 1. " [1] ,EEFLASH Nominal Permission Key 1" "Primary,Secondary"
|
|
bitfld.long 0x10 0. " [0] ,EEFLASH Nominal Permission Key 0" "Primary,Secondary"
|
|
line.long 0x14 "EEFPUSRKEY1,EEFLASH Permission User Key Register 1"
|
|
bitfld.long 0x14 31. " SCCFGEEFPSYSKEY1[63] ,EEFLASH Nominal Permission Key 63" "Primary,Secondary"
|
|
bitfld.long 0x14 30. " [62] ,EEFLASH Nominal Permission Key 62" "Primary,Secondary"
|
|
bitfld.long 0x14 29. " [61] ,EEFLASH Nominal Permission Key 61" "Primary,Secondary"
|
|
bitfld.long 0x14 28. " [60] ,EEFLASH Nominal Permission Key 60" "Primary,Secondary"
|
|
bitfld.long 0x14 27. " [59] ,EEFLASH Nominal Permission Key 59" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x14 26. " [58] ,EEFLASH Nominal Permission Key 58" "Primary,Secondary"
|
|
bitfld.long 0x14 25. " [57] ,EEFLASH Nominal Permission Key 57" "Primary,Secondary"
|
|
bitfld.long 0x14 24. " [56] ,EEFLASH Nominal Permission Key 56" "Primary,Secondary"
|
|
bitfld.long 0x14 23. " [55] ,EEFLASH Nominal Permission Key 55" "Primary,Secondary"
|
|
bitfld.long 0x14 22. " [54] ,EEFLASH Nominal Permission Key 54" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x14 21. " [53] ,EEFLASH Nominal Permission Key 53" "Primary,Secondary"
|
|
bitfld.long 0x14 20. " [52] ,EEFLASH Nominal Permission Key 52" "Primary,Secondary"
|
|
bitfld.long 0x14 19. " [51] ,EEFLASH Nominal Permission Key 51" "Primary,Secondary"
|
|
bitfld.long 0x14 18. " [50] ,EEFLASH Nominal Permission Key 50" "Primary,Secondary"
|
|
bitfld.long 0x14 17. " [49] ,EEFLASH Nominal Permission Key 49" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x14 16. " [48] ,EEFLASH Nominal Permission Key 48" "Primary,Secondary"
|
|
bitfld.long 0x14 15. " [47] ,EEFLASH Nominal Permission Key 47" "Primary,Secondary"
|
|
bitfld.long 0x14 14. " [46] ,EEFLASH Nominal Permission Key 46" "Primary,Secondary"
|
|
bitfld.long 0x14 13. " [45] ,EEFLASH Nominal Permission Key 45" "Primary,Secondary"
|
|
bitfld.long 0x14 12. " [44] ,EEFLASH Nominal Permission Key 44" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x14 11. " [43] ,EEFLASH Nominal Permission Key 43" "Primary,Secondary"
|
|
bitfld.long 0x14 10. " [42] ,EEFLASH Nominal Permission Key 42" "Primary,Secondary"
|
|
bitfld.long 0x14 9. " [41] ,EEFLASH Nominal Permission Key 41" "Primary,Secondary"
|
|
bitfld.long 0x14 8. " [40] ,EEFLASH Nominal Permission Key 40" "Primary,Secondary"
|
|
bitfld.long 0x14 7. " [39] ,EEFLASH Nominal Permission Key 39" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x14 6. " [38] ,EEFLASH Nominal Permission Key 38" "Primary,Secondary"
|
|
bitfld.long 0x14 5. " [37] ,EEFLASH Nominal Permission Key 37" "Primary,Secondary"
|
|
bitfld.long 0x14 4. " [36] ,EEFLASH Nominal Permission Key 36" "Primary,Secondary"
|
|
bitfld.long 0x14 3. " [35] ,EEFLASH Nominal Permission Key 35" "Primary,Secondary"
|
|
bitfld.long 0x14 2. " [34] ,EEFLASH Nominal Permission Key 34" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x14 1. " [33] ,EEFLASH Nominal Permission Key 33" "Primary,Secondary"
|
|
bitfld.long 0x14 0. " [32] ,EEFLASH Nominal Permission Key 32" "Primary,Secondary"
|
|
line.long 0x18 "EEFPUSRKEY2,EEFLASH Permission User Key Register 2"
|
|
bitfld.long 0x18 31. " SCCFGEEFPSYSKEY2[95] ,EEFLASH Nominal Permission Key 95" "Primary,Secondary"
|
|
bitfld.long 0x18 30. " [94] ,EEFLASH Nominal Permission Key 94" "Primary,Secondary"
|
|
bitfld.long 0x18 29. " [93] ,EEFLASH Nominal Permission Key 93" "Primary,Secondary"
|
|
bitfld.long 0x18 28. " [92] ,EEFLASH Nominal Permission Key 92" "Primary,Secondary"
|
|
bitfld.long 0x18 27. " [91] ,EEFLASH Nominal Permission Key 91" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x18 26. " [90] ,EEFLASH Nominal Permission Key 90" "Primary,Secondary"
|
|
bitfld.long 0x18 25. " [89] ,EEFLASH Nominal Permission Key 89" "Primary,Secondary"
|
|
bitfld.long 0x18 24. " [88] ,EEFLASH Nominal Permission Key 88" "Primary,Secondary"
|
|
bitfld.long 0x18 23. " [87] ,EEFLASH Nominal Permission Key 87" "Primary,Secondary"
|
|
bitfld.long 0x18 22. " [86] ,EEFLASH Nominal Permission Key 86" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x18 21. " [85] ,EEFLASH Nominal Permission Key 85" "Primary,Secondary"
|
|
bitfld.long 0x18 20. " [84] ,EEFLASH Nominal Permission Key 84" "Primary,Secondary"
|
|
bitfld.long 0x18 19. " [83] ,EEFLASH Nominal Permission Key 83" "Primary,Secondary"
|
|
bitfld.long 0x18 18. " [82] ,EEFLASH Nominal Permission Key 82" "Primary,Secondary"
|
|
bitfld.long 0x18 17. " [81] ,EEFLASH Nominal Permission Key 81" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x18 16. " [80] ,EEFLASH Nominal Permission Key 80" "Primary,Secondary"
|
|
bitfld.long 0x18 15. " [79] ,EEFLASH Nominal Permission Key 79" "Primary,Secondary"
|
|
bitfld.long 0x18 14. " [78] ,EEFLASH Nominal Permission Key 78" "Primary,Secondary"
|
|
bitfld.long 0x18 13. " [77] ,EEFLASH Nominal Permission Key 77" "Primary,Secondary"
|
|
bitfld.long 0x18 12. " [76] ,EEFLASH Nominal Permission Key 76" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x18 11. " [75] ,EEFLASH Nominal Permission Key 75" "Primary,Secondary"
|
|
bitfld.long 0x18 10. " [74] ,EEFLASH Nominal Permission Key 74" "Primary,Secondary"
|
|
bitfld.long 0x18 9. " [73] ,EEFLASH Nominal Permission Key 73" "Primary,Secondary"
|
|
bitfld.long 0x18 8. " [72] ,EEFLASH Nominal Permission Key 72" "Primary,Secondary"
|
|
bitfld.long 0x18 7. " [71] ,EEFLASH Nominal Permission Key 71" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x18 6. " [70] ,EEFLASH Nominal Permission Key 70" "Primary,Secondary"
|
|
bitfld.long 0x18 5. " [69] ,EEFLASH Nominal Permission Key 69" "Primary,Secondary"
|
|
bitfld.long 0x18 4. " [68] ,EEFLASH Nominal Permission Key 68" "Primary,Secondary"
|
|
bitfld.long 0x18 3. " [67] ,EEFLASH Nominal Permission Key 67" "Primary,Secondary"
|
|
bitfld.long 0x18 2. " [66] ,EEFLASH Nominal Permission Key 66" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x18 1. " [65] ,EEFLASH Nominal Permission Key 65" "Primary,Secondary"
|
|
bitfld.long 0x18 0. " [64] ,EEFLASH Nominal Permission Key 64" "Primary,Secondary"
|
|
line.long 0x1C "EEFPUSRKEY3,EEFLASH Permission User Key Register 3"
|
|
bitfld.long 0x1C 31. " SCCFGEEFPSYSKEY3[127] ,EEFLASH Nominal Permission Key 127" "Primary,Secondary"
|
|
bitfld.long 0x1C 30. " [126] ,EEFLASH Nominal Permission Key 126" "Primary,Secondary"
|
|
bitfld.long 0x1C 29. " [125] ,EEFLASH Nominal Permission Key 125" "Primary,Secondary"
|
|
bitfld.long 0x1C 28. " [124] ,EEFLASH Nominal Permission Key 124" "Primary,Secondary"
|
|
bitfld.long 0x1C 27. " [123] ,EEFLASH Nominal Permission Key 123" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x1C 26. " [122] ,EEFLASH Nominal Permission Key 122" "Primary,Secondary"
|
|
bitfld.long 0x1C 25. " [121] ,EEFLASH Nominal Permission Key 121" "Primary,Secondary"
|
|
bitfld.long 0x1C 24. " [120] ,EEFLASH Nominal Permission Key 120" "Primary,Secondary"
|
|
bitfld.long 0x1C 23. " [119] ,EEFLASH Nominal Permission Key 119" "Primary,Secondary"
|
|
bitfld.long 0x1C 22. " [118] ,EEFLASH Nominal Permission Key 118" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x1C 21. " [117] ,EEFLASH Nominal Permission Key 117" "Primary,Secondary"
|
|
bitfld.long 0x1C 20. " [116] ,EEFLASH Nominal Permission Key 116" "Primary,Secondary"
|
|
bitfld.long 0x1C 19. " [115] ,EEFLASH Nominal Permission Key 115" "Primary,Secondary"
|
|
bitfld.long 0x1C 18. " [114] ,EEFLASH Nominal Permission Key 114" "Primary,Secondary"
|
|
bitfld.long 0x1C 17. " [113] ,EEFLASH Nominal Permission Key 113" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " [112] ,EEFLASH Nominal Permission Key 112" "Primary,Secondary"
|
|
bitfld.long 0x1C 15. " [111] ,EEFLASH Nominal Permission Key 111" "Primary,Secondary"
|
|
bitfld.long 0x1C 14. " [110] ,EEFLASH Nominal Permission Key 110" "Primary,Secondary"
|
|
bitfld.long 0x1C 13. " [109] ,EEFLASH Nominal Permission Key 109" "Primary,Secondary"
|
|
bitfld.long 0x1C 12. " [108] ,EEFLASH Nominal Permission Key 108" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x1C 11. " [107] ,EEFLASH Nominal Permission Key 107" "Primary,Secondary"
|
|
bitfld.long 0x1C 10. " [106] ,EEFLASH Nominal Permission Key 106" "Primary,Secondary"
|
|
bitfld.long 0x1C 9. " [105] ,EEFLASH Nominal Permission Key 105" "Primary,Secondary"
|
|
bitfld.long 0x1C 8. " [104] ,EEFLASH Nominal Permission Key 104" "Primary,Secondary"
|
|
bitfld.long 0x1C 7. " [103] ,EEFLASH Nominal Permission Key 103" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x1C 6. " [102] ,EEFLASH Nominal Permission Key 102" "Primary,Secondary"
|
|
bitfld.long 0x1C 5. " [101] ,EEFLASH Nominal Permission Key 101" "Primary,Secondary"
|
|
bitfld.long 0x1C 4. " [100] ,EEFLASH Nominal Permission Key 100" "Primary,Secondary"
|
|
bitfld.long 0x1C 3. " [99] ,EEFLASH Nominal Permission Key 99" "Primary,Secondary"
|
|
bitfld.long 0x1C 2. " [98] ,EEFLASH Nominal Permission Key 98" "Primary,Secondary"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " [97] ,EEFLASH Nominal Permission Key 97" "Primary,Secondary"
|
|
bitfld.long 0x1C 0. " [96] ,EEFLASH Nominal Permission Key 96" "Primary,Secondary"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "SCCFG_CTRL,Security Control Register"
|
|
bitfld.long 0x00 0. " JTAGSWEN ,JTAG access by the software" "Disabled,Enabled"
|
|
rgroup.long 0x174++0x0B
|
|
line.long 0x00 "SCCFG_STAT0,Security Status Register 0"
|
|
bitfld.long 0x00 24. " EEFLNKOK ,Status of EEFLASH link key comparison" "Accesses denied,Accesses allowed"
|
|
bitfld.long 0x00 17. " TCFLNKOK[1] ,Status of link key comparison for TCFLASH macro 1" "Accesses denied,Accesses allowed"
|
|
bitfld.long 0x00 16. " TCFLNKOK[0] ,Status of link key comparison for TCFLASH macro 0" "Accesses denied,Accesses allowed"
|
|
bitfld.long 0x00 10. " EEFPSLOCK ,Indicates whether EEFLASH permission key entry is locked or not" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " EEFPS ,Indicates which permission set is active for EEFLASH" "Zero,One"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EEFPEN ,EEFLASH Permission Set Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TCFPSLOCK ,TCFLASH Permission Key Lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " TCFPS ,Indicates which permission set is active for TCFLASH" "Zero,One"
|
|
bitfld.long 0x00 0. " TCFPEN ,TCFLASH Permission Sets Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SCCFG_STAT1,Security Status Register 1"
|
|
bitfld.long 0x04 24. " CFGLOCK ,Configuration Register Lock" "Not locked,Locked"
|
|
bitfld.long 0x04 5. " EEFCEEN ,EEFLASH Chip Erase Enable" "Not locked,Locked"
|
|
bitfld.long 0x04 4. " TCFCEEN ,TCFLASH Chip Erase Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " FPPEN ,Flash Parallel Programming Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " JTAGSWEN ,Indicates whether software enabling of JTAG access is allowed or not" "Not allowed,Allowed"
|
|
bitfld.long 0x04 0. " JTAGEN ,JTAG access Enable" "Disabled,Enabled"
|
|
line.long 0x08 "SCCFG_STAT2,Security Status Register 2"
|
|
bitfld.long 0x08 8. " DBGRDY ,Debug Ready bit" "Not ready,Ready"
|
|
bitfld.long 0x08 2. " SEC ,Indicates whether security key can be entered or not for security enabled device" "Disallowed,Allowed"
|
|
bitfld.long 0x08 1. " SECLOCK ,Indicates whether valid security key is entered or not" "Not valid,Valid"
|
|
bitfld.long 0x08 0. " SECEN ,Security Enable bit" "Disabled,Enabled"
|
|
wgroup.long 0x190++0x0F
|
|
line.long 0x00 "SCCFG_SECKEY0,Security Key Register 0"
|
|
line.long 0x04 "SCCFG_SECKEY1,Security Key Register 1"
|
|
line.long 0x08 "SCCFG_SECKEY2,Security Key Register 2"
|
|
line.long 0x0C "SCCFG_SECKEY3,Security Key Register 3"
|
|
rgroup.long 0x1A0++0x03
|
|
line.long 0x00 "SCCFG_MODID,Module ID Register"
|
|
wgroup.long 0x1A4++0x03
|
|
line.long 0x00 "SCCFG_UNLCK,Security Checker Unlock Register"
|
|
group.long 0x1A8++0x07
|
|
line.long 0x00 "SCCFG_GPREG0,General Purpose Register 0"
|
|
line.long 0x04 "SCCFG_GPREG1,General Purpose Register 1"
|
|
width 12.
|
|
tree.end
|
|
tree.open "Memory protection units for AXI"
|
|
tree "DMA0"
|
|
base ad:0xB0C08000
|
|
width 17.
|
|
if (((d.l(ad:0xB0C08000))&0x1000)==0x1000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL0,MPU AXI Control Register"
|
|
bitfld.long 0x00 24.--26. " AP ,Access Permissions for Background Region" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 17. " MPUENC ,MPU AXI Enable Control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16. " MPUEN ,MPU AXI Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PROT ,Privilege Attribute" "Non-privilege,Privilege"
|
|
bitfld.long 0x00 11. " POEN ,Privileged Mode Overwrite Feature Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " MPUSTOPEN ,MPU STOP Feature" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " MPUSTOP ,MPU STOP Status" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " LST ,MPU Lock Status" "Unlocked,Locked"
|
|
bitfld.long 0x00 1. " NMICL ,NMI Interrupt Clear" "No effect,Cleared"
|
|
rbitfld.long 0x00 0. " NMI ,NMI Interrupt Flag" "0,1"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL0,MPU AXI Control Register"
|
|
bitfld.long 0x00 24.--26. " AP ,Access Permissions for Background Region" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 17. " MPUENC ,MPU AXI Enable Control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16. " MPUEN ,MPU AXI Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PROT ,Privilege Attribute" "Non-privilege,Privilege"
|
|
bitfld.long 0x00 11. " POEN ,Privileged Mode Overwrite Feature Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " MPUSTOPEN ,MPU STOP Feature" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " MPUSTOP ,MPU STOP Status" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " LST ,MPU Lock Status" "Unlocked,Locked"
|
|
bitfld.long 0x00 1. " NMICL ,NMI Interrupt Clear" "No effect,Cleared"
|
|
rbitfld.long 0x00 0. " NMI ,NMI Interrupt Flag" "0,1"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MPUXDMA0_NMIEN,MPU AXI NMI Enable Register"
|
|
bitfld.long 0x00 0. " NMIEN ,Decides whether the NMI interrupt flag is routed to NMI interrupt signal or not" "Not triggered,Triggered"
|
|
rgroup.long 0x08++0x0F
|
|
line.long 0x00 "MPUXDMA0_WERRC,MPU AXI Write Error Control Register"
|
|
bitfld.long 0x00 8.--10. " AWSIZE ,AXI Transaction Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--7. " AWBURST ,AXI Transaction Burst Type" "0,1,2,3"
|
|
bitfld.long 0x00 2.--5. " AWLEN ,AXI Transaction Burst Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " AWPROTPRIV ,AXI Transaction Privileged Mode" "0,1"
|
|
bitfld.long 0x00 0. " AWMPV ,AXI Write Memory Protection Violation" "0,1"
|
|
line.long 0x04 "MPUXDMA0_WERRA,MPU AXI Write Error Address Register"
|
|
line.long 0x08 "MPUXDMA0_RERRC,MPU AXI Read Error Control Register"
|
|
bitfld.long 0x08 8.--10. " ARSIZE ,AXI Transaction Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 6.--7. " ARBURST ,AXI Transaction Burst Type" "0,1,2,3"
|
|
bitfld.long 0x08 2.--5. " ARLEN ,AXI Transaction Burst Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 1. " ARPROTPRIV ,AXI Transaction Privileged Mode" "0,1"
|
|
bitfld.long 0x08 0. " ARMPV ,AXI Read Memory Protection Violation" "0,1"
|
|
line.long 0x0C "MPUXDMA0_RERRA,MPU AXI Read Error Address Register"
|
|
if (((d.l(ad:0xB0C08000))&0x1000)==0x1000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL1,MPU AXI Region Control Register for region 1"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 1" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 1" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 1" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL1,MPU AXI Region Control Register for region 1"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 1" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 1" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 1" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "MPUXDMA0_SADDR1,MPU AXI Start Address Register for Region 1"
|
|
line.long 0x04 "MPUXDMA0_EADDR1,MPU AXI End Address Register for Region 1"
|
|
if (((d.l(ad:0xB0C08000))&0x1000)==0x1000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL2,MPU AXI Region Control Register for region 2"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 2" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 2" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 2" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL2,MPU AXI Region Control Register for region 2"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 2" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 2" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 2" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x24++0x07
|
|
line.long 0x00 "MPUXDMA0_SADDR2,MPU AXI Start Address Register for Region 2"
|
|
line.long 0x04 "MPUXDMA0_EADDR2,MPU AXI End Address Register for Region 2"
|
|
if (((d.l(ad:0xB0C08000))&0x1000)==0x1000)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL3,MPU AXI Region Control Register for region 3"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 3" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 3" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 3" "Disabled,Enabled"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL3,MPU AXI Region Control Register for region 3"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 3" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 3" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 3" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "MPUXDMA0_SADDR3,MPU AXI Start Address Register for Region 3"
|
|
line.long 0x04 "MPUXDMA0_EADDR3,MPU AXI End Address Register for Region 3"
|
|
if (((d.l(ad:0xB0C08000))&0x1000)==0x1000)
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL4,MPU AXI Region Control Register for region 4"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 4" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 4" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 4" "Disabled,Enabled"
|
|
else
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL4,MPU AXI Region Control Register for region 4"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 4" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 4" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 4" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x3C++0x07
|
|
line.long 0x00 "MPUXDMA0_SADDR4,MPU AXI Start Address Register for Region 4"
|
|
line.long 0x04 "MPUXDMA0_EADDR4,MPU AXI End Address Register for Region 4"
|
|
if (((d.l(ad:0xB0C08000))&0x1000)==0x1000)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL5,MPU AXI Region Control Register for region 5"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 5" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 5" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 5" "Disabled,Enabled"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL5,MPU AXI Region Control Register for region 5"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 5" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 5" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 5" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "MPUXDMA0_SADDR5,MPU AXI Start Address Register for Region 5"
|
|
line.long 0x04 "MPUXDMA0_EADDR5,MPU AXI End Address Register for Region 5"
|
|
if (((d.l(ad:0xB0C08000))&0x1000)==0x1000)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL6,MPU AXI Region Control Register for region 6"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 6" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 6" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 6" "Disabled,Enabled"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL6,MPU AXI Region Control Register for region 6"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 6" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 6" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 6" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x54++0x07
|
|
line.long 0x00 "MPUXDMA0_SADDR6,MPU AXI Start Address Register for Region 6"
|
|
line.long 0x04 "MPUXDMA0_EADDR6,MPU AXI End Address Register for Region 6"
|
|
if (((d.l(ad:0xB0C08000))&0x1000)==0x1000)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL7,MPU AXI Region Control Register for region 7"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 7" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 7" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 7" "Disabled,Enabled"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL7,MPU AXI Region Control Register for region 7"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 7" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 7" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 7" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x60++0x07
|
|
line.long 0x00 "MPUXDMA0_SADDR7,MPU AXI Start Address Register for Region 7"
|
|
line.long 0x04 "MPUXDMA0_EADDR7,MPU AXI End Address Register for Region 7"
|
|
if (((d.l(ad:0xB0C08000))&0x1000)==0x1000)
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL8,MPU AXI Region Control Register for region 8"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 8" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 8" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 8" "Disabled,Enabled"
|
|
else
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "MPUXDMA0_CTRL8,MPU AXI Region Control Register for region 8"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 8" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 8" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 8" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x6C++0x07
|
|
line.long 0x00 "MPUXDMA0_SADDR8,MPU AXI Start Address Register for Region 8"
|
|
line.long 0x04 "MPUXDMA0_EADDR8,MPU AXI End Address Register for Region 8"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "MPUXDMA0_UNLOCK,MPU AXI Unlock Register"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "MPUXDMA0_MID,MPU AXI Module ID Register"
|
|
width 12.
|
|
tree.end
|
|
tree "GFX"
|
|
base ad:0xB0B00000
|
|
width 16.
|
|
if (((d.l(ad:0xB0B00000))&0x1000)==0x1000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL0,MPU AXI Control Register"
|
|
bitfld.long 0x00 24.--26. " AP ,Access Permissions for Background Region" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 17. " MPUENC ,MPU AXI Enable Control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16. " MPUEN ,MPU AXI Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PROT ,Privilege Attribute" "Non-privilege,Privilege"
|
|
bitfld.long 0x00 11. " POEN ,Privileged Mode Overwrite Feature Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " MPUSTOPEN ,MPU STOP Feature" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " MPUSTOP ,MPU STOP Status" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " LST ,MPU Lock Status" "Unlocked,Locked"
|
|
bitfld.long 0x00 1. " NMICL ,NMI Interrupt Clear" "No effect,Cleared"
|
|
rbitfld.long 0x00 0. " NMI ,NMI Interrupt Flag" "0,1"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL0,MPU AXI Control Register"
|
|
bitfld.long 0x00 24.--26. " AP ,Access Permissions for Background Region" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 17. " MPUENC ,MPU AXI Enable Control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16. " MPUEN ,MPU AXI Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PROT ,Privilege Attribute" "Non-privilege,Privilege"
|
|
bitfld.long 0x00 11. " POEN ,Privileged Mode Overwrite Feature Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " MPUSTOPEN ,MPU STOP Feature" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " MPUSTOP ,MPU STOP Status" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " LST ,MPU Lock Status" "Unlocked,Locked"
|
|
bitfld.long 0x00 1. " NMICL ,NMI Interrupt Clear" "No effect,Cleared"
|
|
rbitfld.long 0x00 0. " NMI ,NMI Interrupt Flag" "0,1"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MPUXGFX_NMIEN,MPU AXI NMI Enable Register"
|
|
bitfld.long 0x00 0. " NMIEN ,Decides whether the NMI interrupt flag is routed to NMI interrupt signal or not" "Not triggered,Triggered"
|
|
rgroup.long 0x08++0x0F
|
|
line.long 0x00 "MPUXGFX_WERRC,MPU AXI Write Error Control Register"
|
|
bitfld.long 0x00 8.--10. " AWSIZE ,AXI Transaction Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--7. " AWBURST ,AXI Transaction Burst Type" "0,1,2,3"
|
|
bitfld.long 0x00 2.--5. " AWLEN ,AXI Transaction Burst Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " AWPROTPRIV ,AXI Transaction Privileged Mode" "0,1"
|
|
bitfld.long 0x00 0. " AWMPV ,AXI Write Memory Protection Violation" "0,1"
|
|
line.long 0x04 "MPUXGFX_WERRA,MPU AXI Write Error Address Register"
|
|
line.long 0x08 "MPUXGFX_RERRC,MPU AXI Read Error Control Register"
|
|
bitfld.long 0x08 8.--10. " ARSIZE ,AXI Transaction Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 6.--7. " ARBURST ,AXI Transaction Burst Type" "0,1,2,3"
|
|
bitfld.long 0x08 2.--5. " ARLEN ,AXI Transaction Burst Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 1. " ARPROTPRIV ,AXI Transaction Privileged Mode" "0,1"
|
|
bitfld.long 0x08 0. " ARMPV ,AXI Read Memory Protection Violation" "0,1"
|
|
line.long 0x0C "MPUXGFX_RERRA,MPU AXI Read Error Address Register"
|
|
if (((d.l(ad:0xB0B00000))&0x1000)==0x1000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL1,MPU AXI Region Control Register for region 1"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 1" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 1" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 1" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL1,MPU AXI Region Control Register for region 1"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 1" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 1" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 1" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "MPUXGFX_SADDR1,MPU AXI Start Address Register for Region 1"
|
|
line.long 0x04 "MPUXGFX_EADDR1,MPU AXI End Address Register for Region 1"
|
|
if (((d.l(ad:0xB0B00000))&0x1000)==0x1000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL2,MPU AXI Region Control Register for region 2"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 2" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 2" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 2" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL2,MPU AXI Region Control Register for region 2"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 2" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 2" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 2" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x24++0x07
|
|
line.long 0x00 "MPUXGFX_SADDR2,MPU AXI Start Address Register for Region 2"
|
|
line.long 0x04 "MPUXGFX_EADDR2,MPU AXI End Address Register for Region 2"
|
|
if (((d.l(ad:0xB0B00000))&0x1000)==0x1000)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL3,MPU AXI Region Control Register for region 3"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 3" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 3" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 3" "Disabled,Enabled"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL3,MPU AXI Region Control Register for region 3"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 3" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 3" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 3" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "MPUXGFX_SADDR3,MPU AXI Start Address Register for Region 3"
|
|
line.long 0x04 "MPUXGFX_EADDR3,MPU AXI End Address Register for Region 3"
|
|
if (((d.l(ad:0xB0B00000))&0x1000)==0x1000)
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL4,MPU AXI Region Control Register for region 4"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 4" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 4" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 4" "Disabled,Enabled"
|
|
else
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL4,MPU AXI Region Control Register for region 4"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 4" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 4" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 4" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x3C++0x07
|
|
line.long 0x00 "MPUXGFX_SADDR4,MPU AXI Start Address Register for Region 4"
|
|
line.long 0x04 "MPUXGFX_EADDR4,MPU AXI End Address Register for Region 4"
|
|
if (((d.l(ad:0xB0B00000))&0x1000)==0x1000)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL5,MPU AXI Region Control Register for region 5"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 5" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 5" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 5" "Disabled,Enabled"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL5,MPU AXI Region Control Register for region 5"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 5" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 5" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 5" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "MPUXGFX_SADDR5,MPU AXI Start Address Register for Region 5"
|
|
line.long 0x04 "MPUXGFX_EADDR5,MPU AXI End Address Register for Region 5"
|
|
if (((d.l(ad:0xB0B00000))&0x1000)==0x1000)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL6,MPU AXI Region Control Register for region 6"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 6" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 6" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 6" "Disabled,Enabled"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL6,MPU AXI Region Control Register for region 6"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 6" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 6" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 6" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x54++0x07
|
|
line.long 0x00 "MPUXGFX_SADDR6,MPU AXI Start Address Register for Region 6"
|
|
line.long 0x04 "MPUXGFX_EADDR6,MPU AXI End Address Register for Region 6"
|
|
if (((d.l(ad:0xB0B00000))&0x1000)==0x1000)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL7,MPU AXI Region Control Register for region 7"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 7" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 7" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 7" "Disabled,Enabled"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL7,MPU AXI Region Control Register for region 7"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 7" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 7" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 7" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x60++0x07
|
|
line.long 0x00 "MPUXGFX_SADDR7,MPU AXI Start Address Register for Region 7"
|
|
line.long 0x04 "MPUXGFX_EADDR7,MPU AXI End Address Register for Region 7"
|
|
if (((d.l(ad:0xB0B00000))&0x1000)==0x1000)
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL8,MPU AXI Region Control Register for region 8"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 8" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 8" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 8" "Disabled,Enabled"
|
|
else
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "MPUXGFX_CTRL8,MPU AXI Region Control Register for region 8"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 8" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 8" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 8" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x6C++0x07
|
|
line.long 0x00 "MPUXGFX_SADDR8,MPU AXI Start Address Register for Region 8"
|
|
line.long 0x04 "MPUXGFX_EADDR8,MPU AXI End Address Register for Region 8"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "MPUXGFX_UNLOCK,MPU AXI Unlock Register"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "MPUXGFX_MID,MPU AXI Module ID Register"
|
|
width 12.
|
|
tree.end
|
|
tree "SHE0"
|
|
base ad:0xB0414000
|
|
width 17.
|
|
if (((d.l(ad:0xB0414000))&0x1000)==0x1000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL0,MPU AXI Control Register"
|
|
bitfld.long 0x00 24.--26. " AP ,Access Permissions for Background Region" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 17. " MPUENC ,MPU AXI Enable Control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16. " MPUEN ,MPU AXI Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PROT ,Privilege Attribute" "Non-privilege,Privilege"
|
|
bitfld.long 0x00 11. " POEN ,Privileged Mode Overwrite Feature Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " MPUSTOPEN ,MPU STOP Feature" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " MPUSTOP ,MPU STOP Status" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " LST ,MPU Lock Status" "Unlocked,Locked"
|
|
bitfld.long 0x00 1. " NMICL ,NMI Interrupt Clear" "No effect,Cleared"
|
|
rbitfld.long 0x00 0. " NMI ,NMI Interrupt Flag" "0,1"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL0,MPU AXI Control Register"
|
|
bitfld.long 0x00 24.--26. " AP ,Access Permissions for Background Region" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 17. " MPUENC ,MPU AXI Enable Control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16. " MPUEN ,MPU AXI Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PROT ,Privilege Attribute" "Non-privilege,Privilege"
|
|
bitfld.long 0x00 11. " POEN ,Privileged Mode Overwrite Feature Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " MPUSTOPEN ,MPU STOP Feature" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " MPUSTOP ,MPU STOP Status" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " LST ,MPU Lock Status" "Unlocked,Locked"
|
|
bitfld.long 0x00 1. " NMICL ,NMI Interrupt Clear" "No effect,Cleared"
|
|
rbitfld.long 0x00 0. " NMI ,NMI Interrupt Flag" "0,1"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MPUXSHE0_NMIEN,MPU AXI NMI Enable Register"
|
|
bitfld.long 0x00 0. " NMIEN ,Decides whether the NMI interrupt flag is routed to NMI interrupt signal or not" "Not triggered,Triggered"
|
|
rgroup.long 0x08++0x0F
|
|
line.long 0x00 "MPUXSHE0_WERRC,MPU AXI Write Error Control Register"
|
|
bitfld.long 0x00 8.--10. " AWSIZE ,AXI Transaction Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--7. " AWBURST ,AXI Transaction Burst Type" "0,1,2,3"
|
|
bitfld.long 0x00 2.--5. " AWLEN ,AXI Transaction Burst Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " AWPROTPRIV ,AXI Transaction Privileged Mode" "0,1"
|
|
bitfld.long 0x00 0. " AWMPV ,AXI Write Memory Protection Violation" "0,1"
|
|
line.long 0x04 "MPUXSHE0_WERRA,MPU AXI Write Error Address Register"
|
|
line.long 0x08 "MPUXSHE0_RERRC,MPU AXI Read Error Control Register"
|
|
bitfld.long 0x08 8.--10. " ARSIZE ,AXI Transaction Burst Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 6.--7. " ARBURST ,AXI Transaction Burst Type" "0,1,2,3"
|
|
bitfld.long 0x08 2.--5. " ARLEN ,AXI Transaction Burst Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 1. " ARPROTPRIV ,AXI Transaction Privileged Mode" "0,1"
|
|
bitfld.long 0x08 0. " ARMPV ,AXI Read Memory Protection Violation" "0,1"
|
|
line.long 0x0C "MPUXSHE0_RERRA,MPU AXI Read Error Address Register"
|
|
if (((d.l(ad:0xB0414000))&0x1000)==0x1000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL1,MPU AXI Region Control Register for region 1"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 1" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 1" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 1" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL1,MPU AXI Region Control Register for region 1"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 1" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 1" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 1" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "MPUXSHE0_SADDR1,MPU AXI Start Address Register for Region 1"
|
|
line.long 0x04 "MPUXSHE0_EADDR1,MPU AXI End Address Register for Region 1"
|
|
if (((d.l(ad:0xB0414000))&0x1000)==0x1000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL2,MPU AXI Region Control Register for region 2"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 2" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 2" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 2" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL2,MPU AXI Region Control Register for region 2"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 2" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 2" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 2" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x24++0x07
|
|
line.long 0x00 "MPUXSHE0_SADDR2,MPU AXI Start Address Register for Region 2"
|
|
line.long 0x04 "MPUXSHE0_EADDR2,MPU AXI End Address Register for Region 2"
|
|
if (((d.l(ad:0xB0414000))&0x1000)==0x1000)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL3,MPU AXI Region Control Register for region 3"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 3" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 3" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 3" "Disabled,Enabled"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL3,MPU AXI Region Control Register for region 3"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 3" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 3" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 3" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "MPUXSHE0_SADDR3,MPU AXI Start Address Register for Region 3"
|
|
line.long 0x04 "MPUXSHE0_EADDR3,MPU AXI End Address Register for Region 3"
|
|
if (((d.l(ad:0xB0414000))&0x1000)==0x1000)
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL4,MPU AXI Region Control Register for region 4"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 4" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 4" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 4" "Disabled,Enabled"
|
|
else
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL4,MPU AXI Region Control Register for region 4"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 4" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 4" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 4" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x3C++0x07
|
|
line.long 0x00 "MPUXSHE0_SADDR4,MPU AXI Start Address Register for Region 4"
|
|
line.long 0x04 "MPUXSHE0_EADDR4,MPU AXI End Address Register for Region 4"
|
|
if (((d.l(ad:0xB0414000))&0x1000)==0x1000)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL5,MPU AXI Region Control Register for region 5"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 5" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 5" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 5" "Disabled,Enabled"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL5,MPU AXI Region Control Register for region 5"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 5" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 5" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 5" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "MPUXSHE0_SADDR5,MPU AXI Start Address Register for Region 5"
|
|
line.long 0x04 "MPUXSHE0_EADDR5,MPU AXI End Address Register for Region 5"
|
|
if (((d.l(ad:0xB0414000))&0x1000)==0x1000)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL6,MPU AXI Region Control Register for region 6"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 6" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 6" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 6" "Disabled,Enabled"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL6,MPU AXI Region Control Register for region 6"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 6" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 6" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 6" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x54++0x07
|
|
line.long 0x00 "MPUXSHE0_SADDR6,MPU AXI Start Address Register for Region 6"
|
|
line.long 0x04 "MPUXSHE0_EADDR6,MPU AXI End Address Register for Region 6"
|
|
if (((d.l(ad:0xB0414000))&0x1000)==0x1000)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL7,MPU AXI Region Control Register for region 7"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 7" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 7" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 7" "Disabled,Enabled"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL7,MPU AXI Region Control Register for region 7"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 7" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 7" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 7" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x60++0x07
|
|
line.long 0x00 "MPUXSHE0_SADDR7,MPU AXI Start Address Register for Region 7"
|
|
line.long 0x04 "MPUXSHE0_EADDR7,MPU AXI End Address Register for Region 7"
|
|
if (((d.l(ad:0xB0414000))&0x1000)==0x1000)
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL8,MPU AXI Region Control Register for region 8"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 8" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 8" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 8" "Disabled,Enabled"
|
|
else
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "MPUXSHE0_CTRL8,MPU AXI Region Control Register for region 8"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Background Region 8" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 8" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 8" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x6C++0x07
|
|
line.long 0x00 "MPUXSHE0_SADDR8,MPU AXI Start Address Register for Region 8"
|
|
line.long 0x04 "MPUXSHE0_EADDR8,MPU AXI End Address Register for Region 8"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "MPUXSHE0_UNLOCK,MPU AXI Unlock Register"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "MPUXSHE0_MID,MPU AXI Module ID Register"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree.open "Memory protection units for AHB"
|
|
tree "MLB0"
|
|
base ad:0xB0B10400
|
|
width 14.
|
|
if (((d.l(ad:0xB0B10400))&0x1000)==0x1000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MPUHn_CTRL0,MPU AHB Control Register"
|
|
bitfld.long 0x00 24.--26. " AP ,Access Permissions for Background Region" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 17. " MPUENC ,MPU AHB Enable Control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16. " MPUEN ,MPU AHB Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PROT ,Privileged Mode Attribute" "Non-priviledge,Priviledge"
|
|
bitfld.long 0x00 11. " POEN ,Privileged Mode Overwrite Feature Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " MPUSTOPEN ,Enable for MPU STOP Feature" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " MPUSTOP ,MPU STOP Status" "Not in STOP mode,In STOP mode"
|
|
rbitfld.long 0x00 8. " LST ,MPU Lock Status" "Unlocked,Locked"
|
|
bitfld.long 0x00 1. " NMICL ,NMI Interrupt Clear" "No effect,Cleared"
|
|
rbitfld.long 0x00 0. " NMI ,NMI Interrupt Flag" "0,1"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MPUHn_CTRL0,MPU AHB Control Register"
|
|
bitfld.long 0x00 24.--26. " AP ,Access Permissions for Background Region" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 17. " MPUENC ,MPU AHB Enable Control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16. " MPUEN ,MPU AHB Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PROT ,Privileged Mode Attribute" "Non-priviledge,Priviledge"
|
|
bitfld.long 0x00 11. " POEN ,Privileged Mode Overwrite Feature Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " MPUSTOPEN ,Enable for MPU STOP Feature" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " MPUSTOP ,MPU STOP Status" "Not in STOP mode,In STOP mode"
|
|
rbitfld.long 0x00 8. " LST ,MPU Lock Status" "Unlocked,Locked"
|
|
bitfld.long 0x00 1. " NMICL ,NMI Interrupt Clear" "No effect,Cleared"
|
|
rbitfld.long 0x00 0. " NMI ,NMI Interrupt Flag" "0,1"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MPUHn_NMIEN,MPU AHB NMI Enable Register"
|
|
bitfld.long 0x00 0. " NMIEN ,NMI Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x08++0x07
|
|
line.long 0x00 "MPUHn_MERRC,MPU AHB Memory Error Control Register"
|
|
bitfld.long 0x00 1. " HPROT ,AHB Transfer Privileged Mode" "0,1"
|
|
bitfld.long 0x00 0. " HWRITE ,AHB Transfer Mode" "0,1"
|
|
line.long 0x04 "MPUHn_MERRA,MPU AHB Memory Error Address Register"
|
|
if (((d.l(ad:0xB0B10400))&0x1000)==0x1000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MPUHn_CTRL1,MPU AHB Region Control Register for Region 1"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 1" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 1" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 1" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MPUHn_CTRL1,MPU AHB Region Control Register for region 1"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 1" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 1" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 1" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "MPUHn_SADDR1,MPU AHB Start Address Register for Region 1"
|
|
line.long 0x04 "MPUHn_EADDR1,MPU AHB End Address Register for Region 1"
|
|
if (((d.l(ad:0xB0B10400))&0x1000)==0x1000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "MPUHn_CTRL2,MPU AHB Region Control Register for Region 2"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 2" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 2" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 2" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "MPUHn_CTRL2,MPU AHB Region Control Register for region 2"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 2" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 2" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 2" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "MPUHn_SADDR2,MPU AHB Start Address Register for Region 2"
|
|
line.long 0x04 "MPUHn_EADDR2,MPU AHB End Address Register for Region 2"
|
|
if (((d.l(ad:0xB0B10400))&0x1000)==0x1000)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "MPUHn_CTRL3,MPU AHB Region Control Register for Region 3"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 3" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 3" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 3" "Disabled,Enabled"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "MPUHn_CTRL3,MPU AHB Region Control Register for region 3"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 3" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 3" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 3" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "MPUHn_SADDR3,MPU AHB Start Address Register for Region 3"
|
|
line.long 0x04 "MPUHn_EADDR3,MPU AHB End Address Register for Region 3"
|
|
if (((d.l(ad:0xB0B10400))&0x1000)==0x1000)
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "MPUHn_CTRL4,MPU AHB Region Control Register for Region 4"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 4" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 4" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 4" "Disabled,Enabled"
|
|
else
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "MPUHn_CTRL4,MPU AHB Region Control Register for region 4"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 4" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 4" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 4" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "MPUHn_SADDR4,MPU AHB Start Address Register for Region 4"
|
|
line.long 0x04 "MPUHn_EADDR4,MPU AHB End Address Register for Region 4"
|
|
if (((d.l(ad:0xB0B10400))&0x1000)==0x1000)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MPUHn_CTRL5,MPU AHB Region Control Register for Region 5"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 5" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 5" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 5" "Disabled,Enabled"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MPUHn_CTRL5,MPU AHB Region Control Register for region 5"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 5" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 5" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 5" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x40++0x07
|
|
line.long 0x00 "MPUHn_SADDR5,MPU AHB Start Address Register for Region 5"
|
|
line.long 0x04 "MPUHn_EADDR5,MPU AHB End Address Register for Region 5"
|
|
if (((d.l(ad:0xB0B10400))&0x1000)==0x1000)
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "MPUHn_CTRL6,MPU AHB Region Control Register for Region 6"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 6" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 6" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 6" "Disabled,Enabled"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "MPUHn_CTRL6,MPU AHB Region Control Register for region 6"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 6" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 6" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 6" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x4C++0x07
|
|
line.long 0x00 "MPUHn_SADDR6,MPU AHB Start Address Register for Region 6"
|
|
line.long 0x04 "MPUHn_EADDR6,MPU AHB End Address Register for Region 6"
|
|
if (((d.l(ad:0xB0B10400))&0x1000)==0x1000)
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "MPUHn_CTRL7,MPU AHB Region Control Register for Region 7"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 7" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 7" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 7" "Disabled,Enabled"
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "MPUHn_CTRL7,MPU AHB Region Control Register for region 7"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 7" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 7" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 7" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x58++0x07
|
|
line.long 0x00 "MPUHn_SADDR7,MPU AHB Start Address Register for Region 7"
|
|
line.long 0x04 "MPUHn_EADDR7,MPU AHB End Address Register for Region 7"
|
|
if (((d.l(ad:0xB0B10400))&0x1000)==0x1000)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "MPUHn_CTRL8,MPU AHB Region Control Register for Region 8"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 8" "No access,Read/Write,Read/Write,Read/Write,No access,Read only,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 8" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 8" "Disabled,Enabled"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "MPUHn_CTRL8,MPU AHB Region Control Register for region 8"
|
|
bitfld.long 0x00 8.--10. " AP ,Access Permissions for Region 8" "No access,No access,Read only,Read/Write,No access,No access,Read only,Read/Write"
|
|
bitfld.long 0x00 1. " MPUENC ,Memory protection for region 8" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " MPUEN ,Memory protection for region 8" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x64++0x07
|
|
line.long 0x00 "MPUHn_SADDR8,MPU AHB Start Address Register for Region 8"
|
|
line.long 0x04 "MPUHn_EADDR8,MPU AHB End Address Register for Region 8"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MPUHn_UNLOCK,MPU AHB Unlock Register"
|
|
rgroup.long 0x74++0x03
|
|
line.long 0x00 "MPUHn_MID,MPU AHB Module ID Register"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "Programmable CRC"
|
|
base ad:0xb0b30000
|
|
width 11.
|
|
group.long 0x00++0x17
|
|
line.long 0x00 "CRC0_POLY,CRC Polynomial Register"
|
|
line.long 0x04 "CRC0_SEED,CRC Seed Register"
|
|
line.long 0x08 "CRC0_FXOR,CRC Final XOR Register"
|
|
line.long 0x0c "CRC0_CFG,CRC Configuration Register"
|
|
rbitfld.long 0x0c 28. " LOCK ,CRC Engine Status" "Ready,Busy"
|
|
bitfld.long 0x0c 26. " CDEN ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 25. " CIEN ,CRC Interrupt Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x0c 24. " CIRQ ,CRC Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 22.--23. " SZ ,CRC Input Data Size Configuration" "8-bit,16-bit,24-bit,32-bit"
|
|
bitfld.long 0x0c 16.--21. " LEN ,CRC Polynomial/Checksum Length Configuration" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,..."
|
|
bitfld.long 0x0c 11. " RIBIT ,Reflect Input Bits" "Disabled,Enabled"
|
|
bitfld.long 0x0c 10. " RIBYT ,Reflect Input Bytes" "Disabled,Enabled"
|
|
bitfld.long 0x0c 9. " ROBIT ,Reflect Output Bits" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " ROBYT ,Reflect Output Bytes" "Disabled,Enabled"
|
|
bitfld.long 0x0c 0. " CIRQCLR ,Interrupt flag Clear" "No effect,Cleared"
|
|
line.long 0x10 "CRC0_WR,CRC Write Register"
|
|
line.long 0x14 "CRC0_RD,CRC Read Register"
|
|
width 12.
|
|
tree.end
|
|
tree "Tightly Coupled Flash"
|
|
base ad:0xb0411000
|
|
width 18.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TCFCFG_FCPROTKEY,Flash Configuration Protection Key Register"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "TCFCFG_FCFGR,Flash Configuration Register"
|
|
bitfld.long 0x00 6. " SWFRST ,Software Triggered Flash Reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " TCMPR ,Tightly Coupled Memory (TCM) priority" "Balanced,TCM higher than AXI"
|
|
bitfld.long 0x00 4. " WE ,Flash Write Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " FAWC ,Flash Access Wait Cycle Control" "0,1,2,3"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TCFCFG_FECCCTRL,Flash ECC Control Register"
|
|
bitfld.long 0x00 0. " ECCOFF ,Error Corrrection Code (ECC) generation and the checking of AXI accesses" "On,Off"
|
|
group.long 0x18++0x17
|
|
line.long 0x00 "TCFCFG_FDATEIR,Flash Data Bit Error Injection Register"
|
|
bitfld.long 0x00 31. " FDATEIR[31] ,Flash Data bit 31 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 30. " FDATEIR[30] ,Flash Data bit 30 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 29. " FDATEIR[29] ,Flash Data bit 29 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 28. " FDATEIR[28] ,Flash Data bit 28 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 27. " FDATEIR[27] ,Flash Data bit 27 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " FDATEIR[26] ,Flash Data bit 26 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 25. " FDATEIR[25] ,Flash Data bit 25 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 24. " FDATEIR[24] ,Flash Data bit 24 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 23. " FDATEIR[23] ,Flash Data bit 23 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 22. " FDATEIR[22] ,Flash Data bit 22 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FDATEIR[21] ,Flash Data bit 21 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 20. " FDATEIR[20] ,Flash Data bit 20 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 19. " FDATEIR[19] ,Flash Data bit 19 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 18. " FDATEIR[18] ,Flash Data bit 18 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 17. " FDATEIR[17] ,Flash Data bit 17 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FDATEIR[16] ,Flash Data bit 16 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 15. " FDATEIR[15] ,Flash Data bit 15 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 14. " FDATEIR[14] ,Flash Data bit 14 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 13. " FDATEIR[13] ,Flash Data bit 13 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 12. " FDATEIR[12] ,Flash Data bit 12 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FDATEIR[11] ,Flash Data bit 11 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 10. " FDATEIR[10] ,Flash Data bit 10 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 9. " FDATEIR[9] ,Flash Data bit 9 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 8. " FDATEIR[8] ,Flash Data bit 8 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 7. " FDATEIR[7] ,Flash Data bit 7 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FDATEIR[6] ,Flash Data bit 6 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 5. " FDATEIR[5] ,Flash Data bit 5 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 4. " FDATEIR[4] ,Flash Data bit 4 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 3. " FDATEIR[3] ,Flash Data bit 3 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 2. " FDATEIR[2] ,Flash Data bit 2 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FDATEIR[1] ,Flash Data bit 1 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 0. " FDATEIR[0] ,Flash Data bit 0 Error Injection" "No effect,Bit flipped"
|
|
line.long 0x04 "TCFCFG_FECCEIR,Flash ECC Bit Error Injection Register"
|
|
bitfld.long 0x04 6. " FECCEIR[6] ,Flash ECC bit 6 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 5. " FECCEIR[5] ,Flash ECC bit 5 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 4. " FECCEIR[4] ,Flash ECC bit 4 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 3. " FECCEIR[3] ,Flash ECC bit 3 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 2. " FECCEIR[2] ,Flash ECC bit 2 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FECCEIR[1] ,Flash ECC bit 1 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 0. " FECCEIR[0] ,Flash ECC bit 0 Error Injection" "No effect,Bit flipped"
|
|
width 18.
|
|
line.long 0x8 "TCFCFG_FICTRL0,Flash 0 Interrupt Control Register"
|
|
bitfld.long 0x8 10. " WR32FC ,32-bit Write Flag Clear" "No effect,Clear"
|
|
bitfld.long 0x8 9. " HANGIC ,Hangup-1 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x8 8. " RDYIC ,Flash Ready Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x8 1. " HANGIE ,Hangup-1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 0. " RDYIE ,Flash Ready Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0xC "TCFCFG_FICTRL1,Flash 1 Interrupt Control Register"
|
|
bitfld.long 0xC 10. " WR32FC ,32-bit Write Flag Clear" "No effect,Clear"
|
|
bitfld.long 0xC 9. " HANGIC ,Hangup-1 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0xC 8. " RDYIC ,Flash Ready Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0xC 1. " HANGIE ,Hangup-1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 0. " RDYIE ,Flash Ready Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x10 "TCFCFG_FICTRL2,Flash 2 Interrupt Control Register"
|
|
bitfld.long 0x10 10. " WR32FC ,32-bit Write Flag Clear" "No effect,Clear"
|
|
bitfld.long 0x10 9. " HANGIC ,Hangup-1 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x10 8. " RDYIC ,Flash Ready Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x10 1. " HANGIE ,Hangup-1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " RDYIE ,Flash Ready Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x14 "TCFCFG_FICTRL3,Flash 3 Interrupt Control Register"
|
|
bitfld.long 0x14 10. " WR32FC ,32-bit Write Flag Clear" "No effect,Clear"
|
|
bitfld.long 0x14 9. " HANGIC ,Hangup-1 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x14 8. " RDYIC ,Flash Ready Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x14 1. " HANGIE ,Hangup-1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " RDYIE ,Flash Ready Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x38++0x0f
|
|
line.long 0x0 "TCFCFG_FSTAT0,Flash 0 Status Register"
|
|
bitfld.long 0x0 9. " HANGINT ,Hangup-1 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 8. " RDYINT ,Flash Ready Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 4. " WR32F ,32-bit Write Control Flag" "Lower half-word,Upper half-word"
|
|
bitfld.long 0x0 1. " HANG ,Hangup-1 Status" "No hangup,Hangup"
|
|
bitfld.long 0x0 0. " RDY ,Flash Ready Status" "Not ready,Ready"
|
|
line.long 0x4 "TCFCFG_FSTAT1,Flash 1 Status Register"
|
|
bitfld.long 0x4 9. " HANGINT ,Hangup-1 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 8. " RDYINT ,Flash Ready Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 4. " WR32F ,32-bit Write Control Flag" "Lower half-word,Upper half-word"
|
|
bitfld.long 0x4 1. " HANG ,Hangup-1 Status" "No hangup,Hangup"
|
|
bitfld.long 0x4 0. " RDY ,Flash Ready Status" "Not ready,Ready"
|
|
line.long 0x8 "TCFCFG_FSTAT2,Flash 2 Status Register"
|
|
bitfld.long 0x8 9. " HANGINT ,Hangup-1 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 8. " RDYINT ,Flash Ready Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 4. " WR32F ,32-bit Write Control Flag" "Lower half-word,Upper half-word"
|
|
bitfld.long 0x8 1. " HANG ,Hangup-1 Status" "No hangup,Hangup"
|
|
bitfld.long 0x8 0. " RDY ,Flash Ready Status" "Not ready,Ready"
|
|
line.long 0xC "TCFCFG_FSTAT3,Flash 3 Status Register"
|
|
bitfld.long 0xC 9. " HANGINT ,Hangup-1 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0xC 8. " RDYINT ,Flash Ready Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0xC 4. " WR32F ,32-bit Write Control Flag" "Lower half-word,Upper half-word"
|
|
bitfld.long 0xC 1. " HANG ,Hangup-1 Status" "No hangup,Hangup"
|
|
bitfld.long 0xC 0. " RDY ,Flash Ready Status" "Not ready,Ready"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TCFCFG_FSECIR,Flash SEC Interrupt Register"
|
|
rbitfld.long 0x00 16. " SECINT ,ECC Single Error Correction Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " SECIC ,ECC Single Error Correction Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " SECIE ,ECC Single Error Correction Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x54++0x07
|
|
line.long 0x00 "TCFCFG_FECCEAR,Flash ECC Error Address Register"
|
|
line.long 0x04 "TCFCFG_FMIDR,Flash Interface Module Identification Register"
|
|
rgroup.long 0x60++0x1f
|
|
line.long 0x0 "TCFCFG_FCAMLR0,Flash 0 CAM Output Lower Register"
|
|
line.long (0x0+0x04) "TCFCFG_FCAMHR0,Flash 0 CAM Output Upper Register"
|
|
hexmask.long.word (0x0+0x04) 0.--12. 1. " CAMH ,Flash CAM Output Higher Word"
|
|
line.long 0x8 "TCFCFG_FCAMLR1,Flash 1 CAM Output Lower Register"
|
|
line.long (0x8+0x04) "TCFCFG_FCAMHR1,Flash 1 CAM Output Upper Register"
|
|
hexmask.long.word (0x8+0x04) 0.--12. 1. " CAMH ,Flash CAM Output Higher Word"
|
|
line.long 0x10 "TCFCFG_FCAMLR2,Flash 2 CAM Output Lower Register"
|
|
line.long (0x10+0x04) "TCFCFG_FCAMHR2,Flash 2 CAM Output Upper Register"
|
|
hexmask.long.word (0x10+0x04) 0.--12. 1. " CAMH ,Flash CAM Output Higher Word"
|
|
line.long 0x18 "TCFCFG_FCAMLR3,Flash 3 CAM Output Lower Register"
|
|
line.long (0x18+0x04) "TCFCFG_FCAMHR3,Flash 3 CAM Output Upper Register"
|
|
hexmask.long.word (0x18+0x04) 0.--12. 1. " CAMH ,Flash CAM Output Higher Word"
|
|
width 12.
|
|
tree.end
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9DF125")
|
|
tree "EEPROM Emulation Flash"
|
|
base ad:0xb0412000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "EEFCFG_CPR,Configuration Protection Key Register"
|
|
group.long 0x08++0x0b
|
|
line.long 0x00 "EEFCFG_CR,Configuration Register"
|
|
bitfld.long 0x00 16. " SWFRST ,Software Triggered Flash Reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " WE ,Flash Write Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " FAWC ,Flash Access Wait Cycle Control" "0,1,2,3(default)"
|
|
line.long 0x04 "EEFCFG_ECR,ECC Control Register"
|
|
bitfld.long 0x04 0. " ECCOFF ,ECC generation and checking" "On,Off"
|
|
line.long 0x08 "EEFCFG_WCR,Write Command Sequencer Configuration Register"
|
|
bitfld.long 0x08 8. " CSEN ,Command Sequencer Enable" "No effect,Enabled"
|
|
bitfld.long 0x08 0. " DMAEN ,DMA Mode Enable" "Disabled,Enabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "EEFCFG_WSR,Write Command Sequencer Status Register"
|
|
bitfld.long 0x00 0.--1. " ST ,Status bits of the Write Command Sequencer" "Disabled/Idle,Write submitted,Write checked,"
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "EEFCFG_DBEIR,Data Bit Error Injection Register"
|
|
bitfld.long 0x00 31. " DBEIR[31] ,Data Bit 31 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 30. " DBEIR[30] ,Data Bit 30 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 29. " DBEIR[29] ,Data Bit 29 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 28. " DBEIR[28] ,Data Bit 28 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 27. " DBEIR[27] ,Data Bit 27 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 26. " DBEIR[26] ,Data Bit 26 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DBEIR[25] ,Data Bit 25 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 24. " DBEIR[24] ,Data Bit 24 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 23. " DBEIR[23] ,Data Bit 23 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 22. " DBEIR[22] ,Data Bit 22 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 21. " DBEIR[21] ,Data Bit 21 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 20. " DBEIR[20] ,Data Bit 20 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBEIR[19] ,Data Bit 19 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 18. " DBEIR[18] ,Data Bit 18 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 17. " DBEIR[17] ,Data Bit 17 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 16. " DBEIR[16] ,Data Bit 16 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 15. " DBEIR[15] ,Data Bit 15 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 14. " DBEIR[14] ,Data Bit 14 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DBEIR[13] ,Data Bit 13 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 12. " DBEIR[12] ,Data Bit 12 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 11. " DBEIR[11] ,Data Bit 11 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 10. " DBEIR[10] ,Data Bit 10 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 9. " DBEIR[9] ,Data Bit 9 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 8. " DBEIR[8] ,Data Bit 8 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DBEIR[7] ,Data Bit 7 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 6. " DBEIR[6] ,Data Bit 6 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 5. " DBEIR[5] ,Data Bit 5 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 4. " DBEIR[4] ,Data Bit 4 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 3. " DBEIR[3] ,Data Bit 3 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 2. " DBEIR[2] ,Data Bit 2 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DBEIR[1] ,Data Bit 1 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 0. " DBEIR[0] ,Data Bit 0 Error Injection" "No effect,Bit flipped"
|
|
line.long 0x04 "EEFCFG_EEIR,ECC Bit Error Injection Register"
|
|
bitfld.long 0x04 6. " EEIR[6] ,ECC Bit 6 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 5. " EEIR[5] ,ECC Bit 5 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 4. " EEIR[4] ,ECC Bit 4 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 3. " EEIR[3] ,ECC Bit 3 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 2. " EEIR[2] ,ECC Bit 2 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 1. " EEIR[1] ,ECC Bit 1 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 0. " EEIR[0] ,ECC Bit 0 Error Injection" "No effect,Bit flipped"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "EEFCFG_WMER,Write Mode Enable Register"
|
|
bitfld.long 0x00 8. " AME ,Automatic Mode Enable bit during Write" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MME ,Manual Mode Enable bit during Write" "Disabled,Enabled"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "EEFCFG_ICR,Interrupt Control Register"
|
|
bitfld.long 0x00 10. " ERRIC ,Error Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " HANGIC ,Hang Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " RDYIC ,Flash Ready Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " ERRIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HANGIE ,Hang Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RDYIE ,Flash Ready Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "EEFCFG_SR,Status Register"
|
|
bitfld.long 0x00 10. " ERRINT ,Error Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " HANGINT ,Hang Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " RDYINT ,Flash Ready Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " WDCYC ,Program Address/Data taking in Cycle Flag Output from Flash Macro" "No address,Address"
|
|
bitfld.long 0x00 1. " HANG ,Hang Status" "No hang,Hang"
|
|
bitfld.long 0x00 0. " RDY ,Flash Ready Status" "Not ready,Ready"
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "EEFCFG_SECIR,SEC Interrupt Register"
|
|
rbitfld.long 0x00 16. " SECINT ,ECC Single Error Correction Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " SECIC ,ECC Single Error Correction Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " SECIE ,ECC Single Error Correction Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x30++0x0B
|
|
line.long 0x00 "EEFCFG_EEAR,ECC Error Address Register"
|
|
line.long 0x04 "EEFCFG_MIR,Module Identification Register"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "EEFCFG_EMENR,Module Identification Register"
|
|
bitfld.long 0x00 8. " AEE ,Arbitration Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EMEN ,Extra Mode Enable" "Disabled,Enabled"
|
|
rgroup.long 0x48++0x07
|
|
line.long 0x00 "EEFCFG_FCAMLR,Flash CAM Output Lower Register"
|
|
line.long 0x04 "EEFCFG_FCAMHR,Flash CAM Output Higher Register"
|
|
hexmask.long.word 0x04 0.--12. 1. " CAMH ,Flash CAM Output Upper Word"
|
|
width 12.
|
|
tree.end
|
|
else
|
|
tree "EEPROM Emulation Flash (with SHE)"
|
|
base ad:0xB0412000
|
|
width 16.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "EEFCFG_CPR,Configuration Protection Key Register"
|
|
group.long 0x08++0x0b
|
|
line.long 0x00 "EEFCFG_CR,Configuration Register"
|
|
bitfld.long 0x00 16. " SWFRST ,Software Triggered Flash Reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " WE ,Flash Write Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " FAWC ,Flash Access Wait Cycle Control" "0,1,2,3(default)"
|
|
line.long 0x04 "EEFCFG_ECR,ECC Control Register"
|
|
bitfld.long 0x04 0. " ECCOFF ,ECC generation and checking" "On,Off"
|
|
line.long 0x08 "EEFCFG_WCR,Write Command Sequencer Configuration Register"
|
|
bitfld.long 0x08 0. " DMAEN ,DMA Mode Enable" "Disabled,Enabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "EEFCFG_WSR,Write Command Sequencer Status Register"
|
|
bitfld.long 0x00 0.--1. " ST ,Status bits of the Write Command Sequencer" "Disabled/Idle,Write submitted,Write checked,"
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "EEFCFG_DBEIR,Data Bit Error Injection Register"
|
|
bitfld.long 0x00 31. " DBEIR[31] ,Data Bit 31 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 30. " DBEIR[30] ,Data Bit 30 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 29. " DBEIR[29] ,Data Bit 29 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 28. " DBEIR[28] ,Data Bit 28 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 27. " DBEIR[27] ,Data Bit 27 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " DBEIR[26] ,Data Bit 26 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 25. " DBEIR[25] ,Data Bit 25 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 24. " DBEIR[24] ,Data Bit 24 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 23. " DBEIR[23] ,Data Bit 23 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 22. " DBEIR[22] ,Data Bit 22 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBEIR[21] ,Data Bit 21 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 20. " DBEIR[20] ,Data Bit 20 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 19. " DBEIR[19] ,Data Bit 19 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 18. " DBEIR[18] ,Data Bit 18 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 17. " DBEIR[17] ,Data Bit 17 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DBEIR[16] ,Data Bit 16 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 15. " DBEIR[15] ,Data Bit 15 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 14. " DBEIR[14] ,Data Bit 14 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 13. " DBEIR[13] ,Data Bit 13 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 12. " DBEIR[12] ,Data Bit 12 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DBEIR[11] ,Data Bit 11 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 10. " DBEIR[10] ,Data Bit 10 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 9. " DBEIR[9] ,Data Bit 9 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 8. " DBEIR[8] ,Data Bit 8 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 7. " DBEIR[7] ,Data Bit 7 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DBEIR[6] ,Data Bit 6 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 5. " DBEIR[5] ,Data Bit 5 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 4. " DBEIR[4] ,Data Bit 4 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 3. " DBEIR[3] ,Data Bit 3 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 2. " DBEIR[2] ,Data Bit 2 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DBEIR[1] ,Data Bit 1 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x00 0. " DBEIR[0] ,Data Bit 0 Error Injection" "No effect,Bit flipped"
|
|
line.long 0x04 "EEFCFG_EEIR,ECC Bit Error Injection Register"
|
|
bitfld.long 0x04 6. " EEIR[6] ,ECC Bit 6 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 5. " EEIR[5] ,ECC Bit 5 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 4. " EEIR[4] ,ECC Bit 4 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 3. " EEIR[3] ,ECC Bit 3 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 2. " EEIR[2] ,ECC Bit 2 Error Injection" "No effect,Bit flipped"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EEIR[1] ,ECC Bit 1 Error Injection" "No effect,Bit flipped"
|
|
bitfld.long 0x04 0. " EEIR[0] ,ECC Bit 0 Error Injection" "No effect,Bit flipped"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "EEFCFG_ICR,Interrupt Control Register"
|
|
bitfld.long 0x00 9. " HANGIC ,Hang Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " RDYIC ,Flash Ready Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " HANGIE ,Hang Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RDYIE ,Flash Ready Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "EEFCFG_SR,Status Register"
|
|
bitfld.long 0x00 9. " HANGINT ,Hang Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " RDYINT ,Flash Ready Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " RDY ,Flash Ready Status" "Not ready,Ready"
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "EEFCFG_SECIR,SEC Interrupt Register"
|
|
rbitfld.long 0x00 16. " SECINT ,ECC Single Error Correction Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " SECIC ,ECC Single Error Correction Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " SECIE ,ECC Single Error Correction Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x30++0x0B
|
|
line.long 0x00 "EEFCFG_EEAR,ECC Error Address Register"
|
|
line.long 0x04 "EEFCFG_MIR,Module Identification Register"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "EEFCFG_EMENR,Module Identification Register"
|
|
bitfld.long 0x00 8. " AEE ,Arbitration Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EMEN ,Extra Mode Enable" "Disabled,Enabled"
|
|
rgroup.long 0x48++0x07
|
|
line.long 0x00 "EEFCFG_FCAMLR,Flash CAM Output Lower Register"
|
|
line.long 0x04 "EEFCFG_FCAMHR,Flash CAM Output Higher Register"
|
|
hexmask.long.word 0x04 0.--12. 1. " CAMH ,Flash CAM Output Upper Word"
|
|
group.long 0x50++0x07
|
|
line.long 0x00 "EEFCFG_SEQWM,Sequencer write mode register"
|
|
bitfld.long 0x00 0. " WM16 ,Write mode selection" "32bit,16bit"
|
|
line.long 0x04 "EEFCFG_SEQCM,Sequencer command mode register"
|
|
bitfld.long 0x04 23. " ERS7E ,Erase Sector 7" "No effect,Erased"
|
|
bitfld.long 0x04 22. " ERS6E ,Erase Sector 6" "No effect,Erased"
|
|
bitfld.long 0x04 21. " ERS5E ,Erase Sector 5" "No effect,Erased"
|
|
bitfld.long 0x04 20. " ERS4E ,Erase Sector 4" "No effect,Erased"
|
|
bitfld.long 0x04 19. " ERS3E ,Erase Sector 3" "No effect,Erased"
|
|
textline " "
|
|
bitfld.long 0x04 18. " ERS2E ,Erase Sector 2" "No effect,Erased"
|
|
bitfld.long 0x04 17. " ERS1E ,Erase Sector 1" "No effect,Erased"
|
|
bitfld.long 0x04 16. " ERS0E ,Erase Sector 0" "No effect,Erased"
|
|
bitfld.long 0x04 0.--1. " OPC ,Selects a command" "Idle,Read reset,Sector erase,"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "EEFCFG_ARBERR,Read arbitration Error register"
|
|
bitfld.long 0x00 0. " ARBERR ,Arbitration Error Flag" "No error,Error"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "EEFCFG_ARBCLR,Arbitration Error Clear register"
|
|
bitfld.long 0x00 0. " ARBCLR ,Arbitration Error Flag Clear" "No effect,Cleared"
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "EEFCFG_BERR,Bus Error Response Status Register"
|
|
bitfld.long 0x00 9. " WTTM ,Arbitration Error Flag Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " ACCIGN ,Flash memory access while the previous access is ongoing" "Blocked,Triggered"
|
|
bitfld.long 0x00 7. " ECRWL ,Violation while accessing a protected register or EEFCFG_ECR:ECCOFF written more than once" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " UNACC ,Unprivileged write access" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " RESA ,Reserved Flash memory and configuration registers are accessed" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RWE ,Protected sector is accessed" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " SIZE ,Size of the access to Flash memory is not supported or configuration registers are accessed with an access size of 64 bits" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " CRWE ,Write access to Flash memory is done without setting the EEFCFG_CR:WE bit to 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " DED ,Double bit ECC fault detected on read access" "Not occurred,Occurred"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "EEFCFG_BERRCLR,Bus Error Response Clear Register"
|
|
eventfld.long 0x00 9. " WTTMCLR ,EEFCFG_BERR:WTTM clear" "No effect,Cleared"
|
|
eventfld.long 0x00 8. " ACCIGNCLR ,EEFCFG_BERR:ACCIGN clear" "No effect,Cleared"
|
|
eventfld.long 0x00 7. " ECRWLCLR ,EEFCFG_BERR:ECRWL clear" "No effect,Cleared"
|
|
eventfld.long 0x00 6. " UNACCLR ,EEFCFG_BERR:UNACC clear" "No effect,Cleared"
|
|
eventfld.long 0x00 5. " RESACLR ,EEFCFG_BERR:RESA clear" "No effect,Cleared"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RWECLR ,EEFCFG_BERR:RWE clear" "No effect,Cleared"
|
|
eventfld.long 0x00 2. " SIZECLR ,EEFCFG_BERR:SIZE clear" "No effect,Cleared"
|
|
eventfld.long 0x00 1. " CRWECLR ,EEFCFG_BERR:CRWE clear" "No effect,Cleared"
|
|
eventfld.long 0x00 0. " DEDCLR ,EEFCFG_BERR:DED clear" "No effect,Cleared"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree "TCM RAM Interface"
|
|
base ad:0xb0410000
|
|
width 17.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "TRCFG_TCMCFG0,TCMRAM_IF Configuration Register 0"
|
|
bitfld.long 0x00 24.--25. " DWAIT ,Number of data wait states based on the CLK_SYS_PD3 clock" "0,1,2,3"
|
|
rbitfld.long 0x00 8. " LOCKSTATUS ,Status of TCMRAM_IF configurations registers" "Unlocked,Locked"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ERRECC ,ECC ERRBIT Value"
|
|
line.long 0x04 "TRCFG_TCMCFG1,TCMRAM_IF Configuration Register 1"
|
|
line.long 0x08 "TRCFG_TCMUNLOCK,TCMRAM_IF UNLOCK Register"
|
|
width 12.
|
|
tree.end
|
|
tree "SRAM Interface"
|
|
base ad:0xB0D00000
|
|
width 14.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "SRCFG_CFG0,SRAM_IF Configuration Register 0"
|
|
bitfld.long 0x00 24.--25. " RDWAIT ,Number of data wait states for an SRAM read transaction" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. " WRWAIT ,Number of data wait states for an SRAM write transaction" "0,1,2,3"
|
|
rbitfld.long 0x00 8. " LOCKSTATUS ,Status of the SRAM_IF" "Unlocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ERRECC[6] ,ECC ERRBIT bit 6 Value"
|
|
bitfld.long 0x00 5. " [5] ,ECC ERRBIT bit 5 Value" "Not flipped,Flipped"
|
|
bitfld.long 0x00 4. " [4] ,ECC ERRBIT bit 4 Value" "Not flipped,Flipped"
|
|
bitfld.long 0x00 3. " [3] ,ECC ERRBIT bit 3 Value" "Not flipped,Flipped"
|
|
bitfld.long 0x00 2. " [2] ,ECC ERRBIT bit 2 Value" "Not flipped,Flipped"
|
|
bitfld.long 0x00 1. " [1] ,ECC ERRBIT bit 1 Value" "Not flipped,Flipped"
|
|
bitfld.long 0x00 0. " [0] ,ECC ERRBIT bit 0 Value" "Not flipped,Flipped"
|
|
line.long 0x04 "SRCFG_CFG1,SRAM_IF Configuration Register 1"
|
|
if (((d.l(ad:0xB0D00000))&0x3000000)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SRCFG_CFG2,SRAM_IF Configuration Register 2"
|
|
bitfld.long 0x00 0. " BYPASSEN ,RDB Bypass" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "SRCFG_CFG2,SRAM_IF Configuration Register 2"
|
|
bitfld.long 0x00 0. " BYPASSEN ,RDB Bypass" "Disabled,Enabled"
|
|
endif
|
|
wgroup.long 0x0c++0x03
|
|
line.long 0x00 "SRCFG_KEY,SRAM_IF Unlock/Lock Key Register"
|
|
group.long 0x10++0x0b
|
|
line.long 0x00 "SRCFG_ERRFLG,SRAM_IF Error Flag Register"
|
|
bitfld.long 0x00 8. " SECCLR ,Single-Bit Error Flag Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 0. " SECFLG ,Single-Bit Error Detection Flag" "Not detected,Detected"
|
|
line.long 0x04 "SRCFG_INTE,SRAM_IF Interrupt Enable Register"
|
|
bitfld.long 0x04 0. " SECINTEN ,Single-Bit Error Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x08 "SRCFG_ECCE,SRAM_IF ECC Enable Register"
|
|
bitfld.long 0x08 0. " ECCEN ,ECC logic in the SRAM_IF enabled" "Disabled,Enabled"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "SRCFG_ERRADR,SRAM_IF Error Address Register"
|
|
line.long 0x04 "SRCFG_MID,SRAM_IF Module Identification Register"
|
|
width 12.
|
|
tree.end
|
|
tree.open "Resource Input Configuration"
|
|
tree "RICFG0"
|
|
base ad:0xB07F8000
|
|
width 16.
|
|
group.word 0x00++0x0F
|
|
line.word 0x00 "ADC0AN26,ADC0 CH26"
|
|
bitfld.word 0x00 8.--11. " PORTSEL[3:0] ,Source of resource input" "P1_00,P1_01,P1_02,P1_03,P1_00/P1_01,P1_01/P1_00,P1_02/P1_03,P1_03/P1_02,,,,,,,,"
|
|
line.word 0x02 "ADC0AN27,ADC0 CH27"
|
|
bitfld.word 0x02 8.--11. " PORTSEL[3:0] ,Source of resource input" "P1_04,P1_05,P1_06,P1_07,P1_04/P1_05,P1_05/P1_04,P1_06/P1_07,P1_07/P1_06,,,,,,,,"
|
|
line.word 0x04 "ADC0AN28,ADC0 CH28"
|
|
bitfld.word 0x04 8.--11. " PORTSEL[3:0] ,Source of resource input" "P1_08,P1_09,P1_10,P1_11,P1_08/P1_09,P1_09/P1_08,P1_10/P1_11,P1_11/P1_10,,,,,,,,"
|
|
line.word 0x06 "ADC0AN29,ADC0 CH29"
|
|
bitfld.word 0x06 8.--11. " PORTSEL[3:0] ,Source of resource input" "P1_12,P1_13,P1_14,P1_15,P1_12/P1_13,P1_13/P1_12,P1_14/P1_15,P1_15/P1_14,,,,,,,,"
|
|
line.word 0x08 "ADC0AN30,ADC0 CH30"
|
|
bitfld.word 0x08 8.--11. " PORTSEL[3:0] ,Source of resource input" "P1_16,P1_17,P1_18,P1_19,P1_16/P1_17,P1_17/P1_16,P1_18/P1_19,P1_19/P1_18,,,,,,,,"
|
|
line.word 0x0A "ADC0AN31,ADC0 CH31"
|
|
bitfld.word 0x0A 8.--11. " PORTSEL[3:0] ,Source of resource input" "P1_20,P1_21,P1_22,P1_23,P1_20/P1_21,P1_21/P1_20,P1_22/P1_23,P1_23/P1_22,,,,,,,,"
|
|
line.word 0x0C "ADC0EDGI,ADC0EDGI"
|
|
bitfld.word 0x0C 8.--11. " PORTSEL[3:0] ,Source of resource input" ",,P1_30,P1_40,,P2_32,,,,,,,,,,"
|
|
bitfld.word 0x0C 1. " PORTPIN ,Pins selected by PORTSEL registers" "Disabled,Enabled"
|
|
bitfld.word 0x0C 0. " OCU ,All the signals that are enabled by the ADC0EDGIOCUn registers ANDed together" "0,1"
|
|
group.word 0x400++0x01
|
|
line.word 0x00 "FRT0TEXT,FRT0TEXT"
|
|
bitfld.word 0x00 8.--11. " PORTSEL[3:0] ,Source of resource input" ",,,P0_40,P0_47,,,,P2_48,P2_49,P2_51,P2_02,P2_10,,,"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,RLT2_TOT,RLT3_TOT,RLT0_TOT,PPG10_PPGB,,,,,,,,,,,"
|
|
group.word 0x420++0x01
|
|
line.word 0x00 "FRT1TEXT,FRT1TEXT"
|
|
bitfld.word 0x00 8.--11. " PORTSEL[3:0] ,Source of resource input" ",,P0_41,P0_47,,,P2_49,P2_51,P2_03,P2_11,,,,,,"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,RLT2_TOT,RLT3_TOT,RLT1_TOT,PPG11_PPGB,,,,,,,,,,,"
|
|
group.word 0x440++0x01
|
|
line.word 0x00 "FRT2TEXT,FRT2TEXT"
|
|
bitfld.word 0x00 8.--11. " PORTSEL[3:0] ,Source of resource input" ",,GND,P0_42,P0_47,,,,P2_49,P2_50,P2_51,P2_04,P2_12,,,"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,RLT2_TOT,RLT3_TOT,RLT4_TOT,PPG12_PPGB,..."
|
|
group.word 0x460++0x01
|
|
line.word 0x00 "FRT3TEXT,FRT3TEXT"
|
|
bitfld.word 0x00 8.--11. " PORTSEL[3:0] ,Source of resource input" ",,P0_43,P0_47,,,P2_49,P2_51,P2_05,P2_13,,,,,,"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,RLT2_TOT,RLT3_TOT,RLT5_TOT,PPG13_PPGB,,,,,,,,,,,"
|
|
group.word 0x840++0x05
|
|
line.word 0x00 "ICU2IN0,ICU2IN0"
|
|
bitfld.word 0x00 8.--11. " PORTSEL[3:0] ,Source of resource input" ",,,P0_24,,P0_48,P1_35,P1_52,P0_41,P1_10,P2_32,P2_40,,P1_40,P2_04,P2_12"
|
|
line.word 0x02 "ICU2IN1,ICU2IN1"
|
|
bitfld.word 0x02 8.--11. " PORTSEL[3:0] ,Source of resource input" ",,,P0_25,,P0_49,P1_36,P1_53,P0_42,P1_09,P2_33,P2_41,,P1_41,P2_05,P2_13"
|
|
line.word 0x04 "ICU2FRTSEL,ICU2FRTSEL"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "FRT2,FRT0,,,,,,,,,,,,,,"
|
|
group.word 0x860++0x05
|
|
line.word 0x00 "ICU3IN0,ICU3IN0"
|
|
bitfld.word 0x00 8.--11. " PORTSEL[3:0] ,Source of resource input" ",,,,,P1_37,P1_54,P1_32,P2_34,P2_42,,,P2_50,P2_06,P2_14,P2_16"
|
|
line.word 0x02 "ICU3IN1,ICU3IN1"
|
|
bitfld.word 0x02 8.--11. " PORTSEL[3:0] ,Source of resource input" ",,,,,P1_38,P1_55,P1_31,P2_35,P2_43,,,P2_51,P2_07,P2_15,P2_17"
|
|
line.word 0x04 "ICU3FRTSEL,ICU3FRTSEL"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "FRT3,FRT1,ICU2,,,,,,,,,,,,,"
|
|
group.word 0xC00++0x07
|
|
line.word 0x00 "OCU0OTD0GATE,OCU0OTD0GATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "RLT4_TOT,RLT0_TOT,PPG5_PPGA,PPG6_PPGA,OCU1_OTD0,OCU1_OTD1,,,,,,,,,,"
|
|
line.word 0x02 "OCU0OTD0GM,OCU0OTD0GM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "OCU0OTD1GATE,OCU0OTD1GATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "RLT4_TOT,RLT1_TOT,PPG5_PPGA,PPG7_PPGA,OCU1_OTD0,OCU1_OTD1,,,,,,,,,,"
|
|
line.word 0x06 "OCU0OTD1GM,OCU0OTD1GM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0xC20++0x0B
|
|
line.word 0x00 "OCU1CMP0EXT,OCU1CMP0EXT"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "OCU1_MTRG,OCU0_CMP0OUT,,,,,,,,,,,,,,"
|
|
line.word 0x02 "OCU1FRTSEL,OCU1FRTSEL"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "FRT1_CNT_EN,FRT0_CNT_EN,,,,,,,,,,,,,,"
|
|
line.word 0x04 "OCU1OTD0GATE,OCU1OTD0GATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "RLT4_TOT,RLT2_TOT,PPG5_PPGA,PPG8_PPGA,OCU0_OTD0,OCU0_OTD1,,,,,,,,,,"
|
|
line.word 0x06 "OCU1OTD0GM,OCU1OTD0GM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x08 "OCU1OTD1GATE,OCU1OTD1GATE"
|
|
bitfld.word 0x08 0.--3. " RESSEL[3:0] ,Source of resource input" "RLT4_TOT,RLT3_TOT,PPG5_PPGA,PPG9_PPGA,OCU0_OTD0,OCU0_OTD1,,,,,,,,,,"
|
|
line.word 0x0A "OCU1OTD1GM,OCU1OTD1GM"
|
|
bitfld.word 0x0A 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1400++0x03
|
|
line.word 0x00 "USART0SCKI,USART0SCKI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL[3:0] ,Source of resource input" ",,,P0_41,P0_46,P1_31,P1_44,P1_09,GND,,P2_48,P2_14,,,,"
|
|
line.word 0x02 "USART0SIN,USART0SIN"
|
|
bitfld.word 0x02 8.--11. " PORTSEL[3:0] ,Source of resource input" ",,,P0_40,P0_45,P1_30,P1_43,P0_42,P1_08,,,,P2_50,P2_13,,"
|
|
group.word 0x1C00++0x07
|
|
line.word 0x00 "PPG0PPGAGATE,PPG0PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG0PPGAGM,PPG0PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG0PPGBGATE,PPG0PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG0PPGBGM,PPG0PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1C20++0x07
|
|
line.word 0x00 "PPG1PPGAGATE,PPG1PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG1PPGAGM,PPG1PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG1PPGBGATE,PPG1PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG1PPGBGM,PPG1PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1C40++0x07
|
|
line.word 0x00 "PPG2PPGAGATE,PPG2PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG2PPGAGM,PPG2PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG2PPGBGATE,PPG2PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG2PPGBGM,PPG2PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1C60++0x07
|
|
line.word 0x00 "PPG3PPGAGATE,PPG3PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG3PPGAGM,PPG3PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG3PPGBGATE,PPG3PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG3PPGBGM,PPG3PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1C80++0x07
|
|
line.word 0x00 "PPG4PPGAGATE,PPG4PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG4PPGAGM,PPG4PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG4PPGBGATE,PPG4PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG4PPGBGM,PPG4PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1CA0++0x07
|
|
line.word 0x00 "PPG5PPGAGATE,PPG5PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG3PPGAGM,PPG5PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG5PPGBGATE,PPG5PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG5PPGBGM,PPG5PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1CC0++0x07
|
|
line.word 0x00 "PPG6PPGAGATE,PPG6PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG6PPGAGM,PPG6PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG6PPGBGATE,PPG6PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG6PPGBGM,PPG6PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1CE0++0x07
|
|
line.word 0x00 "PPG7PPGAGATE,PPG7PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG7PPGAGM,PPG7PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG7PPGBGATE,PPG7PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG7PPGBGM,PPG7PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1D00++0x07
|
|
line.word 0x00 "PPG8PPGAGATE,PPG8PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG8PPGAGM,PPG8PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG8PPGBGATE,PPG8PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG8PPGBGM,PPG8PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1D20++0x07
|
|
line.word 0x00 "PPG9PPGAGATE,PPG9PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG9PPGAGM,PPG9PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG9PPGBGATE,PPG9PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG9PPGBGM,PPG9PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1D40++0x07
|
|
line.word 0x00 "PPG10PPGAGATE,PPG10PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG10PPGAGM,PPG10PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG10PPGBGATE,PPG10PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG10PPGBGM,PPG10PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1D60++0x07
|
|
line.word 0x00 "PPG11PPGAGATE,PPG11PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG11PPGAGM,PPG11PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG11PPGBGATE,PPG11PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG11PPGBGM,PPG11PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1D80++0x07
|
|
line.word 0x00 "PPG12PPGAGATE,PPG12PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG12PPGAGM,PPG12PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG12PPGBGATE,PPG12PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG12PPGBGM,PPG12PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1DA0++0x07
|
|
line.word 0x00 "PPG13PPGAGATE,PPG13PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG13PPGAGM,PPG13PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG13PPGBGATE,PPG13PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG13PPGBGM,PPG13PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1DC0++0x07
|
|
line.word 0x00 "PPG14PPGAGATE,PPG14PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG14PPGAGM,PPG14PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG14PPGBGATE,PPG14PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG14PPGBGM,PPG14PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x1DE0++0x07
|
|
line.word 0x00 "PPG15PPGAGATE,PPG15PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x02 "PPG15PPGAGM,PPG15PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
line.word 0x04 "PPG15PPGBGATE,PPG15PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,,,,,,,,"
|
|
line.word 0x06 "PPG15PPGBGM,PPG15PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "SPECIAL0_GND,SPECIAL0_VDD,,,,,,,,,,,,,,"
|
|
group.word 0x2400++0x09
|
|
line.word 0x00 "PPGGRP0ETRG0,PPGGRP0ETRG0"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU0_OTD0,OCU0_OTD1,OCU1_OTD0,OCU1_OTD1,,,,,,,,,,,"
|
|
line.word 0x02 "PPGGRP0ETRG1,PPGGRP0ETRG1"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU0_OTD0,OCU0_OTD1,OCU1_OTD0,OCU1_OTD1,,,,,,,,,,,"
|
|
line.word 0x04 "PPGGRP0ETRG2,PPGGRP0ETRG2"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU16_OTD0,OCU16_OTD1,OCU17_OTD0,OCU17_OTD1,,,,,,,,,,,"
|
|
line.word 0x06 "PPGGRP0ETRG3,PPGGRP0ETRG3"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU16_OTD0,OCU16_OTD1,OCU17_OTD0,OCU17_OTD1,,,,,,,,,,,"
|
|
line.word 0x08 "PPGGRP0RLTTRG1,PPGGRP0RLTTRG1"
|
|
bitfld.word 0x08 0.--3. " RESSEL[3:0] ,Source of resource input" "RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,RLT8_TOT,,,,,,,,"
|
|
group.word 0x2420++0x09
|
|
line.word 0x00 "PPGGRP1ETRG0,PPGGRP1ETRG0"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU0_OTD0,OCU0_OTD1,OCU1_OTD0,OCU1_OTD1,,,,,,,,,,,"
|
|
line.word 0x02 "PPGGRP1ETRG1,PPGGRP1ETRG1"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU0_OTD0,OCU0_OTD1,OCU1_OTD0,OCU1_OTD1,,,,,,,,,,,"
|
|
line.word 0x04 "PPGGRP1ETRG2,PPGGRP1ETRG2"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU16_OTD0,OCU16_OTD1,OCU17_OTD0,OCU17_OTD1,,,,,,,,,,,"
|
|
line.word 0x06 "PPGGRP1ETRG3,PPGGRP1ETRG3"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU16_OTD0,OCU16_OTD1,OCU17_OTD0,OCU17_OTD1,,,,,,,,,,,"
|
|
line.word 0x08 "PPGGRP1RLTTRG1,PPGGRP1RLTTRG1"
|
|
bitfld.word 0x08 0.--3. " RESSEL[3:0] ,Source of resource input" "RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,RLT8_TOT,,,,,,,,"
|
|
group.word 0x2440++0x09
|
|
line.word 0x00 "PPGGRP2ETRG0,PPGGRP2ETRG0"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU0_OTD0,OCU0_OTD1,OCU1_OTD0,OCU1_OTD1,,,,,,,,,,,"
|
|
line.word 0x02 "PPGGRP2ETRG1,PPGGRP2ETRG1"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU0_OTD0,OCU0_OTD1,OCU1_OTD0,OCU1_OTD1,,,,,,,,,,,"
|
|
line.word 0x04 "PPGGRP2ETRG2,PPGGRP2ETRG2"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU16_OTD0,OCU16_OTD1,OCU17_OTD0,OCU17_OTD1,,,,,,,,,,,"
|
|
line.word 0x06 "PPGGRP2ETRG3,PPGGRP2ETRG3"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU16_OTD0,OCU16_OTD1,OCU17_OTD0,OCU17_OTD1,,,,,,,,,,,"
|
|
line.word 0x08 "PPGGRP2RLTTRG1,PPGGRP2RLTTRG1"
|
|
bitfld.word 0x08 0.--3. " RESSEL[3:0] ,Source of resource input" "RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,RLT8_TOT,,,,,,,,"
|
|
group.word 0x2460++0x09
|
|
line.word 0x00 "PPGGRP3ETRG0,PPGGRP3ETRG0"
|
|
bitfld.word 0x00 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU0_OTD0,OCU0_OTD1,OCU1_OTD0,OCU1_OTD1,,,,,,,,,,,"
|
|
line.word 0x02 "PPGGRP3ETRG1,PPGGRP3ETRG1"
|
|
bitfld.word 0x02 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU0_OTD0,OCU0_OTD1,OCU1_OTD0,OCU1_OTD1,,,,,,,,,,,"
|
|
line.word 0x04 "PPGGRP3ETRG2,PPGGRP3ETRG2"
|
|
bitfld.word 0x04 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU16_OTD0,OCU16_OTD1,OCU17_OTD0,OCU17_OTD1,,,,,,,,,,,"
|
|
line.word 0x06 "PPGGRP3ETRG3,PPGGRP3ETRG3"
|
|
bitfld.word 0x06 0.--3. " RESSEL[3:0] ,Source of resource input" "PORT_PIN,OCU16_OTD0,OCU16_OTD1,OCU17_OTD0,OCU17_OTD1,,,,,,,,,,,"
|
|
line.word 0x08 "PPGGRP3RLTTRG1,PPGGRP3RLTTRG1"
|
|
bitfld.word 0x08 0.--3. " RESSEL[3:0] ,Source of resource input" "RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,RLT8_TOT,,,,,,,,"
|
|
width 12.
|
|
tree.end
|
|
tree "RICFG1"
|
|
base ad:0xB08F8000
|
|
width 17.
|
|
group.word 0x400++0x01
|
|
line.word 0x00 "CAN0RX,CAN0RX"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_25,,P0_42,P0_48,,P1_34,P1_00,P2_41,,,,P0_49,P2_48,P2_49,P2_50"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "CAN0_RX,CAN1_RX and CAN1_TX,..."
|
|
group.word 0x420++0x01
|
|
line.word 0x00 "CAN1RX,CAN1RX"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_24,,P0_43,P0_48,,P1_36,P1_02,P2_41,,,P0_42,P2_40,P2_49,P2_50,P2_51"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "CAN0_RX,CAN1_RX and CAN1_TX,..."
|
|
group.word 0xC00++0x01
|
|
line.word 0x00 "FRT16TEXT,FRT16TEXT"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_44,P0_45,P0_47,P2_40,,P2_51,P2_06,P2_14,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT2_TOT,RLT3_TOT,RLT6_TOT,PPG64_PPGB,..."
|
|
group.word 0xC20++0x01
|
|
line.word 0x00 "FRT17TEXT,FRT17TEXT"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_45,P0_47,P2_41,,P2_51,P2_07,P2_15,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT2_TOT,RLT3_TOT,RLT7_TOT,PPG65_PPGB,..."
|
|
group.word 0xC40++0x01
|
|
line.word 0x00 "FRT18TEXT,FRT18TEXT"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_45,P0_46,P0_47,P2_42,,P2_51,P2_08,P2_16,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT2_TOT,RLT3_TOT,RLT8_TOT,PPG66_PPGB,..."
|
|
group.word 0xC60++0x01
|
|
line.word 0x00 "FRT19TEXT,FRT19TEXT"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_45,P0_47,P2_43,,P2_51,P2_09,P2_17,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT2_TOT,RLT3_TOT,RLT9_TOT,PPG67_PPGB,..."
|
|
group.word 0x1040++0x05
|
|
line.word 0x00 "ICU18IN0,ICU18IN0"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,,,P1_43,P1_56,P0_46,P1_13,P1_18,P2_36,,,,P2_48,P2_08"
|
|
line.word 0x02 "ICU18IN1,ICU18IN1"
|
|
bitfld.word 0x02 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,,,P1_44,P1_57,P0_41,P0_47,P2_37,,,,P2_49,P2_09,"
|
|
line.word 0x04 "ICU18FRTSEL,ICU18FRTSEL"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "FRT18,FRT16,..."
|
|
group.word 0x1060++0x05
|
|
line.word 0x00 "ICU19IN0,ICU19IN0"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,,,P1_45,P1_58,P0_42,P2_38,,,,,P2_24,P2_10,"
|
|
line.word 0x02 "ICU19IN1,ICU19IN1"
|
|
bitfld.word 0x02 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,,P1_26,P1_46,P1_59,P1_14,P1_19,P2_39,,,,,P2_25,P2_11"
|
|
line.word 0x04 "ICU19FRTSEL,ICU19FRTSEL"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "FRT19,FRT17,ICU18_TOUT0,..."
|
|
group.word 0x1400++0x07
|
|
line.word 0x00 "OCU16OTD0GATE,OCU16OTD0GATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "RLT4_TOT,RLT5_TOT,PPG64_PPGB,PPG65_PPGB,OCU17_OTD0,OCU17_OTD1,..."
|
|
line.word 0x02 "OCU16OTD0GM,OCU16OTD0GM"
|
|
bitfld.word 0x02 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
line.word 0x04 "OCU16OTD1GATE,OCU16OTD1GATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "RLT4_TOT,RLT6_TOT,PPG64_PPGB,PPG66_PPGB,OCU17_OTD0,OCU17_OTD1,..."
|
|
line.word 0x06 "OCU16OTD1GM,OCU16OTD1GM"
|
|
bitfld.word 0x06 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
group.word 0x1420++0x0B
|
|
line.word 0x00 "OCU17CMP0EXT,OCU17CMP0EXT"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "OCU17_MTRG,OCU16_CMP0OUT,..."
|
|
line.word 0x02 "OCU17FRTSEL,OCU17FRTSEL"
|
|
bitfld.word 0x02 0.--3. " RESSEL ,Source of the corresponding resource input" "FRT17_CNT_EN,FRT16_CNT_EN,..."
|
|
line.word 0x04 "OCU17OTD0GATE,OCU17OTD0GATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "RLT4_TOT,RLT7_TOT,PPG64_PPGB,PPG67_PPGB,OCU16_OTD0,OCU16_OTD1,..."
|
|
line.word 0x06 "OCU17OTD0GM,OCU17OTD0GM"
|
|
bitfld.word 0x06 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
line.word 0x08 "OCU17OTD1GATE,OCU17OTD1GATE"
|
|
bitfld.word 0x08 0.--3. " RESSEL ,Source of the corresponding resource input" "RLT4_TOT,RLT8_TOT,PPG64_PPGB,PPG68_PPGB,OCU16_OTD0,OCU16_OTD1,..."
|
|
line.word 0x0A "OCU17OTD1GM,OCU17OTD1GM"
|
|
bitfld.word 0x0a 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
group.word 0x1C00++0x3
|
|
line.word 0x00 "USART6SCKI,USART6SCKI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_41,P0_46,P1_40,P1_13,,,P2_48,..."
|
|
line.word 0x02 "USART6SIN,USART6SIN"
|
|
bitfld.word 0x02 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P0_40,P0_45,P1_39,P0_47,P1_12,,,,P2_50,..."
|
|
group.word 0x2400++0x7
|
|
line.word 0x00 "PPG64PPGAGATE,PPG64PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x02 "PPG64PPGAGM,PPG64PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
line.word 0x04 "PPG64PPGBGATE,PPG64PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x06 "PPG64PPGBGM,PPG64PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
group.word 0x2420++0x7
|
|
line.word 0x00 "PPG65PPGAGATE,PPG65PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x02 "PPG65PPGAGM,PPG65PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
line.word 0x04 "PPG65PPGBGATE,PPG65PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x06 "PPG65PPGBGM,PPG65PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
group.word 0x2440++0x07
|
|
line.word 0x00 "PPG66PPGAGATE,PPG66PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,LT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x02 "PPG66PPGAGM,PPG66PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
line.word 0x04 "PPG66PPGBGATE,PPG66PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x06 "PPG66PPGBGM,PPG66PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
group.word 0x2460++0x07
|
|
line.word 0x00 "PPG67PPGAGATE,PPG67PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,LT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x02 "PPG67PPGAGM,PPG67PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
line.word 0x04 "PPG67PPGBGATE,PPG67PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x06 "PPG67PPGBGM,PPG67PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
group.word 0x2480++0x07
|
|
line.word 0x00 "PPG68PPGAGATE,PPG68PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,LT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x02 "PPG68PPGAGM,PPG68PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
line.word 0x04 "PPG68PPGBGATE,PPG68PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x06 "PPG68PPGBGM,PPG68PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
group.word 0x24A0++0x07
|
|
line.word 0x00 "PPG69PPGAGATE,PPG69PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,LT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x02 "PPG69PPGAGM,PPG69PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
line.word 0x04 "PPG69PPGBGATE,PPG69PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x06 "PPG69PPGBGM,PPG69PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
group.word 0x24C0++0x07
|
|
line.word 0x00 "PPG70PPGAGATE,PPG70PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,LT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x02 "PPG70PPGAGM,PPG70PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
line.word 0x04 "PPG70PPGBGATE,PPG70PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x06 "PPG70PPGBGM,PPG70PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
group.word 0x24E0++0x07
|
|
line.word 0x00 "PPG71PPGAGATE,PPG71PPGAGATE"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,LT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x02 "PPG71PPGAGM,PPG71PPGAGM"
|
|
bitfld.word 0x02 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
line.word 0x04 "PPG71PPGBGATE,PPG71PPGBGATE"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_VDD,RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,..."
|
|
line.word 0x06 "PPG71PPGBGM,PPG71PPGBGM"
|
|
bitfld.word 0x06 0.--3. " RESSEL ,Source of the corresponding resource input" "SPECIAL0_GND,SPECIAL0_VDD,..."
|
|
group.word 0x2C00++0x09
|
|
line.word 0x00 "PPGGRP16ETRG0,PPGGRP16ETRG0"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,OCU0_OTD0,OCU0_OTD1,OCU1_OTD0,OCU1_OTD1,..."
|
|
line.word 0x02 "PPGGRP16ETRG1,PPGGRP16ETRG1"
|
|
bitfld.word 0x02 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,OCU0_OTD0,OCU0_OTD1,OCU1_OTD0,OCU1_OTD1,..."
|
|
line.word 0x04 "PPGGRP16ETRG2,PPGGRP16ETRG2"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,OCU16_OTD0,OCU16_OTD1,OCU17_OTD0,OCU17_OTD1,..."
|
|
line.word 0x06 "PPGGRP16ETRG3,PPGGRP16ETRG3"
|
|
bitfld.word 0x06 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,OCU16_OTD0,OCU16_OTD1,OCU17_OTD0,OCU17_OTD1,..."
|
|
line.word 0x08 "PPGGRP16RLTTRG1,PPGGRP16RLTTRG1"
|
|
bitfld.word 0x08 0.--3. " RESSEL ,Source of the corresponding resource input" "RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,RLT8_TOT,..."
|
|
group.word 0x2C20++0x09
|
|
line.word 0x00 "PPGGRP17ETRG0,PPGGRP17ETRG0"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,OCU0_OTD0,OCU0_OTD1,OCU1_OTD0,OCU1_OTD1,..."
|
|
line.word 0x02 "PPGGRP17ETRG1,PPGGRP17ETRG1"
|
|
bitfld.word 0x02 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,OCU0_OTD0,OCU0_OTD1,OCU1_OTD0,OCU1_OTD1,..."
|
|
line.word 0x04 "PPGGRP17ETRG2,PPGGRP17ETRG2"
|
|
bitfld.word 0x04 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,OCU16_OTD0,OCU16_OTD1,OCU17_OTD0,OCU17_OTD1,..."
|
|
line.word 0x06 "PPGGRP17ETRG3,PPGGRP17ETRG3"
|
|
bitfld.word 0x06 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,OCU16_OTD0,OCU16_OTD1,OCU17_OTD0,OCU17_OTD1,..."
|
|
line.word 0x08 "PPGGRP17RLTTRG1,PPGGRP17RLTTRG1"
|
|
bitfld.word 0x08 0.--3. " RESSEL ,Source of the corresponding resource input" "RLT1_TOT,RLT2_TOT,RLT3_TOT,RLT4_TOT,RLT5_TOT,RLT6_TOT,RLT7_TOT,RLT8_TOT,..."
|
|
width 12.
|
|
tree.end
|
|
tree "RICFG3"
|
|
base ad:0xB0AF8000
|
|
width 10.
|
|
group.word 0x800++0x01
|
|
line.word 0x00 "RLT0TIN,RLT0TIN"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_47,P2_22,P1_11,P2_43,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT9_TOT,RLT9_UFSET,RLT1_TOT,PPG0_PPGA,SPECIAL0_MCLKDIV4,SPECIAL0_RCCLKDIV4,..."
|
|
group.word 0x820++0x01
|
|
line.word 0x00 "RLT1TIN,RLT1TIN"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P2_23,P1_15,P2_39,,P2_51,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT0_TOT,RLT0_UFSET,RLT2_TOT,PPG1_PPGA,SPECIAL0_MCLKDIV4,SPECIAL0_RCCLKDIV4,..."
|
|
group.word 0x840++0x01
|
|
line.word 0x00 "RLT2TIN,RLT2TIN"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_43,P2_24,P1_19,P2_35,,P2_21,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT1_TOT,RLT1_UFSET,RLT3_TOT,PPG2_PPGA,SPECIAL0_MCLKDIV4,SPECIAL0_RCCLKDIV4,..."
|
|
group.word 0x860++0x01
|
|
line.word 0x00 "RLT3TIN,RLT3TIN"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_45,P1_30,P1_43,P1_08,,P2_13,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT2_TOT,RLT2_UFSET,RLT4_TOT,PPG3_PPGA,SPECIAL0_MCLKDIV4,SPECIAL0_RCCLKDIV4,..."
|
|
group.word 0x880++0x01
|
|
line.word 0x00 "RLT4TIN,RLT4TIN"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_46,P1_31,P1_44,P1_09,,P2_14,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT3_TOT,RLT3_UFSET,RLT5_TOT,PPG4_PPGA,USART0_SOT,USART6_SOT,..."
|
|
group.word 0x8A0++0x01
|
|
line.word 0x00 "RLT5TIN,RLT5TIN"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_40,P1_39,P2_25,P1_12,,,P2_50,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT4_TOT,RLT4_UFSET,RLT6_TOT,PPG5_PPGA,USART0_SOT,USART6_SOT,..."
|
|
group.word 0x8C0++0x01
|
|
line.word 0x00 "RLT6TIN,RLT6TIN"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_41,P1_40,P1_13,,P2_48,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT5_TOT,RLT5_UFSET,RLT7_TOT,PPG6_PPGA,UDC0_UDOT0,UDC0_UDOT1,..."
|
|
group.word 0x8E0++0x01
|
|
line.word 0x00 "RLT7TIN,RLT7TIN"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P2_38,,P2_49,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT6_TOT,RLT6_UFSET,RLT8_TOT,PPG7_PPGA,UDC0_UDOT0,UDC0_UDOT1,..."
|
|
group.word 0x900++0x01
|
|
line.word 0x00 "RLT8TIN,RLT8TIN"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P2_37,P2_41,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT7_TOT,RLT7_UFSET,RLT9_TOT,PPG8_PPGA,UDC0_UDOT0,UDC0_UDOT1,..."
|
|
group.word 0x920++0x01
|
|
line.word 0x00 "RLT9TIN,RLT9TIN"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P2_36,P2_42,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT8_TOT,RLT8_UFSET,RLT0_TOT,PPG9_PPGA,UDC0_UDOT0,UDC0_UDOT1,..."
|
|
group.word 0x1000++0x01
|
|
line.word 0x00 "UDC0AIN0,UDC0AIN0"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_34,P1_53,P0_44,P2_33,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT0_TOT,RLT3_TOT,RLT7_TOT,..."
|
|
group.word 0x1004++0x01
|
|
line.word 0x00 "UDC0AIN1,UDC0AIN1"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_43,P1_57,P0_48,P2_37,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT1_TOT,RLT4_TOT,RLT7_TOT,..."
|
|
group.word 0x1008++0x01
|
|
line.word 0x00 "UDC0BIN0,UDC0BIN0"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_35,P1_54,P0_45,P2_34,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT1_TOT,RLT4_TOT,RLT8_TOT,..."
|
|
group.word 0x100C++0x01
|
|
line.word 0x00 "UDC0BIN1,UDC0BIN1"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_44,P1_58,P0_49,P2_38,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT2_TOT,RLT5_TOT,RLT8_TOT,..."
|
|
group.word 0x1010++0x01
|
|
line.word 0x00 "UDC0ZIN0,UDC0ZIN0"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_36,P1_55,P0_46,P2_35,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT2_TOT,RLT5_TOT,RLT9_TOT,PPG0_PPGA,PPG1_PPGA,PPG2_PPGA,PPG3_PPGA,..."
|
|
group.word 0x1014++0x01
|
|
line.word 0x00 "UDC0ZIN1,UDC0ZIN1"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_45,P1_59,,P2_39,,,,P2_50,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,RLT3_TOT,RLT6_TOT,RLT9_TOT,PPG0_PPGA,PPG1_PPGA,PPG2_PPGA,PPG3_PPGA,..."
|
|
width 12.
|
|
tree.end
|
|
tree "RICFG4"
|
|
base ad:0xB0BF9000
|
|
width 12.
|
|
group.word 0x000++0x01
|
|
line.word 0x00 "I2S0ECLK,I2S0ECLK"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,,P2_32,P2_36,P2_40,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,SPECIAL0_CLK_PERI1,..."
|
|
group.word 0x004++0x01
|
|
line.word 0x00 "I2S0SCKI,I2S0SCKI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P2_35,P2_39,P2_43,..."
|
|
group.word 0x008++0x01
|
|
line.word 0x00 "I2S0SDI,I2S0SDI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P2_33,P2_37,P2_41,..."
|
|
group.word 0x00C++0x01
|
|
line.word 0x00 "I2S0WSI,I2S0WSI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P2_34,P2_38,P2_42,..."
|
|
group.word 0x020++0x01
|
|
line.word 0x00 "I2S1ECLK,I2S1ECLK"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,,P2_32,P2_36,,,P2_48,..."
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "PORT_PIN,SPECIAL0_CLK_PERI1,..."
|
|
group.word 0x024++0x01
|
|
line.word 0x00 "I2S1SCKI,I2S1SCKI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_27,P2_35,P2_39,,,P2_51,..."
|
|
group.word 0x028++0x01
|
|
line.word 0x00 "I2S1SDI,I2S1SDI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P2_33,P2_37,,,P2_49,..."
|
|
group.word 0x02C++0x01
|
|
line.word 0x00 "I2S1WSI,I2S1WSI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_26,P2_34,P2_38,,,P2_50,..."
|
|
group.word 0xC00++0x01
|
|
line.word 0x00 "SPI0CLKI,SPI0CLKI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_47,P1_11,P2_35,P2_43,,P2_22,..."
|
|
group.word 0xC04++0x01
|
|
line.word 0x00 "SPI0DATA0I,SPI0DATA0I"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_46,P1_10,P2_34,P2_42,,P2_24,..."
|
|
group.word 0xC08++0x01
|
|
line.word 0x00 "SPI0DATA1I,SPI0DATA1I"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_45,P1_09,P2_33,P2_41,,P2_23,..."
|
|
hgroup.word 0xC0C++0x01
|
|
hide.word 0x00 "SPI0MSTART,SPI0MSTART"
|
|
group.word 0xC10++0x01
|
|
line.word 0x00 "SPI0SSI,SPI0SSI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_44,P1_08,P2_32,P2_40,,P2_25,..."
|
|
group.word 0xC20++0x01
|
|
line.word 0x00 "SPI1CLKI,SPI1CLKI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P1_15,P2_39,P2_43,,P2_51,..."
|
|
group.word 0xC24++0x01
|
|
line.word 0x00 "SPI1DATA0I,SPI1DATA0I"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P1_14,P2_38,P2_42,,P2_50,..."
|
|
group.word 0xC28++0x01
|
|
line.word 0x00 "SPI1DATA1I,SPI1DATA1I"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_49,P1_13,P2_37,P2_41,..."
|
|
hgroup.word 0xC2C++0x01
|
|
hide.word 0x00 "SPI1MSTART,SPI1MSTART"
|
|
group.word 0xC30++0x01
|
|
line.word 0x00 "SPI1SSI,SPI1SSI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_48,P1_12,P2_36,P2_40,..."
|
|
group.word 0xC40++0x01
|
|
line.word 0x00 "SPI2CLKI,SPI2CLKI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_43,P1_19,P2_35,P2_39,,P2_21,..."
|
|
group.word 0xC44++0x01
|
|
line.word 0x00 "SPI2DATA0I,SPI2DATA0I"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_42,P1_18,P2_34,P2_38,,P2_20,..."
|
|
group.word 0xC48++0x01
|
|
line.word 0x00 "SPI2DATA1I,SPI2DATA1I"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_41,P1_17,P2_33,P2_37,,P2_19,..."
|
|
group.word 0xC4C++0x01
|
|
line.word 0x00 "SPI2DATA2I,SPI2DATA2I"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P2_22,..."
|
|
group.word 0xC50++0x01
|
|
line.word 0x00 "SPI2DATA3I,SPI2DATA3I"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_45,,P2_23,..."
|
|
hgroup.word 0xC54++0x01
|
|
hide.word 0x00 "SPI2MSTART,SPI2MSTART"
|
|
group.word 0xC58++0x01
|
|
line.word 0x00 "SPI2SSI,SPI2SSI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_40,P1_16,P2_32,P2_36,,P2_18,..."
|
|
width 12.
|
|
tree.end
|
|
tree "RICFG7"
|
|
base ad:0xB06F8000
|
|
width 12.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "GFX0DCLKI,GFX0DCLKI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_30,P1_39,..."
|
|
group.word 0x1000++0x01
|
|
line.word 0x00 "EIC0INT00,EIC0INT00"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_47,P0_63,P1_08,,P1_60,..."
|
|
group.word 0x1004++0x01
|
|
line.word 0x00 "EIC0INT01,EIC0INT01"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_33,P1_48,P1_09,,P1_61,..."
|
|
group.word 0x1008++0x01
|
|
line.word 0x00 "EIC0INT02,EIC0INT02"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_42,P1_49,P1_10,,,P1_62,..."
|
|
group.word 0x100C++0x01
|
|
line.word 0x00 "EIC0INT03,EIC0INT03"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_44,P1_11,P1_08,P2_32,P2_40,,P2_25,..."
|
|
group.word 0x1010++0x01
|
|
line.word 0x00 "EIC0INT04,EIC0INT04"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_48,P1_12,P2_36,P2_40,..."
|
|
group.word 0x1014++0x01
|
|
line.word 0x00 "EIC0INT05,EIC0INT05"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P0_40,P1_13,P1_16,P2_32,P2_36,,P2_18,..."
|
|
group.word 0x1018++0x01
|
|
line.word 0x00 "EIC0INT06,EIC0INT06"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P1_14,P2_34,P2_38,P2_42,..."
|
|
group.word 0x101C++0x01
|
|
line.word 0x00 "EIC0INT07,EIC0INT07"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_26,P1_15,P2_34,P2_38,,,P2_50,..."
|
|
group.word 0x1020++0x01
|
|
line.word 0x00 "EIC0INT08,EIC0INT08"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_25,,P0_42,P0_48,,P1_34,P1_00,P2_41,,,P2_48,P2_49,P2_50,..."
|
|
group.word 0x1024++0x01
|
|
line.word 0x00 "EIC0INT09,EIC0INT09"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_24,,P0_43,P0_48,,P1_36,P1_02,P2_41,,,P2_49,P2_50,P2_51,..."
|
|
group.word 0x1028++0x01
|
|
line.word 0x00 "EIC0INT010,EIC0INT010"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_24,,P0_42,P0_49,,P1_38,P1_16,P2_40,..."
|
|
group.word 0x102C++0x01
|
|
line.word 0x00 "EIC0INT011,EIC0INT011"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P0_40,P0_45,P1_30,P1_43,P0_42,P1_08,,,,P2_50,P2_13,..."
|
|
group.word 0x1030++0x01
|
|
line.word 0x00 "EIC0INT012,EIC0INT012"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,,P0_40,P0_45,P1_39,P0_47,P1_12,,,,P2_50,..."
|
|
group.word 0x1034++0x01
|
|
line.word 0x00 "EIC0INT013,EIC0INT013"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_37,P1_02,P1_16,..."
|
|
group.word 0x1038++0x01
|
|
line.word 0x00 "EIC0INT014,EIC0INT014"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_50,P1_17,P2_11,..."
|
|
group.word 0x103C++0x01
|
|
line.word 0x00 "EIC0INT015,EIC0INT015"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_41,P1_51,P1_18,P2_12,..."
|
|
group.word 0x1040++0x01
|
|
line.word 0x00 "EIC0INT016,EIC0INT016"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_46,P1_52,P1_19,P2_13,..."
|
|
group.word 0x1044++0x01
|
|
line.word 0x00 "EIC0INT017,EIC0INT017"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P0_47,P1_53,P1_20,P2_14,..."
|
|
group.word 0x1048++0x01
|
|
line.word 0x00 "EIC0INT018,EIC0INT018"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_54,P1_21,P2_15,..."
|
|
group.word 0x104C++0x01
|
|
line.word 0x00 "EIC0INT019,EIC0INT019"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_55,P1_22,P2_16,..."
|
|
group.word 0x1050++0x01
|
|
line.word 0x00 "EIC0INT020,EIC0INT020"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",,P1_56,P1_23,P2_17,..."
|
|
group.word 0x1054++0x01
|
|
line.word 0x00 "EIC0INT021,EIC0INT021"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_27,P1_57,P2_00,P2_18,..."
|
|
group.word 0x1058++0x01
|
|
line.word 0x00 "EIC0INT022,EIC0INT022"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_28,P1_58,P2_01,P2_19,..."
|
|
group.word 0x105C++0x01
|
|
line.word 0x00 "EIC0INT023,EIC0INT023"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_29,P1_59,P2_02,P2_20,..."
|
|
group.word 0x1060++0x01
|
|
line.word 0x00 "EIC0INT024,EIC0INT024"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_31,P0_62,P2_03,P2_21,..."
|
|
group.word 0x1064++0x01
|
|
line.word 0x00 "EIC0INT025,EIC0INT025"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_32,P1_00,P2_04,P2_22,..."
|
|
group.word 0x1068++0x01
|
|
line.word 0x00 "EIC0INT026,EIC0INT026"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_35,P1_01,P2_05,P2_23,P2_33,..."
|
|
group.word 0x106C++0x01
|
|
line.word 0x00 "EIC0INT027,EIC0INT027"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_40,P1_03,P2_06,P2_24,..."
|
|
group.word 0x1070++0x01
|
|
line.word 0x00 "EIC0INT028,EIC0INT028"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_41,P1_04,P2_07,P2_25,..."
|
|
group.word 0x1074++0x01
|
|
line.word 0x00 "EIC0INT029,EIC0INT029"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_44,P1_05,P2_08,P2_35,..."
|
|
group.word 0x1078++0x01
|
|
line.word 0x00 "EIC0INT030,EIC0INT030"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_45,P1_06,P2_09,P2_37,..."
|
|
group.word 0x107C++0x01
|
|
line.word 0x00 "EIC0INT031,EIC0INT031"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P1_46,P1_07,P2_10,P2_39,..."
|
|
group.word 0x1080++0x01
|
|
line.word 0x00 "EIC0NMI,EIC0NMI"
|
|
bitfld.word 0x00 8.--11. " PORTSEL ,Source of the corresponding resource input" ",P2_43,..."
|
|
width 12.
|
|
tree.end
|
|
tree "RICFG8"
|
|
base ad:0xB0078000
|
|
width 14.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "HSSPI0MSTART,HSSPI0MSTART"
|
|
bitfld.word 0x00 0.--3. " RESSEL ,Source of the corresponding resource input" "RLT0_TOT,RLT3_TOT,RLT6_TOT,RLT9_TOT,PPG64_PPGB,OCU16_OTD0,..."
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "BootROM Hardware Interface"
|
|
base ad:0xFFFEF358
|
|
width 19.
|
|
wgroup.long 0x000++0x03
|
|
line.long 0x00 "EXCFG_UNLOCK,BootROM Hardware Interface Unlock Register"
|
|
group.long 0x008++0x03
|
|
line.long 0x00 "EXCFG_CNFG,BootROM Hardware Interface Configuration Register"
|
|
bitfld.long 0x00 8. " SWAPREG ,Swap Exception Register" "No effect,Trigger the swap"
|
|
rbitfld.long 0x00 0. " LOCKSTATUS ,BootROM_IF Lock Status" "Unlocked,Locked"
|
|
group.long 0x2C++0x0f
|
|
line.long 0x00 "EXCFG_UNDEFINACT,Undefined Instruction Vector Register - Inactive Set"
|
|
line.long 0x04 "EXCFG_SVCINACT,Supervisor Call Vector Register - Inactive Set"
|
|
line.long 0x08 "EXCFG_PABORTINACT,Prefetch Abort Vector Register - Inactive Set"
|
|
line.long 0x0c "EXCFG_DABORTINACT,Data Abort Vector Register - Inactive Set"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "EXCFG_IRQINACT,Interrupt Vector Register - Inactive Set"
|
|
group.long 0x6C++0x0f
|
|
line.long 0x00 "EXCFG_UNDEFACT,Undefined Instruction Vector Register - Active Set"
|
|
line.long 0x04 "EXCFG_SVCACT,Supervisor Call Vector Register - Active Set"
|
|
line.long 0x08 "EXCFG_PABORTACT,Prefetch Abort Vector Register - Active Set"
|
|
line.long 0x0c "EXCFG_DABORTACT,Data Abort Vector Register - Active Set"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "EXCFG_IRQACT,Interrupt Vector Register - Active Set"
|
|
width 12.
|
|
tree.end
|
|
tree "BootROM Software Interface"
|
|
base ad:0x00FC0000
|
|
width 19.
|
|
group.long 0x3FFF0++0x07
|
|
line.long 0x00 "BDR_SBMM,SHE Secure Boot Size Marker"
|
|
line.long 0x04 "BDR_SBSM,SHE Secure Boot Mode Marker"
|
|
group.long 0x3FFFC++0x0B
|
|
line.long 0x00 "BDR_DWEM,Debugger Waiting Enable Marker"
|
|
line.long 0x04 "BDR_ABVM,Alternative Boot Vector Marker"
|
|
line.long 0x08 "BDR_ABVEM,Alternative Boot Vector Enable Marker"
|
|
group.long 0xF30000++0x07
|
|
line.long 0x00 "MSDR_PDSEM,Primary Device Security Enable Marker"
|
|
line.long 0x04 "MSDR_SDSEM,Secondary Device Security Enable Marker"
|
|
group.long 0xF30008++0x07
|
|
line.long 0x00 "MSDR_PDSKM0,Primary Device security Key Marker"
|
|
line.long 0x04 "MSDR_SDSKM0,Secondary Device Security Key Marker"
|
|
group.long 0xF30010++0x07
|
|
line.long 0x00 "MSDR_PDSKM1,Primary Device security Key Marker"
|
|
line.long 0x04 "MSDR_SDSKM1,Secondary Device Security Key Marker"
|
|
group.long 0xF30018++0x07
|
|
line.long 0x00 "MSDR_PDSKM2,Primary Device security Key Marker"
|
|
line.long 0x04 "MSDR_SDSKM2,Secondary Device Security Key Marker"
|
|
group.long 0xF30020++0x07
|
|
line.long 0x00 "MSDR_PDSKM3,Primary Device security Key Marker"
|
|
line.long 0x04 "MSDR_SDSKM3,Secondary Device Security Key Marker"
|
|
group.long 0xF30028++0x07
|
|
line.long 0x00 "MSDR_PFFAKM0,Primary FFA Key Marker"
|
|
line.long 0x04 "MSDR_SFFAKM0,Secondary FFA Key Marker"
|
|
group.long 0xF30030++0x07
|
|
line.long 0x00 "MSDR_PFFAKM1,Primary FFA Key Marker"
|
|
line.long 0x04 "MSDR_SFFAKM1,Secondary FFA Key Marker"
|
|
group.long 0xF30038++0x07
|
|
line.long 0x00 "MSDR_PFFAKM2,Primary FFA Key Marker"
|
|
line.long 0x04 "MSDR_SFFAKM2,Secondary FFA Key Marker"
|
|
group.long 0xF30040++0x07
|
|
line.long 0x00 "MSDR_PFFAKM3,Primary FFA Key Marker"
|
|
line.long 0x04 "MSDR_SFFAKM3,Secondary FFA Key Marker"
|
|
group.long 0xF30048++0x07
|
|
line.long 0x00 "MSDR_PCTRLM,Primary Device Security Control Marker"
|
|
bitfld.long 0x00 9. " EEPEN ,EEFLASH Permission Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TCPEN ,TCFLASH Permission Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EEMEEN ,EEFLASH Macro Erase Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TCMEEN ,TCFLASH Macro Erase Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DFPPEN ,Direct FPP Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " JTAGSWEN ,JTAG Software Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " JTAGEN ,JTAG Enable" "Disabled,Enabled"
|
|
line.long 0x04 "MSDR_SCTRLM,Secondary Device Security Control Marker"
|
|
bitfld.long 0x04 9. " EEPEN ,EEFLASH Permission Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " TCPEN ,TCFLASH Permission Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " EEMEEN ,EEFLASH Macro Erase Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " TCMEEN ,TCFLASH Macro Erase Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " DFPPEN ,Direct FPP Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " JTAGSWEN ,JTAG Software Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " JTAGEN ,JTAG Enable" "Disabled,Enabled"
|
|
group.long 0xF30050++0x07
|
|
line.long 0x00 "MSDR_PCEM,Primary Configuration Enable Marker"
|
|
line.long 0x04 "MSDR_SCEM,Secondary Configuration Enable Marker"
|
|
group.long 0xF20000++0x07
|
|
line.long 0x00 "TCSDR1_PLKM0,Primary TCFLASH Link Key Marker"
|
|
line.long 0x04 "TCSDR1_SLKM0,Secondary TCFLASH Link Key Marker"
|
|
group.long 0xF20008++0x07
|
|
line.long 0x00 "TCSDR1_PLKM1,Primary TCFLASH Link Key Marker"
|
|
line.long 0x04 "TCSDR1_SLKM1,Secondary TCFLASH Link Key Marker"
|
|
group.long 0xF20010++0x07
|
|
line.long 0x00 "TCSDR1_PLKM2,Primary TCFLASH Link Key Marker"
|
|
line.long 0x04 "TCSDR1_SLKM2,Secondary TCFLASH Link Key Marker"
|
|
group.long 0xF20018++0x07
|
|
line.long 0x00 "TCSDR1_PLKM3,Primary TCFLASH Link Key Marker"
|
|
line.long 0x04 "TCSDR1_SLKM3,Secondary TCFLASH Link Key Marker"
|
|
group.long 0xF10000++0x07
|
|
line.long 0x00 "TCSDR2_PLKM0,Primary TCFLASH Link Key Marker"
|
|
line.long 0x04 "TCSDR2_SLKM0,Secondary TCFLASH Link Key Marker"
|
|
group.long 0xF10008++0x07
|
|
line.long 0x00 "TCSDR2_PLKM1,Primary TCFLASH Link Key Marker"
|
|
line.long 0x04 "TCSDR2_SLKM1,Secondary TCFLASH Link Key Marker"
|
|
group.long 0xF10010++0x07
|
|
line.long 0x00 "TCSDR2_PLKM2,Primary TCFLASH Link Key Marker"
|
|
line.long 0x04 "TCSDR2_SLKM2,Secondary TCFLASH Link Key Marker"
|
|
group.long 0xF10018++0x07
|
|
line.long 0x00 "TCSDR2_PLKM3,Primary TCFLASH Link Key Marker"
|
|
line.long 0x04 "TCSDR2_SLKM3,Secondary TCFLASH Link Key Marker"
|
|
group.long 0xF300A0++0x07
|
|
line.long 0x00 "TCSDR0_PFPKM0,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR0_PFPKM0,Secondary TCFlash Permission Key Marker"
|
|
group.long 0xF300A8++0x07
|
|
line.long 0x00 "TCSDR0_PFPKM1,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR0_PFPKM1,Secondary TCFlash Permission Key Marker"
|
|
group.long 0xF300B0++0x07
|
|
line.long 0x00 "TCSDR0_PFPKM2,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR0_PFPKM2,Secondary TCFlash Permission Key Marker"
|
|
group.long 0xF300B8++0x07
|
|
line.long 0x00 "TCSDR0_PFPKM3,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR0_PFPKM3,Secondary TCFlash Permission Key Marker"
|
|
group.long 0xF20020++0x07
|
|
line.long 0x00 "TCSDR1_PFPKM0,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR1_PFPKM0,Secondary TCFlash Permission Key Marker"
|
|
group.long 0xF20028++0x07
|
|
line.long 0x00 "TCSDR1_PFPKM1,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR1_PFPKM1,Secondary TCFlash Permission Key Marker"
|
|
group.long 0xF20030++0x07
|
|
line.long 0x00 "TCSDR1_PFPKM2,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR1_PFPKM2,Secondary TCFlash Permission Key Marker"
|
|
group.long 0xF20038++0x07
|
|
line.long 0x00 "TCSDR1_PFPKM3,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR1_PFPKM3,Secondary TCFlash Permission Key Marker"
|
|
group.long 0xF10020++0x07
|
|
line.long 0x00 "TCSDR2_PFPKM0,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR2_PFPKM0,Secondary TCFlash Permission Key Marker"
|
|
group.long 0xF10028++0x07
|
|
line.long 0x00 "TCSDR2_PFPKM1,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR2_PFPKM1,Secondary TCFlash Permission Key Marker"
|
|
group.long 0xF10030++0x07
|
|
line.long 0x00 "TCSDR2_PFPKM2,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR2_PFPKM2,Secondary TCFlash Permission Key Marker"
|
|
group.long 0xF10038++0x07
|
|
line.long 0x00 "TCSDR2_PFPKM3,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR2_PFPKM3,Secondary TCFlash Permission Key Marker"
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "TCSDR3_PFPKM0,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR3_PFPKM0,Secondary TCFlash Permission Key Marker"
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "TCSDR3_PFPKM1,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR3_PFPKM1,Secondary TCFlash Permission Key Marker"
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "TCSDR3_PFPKM2,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR3_PFPKM2,Secondary TCFlash Permission Key Marker"
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "TCSDR3_PFPKM3,Primary TCFlash Permission Key Marker"
|
|
line.long 0x04 "TCSDR3_PFPKM3,Secondary TCFlash Permission Key Marker"
|
|
tree "TCFLASH Permission Set Markers TCSDR0"
|
|
textline " "
|
|
group.long 0xF300C0++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M0,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M0,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M0,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M0,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF300D0++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M1,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M1,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M1,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M1,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF300E0++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M2,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M2,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M2,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M2,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF300F0++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M3,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M3,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M3,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M3,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF30100++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M4,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M4,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M4,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M4,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF30110++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M5,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M5,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M5,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M5,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF30120++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M6,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M6,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M6,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M6,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF30130++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M7,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M7,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M7,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M7,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF30140++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M8,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M8,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M8,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M8,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF30150++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M9,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M9,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M9,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M9,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF30160++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M10,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M10,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M10,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M10,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF30170++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M11,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M11,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M11,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M11,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF30180++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M12,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M12,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M12,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M12,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF30190++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M13,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M13,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M13,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M13,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF301A0++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M14,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M14,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M14,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M14,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
group.long 0xF301B0++0x0F
|
|
line.long 0x00 "TCSDR0_PFPS0M15,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x04 "TCSDR0_SFPS0M15,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x08 "TCSDR0_PFPS1M15,Primary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
line.long 0x0C "TCSDR0_SFPS1M15,Secondary TCFLASH Permission Set Marker 0 to 31"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 31" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 0 to 31" "Denied,Granted"
|
|
tree.end
|
|
tree "TCFLASH Permission Set Markers TCSDR1"
|
|
textline " "
|
|
group.long 0xF20040++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M0,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M0,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M0,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M0,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF20050++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M1,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M1,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M1,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M1,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF20060++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M2,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M2,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M2,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M2,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF20070++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M3,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M3,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M3,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M3,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF20080++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M4,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M4,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M4,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M4,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF20090++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M5,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M5,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M5,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M5,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF200A0++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M6,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M6,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M6,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M6,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF200B0++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M7,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M7,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M7,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M7,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF200C0++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M8,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M8,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M8,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M8,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF200D0++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M9,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M9,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M9,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M9,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF200E0++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M10,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M10,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M10,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M10,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF200F0++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M11,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M11,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M11,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M11,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF20100++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M12,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M12,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M12,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M12,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF20110++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M13,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M13,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M13,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M13,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF20120++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M14,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M14,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M14,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M14,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
group.long 0xF20130++0x0F
|
|
line.long 0x00 "TCSDR1_PFPS0M15,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x04 "TCSDR1_SFPS0M15,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x08 "TCSDR1_PFPS1M15,Primary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
line.long 0x0C "TCSDR1_SFPS1M15,Secondary TCFLASH Permission Set Marker 32 to 63"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 32 to 63" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 32 to 63" "Denied,Granted"
|
|
tree.end
|
|
tree "TCFLASH Permission Set Markers TCSDR2"
|
|
textline " "
|
|
group.long 0xF10040++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M0,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M0,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M0,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M0,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF10050++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M1,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M1,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M1,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M1,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF10060++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M2,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M2,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M2,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M2,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF10070++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M3,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M3,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M3,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M3,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF10080++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M4,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M4,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M4,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M4,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF10090++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M5,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M5,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M5,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M5,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF100A0++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M6,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M6,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M6,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M6,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF100B0++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M7,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M7,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M7,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M7,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF100C0++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M8,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M8,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M8,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M8,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF100D0++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M9,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M9,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M9,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M9,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF100E0++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M10,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M10,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M10,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M10,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF100F0++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M11,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M11,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M11,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M11,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF10100++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M12,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M12,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M12,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M12,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF10110++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M13,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M13,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M13,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M13,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF10120++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M14,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M14,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M14,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M14,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
group.long 0xF10130++0x0F
|
|
line.long 0x00 "TCSDR2_PFPS0M15,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x04 "TCSDR2_SFPS0M15,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x08 "TCSDR2_PFPS1M15,Primary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
line.long 0x0C "TCSDR2_SFPS1M15,Secondary TCFLASH Permission Set Marker 64 to 95"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 64 to 95" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 64 to 95" "Denied,Granted"
|
|
tree.end
|
|
tree "TCFLASH Permission Set Markers TCSDR3"
|
|
textline " "
|
|
group.long 0x40++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M0,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M0,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M0,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M0,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0x50++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M1,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M1,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M1,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M1,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0x60++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M2,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M2,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M2,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M2,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0x70++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M3,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M3,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M3,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M3,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0x80++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M4,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M4,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M4,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M4,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0x90++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M5,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M5,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M5,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M5,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0xA0++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M6,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M6,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M6,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M6,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0xB0++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M7,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M7,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M7,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M7,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0xC0++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M8,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M8,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M8,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M8,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0xD0++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M9,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M9,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M9,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M9,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0xE0++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M10,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M10,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M10,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M10,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0xF0++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M11,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M11,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M11,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M11,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M12,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M12,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M12,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M12,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0x110++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M13,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M13,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M13,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M13,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0x120++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M14,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M14,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M14,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M14,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
group.long 0x130++0x0F
|
|
line.long 0x00 "TCSDR3_PFPS0M15,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x04 "TCSDR3_SFPS0M15,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x04 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x04 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x08 "TCSDR3_PFPS1M15,Primary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x08 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x08 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
line.long 0x0C "TCSDR3_SFPS1M15,Secondary TCFLASH Permission Set Marker 96 to 127"
|
|
bitfld.long 0x0C 30. " READ7 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 29. " WRITE7 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 28. " EXEC7 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 26. " READ6 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 25. " WRITE6 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " EXEC6 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 22. " READ5 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 21. " WRITE5 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 20. " EXEC5 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 18. " READ4 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " WRITE4 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 16. " EXEC4 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 14. " READ3 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 13. " WRITE3 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 12. " EXEC3 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " READ2 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 9. " WRITE2 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 8. " EXEC2 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 6. " READ1 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 5. " WRITE1 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXEC1 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 2. " READ0 ,Grants reading permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 1. " WRITE0 ,Grants writing and erasing permission for sectors 96 to 127" "Denied,Granted"
|
|
bitfld.long 0x0C 0. " EXEC0 ,Grants executing code in the sectors 96 to 127" "Denied,Granted"
|
|
tree.end
|
|
group.long 0xAF480000++0x03
|
|
line.long 0x00 "EESDR0_LKM0,EEFLASH Link Key Marker"
|
|
group.long 0xAF480004++0x03
|
|
line.long 0x00 "EESDR0_LKM1,EEFLASH Link Key Marker"
|
|
group.long 0xAF480008++0x03
|
|
line.long 0x00 "EESDR0_LKM2,EEFLASH Link Key Marker"
|
|
group.long 0xAF48000C++0x03
|
|
line.long 0x00 "EESDR0_LKM3,EEFLASH Link Key Marker"
|
|
group.long 0xAF480010++0x03
|
|
line.long 0x00 "EESDR0_FPKM0,EEFLASH Permission Key Marker"
|
|
group.long 0xAF480014++0x03
|
|
line.long 0x00 "EESDR0_FPKM1,EEFLASH Permission Key Marker"
|
|
group.long 0xAF480018++0x03
|
|
line.long 0x00 "EESDR0_FPKM2,EEFLASH Permission Key Marker"
|
|
group.long 0xAF48001C++0x03
|
|
line.long 0x00 "EESDR0_FPKM3,EEFLASH Permission Key Marker"
|
|
group.long 0xAF490010++0x03
|
|
line.long 0x00 "EESDR1_FPKM0,EEFLASH Permission Key Marker"
|
|
group.long 0xAF490014++0x03
|
|
line.long 0x00 "EESDR1_FPKM1,EEFLASH Permission Key Marker"
|
|
group.long 0xAF490018++0x03
|
|
line.long 0x00 "EESDR1_FPKM2,EEFLASH Permission Key Marker"
|
|
group.long 0xAF49001C++0x03
|
|
line.long 0x00 "EESDR1_FPKM3,EEFLASH Permission Key Marker"
|
|
group.long 0xAF4A0010++0x03
|
|
line.long 0x00 "EESDR2_FPKM0,EEFLASH Permission Key Marker"
|
|
group.long 0xAF4A0014++0x03
|
|
line.long 0x00 "EESDR2_FPKM1,EEFLASH Permission Key Marker"
|
|
group.long 0xAF4A0018++0x03
|
|
line.long 0x00 "EESDR2_FPKM2,EEFLASH Permission Key Marker"
|
|
group.long 0xAF4A001C++0x03
|
|
line.long 0x00 "EESDR2_FPKM3,EEFLASH Permission Key Marker"
|
|
group.long 0xAF4B0010++0x03
|
|
line.long 0x00 "EESDR3_FPKM0,EEFLASH Permission Key Marker"
|
|
group.long 0xAF4B0014++0x03
|
|
line.long 0x00 "EESDR3_FPKM1,EEFLASH Permission Key Marker"
|
|
group.long 0xAF4B0018++0x03
|
|
line.long 0x00 "EESDR3_FPKM2,EEFLASH Permission Key Marker"
|
|
group.long 0xAF4B001C++0x03
|
|
line.long 0x00 "EESDR3_FPKM3,EEFLASH Permission Key Marker"
|
|
tree "EEFLASH Permission Set 0 Markers"
|
|
textline " "
|
|
group.long 0xAF480020++0x03
|
|
line.long 0x00 "EESDR0_FPS0M0,EEFLASH Permission Set 0 Marker 0 to 7"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
group.long 0xAF480024++0x03
|
|
line.long 0x00 "EESDR0_FPS0M1,EEFLASH Permission Set 0 Marker 0 to 7"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
group.long 0xAF480028++0x03
|
|
line.long 0x00 "EESDR0_FPS0M2,EEFLASH Permission Set 0 Marker 0 to 7"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
group.long 0xAF48002C++0x03
|
|
line.long 0x00 "EESDR0_FPS0M3,EEFLASH Permission Set 0 Marker 0 to 7"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
group.long 0xAF490020++0x03
|
|
line.long 0x00 "EESDR1_FPS0M0,EEFLASH Permission Set 0 Marker 8 to 15"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
group.long 0xAF490024++0x03
|
|
line.long 0x00 "EESDR1_FPS0M1,EEFLASH Permission Set 0 Marker 8 to 15"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
group.long 0xAF490028++0x03
|
|
line.long 0x00 "EESDR1_FPS0M2,EEFLASH Permission Set 0 Marker 8 to 15"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
group.long 0xAF49002C++0x03
|
|
line.long 0x00 "EESDR1_FPS0M3,EEFLASH Permission Set 0 Marker 8 to 15"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
group.long 0xAF4A0020++0x03
|
|
line.long 0x00 "EESDR2_FPS0M0,EEFLASH Permission Set 0 Marker 16 to 23"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
group.long 0xAF4A0024++0x03
|
|
line.long 0x00 "EESDR2_FPS0M1,EEFLASH Permission Set 0 Marker 16 to 23"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
group.long 0xAF4A0028++0x03
|
|
line.long 0x00 "EESDR2_FPS0M2,EEFLASH Permission Set 0 Marker 16 to 23"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
group.long 0xAF4A002C++0x03
|
|
line.long 0x00 "EESDR2_FPS0M3,EEFLASH Permission Set 0 Marker 16 to 23"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
group.long 0xAF4B0020++0x03
|
|
line.long 0x00 "EESDR3_FPS0M0,EEFLASH Permission Set 0 Marker 24 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
group.long 0xAF4B0024++0x03
|
|
line.long 0x00 "EESDR3_FPS0M1,EEFLASH Permission Set 0 Marker 24 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
group.long 0xAF4B0028++0x03
|
|
line.long 0x00 "EESDR3_FPS0M2,EEFLASH Permission Set 0 Marker 24 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
group.long 0xAF4B002C++0x03
|
|
line.long 0x00 "EESDR3_FPS0M3,EEFLASH Permission Set 0 Marker 24 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
tree.end
|
|
tree "EEFLASH Permission Set 1 Markers"
|
|
textline " "
|
|
group.long 0xAF480030++0x03
|
|
line.long 0x00 "EESDR0_FPS1M0,EEFLASH Permission Set 1 Marker 0 to 7"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
group.long 0xAF480034++0x03
|
|
line.long 0x00 "EESDR0_FPS1M1,EEFLASH Permission Set 1 Marker 0 to 7"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
group.long 0xAF480038++0x03
|
|
line.long 0x00 "EESDR0_FPS1M2,EEFLASH Permission Set 1 Marker 0 to 7"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
group.long 0xAF48003C++0x03
|
|
line.long 0x00 "EESDR0_FPS1M3,EEFLASH Permission Set 1 Marker 0 to 7"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 0 to 7" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 0 to 7" "Denied,Granted"
|
|
group.long 0xAF490030++0x03
|
|
line.long 0x00 "EESDR1_FPS1M0,EEFLASH Permission Set 1 Marker 8 to 15"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
group.long 0xAF490034++0x03
|
|
line.long 0x00 "EESDR1_FPS1M1,EEFLASH Permission Set 1 Marker 8 to 15"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
group.long 0xAF490038++0x03
|
|
line.long 0x00 "EESDR1_FPS1M2,EEFLASH Permission Set 1 Marker 8 to 15"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
group.long 0xAF49003C++0x03
|
|
line.long 0x00 "EESDR1_FPS1M3,EEFLASH Permission Set 1 Marker 8 to 15"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 8 to 15" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 8 to 15" "Denied,Granted"
|
|
group.long 0xAF4A0030++0x03
|
|
line.long 0x00 "EESDR2_FPS1M0,EEFLASH Permission Set 1 Marker 16 to 23"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
group.long 0xAF4A0034++0x03
|
|
line.long 0x00 "EESDR2_FPS1M1,EEFLASH Permission Set 1 Marker 16 to 23"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
group.long 0xAF4A0038++0x03
|
|
line.long 0x00 "EESDR2_FPS1M2,EEFLASH Permission Set 1 Marker 16 to 23"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
group.long 0xAF4A003C++0x03
|
|
line.long 0x00 "EESDR2_FPS1M3,EEFLASH Permission Set 1 Marker 16 to 23"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 16 to 23" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 16 to 23" "Denied,Granted"
|
|
group.long 0xAF4B0030++0x03
|
|
line.long 0x00 "EESDR3_FPS1M0,EEFLASH Permission Set 1 Marker 24 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
group.long 0xAF4B0034++0x03
|
|
line.long 0x00 "EESDR3_FPS1M1,EEFLASH Permission Set 1 Marker 24 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
group.long 0xAF4B0038++0x03
|
|
line.long 0x00 "EESDR3_FPS1M2,EEFLASH Permission Set 1 Marker 24 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
group.long 0xAF4B003C++0x03
|
|
line.long 0x00 "EESDR3_FPS1M3,EEFLASH Permission Set 1 Marker 24 to 31"
|
|
bitfld.long 0x00 30. " READ7 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 29. " WRITE7 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 28. " EXEC7 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 26. " READ6 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 25. " WRITE6 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EXEC6 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 22. " READ5 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 21. " WRITE5 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 20. " EXEC5 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 18. " READ4 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WRITE4 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 16. " EXEC4 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 14. " READ3 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 13. " WRITE3 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 12. " EXEC3 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " READ2 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 9. " WRITE2 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 8. " EXEC2 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 6. " READ1 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 5. " WRITE1 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXEC1 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 2. " READ0 ,Grants reading permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 1. " WRITE0 ,Grants writing and erasing permission for sectors 24 to 31" "Denied,Granted"
|
|
bitfld.long 0x00 0. " EXEC0 ,Grants executing code in the sectors 24 to 31" "Denied,Granted"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "Interrupt Controller"
|
|
base ad:0xb0400000
|
|
width 14.
|
|
rgroup.long 0x00++0x0f
|
|
line.long 0x00 "IRQ0_NMIVAS,IUNIT NMI Vector Address Status Register"
|
|
line.long 0x04 "IRQ0_NMIST,IUNIT NMI Status Register"
|
|
bitfld.long 0x04 8.--11. " NMIPS ,NMI Priority Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--5. " NMISN ,NMI Source Number" "EIC0NMI,SYSCNMILVD,SYSCNMIERR,WDGNMI,TPU0NMI,MPUXDMA0NMI,,MPUXGFXNMI,MPUHMLB0NMI,IRQ0NMIERR,,BECU0NMI,BECU1NMI,BECU3NMI,GFXNMI,,,,MPUSHE,?..."
|
|
line.long 0x08 "IRQ0_IRQVAS,IUNIT IRQ Vector Address Status Register"
|
|
line.long 0x0c "IRQ0_IRQST,IUNIT IRQ Status Register"
|
|
bitfld.long 0x0c 16.--20. " IRQPS ,IRQ Priority Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x0c 0.--9. 1. " IRQSN ,IRQ Source Number"
|
|
tree "NMI Vector Address Registers"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IRQ0_NMIVA0,IUNIT NMI Vector 0 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of EIC0NMI"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IRQ0_NMIVA1,IUNIT NMI Vector 1 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of SYSCNMILVD"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IRQ0_NMIVA2,IUNIT NMI Vector 2 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of SYSCNMIERR"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "IRQ0_NMIVA3,IUNIT NMI Vector 3 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of WDGNMI"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IRQ0_NMIVA4,IUNIT NMI Vector 4 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of TPU0NMI"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "IRQ0_NMIVA5,IUNIT NMI Vector 5 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of MPUXDMA0NMI"
|
|
group.long 0x28++0x03
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "IRQ0_NMIVA7,IUNIT NMI Vector 7 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of MPUXGFXNMI"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "IRQ0_NMIVA8,IUNIT NMI Vector 8 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of MPUHMLB0NMI"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "IRQ0_NMIVA9,IUNIT NMI Vector 9 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of IRQ0NMIERR"
|
|
group.long 0x38++0x03
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "IRQ0_NMIVA11,IUNIT NMI Vector 11 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of BECU0NMI"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "IRQ0_NMIVA12,IUNIT NMI Vector 12 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of BECU1NMI"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "IRQ0_NMIVA13,IUNIT NMI Vector 13 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of BECU3NMI"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "IRQ0_NMIVA14,IUNIT NMI Vector 14 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of GFXNMI"
|
|
group.long 0x4C++0x03
|
|
group.long 0x50++0x03
|
|
group.long 0x54++0x03
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "IRQ0_NMIVA18,IUNIT NMI Vector 18 Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " NMIVA ,Vector Address of MPUSHE"
|
|
tree.end
|
|
tree "IRQ Vector Address Registers"
|
|
group.long 0x90++0x07
|
|
line.long 0x00 "IRQ0_IRQVA0,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SYSCIRQ"
|
|
line.long 0x04 "IRQ0_IRQVA1,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x04 2.--31. 0x4 " IRQVA ,Vector Address of WDGIRQ"
|
|
group.long 0xCC++0x07
|
|
line.long 0x00 "IRQ0_IRQVA15,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of MLB0CINT"
|
|
line.long 0x04 "IRQ0_IRQVA16,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x04 2.--31. 0x4 " IRQVA ,Vector Address of MLB0SINT"
|
|
group.long 0xE8++0x07
|
|
line.long 0x00 "IRQ0_IRQVA22,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of GFXIRQ0"
|
|
line.long 0x04 "IRQ0_IRQVA23,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x04 2.--31. 0x4 " IRQVA ,Vector Address of GFXIRQ1"
|
|
group.long 0x108++0x3
|
|
line.long 0x00 "IRQ0_IRQVA30,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of ADC0IRQ"
|
|
group.long 0x10C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA31,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of ADC0IRQ2"
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "IRQ0_IRQVA32,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of ADC0IRQR"
|
|
group.long 0x114++0x3
|
|
line.long 0x00 "IRQ0_IRQVA33,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of ADC0IRQP"
|
|
group.long 0x118++0x3
|
|
line.long 0x00 "IRQ0_IRQVA34,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RRCFGIRQERR"
|
|
group.long 0x11C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA35,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SRCFGIRQERR"
|
|
group.long 0x120++0x3
|
|
line.long 0x00 "IRQ0_IRQVA36,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of TCFCFGIRQ"
|
|
group.long 0x124++0x3
|
|
line.long 0x00 "IRQ0_IRQVA37,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EECFGIRQERR"
|
|
group.long 0x128++0x3
|
|
line.long 0x00 "IRQ0_IRQVA38,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of IRQ0IRQERR"
|
|
group.long 0x134++0x3
|
|
line.long 0x00 "IRQ0_IRQVA41,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EECFGIRQ"
|
|
group.long 0x138++0x3
|
|
line.long 0x00 "IRQ0_IRQVA42,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EICU0IRQ"
|
|
group.long 0x13C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA43,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of HSSPI0IRQRX"
|
|
group.long 0x140++0x3
|
|
line.long 0x00 "IRQ0_IRQVA44,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of HSSPI0IRQTX"
|
|
group.long 0x144++0x3
|
|
line.long 0x00 "IRQ0_IRQVA45,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SHE"
|
|
group.long 0x150++0x3
|
|
line.long 0x00 "IRQ0_IRQVA48,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SHE"
|
|
group.long 0x154++0x3
|
|
line.long 0x00 "IRQ0_IRQVA49,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SPI0IRQRX"
|
|
group.long 0x158++0x3
|
|
line.long 0x00 "IRQ0_IRQVA50,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SPI0IRQTX"
|
|
group.long 0x160++0x3
|
|
line.long 0x00 "IRQ0_IRQVA52,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SPI1IRQRX"
|
|
group.long 0x164++0x3
|
|
line.long 0x00 "IRQ0_IRQVA53,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SPI1IRQTX"
|
|
group.long 0x16C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA55,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SPI2IRQRX"
|
|
group.long 0x170++0x3
|
|
line.long 0x00 "IRQ0_IRQVA56,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SPI2IRQTX"
|
|
group.long 0x184++0x3
|
|
line.long 0x00 "IRQ0_IRQVA61,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of CAN0IRQ"
|
|
group.long 0x188++0x3
|
|
line.long 0x00 "IRQ0_IRQVA62,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of CAN1IRQ"
|
|
group.long 0x1A4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA69,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ0"
|
|
group.long 0x1A8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA70,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ1"
|
|
group.long 0x1AC++0x3
|
|
line.long 0x00 "IRQ0_IRQVA71,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ2"
|
|
group.long 0x1B0++0x3
|
|
line.long 0x00 "IRQ0_IRQVA72,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ3"
|
|
group.long 0x1B4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA73,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ4"
|
|
group.long 0x1B8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA74,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ5"
|
|
group.long 0x1BC++0x3
|
|
line.long 0x00 "IRQ0_IRQVA75,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ6"
|
|
group.long 0x1C0++0x3
|
|
line.long 0x00 "IRQ0_IRQVA76,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ7"
|
|
group.long 0x1C4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA77,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ8"
|
|
group.long 0x1C8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA78,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ9"
|
|
group.long 0x1CC++0x3
|
|
line.long 0x00 "IRQ0_IRQVA79,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ10"
|
|
group.long 0x1D0++0x3
|
|
line.long 0x00 "IRQ0_IRQVA80,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ11"
|
|
group.long 0x1D4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA81,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ12"
|
|
group.long 0x1D8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA82,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ13"
|
|
group.long 0x1DC++0x3
|
|
line.long 0x00 "IRQ0_IRQVA83,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ14"
|
|
group.long 0x1E0++0x3
|
|
line.long 0x00 "IRQ0_IRQVA84,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ15"
|
|
group.long 0x1E4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA85,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ16"
|
|
group.long 0x1E8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA86,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ17"
|
|
group.long 0x1EC++0x3
|
|
line.long 0x00 "IRQ0_IRQVA87,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ18"
|
|
group.long 0x1F0++0x3
|
|
line.long 0x00 "IRQ0_IRQVA88,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ19"
|
|
group.long 0x1F4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA89,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ20"
|
|
group.long 0x1F8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA90,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ21"
|
|
group.long 0x1FC++0x3
|
|
line.long 0x00 "IRQ0_IRQVA91,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ22"
|
|
group.long 0x200++0x3
|
|
line.long 0x00 "IRQ0_IRQVA92,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ23"
|
|
group.long 0x204++0x3
|
|
line.long 0x00 "IRQ0_IRQVA93,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ24"
|
|
group.long 0x208++0x3
|
|
line.long 0x00 "IRQ0_IRQVA94,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ25"
|
|
group.long 0x20C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA95,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ26"
|
|
group.long 0x210++0x3
|
|
line.long 0x00 "IRQ0_IRQVA96,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ27"
|
|
group.long 0x214++0x3
|
|
line.long 0x00 "IRQ0_IRQVA97,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ28"
|
|
group.long 0x218++0x3
|
|
line.long 0x00 "IRQ0_IRQVA98,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ29"
|
|
group.long 0x21C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA99,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ30"
|
|
group.long 0x220++0x3
|
|
line.long 0x00 "IRQ0_IRQVA100,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of EIC0IRQ31"
|
|
group.long 0x224++0x3
|
|
line.long 0x00 "IRQ0_IRQVA101,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RTCIRQ"
|
|
group.long 0x228++0x3
|
|
line.long 0x00 "IRQ0_IRQVA102,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SG0IRQ"
|
|
group.long 0x230++0x3
|
|
line.long 0x00 "IRQ0_IRQVA104,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of FRT0IRQ"
|
|
group.long 0x234++0x3
|
|
line.long 0x00 "IRQ0_IRQVA105,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of FRT1IRQ"
|
|
group.long 0x238++0x3
|
|
line.long 0x00 "IRQ0_IRQVA106,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of FRT2IRQ"
|
|
group.long 0x23C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA107,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of FRT3IRQ"
|
|
group.long 0x250++0x3
|
|
line.long 0x00 "IRQ0_IRQVA112,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of FRT16IRQ"
|
|
group.long 0x254++0x3
|
|
line.long 0x00 "IRQ0_IRQVA113,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of FRT17IRQ"
|
|
group.long 0x258++0x3
|
|
line.long 0x00 "IRQ0_IRQVA114,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of FRT18IRQ"
|
|
group.long 0x25C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA115,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of FRT19IRQ"
|
|
group.long 0x280++0x3
|
|
line.long 0x00 "IRQ0_IRQVA124,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of ICU2IRQ0"
|
|
group.long 0x284++0x3
|
|
line.long 0x00 "IRQ0_IRQVA125,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of ICU2IRQ1"
|
|
group.long 0x288++0x3
|
|
line.long 0x00 "IRQ0_IRQVA126,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of ICU3IRQ0"
|
|
group.long 0x28C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA127,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of ICU3IRQ1"
|
|
group.long 0x2A0++0x3
|
|
line.long 0x00 "IRQ0_IRQVA132,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of ICU18IRQ0"
|
|
group.long 0x2A4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA133,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of ICU18IRQ1"
|
|
group.long 0x2A8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA134,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of ICU19IRQ0"
|
|
group.long 0x2AC++0x3
|
|
line.long 0x00 "IRQ0_IRQVA135,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of ICU19IRQ1"
|
|
group.long 0x2B0++0x3
|
|
line.long 0x00 "IRQ0_IRQVA136,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of OCU0IRQ0"
|
|
group.long 0x2B4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA137,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of OCU0IRQ1"
|
|
group.long 0x2B8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA138,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of OCU1IRQ0"
|
|
group.long 0x2BC++0x3
|
|
line.long 0x00 "IRQ0_IRQVA139,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of OCU1IRQ1"
|
|
group.long 0x2D0++0x3
|
|
line.long 0x00 "IRQ0_IRQVA144,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of OCU16IRQ0"
|
|
group.long 0x2D4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA145,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of OCU16IRQ1"
|
|
group.long 0x2D8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA146,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of OCU17IRQ0"
|
|
group.long 0x2DC++0x3
|
|
line.long 0x00 "IRQ0_IRQVA147,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of OCU17IRQ1"
|
|
group.long 0x2F0++0x3
|
|
line.long 0x00 "IRQ0_IRQVA152,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of USART0IRQRX"
|
|
group.long 0x2F4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA153,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of USART0IRQTX"
|
|
group.long 0x2F8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA154,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of USART0IRQERR"
|
|
group.long 0x308++0x3
|
|
line.long 0x00 "IRQ0_IRQVA158,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of USART6IRQRX"
|
|
group.long 0x30C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA159,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of USART6IRQTX"
|
|
group.long 0x310++0x3
|
|
line.long 0x00 "IRQ0_IRQVA160,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of USART6IRQERR"
|
|
group.long 0x320++0x3
|
|
line.long 0x00 "IRQ0_IRQVA164,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of DMA0IRQD0"
|
|
group.long 0x324++0x3
|
|
line.long 0x00 "IRQ0_IRQVA165,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of DMA0IRQD1"
|
|
group.long 0x328++0x3
|
|
line.long 0x00 "IRQ0_IRQVA166,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of DMA0IRQD2"
|
|
group.long 0x32C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA167,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of DMA0IRQD3"
|
|
group.long 0x330++0x3
|
|
line.long 0x00 "IRQ0_IRQVA168,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of DMA0IRQD4"
|
|
group.long 0x334++0x3
|
|
line.long 0x00 "IRQ0_IRQVA169,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of DMA0IRQD5"
|
|
group.long 0x338++0x3
|
|
line.long 0x00 "IRQ0_IRQVA170,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of DMA0IRQD6"
|
|
group.long 0x33C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA171,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of DMA0IRQD7"
|
|
group.long 0x340++0x3
|
|
line.long 0x00 "IRQ0_IRQVA172,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of DMA0IRQERR"
|
|
group.long 0x344++0x3
|
|
line.long 0x00 "IRQ0_IRQVA173,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of MSCTIRQ"
|
|
group.long 0x348++0x3
|
|
line.long 0x00 "IRQ0_IRQVA174,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SSCTIRQ"
|
|
group.long 0x34C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA175,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RCSCTIRQ"
|
|
group.long 0x350++0x3
|
|
line.long 0x00 "IRQ0_IRQVA176,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of SRCSCTIRQ"
|
|
group.long 0x354++0x3
|
|
line.long 0x00 "IRQ0_IRQVA177,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of CORE0IRQ"
|
|
group.long 0x358++0x3
|
|
line.long 0x00 "IRQ0_IRQVA178,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RLT0IRQ"
|
|
group.long 0x35C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA179,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RLT1IRQ"
|
|
group.long 0x360++0x3
|
|
line.long 0x00 "IRQ0_IRQVA180,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RLT2IRQ"
|
|
group.long 0x364++0x3
|
|
line.long 0x00 "IRQ0_IRQVA181,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RLT3IRQ"
|
|
group.long 0x368++0x3
|
|
line.long 0x00 "IRQ0_IRQVA182,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RLT4IRQ"
|
|
group.long 0x36C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA183,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RLT5IRQ"
|
|
group.long 0x370++0x3
|
|
line.long 0x00 "IRQ0_IRQVA184,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RLT6IRQ"
|
|
group.long 0x374++0x3
|
|
line.long 0x00 "IRQ0_IRQVA185,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RLT7IRQ"
|
|
group.long 0x378++0x3
|
|
line.long 0x00 "IRQ0_IRQVA186,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RLT8IRQ"
|
|
group.long 0x37C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA187,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of RLT9IRQ"
|
|
group.long 0x398++0x07
|
|
line.long 0x00 "IRQ0_IRQVA194,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of UDC0IRQ0"
|
|
line.long 0x04 "IRQ0_IRQVA195,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x04 2.--31. 0x4 " IRQVA ,Vector Address of UDC0IRQ1"
|
|
group.long 0x3A8++0x07
|
|
line.long 0x00 "IRQ0_IRQVA198,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of I2S0IRQ"
|
|
line.long 0x04 "IRQ0_IRQVA199,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x04 2.--31. 0x4 " IRQVA ,Vector Address of I2S1IRQ"
|
|
group.long 0x3B8++0x07
|
|
line.long 0x00 "IRQ0_IRQVA202,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of I2C0IRQ"
|
|
line.long 0x04 "IRQ0_IRQVA203,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x04 2.--31. 0x4 " IRQVA ,Vector Address of I2C0IRQERR"
|
|
group.long 0x3C8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA206,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of CRC0IRQ"
|
|
group.long 0x3D0++0x3
|
|
line.long 0x00 "IRQ0_IRQVA208,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG0IRQ"
|
|
group.long 0x3D4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA209,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG1IRQ"
|
|
group.long 0x3D8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA210,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG2IRQ"
|
|
group.long 0x3DC++0x3
|
|
line.long 0x00 "IRQ0_IRQVA211,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG3IRQ"
|
|
group.long 0x3E0++0x3
|
|
line.long 0x00 "IRQ0_IRQVA212,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG4IRQ"
|
|
group.long 0x3E4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA213,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG5IRQ"
|
|
group.long 0x3E8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA214,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG6IRQ"
|
|
group.long 0x3EC++0x3
|
|
line.long 0x00 "IRQ0_IRQVA215,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG7IRQ"
|
|
group.long 0x3F0++0x3
|
|
line.long 0x00 "IRQ0_IRQVA216,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG8IRQ"
|
|
group.long 0x3F4++0x3
|
|
line.long 0x00 "IRQ0_IRQVA217,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG9IRQ"
|
|
group.long 0x3F8++0x3
|
|
line.long 0x00 "IRQ0_IRQVA218,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG10IRQ"
|
|
group.long 0x3FC++0x3
|
|
line.long 0x00 "IRQ0_IRQVA219,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG11IRQ"
|
|
group.long 0x400++0x3
|
|
line.long 0x00 "IRQ0_IRQVA220,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG12IRQ"
|
|
group.long 0x404++0x3
|
|
line.long 0x00 "IRQ0_IRQVA221,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG13IRQ"
|
|
group.long 0x408++0x3
|
|
line.long 0x00 "IRQ0_IRQVA222,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG14IRQ"
|
|
group.long 0x40C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA223,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG15IRQ"
|
|
group.long 0x430++0x3
|
|
line.long 0x00 "IRQ0_IRQVA232,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG64IRQ"
|
|
group.long 0x434++0x3
|
|
line.long 0x00 "IRQ0_IRQVA233,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG65IRQ"
|
|
group.long 0x438++0x3
|
|
line.long 0x00 "IRQ0_IRQVA234,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG66IRQ"
|
|
group.long 0x43C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA235,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG67IRQ"
|
|
group.long 0x440++0x3
|
|
line.long 0x00 "IRQ0_IRQVA236,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG68IRQ"
|
|
group.long 0x444++0x3
|
|
line.long 0x00 "IRQ0_IRQVA237,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG69IRQ"
|
|
group.long 0x448++0x3
|
|
line.long 0x00 "IRQ0_IRQVA238,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG70IRQ"
|
|
group.long 0x44C++0x3
|
|
line.long 0x00 "IRQ0_IRQVA239,IUNIT IRQ Vector Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " IRQVA ,Vector Address of PPG71IRQ"
|
|
tree.end
|
|
tree "NMI Priority Level Registers"
|
|
group.long 0x890++0x13
|
|
line.long 0x00 "IRQ0_NMIPL0,IUNIT NMI Priority Level Register 0"
|
|
bitfld.long 0x00 24.--27. " NMIPL3 ,WDGNMI Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " NMIPL2 ,SYSCNMIERR Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " NMIPL1 ,SYSCNMILVD Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " NMIPL0 ,EIC0NMI Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "IRQ0_NMIPL1,IUNIT NMI Priority Level Register 1"
|
|
bitfld.long 0x04 24.--27. " NMIPL7 ,MPUXGFXNMI Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " NMIPL5 ,MPUXDMA0NMI Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " NMIPL4 ,TPU0NMI Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "IRQ0_NMIPL2,IUNIT NMI Priority Level Register 2"
|
|
bitfld.long 0x08 24.--27. " NMIPL11 ,BECU0NMI Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 8.--11. " NMIPL9 ,IRQ0NMIERR Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 0.--3. " NMIPL8 ,MPUHMLB0NMI Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0c "IRQ0_NMIPL3,IUNIT NMI Priority Level Register 3"
|
|
bitfld.long 0x0c 16.--19. " NMIPL14 ,GFXNMI Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0c 8.--11. " NMIPL13 ,BECU3NMI Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0c 0.--3. " NMIPL12 ,BECU1NMI Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "IRQ0_NMIPL4,IUNIT NMI Priority Level Register 4"
|
|
bitfld.long 0x10 16.--19. " NMIPL18 ,MPUSHE Priority Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree "IRQ Priority Level Registers"
|
|
group.long 0x8b0++0x03
|
|
line.long 0x00 "IRQ0_IRQPL0,IUNIT IRQ Priority Level Register 0"
|
|
bitfld.long 0x00 8.--12. " IRQPL1 ,Priority level for WDGIRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. " IRQPL0 ,Priority level for SYSCIRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x8bc++0x0b
|
|
line.long 0x00 "IRQ0_IRQPL3,IUNIT IRQ Priority Level Register 1"
|
|
bitfld.long 0x00 24.--28. " IRQPL15 ,Priority level for MLB0CINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "IRQ0_IRQPL4,IUNIT IRQ Priority Level Register 2"
|
|
bitfld.long 0x04 0.--4. " IRQPL16 ,Priority level for MLB0SINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "IRQ0_IRQPL5,IUNIT IRQ Priority Level Register 3"
|
|
bitfld.long 0x08 24.--28. " IRQPL23 ,Priority level for GFXIRQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x08 16.--20. " IRQPL22 ,Priority level for GFXIRQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x8cc++0x23
|
|
line.long 0x00 "IRQ0_IRQPL7,IUNIT IRQ Priority Level Register 7"
|
|
bitfld.long 0x00 24.--28. " IRQPL31 ,Priority level for ADC0IRQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. " IRQPL30 ,Priority level for ADC0IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "IRQ0_IRQPL8,IUNIT IRQ Priority Level Register 8"
|
|
bitfld.long 0x04 24.--28. " IRQPL35 ,Priority level for SRCFGIRQERR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 16.--20. " IRQPL34 ,Priority level for RRCFGIRQERR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 8.--12. " IRQPL33 ,Priority level for ADC0IRQP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 0.--4. " IRQPL32 ,Priority level for ADC0IRQR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "IRQ0_IRQPL9,IUNIT IRQ Priority Level Register 9"
|
|
bitfld.long 0x08 16.--20. " IRQPL38 ,Priority level for IRQ0IRQERR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x08 8.--12. " IRQPL37 ,Priority level for EECFGIRQERR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x08 0.--4. " IRQPL36 ,Priority level for TCFCFGIRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x0c "IRQ0_IRQPL10,IUNIT IRQ Priority Level Register 10"
|
|
bitfld.long 0x0c 24.--28. " IRQPL43 ,Priority level for HSSPI0IRQRX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0c 16.--20. " IRQPL42 ,Priority level for EICU0IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0c 8.--12. " IRQPL41 ,Priority level for EECFGIRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x10 "IRQ0_IRQPL11,IUNIT IRQ Priority Level Register 11"
|
|
bitfld.long 0x10 8.--12. " IRQPL45 ,Priority level for SHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x10 0.--4. " IRQPL44 ,Priority level for HSSPI0IRQTX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x14 "IRQ0_IRQPL12,IUNIT IRQ Priority Level Register 12"
|
|
bitfld.long 0x14 16.--20. " IRQPL50 ,Priority level for SPI0IRQTX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x14 8.--12. " IRQPL49 ,Priority level for SPI0IRQRX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x14 0.--4. " IRQPL48 ,Priority level for SHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x18 "IRQ0_IRQPL13,IUNIT IRQ Priority Level Register 13"
|
|
bitfld.long 0x18 24.--28. " IRQPL55 ,Priority level for SPI2IRQRX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x18 8.--12. " IRQPL53 ,Priority level for SPI1IRQTX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x18 0.--4. " IRQPL52 ,Priority level for SPI1IRQRX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x1c "IRQ0_IRQPL14,IUNIT IRQ Priority Level Register 14"
|
|
bitfld.long 0x1c 0.--4. " IRQPL56 ,Priority level for SPI2IRQTX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x20 "IRQ0_IRQPL15,IUNIT IRQ Priority Level Register 15"
|
|
bitfld.long 0x20 16.--20. " IRQPL62 ,Priority level for CAN1IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x20 8.--12. " IRQPL61 ,Priority level for CAN0IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x8f4++0x27
|
|
line.long 0x00 "IRQ0_IRQPL17,IUNIT IRQ Priority Level Register 17"
|
|
bitfld.long 0x00 24.--28. " IRQPL71 ,Priority level for EIC0IRQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. " IRQPL70 ,Priority level for EIC0IRQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--12. " IRQPL69 ,Priority level for EIC0IRQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "IRQ0_IRQPL18,IUNIT IRQ Priority Level Register 18"
|
|
bitfld.long 0x04 24.--28. " IRQPL75 ,Priority level for EIC0IRQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 16.--20. " IRQPL74 ,Priority level for EIC0IRQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 8.--12. " IRQPL73 ,Priority level for EIC0IRQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 0.--4. " IRQPL72 ,Priority level for EIC0IRQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "IRQ0_IRQPL19,IUNIT IRQ Priority Level Register 19"
|
|
bitfld.long 0x08 24.--28. " IRQPL79 ,Priority level for EIC0IRQ10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x08 16.--20. " IRQPL78 ,Priority level for EIC0IRQ9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x08 8.--12. " IRQPL77 ,Priority level for EIC0IRQ8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x08 0.--4. " IRQPL76 ,Priority level for EIC0IRQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x0c "IRQ0_IRQPL20,IUNIT IRQ Priority Level Register 20"
|
|
bitfld.long 0x0c 24.--28. " IRQPL83 ,Priority level for EIC0IRQ14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0c 16.--20. " IRQPL82 ,Priority level for EIC0IRQ13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0c 8.--12. " IRQPL81 ,Priority level for EIC0IRQ12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0c 0.--4. " IRQPL80 ,Priority level for EIC0IRQ11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x10 "IRQ0_IRQPL21,IUNIT IRQ Priority Level Register 21"
|
|
bitfld.long 0x10 24.--28. " IRQPL87 ,Priority level for EIC0IRQ18" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x10 16.--20. " IRQPL86 ,Priority level for EIC0IRQ17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x10 8.--12. " IRQPL85 ,Priority level for EIC0IRQ16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x10 0.--4. " IRQPL84 ,Priority level for EIC0IRQ15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x14 "IRQ0_IRQPL22,IUNIT IRQ Priority Level Register 22"
|
|
bitfld.long 0x14 24.--28. " IRQPL91 ,Priority level for EIC0IRQ22" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x14 16.--20. " IRQPL90 ,Priority level for EIC0IRQ21" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x14 8.--12. " IRQPL89 ,Priority level for EIC0IRQ20" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x14 0.--4. " IRQPL88 ,Priority level for EIC0IRQ19" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x18 "IRQ0_IRQPL23,IUNIT IRQ Priority Level Register 23"
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bitfld.long 0x18 24.--28. " IRQPL95 ,Priority level for EIC0IRQ26" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x18 16.--20. " IRQPL94 ,Priority level for EIC0IRQ25" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x18 8.--12. " IRQPL93 ,Priority level for EIC0IRQ24" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x18 0.--4. " IRQPL92 ,Priority level for EIC0IRQ23" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x1c "IRQ0_IRQPL24,IUNIT IRQ Priority Level Register 24"
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bitfld.long 0x1c 24.--28. " IRQPL99 ,Priority level for EIC0IRQ30" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x1c 16.--20. " IRQPL98 ,Priority level for EIC0IRQ29" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x1c 8.--12. " IRQPL97 ,Priority level for EIC0IRQ28" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x1c 0.--4. " IRQPL96 ,Priority level for EIC0IRQ27" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x20 "IRQ0_IRQPL25,IUNIT IRQ Priority Level Register 25"
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bitfld.long 0x20 16.--20. " IRQPL102 ,Priority level for SG0IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x20 8.--12. " IRQPL101 ,Priority level for RTCIRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x20 0.--4. " IRQPL100 ,Priority level for EIC0IRQ31" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x24 "IRQ0_IRQPL26,IUNIT IRQ Priority Level Register 26"
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bitfld.long 0x24 24.--28. " IRQPL107 ,Priority level for FRT3IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x24 16.--20. " IRQPL106 ,Priority level for FRT2IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x24 8.--12. " IRQPL105 ,Priority level for FRT1IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x24 0.--4. " IRQPL104 ,Priority level for FRT0IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x920++0x03
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line.long 0x00 "IRQ0_IRQPL28,IUNIT IRQ Priority Level Register 28"
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bitfld.long 0x00 24.--28. " IRQPL115 ,Priority level for FRT19IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 16.--20. " IRQPL114 ,Priority level for FRT18IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 8.--12. " IRQPL113 ,Priority level for FRT17IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 0.--4. " IRQPL112 ,Priority level for FRT16IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x92c++0x3
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line.long 0x00 "IRQ0_IRQPL31,IUNIT IRQ Priority Level Register 31"
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bitfld.long 0x00 24.--28. " IRQPL127 ,Priority level for ICU3IRQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 16.--20. " IRQPL126 ,Priority level for ICU3IRQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 8.--12. " IRQPL125 ,Priority level for ICU2IRQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 0.--4. " IRQPL124 ,Priority level for ICU2IRQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x934++0x07
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line.long 0x00 "IRQ0_IRQPL33,IUNIT IRQ Priority Level Register 33"
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bitfld.long 0x00 24.--28. " IRQPL135 ,Priority level for ICU19IRQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 16.--20. " IRQPL134 ,Priority level for ICU19IRQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 8.--12. " IRQPL133 ,Priority level for ICU18IRQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 0.--4. " IRQPL132 ,Priority level for ICU18IRQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x04 "IRQ0_IRQPL34,IUNIT IRQ Priority Level Register 34"
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bitfld.long 0x04 24.--28. " IRQPL139 ,Priority level for OCU1IRQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x04 16.--20. " IRQPL138 ,Priority level for OCU1IRQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x04 8.--12. " IRQPL137 ,Priority level for OCU0IRQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x04 0.--4. " IRQPL136 ,Priority level for OCU0IRQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x940++0x03
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line.long 0x00 "IRQ0_IRQPL36,IUNIT IRQ Priority Level Register 36"
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bitfld.long 0x00 24.--28. " IRQPL147 ,Priority level for OCU17IRQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 16.--20. " IRQPL146 ,Priority level for OCU17IRQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 8.--12. " IRQPL145 ,Priority level for OCU16IRQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 0.--4. " IRQPL144 ,Priority level for OCU16IRQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x948++0x23
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line.long 0x00 "IRQ0_IRQPL38,IUNIT IRQ Priority Level Register 38"
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bitfld.long 0x00 16.--20. " IRQPL154 ,Priority level for USART0IRQERR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 8.--12. " IRQPL153 ,Priority level for USART0IRQTX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 0.--4. " IRQPL152 ,Priority level for USART0IRQRX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x04 "IRQ0_IRQPL39,IUNIT IRQ Priority Level Register 39"
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bitfld.long 0x04 24.--28. " IRQPL159 ,Priority level for USART6IRQTX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x04 16.--20. " IRQPL158 ,Priority level for USART6IRQRX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x08 "IRQ0_IRQPL40,IUNIT IRQ Priority Level Register 40"
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bitfld.long 0x08 0.--4. " IRQPL160 ,Priority level for USART6IRQERR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x0c "IRQ0_IRQPL41,IUNIT IRQ Priority Level Register 41"
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bitfld.long 0x0c 24.--28. " IRQPL167 ,Priority level for DMA0IRQD3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x0c 16.--20. " IRQPL166 ,Priority level for DMA0IRQD2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x0c 8.--12. " IRQPL165 ,Priority level for DMA0IRQD1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x0c 0.--4. " IRQPL164 ,Priority level for DMA0IRQD0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x10 "IRQ0_IRQPL42,IUNIT IRQ Priority Level Register 42"
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bitfld.long 0x10 24.--28. " IRQPL171 ,Priority level for DMA0IRQD7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x10 16.--20. " IRQPL170 ,Priority level for DMA0IRQD6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x10 8.--12. " IRQPL169 ,Priority level for DMA0IRQD5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x10 0.--4. " IRQPL168 ,Priority level for DMA0IRQD4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x14 "IRQ0_IRQPL43,IUNIT IRQ Priority Level Register 43"
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bitfld.long 0x14 24.--28. " IRQPL175 ,Priority level for RCSCTIRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x14 16.--20. " IRQPL174 ,Priority level for SSCTIRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x14 8.--12. " IRQPL173 ,Priority level for MSCTIRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x14 0.--4. " IRQPL172 ,Priority level for DMA0IRQERR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x18 "IRQ0_IRQPL44,IUNIT IRQ Priority Level Register 44"
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bitfld.long 0x18 24.--28. " IRQPL179 ,Priority level for RLT1IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x18 16.--20. " IRQPL178 ,Priority level for RLT0IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x18 8.--12. " IRQPL177 ,Priority level for CORE0IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x18 0.--4. " IRQPL176 ,Priority level for SRCSCTIRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x1c "IRQ0_IRQPL45,IUNIT IRQ Priority Level Register 45"
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bitfld.long 0x1c 24.--28. " IRQPL183 ,Priority level for RLT5IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x1c 16.--20. " IRQPL182 ,Priority level for RLT4IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x1c 8.--12. " IRQPL181 ,Priority level for RLT3IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x1c 0.--4. " IRQPL180 ,Priority level for RLT2IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x20 "IRQ0_IRQPL46,IUNIT IRQ Priority Level Register 46"
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bitfld.long 0x20 24.--28. " IRQPL187 ,Priority level for RLT9IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x20 16.--20. " IRQPL186 ,Priority level for RLT8IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x20 8.--12. " IRQPL185 ,Priority level for RLT7IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x20 0.--4. " IRQPL184 ,Priority level for RLT6IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x970++0x1f
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line.long 0x00 "IRQ0_IRQPL48,IUNIT IRQ Priority Level Register 48"
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bitfld.long 0x00 24.--28. " IRQPL195 ,Priority level for UDC0IRQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 16.--20. " IRQPL194 ,Priority level for UDC0IRQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x04 "IRQ0_IRQPL49,IUNIT IRQ Priority Level Register 49"
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bitfld.long 0x04 24.--28. " IRQPL199 ,Priority level for I2S1IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x04 16.--20. " IRQPL198 ,Priority level for I2S0IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x08 "IRQ0_IRQPL50,IUNIT IRQ Priority Level Register 50"
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bitfld.long 0x08 24.--28. " IRQPL203 ,Priority level for I2C0IRQERR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x08 16.--20. " IRQPL202 ,Priority level for I2C0IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x0c "IRQ0_IRQPL51,IUNIT IRQ Priority Level Register 51"
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bitfld.long 0x0c 16.--20. " IRQPL206 ,Priority level for CRC0IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x10 "IRQ0_IRQPL52,IUNIT IRQ Priority Level Register 52"
|
|
bitfld.long 0x10 24.--28. " IRQPL211 ,Priority level for PPG3IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x10 16.--20. " IRQPL210 ,Priority level for PPG2IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x10 8.--12. " IRQPL209 ,Priority level for PPG1IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x10 0.--4. " IRQPL208 ,Priority level for PPG0IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x14 "IRQ0_IRQPL53,IUNIT IRQ Priority Level Register 53"
|
|
bitfld.long 0x14 24.--28. " IRQPL215 ,Priority level for PPG7IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x14 16.--20. " IRQPL214 ,Priority level for PPG6IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x14 8.--12. " IRQPL213 ,Priority level for PPG5IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x14 0.--4. " IRQPL212 ,Priority level for PPG4IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x18 "IRQ0_IRQPL54,IUNIT IRQ Priority Level Register 54"
|
|
bitfld.long 0x18 24.--28. " IRQPL219 ,Priority level for PPG11IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x18 16.--20. " IRQPL218 ,Priority level for PPG10IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x18 8.--12. " IRQPL217 ,Priority level for PPG9IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x18 0.--4. " IRQPL216 ,Priority level for PPG8IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x1c "IRQ0_IRQPL55,IUNIT IRQ Priority Level Register 55"
|
|
bitfld.long 0x1c 24.--28. " IRQPL223 ,Priority level for PPG15IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x1c 16.--20. " IRQPL222 ,Priority level for PPG14IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x1c 8.--12. " IRQPL221 ,Priority level for PPG13IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x1c 0.--4. " IRQPL220 ,Priority level for PPG12IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x998++0x07
|
|
line.long 0x00 "IRQ0_IRQPL58,IUNIT IRQ Priority Level Register 58"
|
|
bitfld.long 0x00 24.--28. " IRQPL235 ,Priority level for PPG67IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. " IRQPL234 ,Priority level for PPG66IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--12. " IRQPL233 ,Priority level for PPG65IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. " IRQPL232 ,Priority level for PPG64IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "IRQ0_IRQPL59,IUNIT IRQ Priority Level Register 59"
|
|
bitfld.long 0x04 24.--28. " IRQPL239 ,Priority level for PPG71IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 16.--20. " IRQPL238 ,Priority level for PPG70IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 8.--12. " IRQPL237 ,Priority level for PPG69IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 0.--4. " IRQPL236 ,Priority level for PPG68IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "Software NMI Registers"
|
|
width 14.
|
|
wgroup.long 0xab0++0x03
|
|
line.long 0x00 "IRQ0_NMIS,IUNIT NMI Set Register"
|
|
bitfld.long 0x00 18. " NMIS[18] ,MPUSHE Software NMI Set" "No effect,Set"
|
|
bitfld.long 0x00 14. " [14] ,GFXNMI Software NMI Set" "No effect,Set"
|
|
bitfld.long 0x00 13. " [13] ,BECU3NMI Software NMI Set" "No effect,Set"
|
|
bitfld.long 0x00 12. " [12] ,BECU1NMI Software NMI Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,BECU0NMI Software NMI Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " [9] ,IRQ0NMIERR Software NMI Set" "No effect,Set"
|
|
bitfld.long 0x00 8. " [8] ,MPUHMLB0NMI Software NMI Set" "No effect,Set"
|
|
bitfld.long 0x00 7. " [7] ,MPUXGFXNMI Software NMI Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,MPUXDMA0NMI Software NMI Set" "No effect,Set"
|
|
bitfld.long 0x00 4. " [4] ,TPU0NMI Software NMI Set" "No effect,Set"
|
|
bitfld.long 0x00 3. " [3] ,WDGNMI Software NMI Set" "No effect,Set"
|
|
bitfld.long 0x00 2. " [2] ,SYSCNMIERR Software NMI Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,SYSCNMILVD Software NMI Set" "No effect,Set"
|
|
bitfld.long 0x00 0. " [0] ,EIC0NMI Software NMI Set" "No effect,Set"
|
|
wgroup.long 0xab4++0x03
|
|
line.long 0x00 "IRQ0_NMIR,IUNIT NMI Reset Register"
|
|
bitfld.long 0x00 18. " NMIR[18] ,MPUSHE Software NMI Reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " [14] ,GFXNMI Software NMI Reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " [13] ,BECU3NMI Software NMI Reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " [12] ,BECU1NMI Software NMI Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,BECU0NMI Software NMI Reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " [9] ,IRQ0NMIERR Software NMI Reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " [8] ,MPUHMLB0NMI Software NMI Reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " [7] ,MPUXGFXNMI Software NMI Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,MPUXDMA0NMI Software NMI Reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " [4] ,TPU0NMI Software NMI Reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " [3] ,WDGNMI Software NMI Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " [2] ,SYSCNMIERR Software NMI Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,SYSCNMILVD Software NMI Reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " [0] ,EIC0NMI Software NMI Reset" "No effect,Reset"
|
|
group.long 0xab8++0x03
|
|
line.long 0x00 "IRQ0_NMISIS,IUNIT NMI Software Interrupt Status Register"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " NMISIS[18]_set/clr ,MPUSHE Software Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " [14]_set/clr ,GFXNMI Software Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " [13]_set/clr ,BECU3NMI Software Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " [12]_set/clr ,BECU1NMI Software Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " [11]_set/clr ,BECU0NMI Software Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " [9]_set/clr ,IRQ0NMIERR Software Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " [8]_set/clr ,MPUHMLB0NMI Software Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " [7]_set/clr ,MPUXGFXNMI Software Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " [5]_set/clr ,MPUXDMA0NMI Software Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " [4]_set/clr ,TPU0NMI Software Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " [3]_set/clr ,WDGNMI Software Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " [2]_set/clr ,SYSCNMIERR Software Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " [1]_set/clr ,SYSCNMILVD Software Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " [0]_set/clr ,EIC0NMI Software Interrupt Status" "No interrupt,Interrupt"
|
|
tree.end
|
|
width 15.
|
|
tree "Software IRQ Registers"
|
|
wgroup.long 0xac0++0x03 "IRQ Software Interrupts 31-0"
|
|
line.long 0x00 "IRQ0_IRQS0,IUNIT IRQ Set Register 0"
|
|
bitfld.long 0x00 31. " IRQ31S ,ADC0IRQ2 Software IRQ 31 Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " IRQ30S ,ADC0IRQ Software IRQ 30 Set" "No effect,Set"
|
|
bitfld.long 0x00 23. " IRQ23S ,GFXIRQ1 Software IRQ 23 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " IRQ22S ,GFXIRQ0 Software IRQ 22 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ16S ,MLB0SINT Software IRQ 16 Set" "No effect,Set"
|
|
bitfld.long 0x00 15. " IRQ15S ,MLB0CINT Software IRQ 15 Set" "No effect,Set"
|
|
bitfld.long 0x00 1. " IRQ1S ,WDGIRQ Software IRQ 1 Set" "No effect,Set"
|
|
bitfld.long 0x00 0. " IRQ0S ,SYSCIRQ Software IRQ 0 Set" "No effect,Set"
|
|
wgroup.long 0xb00++0x03
|
|
line.long 0x00 "IRQ0_IRQR0,IUNIT IRQ Reset Register 0"
|
|
bitfld.long 0x00 31. " IRQ31R ,ADC0IRQ2 Software IRQ 31 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 30. " IRQ30R ,ADC0IRQ Software IRQ 30 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 23. " IRQ23R ,GFXIRQ1 Software IRQ 23 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 22. " IRQ22R ,GFXIRQ0 Software IRQ 22 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ16R ,MLB0SINT Software IRQ 16 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 15. " IRQ15R ,MLB0CINT Software IRQ 15 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " IRQ1R ,WDGIRQ Software IRQ 1 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " IRQ0R ,SYSCIRQ Software IRQ 0 Reset" "No effect,Reset"
|
|
group.long 0xb40++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS0,IUNIT Interrupt Status Register 0"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ31SIS_set/clr ,ADC0IRQ2 Software Interrupt 31 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ30SIS_set/clr ,ADC0IRQ Software Interrupt 30 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ23SIS_set/clr ,GFXIRQ1 Software Interrupt 23 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQ22SIS_set/clr ,GFXIRQ0 Software Interrupt 22 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ16SIS_set/clr ,MLB0SINT Software Interrupt 16 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQ15SIS_set/clr ,MLB0CINT Software Interrupt 15 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQ1SIS_set/clr ,WDGIRQ Software Interrupt 1 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQ0SIS_set/clr ,SYSCIRQ Software Interrupt 0 Status" "No interrupt,Interrupt"
|
|
wgroup.long 0xac4++0x03 "IRQ Software Interrupts 63-32"
|
|
line.long 0x00 "IRQ0_IRQS1,IUNIT IRQ Set Register 1"
|
|
bitfld.long 0x00 30. " IRQ62S ,CAN1IRQ Software IRQ 62 Set" "No effect,Set"
|
|
bitfld.long 0x00 29. " IRQ61S ,CAN0IRQ Software IRQ 61 Set" "No effect,Set"
|
|
bitfld.long 0x00 24. " IRQ56S ,SPI2IRQTX Software IRQ 56 Set" "No effect,Set"
|
|
bitfld.long 0x00 23. " IRQ55S ,SPI2IRQRX Software IRQ 55 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IRQ53S ,SPI1IRQTX Software IRQ 53 Set" "No effect,Set"
|
|
bitfld.long 0x00 20. " IRQ52S ,SPI1IRQRX Software IRQ 52 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " IRQ50S ,SPI0IRQTX Software IRQ 50 Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " IRQ49S ,SPI0IRQRX Software IRQ 49 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ48S ,SHE Software IRQ 48 Set" "No effect,Set"
|
|
bitfld.long 0x00 13. " IRQ45S ,SHE Software IRQ 45 Set" "No effect,Set"
|
|
bitfld.long 0x00 12. " IRQ44S ,HSSPI0IRQTX Software IRQ 44 Set" "No effect,Set"
|
|
bitfld.long 0x00 11. " IRQ43S ,HSSPI0IRQRX Software IRQ 43 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQ42S ,EICU0IRQ Software IRQ 42 Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " IRQ41S ,EECFGIRQ Software IRQ 41 Set" "No effect,Set"
|
|
bitfld.long 0x00 6. " IRQ38S ,IRQ0IRQERR Software IRQ 38 Set" "No effect,Set"
|
|
bitfld.long 0x00 5. " IRQ37S ,EECFGIRQERR Software IRQ 37 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ36S ,TCFCFGIRQ Software IRQ 36 Set" "No effect,Set"
|
|
bitfld.long 0x00 3. " IRQ35S ,SRCFGIRQERR Software IRQ 35 Set" "No effect,Set"
|
|
bitfld.long 0x00 2. " IRQ34S ,RRCFGIRQERR Software IRQ 34 Set" "No effect,Set"
|
|
bitfld.long 0x00 1. " IRQ33S ,ADC0IRQP Software IRQ 33 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IRQ32S ,ADC0IRQR Software IRQ 32 Set" "No effect,Set"
|
|
wgroup.long 0xb04++0x03
|
|
line.long 0x00 "IRQ0_IRQR1,IUNIT IRQ Reset Register 1"
|
|
bitfld.long 0x00 30. " IRQ62R ,CAN1IRQ Software IRQ 62 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 29. " IRQ61R ,CAN0IRQ Software IRQ 61 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 24. " IRQ56R ,SPI2IRQTX Software IRQ 56 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 23. " IRQ55R ,SPI2IRQRX Software IRQ 55 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IRQ53R ,SPI1IRQTX Software IRQ 53 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 20. " IRQ52R ,SPI1IRQRX Software IRQ 52 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 18. " IRQ50R ,SPI0IRQTX Software IRQ 50 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 17. " IRQ49R ,SPI0IRQRX Software IRQ 49 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ48R ,SHE Software IRQ 48 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " IRQ45R ,SHE Software IRQ 45 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " IRQ44R ,HSSPI0IRQTX Software IRQ 44 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 11. " IRQ43R ,HSSPI0IRQRX Software IRQ 43 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQ42R ,EICU0IRQ Software IRQ 42 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " IRQ41R ,EECFGIRQ Software IRQ 41 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " IRQ38R ,IRQ0IRQERR Software IRQ 38 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " IRQ37R ,EECFGIRQERR Software IRQ 37 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ36R ,TCFCFGIRQ Software IRQ 36 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " IRQ35R ,SRCFGIRQERR Software IRQ 35 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " IRQ34R ,RRCFGIRQERR Software IRQ 34 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " IRQ33R ,ADC0IRQP Software IRQ 33 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IRQ32R ,ADC0IRQR Software IRQ 32 Reset" "No effect,Reset"
|
|
group.long 0xb44++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS1,IUNIT Interrupt Status Register 1"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ62SIS_set/clr ,CAN1IRQ Software Interrupt 62 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQ61SIS_set/clr ,CAN0IRQ Software Interrupt 61 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ56SIS_set/clr ,SPI2IRQTX Software Interrupt 56 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ55SIS_set/clr ,SPI2IRQRX Software Interrupt 55 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQ53SIS_set/clr ,SPI1IRQTX Software Interrupt 53 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQ52SIS_set/clr ,SPI1IRQRX Software Interrupt 52 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ50SIS_set/clr ,SPI0IRQTX Software Interrupt 50 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ49SIS_set/clr ,SPI0IRQRX Software Interrupt 49 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ48SIS_set/clr ,SHE Software Interrupt 48 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQ45SIS_set/clr ,SHE Software Interrupt 45 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQ44SIS_set/clr ,HSSPI0IRQTX Software Interrupt 44 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ43SIS_set/clr ,HSSPI0IRQRX Software Interrupt 43 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ42SIS_set/clr ,EICU0IRQ Software Interrupt 42 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ41SIS_set/clr ,EECFGIRQ Software Interrupt 41 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ38SIS_set/clr ,IRQ0IRQERR Software Interrupt 38 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ37SIS_set/clr ,EECFGIRQERR Software Interrupt 37 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQ36SIS_set/clr ,TCFCFGIRQ Software Interrupt 36 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQ35SIS_set/clr ,SRCFGIRQERR Software Interrupt 35 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQ34SIS_set/clr ,RRCFGIRQERR Software Interrupt 34 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQ33SIS_set/clr ,ADC0IRQP Software Interrupt 33 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQ32SIS_set/clr ,ADC0IRQR Software Interrupt 32 Status" "No interrupt,Interrupt"
|
|
wgroup.long 0xac8++0x03 "IRQ Software Interrupts 95-64"
|
|
line.long 0x00 "IRQ0_IRQS2,IUNIT IRQ Set Register 2"
|
|
bitfld.long 0x00 31. " IRQ95S ,EIC0IRQ26 Software IRQ 95 Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " IRQ94S ,EIC0IRQ25 Software IRQ 94 Set" "No effect,Set"
|
|
bitfld.long 0x00 29. " IRQ93S ,EIC0IRQ24 Software IRQ 93 Set" "No effect,Set"
|
|
bitfld.long 0x00 28. " IRQ92S ,EIC0IRQ23 Software IRQ 92 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQ91S ,EIC0IRQ22 Software IRQ 91 Set" "No effect,Set"
|
|
bitfld.long 0x00 26. " IRQ90S ,EIC0IRQ21 Software IRQ 90 Set" "No effect,Set"
|
|
bitfld.long 0x00 25. " IRQ89S ,EIC0IRQ20 Software IRQ 89 Set" "No effect,Set"
|
|
bitfld.long 0x00 24. " IRQ88S ,EIC0IRQ19 Software IRQ 88 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQ87S ,EIC0IRQ18 Software IRQ 87 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " IRQ86S ,EIC0IRQ17 Software IRQ 86 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " IRQ85S ,EIC0IRQ16 Software IRQ 85 Set" "No effect,Set"
|
|
bitfld.long 0x00 20. " IRQ84S ,EIC0IRQ15 Software IRQ 84 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ83S ,EIC0IRQ14 Software IRQ 83 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " IRQ82S ,EIC0IRQ13 Software IRQ 82 Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " IRQ81S ,EIC0IRQ12 Software IRQ 81 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " IRQ80S ,EIC0IRQ11 Software IRQ 80 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQ79S ,EIC0IRQ10 Software IRQ 79 Set" "No effect,Set"
|
|
bitfld.long 0x00 14. " IRQ78S ,EIC0IRQ9 Software IRQ 78 Set" "No effect,Set"
|
|
bitfld.long 0x00 13. " IRQ77S ,EIC0IRQ8 Software IRQ 77 Set" "No effect,Set"
|
|
bitfld.long 0x00 12. " IRQ76S ,EIC0IRQ7 Software IRQ 76 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ75S ,EIC0IRQ6 Software IRQ 75 Set" "No effect,Set"
|
|
bitfld.long 0x00 10. " IRQ74S ,EIC0IRQ5 Software IRQ 74 Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " IRQ73S ,EIC0IRQ4 Software IRQ 73 Set" "No effect,Set"
|
|
bitfld.long 0x00 8. " IRQ72S ,EIC0IRQ3 Software IRQ 72 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ71S ,EIC0IRQ2 Software IRQ 71 Set" "No effect,Set"
|
|
bitfld.long 0x00 6. " IRQ70S ,EIC0IRQ1 Software IRQ 70 Set" "No effect,Set"
|
|
bitfld.long 0x00 5. " IRQ69S ,EIC0IRQ0 Software IRQ 69 Set" "No effect,Set"
|
|
wgroup.long 0xb08++0x03
|
|
line.long 0x00 "IRQ0_IRQR2,IUNIT IRQ Reset Register 2"
|
|
bitfld.long 0x00 31. " IRQ95R ,EIC0IRQ26 Software IRQ 95 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 30. " IRQ94R ,EIC0IRQ25 Software IRQ 94 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 29. " IRQ93R ,EIC0IRQ24 Software IRQ 93 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 28. " IRQ92R ,EIC0IRQ23 Software IRQ 92 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQ91R ,EIC0IRQ22 Software IRQ 91 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 26. " IRQ90R ,EIC0IRQ21 Software IRQ 90 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 25. " IRQ89R ,EIC0IRQ20 Software IRQ 89 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 24. " IRQ88R ,EIC0IRQ19 Software IRQ 88 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQ87R ,EIC0IRQ18 Software IRQ 87 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 22. " IRQ86R ,EIC0IRQ17 Software IRQ 86 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 21. " IRQ85R ,EIC0IRQ16 Software IRQ 85 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 20. " IRQ84R ,EIC0IRQ15 Software IRQ 84 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ83R ,EIC0IRQ14 Software IRQ 83 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 18. " IRQ82R ,EIC0IRQ13 Software IRQ 82 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 17. " IRQ81R ,EIC0IRQ12 Software IRQ 81 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 16. " IRQ80R ,EIC0IRQ11 Software IRQ 80 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQ79R ,EIC0IRQ10 Software IRQ 79 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " IRQ78R ,EIC0IRQ9 Software IRQ 78 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " IRQ77R ,EIC0IRQ8 Software IRQ 77 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " IRQ76R ,EIC0IRQ7 Software IRQ 76 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ75R ,EIC0IRQ6 Software IRQ 75 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " IRQ74R ,EIC0IRQ5 Software IRQ 74 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " IRQ73R ,EIC0IRQ4 Software IRQ 73 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " IRQ72R ,EIC0IRQ3 Software IRQ 72 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ71R ,EIC0IRQ2 Software IRQ 71 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " IRQ70R ,EIC0IRQ1 Software IRQ 70 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " IRQ69R ,EIC0IRQ0 Software IRQ 69 Reset" "No effect,Reset"
|
|
group.long 0xb48++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS2,IUNIT Interrupt Status Register 2"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ95SIS_set/clr ,EIC0IRQ26 Software Interrupt 95 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ94SIS_set/clr ,EIC0IRQ25 Software Interrupt 94 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQ93SIS_set/clr ,EIC0IRQ24 Software Interrupt 93 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQ92SIS_set/clr ,EIC0IRQ23 Software Interrupt 92 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQ91SIS_set/clr ,EIC0IRQ22 Software Interrupt 91 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQ90SIS_set/clr ,EIC0IRQ21 Software Interrupt 90 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQ89SIS_set/clr ,EIC0IRQ20 Software Interrupt 89 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ88SIS_set/clr ,EIC0IRQ19 Software Interrupt 88 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ87SIS_set/clr ,EIC0IRQ18 Software Interrupt 87 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQ86SIS_set/clr ,EIC0IRQ17 Software Interrupt 86 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQ85SIS_set/clr ,EIC0IRQ16 Software Interrupt 85 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQ84SIS_set/clr ,EIC0IRQ15 Software Interrupt 84 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ83SIS_set/clr ,EIC0IRQ14 Software Interrupt 83 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ82SIS_set/clr ,EIC0IRQ13 Software Interrupt 82 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ81SIS_set/clr ,EIC0IRQ12 Software Interrupt 81 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ80SIS_set/clr ,EIC0IRQ11 Software Interrupt 80 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQ79SIS_set/clr ,EIC0IRQ10 Software Interrupt 79 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQ78SIS_set/clr ,EIC0IRQ9 Software Interrupt 78 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQ77SIS_set/clr ,EIC0IRQ8 Software Interrupt 77 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQ76SIS_set/clr ,EIC0IRQ7 Software Interrupt 76 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ75SIS_set/clr ,EIC0IRQ6 Software Interrupt 75 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ74SIS_set/clr ,EIC0IRQ5 Software Interrupt 74 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ73SIS_set/clr ,EIC0IRQ4 Software Interrupt 73 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ72SIS_set/clr ,EIC0IRQ3 Software Interrupt 72 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQ71SIS_set/clr ,EIC0IRQ2 Software Interrupt 71 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ70SIS_set/clr ,EIC0IRQ1 Software Interrupt 70 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ69SIS_set/clr ,EIC0IRQ0 Software Interrupt 69 Status" "No interrupt,Interrupt"
|
|
wgroup.long 0xacc++0x03 "IRQ Software Interrupts 127-96"
|
|
line.long 0x00 "IRQ0_IRQS3,IUNIT IRQ Set Register 3"
|
|
bitfld.long 0x00 31. " IRQ127S ,ICU3IRQ1 Software IRQ 127 Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " IRQ126S ,ICU3IRQ0 Software IRQ 126 Set" "No effect,Set"
|
|
bitfld.long 0x00 29. " IRQ125S ,ICU2IRQ1 Software IRQ 125 Set" "No effect,Set"
|
|
bitfld.long 0x00 28. " IRQ124S ,ICU2IRQ0 Software IRQ 124 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ115S ,FRT19IRQ Software IRQ 115 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " IRQ114S ,FRT18IRQ Software IRQ 114 Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " IRQ113S ,FRT17IRQ Software IRQ 113 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " IRQ112S ,FRT16IRQ Software IRQ 112 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ107S ,FRT3IRQ Software IRQ 107 Set" "No effect,Set"
|
|
bitfld.long 0x00 10. " IRQ106S ,FRT2IRQ Software IRQ 106 Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " IRQ105S ,FRT1IRQ Software IRQ 105 Set" "No effect,Set"
|
|
bitfld.long 0x00 8. " IRQ104S ,FRT0IRQ Software IRQ 104 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IRQ102S ,SG0IRQ Software IRQ 102 Set" "No effect,Set"
|
|
bitfld.long 0x00 5. " IRQ101S ,RTCIRQ Software IRQ 101 Set" "No effect,Set"
|
|
bitfld.long 0x00 4. " IRQ100S ,EIC0IRQ31 Software IRQ 100 Set" "No effect,Set"
|
|
bitfld.long 0x00 3. " IRQ99S ,EIC0IRQ30 Software IRQ 99 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IRQ98S ,EIC0IRQ29 Software IRQ 98 Set" "No effect,Set"
|
|
bitfld.long 0x00 1. " IRQ97S ,EIC0IRQ28 Software IRQ 97 Set" "No effect,Set"
|
|
bitfld.long 0x00 0. " IRQ96S ,EIC0IRQ27 Software IRQ 96 Set" "No effect,Set"
|
|
wgroup.long 0xb0c++0x03
|
|
line.long 0x00 "IRQ0_IRQR3,IUNIT IRQ Reset Register 3"
|
|
bitfld.long 0x00 31. " IRQ127R ,ICU3IRQ1 Software IRQ 127 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 30. " IRQ126R ,ICU3IRQ0 Software IRQ 126 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 29. " IRQ125R ,ICU2IRQ1 Software IRQ 125 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 28. " IRQ124R ,ICU2IRQ0 Software IRQ 124 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ115R ,FRT19IRQ Software IRQ 115 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 18. " IRQ114R ,FRT18IRQ Software IRQ 114 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 17. " IRQ113R ,FRT17IRQ Software IRQ 113 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 16. " IRQ112R ,FRT16IRQ Software IRQ 112 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ107R ,FRT3IRQ Software IRQ 107 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " IRQ106R ,FRT2IRQ Software IRQ 106 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " IRQ105R ,FRT1IRQ Software IRQ 105 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " IRQ104R ,FRT0IRQ Software IRQ 104 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IRQ102R ,SG0IRQ Software IRQ 102 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " IRQ101R ,RTCIRQ Software IRQ 101 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " IRQ100R ,EIC0IRQ31 Software IRQ 100 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " IRQ99R ,EIC0IRQ30 Software IRQ 99 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IRQ98R ,EIC0IRQ29 Software IRQ 98 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " IRQ97R ,EIC0IRQ28 Software IRQ 97 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " IRQ96R ,EIC0IRQ27 Software IRQ 96 Reset" "No effect,Reset"
|
|
group.long 0xb4c++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS3,IUNIT Interrupt Status Register 3"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ127SIS_set/clr ,ICU3IRQ1 Software Interrupt 127 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ126SIS_set/clr ,ICU3IRQ0 Software Interrupt 126 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQ125SIS_set/clr ,ICU2IRQ1 Software Interrupt 125 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQ124SIS_set/clr ,ICU2IRQ0 Software Interrupt 124 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ115SIS_set/clr ,FRT19IRQ Software Interrupt 115 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ114SIS_set/clr ,FRT18IRQ Software Interrupt 114 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ113SIS_set/clr ,FRT17IRQ Software Interrupt 113 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ112SIS_set/clr ,FRT16IRQ Software Interrupt 112 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ107SIS_set/clr ,FRT3IRQ Software Interrupt 107 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ106SIS_set/clr ,FRT2IRQ Software Interrupt 106 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ105SIS_set/clr ,FRT1IRQ Software Interrupt 105 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ104SIS_set/clr ,FRT0IRQ Software Interrupt 104 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ102SIS_set/clr ,SG0IRQ Software Interrupt 102 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ101SIS_set/clr ,RTCIRQ Software Interrupt 101 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQ100SIS_set/clr ,EIC0IRQ31 Software Interrupt 100 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQ99SIS_set/clr ,EIC0IRQ30 Software Interrupt 99 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQ98SIS_set/clr ,EIC0IRQ29 Software Interrupt 98 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQ97SIS_set/clr ,EIC0IRQ28 Software Interrupt 97 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQ96SIS_set/clr ,EIC0IRQ27 Software Interrupt 96 Status" "No interrupt,Interrupt"
|
|
wgroup.long 0xad0++0x03 "IRQ Software Interrupts 159-128"
|
|
line.long 0x00 "IRQ0_IRQS4,IUNIT IRQ Set Register 4"
|
|
bitfld.long 0x00 31. " IRQ159S ,USART6IRQTX Software IRQ 159 Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " IRQ158S ,USART6IRQRX Software IRQ 158 Set" "No effect,Set"
|
|
bitfld.long 0x00 26. " IRQ154S ,USART0IRQERR Software IRQ 154 Set" "No effect,Set"
|
|
bitfld.long 0x00 25. " IRQ153S ,USART0IRQTX Software IRQ 153 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 24. " IRQ152S ,USART0IRQRX Software IRQ 152 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " IRQ147S ,OCU17IRQ1 Software IRQ 147 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " IRQ146S ,OCU17IRQ0 Software IRQ 146 Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " IRQ145S ,OCU16IRQ1 Software IRQ 145 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ144S ,OCU16IRQ0 Software IRQ 144 Set" "No effect,Set"
|
|
bitfld.long 0x00 11. " IRQ139S ,OCU1IRQ1 Software IRQ 139 Set" "No effect,Set"
|
|
bitfld.long 0x00 10. " IRQ138S ,OCU1IRQ0 Software IRQ 138 Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " IRQ137S ,OCU0IRQ1 Software IRQ 137 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IRQ136S ,OCU0IRQ0 Software IRQ 136 Set" "No effect,Set"
|
|
bitfld.long 0x00 7. " IRQ135S ,ICU19IRQ1 Software IRQ 135 Set" "No effect,Set"
|
|
bitfld.long 0x00 6. " IRQ134S ,ICU19IRQ0 Software IRQ 134 Set" "No effect,Set"
|
|
bitfld.long 0x00 5. " IRQ133S ,ICU18IRQ1 Software IRQ 133 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ132S ,ICU18IRQ0 Software IRQ 132 Set" "No effect,Set"
|
|
wgroup.long 0xb10++0x03
|
|
line.long 0x00 "IRQ0_IRQR4,IUNIT IRQ Reset Register 4"
|
|
bitfld.long 0x00 31. " IRQ159R ,USART6IRQTX Software IRQ 159 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 30. " IRQ158R ,USART6IRQRX Software IRQ 158 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 26. " IRQ154R ,USART0IRQERR Software IRQ 154 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 25. " IRQ153R ,USART0IRQTX Software IRQ 153 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 24. " IRQ152R ,USART0IRQRX Software IRQ 152 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 19. " IRQ147R ,OCU17IRQ1 Software IRQ 147 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 18. " IRQ146R ,OCU17IRQ0 Software IRQ 146 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 17. " IRQ145R ,OCU16IRQ1 Software IRQ 145 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ144R ,OCU16IRQ0 Software IRQ 144 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 11. " IRQ139R ,OCU1IRQ1 Software IRQ 139 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " IRQ138R ,OCU1IRQ0 Software IRQ 138 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " IRQ137R ,OCU0IRQ1 Software IRQ 137 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IRQ136R ,OCU0IRQ0 Software IRQ 136 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " IRQ135R ,ICU19IRQ1 Software IRQ 135 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " IRQ134R ,ICU19IRQ0 Software IRQ 134 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " IRQ133R ,ICU18IRQ1 Software IRQ 133 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ132R ,ICU18IRQ0 Software IRQ 132 Reset" "No effect,Reset"
|
|
group.long 0xb50++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS4,IUNIT Interrupt Status Register 4"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ159SIS_set/clr ,USART6IRQTX Software Interrupt 159 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ158SIS_set/clr ,USART6IRQRX Software Interrupt 158 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQ154SIS_set/clr ,USART0IRQERR Software Interrupt 154 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQ153SIS_set/clr ,USART0IRQTX Software Interrupt 153 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ152SIS_set/clr ,USART0IRQRX Software Interrupt 152 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ147SIS_set/clr ,OCU17IRQ1 Software Interrupt 147 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ146SIS_set/clr ,OCU17IRQ0 Software Interrupt 146 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ145SIS_set/clr ,OCU16IRQ1 Software Interrupt 145 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ144SIS_set/clr ,OCU16IRQ0 Software Interrupt 144 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ139SIS_set/clr ,OCU1IRQ1 Software Interrupt 139 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ138SIS_set/clr ,OCU1IRQ0 Software Interrupt 138 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ137SIS_set/clr ,OCU0IRQ1 Software Interrupt 137 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ136SIS_set/clr ,OCU0IRQ0 Software Interrupt 136 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQ135SIS_set/clr ,ICU19IRQ1 Software Interrupt 135 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ134SIS_set/clr ,ICU19IRQ0 Software Interrupt 134 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ133SIS_set/clr ,ICU18IRQ1 Software Interrupt 133 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQ132SIS_set/clr ,ICU18IRQ0 Software Interrupt 132 Status" "No interrupt,Interrupt"
|
|
wgroup.long 0xad4++0x03 "IRQ Software Interrupts 191-160"
|
|
line.long 0x00 "IRQ0_IRQS5,IUNIT IRQ Set Register 5"
|
|
bitfld.long 0x00 27. " IRQ187S ,RLT9IRQ Software IRQ 187 Set" "No effect,Set"
|
|
bitfld.long 0x00 26. " IRQ186S ,RLT8IRQ Software IRQ 186 Set" "No effect,Set"
|
|
bitfld.long 0x00 25. " IRQ185S ,RLT7IRQ Software IRQ 185 Set" "No effect,Set"
|
|
bitfld.long 0x00 24. " IRQ184S ,RLT6IRQ Software IRQ 184 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQ183S ,RLT5IRQ Software IRQ 183 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " IRQ182S ,RLT4IRQ Software IRQ 182 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " IRQ181S ,RLT3IRQ Software IRQ 181 Set" "No effect,Set"
|
|
bitfld.long 0x00 20. " IRQ180S ,RLT2IRQ Software IRQ 180 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ179S ,RLT1IRQ Software IRQ 179 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " IRQ178S ,RLT0IRQ Software IRQ 178 Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " IRQ177S ,CORE0IRQ Software IRQ 177 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " IRQ176S ,SRCSCTIRQ Software IRQ 176 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQ175S ,RCSCTIRQ Software IRQ 175 Set" "No effect,Set"
|
|
bitfld.long 0x00 14. " IRQ174S ,SSCTIRQ Software IRQ 174 Set" "No effect,Set"
|
|
bitfld.long 0x00 13. " IRQ173S ,MSCTIRQ Software IRQ 173 Set" "No effect,Set"
|
|
bitfld.long 0x00 12. " IRQ172S ,DMA0IRQERR Software IRQ 172 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ171S ,DMA0IRQD7 Software IRQ 171 Set" "No effect,Set"
|
|
bitfld.long 0x00 10. " IRQ170S ,DMA0IRQD6 Software IRQ 170 Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " IRQ169S ,DMA0IRQD5 Software IRQ 169 Set" "No effect,Set"
|
|
bitfld.long 0x00 8. " IRQ168S ,DMA0IRQD4 Software IRQ 168 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ167S ,DMA0IRQD3 Software IRQ 167 Set" "No effect,Set"
|
|
bitfld.long 0x00 6. " IRQ166S ,DMA0IRQD2 Software IRQ 166 Set" "No effect,Set"
|
|
bitfld.long 0x00 5. " IRQ165S ,DMA0IRQD1 Software IRQ 165 Set" "No effect,Set"
|
|
bitfld.long 0x00 4. " IRQ164S ,DMA0IRQD0 Software IRQ 164 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IRQ160S ,USART6IRQERR Software IRQ 160 Set" "No effect,Set"
|
|
wgroup.long 0xb14++0x03
|
|
line.long 0x00 "IRQ0_IRQR5,IUNIT IRQ Reset Register 5"
|
|
bitfld.long 0x00 27. " IRQ187R ,RLT9IRQ Software IRQ 187 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 26. " IRQ186R ,RLT8IRQ Software IRQ 186 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 25. " IRQ185R ,RLT7IRQ Software IRQ 185 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 24. " IRQ184R ,RLT6IRQ Software IRQ 184 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQ183R ,RLT5IRQ Software IRQ 183 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 22. " IRQ182R ,RLT4IRQ Software IRQ 182 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 21. " IRQ181R ,RLT3IRQ Software IRQ 181 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 20. " IRQ180R ,RLT2IRQ Software IRQ 180 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ179R ,RLT1IRQ Software IRQ 179 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 18. " IRQ178R ,RLT0IRQ Software IRQ 178 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 17. " IRQ177R ,CORE0IRQ Software IRQ 177 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 16. " IRQ176R ,SRCSCTIRQ Software IRQ 176 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQ175R ,RCSCTIRQ Software IRQ 175 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " IRQ174R ,SSCTIRQ Software IRQ 174 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " IRQ173R ,MSCTIRQ Software IRQ 173 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " IRQ172R ,DMA0IRQERR Software IRQ 172 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ171R ,DMA0IRQD7 Software IRQ 171 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " IRQ170R ,DMA0IRQD6 Software IRQ 170 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " IRQ169R ,DMA0IRQD5 Software IRQ 169 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " IRQ168R ,DMA0IRQD4 Software IRQ 168 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ167R ,DMA0IRQD3 Software IRQ 167 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " IRQ166R ,DMA0IRQD2 Software IRQ 166 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " IRQ165R ,DMA0IRQD1 Software IRQ 165 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " IRQ164R ,DMA0IRQD0 Software IRQ 164 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IRQ160R ,USART6IRQERR Software IRQ 160 Reset" "No effect,Reset"
|
|
group.long 0xb54++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS5,IUNIT Interrupt Status Register 5"
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQ187SIS_set/clr ,RLT9IRQ Software Interrupt 187 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQ186SIS_set/clr ,RLT8IRQ Software Interrupt 186 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQ185SIS_set/clr ,RLT7IRQ Software Interrupt 185 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ184SIS_set/clr ,RLT6IRQ Software Interrupt 184 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ183SIS_set/clr ,RLT5IRQ Software Interrupt 183 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQ182SIS_set/clr ,RLT4IRQ Software Interrupt 182 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQ181SIS_set/clr ,RLT3IRQ Software Interrupt 181 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQ180SIS_set/clr ,RLT2IRQ Software Interrupt 180 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ179SIS_set/clr ,RLT1IRQ Software Interrupt 179 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ178SIS_set/clr ,RLT0IRQ Software Interrupt 178 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ177SIS_set/clr ,CORE0IRQ Software Interrupt 177 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ176SIS_set/clr ,SRCSCTIRQ Software Interrupt 176 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQ175SIS_set/clr ,RCSCTIRQ Software Interrupt 175 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQ174SIS_set/clr ,SSCTIRQ Software Interrupt 174 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQ173SIS_set/clr ,MSCTIRQ Software Interrupt 173 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQ172SIS_set/clr ,DMA0IRQERR Software Interrupt 172 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ171SIS_set/clr ,DMA0IRQD7 Software Interrupt 171 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ170SIS_set/clr ,DMA0IRQD6 Software Interrupt 170 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ169SIS_set/clr ,DMA0IRQD5 Software Interrupt 169 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ168SIS_set/clr ,DMA0IRQD4 Software Interrupt 168 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQ167SIS_set/clr ,DMA0IRQD3 Software Interrupt 167 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ166SIS_set/clr ,DMA0IRQD2 Software Interrupt 166 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ165SIS_set/clr ,DMA0IRQD1 Software Interrupt 165 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQ164SIS_set/clr ,DMA0IRQD0 Software Interrupt 164 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQ160SIS_set/clr ,USART6IRQERR Software Interrupt 160 Status" "No interrupt,Interrupt"
|
|
wgroup.long 0xad8++0x03 "IRQ Software Interrupts 223-192"
|
|
line.long 0x00 "IRQ0_IRQS6,IUNIT IRQ Set Register 6"
|
|
bitfld.long 0x00 31. " IRQ223S ,PPG15IRQ Software IRQ 223 Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " IRQ222S ,PPG14IRQ Software IRQ 222 Set" "No effect,Set"
|
|
bitfld.long 0x00 29. " IRQ221S ,PPG13IRQ Software IRQ 221 Set" "No effect,Set"
|
|
bitfld.long 0x00 28. " IRQ220S ,PPG12IRQ Software IRQ 220 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQ219S ,PPG11IRQ Software IRQ 219 Set" "No effect,Set"
|
|
bitfld.long 0x00 26. " IRQ218S ,PPG10IRQ Software IRQ 218 Set" "No effect,Set"
|
|
bitfld.long 0x00 25. " IRQ217S ,PPG9IRQ Software IRQ 217 Set" "No effect,Set"
|
|
bitfld.long 0x00 24. " IRQ216S ,PPG8IRQ Software IRQ 216 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQ215S ,PPG7IRQ Software IRQ 215 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " IRQ214S ,PPG6IRQ Software IRQ 214 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " IRQ213S ,PPG5IRQ Software IRQ 213 Set" "No effect,Set"
|
|
bitfld.long 0x00 20. " IRQ212S ,PPG4IRQ Software IRQ 212 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ211S ,PPG3IRQ Software IRQ 211 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " IRQ210S ,PPG2IRQ Software IRQ 210 Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " IRQ209S ,PPG1IRQ Software IRQ 209 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " IRQ208S ,PPG0IRQ Software IRQ 208 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " IRQ206S ,CRC0IRQ Software IRQ 206 Set" "No effect,Set"
|
|
bitfld.long 0x00 11. " IRQ203S ,I2C0IRQERR Software IRQ 203 Set" "No effect,Set"
|
|
bitfld.long 0x00 10. " IRQ202S ,I2C0IRQ Software IRQ 202 Set" "No effect,Set"
|
|
bitfld.long 0x00 7. " IRQ199S ,I2S1IRQ Software IRQ 199 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IRQ198S ,I2S0IRQ Software IRQ 198 Set" "No effect,Set"
|
|
bitfld.long 0x00 3. " IRQ195S ,UDC0IRQ1 Software IRQ 195 Set" "No effect,Set"
|
|
bitfld.long 0x00 2. " IRQ194S ,UDC0IRQ0 Software IRQ 194 Set" "No effect,Set"
|
|
wgroup.long 0xb18++0x03
|
|
line.long 0x00 "IRQ0_IRQR6,IUNIT IRQ Reset Register 6"
|
|
bitfld.long 0x00 31. " IRQ223R ,PPG15IRQ Software IRQ 223 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 30. " IRQ222R ,PPG14IRQ Software IRQ 222 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 29. " IRQ221R ,PPG13IRQ Software IRQ 221 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 28. " IRQ220R ,PPG12IRQ Software IRQ 220 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQ219R ,PPG11IRQ Software IRQ 219 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 26. " IRQ218R ,PPG10IRQ Software IRQ 218 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 25. " IRQ217R ,PPG9IRQ Software IRQ 217 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 24. " IRQ216R ,PPG8IRQ Software IRQ 216 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQ215R ,PPG7IRQ Software IRQ 215 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 22. " IRQ214R ,PPG6IRQ Software IRQ 214 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 21. " IRQ213R ,PPG5IRQ Software IRQ 213 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 20. " IRQ212R ,PPG4IRQ Software IRQ 212 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ211R ,PPG3IRQ Software IRQ 211 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 18. " IRQ210R ,PPG2IRQ Software IRQ 210 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 17. " IRQ209R ,PPG1IRQ Software IRQ 209 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 16. " IRQ208R ,PPG0IRQ Software IRQ 208 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 14. " IRQ206R ,CRC0IRQ Software IRQ 206 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 11. " IRQ203R ,I2C0IRQERR Software IRQ 203 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " IRQ202R ,I2C0IRQ Software IRQ 202 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " IRQ199R ,I2S1IRQ Software IRQ 199 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IRQ198R ,I2S0IRQ Software IRQ 198 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " IRQ195R ,UDC0IRQ1 Software IRQ 195 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " IRQ194R ,UDC0IRQ0 Software IRQ 194 Reset" "No effect,Reset"
|
|
group.long 0xb58++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS6,IUNIT Interrupt Status Register 6"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ223SIS_set/clr ,PPG15IRQ Software Interrupt 223 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ222SIS_set/clr ,PPG14IRQ Software Interrupt 222 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQ221SIS_set/clr ,PPG13IRQ Software Interrupt 221 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQ220SIS_set/clr ,PPG12IRQ Software Interrupt 220 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQ219SIS_set/clr ,PPG11IRQ Software Interrupt 219 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQ218SIS_set/clr ,PPG10IRQ Software Interrupt 218 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQ217SIS_set/clr ,PPG9IRQ Software Interrupt 217 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ216SIS_set/clr ,PPG8IRQ Software Interrupt 216 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ215SIS_set/clr ,PPG7IRQ Software Interrupt 215 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQ214SIS_set/clr ,PPG6IRQ Software Interrupt 214 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQ213SIS_set/clr ,PPG5IRQ Software Interrupt 213 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQ212SIS_set/clr ,PPG4IRQ Software Interrupt 212 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ211SIS_set/clr ,PPG3IRQ Software Interrupt 211 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ210SIS_set/clr ,PPG2IRQ Software Interrupt 210 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ209SIS_set/clr ,PPG1IRQ Software Interrupt 209 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ208SIS_set/clr ,PPG0IRQ Software Interrupt 208 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQ206SIS_set/clr ,CRC0IRQ Software Interrupt 206 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ203SIS_set/clr ,I2C0IRQERR Software Interrupt 203 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ202SIS_set/clr ,I2C0IRQ Software Interrupt 202 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQ199SIS_set/clr ,I2S1IRQ Software Interrupt 199 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ198SIS_set/clr ,I2S0IRQ Software Interrupt 198 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQ195SIS_set/clr ,UDC0IRQ1 Software Interrupt 195 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQ194SIS_set/clr ,UDC0IRQ0 Software Interrupt 194 Status" "No interrupt,Interrupt"
|
|
wgroup.long 0xadc++0x03 "IRQ Software Interrupts 255-224"
|
|
line.long 0x00 "IRQ0_IRQS7,IUNIT IRQ Set Register 7"
|
|
bitfld.long 0x00 15. " IRQ239S ,PPG71IRQ Software IRQ 239 Set" "No effect,Set"
|
|
bitfld.long 0x00 14. " IRQ238S ,PPG70IRQ Software IRQ 238 Set" "No effect,Set"
|
|
bitfld.long 0x00 13. " IRQ237S ,PPG69IRQ Software IRQ 237 Set" "No effect,Set"
|
|
bitfld.long 0x00 12. " IRQ236S ,PPG68IRQ Software IRQ 236 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ235S ,PPG67IRQ Software IRQ 235 Set" "No effect,Set"
|
|
bitfld.long 0x00 10. " IRQ234S ,PPG66IRQ Software IRQ 234 Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " IRQ233S ,PPG65IRQ Software IRQ 233 Set" "No effect,Set"
|
|
bitfld.long 0x00 8. " IRQ232S ,PPG64IRQ Software IRQ 232 Set" "No effect,Set"
|
|
wgroup.long 0xb1c++0x03
|
|
line.long 0x00 "IRQ0_IRQR7,IUNIT IRQ Reset Register 7"
|
|
bitfld.long 0x00 15. " IRQ239R ,PPG71IRQ Software IRQ 239 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " IRQ238R ,PPG70IRQ Software IRQ 238 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " IRQ237R ,PPG69IRQ Software IRQ 237 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " IRQ236R ,PPG68IRQ Software IRQ 236 Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ235R ,PPG67IRQ Software IRQ 235 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " IRQ234R ,PPG66IRQ Software IRQ 234 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " IRQ233R ,PPG65IRQ Software IRQ 233 Reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " IRQ232R ,PPG64IRQ Software IRQ 232 Reset" "No effect,Reset"
|
|
group.long 0xb5c++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS7,IUNIT Interrupt Status Register 7"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQ239SIS_set/clr ,PPG71IRQ Software Interrupt 239 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQ238SIS_set/clr ,PPG70IRQ Software Interrupt 238 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQ237SIS_set/clr ,PPG69IRQ Software Interrupt 237 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQ236SIS_set/clr ,PPG68IRQ Software Interrupt 236 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ235SIS_set/clr ,PPG67IRQ Software Interrupt 235 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ234SIS_set/clr ,PPG66IRQ Software Interrupt 234 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ233SIS_set/clr ,PPG65IRQ Software Interrupt 233 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ232SIS_set/clr ,PPG64IRQ Software Interrupt 232 Status" "No interrupt,Interrupt"
|
|
sif (!CPUIS("MB9EF226")&&!CPUIS("MB9EF126")&&!CPUIS("MB9DF126")&&!CPUIS("MB9DF125"))
|
|
group.long 0xb60++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS8,IUNIT Interrupt Status Register 8"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ287SIS_set/clr ,Software Interrupt 287 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ286SIS_set/clr ,Software Interrupt 286 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQ285SIS_set/clr ,Software Interrupt 285 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQ284SIS_set/clr ,Software Interrupt 284 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQ283SIS_set/clr ,Software Interrupt 283 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQ282SIS_set/clr ,Software Interrupt 282 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQ281SIS_set/clr ,Software Interrupt 281 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ280SIS_set/clr ,Software Interrupt 280 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ279SIS_set/clr ,Software Interrupt 279 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQ278SIS_set/clr ,Software Interrupt 278 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQ277SIS_set/clr ,Software Interrupt 277 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQ276SIS_set/clr ,Software Interrupt 276 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ275SIS_set/clr ,Software Interrupt 275 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ274SIS_set/clr ,Software Interrupt 274 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ273SIS_set/clr ,Software Interrupt 273 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ272SIS_set/clr ,Software Interrupt 272 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQ271SIS_set/clr ,Software Interrupt 271 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQ270SIS_set/clr ,Software Interrupt 270 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQ269SIS_set/clr ,Software Interrupt 269 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQ268SIS_set/clr ,Software Interrupt 268 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ267SIS_set/clr ,Software Interrupt 267 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ266SIS_set/clr ,Software Interrupt 266 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ265SIS_set/clr ,Software Interrupt 265 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ264SIS_set/clr ,Software Interrupt 264 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQ263SIS_set/clr ,Software Interrupt 263 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ262SIS_set/clr ,Software Interrupt 262 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ261SIS_set/clr ,Software Interrupt 261 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQ260SIS_set/clr ,Software Interrupt 260 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQ259SIS_set/clr ,Software Interrupt 259 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQ258SIS_set/clr ,Software Interrupt 258 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQ257SIS_set/clr ,Software Interrupt 257 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQ256SIS_set/clr ,Software Interrupt 256 Status" "No interrupt,Interrupt"
|
|
group.long 0xb64++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS9,IUNIT Interrupt Status Register 9"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ319SIS_set/clr ,Software Interrupt 319 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ318SIS_set/clr ,Software Interrupt 318 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQ317SIS_set/clr ,Software Interrupt 317 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQ316SIS_set/clr ,Software Interrupt 316 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQ315SIS_set/clr ,Software Interrupt 315 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQ314SIS_set/clr ,Software Interrupt 314 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQ313SIS_set/clr ,Software Interrupt 313 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ312SIS_set/clr ,Software Interrupt 312 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ311SIS_set/clr ,Software Interrupt 311 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQ310SIS_set/clr ,Software Interrupt 310 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQ309SIS_set/clr ,Software Interrupt 309 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQ308SIS_set/clr ,Software Interrupt 308 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ307SIS_set/clr ,Software Interrupt 307 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ306SIS_set/clr ,Software Interrupt 306 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ305SIS_set/clr ,Software Interrupt 305 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ304SIS_set/clr ,Software Interrupt 304 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQ303SIS_set/clr ,Software Interrupt 303 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQ302SIS_set/clr ,Software Interrupt 302 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQ301SIS_set/clr ,Software Interrupt 301 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQ300SIS_set/clr ,Software Interrupt 300 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ299SIS_set/clr ,Software Interrupt 299 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ298SIS_set/clr ,Software Interrupt 298 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ297SIS_set/clr ,Software Interrupt 297 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ296SIS_set/clr ,Software Interrupt 296 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQ295SIS_set/clr ,Software Interrupt 295 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ294SIS_set/clr ,Software Interrupt 294 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ293SIS_set/clr ,Software Interrupt 293 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQ292SIS_set/clr ,Software Interrupt 292 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQ291SIS_set/clr ,Software Interrupt 291 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQ290SIS_set/clr ,Software Interrupt 290 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQ289SIS_set/clr ,Software Interrupt 289 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQ288SIS_set/clr ,Software Interrupt 288 Status" "No interrupt,Interrupt"
|
|
group.long 0xb68++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS10,IUNIT Interrupt Status Register 10"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ351SIS_set/clr ,Software Interrupt 351 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ350SIS_set/clr ,Software Interrupt 350 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQ349SIS_set/clr ,Software Interrupt 349 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQ348SIS_set/clr ,Software Interrupt 348 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQ347SIS_set/clr ,Software Interrupt 347 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQ346SIS_set/clr ,Software Interrupt 346 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQ345SIS_set/clr ,Software Interrupt 345 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ344SIS_set/clr ,Software Interrupt 344 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ343SIS_set/clr ,Software Interrupt 343 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQ342SIS_set/clr ,Software Interrupt 342 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQ341SIS_set/clr ,Software Interrupt 341 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQ340SIS_set/clr ,Software Interrupt 340 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ339SIS_set/clr ,Software Interrupt 339 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ338SIS_set/clr ,Software Interrupt 338 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ337SIS_set/clr ,Software Interrupt 337 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ336SIS_set/clr ,Software Interrupt 336 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQ335SIS_set/clr ,Software Interrupt 335 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQ334SIS_set/clr ,Software Interrupt 334 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQ333SIS_set/clr ,Software Interrupt 333 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQ332SIS_set/clr ,Software Interrupt 332 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ331SIS_set/clr ,Software Interrupt 331 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ330SIS_set/clr ,Software Interrupt 330 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ329SIS_set/clr ,Software Interrupt 329 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ328SIS_set/clr ,Software Interrupt 328 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQ327SIS_set/clr ,Software Interrupt 327 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ326SIS_set/clr ,Software Interrupt 326 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ325SIS_set/clr ,Software Interrupt 325 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQ324SIS_set/clr ,Software Interrupt 324 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQ323SIS_set/clr ,Software Interrupt 323 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQ322SIS_set/clr ,Software Interrupt 322 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQ321SIS_set/clr ,Software Interrupt 321 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQ320SIS_set/clr ,Software Interrupt 320 Status" "No interrupt,Interrupt"
|
|
group.long 0xb6c++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS11,IUNIT Interrupt Status Register 11"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ383SIS_set/clr ,Software Interrupt 383 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ382SIS_set/clr ,Software Interrupt 382 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQ381SIS_set/clr ,Software Interrupt 381 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQ380SIS_set/clr ,Software Interrupt 380 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQ379SIS_set/clr ,Software Interrupt 379 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQ378SIS_set/clr ,Software Interrupt 378 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQ377SIS_set/clr ,Software Interrupt 377 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ376SIS_set/clr ,Software Interrupt 376 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ375SIS_set/clr ,Software Interrupt 375 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQ374SIS_set/clr ,Software Interrupt 374 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQ373SIS_set/clr ,Software Interrupt 373 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQ372SIS_set/clr ,Software Interrupt 372 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ371SIS_set/clr ,Software Interrupt 371 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ370SIS_set/clr ,Software Interrupt 370 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ369SIS_set/clr ,Software Interrupt 369 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ368SIS_set/clr ,Software Interrupt 368 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQ367SIS_set/clr ,Software Interrupt 367 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQ366SIS_set/clr ,Software Interrupt 366 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQ365SIS_set/clr ,Software Interrupt 365 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQ364SIS_set/clr ,Software Interrupt 364 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ363SIS_set/clr ,Software Interrupt 363 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ362SIS_set/clr ,Software Interrupt 362 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ361SIS_set/clr ,Software Interrupt 361 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ360SIS_set/clr ,Software Interrupt 360 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQ359SIS_set/clr ,Software Interrupt 359 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ358SIS_set/clr ,Software Interrupt 358 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ357SIS_set/clr ,Software Interrupt 357 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQ356SIS_set/clr ,Software Interrupt 356 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQ355SIS_set/clr ,Software Interrupt 355 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQ354SIS_set/clr ,Software Interrupt 354 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQ353SIS_set/clr ,Software Interrupt 353 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQ352SIS_set/clr ,Software Interrupt 352 Status" "No interrupt,Interrupt"
|
|
group.long 0xb70++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS12,IUNIT Interrupt Status Register 12"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ415SIS_set/clr ,Software Interrupt 415 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ414SIS_set/clr ,Software Interrupt 414 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQ413SIS_set/clr ,Software Interrupt 413 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQ412SIS_set/clr ,Software Interrupt 412 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQ411SIS_set/clr ,Software Interrupt 411 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQ410SIS_set/clr ,Software Interrupt 410 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQ409SIS_set/clr ,Software Interrupt 409 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ408SIS_set/clr ,Software Interrupt 408 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ407SIS_set/clr ,Software Interrupt 407 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQ406SIS_set/clr ,Software Interrupt 406 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQ405SIS_set/clr ,Software Interrupt 405 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQ404SIS_set/clr ,Software Interrupt 404 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ403SIS_set/clr ,Software Interrupt 403 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ402SIS_set/clr ,Software Interrupt 402 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ401SIS_set/clr ,Software Interrupt 401 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ400SIS_set/clr ,Software Interrupt 400 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQ399SIS_set/clr ,Software Interrupt 399 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQ398SIS_set/clr ,Software Interrupt 398 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQ397SIS_set/clr ,Software Interrupt 397 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQ396SIS_set/clr ,Software Interrupt 396 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ395SIS_set/clr ,Software Interrupt 395 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ394SIS_set/clr ,Software Interrupt 394 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ393SIS_set/clr ,Software Interrupt 393 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ392SIS_set/clr ,Software Interrupt 392 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQ391SIS_set/clr ,Software Interrupt 391 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ390SIS_set/clr ,Software Interrupt 390 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ389SIS_set/clr ,Software Interrupt 389 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQ388SIS_set/clr ,Software Interrupt 388 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQ387SIS_set/clr ,Software Interrupt 387 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQ386SIS_set/clr ,Software Interrupt 386 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQ385SIS_set/clr ,Software Interrupt 385 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQ384SIS_set/clr ,Software Interrupt 384 Status" "No interrupt,Interrupt"
|
|
group.long 0xb74++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS13,IUNIT Interrupt Status Register 13"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ447SIS_set/clr ,Software Interrupt 447 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ446SIS_set/clr ,Software Interrupt 446 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQ445SIS_set/clr ,Software Interrupt 445 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQ444SIS_set/clr ,Software Interrupt 444 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQ443SIS_set/clr ,Software Interrupt 443 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQ442SIS_set/clr ,Software Interrupt 442 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQ441SIS_set/clr ,Software Interrupt 441 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ440SIS_set/clr ,Software Interrupt 440 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ439SIS_set/clr ,Software Interrupt 439 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQ438SIS_set/clr ,Software Interrupt 438 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQ437SIS_set/clr ,Software Interrupt 437 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQ436SIS_set/clr ,Software Interrupt 436 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ435SIS_set/clr ,Software Interrupt 435 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ434SIS_set/clr ,Software Interrupt 434 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ433SIS_set/clr ,Software Interrupt 433 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ432SIS_set/clr ,Software Interrupt 432 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQ431SIS_set/clr ,Software Interrupt 431 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQ430SIS_set/clr ,Software Interrupt 430 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQ429SIS_set/clr ,Software Interrupt 429 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQ428SIS_set/clr ,Software Interrupt 428 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ427SIS_set/clr ,Software Interrupt 427 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ426SIS_set/clr ,Software Interrupt 426 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ425SIS_set/clr ,Software Interrupt 425 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ424SIS_set/clr ,Software Interrupt 424 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQ423SIS_set/clr ,Software Interrupt 423 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ422SIS_set/clr ,Software Interrupt 422 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ421SIS_set/clr ,Software Interrupt 421 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQ420SIS_set/clr ,Software Interrupt 420 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQ419SIS_set/clr ,Software Interrupt 419 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQ418SIS_set/clr ,Software Interrupt 418 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQ417SIS_set/clr ,Software Interrupt 417 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQ416SIS_set/clr ,Software Interrupt 416 Status" "No interrupt,Interrupt"
|
|
group.long 0xb78++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS14,IUNIT Interrupt Status Register 14"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ479SIS_set/clr ,Software Interrupt 479 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ478SIS_set/clr ,Software Interrupt 478 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQ477SIS_set/clr ,Software Interrupt 477 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQ476SIS_set/clr ,Software Interrupt 476 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQ475SIS_set/clr ,Software Interrupt 475 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQ474SIS_set/clr ,Software Interrupt 474 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQ473SIS_set/clr ,Software Interrupt 473 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ472SIS_set/clr ,Software Interrupt 472 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ471SIS_set/clr ,Software Interrupt 471 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQ470SIS_set/clr ,Software Interrupt 470 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQ469SIS_set/clr ,Software Interrupt 469 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQ468SIS_set/clr ,Software Interrupt 468 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ467SIS_set/clr ,Software Interrupt 467 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ466SIS_set/clr ,Software Interrupt 466 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ465SIS_set/clr ,Software Interrupt 465 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ464SIS_set/clr ,Software Interrupt 464 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQ463SIS_set/clr ,Software Interrupt 463 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQ462SIS_set/clr ,Software Interrupt 462 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQ461SIS_set/clr ,Software Interrupt 461 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQ460SIS_set/clr ,Software Interrupt 460 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ459SIS_set/clr ,Software Interrupt 459 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ458SIS_set/clr ,Software Interrupt 458 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ457SIS_set/clr ,Software Interrupt 457 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ456SIS_set/clr ,Software Interrupt 456 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQ455SIS_set/clr ,Software Interrupt 455 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ454SIS_set/clr ,Software Interrupt 454 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ453SIS_set/clr ,Software Interrupt 453 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQ452SIS_set/clr ,Software Interrupt 452 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQ451SIS_set/clr ,Software Interrupt 451 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQ450SIS_set/clr ,Software Interrupt 450 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQ449SIS_set/clr ,Software Interrupt 449 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQ448SIS_set/clr ,Software Interrupt 448 Status" "No interrupt,Interrupt"
|
|
group.long 0xb7c++0x03
|
|
line.long 0x00 "IRQ0_IRQSIS15,IUNIT Interrupt Status Register 15"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQ511SIS_set/clr ,Software Interrupt 511 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQ510SIS_set/clr ,Software Interrupt 510 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQ509SIS_set/clr ,Software Interrupt 509 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQ508SIS_set/clr ,Software Interrupt 508 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQ507SIS_set/clr ,Software Interrupt 507 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQ506SIS_set/clr ,Software Interrupt 506 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQ505SIS_set/clr ,Software Interrupt 505 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQ504SIS_set/clr ,Software Interrupt 504 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQ503SIS_set/clr ,Software Interrupt 503 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQ502SIS_set/clr ,Software Interrupt 502 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQ501SIS_set/clr ,Software Interrupt 501 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQ500SIS_set/clr ,Software Interrupt 500 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQ499SIS_set/clr ,Software Interrupt 499 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQ498SIS_set/clr ,Software Interrupt 498 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQ497SIS_set/clr ,Software Interrupt 497 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQ496SIS_set/clr ,Software Interrupt 496 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQ495SIS_set/clr ,Software Interrupt 495 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQ494SIS_set/clr ,Software Interrupt 494 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQ493SIS_set/clr ,Software Interrupt 493 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQ492SIS_set/clr ,Software Interrupt 492 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQ491SIS_set/clr ,Software Interrupt 491 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQ490SIS_set/clr ,Software Interrupt 490 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQ489SIS_set/clr ,Software Interrupt 489 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQ488SIS_set/clr ,Software Interrupt 488 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQ487SIS_set/clr ,Software Interrupt 487 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQ486SIS_set/clr ,Software Interrupt 486 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQ485SIS_set/clr ,Software Interrupt 485 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQ484SIS_set/clr ,Software Interrupt 484 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQ483SIS_set/clr ,Software Interrupt 483 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQ482SIS_set/clr ,Software Interrupt 482 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQ481SIS_set/clr ,Software Interrupt 481 Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQ480SIS_set/clr ,Software Interrupt 480 Status" "No interrupt,Interrupt"
|
|
endif
|
|
tree.end
|
|
width 15.
|
|
tree "IRQ Channels Registers"
|
|
wgroup.long 0xb80++0x03 "IRQ Software Interrupts 31-0"
|
|
line.long 0x00 "IRQ0_IRQCES0,IUNIT IRQ Channel Enable Set Register 0"
|
|
bitfld.long 0x00 31. " IRQC31ES ,ADC0IRQ2 IRQ Channel 31 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " IRQC30ES ,ADC0IRQ IRQ Channel 30 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 23. " IRQC23ES ,GFXIRQ1 IRQ Channel 23 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " IRQC22ES ,GFXIRQ0 IRQ Channel 22 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC16ES ,MLB0SINT IRQ Channel 16 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 15. " IRQC15ES ,MLB0CINT IRQ Channel 15 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 1. " IRQC1ES ,WDGIRQ IRQ Channel 1 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 0. " IRQC0ES ,SYSCIRQ IRQ Channel 0 Enable Set" "No effect,Set"
|
|
wgroup.long 0xbc0++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC0,IUNIT IRQ Channel Enable Clear Register 0"
|
|
bitfld.long 0x00 31. " IRQC31EC ,ADC0IRQ2 IRQ Channel 31 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " IRQC30EC ,ADC0IRQ IRQ Channel 30 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 23. " IRQC23EC ,GFXIRQ1 IRQ Channel 23 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " IRQC22EC ,GFXIRQ0 IRQ Channel 22 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC16EC ,MLB0SINT IRQ Channel 16 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 15. " IRQC15EC ,MLB0CINT IRQ Channel 15 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " IRQC1EC ,WDGIRQ IRQ Channel 1 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " IRQC0EC ,SYSCIRQ IRQ Channel 0 Enable Clear" "No effect,Clear"
|
|
group.long 0xc00++0x03
|
|
line.long 0x00 "IRQ0_IRQCE0,IUNIT IRQ Channel Enable Register 0"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQC31E_set/clr ,ADC0IRQ2 IRQ Channel 31 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQC30E_set/clr ,ADC0IRQ IRQ Channel 30 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQC23E_set/clr ,GFXIRQ1 IRQ Channel 23 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQC22E_set/clr ,GFXIRQ0 IRQ Channel 22 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQC16E_set/clr ,MLB0SINT IRQ Channel 16 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQC15E_set/clr ,MLB0CINT IRQ Channel 15 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQC1Eset/clr ,WDGIRQ IRQ Channel 1 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQC0Eset/clr ,SYSCIRQ IRQ Channel 0 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xb84++0x03 "IRQ Software Interrupts 63-32"
|
|
line.long 0x00 "IRQ0_IRQCES1,IUNIT IRQ Channel Enable Set Register 1"
|
|
bitfld.long 0x00 30. " IRQC62ES ,CAN1IRQ IRQ Channel 62 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 29. " IRQC61ES ,CAN0IRQ IRQ Channel 61 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 24. " IRQC56ES ,SPI2IRQTX IRQ Channel 56 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 23. " IRQC55ES ,SPI2IRQRX IRQ Channel 55 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IRQC53ES ,SPI1IRQTX IRQ Channel 53 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 20. " IRQC52ES ,SPI1IRQRX IRQ Channel 52 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 18. " IRQC50ES ,SPI0IRQTX IRQ Channel 50 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 17. " IRQC49ES ,SPI0IRQRX IRQ Channel 49 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC48ES ,SHE IRQ Channel 48 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 13. " IRQC45ES ,SHE IRQ Channel 45 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 12. " IRQC44ES ,HSSPI0IRQTX IRQ Channel 44 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 11. " IRQC43ES ,HSSPI0IRQRX IRQ Channel 43 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC42ES ,EICU0IRQ IRQ Channel 42 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 9. " IRQC41ES ,EECFGIRQ IRQ Channel 41 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 6. " IRQC38ES ,IRQ0IRQERR IRQ Channel 38 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 5. " IRQC37ES ,EECFGIRQERR IRQ Channel 37 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC36ES ,TCFCFGIRQ IRQ Channel 36 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 3. " IRQC35ES ,SRCFGIRQERR IRQ Channel 35 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 2. " IRQC34ES ,RRCFGIRQERR IRQ Channel 34 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 1. " IRQC33ES ,ADC0IRQP IRQ Channel 33 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IRQC32ES ,ADC0IRQR IRQ Channel 32 Enable Set" "No effect,Enable"
|
|
wgroup.long 0xbc4++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC1,IUNIT IRQ Channel Enable Clear Register 1"
|
|
bitfld.long 0x00 30. " IRQC62EC ,CAN1IRQ IRQ Channel 62 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 29. " IRQC61EC ,CAN0IRQ IRQ Channel 61 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 24. " IRQC56EC ,SPI2IRQTX IRQ Channel 56 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 23. " IRQC55EC ,SPI2IRQRX IRQ Channel 55 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IRQC53EC ,SPI1IRQTX IRQ Channel 53 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 20. " IRQC52EC ,SPI1IRQRX IRQ Channel 52 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 18. " IRQC50EC ,SPI0IRQTX IRQ Channel 50 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 17. " IRQC49EC ,SPI0IRQRX IRQ Channel 49 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC48EC ,SHE IRQ Channel 48 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 13. " IRQC45EC ,SHE IRQ Channel 45 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 12. " IRQC44EC ,HSSPI0IRQTX IRQ Channel 44 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 11. " IRQC43EC ,HSSPI0IRQRX IRQ Channel 43 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC42EC ,EICU0IRQ IRQ Channel 42 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 9. " IRQC41EC ,EECFGIRQ IRQ Channel 41 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 6. " IRQC38EC ,IRQ0IRQERR IRQ Channel 38 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 5. " IRQC37EC ,EECFGIRQERR IRQ Channel 37 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC36EC ,TCFCFGIRQ IRQ Channel 36 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 3. " IRQC35EC ,SRCFGIRQERR IRQ Channel 35 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 2. " IRQC34EC ,RRCFGIRQERR IRQ Channel 34 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 1. " IRQC33EC ,ADC0IRQP IRQ Channel 33 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IRQC32EC ,ADC0IRQR IRQ Channel 32 Enable Clear" "No effect,Disable"
|
|
group.long 0xc04++0x03
|
|
line.long 0x00 "IRQ0_IRQCE1,IUNIT IRQ Channel Enable Register 1"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQC62E_set/clr ,CAN1IRQ IRQ Channel 62 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQC61E_set/clr ,CAN0IRQ IRQ Channel 61 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQC56E_set/clr ,SPI2IRQTX IRQ Channel 56 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQC55E_set/clr ,SPI2IRQRX IRQ Channel 55 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQC53E_set/clr ,SPI1IRQTX IRQ Channel 53 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQC52E_set/clr ,SPI1IRQRX IRQ Channel 52 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQC50E_set/clr ,SPI0IRQTX IRQ Channel 50 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQC49E_set/clr ,SPI0IRQRX IRQ Channel 49 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQC48E_set/clr ,SHE IRQ Channel 48 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQC45E_set/clr ,SHE IRQ Channel 45 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQC44E_set/clr ,HSSPI0IRQTX IRQ Channel 44 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQC43E_set/clr ,HSSPI0IRQRX IRQ Channel 43 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQC42E_set/clr ,EICU0IRQ IRQ Channel 42 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQC41E_set/clr ,EECFGIRQ IRQ Channel 41 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQC38E_set/clr ,IRQ0IRQERR IRQ Channel 38 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQC37E_set/clr ,EECFGIRQERR IRQ Channel 37 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQC36E_set/clr ,TCFCFGIRQ IRQ Channel 36 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQC35E_set/clr ,SRCFGIRQERR IRQ Channel 35 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQC34E_set/clr ,RRCFGIRQERR IRQ Channel 34 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQC33E_set/clr ,ADC0IRQP IRQ Channel 33 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQC32E_set/clr ,ADC0IRQR IRQ Channel 32 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xb88++0x03 "IRQ Software Interrupts 95-64"
|
|
line.long 0x00 "IRQ0_IRQCES2,IUNIT IRQ Channel Enable Set Register 2"
|
|
bitfld.long 0x00 31. " IRQC95ES ,EIC0IRQ26 IRQ Channel 95 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " IRQC94ES ,EIC0IRQ25 IRQ Channel 94 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 29. " IRQC93ES ,EIC0IRQ24 IRQ Channel 93 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 28. " IRQC92ES ,EIC0IRQ23 IRQ Channel 92 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQC91ES ,EIC0IRQ22 IRQ Channel 91 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 26. " IRQC90ES ,EIC0IRQ21 IRQ Channel 90 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 25. " IRQC89ES ,EIC0IRQ20 IRQ Channel 89 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 24. " IRQC88ES ,EIC0IRQ19 IRQ Channel 88 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQC87ES ,EIC0IRQ18 IRQ Channel 87 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " IRQC86ES ,EIC0IRQ17 IRQ Channel 86 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " IRQC85ES ,EIC0IRQ16 IRQ Channel 85 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 20. " IRQC84ES ,EIC0IRQ15 IRQ Channel 84 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC83ES ,EIC0IRQ14 IRQ Channel 83 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " IRQC82ES ,EIC0IRQ13 IRQ Channel 82 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " IRQC81ES ,EIC0IRQ12 IRQ Channel 81 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " IRQC80ES ,EIC0IRQ11 IRQ Channel 80 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQC79ES ,EIC0IRQ10 IRQ Channel 79 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 14. " IRQC78ES ,EIC0IRQ9 IRQ Channel 78 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 13. " IRQC77ES ,EIC0IRQ8 IRQ Channel 77 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 12. " IRQC76ES ,EIC0IRQ7 IRQ Channel 76 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQC75ES ,EIC0IRQ6 IRQ Channel 75 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 10. " IRQC74ES ,EIC0IRQ5 IRQ Channel 74 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " IRQC73ES ,EIC0IRQ4 IRQ Channel 73 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 8. " IRQC72ES ,EIC0IRQ3 IRQ Channel 72 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC71ES ,EIC0IRQ2 IRQ Channel 71 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 6. " IRQC70ES ,EIC0IRQ1 IRQ Channel 70 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 5. " IRQC69ES ,EIC0IRQ0 IRQ Channel 69 Enable Set" "No effect,Set"
|
|
wgroup.long 0xbc8++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC2,IUNIT IRQ Channel Enable Clear Register 2"
|
|
bitfld.long 0x00 31. " IRQC95EC ,EIC0IRQ26 IRQ Channel 95 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " IRQC94EC ,EIC0IRQ25 IRQ Channel 94 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 29. " IRQC93EC ,EIC0IRQ24 IRQ Channel 93 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 28. " IRQC92EC ,EIC0IRQ23 IRQ Channel 92 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQC91EC ,EIC0IRQ22 IRQ Channel 91 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " IRQC90EC ,EIC0IRQ21 IRQ Channel 90 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 25. " IRQC89EC ,EIC0IRQ20 IRQ Channel 89 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " IRQC88EC ,EIC0IRQ19 IRQ Channel 88 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQC87EC ,EIC0IRQ18 IRQ Channel 87 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " IRQC86EC ,EIC0IRQ17 IRQ Channel 86 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " IRQC85EC ,EIC0IRQ16 IRQ Channel 85 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " IRQC84EC ,EIC0IRQ15 IRQ Channel 84 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC83EC ,EIC0IRQ14 IRQ Channel 83 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " IRQC82EC ,EIC0IRQ13 IRQ Channel 82 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IRQC81EC ,EIC0IRQ12 IRQ Channel 81 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " IRQC80EC ,EIC0IRQ11 IRQ Channel 80 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQC79EC ,EIC0IRQ10 IRQ Channel 79 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " IRQC78EC ,EIC0IRQ9 IRQ Channel 78 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 13. " IRQC77EC ,EIC0IRQ8 IRQ Channel 77 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " IRQC76EC ,EIC0IRQ7 IRQ Channel 76 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQC75EC ,EIC0IRQ6 IRQ Channel 75 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IRQC74EC ,EIC0IRQ5 IRQ Channel 74 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " IRQC73EC ,EIC0IRQ4 IRQ Channel 73 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " IRQC72EC ,EIC0IRQ3 IRQ Channel 72 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC71EC ,EIC0IRQ2 IRQ Channel 71 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " IRQC70EC ,EIC0IRQ1 IRQ Channel 70 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " IRQC69EC ,EIC0IRQ0 IRQ Channel 69 Enable Clear" "No effect,Clear"
|
|
group.long 0xc08++0x03
|
|
line.long 0x00 "IRQ0_IRQCE2,IUNIT IRQ Channel Enable Register 2"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQC95E_set/clr ,EIC0IRQ26 IRQ Channel 95 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQC94E_set/clr ,EIC0IRQ25 IRQ Channel 94 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQC93E_set/clr ,EIC0IRQ24 IRQ Channel 93 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQC92E_set/clr ,EIC0IRQ23 IRQ Channel 92 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQC91E_set/clr ,EIC0IRQ22 IRQ Channel 91 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQC90E_set/clr ,EIC0IRQ21 IRQ Channel 90 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQC89E_set/clr ,EIC0IRQ20 IRQ Channel 89 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQC88E_set/clr ,EIC0IRQ19 IRQ Channel 88 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQC87E_set/clr ,EIC0IRQ18 IRQ Channel 87 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQC86E_set/clr ,EIC0IRQ17 IRQ Channel 86 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQC85E_set/clr ,EIC0IRQ16 IRQ Channel 85 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQC84E_set/clr ,EIC0IRQ15 IRQ Channel 84 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQC83E_set/clr ,EIC0IRQ14 IRQ Channel 83 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQC82E_set/clr ,EIC0IRQ13 IRQ Channel 82 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQC82E_set/clr ,EIC0IRQ13 IRQ Channel 82 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQC81E_set/clr ,EIC0IRQ12 IRQ Channel 81 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQC80E_set/clr ,EIC0IRQ11 IRQ Channel 80 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQC79E_set/clr ,EIC0IRQ10 IRQ Channel 79 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQC78E_set/clr ,EIC0IRQ9 IRQ Channel 78 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQC77E_set/clr ,EIC0IRQ8 IRQ Channel 77 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQC76E_set/clr ,EIC0IRQ7 IRQ Channel 76 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQC75E_set/clr ,EIC0IRQ6 IRQ Channel 75 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQC74E_set/clr ,EIC0IRQ5 IRQ Channel 74 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQC73E_set/clr ,EIC0IRQ4 IRQ Channel 73 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQC72E_set/clr ,EIC0IRQ3 IRQ Channel 72 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQC71E_set/clr ,EIC0IRQ2 IRQ Channel 71 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQC70E_set/clr ,EIC0IRQ1 IRQ Channel 70 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQC69E_set/clr ,EIC0IRQ0 IRQ Channel 69 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xb8c++0x03 "IRQ Software Interrupts 127-96"
|
|
line.long 0x00 "IRQ0_IRQCES3,IUNIT IRQ Channel Enable Set Register 3"
|
|
bitfld.long 0x00 31. " IRQC127ES ,ICU3IRQ1 IRQ Channel 127 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " IRQC126ES ,ICU3IRQ0 IRQ Channel 126 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 29. " IRQC125ES ,ICU2IRQ1 IRQ Channel 125 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 28. " IRQC124ES ,ICU2IRQ0 IRQ Channel 124 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC115ES ,FRT19IRQ IRQ Channel 115 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " IRQC114ES ,FRT18IRQ IRQ Channel 114 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " IRQC113ES ,FRT17IRQ IRQ Channel 113 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " IRQC112ES ,FRT16IRQ IRQ Channel 112 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQC107ES ,FRT3IRQ IRQ Channel 107 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 10. " IRQC106ES ,FRT2IRQ IRQ Channel 106 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " IRQC105ES ,FRT1IRQ IRQ Channel 105 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 8. " IRQC104ES ,FRT0IRQ IRQ Channel 104 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IRQC102ES ,SG0IRQ IRQ Channel 102 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 5. " IRQC101ES ,RTCIRQ IRQ Channel 101 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 4. " IRQC100ES ,EIC0IRQ31 IRQ Channel 100 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 3. " IRQC99ES ,EIC0IRQ30 IRQ Channel 99 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IRQC98ES ,EIC0IRQ29 IRQ Channel 98 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 1. " IRQC97ES ,EIC0IRQ28 IRQ Channel 97 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 0. " IRQC96ES ,EIC0IRQ27 IRQ Channel 96 Enable Set" "No effect,Set"
|
|
wgroup.long 0xbcc++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC3,IUNIT IRQ Channel Enable Clear Register 3"
|
|
bitfld.long 0x00 31. " IRQC127EC ,ICU3IRQ1 IRQ Channel 127 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " IRQC126EC ,ICU3IRQ0 IRQ Channel 126 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 29. " IRQC125EC ,ICU2IRQ1 IRQ Channel 125 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 28. " IRQC124EC ,ICU2IRQ0 IRQ Channel 124 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC115EC ,FRT19IRQ IRQ Channel 115 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " IRQC114EC ,FRT18IRQ IRQ Channel 114 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IRQC113EC ,FRT17IRQ IRQ Channel 113 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " IRQC112EC ,FRT16IRQ IRQ Channel 112 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQC107EC ,FRT3IRQ IRQ Channel 107 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IRQC106EC ,FRT2IRQ IRQ Channel 106 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " IRQC105EC ,FRT1IRQ IRQ Channel 105 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " IRQC104EC ,FRT0IRQ IRQ Channel 104 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IRQC102EC ,SG0IRQ IRQ Channel 102 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " IRQC101EC ,RTCIRQ IRQ Channel 101 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " IRQC100EC ,EIC0IRQ31 IRQ Channel 100 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " IRQC99EC ,EIC0IRQ30 IRQ Channel 99 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IRQC98EC ,EIC0IRQ29 IRQ Channel 98 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " IRQC97EC ,EIC0IRQ28 IRQ Channel 97 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " IRQC96EC ,EIC0IRQ27 IRQ Channel 96 Enable Clear" "No effect,Clear"
|
|
group.long 0xc0c++0x03
|
|
line.long 0x00 "IRQ0_IRQCE3,IUNIT IRQ Channel Enable Register 3"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQC127E_set/clr ,ICU3IRQ1 IRQ Channel 127 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQC126E_set/clr ,ICU3IRQ0 IRQ Channel 126 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQC125E_set/clr ,ICU2IRQ1 IRQ Channel 125 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQC124E_set/clr ,ICU2IRQ0 IRQ Channel 124 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQC115E_set/clr ,FRT19IRQ IRQ Channel 115 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQC114E_set/clr ,FRT18IRQ IRQ Channel 114 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQC113E_set/clr ,FRT17IRQ IRQ Channel 113 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQC112E_set/clr ,FRT16IRQ IRQ Channel 112 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQC107E_set/clr ,FRT3IRQ IRQ Channel 107 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQC106E_set/clr ,FRT2IRQ IRQ Channel 106 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQC105E_set/clr ,FRT1IRQ IRQ Channel 105 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQC104E_set/clr ,FRT0IRQ IRQ Channel 104 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQC102E_set/clr ,SG0IRQ IRQ Channel 102 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQC101E_set/clr ,RTCIRQ IRQ Channel 101 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQC100E_set/clr ,EIC0IRQ31 IRQ Channel 100 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQC99E_set/clr ,EIC0IRQ30 IRQ Channel 99 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQC98E_set/clr ,EIC0IRQ29 IRQ Channel 98 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x80 1. -0x40 1. " IRQC97E_set/clr ,EIC0IRQ28 IRQ Channel 97 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQC96E_set/clr ,EIC0IRQ27 IRQ Channel 96 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xb90++0x03 "IRQ Software Interrupts 159-128"
|
|
line.long 0x00 "IRQ0_IRQCES4,IUNIT IRQ Channel Enable Set Register 4"
|
|
bitfld.long 0x00 31. " IRQC159ES ,USART6IRQTX IRQ Channel 159 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " IRQC158ES ,USART6IRQRX IRQ Channel 158 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 26. " IRQC154ES ,USART0IRQERR IRQ Channel 154 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 25. " IRQC153ES ,USART0IRQTX IRQ Channel 153 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 24. " IRQC152ES ,USART0IRQRX IRQ Channel 152 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " IRQC147ES ,OCU17IRQ1 IRQ Channel 147 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " IRQC146ES ,OCU17IRQ0 IRQ Channel 146 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " IRQC145ES ,OCU16IRQ1 IRQ Channel 145 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC144ES ,OCU16IRQ0 IRQ Channel 144 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 11. " IRQC139ES ,OCU1IRQ1 IRQ Channel 139 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 10. " IRQC138ES ,OCU1IRQ0 IRQ Channel 138 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " IRQC137ES ,OCU0IRQ1 IRQ Channel 137 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IRQC136ES ,OCU0IRQ0 IRQ Channel 136 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 7. " IRQC135ES ,ICU19IRQ1 IRQ Channel 135 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 6. " IRQC134ES ,ICU19IRQ0 IRQ Channel 134 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 5. " IRQC133ES ,ICU18IRQ1 IRQ Channel 133 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC132ES ,ICU18IRQ0 IRQ Channel 132 Enable Set" "No effect,Set"
|
|
wgroup.long 0xbd0++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC4,IUNIT IRQ Channel Enable Clear Register 4"
|
|
bitfld.long 0x00 31. " IRQC159EC ,USART6IRQTX IRQ Channel 159 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " IRQC158EC ,USART6IRQRX IRQ Channel 158 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " IRQC154EC ,USART0IRQERR IRQ Channel 154 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 25. " IRQC153EC ,USART0IRQTX IRQ Channel 153 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 24. " IRQC152EC ,USART0IRQRX IRQ Channel 152 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 19. " IRQC147EC ,OCU17IRQ1 IRQ Channel 147 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " IRQC146EC ,OCU17IRQ0 IRQ Channel 146 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IRQC145EC ,OCU16IRQ1 IRQ Channel 145 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC144EC ,OCU16IRQ0 IRQ Channel 144 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " IRQC139EC ,OCU1IRQ1 IRQ Channel 139 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IRQC138EC ,OCU1IRQ0 IRQ Channel 138 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " IRQC137EC ,OCU0IRQ1 IRQ Channel 137 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IRQC136EC ,OCU0IRQ0 IRQ Channel 136 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 7. " IRQC135EC ,ICU19IRQ1 IRQ Channel 135 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " IRQC134EC ,ICU19IRQ0 IRQ Channel 134 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " IRQC133EC ,ICU18IRQ1 IRQ Channel 133 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC132EC ,ICU18IRQ0 IRQ Channel 132 Enable Clear" "No effect,Clear"
|
|
group.long 0xc10++0x03
|
|
line.long 0x00 "IRQ0_IRQCE4,IUNIT IRQ Channel Enable Register 4"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQC159E_set/clr ,USART6IRQTX IRQ Channel 159 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQC158E_set/clr ,USART6IRQRX IRQ Channel 158 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQC154E_set/clr ,USART0IRQERR IRQ Channel 154 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQC153E_set/clr ,USART0IRQTX IRQ Channel 153 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQC152E_set/clr ,USART0IRQRX IRQ Channel 152 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQC147E_set/clr ,OCU17IRQ1 IRQ Channel 147 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQC146E_set/clr ,OCU17IRQ0 IRQ Channel 146 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQC145E_set/clr ,OCU16IRQ1 IRQ Channel 145 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQC144E_set/clr ,OCU16IRQ0 IRQ Channel 144 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQC139E_set/clr ,OCU1IRQ1 IRQ Channel 139 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQC138E_set/clr ,OCU1IRQ0 IRQ Channel 138 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQC137E_set/clr ,OCU0IRQ1 IRQ Channel 137 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQC136E_set/clr ,OCU0IRQ0 IRQ Channel 136 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQC135E_set/clr ,ICU19IRQ1 IRQ Channel 135 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQC134E_set/clr ,ICU19IRQ0 IRQ Channel 134 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQC133E_set/clr ,ICU18IRQ1 IRQ Channel 133 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQC132E_set/clr ,ICU18IRQ0 IRQ Channel 132 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xb94++0x03 "IRQ Software Interrupts 191-160"
|
|
line.long 0x00 "IRQ0_IRQCES5,IUNIT IRQ Channel Enable Set Register 5"
|
|
bitfld.long 0x00 27. " IRQC187ES ,RLT9IRQ IRQ Channel 187 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 26. " IRQC186ES ,RLT8IRQ IRQ Channel 186 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 25. " IRQC185ES ,RLT7IRQ IRQ Channel 185 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 24. " IRQC184ES ,RLT6IRQ IRQ Channel 184 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQC183ES ,RLT5IRQ IRQ Channel 183 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " IRQC182ES ,RLT4IRQ IRQ Channel 182 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " IRQC181ES ,RLT3IRQ IRQ Channel 181 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 20. " IRQC180ES ,RLT2IRQ IRQ Channel 180 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC179ES ,RLT1IRQ IRQ Channel 179 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " IRQC178ES ,RLT0IRQ IRQ Channel 178 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " IRQC177ES ,CORE0IRQ IRQ Channel 177 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " IRQC176ES ,SRCSCTIRQ IRQ Channel 176 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQC175ES ,RCSCTIRQ IRQ Channel 175 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 14. " IRQC174ES ,SSCTIRQ IRQ Channel 174 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 13. " IRQC173ES ,MSCTIRQ IRQ Channel 173 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 12. " IRQC172ES ,DMA0IRQERR IRQ Channel 172 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQC171ES ,DMA0IRQD7 IRQ Channel 171 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 10. " IRQC170ES ,DMA0IRQD6 IRQ Channel 170 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " IRQC169ES ,DMA0IRQD5 IRQ Channel 169 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 8. " IRQC168ES ,DMA0IRQD4 IRQ Channel 168 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC167ES ,DMA0IRQD3 IRQ Channel 167 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 6. " IRQC166ES ,DMA0IRQD2 IRQ Channel 166 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 5. " IRQC165ES ,DMA0IRQD1 IRQ Channel 165 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 4. " IRQC164ES ,DMA0IRQD0 IRQ Channel 164 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IRQC160ES ,USART6IRQERR IRQ Channel 160 Enable Set" "No effect,Set"
|
|
wgroup.long 0xbd4++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC5,IUNIT IRQ Channel Enable Clear Register 5"
|
|
bitfld.long 0x00 27. " IRQC187EC ,RLT9IRQ IRQ Channel 187 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " IRQC186EC ,RLT8IRQ IRQ Channel 186 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 25. " IRQC185EC ,RLT7IRQ IRQ Channel 185 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " IRQC184EC ,RLT6IRQ IRQ Channel 184 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQC183EC ,RLT5IRQ IRQ Channel 183 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " IRQC182EC ,RLT4IRQ IRQ Channel 182 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " IRQC181EC ,RLT3IRQ IRQ Channel 181 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " IRQC180EC ,RLT2IRQ IRQ Channel 180 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC179EC ,RLT1IRQ IRQ Channel 179 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " IRQC178EC ,RLT0IRQ IRQ Channel 178 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IRQC177EC ,CORE0IRQ IRQ Channel 177 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " IRQC176EC ,SRCSCTIRQ IRQ Channel 176 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQC175EC ,RCSCTIRQ IRQ Channel 175 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " IRQC174EC ,SSCTIRQ IRQ Channel 174 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 13. " IRQC173EC ,MSCTIRQ IRQ Channel 173 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " IRQC172EC ,DMA0IRQERR IRQ Channel 172 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQC171EC ,DMA0IRQD7 IRQ Channel 171 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IRQC170EC ,DMA0IRQD6 IRQ Channel 170 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " IRQC169EC ,DMA0IRQD5 IRQ Channel 169 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " IRQC168EC ,DMA0IRQD4 IRQ Channel 168 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC167EC ,DMA0IRQD3 IRQ Channel 167 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " IRQC166EC ,DMA0IRQD2 IRQ Channel 166 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " IRQC165EC ,DMA0IRQD1 IRQ Channel 165 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " IRQC164EC ,DMA0IRQD0 IRQ Channel 164 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IRQC160EC ,USART6IRQERR IRQ Channel 160 Enable Clear" "No effect,Clear"
|
|
group.long 0xc14++0x03
|
|
line.long 0x00 "IRQ0_IRQCE5,IUNIT IRQ Channel Enable Register 5"
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQC187E_set/clr ,RLT9IRQ IRQ Channel 187 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQC186E_set/clr ,RLT8IRQ IRQ Channel 186 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQC185E_set/clr ,RLT7IRQ IRQ Channel 185 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQC184E_set/clr ,RLT6IRQ IRQ Channel 184 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQC183E_set/clr ,RLT5IRQ IRQ Channel 183 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQC182E_set/clr ,RLT4IRQ IRQ Channel 182 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQC181E_set/clr ,RLT3IRQ IRQ Channel 181 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQC180E_set/clr ,RLT2IRQ IRQ Channel 180 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQC179E_set/clr ,RLT1IRQ IRQ Channel 179 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQC178E_set/clr ,RLT0IRQ IRQ Channel 178 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQC177E_set/clr ,CORE0IRQ IRQ Channel 177 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQC176E_set/clr ,SRCSCTIRQ IRQ Channel 176 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQC175E_set/clr ,RCSCTIRQ IRQ Channel 175 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQC174E_set/clr ,SSCTIRQ IRQ Channel 174 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQC173E_set/clr ,MSCTIRQ IRQ Channel 173 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQC172E_set/clr ,DMA0IRQERR IRQ Channel 172 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQC171E_set/clr ,DMA0IRQD7 IRQ Channel 171 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQC170E_set/clr ,DMA0IRQD6 IRQ Channel 170 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQC169E_set/clr ,DMA0IRQD5 IRQ Channel 169 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQC168E_set/clr ,DMA0IRQD4 IRQ Channel 168 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQC167E_set/clr ,DMA0IRQD3 IRQ Channel 167 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQC166E_set/clr ,DMA0IRQD2 IRQ Channel 166 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x80 5. -0x40 5. " IRQC165E_set/clr ,DMA0IRQD1 IRQ Channel 165 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x80 4. -0x40 4. " IRQC164E_set/clr ,DMA0IRQD0 IRQ Channel 164 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x80 0. -0x40 0. " IRQC160E_set/clr ,USART6IRQERR IRQ Channel 160 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xb98++0x03 "IRQ Software Interrupts 223-192"
|
|
line.long 0x00 "IRQ0_IRQCES6,IUNIT IRQ Channel Enable Set Register 6"
|
|
bitfld.long 0x00 31. " IRQC223ES ,PPG15IRQ IRQ Channel 223 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " IRQC222ES ,PPG14IRQ IRQ Channel 222 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 29. " IRQC221ES ,PPG13IRQ IRQ Channel 221 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 28. " IRQC220ES ,PPG12IRQ IRQ Channel 220 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQC219ES ,PPG11IRQ IRQ Channel 219 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 26. " IRQC218ES ,PPG10IRQ IRQ Channel 218 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 25. " IRQC217ES ,PPG9IRQ IRQ Channel 217 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 24. " IRQC216ES ,PPG8IRQ IRQ Channel 216 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQC215ES ,PPG7IRQ IRQ Channel 215 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " IRQC214ES ,PPG6IRQ IRQ Channel 214 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " IRQC213ES ,PPG5IRQ IRQ Channel 213 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 20. " IRQC212ES ,PPG4IRQ IRQ Channel 212 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC211ES ,PPG3IRQ IRQ Channel 211 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " IRQC210ES ,PPG2IRQ IRQ Channel 210 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " IRQC209ES ,PPG1IRQ IRQ Channel 209 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " IRQC208ES ,PPG0IRQ IRQ Channel 208 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " IRQC206ES ,CRC0IRQ IRQ Channel 206 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 11. " IRQC203ES ,I2C0IRQERR IRQ Channel 203 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 10. " IRQC202ES ,I2C0IRQ IRQ Channel 202 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 7. " IRQC199ES ,I2S1IRQ IRQ Channel 199 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IRQC198ES ,I2S0IRQ IRQ Channel 198 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 3. " IRQC195ES ,UDC0IRQ1 IRQ Channel 195 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 2. " IRQC194ES ,UDC0IRQ0 IRQ Channel 194 Enable Set" "No effect,Set"
|
|
wgroup.long 0xbd8++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC6,IUNIT IRQ Channel Enable Clear Register 6"
|
|
bitfld.long 0x00 31. " IRQC223EC ,PPG15IRQ IRQ Channel 223 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " IRQC222EC ,PPG14IRQ IRQ Channel 222 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 29. " IRQC221EC ,PPG13IRQ IRQ Channel 221 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 28. " IRQC220EC ,PPG12IRQ IRQ Channel 220 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQC219EC ,PPG11IRQ IRQ Channel 219 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " IRQC218EC ,PPG10IRQ IRQ Channel 218 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 25. " IRQC217EC ,PPG9IRQ IRQ Channel 217 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " IRQC216EC ,PPG8IRQ IRQ Channel 216 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQC215EC ,PPG7IRQ IRQ Channel 215 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " IRQC214EC ,PPG6IRQ IRQ Channel 214 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " IRQC213EC ,PPG5IRQ IRQ Channel 213 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " IRQC212EC ,PPG4IRQ IRQ Channel 212 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC211EC ,PPG3IRQ IRQ Channel 211 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " IRQC210EC ,PPG2IRQ IRQ Channel 210 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IRQC209EC ,PPG1IRQ IRQ Channel 209 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " IRQC208EC ,PPG0IRQ IRQ Channel 208 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 14. " IRQC206EC ,CRC0IRQ IRQ Channel 206 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " IRQC203EC ,I2C0IRQERR IRQ Channel 203 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IRQC202EC ,I2C0IRQ IRQ Channel 202 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 7. " IRQC199EC ,I2S1IRQ IRQ Channel 199 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IRQC198EC ,I2S0IRQ IRQ Channel 198 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " IRQC195EC ,UDC0IRQ1 IRQ Channel 195 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " IRQC194EC ,UDC0IRQ0 IRQ Channel 194 Enable Clear" "No effect,Clear"
|
|
group.long 0xc18++0x03
|
|
line.long 0x00 "IRQ0_IRQCE6,IUNIT IRQ Channel Enable Register 6"
|
|
setclrfld.long 0x00 31. -0x80 31. -0x40 31. " IRQC223E_set/clr ,PPG15IRQ IRQ Channel 223 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x80 30. -0x40 30. " IRQC222E_set/clr ,PPG14IRQ IRQ Channel 222 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x80 29. -0x40 29. " IRQC221E_set/clr ,PPG13IRQ IRQ Channel 221 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x80 28. -0x40 28. " IRQC220E_set/clr ,PPG12IRQ IRQ Channel 220 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x80 27. -0x40 27. " IRQC219E_set/clr ,PPG11IRQ IRQ Channel 219 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x80 26. -0x40 26. " IRQC218E_set/clr ,PPG10IRQ IRQ Channel 218 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x80 25. -0x40 25. " IRQC217E_set/clr ,PPG9IRQ IRQ Channel 217 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x80 24. -0x40 24. " IRQC216E_set/clr ,PPG8IRQ IRQ Channel 216 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x80 23. -0x40 23. " IRQC215E_set/clr ,PPG7IRQ IRQ Channel 215 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x80 22. -0x40 22. " IRQC214E_set/clr ,PPG6IRQ IRQ Channel 214 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x80 21. -0x40 21. " IRQC213E_set/clr ,PPG5IRQ IRQ Channel 213 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x80 20. -0x40 20. " IRQC212E_set/clr ,PPG4IRQ IRQ Channel 212 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x80 19. -0x40 19. " IRQC211E_set/clr ,PPG3IRQ IRQ Channel 211 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x80 18. -0x40 18. " IRQC210E_set/clr ,PPG2IRQ IRQ Channel 210 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x80 17. -0x40 17. " IRQC209E_set/clr ,PPG1IRQ IRQ Channel 209 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x80 16. -0x40 16. " IRQC208E_set/clr ,PPG0IRQ IRQ Channel 208 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQC206E_set/clr ,CRC0IRQ IRQ Channel 206 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQC203E_set/clr ,I2C0IRQERR IRQ Channel 203 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQC202E_set/clr ,I2C0IRQ IRQ Channel 202 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x80 7. -0x40 7. " IRQC199E_set/clr ,I2S1IRQ IRQ Channel 199 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x80 6. -0x40 6. " IRQC198E_set/clr ,I2S0IRQ IRQ Channel 198 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x80 3. -0x40 3. " IRQC195E_set/clr ,UDC0IRQ1 IRQ Channel 195 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x80 2. -0x40 2. " IRQC194E_set/clr ,UDC0IRQ0 IRQ Channel 194 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xb9c++0x03 "IRQ Software Interrupts 255-224"
|
|
line.long 0x00 "IRQ0_IRQCES7,IUNIT IRQ Channel Enable Set Register 7"
|
|
bitfld.long 0x00 15. " IRQC239ES ,PPG71IRQ IRQ Channel 239 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 14. " IRQC238ES ,PPG70IRQ IRQ Channel 238 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 13. " IRQC237ES ,PPG69IRQ IRQ Channel 237 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 12. " IRQC236ES ,PPG68IRQ IRQ Channel 236 Enable Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQC235ES ,PPG67IRQ IRQ Channel 235 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 10. " IRQC234ES ,PPG66IRQ IRQ Channel 234 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " IRQC233ES ,PPG65IRQ IRQ Channel 233 Enable Set" "No effect,Set"
|
|
bitfld.long 0x00 8. " IRQC232ES ,PPG64IRQ IRQ Channel 232 Enable Set" "No effect,Set"
|
|
wgroup.long 0xbdc++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC7,IUNIT IRQ Channel Enable Clear Register 7"
|
|
bitfld.long 0x00 15. " IRQC239EC ,PPG71IRQ IRQ Channel 239 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " IRQC238EC ,PPG70IRQ IRQ Channel 238 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 13. " IRQC237EC ,PPG69IRQ IRQ Channel 237 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " IRQC236EC ,PPG68IRQ IRQ Channel 236 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQC235EC ,PPG67IRQ IRQ Channel 235 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IRQC234EC ,PPG66IRQ IRQ Channel 234 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " IRQC233EC ,PPG65IRQ IRQ Channel 233 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " IRQC232EC ,PPG64IRQ IRQ Channel 232 Enable Clear" "No effect,Clear"
|
|
group.long 0xc1c++0x03
|
|
line.long 0x00 "IRQ0_IRQCE7,IUNIT IRQ Channel Enable Register 7"
|
|
setclrfld.long 0x00 15. -0x80 15. -0x40 15. " IRQC239E_set/clr ,PPG71IRQ IRQ Channel 239 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x80 14. -0x40 14. " IRQC238E_set/clr ,PPG70IRQ IRQ Channel 238 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x80 13. -0x40 13. " IRQC237E_set/clr ,PPG69IRQ IRQ Channel 237 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x80 12. -0x40 12. " IRQC236E_set/clr ,PPG68IRQ IRQ Channel 236 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x80 11. -0x40 11. " IRQC235E_set/clr ,PPG67IRQ IRQ Channel 235 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x80 10. -0x40 10. " IRQC234E_set/clr ,PPG66IRQ IRQ Channel 234 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x80 9. -0x40 9. " IRQC233E_set/clr ,PPG65IRQ IRQ Channel 233 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x80 8. -0x40 8. " IRQC232E_set/clr ,PPG64IRQ IRQ Channel 232 Enable" "Disabled,Enabled"
|
|
sif (!CPUIS("MB9EF226")&&!CPUIS("MB9EF126")&&!CPUIS("MB9DF126")&&!CPUIS("MB9DF125"))
|
|
wgroup.long 0xba0++0x03 "IRQ Software Interrupts 287-256"
|
|
line.long 0x00 "IRQ0_IRQCES8,IUNIT IRQ Channel Enable Set Register 8"
|
|
bitfld.long 0x00 31. " IRQC287ES ,IRQ Channel 287 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 30. " IRQC286ES ,IRQ Channel 286 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 29. " IRQC285ES ,IRQ Channel 285 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC284ES ,IRQ Channel 284 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 27. " IRQC283ES ,IRQ Channel 283 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 26. " IRQC282ES ,IRQ Channel 282 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC281ES ,IRQ Channel 281 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 24. " IRQC280ES ,IRQ Channel 280 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 23. " IRQC279ES ,IRQ Channel 279 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC278ES ,IRQ Channel 278 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 21. " IRQC277ES ,IRQ Channel 277 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 20. " IRQC276ES ,IRQ Channel 276 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC275ES ,IRQ Channel 275 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 18. " IRQC274ES ,IRQ Channel 274 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 17. " IRQC273ES ,IRQ Channel 273 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC272ES ,IRQ Channel 272 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 15. " IRQC271ES ,IRQ Channel 271 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 14. " IRQC270ES ,IRQ Channel 270 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC269ES ,IRQ Channel 269 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 12. " IRQC268ES ,IRQ Channel 268 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 11. " IRQC267ES ,IRQ Channel 267 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC266ES ,IRQ Channel 266 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 9. " IRQC265ES ,IRQ Channel 265 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 8. " IRQC264ES ,IRQ Channel 264 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC263ES ,IRQ Channel 263 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 6. " IRQC262ES ,IRQ Channel 262 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 5. " IRQC261ES ,IRQ Channel 261 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC260ES ,IRQ Channel 260 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 3. " IRQC259ES ,IRQ Channel 259 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 2. " IRQC258ES ,IRQ Channel 258 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC257ES ,IRQ Channel 257 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 0. " IRQC256ES ,IRQ Channel 256 Enable Set" "No effect,Enable"
|
|
wgroup.long 0xbe0++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC8,IUNIT IRQ Channel Enable Clear Register 8"
|
|
bitfld.long 0x00 31. " IRQC287EC ,IRQ Channel 287 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 30. " IRQC286EC ,IRQ Channel 286 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 29. " IRQC285EC ,IRQ Channel 285 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC284EC ,IRQ Channel 284 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 27. " IRQC283EC ,IRQ Channel 283 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 26. " IRQC282EC ,IRQ Channel 282 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC281EC ,IRQ Channel 281 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 24. " IRQC280EC ,IRQ Channel 280 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 23. " IRQC279EC ,IRQ Channel 279 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC278EC ,IRQ Channel 278 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 21. " IRQC277EC ,IRQ Channel 277 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 20. " IRQC276EC ,IRQ Channel 276 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC275EC ,IRQ Channel 275 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 18. " IRQC274EC ,IRQ Channel 274 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 17. " IRQC273EC ,IRQ Channel 273 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC272EC ,IRQ Channel 272 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 15. " IRQC271EC ,IRQ Channel 271 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 14. " IRQC270EC ,IRQ Channel 270 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC269EC ,IRQ Channel 269 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 12. " IRQC268EC ,IRQ Channel 268 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 11. " IRQC267EC ,IRQ Channel 267 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC266EC ,IRQ Channel 266 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 9. " IRQC265EC ,IRQ Channel 265 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 8. " IRQC264EC ,IRQ Channel 264 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC263EC ,IRQ Channel 263 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 6. " IRQC262EC ,IRQ Channel 262 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 5. " IRQC261EC ,IRQ Channel 261 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC260EC ,IRQ Channel 260 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 3. " IRQC259EC ,IRQ Channel 259 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 2. " IRQC258EC ,IRQ Channel 258 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC257EC ,IRQ Channel 257 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 0. " IRQC256EC ,IRQ Channel 256 Enable Clear" "No effect,Disable"
|
|
group.long 0xbe0++0x03
|
|
line.long 0x00 "IRQ0_IRQCE8,IUNIT IRQ Channel Enable Register 8"
|
|
bitfld.long 0x00 31. " IRQC287E ,IRQ Channel 287 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IRQC286E ,IRQ Channel 286 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IRQC285E ,IRQ Channel 285 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC284E ,IRQ Channel 284 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IRQC283E ,IRQ Channel 283 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IRQC282E ,IRQ Channel 282 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC281E ,IRQ Channel 281 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IRQC280E ,IRQ Channel 280 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IRQC279E ,IRQ Channel 279 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC278E ,IRQ Channel 278 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IRQC277E ,IRQ Channel 277 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IRQC276E ,IRQ Channel 276 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC275E ,IRQ Channel 275 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IRQC274E ,IRQ Channel 274 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IRQC273E ,IRQ Channel 273 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC272E ,IRQ Channel 272 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IRQC271E ,IRQ Channel 271 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IRQC270E ,IRQ Channel 270 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC269E ,IRQ Channel 269 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IRQC268E ,IRQ Channel 268 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IRQC267E ,IRQ Channel 267 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC266E ,IRQ Channel 266 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IRQC265E ,IRQ Channel 265 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IRQC264E ,IRQ Channel 264 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC263E ,IRQ Channel 263 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IRQC262E ,IRQ Channel 262 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IRQC261E ,IRQ Channel 261 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC260E ,IRQ Channel 260 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IRQC259E ,IRQ Channel 259 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IRQC258E ,IRQ Channel 258 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC257E ,IRQ Channel 257 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IRQC256E ,IRQ Channel 256 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xba4++0x03 "IRQ Software Interrupts 319-288"
|
|
line.long 0x00 "IRQ0_IRQCES9,IUNIT IRQ Channel Enable Set Register 9"
|
|
bitfld.long 0x00 31. " IRQC319ES ,IRQ Channel 319 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 30. " IRQC318ES ,IRQ Channel 318 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 29. " IRQC317ES ,IRQ Channel 317 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC316ES ,IRQ Channel 316 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 27. " IRQC315ES ,IRQ Channel 315 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 26. " IRQC314ES ,IRQ Channel 314 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC313ES ,IRQ Channel 313 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 24. " IRQC312ES ,IRQ Channel 312 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 23. " IRQC311ES ,IRQ Channel 311 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC310ES ,IRQ Channel 310 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 21. " IRQC309ES ,IRQ Channel 309 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 20. " IRQC308ES ,IRQ Channel 308 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC307ES ,IRQ Channel 307 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 18. " IRQC306ES ,IRQ Channel 306 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 17. " IRQC305ES ,IRQ Channel 305 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC304ES ,IRQ Channel 304 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 15. " IRQC303ES ,IRQ Channel 303 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 14. " IRQC302ES ,IRQ Channel 302 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC301ES ,IRQ Channel 301 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 12. " IRQC300ES ,IRQ Channel 300 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 11. " IRQC299ES ,IRQ Channel 299 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC298ES ,IRQ Channel 298 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 9. " IRQC297ES ,IRQ Channel 297 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 8. " IRQC296ES ,IRQ Channel 296 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC295ES ,IRQ Channel 295 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 6. " IRQC294ES ,IRQ Channel 294 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 5. " IRQC293ES ,IRQ Channel 293 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC292ES ,IRQ Channel 292 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 3. " IRQC291ES ,IRQ Channel 291 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 2. " IRQC290ES ,IRQ Channel 290 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC289ES ,IRQ Channel 289 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 0. " IRQC288ES ,IRQ Channel 288 Enable Set" "No effect,Enable"
|
|
wgroup.long 0xbe4++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC9,IUNIT IRQ Channel Enable Clear Register 9"
|
|
bitfld.long 0x00 31. " IRQC319EC ,IRQ Channel 319 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 30. " IRQC318EC ,IRQ Channel 318 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 29. " IRQC317EC ,IRQ Channel 317 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC316EC ,IRQ Channel 316 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 27. " IRQC315EC ,IRQ Channel 315 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 26. " IRQC314EC ,IRQ Channel 314 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC313EC ,IRQ Channel 313 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 24. " IRQC312EC ,IRQ Channel 312 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 23. " IRQC311EC ,IRQ Channel 311 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC310EC ,IRQ Channel 310 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 21. " IRQC309EC ,IRQ Channel 309 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 20. " IRQC308EC ,IRQ Channel 308 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC307EC ,IRQ Channel 307 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 18. " IRQC306EC ,IRQ Channel 306 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 17. " IRQC305EC ,IRQ Channel 305 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC304EC ,IRQ Channel 304 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 15. " IRQC303EC ,IRQ Channel 303 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 14. " IRQC302EC ,IRQ Channel 302 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC301EC ,IRQ Channel 301 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 12. " IRQC300EC ,IRQ Channel 300 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 11. " IRQC299EC ,IRQ Channel 299 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC298EC ,IRQ Channel 298 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 9. " IRQC297EC ,IRQ Channel 297 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 8. " IRQC296EC ,IRQ Channel 296 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC295EC ,IRQ Channel 295 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 6. " IRQC294EC ,IRQ Channel 294 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 5. " IRQC293EC ,IRQ Channel 293 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC292EC ,IRQ Channel 292 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 3. " IRQC291EC ,IRQ Channel 291 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 2. " IRQC290EC ,IRQ Channel 290 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC289EC ,IRQ Channel 289 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 0. " IRQC288EC ,IRQ Channel 288 Enable Clear" "No effect,Disable"
|
|
group.long 0xbe4++0x03
|
|
line.long 0x00 "IRQ0_IRQCE9,IUNIT IRQ Channel Enable Register 9"
|
|
bitfld.long 0x00 31. " IRQC319E ,IRQ Channel 319 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IRQC318E ,IRQ Channel 318 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IRQC317E ,IRQ Channel 317 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC316E ,IRQ Channel 316 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IRQC315E ,IRQ Channel 315 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IRQC314E ,IRQ Channel 314 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC313E ,IRQ Channel 313 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IRQC312E ,IRQ Channel 312 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IRQC311E ,IRQ Channel 311 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC310E ,IRQ Channel 310 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IRQC309E ,IRQ Channel 309 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IRQC308E ,IRQ Channel 308 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC307E ,IRQ Channel 307 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IRQC306E ,IRQ Channel 306 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IRQC305E ,IRQ Channel 305 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC304E ,IRQ Channel 304 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IRQC303E ,IRQ Channel 303 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IRQC302E ,IRQ Channel 302 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC301E ,IRQ Channel 301 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IRQC300E ,IRQ Channel 300 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IRQC299E ,IRQ Channel 299 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC298E ,IRQ Channel 298 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IRQC297E ,IRQ Channel 297 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IRQC296E ,IRQ Channel 296 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC295E ,IRQ Channel 295 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IRQC294E ,IRQ Channel 294 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IRQC293E ,IRQ Channel 293 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC292E ,IRQ Channel 292 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IRQC291E ,IRQ Channel 291 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IRQC290E ,IRQ Channel 290 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC289E ,IRQ Channel 289 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IRQC288E ,IRQ Channel 288 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xba8++0x03 "IRQ Software Interrupts 351-320"
|
|
line.long 0x00 "IRQ0_IRQCES10,IUNIT IRQ Channel Enable Set Register 10"
|
|
bitfld.long 0x00 31. " IRQC351ES ,IRQ Channel 351 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 30. " IRQC350ES ,IRQ Channel 350 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 29. " IRQC349ES ,IRQ Channel 349 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC348ES ,IRQ Channel 348 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 27. " IRQC347ES ,IRQ Channel 347 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 26. " IRQC346ES ,IRQ Channel 346 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC345ES ,IRQ Channel 345 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 24. " IRQC344ES ,IRQ Channel 344 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 23. " IRQC343ES ,IRQ Channel 343 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC342ES ,IRQ Channel 342 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 21. " IRQC341ES ,IRQ Channel 341 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 20. " IRQC340ES ,IRQ Channel 340 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC339ES ,IRQ Channel 339 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 18. " IRQC338ES ,IRQ Channel 338 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 17. " IRQC337ES ,IRQ Channel 337 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC336ES ,IRQ Channel 336 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 15. " IRQC335ES ,IRQ Channel 335 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 14. " IRQC334ES ,IRQ Channel 334 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC333ES ,IRQ Channel 333 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 12. " IRQC332ES ,IRQ Channel 332 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 11. " IRQC331ES ,IRQ Channel 331 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC330ES ,IRQ Channel 330 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 9. " IRQC329ES ,IRQ Channel 329 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 8. " IRQC328ES ,IRQ Channel 328 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC327ES ,IRQ Channel 327 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 6. " IRQC326ES ,IRQ Channel 326 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 5. " IRQC325ES ,IRQ Channel 325 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC324ES ,IRQ Channel 324 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 3. " IRQC323ES ,IRQ Channel 323 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 2. " IRQC322ES ,IRQ Channel 322 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC321ES ,IRQ Channel 321 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 0. " IRQC320ES ,IRQ Channel 320 Enable Set" "No effect,Enable"
|
|
wgroup.long 0xbe8++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC10,IUNIT IRQ Channel Enable Clear Register 10"
|
|
bitfld.long 0x00 31. " IRQC351EC ,IRQ Channel 351 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 30. " IRQC350EC ,IRQ Channel 350 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 29. " IRQC349EC ,IRQ Channel 349 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC348EC ,IRQ Channel 348 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 27. " IRQC347EC ,IRQ Channel 347 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 26. " IRQC346EC ,IRQ Channel 346 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC345EC ,IRQ Channel 345 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 24. " IRQC344EC ,IRQ Channel 344 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 23. " IRQC343EC ,IRQ Channel 343 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC342EC ,IRQ Channel 342 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 21. " IRQC341EC ,IRQ Channel 341 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 20. " IRQC340EC ,IRQ Channel 340 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC339EC ,IRQ Channel 339 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 18. " IRQC338EC ,IRQ Channel 338 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 17. " IRQC337EC ,IRQ Channel 337 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC336EC ,IRQ Channel 336 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 15. " IRQC335EC ,IRQ Channel 335 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 14. " IRQC334EC ,IRQ Channel 334 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC333EC ,IRQ Channel 333 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 12. " IRQC332EC ,IRQ Channel 332 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 11. " IRQC331EC ,IRQ Channel 331 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC330EC ,IRQ Channel 330 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 9. " IRQC329EC ,IRQ Channel 329 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 8. " IRQC328EC ,IRQ Channel 328 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC327EC ,IRQ Channel 327 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 6. " IRQC326EC ,IRQ Channel 326 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 5. " IRQC325EC ,IRQ Channel 325 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC324EC ,IRQ Channel 324 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 3. " IRQC323EC ,IRQ Channel 323 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 2. " IRQC322EC ,IRQ Channel 322 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC321EC ,IRQ Channel 321 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 0. " IRQC320EC ,IRQ Channel 320 Enable Clear" "No effect,Disable"
|
|
group.long 0xbe8++0x03
|
|
line.long 0x00 "IRQ0_IRQCE10,IUNIT IRQ Channel Enable Register 10"
|
|
bitfld.long 0x00 31. " IRQC351E ,IRQ Channel 351 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IRQC350E ,IRQ Channel 350 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IRQC349E ,IRQ Channel 349 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC348E ,IRQ Channel 348 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IRQC347E ,IRQ Channel 347 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IRQC346E ,IRQ Channel 346 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC345E ,IRQ Channel 345 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IRQC344E ,IRQ Channel 344 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IRQC343E ,IRQ Channel 343 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC342E ,IRQ Channel 342 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IRQC341E ,IRQ Channel 341 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IRQC340E ,IRQ Channel 340 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC339E ,IRQ Channel 339 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IRQC338E ,IRQ Channel 338 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IRQC337E ,IRQ Channel 337 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC336E ,IRQ Channel 336 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IRQC335E ,IRQ Channel 335 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IRQC334E ,IRQ Channel 334 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC333E ,IRQ Channel 333 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IRQC332E ,IRQ Channel 332 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IRQC331E ,IRQ Channel 331 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC330E ,IRQ Channel 330 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IRQC329E ,IRQ Channel 329 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IRQC328E ,IRQ Channel 328 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC327E ,IRQ Channel 327 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IRQC326E ,IRQ Channel 326 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IRQC325E ,IRQ Channel 325 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC324E ,IRQ Channel 324 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IRQC323E ,IRQ Channel 323 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IRQC322E ,IRQ Channel 322 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC321E ,IRQ Channel 321 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IRQC320E ,IRQ Channel 320 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xbac++0x03 "IRQ Software Interrupts 384-352"
|
|
line.long 0x00 "IRQ0_IRQCES11,IUNIT IRQ Channel Enable Set Register 11"
|
|
bitfld.long 0x00 31. " IRQC384ES ,IRQ Channel 384 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 30. " IRQC383ES ,IRQ Channel 383 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 29. " IRQC382ES ,IRQ Channel 382 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC381ES ,IRQ Channel 381 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 27. " IRQC380ES ,IRQ Channel 380 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 26. " IRQC379ES ,IRQ Channel 379 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC378ES ,IRQ Channel 378 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 24. " IRQC377ES ,IRQ Channel 377 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 23. " IRQC376ES ,IRQ Channel 376 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC375ES ,IRQ Channel 375 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 21. " IRQC374ES ,IRQ Channel 374 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 20. " IRQC373ES ,IRQ Channel 373 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC372ES ,IRQ Channel 372 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 18. " IRQC371ES ,IRQ Channel 371 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 17. " IRQC370ES ,IRQ Channel 370 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC369ES ,IRQ Channel 369 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 15. " IRQC368ES ,IRQ Channel 368 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 14. " IRQC367ES ,IRQ Channel 367 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC366ES ,IRQ Channel 366 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 12. " IRQC365ES ,IRQ Channel 365 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 11. " IRQC364ES ,IRQ Channel 364 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC363ES ,IRQ Channel 363 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 9. " IRQC362ES ,IRQ Channel 362 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 8. " IRQC361ES ,IRQ Channel 361 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC360ES ,IRQ Channel 360 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 6. " IRQC359ES ,IRQ Channel 359 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 5. " IRQC358ES ,IRQ Channel 358 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC357ES ,IRQ Channel 357 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 3. " IRQC356ES ,IRQ Channel 356 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 2. " IRQC355ES ,IRQ Channel 355 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC354ES ,IRQ Channel 354 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 0. " IRQC353ES ,IRQ Channel 353 Enable Set" "No effect,Enable"
|
|
wgroup.long 0xbec++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC11,IUNIT IRQ Channel Enable Clear Register 11"
|
|
bitfld.long 0x00 31. " IRQC384EC ,IRQ Channel 384 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 30. " IRQC383EC ,IRQ Channel 383 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 29. " IRQC382EC ,IRQ Channel 382 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC381EC ,IRQ Channel 381 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 27. " IRQC380EC ,IRQ Channel 380 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 26. " IRQC379EC ,IRQ Channel 379 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC378EC ,IRQ Channel 378 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 24. " IRQC377EC ,IRQ Channel 377 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 23. " IRQC376EC ,IRQ Channel 376 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC375EC ,IRQ Channel 375 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 21. " IRQC374EC ,IRQ Channel 374 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 20. " IRQC373EC ,IRQ Channel 373 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC372EC ,IRQ Channel 372 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 18. " IRQC371EC ,IRQ Channel 371 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 17. " IRQC370EC ,IRQ Channel 370 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC369EC ,IRQ Channel 369 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 15. " IRQC368EC ,IRQ Channel 368 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 14. " IRQC367EC ,IRQ Channel 367 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC366EC ,IRQ Channel 366 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 12. " IRQC365EC ,IRQ Channel 365 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 11. " IRQC364EC ,IRQ Channel 364 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC363EC ,IRQ Channel 363 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 9. " IRQC362EC ,IRQ Channel 362 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 8. " IRQC361EC ,IRQ Channel 361 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC360EC ,IRQ Channel 360 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 6. " IRQC359EC ,IRQ Channel 359 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 5. " IRQC358EC ,IRQ Channel 358 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC357EC ,IRQ Channel 357 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 3. " IRQC356EC ,IRQ Channel 356 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 2. " IRQC355EC ,IRQ Channel 355 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC354EC ,IRQ Channel 354 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 0. " IRQC353EC ,IRQ Channel 353 Enable Clear" "No effect,Disable"
|
|
group.long 0xbec++0x03
|
|
line.long 0x00 "IRQ0_IRQCE11,IUNIT IRQ Channel Enable Register 11"
|
|
bitfld.long 0x00 31. " IRQC384E ,IRQ Channel 384 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IRQC383E ,IRQ Channel 383 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IRQC382E ,IRQ Channel 382 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC381E ,IRQ Channel 381 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IRQC380E ,IRQ Channel 380 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IRQC379E ,IRQ Channel 379 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC378E ,IRQ Channel 378 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IRQC377E ,IRQ Channel 377 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IRQC376E ,IRQ Channel 376 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC375E ,IRQ Channel 375 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IRQC374E ,IRQ Channel 374 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IRQC373E ,IRQ Channel 373 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC372E ,IRQ Channel 372 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IRQC371E ,IRQ Channel 371 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IRQC370E ,IRQ Channel 370 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC369E ,IRQ Channel 369 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IRQC368E ,IRQ Channel 368 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IRQC367E ,IRQ Channel 367 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC366E ,IRQ Channel 366 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IRQC365E ,IRQ Channel 365 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IRQC364E ,IRQ Channel 364 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC363E ,IRQ Channel 363 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IRQC362E ,IRQ Channel 362 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IRQC361E ,IRQ Channel 361 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC360E ,IRQ Channel 360 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IRQC359E ,IRQ Channel 359 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IRQC358E ,IRQ Channel 358 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC357E ,IRQ Channel 357 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IRQC356E ,IRQ Channel 356 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IRQC355E ,IRQ Channel 355 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC354E ,IRQ Channel 354 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IRQC353E ,IRQ Channel 353 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xbb0++0x03 "IRQ Software Interrupts 415-384"
|
|
line.long 0x00 "IRQ0_IRQCES12,IUNIT IRQ Channel Enable Set Register 12"
|
|
bitfld.long 0x00 31. " IRQC415ES ,IRQ Channel 415 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 30. " IRQC414ES ,IRQ Channel 414 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 29. " IRQC413ES ,IRQ Channel 413 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC412ES ,IRQ Channel 412 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 27. " IRQC411ES ,IRQ Channel 411 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 26. " IRQC410ES ,IRQ Channel 410 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC409ES ,IRQ Channel 409 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 24. " IRQC408ES ,IRQ Channel 408 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 23. " IRQC407ES ,IRQ Channel 407 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC406ES ,IRQ Channel 406 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 21. " IRQC405ES ,IRQ Channel 405 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 20. " IRQC404ES ,IRQ Channel 404 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC403ES ,IRQ Channel 403 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 18. " IRQC402ES ,IRQ Channel 402 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 17. " IRQC401ES ,IRQ Channel 401 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC400ES ,IRQ Channel 400 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 15. " IRQC399ES ,IRQ Channel 399 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 14. " IRQC398ES ,IRQ Channel 398 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC397ES ,IRQ Channel 397 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 12. " IRQC396ES ,IRQ Channel 396 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 11. " IRQC395ES ,IRQ Channel 395 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC394ES ,IRQ Channel 394 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 9. " IRQC393ES ,IRQ Channel 393 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 8. " IRQC392ES ,IRQ Channel 392 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC391ES ,IRQ Channel 391 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 6. " IRQC390ES ,IRQ Channel 390 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 5. " IRQC389ES ,IRQ Channel 389 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC388ES ,IRQ Channel 388 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 3. " IRQC387ES ,IRQ Channel 387 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 2. " IRQC386ES ,IRQ Channel 386 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC385ES ,IRQ Channel 385 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 0. " IRQC384ES ,IRQ Channel 384 Enable Set" "No effect,Enable"
|
|
wgroup.long 0xbf0++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC12,IUNIT IRQ Channel Enable Clear Register 12"
|
|
bitfld.long 0x00 31. " IRQC415EC ,IRQ Channel 415 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 30. " IRQC414EC ,IRQ Channel 414 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 29. " IRQC413EC ,IRQ Channel 413 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC412EC ,IRQ Channel 412 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 27. " IRQC411EC ,IRQ Channel 411 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 26. " IRQC410EC ,IRQ Channel 410 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC409EC ,IRQ Channel 409 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 24. " IRQC408EC ,IRQ Channel 408 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 23. " IRQC407EC ,IRQ Channel 407 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC406EC ,IRQ Channel 406 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 21. " IRQC405EC ,IRQ Channel 405 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 20. " IRQC404EC ,IRQ Channel 404 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC403EC ,IRQ Channel 403 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 18. " IRQC402EC ,IRQ Channel 402 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 17. " IRQC401EC ,IRQ Channel 401 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC400EC ,IRQ Channel 400 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 15. " IRQC399EC ,IRQ Channel 399 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 14. " IRQC398EC ,IRQ Channel 398 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC397EC ,IRQ Channel 397 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 12. " IRQC396EC ,IRQ Channel 396 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 11. " IRQC395EC ,IRQ Channel 395 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC394EC ,IRQ Channel 394 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 9. " IRQC393EC ,IRQ Channel 393 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 8. " IRQC392EC ,IRQ Channel 392 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC391EC ,IRQ Channel 391 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 6. " IRQC390EC ,IRQ Channel 390 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 5. " IRQC389EC ,IRQ Channel 389 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC388EC ,IRQ Channel 388 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 3. " IRQC387EC ,IRQ Channel 387 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 2. " IRQC386EC ,IRQ Channel 386 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC385EC ,IRQ Channel 385 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 0. " IRQC384EC ,IRQ Channel 384 Enable Clear" "No effect,Disable"
|
|
group.long 0xbf0++0x03
|
|
line.long 0x00 "IRQ0_IRQCE12,IUNIT IRQ Channel Enable Register 12"
|
|
bitfld.long 0x00 31. " IRQC415E ,IRQ Channel 415 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IRQC414E ,IRQ Channel 414 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IRQC413E ,IRQ Channel 413 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC412E ,IRQ Channel 412 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IRQC411E ,IRQ Channel 411 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IRQC410E ,IRQ Channel 410 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC409E ,IRQ Channel 409 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IRQC408E ,IRQ Channel 408 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IRQC407E ,IRQ Channel 407 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC406E ,IRQ Channel 406 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IRQC405E ,IRQ Channel 405 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IRQC404E ,IRQ Channel 404 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC403E ,IRQ Channel 403 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IRQC402E ,IRQ Channel 402 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IRQC401E ,IRQ Channel 401 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC400E ,IRQ Channel 400 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IRQC399E ,IRQ Channel 399 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IRQC398E ,IRQ Channel 398 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC397E ,IRQ Channel 397 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IRQC396E ,IRQ Channel 396 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IRQC395E ,IRQ Channel 395 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC394E ,IRQ Channel 394 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IRQC393E ,IRQ Channel 393 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IRQC392E ,IRQ Channel 392 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC391E ,IRQ Channel 391 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IRQC390E ,IRQ Channel 390 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IRQC389E ,IRQ Channel 389 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC388E ,IRQ Channel 388 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IRQC387E ,IRQ Channel 387 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IRQC386E ,IRQ Channel 386 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC385E ,IRQ Channel 385 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IRQC384E ,IRQ Channel 384 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xbb4++0x03 "IRQ Software Interrupts 447-416"
|
|
line.long 0x00 "IRQ0_IRQCES13,IUNIT IRQ Channel Enable Set Register 13"
|
|
bitfld.long 0x00 31. " IRQC447ES ,IRQ Channel 447 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 30. " IRQC446ES ,IRQ Channel 446 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 29. " IRQC445ES ,IRQ Channel 445 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC444ES ,IRQ Channel 444 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 27. " IRQC443ES ,IRQ Channel 443 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 26. " IRQC442ES ,IRQ Channel 442 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC441ES ,IRQ Channel 441 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 24. " IRQC440ES ,IRQ Channel 440 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 23. " IRQC439ES ,IRQ Channel 439 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC438ES ,IRQ Channel 438 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 21. " IRQC437ES ,IRQ Channel 437 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 20. " IRQC436ES ,IRQ Channel 436 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC435ES ,IRQ Channel 435 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 18. " IRQC434ES ,IRQ Channel 434 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 17. " IRQC433ES ,IRQ Channel 433 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC432ES ,IRQ Channel 432 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 15. " IRQC431ES ,IRQ Channel 431 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 14. " IRQC430ES ,IRQ Channel 430 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC429ES ,IRQ Channel 429 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 12. " IRQC428ES ,IRQ Channel 428 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 11. " IRQC427ES ,IRQ Channel 427 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC426ES ,IRQ Channel 426 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 9. " IRQC425ES ,IRQ Channel 425 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 8. " IRQC424ES ,IRQ Channel 424 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC423ES ,IRQ Channel 423 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 6. " IRQC422ES ,IRQ Channel 422 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 5. " IRQC421ES ,IRQ Channel 421 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC420ES ,IRQ Channel 420 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 3. " IRQC419ES ,IRQ Channel 419 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 2. " IRQC418ES ,IRQ Channel 418 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC417ES ,IRQ Channel 417 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 0. " IRQC416ES ,IRQ Channel 416 Enable Set" "No effect,Enable"
|
|
wgroup.long 0xbf4++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC13,IUNIT IRQ Channel Enable Clear Register 13"
|
|
bitfld.long 0x00 31. " IRQC447EC ,IRQ Channel 447 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 30. " IRQC446EC ,IRQ Channel 446 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 29. " IRQC445EC ,IRQ Channel 445 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC444EC ,IRQ Channel 444 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 27. " IRQC443EC ,IRQ Channel 443 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 26. " IRQC442EC ,IRQ Channel 442 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC441EC ,IRQ Channel 441 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 24. " IRQC440EC ,IRQ Channel 440 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 23. " IRQC439EC ,IRQ Channel 439 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC438EC ,IRQ Channel 438 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 21. " IRQC437EC ,IRQ Channel 437 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 20. " IRQC436EC ,IRQ Channel 436 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC435EC ,IRQ Channel 435 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 18. " IRQC434EC ,IRQ Channel 434 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 17. " IRQC433EC ,IRQ Channel 433 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC432EC ,IRQ Channel 432 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 15. " IRQC431EC ,IRQ Channel 431 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 14. " IRQC430EC ,IRQ Channel 430 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC429EC ,IRQ Channel 429 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 12. " IRQC428EC ,IRQ Channel 428 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 11. " IRQC427EC ,IRQ Channel 427 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC426EC ,IRQ Channel 426 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 9. " IRQC425EC ,IRQ Channel 425 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 8. " IRQC424EC ,IRQ Channel 424 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC423EC ,IRQ Channel 423 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 6. " IRQC422EC ,IRQ Channel 422 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 5. " IRQC421EC ,IRQ Channel 421 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC420EC ,IRQ Channel 420 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 3. " IRQC419EC ,IRQ Channel 419 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 2. " IRQC418EC ,IRQ Channel 418 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC417EC ,IRQ Channel 417 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 0. " IRQC416EC ,IRQ Channel 416 Enable Clear" "No effect,Disable"
|
|
group.long 0xbf4++0x03
|
|
line.long 0x00 "IRQ0_IRQCE13,IUNIT IRQ Channel Enable Register 13"
|
|
bitfld.long 0x00 31. " IRQC447E ,IRQ Channel 447 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IRQC446E ,IRQ Channel 446 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IRQC445E ,IRQ Channel 445 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC444E ,IRQ Channel 444 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IRQC443E ,IRQ Channel 443 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IRQC442E ,IRQ Channel 442 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC441E ,IRQ Channel 441 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IRQC440E ,IRQ Channel 440 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IRQC439E ,IRQ Channel 439 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC438E ,IRQ Channel 438 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IRQC437E ,IRQ Channel 437 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IRQC436E ,IRQ Channel 436 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC435E ,IRQ Channel 435 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IRQC434E ,IRQ Channel 434 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IRQC433E ,IRQ Channel 433 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC432E ,IRQ Channel 432 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IRQC431E ,IRQ Channel 431 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IRQC430E ,IRQ Channel 430 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC429E ,IRQ Channel 429 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IRQC428E ,IRQ Channel 428 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IRQC427E ,IRQ Channel 427 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC426E ,IRQ Channel 426 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IRQC425E ,IRQ Channel 425 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IRQC424E ,IRQ Channel 424 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC423E ,IRQ Channel 423 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IRQC422E ,IRQ Channel 422 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IRQC421E ,IRQ Channel 421 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC420E ,IRQ Channel 420 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IRQC419E ,IRQ Channel 419 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IRQC418E ,IRQ Channel 418 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC417E ,IRQ Channel 417 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IRQC416E ,IRQ Channel 416 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xbb8++0x03 "IRQ Software Interrupts 479-448"
|
|
line.long 0x00 "IRQ0_IRQCES14,IUNIT IRQ Channel Enable Set Register 14"
|
|
bitfld.long 0x00 31. " IRQC479ES ,IRQ Channel 479 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 30. " IRQC478ES ,IRQ Channel 478 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 29. " IRQC477ES ,IRQ Channel 477 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC476ES ,IRQ Channel 476 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 27. " IRQC475ES ,IRQ Channel 475 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 26. " IRQC474ES ,IRQ Channel 474 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC473ES ,IRQ Channel 473 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 24. " IRQC472ES ,IRQ Channel 472 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 23. " IRQC471ES ,IRQ Channel 471 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC470ES ,IRQ Channel 470 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 21. " IRQC469ES ,IRQ Channel 469 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 20. " IRQC468ES ,IRQ Channel 468 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC467ES ,IRQ Channel 467 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 18. " IRQC466ES ,IRQ Channel 466 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 17. " IRQC465ES ,IRQ Channel 465 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC464ES ,IRQ Channel 464 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 15. " IRQC463ES ,IRQ Channel 463 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 14. " IRQC462ES ,IRQ Channel 462 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC461ES ,IRQ Channel 461 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 12. " IRQC460ES ,IRQ Channel 460 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 11. " IRQC459ES ,IRQ Channel 459 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC458ES ,IRQ Channel 458 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 9. " IRQC457ES ,IRQ Channel 457 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 8. " IRQC456ES ,IRQ Channel 456 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC455ES ,IRQ Channel 455 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 6. " IRQC454ES ,IRQ Channel 454 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 5. " IRQC453ES ,IRQ Channel 453 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC452ES ,IRQ Channel 452 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 3. " IRQC451ES ,IRQ Channel 451 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 2. " IRQC450ES ,IRQ Channel 450 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC449ES ,IRQ Channel 449 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 0. " IRQC448ES ,IRQ Channel 448 Enable Set" "No effect,Enable"
|
|
wgroup.long 0xbf8++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC14,IUNIT IRQ Channel Enable Clear Register 14"
|
|
bitfld.long 0x00 31. " IRQC479EC ,IRQ Channel 479 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 30. " IRQC478EC ,IRQ Channel 478 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 29. " IRQC477EC ,IRQ Channel 477 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC476EC ,IRQ Channel 476 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 27. " IRQC475EC ,IRQ Channel 475 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 26. " IRQC474EC ,IRQ Channel 474 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC473EC ,IRQ Channel 473 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 24. " IRQC472EC ,IRQ Channel 472 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 23. " IRQC471EC ,IRQ Channel 471 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC470EC ,IRQ Channel 470 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 21. " IRQC469EC ,IRQ Channel 469 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 20. " IRQC468EC ,IRQ Channel 468 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC467EC ,IRQ Channel 467 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 18. " IRQC466EC ,IRQ Channel 466 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 17. " IRQC465EC ,IRQ Channel 465 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC464EC ,IRQ Channel 464 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 15. " IRQC463EC ,IRQ Channel 463 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 14. " IRQC462EC ,IRQ Channel 462 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC461EC ,IRQ Channel 461 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 12. " IRQC460EC ,IRQ Channel 460 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 11. " IRQC459EC ,IRQ Channel 459 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC458EC ,IRQ Channel 458 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 9. " IRQC457EC ,IRQ Channel 457 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 8. " IRQC456EC ,IRQ Channel 456 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC455EC ,IRQ Channel 455 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 6. " IRQC454EC ,IRQ Channel 454 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 5. " IRQC453EC ,IRQ Channel 453 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC452EC ,IRQ Channel 452 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 3. " IRQC451EC ,IRQ Channel 451 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 2. " IRQC450EC ,IRQ Channel 450 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC449EC ,IRQ Channel 449 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 0. " IRQC448EC ,IRQ Channel 448 Enable Clear" "No effect,Disable"
|
|
group.long 0xbf8++0x03
|
|
line.long 0x00 "IRQ0_IRQCE14,IUNIT IRQ Channel Enable Register 14"
|
|
bitfld.long 0x00 31. " IRQC479E ,IRQ Channel 479 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IRQC478E ,IRQ Channel 478 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IRQC477E ,IRQ Channel 477 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC476E ,IRQ Channel 476 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IRQC475E ,IRQ Channel 475 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IRQC474E ,IRQ Channel 474 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC473E ,IRQ Channel 473 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IRQC472E ,IRQ Channel 472 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IRQC471E ,IRQ Channel 471 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC470E ,IRQ Channel 470 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IRQC469E ,IRQ Channel 469 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IRQC468E ,IRQ Channel 468 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC467E ,IRQ Channel 467 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IRQC466E ,IRQ Channel 466 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IRQC465E ,IRQ Channel 465 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC464E ,IRQ Channel 464 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IRQC463E ,IRQ Channel 463 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IRQC462E ,IRQ Channel 462 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC461E ,IRQ Channel 461 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IRQC460E ,IRQ Channel 460 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IRQC459E ,IRQ Channel 459 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC458E ,IRQ Channel 458 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IRQC457E ,IRQ Channel 457 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IRQC456E ,IRQ Channel 456 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC455E ,IRQ Channel 455 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IRQC454E ,IRQ Channel 454 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IRQC453E ,IRQ Channel 453 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC452E ,IRQ Channel 452 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IRQC451E ,IRQ Channel 451 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IRQC450E ,IRQ Channel 450 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC449E ,IRQ Channel 449 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IRQC448E ,IRQ Channel 448 Enable" "Disabled,Enabled"
|
|
wgroup.long 0xbbc++0x03 "IRQ Software Interrupts 511-480"
|
|
line.long 0x00 "IRQ0_IRQCES15,IUNIT IRQ Channel Enable Set Register 15"
|
|
bitfld.long 0x00 31. " IRQC511ES ,IRQ Channel 511 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 30. " IRQC510ES ,IRQ Channel 510 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 29. " IRQC509ES ,IRQ Channel 509 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC508ES ,IRQ Channel 508 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 27. " IRQC507ES ,IRQ Channel 507 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 26. " IRQC506ES ,IRQ Channel 506 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC505ES ,IRQ Channel 505 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 24. " IRQC504ES ,IRQ Channel 504 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 23. " IRQC503ES ,IRQ Channel 503 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC502ES ,IRQ Channel 502 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 21. " IRQC501ES ,IRQ Channel 501 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 20. " IRQC500ES ,IRQ Channel 500 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC499ES ,IRQ Channel 499 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 18. " IRQC498ES ,IRQ Channel 498 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 17. " IRQC497ES ,IRQ Channel 497 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC496ES ,IRQ Channel 496 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 15. " IRQC495ES ,IRQ Channel 495 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 14. " IRQC494ES ,IRQ Channel 494 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC493ES ,IRQ Channel 493 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 12. " IRQC492ES ,IRQ Channel 492 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 11. " IRQC491ES ,IRQ Channel 491 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC490ES ,IRQ Channel 490 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 9. " IRQC489ES ,IRQ Channel 489 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 8. " IRQC488ES ,IRQ Channel 488 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC487ES ,IRQ Channel 487 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 6. " IRQC486ES ,IRQ Channel 486 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 5. " IRQC485ES ,IRQ Channel 485 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC484ES ,IRQ Channel 484 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 3. " IRQC483ES ,IRQ Channel 483 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 2. " IRQC482ES ,IRQ Channel 482 Enable Set" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC481ES ,IRQ Channel 481 Enable Set" "No effect,Enable"
|
|
bitfld.long 0x00 0. " IRQC480ES ,IRQ Channel 480 Enable Set" "No effect,Enable"
|
|
wgroup.long 0xbfc++0x03
|
|
line.long 0x00 "IRQ0_IRQCEC15,IUNIT IRQ Channel Enable Clear Register 15"
|
|
bitfld.long 0x00 31. " IRQC511EC ,IRQ Channel 511 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 30. " IRQC510EC ,IRQ Channel 510 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 29. " IRQC509EC ,IRQ Channel 509 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC508EC ,IRQ Channel 508 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 27. " IRQC507EC ,IRQ Channel 507 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 26. " IRQC506EC ,IRQ Channel 506 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC505EC ,IRQ Channel 505 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 24. " IRQC504EC ,IRQ Channel 504 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 23. " IRQC503EC ,IRQ Channel 503 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC502EC ,IRQ Channel 502 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 21. " IRQC501EC ,IRQ Channel 501 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 20. " IRQC500EC ,IRQ Channel 500 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC499EC ,IRQ Channel 499 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 18. " IRQC498EC ,IRQ Channel 498 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 17. " IRQC497EC ,IRQ Channel 497 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC496EC ,IRQ Channel 496 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 15. " IRQC495EC ,IRQ Channel 495 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 14. " IRQC494EC ,IRQ Channel 494 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC493EC ,IRQ Channel 493 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 12. " IRQC492EC ,IRQ Channel 492 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 11. " IRQC491EC ,IRQ Channel 491 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC490EC ,IRQ Channel 490 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 9. " IRQC489EC ,IRQ Channel 489 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 8. " IRQC488EC ,IRQ Channel 488 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC487EC ,IRQ Channel 487 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 6. " IRQC486EC ,IRQ Channel 486 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 5. " IRQC485EC ,IRQ Channel 485 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC484EC ,IRQ Channel 484 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 3. " IRQC483EC ,IRQ Channel 483 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 2. " IRQC482EC ,IRQ Channel 482 Enable Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC481EC ,IRQ Channel 481 Enable Clear" "No effect,Disable"
|
|
bitfld.long 0x00 0. " IRQC480EC ,IRQ Channel 480 Enable Clear" "No effect,Disable"
|
|
group.long 0xbfc++0x03
|
|
line.long 0x00 "IRQ0_IRQCE15,IUNIT IRQ Channel Enable Register 15"
|
|
bitfld.long 0x00 31. " IRQC511E ,IRQ Channel 511 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IRQC510E ,IRQ Channel 510 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IRQC509E ,IRQ Channel 509 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQC508E ,IRQ Channel 508 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IRQC507E ,IRQ Channel 507 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IRQC506E ,IRQ Channel 506 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQC505E ,IRQ Channel 505 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IRQC504E ,IRQ Channel 504 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IRQC503E ,IRQ Channel 503 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQC502E ,IRQ Channel 502 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IRQC501E ,IRQ Channel 501 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IRQC500E ,IRQ Channel 500 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQC499E ,IRQ Channel 499 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IRQC498E ,IRQ Channel 498 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IRQC497E ,IRQ Channel 497 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQC496E ,IRQ Channel 496 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IRQC495E ,IRQ Channel 495 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IRQC494E ,IRQ Channel 494 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQC493E ,IRQ Channel 493 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IRQC492E ,IRQ Channel 492 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IRQC491E ,IRQ Channel 491 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQC490E ,IRQ Channel 490 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IRQC489E ,IRQ Channel 489 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IRQC488E ,IRQ Channel 488 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQC487E ,IRQ Channel 487 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IRQC486E ,IRQ Channel 486 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IRQC485E ,IRQ Channel 485 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQC484E ,IRQ Channel 484 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IRQC483E ,IRQ Channel 483 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IRQC482E ,IRQ Channel 482 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQC481E ,IRQ Channel 481 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IRQC480E ,IRQ Channel 480 Enable" "Disabled,Enabled"
|
|
endif
|
|
tree.end
|
|
tree "NMI Hold Registers"
|
|
width 15.
|
|
wgroup.long 0xc40++0x03
|
|
line.long 0x00 "IRQ0_NMIHC,IUNIT NMI Hold Clear Register"
|
|
bitfld.long 0x00 0.--4. " NMIHCN ,Hold Clear NMI Number" "0,1,2,3,4,5,,7,8,9,,11,12,13,14,,,,18,?..."
|
|
rgroup.long 0xc44++0x03
|
|
line.long 0x00 "IRQ0_NMIHS,IUNIT NMI Hold Status Register"
|
|
bitfld.long 0x00 18. " NMI[18] ,MPUSHE Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 14. " NMI[14] ,GFXNMI Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 13. " NMI[13] ,BECU3NMI Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 12. " NMI[12] ,BECU1NMI Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 11. " NMI[11] ,BECU0NMI Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 9. " NMI[9] ,IRQ0NMIERR Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 8. " NMI[8] ,MPUHMLB0NMI Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 7. " NMI[7] ,MPUXGFXNMI Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 5. " NMI[5] ,MPUXDMA0NMI Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 4. " NMI[4] ,TPU0NMI Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 3. " NMI[3] ,WDGNMI Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 2. " NMI[2] ,SYSCNMIERR Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 1. " NMI[1] ,SYSCNMILVD Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 0. " NMI[0] ,EIC0NMI Hold Status" "Completed,Applied to CPU"
|
|
tree.end
|
|
tree "IRQ Hold Registers"
|
|
width 15.
|
|
wgroup.long 0xc48++0x03
|
|
line.long 0x00 "IRQ0_IRQHC,IUNIT IRQ Hold Clear Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " IRQHCN ,Hold Clear IRQ Number"
|
|
rgroup.long 0xc50++0x1f
|
|
line.long 0x00 "IRQ0_IRQHS0,IUNIT IRQ Hold Status Register 0 (Interrupts 31-0)"
|
|
bitfld.long 0x00 31. " IRQ31HS ,ADC0IRQ2 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 30. " IRQ30HS ,ADC0IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 23. " IRQ23HS ,GFXIRQ1 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 22. " IRQ22HS ,GFXIRQ0 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ16HS ,MLB0SINT Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 15. " IRQ15HS ,MLB0CINT Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 1. " IRQ1HS ,WDGIRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 0. " IRQ0HS ,SYSCIRQ Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x04 "IRQ0_IRQHS1,IUNIT IRQ Hold Status Register 1 (Interrupts 63-32)"
|
|
bitfld.long 0x04 30. " IRQ62HS ,CAN1IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 29. " IRQ61HS ,CAN0IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 24. " IRQ56HS ,SPI2IRQTX Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 23. " IRQ55HS ,SPI2IRQRX Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IRQ53HS ,SPI1IRQTX Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 20. " IRQ52HS ,SPI1IRQRX Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 18. " IRQ50HS ,SPI0IRQTX Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 17. " IRQ49HS ,SPI0IRQRX Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IRQ48HS ,SHE Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 13. " IRQ45HS ,SHE Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 12. " IRQ44HS ,HSSPI0IRQTX Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 11. " IRQ43HS ,HSSPI0IRQRX Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IRQ42HS ,EICU0IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 9. " IRQ41HS ,EECFGIRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 6. " IRQ38HS ,IRQ0IRQERR Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 5. " IRQ37HS ,EECFGIRQERR Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IRQ36HS ,TCFCFGIRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 3. " IRQ35HS ,SRCFGIRQERR Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 2. " IRQ34HS ,RRCFGIRQERR Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 1. " IRQ33HS ,ADC0IRQP Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IRQ32HS ,ADC0IRQR Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x08 "IRQ0_IRQHS2,IUNIT IRQ Hold Status Register 2 (Interrupts 95-64)"
|
|
bitfld.long 0x08 31. " IRQ95HS ,EIC0IRQ26 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 30. " IRQ94HS ,EIC0IRQ25 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 29. " IRQ93HS ,EIC0IRQ24 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 28. " IRQ92HS ,EIC0IRQ23 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 27. " IRQ91HS ,EIC0IRQ22 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 26. " IRQ90HS ,EIC0IRQ21 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 25. " IRQ89HS ,EIC0IRQ20 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 24. " IRQ88HS ,EIC0IRQ19 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 23. " IRQ87HS ,EIC0IRQ18 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 22. " IRQ86HS ,EIC0IRQ17 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 21. " IRQ85HS ,EIC0IRQ16 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 20. " IRQ84HS ,EIC0IRQ15 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IRQ83HS ,EIC0IRQ14 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 18. " IRQ82HS ,EIC0IRQ13 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 17. " IRQ81HS ,EIC0IRQ12 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 16. " IRQ80HS ,EIC0IRQ11 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 15. " IRQ79HS ,EIC0IRQ10 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 14. " IRQ78HS ,EIC0IRQ9 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 13. " IRQ77HS ,EIC0IRQ8 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 12. " IRQ76HS ,EIC0IRQ7 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 11. " IRQ75HS ,EIC0IRQ6 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 10. " IRQ74HS ,EIC0IRQ5 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 9. " IRQ73HS ,EIC0IRQ4 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 8. " IRQ72HS ,EIC0IRQ3 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IRQ71HS ,EIC0IRQ2 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 6. " IRQ70HS ,EIC0IRQ1 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 5. " IRQ69HS ,EIC0IRQ0 Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x0c "IRQ0_IRQHS3,IUNIT IRQ Hold Status Register 3 (Interrupts 127-96)"
|
|
bitfld.long 0x0c 31. " IRQ127HS ,ICU3IRQ1 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 30. " IRQ126HS ,ICU3IRQ0 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 29. " IRQ125HS ,ICU2IRQ1 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 28. " IRQ124HS ,ICU2IRQ0 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " IRQ115HS ,FRT19IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 18. " IRQ114HS ,FRT18IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 17. " IRQ113HS ,FRT17IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 16. " IRQ112HS ,FRT16IRQ Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 11. " IRQ107HS ,FRT3IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 10. " IRQ106HS ,FRT2IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 9. " IRQ105HS ,FRT1IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 8. " IRQ104HS ,FRT0IRQ Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 6. " IRQ102HS ,SG0IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 5. " IRQ101HS ,RTCIRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 4. " IRQ100HS ,EIC0IRQ31 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 3. " IRQ99HS ,EIC0IRQ30 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 2. " IRQ98HS ,EIC0IRQ29 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 1. " IRQ97HS ,EIC0IRQ28 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 0. " IRQ96HS ,EIC0IRQ27 Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x10 "IRQ0_IRQHS4,IUNIT IRQ Hold Status Register 4 (Interrupts 159-128)"
|
|
bitfld.long 0x10 31. " IRQ159HS ,USART6IRQTX Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 30. " IRQ158HS ,USART6IRQRX Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 26. " IRQ154HS ,USART0IRQERR Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 25. " IRQ153HS ,USART0IRQTX Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 24. " IRQ152HS ,USART0IRQRX Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 19. " IRQ147HS ,OCU17IRQ1 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 18. " IRQ146HS ,OCU17IRQ0 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 17. " IRQ145HS ,OCU16IRQ1 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 16. " IRQ144HS ,OCU16IRQ0 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 11. " IRQ139HS ,OCU1IRQ1 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 10. " IRQ138HS ,OCU1IRQ0 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 9. " IRQ137HS ,OCU0IRQ1 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 8. " IRQ136HS ,OCU0IRQ0 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 7. " IRQ135HS ,ICU19IRQ1 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 6. " IRQ134HS ,ICU19IRQ0 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 5. " IRQ133HS ,ICU18IRQ1 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 4. " IRQ132HS ,ICU18IRQ0 Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x14 "IRQ0_IRQHS5,IUNIT IRQ Hold Status Register 5 (Interrupts 191-160)"
|
|
bitfld.long 0x14 27. " IRQ187HS ,RLT9IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 26. " IRQ186HS ,RLT8IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 25. " IRQ185HS ,RLT7IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 24. " IRQ184HS ,RLT6IRQ Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 23. " IRQ183HS ,RLT5IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 22. " IRQ182HS ,RLT4IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 21. " IRQ181HS ,RLT3IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 20. " IRQ180HS ,RLT2IRQ Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 19. " IRQ179HS ,RLT1IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 18. " IRQ178HS ,RLT0IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 17. " IRQ177HS ,CORE0IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 16. " IRQ176HS ,SRCSCTIRQ Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 15. " IRQ175HS ,RCSCTIRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 14. " IRQ174HS ,SSCTIRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 13. " IRQ173HS ,MSCTIRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 12. " IRQ172HS ,DMA0IRQERR Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 11. " IRQ171HS ,DMA0IRQD7 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 10. " IRQ170HS ,DMA0IRQD6 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 9. " IRQ169HS ,DMA0IRQD5 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 8. " IRQ168HS ,DMA0IRQD4 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 7. " IRQ167HS ,DMA0IRQD3 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 6. " IRQ166HS ,DMA0IRQD2 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 5. " IRQ165HS ,DMA0IRQD1 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 4. " IRQ164HS ,DMA0IRQD0 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 0. " IRQ160HS ,USART6IRQERR Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x18 "IRQ0_IRQHS6,IUNIT IRQ Hold Status Register 6 (Interrupts 223-192)"
|
|
bitfld.long 0x18 31. " IRQ223HS ,PPG15IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 30. " IRQ222HS ,PPG14IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 29. " IRQ221HS ,PPG13IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 28. " IRQ220HS ,PPG12IRQ Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 27. " IRQ219HS ,PPG11IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 26. " IRQ218HS ,PPG10IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 25. " IRQ217HS ,PPG9IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 24. " IRQ216HS ,PPG8IRQ Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 23. " IRQ215HS ,PPG7IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 22. " IRQ214HS ,PPG6IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 21. " IRQ213HS ,PPG5IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 20. " IRQ212HS ,PPG4IRQ Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 19. " IRQ211HS ,PPG3IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 18. " IRQ210HS ,PPG2IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 17. " IRQ209HS ,PPG1IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 16. " IRQ208HS ,PPG0IRQ Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 14. " IRQ206HS ,CRC0IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 11. " IRQ203HS ,I2C0IRQERR Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 10. " IRQ202HS ,I2C0IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 7. " IRQ199HS ,I2S1IRQ Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 6. " IRQ198HS ,I2S0IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 3. " IRQ195HS ,UDC0IRQ1 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 2. " IRQ194HS ,UDC0IRQ0 Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x1c "IRQ0_IRQHS7,IUNIT IRQ Hold Status Register 7 (Interrupts 255-224)"
|
|
bitfld.long 0x1c 15. " IRQ239HS ,PPG71IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 14. " IRQ238HS ,PPG70IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 13. " IRQ237HS ,PPG69IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 12. " IRQ236HS ,PPG68IRQ Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x1c 11. " IRQ235HS ,PPG67IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 10. " IRQ234HS ,PPG66IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 9. " IRQ233HS ,PPG65IRQ Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 8. " IRQ232HS ,PPG64IRQ Hold Status" "Completed,Applied to CPU"
|
|
sif (!CPUIS("MB9EF226")&&!CPUIS("MB9EF126")&&!CPUIS("MB9DF126")&&!CPUIS("MB9DF125"))
|
|
rgroup.long 0x70++0x1f
|
|
line.long 0x00 "IRQ0_IRQHS8,IUNIT IRQ Hold Status Register 8 (Interrupts 287-256)"
|
|
bitfld.long 0x00 31. " IRQ287HS ,IRQ 287 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 30. " IRQ286HS ,IRQ 286 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 29. " IRQ285HS ,IRQ 285 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQ284HS ,IRQ 284 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 27. " IRQ283HS ,IRQ 283 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 26. " IRQ282HS ,IRQ 282 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQ281HS ,IRQ 281 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 24. " IRQ280HS ,IRQ 280 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 23. " IRQ279HS ,IRQ 279 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQ278HS ,IRQ 278 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 21. " IRQ277HS ,IRQ 277 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 20. " IRQ276HS ,IRQ 276 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ275HS ,IRQ 275 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 18. " IRQ274HS ,IRQ 274 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 17. " IRQ273HS ,IRQ 273 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ272HS ,IRQ 272 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 15. " IRQ271HS ,IRQ 271 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 14. " IRQ270HS ,IRQ 270 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQ269HS ,IRQ 269 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 12. " IRQ268HS ,IRQ 268 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 11. " IRQ267HS ,IRQ 267 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQ266HS ,IRQ 266 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 9. " IRQ265HS ,IRQ 265 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 8. " IRQ264HS ,IRQ 264 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ263HS ,IRQ 263 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 6. " IRQ262HS ,IRQ 262 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 5. " IRQ261HS ,IRQ 261 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ260HS ,IRQ 260 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 3. " IRQ259HS ,IRQ 259 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 2. " IRQ258HS ,IRQ 258 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ257HS ,IRQ 257 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x00 0. " IRQ256HS ,IRQ 256 Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x04 "IRQ0_IRQHS9,IUNIT IRQ Hold Status Register 9 (Interrupts 319-288)"
|
|
bitfld.long 0x04 31. " IRQ319HS ,IRQ 319 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 30. " IRQ318HS ,IRQ 318 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 29. " IRQ317HS ,IRQ 317 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 28. " IRQ316HS ,IRQ 316 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 27. " IRQ315HS ,IRQ 315 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 26. " IRQ314HS ,IRQ 314 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 25. " IRQ313HS ,IRQ 313 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 24. " IRQ312HS ,IRQ 312 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 23. " IRQ311HS ,IRQ 311 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 22. " IRQ310HS ,IRQ 310 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 21. " IRQ309HS ,IRQ 309 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 20. " IRQ308HS ,IRQ 308 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IRQ307HS ,IRQ 307 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 18. " IRQ306HS ,IRQ 306 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 17. " IRQ305HS ,IRQ 305 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IRQ304HS ,IRQ 304 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 15. " IRQ303HS ,IRQ 303 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 14. " IRQ302HS ,IRQ 302 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IRQ301HS ,IRQ 301 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 12. " IRQ300HS ,IRQ 300 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 11. " IRQ299HS ,IRQ 299 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IRQ298HS ,IRQ 298 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 9. " IRQ297HS ,IRQ 297 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 8. " IRQ296HS ,IRQ 296 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IRQ295HS ,IRQ 295 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 6. " IRQ294HS ,IRQ 294 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 5. " IRQ293HS ,IRQ 293 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IRQ292HS ,IRQ 292 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 3. " IRQ291HS ,IRQ 291 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 2. " IRQ290HS ,IRQ 290 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IRQ289HS ,IRQ 289 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x04 0. " IRQ288HS ,IRQ 288 Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x08 "IRQ0_IRQHS10,IUNIT IRQ Hold Status Register 10 (Interrupts 351-320)"
|
|
bitfld.long 0x08 31. " IRQ351HS ,IRQ 351 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 30. " IRQ350HS ,IRQ 350 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 29. " IRQ349HS ,IRQ 349 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IRQ348HS ,IRQ 348 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 27. " IRQ347HS ,IRQ 347 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 26. " IRQ346HS ,IRQ 346 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 25. " IRQ345HS ,IRQ 345 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 24. " IRQ344HS ,IRQ 344 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 23. " IRQ343HS ,IRQ 343 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 22. " IRQ342HS ,IRQ 342 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 21. " IRQ341HS ,IRQ 341 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 20. " IRQ340HS ,IRQ 340 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IRQ339HS ,IRQ 339 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 18. " IRQ338HS ,IRQ 338 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 17. " IRQ337HS ,IRQ 337 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 16. " IRQ336HS ,IRQ 336 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 15. " IRQ335HS ,IRQ 335 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 14. " IRQ334HS ,IRQ 334 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IRQ333HS ,IRQ 333 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 12. " IRQ332HS ,IRQ 332 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 11. " IRQ331HS ,IRQ 331 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 10. " IRQ330HS ,IRQ 330 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 9. " IRQ329HS ,IRQ 329 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 8. " IRQ328HS ,IRQ 328 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IRQ327HS ,IRQ 327 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 6. " IRQ326HS ,IRQ 326 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 5. " IRQ325HS ,IRQ 325 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 4. " IRQ324HS ,IRQ 324 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 3. " IRQ323HS ,IRQ 323 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 2. " IRQ322HS ,IRQ 322 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x08 1. " IRQ321HS ,IRQ 321 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x08 0. " IRQ320HS ,IRQ 320 Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x0c "IRQ0_IRQHS11,IUNIT IRQ Hold Status Register 11 (Interrupts 383-352)"
|
|
bitfld.long 0x0c 31. " IRQ383HS ,IRQ 383 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 30. " IRQ382HS ,IRQ 382 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 29. " IRQ381HS ,IRQ 381 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " IRQ380HS ,IRQ 380 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 27. " IRQ379HS ,IRQ 379 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 26. " IRQ378HS ,IRQ 378 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " IRQ377HS ,IRQ 377 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 24. " IRQ376HS ,IRQ 376 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 23. " IRQ375HS ,IRQ 375 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " IRQ374HS ,IRQ 374 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 21. " IRQ373HS ,IRQ 373 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 20. " IRQ372HS ,IRQ 372 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " IRQ371HS ,IRQ 371 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 18. " IRQ370HS ,IRQ 370 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 17. " IRQ369HS ,IRQ 369 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " IRQ368HS ,IRQ 368 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 15. " IRQ367HS ,IRQ 367 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 14. " IRQ366HS ,IRQ 366 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " IRQ365HS ,IRQ 365 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 12. " IRQ364HS ,IRQ 364 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 11. " IRQ363HS ,IRQ 363 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " IRQ362HS ,IRQ 362 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 9. " IRQ361HS ,IRQ 361 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 8. " IRQ360HS ,IRQ 360 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " IRQ359HS ,IRQ 359 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 6. " IRQ358HS ,IRQ 358 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 5. " IRQ357HS ,IRQ 357 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " IRQ356HS ,IRQ 356 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 3. " IRQ355HS ,IRQ 355 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 2. " IRQ354HS ,IRQ 354 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " IRQ353HS ,IRQ 353 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x0c 0. " IRQ352HS ,IRQ 352 Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x10 "IRQ0_IRQHS12,IUNIT IRQ Hold Status Register 12 (Interrupts 415-384)"
|
|
bitfld.long 0x10 31. " IRQ415HS ,IRQ 415 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 30. " IRQ414HS ,IRQ 414 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 29. " IRQ413HS ,IRQ 413 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 28. " IRQ412HS ,IRQ 412 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 27. " IRQ411HS ,IRQ 411 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 26. " IRQ410HS ,IRQ 410 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 25. " IRQ409HS ,IRQ 409 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 24. " IRQ408HS ,IRQ 408 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 23. " IRQ407HS ,IRQ 407 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 22. " IRQ406HS ,IRQ 406 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 21. " IRQ405HS ,IRQ 405 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 20. " IRQ404HS ,IRQ 404 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 19. " IRQ403HS ,IRQ 403 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 18. " IRQ402HS ,IRQ 402 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 17. " IRQ401HS ,IRQ 401 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 16. " IRQ400HS ,IRQ 400 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 15. " IRQ399HS ,IRQ 399 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 14. " IRQ398HS ,IRQ 398 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 13. " IRQ397HS ,IRQ 397 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 12. " IRQ396HS ,IRQ 396 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 11. " IRQ395HS ,IRQ 395 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 10. " IRQ394HS ,IRQ 394 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 9. " IRQ393HS ,IRQ 393 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 8. " IRQ392HS ,IRQ 392 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 7. " IRQ391HS ,IRQ 391 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 6. " IRQ390HS ,IRQ 390 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 5. " IRQ389HS ,IRQ 389 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 4. " IRQ388HS ,IRQ 388 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 3. " IRQ387HS ,IRQ 387 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 2. " IRQ386HS ,IRQ 386 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x10 1. " IRQ385HS ,IRQ 385 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x10 0. " IRQ384HS ,IRQ 384 Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x14 "IRQ0_IRQHS13,IUNIT IRQ Hold Status Register 13 (Interrupts 447-416)"
|
|
bitfld.long 0x14 31. " IRQ447HS ,IRQ 447 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 30. " IRQ446HS ,IRQ 446 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 29. " IRQ445HS ,IRQ 445 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 28. " IRQ444HS ,IRQ 444 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 27. " IRQ443HS ,IRQ 443 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 26. " IRQ442HS ,IRQ 442 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 25. " IRQ441HS ,IRQ 441 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 24. " IRQ440HS ,IRQ 440 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 23. " IRQ439HS ,IRQ 439 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 22. " IRQ438HS ,IRQ 438 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 21. " IRQ437HS ,IRQ 437 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 20. " IRQ436HS ,IRQ 436 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 19. " IRQ435HS ,IRQ 435 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 18. " IRQ434HS ,IRQ 434 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 17. " IRQ433HS ,IRQ 433 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 16. " IRQ432HS ,IRQ 432 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 15. " IRQ431HS ,IRQ 431 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 14. " IRQ430HS ,IRQ 430 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 13. " IRQ429HS ,IRQ 429 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 12. " IRQ428HS ,IRQ 428 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 11. " IRQ427HS ,IRQ 427 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 10. " IRQ426HS ,IRQ 426 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 9. " IRQ425HS ,IRQ 425 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 8. " IRQ424HS ,IRQ 424 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 7. " IRQ423HS ,IRQ 423 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 6. " IRQ422HS ,IRQ 422 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 5. " IRQ421HS ,IRQ 421 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 4. " IRQ420HS ,IRQ 420 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 3. " IRQ419HS ,IRQ 419 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 2. " IRQ418HS ,IRQ 418 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x14 1. " IRQ417HS ,IRQ 417 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x14 0. " IRQ416HS ,IRQ 416 Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x18 "IRQ0_IRQHS14,IUNIT IRQ Hold Status Register 14 (Interrupts 479-448)"
|
|
bitfld.long 0x18 31. " IRQ479HS ,IRQ 479 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 30. " IRQ478HS ,IRQ 478 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 29. " IRQ477HS ,IRQ 477 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 28. " IRQ476HS ,IRQ 476 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 27. " IRQ475HS ,IRQ 475 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 26. " IRQ474HS ,IRQ 474 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 25. " IRQ473HS ,IRQ 473 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 24. " IRQ472HS ,IRQ 472 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 23. " IRQ471HS ,IRQ 471 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 22. " IRQ470HS ,IRQ 470 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 21. " IRQ469HS ,IRQ 469 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 20. " IRQ468HS ,IRQ 468 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 19. " IRQ467HS ,IRQ 467 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 18. " IRQ466HS ,IRQ 466 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 17. " IRQ465HS ,IRQ 465 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 16. " IRQ464HS ,IRQ 464 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 15. " IRQ463HS ,IRQ 463 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 14. " IRQ462HS ,IRQ 462 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 13. " IRQ461HS ,IRQ 461 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 12. " IRQ460HS ,IRQ 460 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 11. " IRQ459HS ,IRQ 459 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 10. " IRQ458HS ,IRQ 458 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 9. " IRQ457HS ,IRQ 457 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 8. " IRQ456HS ,IRQ 456 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 7. " IRQ455HS ,IRQ 455 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 6. " IRQ454HS ,IRQ 454 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 5. " IRQ453HS ,IRQ 453 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 4. " IRQ452HS ,IRQ 452 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 3. " IRQ451HS ,IRQ 451 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 2. " IRQ450HS ,IRQ 450 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x18 1. " IRQ449HS ,IRQ 449 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x18 0. " IRQ448HS ,IRQ 448 Hold Status" "Completed,Applied to CPU"
|
|
line.long 0x1c "IRQ0_IRQHS15,IUNIT IRQ Hold Status Register 15 (Interrupts 511-480)"
|
|
bitfld.long 0x1c 31. " IRQ511HS ,IRQ 511 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 30. " IRQ510HS ,IRQ 510 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 29. " IRQ509HS ,IRQ 509 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x1c 28. " IRQ508HS ,IRQ 508 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 27. " IRQ507HS ,IRQ 507 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 26. " IRQ506HS ,IRQ 506 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x1c 25. " IRQ505HS ,IRQ 505 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 24. " IRQ504HS ,IRQ 504 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 23. " IRQ503HS ,IRQ 503 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x1c 22. " IRQ502HS ,IRQ 502 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 21. " IRQ501HS ,IRQ 501 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 20. " IRQ500HS ,IRQ 500 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x1c 19. " IRQ499HS ,IRQ 499 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 18. " IRQ498HS ,IRQ 498 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 17. " IRQ497HS ,IRQ 497 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x1c 16. " IRQ496HS ,IRQ 496 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 15. " IRQ495HS ,IRQ 495 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 14. " IRQ494HS ,IRQ 494 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x1c 13. " IRQ493HS ,IRQ 493 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 12. " IRQ492HS ,IRQ 492 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 11. " IRQ491HS ,IRQ 491 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x1c 10. " IRQ490HS ,IRQ 490 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 9. " IRQ489HS ,IRQ 489 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 8. " IRQ488HS ,IRQ 488 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x1c 7. " IRQ487HS ,IRQ 487 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 6. " IRQ486HS ,IRQ 486 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 5. " IRQ485HS ,IRQ 485 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x1c 4. " IRQ484HS ,IRQ 484 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 3. " IRQ483HS ,IRQ 483 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 2. " IRQ482HS ,IRQ 482 Hold Status" "Completed,Applied to CPU"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " IRQ481HS ,IRQ 481 Hold Status" "Completed,Applied to CPU"
|
|
bitfld.long 0x1c 0. " IRQ480HS ,IRQ 480 Hold Status" "Completed,Applied to CPU"
|
|
endif
|
|
tree.end
|
|
width 15.
|
|
group.long 0xc90++0x03
|
|
line.long 0x00 "IRQ0_IRQPLM,IUNIT IRQ Priority Level Mask Register"
|
|
bitfld.long 0x00 0.--5. " IRQPLM ,IRQ Priority Level Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xc98++0x03
|
|
line.long 0x00 "IRQ0_CSR,IUNIT Control and Status Register"
|
|
rbitfld.long 0x00 16. " LST ,Interrupt Controller Lock Status" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " IRQEN ,Enable IRQ Block" "Disabled,Enabled"
|
|
rgroup.long 0xca0++0x03
|
|
line.long 0x00 "IRQ0_NESTL,IUNIT Nesting Level Status Register"
|
|
bitfld.long 0x00 8.--12. " IRQNL ,The number of IRQ ISR currently nested in the CPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. " NMINL ,The number of NMI ISR currently nested in the CPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,..."
|
|
tree "NMI Status Registers"
|
|
width 15.
|
|
rgroup.long 0xca8++0x07
|
|
line.long 0x00 "IRQ0_NMIRS,IUNIT NMI Raw Status Register"
|
|
bitfld.long 0x00 18. " NMIRS[18] ,MPUSHE Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " NMIRS[14] ,GFXNMI Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " NMIRS[13] ,BECU3NMI Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " NMIRS[12] ,BECU1NMI Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " NMIRS[11] ,BECU0NMI Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " NMIRS[9] ,IRQ0NMIERR Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " NMIRS[8] ,MPUHMLB0NMI Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " NMIRS[7] ,MPUXGFXNMI Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " NMIRS[5] ,MPUXDMA0NMI Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NMIRS[4] ,TPU0NMI Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " NMIRS[3] ,WDGNMI Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " NMIRS[2] ,SYSCNMIERR Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " NMIRS[1] ,SYSCNMILVD Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " NMIRS[0] ,EIC0NMI Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "IRQ0_NMIPS,IUNIT NMI Preprocessed Status Register"
|
|
bitfld.long 0x04 18. " NMIPS[18] ,MPUSHE Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " NMIPS[14] ,GFXNMI Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 13. " NMIPS[13] ,BECU3NMI Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " NMIPS[12] ,BECU1NMI Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 11. " NMIPS[11] ,BECU0NMI Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " NMIPS[9] ,IRQ0NMIERR Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " NMIPS[8] ,MPUHMLB0NMI Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " NMIPS[7] ,MPUXGFXNMI Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 5. " NMIPS[5] ,MPUXDMA0NMI Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " NMIPS[4] ,TPU0NMI Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " NMIPS[3] ,WDGNMI Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " NMIPS[2] ,SYSCNMIERR Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " NMIPS[1] ,SYSCNMILVD Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " NMIPS[0] ,EIC0NMI Preprocessed Status" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "IRQ Status Registers"
|
|
tree "IRQ Raw Status Registers"
|
|
rgroup.long 0xcb0++0x1f
|
|
line.long 0x00 "IRQ0_IRQRS0,IUNIT IRQ Raw Status Register 0 (Interrupts 31-0)"
|
|
bitfld.long 0x00 31. " IRQ31RS ,ADC0IRQ2 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " IRQ30RS ,ADC0IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " IRQ23RS ,GFXIRQ1 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " IRQ22RS ,GFXIRQ0 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ16RS ,MLB0SINT Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " IRQ15RS ,MLB0CINT Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IRQ1RS ,WDGIRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " IRQ0RS ,SYSCIRQ Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "IRQ0_IRQRS1,IUNIT IRQ Raw Status Register 1 (Interrupts 63-32)"
|
|
bitfld.long 0x04 30. " IRQ62RS ,CAN1IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 29. " IRQ61RS ,CAN0IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " IRQ56RS ,SPI2IRQTX Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 23. " IRQ55RS ,SPI2IRQRX Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IRQ53RS ,SPI1IRQTX Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " IRQ52RS ,SPI1IRQRX Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " IRQ50RS ,SPI0IRQTX Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 17. " IRQ49RS ,SPI0IRQRX Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IRQ48RS ,SHE Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 13. " IRQ45RS ,SHE Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " IRQ44RS ,RSSPI0IRQTX Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 11. " IRQ43RS ,RSSPI0IRQRX Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IRQ42RS ,EICU0IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " IRQ41RS ,EECFGIRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " IRQ38RS ,IRQ0IRQERR Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " IRQ37RS ,EECFGIRQERR Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IRQ36RS ,TCFCFGIRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " IRQ35RS ,SRCFGIRQERR Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " IRQ34RS ,RRCFGIRQERR Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IRQ33RS ,ADC0IRQP Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " IRQ32RS ,ADC0IRQR Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x08 "IRQ0_IRQRS2,IUNIT IRQ Raw Status Register 2 (Interrupts 95-64)"
|
|
bitfld.long 0x08 31. " IRQ95RS ,EIC0IRQ26 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 30. " IRQ94RS ,EIC0IRQ25 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 29. " IRQ93RS ,EIC0IRQ24 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 28. " IRQ92RS ,EIC0IRQ23 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 27. " IRQ91RS ,EIC0IRQ22 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 26. " IRQ90RS ,EIC0IRQ21 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 25. " IRQ89RS ,EIC0IRQ20 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 24. " IRQ88RS ,EIC0IRQ19 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 23. " IRQ87RS ,EIC0IRQ18 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 22. " IRQ86RS ,EIC0IRQ17 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 21. " IRQ85RS ,EIC0IRQ16 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 20. " IRQ84RS ,EIC0IRQ15 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IRQ83RS ,EIC0IRQ14 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 18. " IRQ82RS ,EIC0IRQ13 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 17. " IRQ81RS ,EIC0IRQ12 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 16. " IRQ80RS ,EIC0IRQ11 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 15. " IRQ79RS ,EIC0IRQ10 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 14. " IRQ78RS ,EIC0IRQ9 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 13. " IRQ77RS ,EIC0IRQ8 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 12. " IRQ76RS ,EIC0IRQ7 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 11. " IRQ75RS ,EIC0IRQ6 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 10. " IRQ74RS ,EIC0IRQ5 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 9. " IRQ73RS ,EIC0IRQ4 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 8. " IRQ72RS ,EIC0IRQ3 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IRQ71RS ,EIC0IRQ2 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 6. " IRQ70RS ,EIC0IRQ1 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 5. " IRQ69RS ,EIC0IRQ0 Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x0c "IRQ0_IRQRS3,IUNIT IRQ Raw Status Register 3 (Interrupts 127-96)"
|
|
bitfld.long 0x0c 31. " IRQ127RS ,ICU3IRQ1 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 30. " IRQ126RS ,ICU3IRQ0 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 29. " IRQ125RS ,ICU2IRQ1 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 28. " IRQ124RS ,ICU2IRQ0 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " IRQ115RS ,FRT19IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 18. " IRQ114RS ,FRT18IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 17. " IRQ113RS ,FRT17IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 16. " IRQ112RS ,FRT16IRQ Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 11. " IRQ107RS ,FRT3IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 10. " IRQ106RS ,FRT2IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 9. " IRQ105RS ,FRT1IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 8. " IRQ104RS ,FRT0IRQ Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 6. " IRQ102RS ,SG0IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 5. " IRQ101RS ,RTCIRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 4. " IRQ100RS ,EIC0IRQ31 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 3. " IRQ99RS ,EIC0IRQ30 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 2. " IRQ98RS ,EIC0IRQ29 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 1. " IRQ97RS ,EIC0IRQ28 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 0. " IRQ96RS ,EIC0IRQ27 Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x10 "IRQ0_IRQRS4,IUNIT IRQ Raw Status Register 4 (Interrupts 159-128)"
|
|
bitfld.long 0x10 31. " IRQ159RS ,USART6IRQTX Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 30. " IRQ158RS ,USART6IRQRX Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 26. " IRQ154RS ,USART0IRQERR Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 25. " IRQ153RS ,USART0IRQTX Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 24. " IRQ152RS ,USART0IRQRX Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 19. " IRQ147RS ,OCU17IRQ1 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 18. " IRQ146RS ,OCU17IRQ0 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 17. " IRQ145RS ,OCU16IRQ1 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 16. " IRQ144RS ,OCU16IRQ0 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 11. " IRQ139RS ,OCU1IRQ1 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 10. " IRQ138RS ,OCU1IRQ0 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 9. " IRQ137RS ,OCU0IRQ1 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 8. " IRQ136RS ,OCU0IRQ0 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 7. " IRQ135RS ,ICU19IRQ1 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 6. " IRQ134RS ,ICU19IRQ0 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 5. " IRQ133RS ,ICU18IRQ1 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 4. " IRQ132RS ,ICU18IRQ0 Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x14 "IRQ0_IRQRS5,IUNIT IRQ Raw Status Register 5 (Interrupts 191-160)"
|
|
bitfld.long 0x14 27. " IRQ187RS ,RLT9IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 26. " IRQ186RS ,RLT8IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 25. " IRQ185RS ,RLT7IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 24. " IRQ184RS ,RLT6IRQ Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 23. " IRQ183RS ,RLT5IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 22. " IRQ182RS ,RLT4IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 21. " IRQ181RS ,RLT3IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 20. " IRQ180RS ,RLT2IRQ Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 19. " IRQ179RS ,RLT1IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 18. " IRQ178RS ,RLT0IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 17. " IRQ177RS ,CORE0IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 16. " IRQ176RS ,SRCSCTIRQ Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 15. " IRQ175RS ,RCSCTIRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 14. " IRQ174RS ,SSCTIRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 13. " IRQ173RS ,MSCTIRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 12. " IRQ172RS ,DMA0IRQERR Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 11. " IRQ171RS ,DMA0IRQD7 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 10. " IRQ170RS ,DMA0IRQD6 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 9. " IRQ169RS ,DMA0IRQD5 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 8. " IRQ168RS ,DMA0IRQD4 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 7. " IRQ167RS ,DMA0IRQD3 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 6. " IRQ166RS ,DMA0IRQD2 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 5. " IRQ165RS ,DMA0IRQD1 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 4. " IRQ164RS ,DMA0IRQD0 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 0. " IRQ160RS ,USART6IRQERR Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x18 "IRQ0_IRQRS6,IUNIT IRQ Raw Status Register 6 (Interrupts 223-192)"
|
|
bitfld.long 0x18 31. " IRQ223RS ,PPG15IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 30. " IRQ222RS ,PPG14IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 29. " IRQ221RS ,PPG13IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 28. " IRQ220RS ,PPG12IRQ Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 27. " IRQ219RS ,PPG11IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 26. " IRQ218RS ,PPG10IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 25. " IRQ217RS ,PPG9IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 24. " IRQ216RS ,PPG8IRQ Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 23. " IRQ215RS ,PPG7IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 22. " IRQ214RS ,PPG6IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 21. " IRQ213RS ,PPG5IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 20. " IRQ212RS ,PPG4IRQ Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 19. " IRQ211RS ,PPG3IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 18. " IRQ210RS ,PPG2IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 17. " IRQ209RS ,PPG1IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 16. " IRQ208RS ,PPG0IRQ Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 14. " IRQ206RS ,CRC0IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 11. " IRQ203RS ,I2C0IRQERR Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 10. " IRQ202RS ,I2C0IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 7. " IRQ199RS ,I2S1IRQ Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 6. " IRQ198RS ,I2S0IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 3. " IRQ195RS ,UDC0IRQ1 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 2. " IRQ194RS ,UDC0IRQ0 Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x1c "IRQ0_IRQRS7,IUNIT IRQ Raw Status Register 7 (Interrupts 255-224)"
|
|
bitfld.long 0x1c 15. " IRQ239RS ,PPG71IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 14. " IRQ238RS ,PPG70IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 13. " IRQ237RS ,PPG69IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 12. " IRQ236RS ,PPG68IRQ Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 11. " IRQ235RS ,PPG67IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 10. " IRQ234RS ,PPG66IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 9. " IRQ233RS ,PPG65IRQ Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 8. " IRQ232RS ,PPG64IRQ Raw Status" "No interrupt,Interrupt"
|
|
sif (!CPUIS("MB9EF226")&&!CPUIS("MB9EF126")&&!CPUIS("MB9DF126")&&!CPUIS("MB9DF125"))
|
|
rgroup.long 0xcd0++0x1f
|
|
line.long 0x00 "IRQ0_IRQRS8,IUNIT IRQ Raw Status Register 8 (Interrupts 287-256)"
|
|
bitfld.long 0x00 31. " IRQ287RS ,IRQ 287 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " IRQ286RS ,IRQ 286 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " IRQ285RS ,IRQ 285 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQ284RS ,IRQ 284 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. " IRQ283RS ,IRQ 283 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " IRQ282RS ,IRQ 282 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQ281RS ,IRQ 281 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " IRQ280RS ,IRQ 280 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " IRQ279RS ,IRQ 279 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQ278RS ,IRQ 278 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " IRQ277RS ,IRQ 277 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " IRQ276RS ,IRQ 276 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ275RS ,IRQ 275 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " IRQ274RS ,IRQ 274 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " IRQ273RS ,IRQ 273 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ272RS ,IRQ 272 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " IRQ271RS ,IRQ 271 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " IRQ270RS ,IRQ 270 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQ269RS ,IRQ 269 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " IRQ268RS ,IRQ 268 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " IRQ267RS ,IRQ 267 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQ266RS ,IRQ 266 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " IRQ265RS ,IRQ 265 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " IRQ264RS ,IRQ 264 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ263RS ,IRQ 263 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " IRQ262RS ,IRQ 262 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " IRQ261RS ,IRQ 261 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ260RS ,IRQ 260 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " IRQ259RS ,IRQ 259 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IRQ258RS ,IRQ 258 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ257RS ,IRQ 257 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " IRQ256RS ,IRQ 256 Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "IRQ0_IRQRS9,IUNIT IRQ Raw Status Register 9 (Interrupts 319-288)"
|
|
bitfld.long 0x04 31. " IRQ319RS ,IRQ 319 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 30. " IRQ318RS ,IRQ 318 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 29. " IRQ317RS ,IRQ 317 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 28. " IRQ316RS ,IRQ 316 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 27. " IRQ315RS ,IRQ 315 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 26. " IRQ314RS ,IRQ 314 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 25. " IRQ313RS ,IRQ 313 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " IRQ312RS ,IRQ 312 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 23. " IRQ311RS ,IRQ 311 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 22. " IRQ310RS ,IRQ 310 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 21. " IRQ309RS ,IRQ 309 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " IRQ308RS ,IRQ 308 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IRQ307RS ,IRQ 307 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " IRQ306RS ,IRQ 306 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 17. " IRQ305RS ,IRQ 305 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IRQ304RS ,IRQ 304 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 15. " IRQ303RS ,IRQ 303 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " IRQ302RS ,IRQ 302 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IRQ301RS ,IRQ 301 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " IRQ300RS ,IRQ 300 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 11. " IRQ299RS ,IRQ 299 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IRQ298RS ,IRQ 298 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " IRQ297RS ,IRQ 297 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " IRQ296RS ,IRQ 296 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IRQ295RS ,IRQ 295 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " IRQ294RS ,IRQ 294 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " IRQ293RS ,IRQ 293 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IRQ292RS ,IRQ 292 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " IRQ291RS ,IRQ 291 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " IRQ290RS ,IRQ 290 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IRQ289RS ,IRQ 289 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " IRQ288RS ,IRQ 288 Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x08 "IRQ0_IRQRS10,IUNIT IRQ Raw Status Register 10 (Interrupts 351-320)"
|
|
bitfld.long 0x08 31. " IRQ351RS ,IRQ 351 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 30. " IRQ350RS ,IRQ 350 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 29. " IRQ349RS ,IRQ 349 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IRQ348RS ,IRQ 348 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 27. " IRQ347RS ,IRQ 347 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 26. " IRQ346RS ,IRQ 346 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 25. " IRQ345RS ,IRQ 345 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 24. " IRQ344RS ,IRQ 344 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 23. " IRQ343RS ,IRQ 343 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 22. " IRQ342RS ,IRQ 342 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 21. " IRQ341RS ,IRQ 341 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 20. " IRQ340RS ,IRQ 340 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IRQ339RS ,IRQ 339 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 18. " IRQ338RS ,IRQ 338 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 17. " IRQ337RS ,IRQ 337 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 16. " IRQ336RS ,IRQ 336 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 15. " IRQ335RS ,IRQ 335 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 14. " IRQ334RS ,IRQ 334 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IRQ333RS ,IRQ 333 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 12. " IRQ332RS ,IRQ 332 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 11. " IRQ331RS ,IRQ 331 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 10. " IRQ330RS ,IRQ 330 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 9. " IRQ329RS ,IRQ 329 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 8. " IRQ328RS ,IRQ 328 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IRQ327RS ,IRQ 327 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 6. " IRQ326RS ,IRQ 326 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 5. " IRQ325RS ,IRQ 325 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 4. " IRQ324RS ,IRQ 324 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 3. " IRQ323RS ,IRQ 323 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 2. " IRQ322RS ,IRQ 322 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 1. " IRQ321RS ,IRQ 321 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 0. " IRQ320RS ,IRQ 320 Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x0c "IRQ0_IRQRS11,IUNIT IRQ Raw Status Register 11 (Interrupts 383-352)"
|
|
bitfld.long 0x0c 31. " IRQ383RS ,IRQ 383 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 30. " IRQ382RS ,IRQ 382 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 29. " IRQ381RS ,IRQ 381 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " IRQ380RS ,IRQ 380 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 27. " IRQ379RS ,IRQ 379 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 26. " IRQ378RS ,IRQ 378 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " IRQ377RS ,IRQ 377 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 24. " IRQ376RS ,IRQ 376 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 23. " IRQ375RS ,IRQ 375 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " IRQ374RS ,IRQ 374 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 21. " IRQ373RS ,IRQ 373 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 20. " IRQ372RS ,IRQ 372 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " IRQ371RS ,IRQ 371 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 18. " IRQ370RS ,IRQ 370 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 17. " IRQ369RS ,IRQ 369 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " IRQ368RS ,IRQ 368 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 15. " IRQ367RS ,IRQ 367 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 14. " IRQ366RS ,IRQ 366 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " IRQ365RS ,IRQ 365 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 12. " IRQ364RS ,IRQ 364 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 11. " IRQ363RS ,IRQ 363 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " IRQ362RS ,IRQ 362 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 9. " IRQ361RS ,IRQ 361 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 8. " IRQ360RS ,IRQ 360 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " IRQ359RS ,IRQ 359 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 6. " IRQ358RS ,IRQ 358 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 5. " IRQ357RS ,IRQ 357 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " IRQ356RS ,IRQ 356 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 3. " IRQ355RS ,IRQ 355 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 2. " IRQ354RS ,IRQ 354 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " IRQ353RS ,IRQ 353 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 0. " IRQ352RS ,IRQ 352 Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x10 "IRQ0_IRQRS12,IUNIT IRQ Raw Status Register 12 (Interrupts 415-384)"
|
|
bitfld.long 0x10 31. " IRQ415RS ,IRQ 415 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 30. " IRQ414RS ,IRQ 414 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 29. " IRQ413RS ,IRQ 413 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 28. " IRQ412RS ,IRQ 412 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 27. " IRQ411RS ,IRQ 411 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 26. " IRQ410RS ,IRQ 410 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 25. " IRQ409RS ,IRQ 409 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 24. " IRQ408RS ,IRQ 408 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 23. " IRQ407RS ,IRQ 407 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 22. " IRQ406RS ,IRQ 406 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 21. " IRQ405RS ,IRQ 405 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 20. " IRQ404RS ,IRQ 404 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 19. " IRQ403RS ,IRQ 403 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 18. " IRQ402RS ,IRQ 402 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 17. " IRQ401RS ,IRQ 401 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 16. " IRQ400RS ,IRQ 400 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 15. " IRQ399RS ,IRQ 399 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 14. " IRQ398RS ,IRQ 398 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 13. " IRQ397RS ,IRQ 397 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 12. " IRQ396RS ,IRQ 396 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 11. " IRQ395RS ,IRQ 395 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 10. " IRQ394RS ,IRQ 394 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 9. " IRQ393RS ,IRQ 393 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 8. " IRQ392RS ,IRQ 392 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 7. " IRQ391RS ,IRQ 391 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 6. " IRQ390RS ,IRQ 390 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 5. " IRQ389RS ,IRQ 389 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 4. " IRQ388RS ,IRQ 388 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 3. " IRQ387RS ,IRQ 387 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 2. " IRQ386RS ,IRQ 386 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 1. " IRQ385RS ,IRQ 385 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 0. " IRQ384RS ,IRQ 384 Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x14 "IRQ0_IRQRS13,IUNIT IRQ Raw Status Register 13 (Interrupts 447-416)"
|
|
bitfld.long 0x14 31. " IRQ447RS ,IRQ 447 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 30. " IRQ446RS ,IRQ 446 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 29. " IRQ445RS ,IRQ 445 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 28. " IRQ444RS ,IRQ 444 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 27. " IRQ443RS ,IRQ 443 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 26. " IRQ442RS ,IRQ 442 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 25. " IRQ441RS ,IRQ 441 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 24. " IRQ440RS ,IRQ 440 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 23. " IRQ439RS ,IRQ 439 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 22. " IRQ438RS ,IRQ 438 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 21. " IRQ437RS ,IRQ 437 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 20. " IRQ436RS ,IRQ 436 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 19. " IRQ435RS ,IRQ 435 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 18. " IRQ434RS ,IRQ 434 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 17. " IRQ433RS ,IRQ 433 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 16. " IRQ432RS ,IRQ 432 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 15. " IRQ431RS ,IRQ 431 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 14. " IRQ430RS ,IRQ 430 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 13. " IRQ429RS ,IRQ 429 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 12. " IRQ428RS ,IRQ 428 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 11. " IRQ427RS ,IRQ 427 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 10. " IRQ426RS ,IRQ 426 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 9. " IRQ425RS ,IRQ 425 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 8. " IRQ424RS ,IRQ 424 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 7. " IRQ423RS ,IRQ 423 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 6. " IRQ422RS ,IRQ 422 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 5. " IRQ421RS ,IRQ 421 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 4. " IRQ420RS ,IRQ 420 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 3. " IRQ419RS ,IRQ 419 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 2. " IRQ418RS ,IRQ 418 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 1. " IRQ417RS ,IRQ 417 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 0. " IRQ416RS ,IRQ 416 Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x18 "IRQ0_IRQRS14,IUNIT IRQ Raw Status Register 14 (Interrupts 479-448)"
|
|
bitfld.long 0x18 31. " IRQ479RS ,IRQ 479 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 30. " IRQ478RS ,IRQ 478 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 29. " IRQ477RS ,IRQ 477 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 28. " IRQ476RS ,IRQ 476 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 27. " IRQ475RS ,IRQ 475 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 26. " IRQ474RS ,IRQ 474 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 25. " IRQ473RS ,IRQ 473 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 24. " IRQ472RS ,IRQ 472 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 23. " IRQ471RS ,IRQ 471 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 22. " IRQ470RS ,IRQ 470 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 21. " IRQ469RS ,IRQ 469 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 20. " IRQ468RS ,IRQ 468 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 19. " IRQ467RS ,IRQ 467 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 18. " IRQ466RS ,IRQ 466 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 17. " IRQ465RS ,IRQ 465 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 16. " IRQ464RS ,IRQ 464 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 15. " IRQ463RS ,IRQ 463 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 14. " IRQ462RS ,IRQ 462 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 13. " IRQ461RS ,IRQ 461 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 12. " IRQ460RS ,IRQ 460 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 11. " IRQ459RS ,IRQ 459 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 10. " IRQ458RS ,IRQ 458 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 9. " IRQ457RS ,IRQ 457 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 8. " IRQ456RS ,IRQ 456 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 7. " IRQ455RS ,IRQ 455 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 6. " IRQ454RS ,IRQ 454 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 5. " IRQ453RS ,IRQ 453 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 4. " IRQ452RS ,IRQ 452 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 3. " IRQ451RS ,IRQ 451 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 2. " IRQ450RS ,IRQ 450 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 1. " IRQ449RS ,IRQ 449 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 0. " IRQ448RS ,IRQ 448 Raw Status" "No interrupt,Interrupt"
|
|
line.long 0x1c "IRQ0_IRQRS15,IUNIT IRQ Raw Status Register 15 (Interrupts 511-480)"
|
|
bitfld.long 0x1c 31. " IRQ511RS ,IRQ 511 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 30. " IRQ510RS ,IRQ 510 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 29. " IRQ509RS ,IRQ 509 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 28. " IRQ508RS ,IRQ 508 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 27. " IRQ507RS ,IRQ 507 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 26. " IRQ506RS ,IRQ 506 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 25. " IRQ505RS ,IRQ 505 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 24. " IRQ504RS ,IRQ 504 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 23. " IRQ503RS ,IRQ 503 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 22. " IRQ502RS ,IRQ 502 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 21. " IRQ501RS ,IRQ 501 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 20. " IRQ500RS ,IRQ 500 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 19. " IRQ499RS ,IRQ 499 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 18. " IRQ498RS ,IRQ 498 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 17. " IRQ497RS ,IRQ 497 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 16. " IRQ496RS ,IRQ 496 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 15. " IRQ495RS ,IRQ 495 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 14. " IRQ494RS ,IRQ 494 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 13. " IRQ493RS ,IRQ 493 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 12. " IRQ492RS ,IRQ 492 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 11. " IRQ491RS ,IRQ 491 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 10. " IRQ490RS ,IRQ 490 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 9. " IRQ489RS ,IRQ 489 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 8. " IRQ488RS ,IRQ 488 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 7. " IRQ487RS ,IRQ 487 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 6. " IRQ486RS ,IRQ 486 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 5. " IRQ485RS ,IRQ 485 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 4. " IRQ484RS ,IRQ 484 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 3. " IRQ483RS ,IRQ 483 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 2. " IRQ482RS ,IRQ 482 Raw Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " IRQ481RS ,IRQ 481 Raw Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 0. " IRQ480RS ,IRQ 480 Raw Status" "No interrupt,Interrupt"
|
|
endif
|
|
tree.end
|
|
tree "IRQ Preprocessed Status Registers"
|
|
rgroup.long 0xcf0++0x1f
|
|
line.long 0x00 "IRQ0_IRQRS0,IUNIT IRQ Preprocessed Status Register 0 (Interrupts 31-0)"
|
|
bitfld.long 0x00 31. " IRQ31PS ,ADC0IRQ2 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " IRQ30PS ,ADC0IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " IRQ23PS ,GFXIRQ1 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " IRQ22PS ,GFXIRQ0 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ16PS ,MLB0SINT Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " IRQ15PS ,MLB0CINT Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IRQ1PS ,WDGIRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " IRQ0PS ,SYSCIRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "IRQ0_IRQRS1,IUNIT IRQ Preprocessed Status Register 1 (Interrupts 63-32)"
|
|
bitfld.long 0x04 30. " IRQ62PS ,CAN1IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 29. " IRQ61PS ,CAN0IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " IRQ56PS ,SPI2IRQTX Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 23. " IRQ55PS ,SPI2IRQRX Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IRQ53PS ,SPI1IRQTX Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " IRQ52PS ,SPI1IRQRX Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " IRQ50PS ,SPI0IRQTX Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 17. " IRQ49PS ,SPI0IRQRX Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IRQ48PS ,SHE Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 13. " IRQ45PS ,SHE Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " IRQ44PS ,RSSPI0IRQTX Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 11. " IRQ43PS ,RSSPI0IRQRX Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IRQ42PS ,EICU0IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " IRQ41PS ,EECFGIRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " IRQ38PS ,IRQ0IRQERR Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " IRQ37PS ,EECFGIRQERR Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IRQ36PS ,TCFCFGIRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " IRQ35PS ,SRCFGIRQERR Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " IRQ34PS ,RRCFGIRQERR Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " IRQ33PS ,ADC0IRQP Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IRQ32PS ,ADC0IRQR Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x08 "IRQ0_IRQRS2,IUNIT IRQ Preprocessed Status Register 2 (Interrupts 95-64)"
|
|
bitfld.long 0x08 31. " IRQ95PS ,EIC0IRQ26 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 30. " IRQ94PS ,EIC0IRQ25 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 29. " IRQ93PS ,EIC0IRQ24 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 28. " IRQ92PS ,EIC0IRQ23 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 27. " IRQ91PS ,EIC0IRQ22 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 26. " IRQ90PS ,EIC0IRQ21 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 25. " IRQ89PS ,EIC0IRQ20 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 24. " IRQ88PS ,EIC0IRQ19 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 23. " IRQ87PS ,EIC0IRQ18 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 22. " IRQ86PS ,EIC0IRQ17 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 21. " IRQ85PS ,EIC0IRQ16 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 20. " IRQ84PS ,EIC0IRQ15 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IRQ83PS ,EIC0IRQ14 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 18. " IRQ82PS ,EIC0IRQ13 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 17. " IRQ81PS ,EIC0IRQ12 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 16. " IRQ80PS ,EIC0IRQ11 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 15. " IRQ79PS ,EIC0IRQ10 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 14. " IRQ78PS ,EIC0IRQ9 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 13. " IRQ77PS ,EIC0IRQ8 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 12. " IRQ76PS ,EIC0IRQ7 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 11. " IRQ75PS ,EIC0IRQ6 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 10. " IRQ74PS ,EIC0IRQ5 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 9. " IRQ73PS ,EIC0IRQ4 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 8. " IRQ72PS ,EIC0IRQ3 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IRQ71PS ,EIC0IRQ2 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 6. " IRQ70PS ,EIC0IRQ1 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 5. " IRQ69PS ,EIC0IRQ0 Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x0c "IRQ0_IRQRS3,IUNIT IRQ Preprocessed Status Register 3 (Interrupts 127-96)"
|
|
bitfld.long 0x0c 31. " IRQ127PS ,ICU3IRQ1 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 30. " IRQ126PS ,ICU3IRQ0 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 29. " IRQ125PS ,ICU2IRQ1 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 28. " IRQ124PS ,ICU2IRQ0 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " IRQ115PS ,FRT19IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 18. " IRQ114PS ,FRT18IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 17. " IRQ113PS ,FRT17IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 16. " IRQ112PS ,FRT16IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 11. " IRQ107PS ,FRT3IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 10. " IRQ106PS ,FRT2IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 9. " IRQ105PS ,FRT1IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 8. " IRQ104PS ,FRT0IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 6. " IRQ102PS ,SG0IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 5. " IRQ101PS ,RTCIRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 4. " IRQ100PS ,EIC0IRQ31 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 3. " IRQ99PS ,EIC0IRQ30 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 2. " IRQ98PS ,EIC0IRQ29 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 1. " IRQ97PS ,EIC0IRQ28 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 0. " IRQ96PS ,EIC0IRQ27 Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x10 "IRQ0_IRQRS4,IUNIT IRQ Preprocessed Status Register 4 (Interrupts 159-128)"
|
|
bitfld.long 0x10 31. " IRQ159PS ,USART6IRQTX Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 30. " IRQ158PS ,USART6IRQRX Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 26. " IRQ154PS ,USART0IRQERR Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 25. " IRQ153PS ,USART0IRQTX Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 24. " IRQ152PS ,USART0IRQRX Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 19. " IRQ147PS ,OCU17IRQ1 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 18. " IRQ146PS ,OCU17IRQ0 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 17. " IRQ145PS ,OCU16IRQ1 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 16. " IRQ144PS ,OCU16IRQ0 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 11. " IRQ139PS ,OCU1IRQ1 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 10. " IRQ138PS ,OCU1IRQ0 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 9. " IRQ137PS ,OCU0IRQ1 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 8. " IRQ136PS ,OCU0IRQ0 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 7. " IRQ135PS ,ICU19IRQ1 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 6. " IRQ134PS ,ICU19IRQ0 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 5. " IRQ133PS ,ICU18IRQ1 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 4. " IRQ132PS ,ICU18IRQ0 Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x14 "IRQ0_IRQRS5,IUNIT IRQ Preprocessed Status Register 5 (Interrupts 191-160)"
|
|
bitfld.long 0x14 27. " IRQ187PS ,RLT9IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 26. " IRQ186PS ,RLT8IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 25. " IRQ185PS ,RLT7IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 24. " IRQ184PS ,RLT6IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 23. " IRQ183PS ,RLT5IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 22. " IRQ182PS ,RLT4IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 21. " IRQ181PS ,RLT3IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 20. " IRQ180PS ,RLT2IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 19. " IRQ179PS ,RLT1IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 18. " IRQ178PS ,RLT0IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 17. " IRQ177PS ,CORE0IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 16. " IRQ176PS ,SRCSCTIRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 15. " IRQ175PS ,RCSCTIRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 14. " IRQ174PS ,SSCTIRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 13. " IRQ173PS ,MSCTIRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 12. " IRQ172PS ,DMA0IRQERR Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 11. " IRQ171PS ,DMA0IRQD7 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 10. " IRQ170PS ,DMA0IRQD6 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 9. " IRQ169PS ,DMA0IRQD5 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 8. " IRQ168PS ,DMA0IRQD4 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 7. " IRQ167PS ,DMA0IRQD3 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 6. " IRQ166PS ,DMA0IRQD2 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 5. " IRQ165PS ,DMA0IRQD1 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 4. " IRQ164PS ,DMA0IRQD0 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 0. " IRQ160PS ,USART6IRQERR Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x18 "IRQ0_IRQRS6,IUNIT IRQ Preprocessed Status Register 6 (Interrupts 223-192)"
|
|
bitfld.long 0x18 31. " IRQ223PS ,PPG15IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 30. " IRQ222PS ,PPG14IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 29. " IRQ221PS ,PPG13IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 28. " IRQ220PS ,PPG12IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 27. " IRQ219PS ,PPG11IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 26. " IRQ218PS ,PPG10IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 25. " IRQ217PS ,PPG9IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 24. " IRQ216PS ,PPG8IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 23. " IRQ215PS ,PPG7IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 22. " IRQ214PS ,PPG6IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 21. " IRQ213PS ,PPG5IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 20. " IRQ212PS ,PPG4IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 19. " IRQ211PS ,PPG3IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 18. " IRQ210PS ,PPG2IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 17. " IRQ209PS ,PPG1IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 16. " IRQ208PS ,PPG0IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 14. " IRQ206PS ,CRC0IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 11. " IRQ203PS ,I2C0IRQERR Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 10. " IRQ202PS ,I2C0IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 7. " IRQ199PS ,I2S1IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 6. " IRQ198PS ,I2S0IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 3. " IRQ195PS ,UDC0IRQ1 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 2. " IRQ194PS ,UDC0IRQ0 Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x1c "IRQ0_IRQRS7,IUNIT IRQ Preprocessed Status Register 7 (Interrupts 255-224)"
|
|
bitfld.long 0x1c 15. " IRQ239PS ,PPG71IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 14. " IRQ238PS ,PPG70IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 13. " IRQ237PS ,PPG69IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 12. " IRQ236PS ,PPG68IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 11. " IRQ235PS ,PPG67IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 10. " IRQ234PS ,PPG66IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 9. " IRQ233PS ,PPG65IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 8. " IRQ232PS ,PPG64IRQ Preprocessed Status" "No interrupt,Interrupt"
|
|
sif (!CPUIS("MB9EF226")&&!CPUIS("MB9EF126")&&!CPUIS("MB9DF126")&&!CPUIS("MB9DF125"))
|
|
rgroup.long 0xd10++0x1f
|
|
line.long 0x00 "IRQ0_IRQPS8,IUNIT IRQ Preprocessed Status Register 8 (Interrupts 287-256)"
|
|
bitfld.long 0x00 31. " IRQ287PS ,IRQ 287 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " IRQ286PS ,IRQ 286 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " IRQ285PS ,IRQ 285 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQ284PS ,IRQ 284 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. " IRQ283PS ,IRQ 283 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " IRQ282PS ,IRQ 282 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQ281PS ,IRQ 281 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " IRQ280PS ,IRQ 280 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " IRQ279PS ,IRQ 279 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQ278PS ,IRQ 278 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " IRQ277PS ,IRQ 277 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " IRQ276PS ,IRQ 276 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ275PS ,IRQ 275 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " IRQ274PS ,IRQ 274 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " IRQ273PS ,IRQ 273 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ272PS ,IRQ 272 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " IRQ271PS ,IRQ 271 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " IRQ270PS ,IRQ 270 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQ269PS ,IRQ 269 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " IRQ268PS ,IRQ 268 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " IRQ267PS ,IRQ 267 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQ266PS ,IRQ 266 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " IRQ265PS ,IRQ 265 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " IRQ264PS ,IRQ 264 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ263PS ,IRQ 263 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " IRQ262PS ,IRQ 262 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " IRQ261PS ,IRQ 261 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ260PS ,IRQ 260 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " IRQ259PS ,IRQ 259 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IRQ258PS ,IRQ 258 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ257PS ,IRQ 257 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " IRQ256PS ,IRQ 256 Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "IRQ0_IRQPS9,IUNIT IRQ Preprocessed Status Register 0 (Interrupts 319-288)"
|
|
bitfld.long 0x04 31. " IRQ319PS ,IRQ 319 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 30. " IRQ318PS ,IRQ 318 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 29. " IRQ317PS ,IRQ 317 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 28. " IRQ316PS ,IRQ 316 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 27. " IRQ315PS ,IRQ 315 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 26. " IRQ314PS ,IRQ 314 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 25. " IRQ313PS ,IRQ 313 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " IRQ312PS ,IRQ 312 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 23. " IRQ311PS ,IRQ 311 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 22. " IRQ310PS ,IRQ 310 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 21. " IRQ309PS ,IRQ 309 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " IRQ308PS ,IRQ 308 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IRQ307PS ,IRQ 307 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " IRQ306PS ,IRQ 306 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 17. " IRQ305PS ,IRQ 305 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IRQ304PS ,IRQ 304 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 15. " IRQ303PS ,IRQ 303 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " IRQ302PS ,IRQ 302 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IRQ301PS ,IRQ 301 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " IRQ300PS ,IRQ 300 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 11. " IRQ299PS ,IRQ 299 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IRQ298PS ,IRQ 298 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " IRQ297PS ,IRQ 297 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " IRQ296PS ,IRQ 296 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IRQ295PS ,IRQ 295 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " IRQ294PS ,IRQ 294 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " IRQ293PS ,IRQ 293 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IRQ292PS ,IRQ 292 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " IRQ291PS ,IRQ 291 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " IRQ290PS ,IRQ 290 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IRQ289PS ,IRQ 289 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " IRQ288PS ,IRQ 288 Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x08 "IRQ0_IRQPS10,IUNIT IRQ Preprocessed Status Register 10 (Interrupts 351-320)"
|
|
bitfld.long 0x08 31. " IRQ351PS ,IRQ 351 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 30. " IRQ350PS ,IRQ 350 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 29. " IRQ349PS ,IRQ 349 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IRQ348PS ,IRQ 348 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 27. " IRQ347PS ,IRQ 347 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 26. " IRQ346PS ,IRQ 346 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 25. " IRQ345PS ,IRQ 345 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 24. " IRQ344PS ,IRQ 344 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 23. " IRQ343PS ,IRQ 343 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 22. " IRQ342PS ,IRQ 342 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 21. " IRQ341PS ,IRQ 341 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 20. " IRQ340PS ,IRQ 340 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IRQ339PS ,IRQ 339 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 18. " IRQ338PS ,IRQ 338 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 17. " IRQ337PS ,IRQ 337 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 16. " IRQ336PS ,IRQ 336 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 15. " IRQ335PS ,IRQ 335 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 14. " IRQ334PS ,IRQ 334 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IRQ333PS ,IRQ 333 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 12. " IRQ332PS ,IRQ 332 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 11. " IRQ331PS ,IRQ 331 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 10. " IRQ330PS ,IRQ 330 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 9. " IRQ329PS ,IRQ 329 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 8. " IRQ328PS ,IRQ 328 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IRQ327PS ,IRQ 327 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 6. " IRQ326PS ,IRQ 326 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 5. " IRQ325PS ,IRQ 325 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 4. " IRQ324PS ,IRQ 324 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 3. " IRQ323PS ,IRQ 323 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 2. " IRQ322PS ,IRQ 322 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 1. " IRQ321PS ,IRQ 321 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 0. " IRQ320PS ,IRQ 320 Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x0c "IRQ0_IRQPS11,IUNIT IRQ Preprocessed Status Register 11 (Interrupts 383-352)"
|
|
bitfld.long 0x0c 31. " IRQ383PS ,IRQ 383 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 30. " IRQ382PS ,IRQ 382 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 29. " IRQ381PS ,IRQ 381 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " IRQ380PS ,IRQ 380 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 27. " IRQ379PS ,IRQ 379 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 26. " IRQ378PS ,IRQ 378 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " IRQ377PS ,IRQ 377 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 24. " IRQ376PS ,IRQ 376 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 23. " IRQ375PS ,IRQ 375 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " IRQ374PS ,IRQ 374 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 21. " IRQ373PS ,IRQ 373 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 20. " IRQ372PS ,IRQ 372 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " IRQ371PS ,IRQ 371 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 18. " IRQ370PS ,IRQ 370 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 17. " IRQ369PS ,IRQ 369 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " IRQ368PS ,IRQ 368 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 15. " IRQ367PS ,IRQ 367 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 14. " IRQ366PS ,IRQ 366 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " IRQ365PS ,IRQ 365 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 12. " IRQ364PS ,IRQ 364 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 11. " IRQ363PS ,IRQ 363 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " IRQ362PS ,IRQ 362 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 9. " IRQ361PS ,IRQ 361 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 8. " IRQ360PS ,IRQ 360 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " IRQ359PS ,IRQ 359 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 6. " IRQ358PS ,IRQ 358 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 5. " IRQ357PS ,IRQ 357 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " IRQ356PS ,IRQ 356 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 3. " IRQ355PS ,IRQ 355 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 2. " IRQ354PS ,IRQ 354 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " IRQ353PS ,IRQ 353 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0c 0. " IRQ352PS ,IRQ 352 Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x10 "IRQ0_IRQPS12,IUNIT IRQ Preprocessed Status Register 12 (Interrupts 415-384)"
|
|
bitfld.long 0x10 31. " IRQ415PS ,IRQ 415 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 30. " IRQ414PS ,IRQ 414 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 29. " IRQ413PS ,IRQ 413 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 28. " IRQ412PS ,IRQ 412 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 27. " IRQ411PS ,IRQ 411 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 26. " IRQ410PS ,IRQ 410 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 25. " IRQ409PS ,IRQ 409 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 24. " IRQ408PS ,IRQ 408 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 23. " IRQ407PS ,IRQ 407 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 22. " IRQ406PS ,IRQ 406 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 21. " IRQ405PS ,IRQ 405 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 20. " IRQ404PS ,IRQ 404 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 19. " IRQ403PS ,IRQ 403 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 18. " IRQ402PS ,IRQ 402 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 17. " IRQ401PS ,IRQ 401 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 16. " IRQ400PS ,IRQ 400 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 15. " IRQ399PS ,IRQ 399 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 14. " IRQ398PS ,IRQ 398 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 13. " IRQ397PS ,IRQ 397 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 12. " IRQ396PS ,IRQ 396 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 11. " IRQ395PS ,IRQ 395 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 10. " IRQ394PS ,IRQ 394 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 9. " IRQ393PS ,IRQ 393 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 8. " IRQ392PS ,IRQ 392 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 7. " IRQ391PS ,IRQ 391 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 6. " IRQ390PS ,IRQ 390 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 5. " IRQ389PS ,IRQ 389 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 4. " IRQ388PS ,IRQ 388 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 3. " IRQ387PS ,IRQ 387 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 2. " IRQ386PS ,IRQ 386 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 1. " IRQ385PS ,IRQ 385 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 0. " IRQ384PS ,IRQ 384 Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x14 "IRQ0_IRQPS13,IUNIT IRQ Preprocessed Status Register 13 (Interrupts 447-416)"
|
|
bitfld.long 0x14 31. " IRQ447PS ,IRQ 447 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 30. " IRQ446PS ,IRQ 446 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 29. " IRQ445PS ,IRQ 445 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 28. " IRQ444PS ,IRQ 444 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 27. " IRQ443PS ,IRQ 443 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 26. " IRQ442PS ,IRQ 442 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 25. " IRQ441PS ,IRQ 441 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 24. " IRQ440PS ,IRQ 440 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 23. " IRQ439PS ,IRQ 439 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 22. " IRQ438PS ,IRQ 438 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 21. " IRQ437PS ,IRQ 437 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 20. " IRQ436PS ,IRQ 436 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 19. " IRQ435PS ,IRQ 435 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 18. " IRQ434PS ,IRQ 434 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 17. " IRQ433PS ,IRQ 433 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 16. " IRQ432PS ,IRQ 432 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 15. " IRQ431PS ,IRQ 431 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 14. " IRQ430PS ,IRQ 430 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 13. " IRQ429PS ,IRQ 429 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 12. " IRQ428PS ,IRQ 428 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 11. " IRQ427PS ,IRQ 427 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 10. " IRQ426PS ,IRQ 426 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 9. " IRQ425PS ,IRQ 425 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 8. " IRQ424PS ,IRQ 424 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 7. " IRQ423PS ,IRQ 423 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 6. " IRQ422PS ,IRQ 422 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 5. " IRQ421PS ,IRQ 421 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 4. " IRQ420PS ,IRQ 420 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 3. " IRQ419PS ,IRQ 419 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 2. " IRQ418PS ,IRQ 418 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 1. " IRQ417PS ,IRQ 417 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 0. " IRQ416PS ,IRQ 416 Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x18 "IRQ0_IRQPS14,IUNIT IRQ Preprocessed Status Register 14 (Interrupts 479-448)"
|
|
bitfld.long 0x18 31. " IRQ479PS ,IRQ 479 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 30. " IRQ478PS ,IRQ 478 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 29. " IRQ477PS ,IRQ 477 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 28. " IRQ476PS ,IRQ 476 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 27. " IRQ475PS ,IRQ 475 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 26. " IRQ474PS ,IRQ 474 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 25. " IRQ473PS ,IRQ 473 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 24. " IRQ472PS ,IRQ 472 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 23. " IRQ471PS ,IRQ 471 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 22. " IRQ470PS ,IRQ 470 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 21. " IRQ469PS ,IRQ 469 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 20. " IRQ468PS ,IRQ 468 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 19. " IRQ467PS ,IRQ 467 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 18. " IRQ466PS ,IRQ 466 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 17. " IRQ465PS ,IRQ 465 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 16. " IRQ464PS ,IRQ 464 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 15. " IRQ463PS ,IRQ 463 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 14. " IRQ462PS ,IRQ 462 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 13. " IRQ461PS ,IRQ 461 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 12. " IRQ460PS ,IRQ 460 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 11. " IRQ459PS ,IRQ 459 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 10. " IRQ458PS ,IRQ 458 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 9. " IRQ457PS ,IRQ 457 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 8. " IRQ456PS ,IRQ 456 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 7. " IRQ455PS ,IRQ 455 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 6. " IRQ454PS ,IRQ 454 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 5. " IRQ453PS ,IRQ 453 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 4. " IRQ452PS ,IRQ 452 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 3. " IRQ451PS ,IRQ 451 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 2. " IRQ450PS ,IRQ 450 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 1. " IRQ449PS ,IRQ 449 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x18 0. " IRQ448PS ,IRQ 448 Preprocessed Status" "No interrupt,Interrupt"
|
|
line.long 0x1c "IRQ0_IRQPS15,IUNIT IRQ Preprocessed Status Register 15 (Interrupts 511-480)"
|
|
bitfld.long 0x1c 31. " IRQ511PS ,IRQ 511 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 30. " IRQ510PS ,IRQ 510 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 29. " IRQ509PS ,IRQ 509 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 28. " IRQ508PS ,IRQ 508 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 27. " IRQ507PS ,IRQ 507 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 26. " IRQ506PS ,IRQ 506 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 25. " IRQ505PS ,IRQ 505 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 24. " IRQ504PS ,IRQ 504 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 23. " IRQ503PS ,IRQ 503 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 22. " IRQ502PS ,IRQ 502 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 21. " IRQ501PS ,IRQ 501 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 20. " IRQ500PS ,IRQ 500 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 19. " IRQ499PS ,IRQ 499 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 18. " IRQ498PS ,IRQ 498 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 17. " IRQ497PS ,IRQ 497 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 16. " IRQ496PS ,IRQ 496 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 15. " IRQ495PS ,IRQ 495 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 14. " IRQ494PS ,IRQ 494 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 13. " IRQ493PS ,IRQ 493 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 12. " IRQ492PS ,IRQ 492 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 11. " IRQ491PS ,IRQ 491 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 10. " IRQ490PS ,IRQ 490 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 9. " IRQ489PS ,IRQ 489 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 8. " IRQ488PS ,IRQ 488 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 7. " IRQ487PS ,IRQ 487 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 6. " IRQ486PS ,IRQ 486 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 5. " IRQ485PS ,IRQ 485 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 4. " IRQ484PS ,IRQ 484 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 3. " IRQ483PS ,IRQ 483 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 2. " IRQ482PS ,IRQ 482 Preprocessed Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " IRQ481PS ,IRQ 481 Preprocessed Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x1c 0. " IRQ480PS ,IRQ 480 Preprocessed Status" "No interrupt,Interrupt"
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
width 15.
|
|
wgroup.long 0xd30++0x03
|
|
line.long 0x00 "IRQ0_UNLOCK,IUNIT Unlock Register"
|
|
rgroup.long 0xd38++0x03
|
|
line.long 0x00 "IRQ0_MID,IUNIT Module Identification Register"
|
|
group.long 0xd40++0x03
|
|
line.long 0x00 "IRQ0_EEI,IUNIT ECC Error Interrupt Register"
|
|
rbitfld.long 0x00 24. " EEIS ,ECC Error IRQ Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " EEIC ,ECC Error IRQ Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 8. " EENS ,ECC Error NMI Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " EENC ,ECC Error NMI Interrupt Clear" "No effect,Clear"
|
|
rgroup.long 0xd44++0x03
|
|
line.long 0x00 "IRQ0_EAN,IUNIT ECC Address Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EAN ,Address of SRAM location where ECC error has occurred"
|
|
group.long 0xd48++0x0f
|
|
line.long 0x00 "IRQ0_ET,IUNIT ECC Test Register"
|
|
bitfld.long 0x00 0. " ET ,ECC Test Enable" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ0_EEB0,IUNIT ECC Error Bits Register 0"
|
|
hexmask.long 0x04 2.--31. 1. " EEB0 ,ECC Error bits [29:0]"
|
|
line.long 0x08 "IRQ0_EEB1,IUNIT ECC Error Bits Register 1"
|
|
hexmask.long 0x08 2.--31. 1. " EEB1 ,ECC Error bits [66:37]"
|
|
line.long 0x0c "IRQ0_EEB2,IUNIT ECC Error Bits Register 2"
|
|
hexmask.long.byte 0x0c 8.--14. 1. " EEBO2 ,ECC Error bits [73:67]"
|
|
hexmask.long.byte 0x0c 0.--6. 1. " EEBE2 ,ECC Error bits [36:30]"
|
|
width 12.
|
|
tree.end
|
|
tree "Port Pin Configuration"
|
|
base ad:0xb07e8000
|
|
width 14.
|
|
textline " "
|
|
if ((d.l((ad:0xb07e8000+0x0))&0x9000)==0x9000)
|
|
group.word 0x0++0x01
|
|
line.word 0x00 "PPC_PCFGR0,Pin Configuration Register 0"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x0))&0x9000)==0x8000)
|
|
group.word 0x0++0x01
|
|
line.word 0x00 "PPC_PCFGR0,Pin Configuration Register 0"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x0))&0x9000)==0x1000)
|
|
group.word 0x0++0x01
|
|
line.word 0x00 "PPC_PCFGR0,Pin Configuration Register 0"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x0++0x01
|
|
line.word 0x00 "PPC_PCFGR0,Pin Configuration Register 0"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2))&0x9000)==0x9000)
|
|
group.word 0x2++0x01
|
|
line.word 0x00 "PPC_PCFGR1,Pin Configuration Register 1"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2))&0x9000)==0x8000)
|
|
group.word 0x2++0x01
|
|
line.word 0x00 "PPC_PCFGR1,Pin Configuration Register 1"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2))&0x9000)==0x1000)
|
|
group.word 0x2++0x01
|
|
line.word 0x00 "PPC_PCFGR1,Pin Configuration Register 1"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2++0x01
|
|
line.word 0x00 "PPC_PCFGR1,Pin Configuration Register 1"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x4))&0x9000)==0x9000)
|
|
group.word 0x4++0x01
|
|
line.word 0x00 "PPC_PCFGR2,Pin Configuration Register 2"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x4))&0x9000)==0x8000)
|
|
group.word 0x4++0x01
|
|
line.word 0x00 "PPC_PCFGR2,Pin Configuration Register 2"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x4))&0x9000)==0x1000)
|
|
group.word 0x4++0x01
|
|
line.word 0x00 "PPC_PCFGR2,Pin Configuration Register 2"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x4++0x01
|
|
line.word 0x00 "PPC_PCFGR2,Pin Configuration Register 2"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x6))&0x9000)==0x9000)
|
|
group.word 0x6++0x01
|
|
line.word 0x00 "PPC_PCFGR3,Pin Configuration Register 3"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x6))&0x9000)==0x8000)
|
|
group.word 0x6++0x01
|
|
line.word 0x00 "PPC_PCFGR3,Pin Configuration Register 3"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x6))&0x9000)==0x1000)
|
|
group.word 0x6++0x01
|
|
line.word 0x00 "PPC_PCFGR3,Pin Configuration Register 3"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x6++0x01
|
|
line.word 0x00 "PPC_PCFGR3,Pin Configuration Register 3"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x8))&0x9000)==0x9000)
|
|
group.word 0x8++0x01
|
|
line.word 0x00 "PPC_PCFGR4,Pin Configuration Register 4"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x8))&0x9000)==0x8000)
|
|
group.word 0x8++0x01
|
|
line.word 0x00 "PPC_PCFGR4,Pin Configuration Register 4"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x8))&0x9000)==0x1000)
|
|
group.word 0x8++0x01
|
|
line.word 0x00 "PPC_PCFGR4,Pin Configuration Register 4"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x8++0x01
|
|
line.word 0x00 "PPC_PCFGR4,Pin Configuration Register 4"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xA))&0x9000)==0x9000)
|
|
group.word 0xA++0x01
|
|
line.word 0x00 "PPC_PCFGR5,Pin Configuration Register 5"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xA))&0x9000)==0x8000)
|
|
group.word 0xA++0x01
|
|
line.word 0x00 "PPC_PCFGR5,Pin Configuration Register 5"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xA))&0x9000)==0x1000)
|
|
group.word 0xA++0x01
|
|
line.word 0x00 "PPC_PCFGR5,Pin Configuration Register 5"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xA++0x01
|
|
line.word 0x00 "PPC_PCFGR5,Pin Configuration Register 5"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xC))&0x9000)==0x9000)
|
|
group.word 0xC++0x01
|
|
line.word 0x00 "PPC_PCFGR6,Pin Configuration Register 6"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xC))&0x9000)==0x8000)
|
|
group.word 0xC++0x01
|
|
line.word 0x00 "PPC_PCFGR6,Pin Configuration Register 6"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xC))&0x9000)==0x1000)
|
|
group.word 0xC++0x01
|
|
line.word 0x00 "PPC_PCFGR6,Pin Configuration Register 6"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xC++0x01
|
|
line.word 0x00 "PPC_PCFGR6,Pin Configuration Register 6"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xE))&0x9000)==0x9000)
|
|
group.word 0xE++0x01
|
|
line.word 0x00 "PPC_PCFGR7,Pin Configuration Register 7"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xE))&0x9000)==0x8000)
|
|
group.word 0xE++0x01
|
|
line.word 0x00 "PPC_PCFGR7,Pin Configuration Register 7"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xE))&0x9000)==0x1000)
|
|
group.word 0xE++0x01
|
|
line.word 0x00 "PPC_PCFGR7,Pin Configuration Register 7"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xE++0x01
|
|
line.word 0x00 "PPC_PCFGR7,Pin Configuration Register 7"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x10))&0x9000)==0x9000)
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "PPC_PCFGR8,Pin Configuration Register 8"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x10))&0x9000)==0x8000)
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "PPC_PCFGR8,Pin Configuration Register 8"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x10))&0x9000)==0x1000)
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "PPC_PCFGR8,Pin Configuration Register 8"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "PPC_PCFGR8,Pin Configuration Register 8"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x12))&0x9000)==0x9000)
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "PPC_PCFGR9,Pin Configuration Register 9"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x12))&0x9000)==0x8000)
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "PPC_PCFGR9,Pin Configuration Register 9"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x12))&0x9000)==0x1000)
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "PPC_PCFGR9,Pin Configuration Register 9"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "PPC_PCFGR9,Pin Configuration Register 9"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x14))&0x9000)==0x9000)
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "PPC_PCFGR10,Pin Configuration Register 10"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x14))&0x9000)==0x8000)
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "PPC_PCFGR10,Pin Configuration Register 10"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x14))&0x9000)==0x1000)
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "PPC_PCFGR10,Pin Configuration Register 10"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "PPC_PCFGR10,Pin Configuration Register 10"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x16))&0x9000)==0x9000)
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "PPC_PCFGR11,Pin Configuration Register 11"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x16))&0x9000)==0x8000)
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "PPC_PCFGR11,Pin Configuration Register 11"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x16))&0x9000)==0x1000)
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "PPC_PCFGR11,Pin Configuration Register 11"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "PPC_PCFGR11,Pin Configuration Register 11"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x18))&0x9000)==0x9000)
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "PPC_PCFGR12,Pin Configuration Register 12"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x18))&0x9000)==0x8000)
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "PPC_PCFGR12,Pin Configuration Register 12"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x18))&0x9000)==0x1000)
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "PPC_PCFGR12,Pin Configuration Register 12"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "PPC_PCFGR12,Pin Configuration Register 12"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1A))&0x9000)==0x9000)
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "PPC_PCFGR13,Pin Configuration Register 13"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1A))&0x9000)==0x8000)
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "PPC_PCFGR13,Pin Configuration Register 13"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1A))&0x9000)==0x1000)
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "PPC_PCFGR13,Pin Configuration Register 13"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "PPC_PCFGR13,Pin Configuration Register 13"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1C))&0x9000)==0x9000)
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "PPC_PCFGR14,Pin Configuration Register 14"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1C))&0x9000)==0x8000)
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "PPC_PCFGR14,Pin Configuration Register 14"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1C))&0x9000)==0x1000)
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "PPC_PCFGR14,Pin Configuration Register 14"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "PPC_PCFGR14,Pin Configuration Register 14"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1E))&0x9000)==0x9000)
|
|
group.word 0x1E++0x01
|
|
line.word 0x00 "PPC_PCFGR15,Pin Configuration Register 15"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1E))&0x9000)==0x8000)
|
|
group.word 0x1E++0x01
|
|
line.word 0x00 "PPC_PCFGR15,Pin Configuration Register 15"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1E))&0x9000)==0x1000)
|
|
group.word 0x1E++0x01
|
|
line.word 0x00 "PPC_PCFGR15,Pin Configuration Register 15"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1E++0x01
|
|
line.word 0x00 "PPC_PCFGR15,Pin Configuration Register 15"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x20))&0x9000)==0x9000)
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "PPC_PCFGR16,Pin Configuration Register 16"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x20))&0x9000)==0x8000)
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "PPC_PCFGR16,Pin Configuration Register 16"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x20))&0x9000)==0x1000)
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "PPC_PCFGR16,Pin Configuration Register 16"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "PPC_PCFGR16,Pin Configuration Register 16"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x22))&0x9000)==0x9000)
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "PPC_PCFGR17,Pin Configuration Register 17"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x22))&0x9000)==0x8000)
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "PPC_PCFGR17,Pin Configuration Register 17"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x22))&0x9000)==0x1000)
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "PPC_PCFGR17,Pin Configuration Register 17"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "PPC_PCFGR17,Pin Configuration Register 17"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x24))&0x9000)==0x9000)
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "PPC_PCFGR18,Pin Configuration Register 18"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x24))&0x9000)==0x8000)
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "PPC_PCFGR18,Pin Configuration Register 18"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x24))&0x9000)==0x1000)
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "PPC_PCFGR18,Pin Configuration Register 18"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "PPC_PCFGR18,Pin Configuration Register 18"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x26))&0x9000)==0x9000)
|
|
group.word 0x26++0x01
|
|
line.word 0x00 "PPC_PCFGR19,Pin Configuration Register 19"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x26))&0x9000)==0x8000)
|
|
group.word 0x26++0x01
|
|
line.word 0x00 "PPC_PCFGR19,Pin Configuration Register 19"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x26))&0x9000)==0x1000)
|
|
group.word 0x26++0x01
|
|
line.word 0x00 "PPC_PCFGR19,Pin Configuration Register 19"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x26++0x01
|
|
line.word 0x00 "PPC_PCFGR19,Pin Configuration Register 19"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x28))&0x9000)==0x9000)
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "PPC_PCFGR20,Pin Configuration Register 20"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x28))&0x9000)==0x8000)
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "PPC_PCFGR20,Pin Configuration Register 20"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x28))&0x9000)==0x1000)
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "PPC_PCFGR20,Pin Configuration Register 20"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "PPC_PCFGR20,Pin Configuration Register 20"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2A))&0x9000)==0x9000)
|
|
group.word 0x2A++0x01
|
|
line.word 0x00 "PPC_PCFGR21,Pin Configuration Register 21"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2A))&0x9000)==0x8000)
|
|
group.word 0x2A++0x01
|
|
line.word 0x00 "PPC_PCFGR21,Pin Configuration Register 21"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2A))&0x9000)==0x1000)
|
|
group.word 0x2A++0x01
|
|
line.word 0x00 "PPC_PCFGR21,Pin Configuration Register 21"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2A++0x01
|
|
line.word 0x00 "PPC_PCFGR21,Pin Configuration Register 21"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2C))&0x9000)==0x9000)
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "PPC_PCFGR22,Pin Configuration Register 22"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2C))&0x9000)==0x8000)
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "PPC_PCFGR22,Pin Configuration Register 22"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2C))&0x9000)==0x1000)
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "PPC_PCFGR22,Pin Configuration Register 22"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "PPC_PCFGR22,Pin Configuration Register 22"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2E))&0x9000)==0x9000)
|
|
group.word 0x2E++0x01
|
|
line.word 0x00 "PPC_PCFGR23,Pin Configuration Register 23"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2E))&0x9000)==0x8000)
|
|
group.word 0x2E++0x01
|
|
line.word 0x00 "PPC_PCFGR23,Pin Configuration Register 23"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2E))&0x9000)==0x1000)
|
|
group.word 0x2E++0x01
|
|
line.word 0x00 "PPC_PCFGR23,Pin Configuration Register 23"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2E++0x01
|
|
line.word 0x00 "PPC_PCFGR23,Pin Configuration Register 23"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x30))&0x9000)==0x9000)
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "PPC_PCFGR24,Pin Configuration Register 24"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x30))&0x9000)==0x8000)
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "PPC_PCFGR24,Pin Configuration Register 24"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x30))&0x9000)==0x1000)
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "PPC_PCFGR24,Pin Configuration Register 24"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "PPC_PCFGR24,Pin Configuration Register 24"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x32))&0x9000)==0x9000)
|
|
group.word 0x32++0x01
|
|
line.word 0x00 "PPC_PCFGR25,Pin Configuration Register 25"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x32))&0x9000)==0x8000)
|
|
group.word 0x32++0x01
|
|
line.word 0x00 "PPC_PCFGR25,Pin Configuration Register 25"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x32))&0x9000)==0x1000)
|
|
group.word 0x32++0x01
|
|
line.word 0x00 "PPC_PCFGR25,Pin Configuration Register 25"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x32++0x01
|
|
line.word 0x00 "PPC_PCFGR25,Pin Configuration Register 25"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x34))&0x9000)==0x9000)
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "PPC_PCFGR26,Pin Configuration Register 26"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x34))&0x9000)==0x8000)
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "PPC_PCFGR26,Pin Configuration Register 26"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x34))&0x9000)==0x1000)
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "PPC_PCFGR26,Pin Configuration Register 26"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "PPC_PCFGR26,Pin Configuration Register 26"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x36))&0x9000)==0x9000)
|
|
group.word 0x36++0x01
|
|
line.word 0x00 "PPC_PCFGR27,Pin Configuration Register 27"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x36))&0x9000)==0x8000)
|
|
group.word 0x36++0x01
|
|
line.word 0x00 "PPC_PCFGR27,Pin Configuration Register 27"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x36))&0x9000)==0x1000)
|
|
group.word 0x36++0x01
|
|
line.word 0x00 "PPC_PCFGR27,Pin Configuration Register 27"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x36++0x01
|
|
line.word 0x00 "PPC_PCFGR27,Pin Configuration Register 27"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x38))&0x9000)==0x9000)
|
|
group.word 0x38++0x01
|
|
line.word 0x00 "PPC_PCFGR28,Pin Configuration Register 28"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x38))&0x9000)==0x8000)
|
|
group.word 0x38++0x01
|
|
line.word 0x00 "PPC_PCFGR28,Pin Configuration Register 28"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x38))&0x9000)==0x1000)
|
|
group.word 0x38++0x01
|
|
line.word 0x00 "PPC_PCFGR28,Pin Configuration Register 28"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x38++0x01
|
|
line.word 0x00 "PPC_PCFGR28,Pin Configuration Register 28"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x3A))&0x9000)==0x9000)
|
|
group.word 0x3A++0x01
|
|
line.word 0x00 "PPC_PCFGR29,Pin Configuration Register 29"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x3A))&0x9000)==0x8000)
|
|
group.word 0x3A++0x01
|
|
line.word 0x00 "PPC_PCFGR29,Pin Configuration Register 29"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x3A))&0x9000)==0x1000)
|
|
group.word 0x3A++0x01
|
|
line.word 0x00 "PPC_PCFGR29,Pin Configuration Register 29"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x3A++0x01
|
|
line.word 0x00 "PPC_PCFGR29,Pin Configuration Register 29"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x3C))&0x9000)==0x9000)
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "PPC_PCFGR30,Pin Configuration Register 30"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x3C))&0x9000)==0x8000)
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "PPC_PCFGR30,Pin Configuration Register 30"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x3C))&0x9000)==0x1000)
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "PPC_PCFGR30,Pin Configuration Register 30"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "PPC_PCFGR30,Pin Configuration Register 30"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x3E))&0x9000)==0x9000)
|
|
group.word 0x3E++0x01
|
|
line.word 0x00 "PPC_PCFGR31,Pin Configuration Register 31"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x3E))&0x9000)==0x8000)
|
|
group.word 0x3E++0x01
|
|
line.word 0x00 "PPC_PCFGR31,Pin Configuration Register 31"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x3E))&0x9000)==0x1000)
|
|
group.word 0x3E++0x01
|
|
line.word 0x00 "PPC_PCFGR31,Pin Configuration Register 31"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x3E++0x01
|
|
line.word 0x00 "PPC_PCFGR31,Pin Configuration Register 31"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x40))&0x9000)==0x9000)
|
|
group.word 0x40++0x01
|
|
line.word 0x00 "PPC_PCFGR32,Pin Configuration Register 32"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x40))&0x9000)==0x8000)
|
|
group.word 0x40++0x01
|
|
line.word 0x00 "PPC_PCFGR32,Pin Configuration Register 32"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x40))&0x9000)==0x1000)
|
|
group.word 0x40++0x01
|
|
line.word 0x00 "PPC_PCFGR32,Pin Configuration Register 32"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x40++0x01
|
|
line.word 0x00 "PPC_PCFGR32,Pin Configuration Register 32"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x42))&0x9000)==0x9000)
|
|
group.word 0x42++0x01
|
|
line.word 0x00 "PPC_PCFGR33,Pin Configuration Register 33"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x42))&0x9000)==0x8000)
|
|
group.word 0x42++0x01
|
|
line.word 0x00 "PPC_PCFGR33,Pin Configuration Register 33"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x42))&0x9000)==0x1000)
|
|
group.word 0x42++0x01
|
|
line.word 0x00 "PPC_PCFGR33,Pin Configuration Register 33"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x42++0x01
|
|
line.word 0x00 "PPC_PCFGR33,Pin Configuration Register 33"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x44))&0x9000)==0x9000)
|
|
group.word 0x44++0x01
|
|
line.word 0x00 "PPC_PCFGR34,Pin Configuration Register 34"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x44))&0x9000)==0x8000)
|
|
group.word 0x44++0x01
|
|
line.word 0x00 "PPC_PCFGR34,Pin Configuration Register 34"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x44))&0x9000)==0x1000)
|
|
group.word 0x44++0x01
|
|
line.word 0x00 "PPC_PCFGR34,Pin Configuration Register 34"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x44++0x01
|
|
line.word 0x00 "PPC_PCFGR34,Pin Configuration Register 34"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x46))&0x9000)==0x9000)
|
|
group.word 0x46++0x01
|
|
line.word 0x00 "PPC_PCFGR35,Pin Configuration Register 35"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x46))&0x9000)==0x8000)
|
|
group.word 0x46++0x01
|
|
line.word 0x00 "PPC_PCFGR35,Pin Configuration Register 35"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x46))&0x9000)==0x1000)
|
|
group.word 0x46++0x01
|
|
line.word 0x00 "PPC_PCFGR35,Pin Configuration Register 35"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x46++0x01
|
|
line.word 0x00 "PPC_PCFGR35,Pin Configuration Register 35"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x48))&0x9000)==0x9000)
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "PPC_PCFGR36,Pin Configuration Register 36"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x48))&0x9000)==0x8000)
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "PPC_PCFGR36,Pin Configuration Register 36"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x48))&0x9000)==0x1000)
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "PPC_PCFGR36,Pin Configuration Register 36"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "PPC_PCFGR36,Pin Configuration Register 36"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x4A))&0x9000)==0x9000)
|
|
group.word 0x4A++0x01
|
|
line.word 0x00 "PPC_PCFGR37,Pin Configuration Register 37"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x4A))&0x9000)==0x8000)
|
|
group.word 0x4A++0x01
|
|
line.word 0x00 "PPC_PCFGR37,Pin Configuration Register 37"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x4A))&0x9000)==0x1000)
|
|
group.word 0x4A++0x01
|
|
line.word 0x00 "PPC_PCFGR37,Pin Configuration Register 37"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x4A++0x01
|
|
line.word 0x00 "PPC_PCFGR37,Pin Configuration Register 37"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x4C))&0x9000)==0x9000)
|
|
group.word 0x4C++0x01
|
|
line.word 0x00 "PPC_PCFGR38,Pin Configuration Register 38"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x4C))&0x9000)==0x8000)
|
|
group.word 0x4C++0x01
|
|
line.word 0x00 "PPC_PCFGR38,Pin Configuration Register 38"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x4C))&0x9000)==0x1000)
|
|
group.word 0x4C++0x01
|
|
line.word 0x00 "PPC_PCFGR38,Pin Configuration Register 38"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x4C++0x01
|
|
line.word 0x00 "PPC_PCFGR38,Pin Configuration Register 38"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x4E))&0x9000)==0x9000)
|
|
group.word 0x4E++0x01
|
|
line.word 0x00 "PPC_PCFGR39,Pin Configuration Register 39"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x4E))&0x9000)==0x8000)
|
|
group.word 0x4E++0x01
|
|
line.word 0x00 "PPC_PCFGR39,Pin Configuration Register 39"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x4E))&0x9000)==0x1000)
|
|
group.word 0x4E++0x01
|
|
line.word 0x00 "PPC_PCFGR39,Pin Configuration Register 39"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x4E++0x01
|
|
line.word 0x00 "PPC_PCFGR39,Pin Configuration Register 39"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x50))&0x9000)==0x9000)
|
|
group.word 0x50++0x01
|
|
line.word 0x00 "PPC_PCFGR40,Pin Configuration Register 40"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x50))&0x9000)==0x8000)
|
|
group.word 0x50++0x01
|
|
line.word 0x00 "PPC_PCFGR40,Pin Configuration Register 40"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x50))&0x9000)==0x1000)
|
|
group.word 0x50++0x01
|
|
line.word 0x00 "PPC_PCFGR40,Pin Configuration Register 40"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x50++0x01
|
|
line.word 0x00 "PPC_PCFGR40,Pin Configuration Register 40"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x52))&0x9000)==0x9000)
|
|
group.word 0x52++0x01
|
|
line.word 0x00 "PPC_PCFGR41,Pin Configuration Register 41"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x52))&0x9000)==0x8000)
|
|
group.word 0x52++0x01
|
|
line.word 0x00 "PPC_PCFGR41,Pin Configuration Register 41"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x52))&0x9000)==0x1000)
|
|
group.word 0x52++0x01
|
|
line.word 0x00 "PPC_PCFGR41,Pin Configuration Register 41"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x52++0x01
|
|
line.word 0x00 "PPC_PCFGR41,Pin Configuration Register 41"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x54))&0x9000)==0x9000)
|
|
group.word 0x54++0x01
|
|
line.word 0x00 "PPC_PCFGR42,Pin Configuration Register 42"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x54))&0x9000)==0x8000)
|
|
group.word 0x54++0x01
|
|
line.word 0x00 "PPC_PCFGR42,Pin Configuration Register 42"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x54))&0x9000)==0x1000)
|
|
group.word 0x54++0x01
|
|
line.word 0x00 "PPC_PCFGR42,Pin Configuration Register 42"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x54++0x01
|
|
line.word 0x00 "PPC_PCFGR42,Pin Configuration Register 42"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x56))&0x9000)==0x9000)
|
|
group.word 0x56++0x01
|
|
line.word 0x00 "PPC_PCFGR43,Pin Configuration Register 43"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x56))&0x9000)==0x8000)
|
|
group.word 0x56++0x01
|
|
line.word 0x00 "PPC_PCFGR43,Pin Configuration Register 43"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x56))&0x9000)==0x1000)
|
|
group.word 0x56++0x01
|
|
line.word 0x00 "PPC_PCFGR43,Pin Configuration Register 43"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x56++0x01
|
|
line.word 0x00 "PPC_PCFGR43,Pin Configuration Register 43"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x58))&0x9000)==0x9000)
|
|
group.word 0x58++0x01
|
|
line.word 0x00 "PPC_PCFGR44,Pin Configuration Register 44"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x58))&0x9000)==0x8000)
|
|
group.word 0x58++0x01
|
|
line.word 0x00 "PPC_PCFGR44,Pin Configuration Register 44"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x58))&0x9000)==0x1000)
|
|
group.word 0x58++0x01
|
|
line.word 0x00 "PPC_PCFGR44,Pin Configuration Register 44"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x58++0x01
|
|
line.word 0x00 "PPC_PCFGR44,Pin Configuration Register 44"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x5A))&0x9000)==0x9000)
|
|
group.word 0x5A++0x01
|
|
line.word 0x00 "PPC_PCFGR45,Pin Configuration Register 45"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x5A))&0x9000)==0x8000)
|
|
group.word 0x5A++0x01
|
|
line.word 0x00 "PPC_PCFGR45,Pin Configuration Register 45"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x5A))&0x9000)==0x1000)
|
|
group.word 0x5A++0x01
|
|
line.word 0x00 "PPC_PCFGR45,Pin Configuration Register 45"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x5A++0x01
|
|
line.word 0x00 "PPC_PCFGR45,Pin Configuration Register 45"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x5C))&0x9000)==0x9000)
|
|
group.word 0x5C++0x01
|
|
line.word 0x00 "PPC_PCFGR46,Pin Configuration Register 46"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x5C))&0x9000)==0x8000)
|
|
group.word 0x5C++0x01
|
|
line.word 0x00 "PPC_PCFGR46,Pin Configuration Register 46"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x5C))&0x9000)==0x1000)
|
|
group.word 0x5C++0x01
|
|
line.word 0x00 "PPC_PCFGR46,Pin Configuration Register 46"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x5C++0x01
|
|
line.word 0x00 "PPC_PCFGR46,Pin Configuration Register 46"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x5E))&0x9000)==0x9000)
|
|
group.word 0x5E++0x01
|
|
line.word 0x00 "PPC_PCFGR47,Pin Configuration Register 47"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x5E))&0x9000)==0x8000)
|
|
group.word 0x5E++0x01
|
|
line.word 0x00 "PPC_PCFGR47,Pin Configuration Register 47"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x5E))&0x9000)==0x1000)
|
|
group.word 0x5E++0x01
|
|
line.word 0x00 "PPC_PCFGR47,Pin Configuration Register 47"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x5E++0x01
|
|
line.word 0x00 "PPC_PCFGR47,Pin Configuration Register 47"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x60))&0x9000)==0x9000)
|
|
group.word 0x60++0x01
|
|
line.word 0x00 "PPC_PCFGR48,Pin Configuration Register 48"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x60))&0x9000)==0x8000)
|
|
group.word 0x60++0x01
|
|
line.word 0x00 "PPC_PCFGR48,Pin Configuration Register 48"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x60))&0x9000)==0x1000)
|
|
group.word 0x60++0x01
|
|
line.word 0x00 "PPC_PCFGR48,Pin Configuration Register 48"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x60++0x01
|
|
line.word 0x00 "PPC_PCFGR48,Pin Configuration Register 48"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x62))&0x9000)==0x9000)
|
|
group.word 0x62++0x01
|
|
line.word 0x00 "PPC_PCFGR49,Pin Configuration Register 49"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x62))&0x9000)==0x8000)
|
|
group.word 0x62++0x01
|
|
line.word 0x00 "PPC_PCFGR49,Pin Configuration Register 49"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x62))&0x9000)==0x1000)
|
|
group.word 0x62++0x01
|
|
line.word 0x00 "PPC_PCFGR49,Pin Configuration Register 49"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x62++0x01
|
|
line.word 0x00 "PPC_PCFGR49,Pin Configuration Register 49"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x64))&0x9000)==0x9000)
|
|
group.word 0x64++0x01
|
|
line.word 0x00 "PPC_PCFGR50,Pin Configuration Register 50"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x64))&0x9000)==0x8000)
|
|
group.word 0x64++0x01
|
|
line.word 0x00 "PPC_PCFGR50,Pin Configuration Register 50"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x64))&0x9000)==0x1000)
|
|
group.word 0x64++0x01
|
|
line.word 0x00 "PPC_PCFGR50,Pin Configuration Register 50"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x64++0x01
|
|
line.word 0x00 "PPC_PCFGR50,Pin Configuration Register 50"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x66))&0x9000)==0x9000)
|
|
group.word 0x66++0x01
|
|
line.word 0x00 "PPC_PCFGR51,Pin Configuration Register 51"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x66))&0x9000)==0x8000)
|
|
group.word 0x66++0x01
|
|
line.word 0x00 "PPC_PCFGR51,Pin Configuration Register 51"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x66))&0x9000)==0x1000)
|
|
group.word 0x66++0x01
|
|
line.word 0x00 "PPC_PCFGR51,Pin Configuration Register 51"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x66++0x01
|
|
line.word 0x00 "PPC_PCFGR51,Pin Configuration Register 51"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x68))&0x9000)==0x9000)
|
|
group.word 0x68++0x01
|
|
line.word 0x00 "PPC_PCFGR52,Pin Configuration Register 52"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x68))&0x9000)==0x8000)
|
|
group.word 0x68++0x01
|
|
line.word 0x00 "PPC_PCFGR52,Pin Configuration Register 52"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x68))&0x9000)==0x1000)
|
|
group.word 0x68++0x01
|
|
line.word 0x00 "PPC_PCFGR52,Pin Configuration Register 52"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x68++0x01
|
|
line.word 0x00 "PPC_PCFGR52,Pin Configuration Register 52"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x6A))&0x9000)==0x9000)
|
|
group.word 0x6A++0x01
|
|
line.word 0x00 "PPC_PCFGR53,Pin Configuration Register 53"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x6A))&0x9000)==0x8000)
|
|
group.word 0x6A++0x01
|
|
line.word 0x00 "PPC_PCFGR53,Pin Configuration Register 53"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x6A))&0x9000)==0x1000)
|
|
group.word 0x6A++0x01
|
|
line.word 0x00 "PPC_PCFGR53,Pin Configuration Register 53"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x6A++0x01
|
|
line.word 0x00 "PPC_PCFGR53,Pin Configuration Register 53"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x6C))&0x9000)==0x9000)
|
|
group.word 0x6C++0x01
|
|
line.word 0x00 "PPC_PCFGR54,Pin Configuration Register 54"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x6C))&0x9000)==0x8000)
|
|
group.word 0x6C++0x01
|
|
line.word 0x00 "PPC_PCFGR54,Pin Configuration Register 54"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x6C))&0x9000)==0x1000)
|
|
group.word 0x6C++0x01
|
|
line.word 0x00 "PPC_PCFGR54,Pin Configuration Register 54"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x6C++0x01
|
|
line.word 0x00 "PPC_PCFGR54,Pin Configuration Register 54"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x6E))&0x9000)==0x9000)
|
|
group.word 0x6E++0x01
|
|
line.word 0x00 "PPC_PCFGR55,Pin Configuration Register 55"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x6E))&0x9000)==0x8000)
|
|
group.word 0x6E++0x01
|
|
line.word 0x00 "PPC_PCFGR55,Pin Configuration Register 55"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x6E))&0x9000)==0x1000)
|
|
group.word 0x6E++0x01
|
|
line.word 0x00 "PPC_PCFGR55,Pin Configuration Register 55"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x6E++0x01
|
|
line.word 0x00 "PPC_PCFGR55,Pin Configuration Register 55"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x70))&0x9000)==0x9000)
|
|
group.word 0x70++0x01
|
|
line.word 0x00 "PPC_PCFGR56,Pin Configuration Register 56"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x70))&0x9000)==0x8000)
|
|
group.word 0x70++0x01
|
|
line.word 0x00 "PPC_PCFGR56,Pin Configuration Register 56"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x70))&0x9000)==0x1000)
|
|
group.word 0x70++0x01
|
|
line.word 0x00 "PPC_PCFGR56,Pin Configuration Register 56"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x70++0x01
|
|
line.word 0x00 "PPC_PCFGR56,Pin Configuration Register 56"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x72))&0x9000)==0x9000)
|
|
group.word 0x72++0x01
|
|
line.word 0x00 "PPC_PCFGR57,Pin Configuration Register 57"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x72))&0x9000)==0x8000)
|
|
group.word 0x72++0x01
|
|
line.word 0x00 "PPC_PCFGR57,Pin Configuration Register 57"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x72))&0x9000)==0x1000)
|
|
group.word 0x72++0x01
|
|
line.word 0x00 "PPC_PCFGR57,Pin Configuration Register 57"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x72++0x01
|
|
line.word 0x00 "PPC_PCFGR57,Pin Configuration Register 57"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x74))&0x9000)==0x9000)
|
|
group.word 0x74++0x01
|
|
line.word 0x00 "PPC_PCFGR58,Pin Configuration Register 58"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x74))&0x9000)==0x8000)
|
|
group.word 0x74++0x01
|
|
line.word 0x00 "PPC_PCFGR58,Pin Configuration Register 58"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x74))&0x9000)==0x1000)
|
|
group.word 0x74++0x01
|
|
line.word 0x00 "PPC_PCFGR58,Pin Configuration Register 58"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x74++0x01
|
|
line.word 0x00 "PPC_PCFGR58,Pin Configuration Register 58"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x76))&0x9000)==0x9000)
|
|
group.word 0x76++0x01
|
|
line.word 0x00 "PPC_PCFGR59,Pin Configuration Register 59"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x76))&0x9000)==0x8000)
|
|
group.word 0x76++0x01
|
|
line.word 0x00 "PPC_PCFGR59,Pin Configuration Register 59"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x76))&0x9000)==0x1000)
|
|
group.word 0x76++0x01
|
|
line.word 0x00 "PPC_PCFGR59,Pin Configuration Register 59"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x76++0x01
|
|
line.word 0x00 "PPC_PCFGR59,Pin Configuration Register 59"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x78))&0x9000)==0x9000)
|
|
group.word 0x78++0x01
|
|
line.word 0x00 "PPC_PCFGR60,Pin Configuration Register 60"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x78))&0x9000)==0x8000)
|
|
group.word 0x78++0x01
|
|
line.word 0x00 "PPC_PCFGR60,Pin Configuration Register 60"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x78))&0x9000)==0x1000)
|
|
group.word 0x78++0x01
|
|
line.word 0x00 "PPC_PCFGR60,Pin Configuration Register 60"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x78++0x01
|
|
line.word 0x00 "PPC_PCFGR60,Pin Configuration Register 60"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x7A))&0x9000)==0x9000)
|
|
group.word 0x7A++0x01
|
|
line.word 0x00 "PPC_PCFGR61,Pin Configuration Register 61"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x7A))&0x9000)==0x8000)
|
|
group.word 0x7A++0x01
|
|
line.word 0x00 "PPC_PCFGR61,Pin Configuration Register 61"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x7A))&0x9000)==0x1000)
|
|
group.word 0x7A++0x01
|
|
line.word 0x00 "PPC_PCFGR61,Pin Configuration Register 61"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x7A++0x01
|
|
line.word 0x00 "PPC_PCFGR61,Pin Configuration Register 61"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x7C))&0x9000)==0x9000)
|
|
group.word 0x7C++0x01
|
|
line.word 0x00 "PPC_PCFGR62,Pin Configuration Register 62"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x7C))&0x9000)==0x8000)
|
|
group.word 0x7C++0x01
|
|
line.word 0x00 "PPC_PCFGR62,Pin Configuration Register 62"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x7C))&0x9000)==0x1000)
|
|
group.word 0x7C++0x01
|
|
line.word 0x00 "PPC_PCFGR62,Pin Configuration Register 62"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x7C++0x01
|
|
line.word 0x00 "PPC_PCFGR62,Pin Configuration Register 62"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x7E))&0x9000)==0x9000)
|
|
group.word 0x7E++0x01
|
|
line.word 0x00 "PPC_PCFGR63,Pin Configuration Register 63"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x7E))&0x9000)==0x8000)
|
|
group.word 0x7E++0x01
|
|
line.word 0x00 "PPC_PCFGR63,Pin Configuration Register 63"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x7E))&0x9000)==0x1000)
|
|
group.word 0x7E++0x01
|
|
line.word 0x00 "PPC_PCFGR63,Pin Configuration Register 63"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x7E++0x01
|
|
line.word 0x00 "PPC_PCFGR63,Pin Configuration Register 63"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x80))&0x9000)==0x9000)
|
|
group.word 0x80++0x01
|
|
line.word 0x00 "PPC_PCFGR64,Pin Configuration Register 64"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x80))&0x9000)==0x8000)
|
|
group.word 0x80++0x01
|
|
line.word 0x00 "PPC_PCFGR64,Pin Configuration Register 64"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x80))&0x9000)==0x1000)
|
|
group.word 0x80++0x01
|
|
line.word 0x00 "PPC_PCFGR64,Pin Configuration Register 64"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x80++0x01
|
|
line.word 0x00 "PPC_PCFGR64,Pin Configuration Register 64"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x82))&0x9000)==0x9000)
|
|
group.word 0x82++0x01
|
|
line.word 0x00 "PPC_PCFGR65,Pin Configuration Register 65"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x82))&0x9000)==0x8000)
|
|
group.word 0x82++0x01
|
|
line.word 0x00 "PPC_PCFGR65,Pin Configuration Register 65"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x82))&0x9000)==0x1000)
|
|
group.word 0x82++0x01
|
|
line.word 0x00 "PPC_PCFGR65,Pin Configuration Register 65"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x82++0x01
|
|
line.word 0x00 "PPC_PCFGR65,Pin Configuration Register 65"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x84))&0x9000)==0x9000)
|
|
group.word 0x84++0x01
|
|
line.word 0x00 "PPC_PCFGR66,Pin Configuration Register 66"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x84))&0x9000)==0x8000)
|
|
group.word 0x84++0x01
|
|
line.word 0x00 "PPC_PCFGR66,Pin Configuration Register 66"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x84))&0x9000)==0x1000)
|
|
group.word 0x84++0x01
|
|
line.word 0x00 "PPC_PCFGR66,Pin Configuration Register 66"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x84++0x01
|
|
line.word 0x00 "PPC_PCFGR66,Pin Configuration Register 66"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x86))&0x9000)==0x9000)
|
|
group.word 0x86++0x01
|
|
line.word 0x00 "PPC_PCFGR67,Pin Configuration Register 67"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x86))&0x9000)==0x8000)
|
|
group.word 0x86++0x01
|
|
line.word 0x00 "PPC_PCFGR67,Pin Configuration Register 67"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x86))&0x9000)==0x1000)
|
|
group.word 0x86++0x01
|
|
line.word 0x00 "PPC_PCFGR67,Pin Configuration Register 67"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x86++0x01
|
|
line.word 0x00 "PPC_PCFGR67,Pin Configuration Register 67"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x88))&0x9000)==0x9000)
|
|
group.word 0x88++0x01
|
|
line.word 0x00 "PPC_PCFGR68,Pin Configuration Register 68"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x88))&0x9000)==0x8000)
|
|
group.word 0x88++0x01
|
|
line.word 0x00 "PPC_PCFGR68,Pin Configuration Register 68"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x88))&0x9000)==0x1000)
|
|
group.word 0x88++0x01
|
|
line.word 0x00 "PPC_PCFGR68,Pin Configuration Register 68"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x88++0x01
|
|
line.word 0x00 "PPC_PCFGR68,Pin Configuration Register 68"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x8A))&0x9000)==0x9000)
|
|
group.word 0x8A++0x01
|
|
line.word 0x00 "PPC_PCFGR69,Pin Configuration Register 69"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x8A))&0x9000)==0x8000)
|
|
group.word 0x8A++0x01
|
|
line.word 0x00 "PPC_PCFGR69,Pin Configuration Register 69"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x8A))&0x9000)==0x1000)
|
|
group.word 0x8A++0x01
|
|
line.word 0x00 "PPC_PCFGR69,Pin Configuration Register 69"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x8A++0x01
|
|
line.word 0x00 "PPC_PCFGR69,Pin Configuration Register 69"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x8C))&0x9000)==0x9000)
|
|
group.word 0x8C++0x01
|
|
line.word 0x00 "PPC_PCFGR70,Pin Configuration Register 70"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x8C))&0x9000)==0x8000)
|
|
group.word 0x8C++0x01
|
|
line.word 0x00 "PPC_PCFGR70,Pin Configuration Register 70"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x8C))&0x9000)==0x1000)
|
|
group.word 0x8C++0x01
|
|
line.word 0x00 "PPC_PCFGR70,Pin Configuration Register 70"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x8C++0x01
|
|
line.word 0x00 "PPC_PCFGR70,Pin Configuration Register 70"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x8E))&0x9000)==0x9000)
|
|
group.word 0x8E++0x01
|
|
line.word 0x00 "PPC_PCFGR71,Pin Configuration Register 71"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x8E))&0x9000)==0x8000)
|
|
group.word 0x8E++0x01
|
|
line.word 0x00 "PPC_PCFGR71,Pin Configuration Register 71"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x8E))&0x9000)==0x1000)
|
|
group.word 0x8E++0x01
|
|
line.word 0x00 "PPC_PCFGR71,Pin Configuration Register 71"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x8E++0x01
|
|
line.word 0x00 "PPC_PCFGR71,Pin Configuration Register 71"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x90))&0x9000)==0x9000)
|
|
group.word 0x90++0x01
|
|
line.word 0x00 "PPC_PCFGR72,Pin Configuration Register 72"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x90))&0x9000)==0x8000)
|
|
group.word 0x90++0x01
|
|
line.word 0x00 "PPC_PCFGR72,Pin Configuration Register 72"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x90))&0x9000)==0x1000)
|
|
group.word 0x90++0x01
|
|
line.word 0x00 "PPC_PCFGR72,Pin Configuration Register 72"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x90++0x01
|
|
line.word 0x00 "PPC_PCFGR72,Pin Configuration Register 72"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x92))&0x9000)==0x9000)
|
|
group.word 0x92++0x01
|
|
line.word 0x00 "PPC_PCFGR73,Pin Configuration Register 73"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x92))&0x9000)==0x8000)
|
|
group.word 0x92++0x01
|
|
line.word 0x00 "PPC_PCFGR73,Pin Configuration Register 73"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x92))&0x9000)==0x1000)
|
|
group.word 0x92++0x01
|
|
line.word 0x00 "PPC_PCFGR73,Pin Configuration Register 73"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x92++0x01
|
|
line.word 0x00 "PPC_PCFGR73,Pin Configuration Register 73"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x94))&0x9000)==0x9000)
|
|
group.word 0x94++0x01
|
|
line.word 0x00 "PPC_PCFGR74,Pin Configuration Register 74"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x94))&0x9000)==0x8000)
|
|
group.word 0x94++0x01
|
|
line.word 0x00 "PPC_PCFGR74,Pin Configuration Register 74"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x94))&0x9000)==0x1000)
|
|
group.word 0x94++0x01
|
|
line.word 0x00 "PPC_PCFGR74,Pin Configuration Register 74"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x94++0x01
|
|
line.word 0x00 "PPC_PCFGR74,Pin Configuration Register 74"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x96))&0x9000)==0x9000)
|
|
group.word 0x96++0x01
|
|
line.word 0x00 "PPC_PCFGR75,Pin Configuration Register 75"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x96))&0x9000)==0x8000)
|
|
group.word 0x96++0x01
|
|
line.word 0x00 "PPC_PCFGR75,Pin Configuration Register 75"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x96))&0x9000)==0x1000)
|
|
group.word 0x96++0x01
|
|
line.word 0x00 "PPC_PCFGR75,Pin Configuration Register 75"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x96++0x01
|
|
line.word 0x00 "PPC_PCFGR75,Pin Configuration Register 75"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x98))&0x9000)==0x9000)
|
|
group.word 0x98++0x01
|
|
line.word 0x00 "PPC_PCFGR76,Pin Configuration Register 76"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x98))&0x9000)==0x8000)
|
|
group.word 0x98++0x01
|
|
line.word 0x00 "PPC_PCFGR76,Pin Configuration Register 76"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x98))&0x9000)==0x1000)
|
|
group.word 0x98++0x01
|
|
line.word 0x00 "PPC_PCFGR76,Pin Configuration Register 76"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x98++0x01
|
|
line.word 0x00 "PPC_PCFGR76,Pin Configuration Register 76"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x9A))&0x9000)==0x9000)
|
|
group.word 0x9A++0x01
|
|
line.word 0x00 "PPC_PCFGR77,Pin Configuration Register 77"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x9A))&0x9000)==0x8000)
|
|
group.word 0x9A++0x01
|
|
line.word 0x00 "PPC_PCFGR77,Pin Configuration Register 77"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x9A))&0x9000)==0x1000)
|
|
group.word 0x9A++0x01
|
|
line.word 0x00 "PPC_PCFGR77,Pin Configuration Register 77"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x9A++0x01
|
|
line.word 0x00 "PPC_PCFGR77,Pin Configuration Register 77"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x9C))&0x9000)==0x9000)
|
|
group.word 0x9C++0x01
|
|
line.word 0x00 "PPC_PCFGR78,Pin Configuration Register 78"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x9C))&0x9000)==0x8000)
|
|
group.word 0x9C++0x01
|
|
line.word 0x00 "PPC_PCFGR78,Pin Configuration Register 78"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x9C))&0x9000)==0x1000)
|
|
group.word 0x9C++0x01
|
|
line.word 0x00 "PPC_PCFGR78,Pin Configuration Register 78"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x9C++0x01
|
|
line.word 0x00 "PPC_PCFGR78,Pin Configuration Register 78"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x9E))&0x9000)==0x9000)
|
|
group.word 0x9E++0x01
|
|
line.word 0x00 "PPC_PCFGR79,Pin Configuration Register 79"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x9E))&0x9000)==0x8000)
|
|
group.word 0x9E++0x01
|
|
line.word 0x00 "PPC_PCFGR79,Pin Configuration Register 79"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x9E))&0x9000)==0x1000)
|
|
group.word 0x9E++0x01
|
|
line.word 0x00 "PPC_PCFGR79,Pin Configuration Register 79"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x9E++0x01
|
|
line.word 0x00 "PPC_PCFGR79,Pin Configuration Register 79"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xA0))&0x9000)==0x9000)
|
|
group.word 0xA0++0x01
|
|
line.word 0x00 "PPC_PCFGR80,Pin Configuration Register 80"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xA0))&0x9000)==0x8000)
|
|
group.word 0xA0++0x01
|
|
line.word 0x00 "PPC_PCFGR80,Pin Configuration Register 80"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xA0))&0x9000)==0x1000)
|
|
group.word 0xA0++0x01
|
|
line.word 0x00 "PPC_PCFGR80,Pin Configuration Register 80"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xA0++0x01
|
|
line.word 0x00 "PPC_PCFGR80,Pin Configuration Register 80"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xA2))&0x9000)==0x9000)
|
|
group.word 0xA2++0x01
|
|
line.word 0x00 "PPC_PCFGR81,Pin Configuration Register 81"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xA2))&0x9000)==0x8000)
|
|
group.word 0xA2++0x01
|
|
line.word 0x00 "PPC_PCFGR81,Pin Configuration Register 81"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xA2))&0x9000)==0x1000)
|
|
group.word 0xA2++0x01
|
|
line.word 0x00 "PPC_PCFGR81,Pin Configuration Register 81"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xA2++0x01
|
|
line.word 0x00 "PPC_PCFGR81,Pin Configuration Register 81"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xA4))&0x9000)==0x9000)
|
|
group.word 0xA4++0x01
|
|
line.word 0x00 "PPC_PCFGR82,Pin Configuration Register 82"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xA4))&0x9000)==0x8000)
|
|
group.word 0xA4++0x01
|
|
line.word 0x00 "PPC_PCFGR82,Pin Configuration Register 82"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xA4))&0x9000)==0x1000)
|
|
group.word 0xA4++0x01
|
|
line.word 0x00 "PPC_PCFGR82,Pin Configuration Register 82"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xA4++0x01
|
|
line.word 0x00 "PPC_PCFGR82,Pin Configuration Register 82"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xA6))&0x9000)==0x9000)
|
|
group.word 0xA6++0x01
|
|
line.word 0x00 "PPC_PCFGR83,Pin Configuration Register 83"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xA6))&0x9000)==0x8000)
|
|
group.word 0xA6++0x01
|
|
line.word 0x00 "PPC_PCFGR83,Pin Configuration Register 83"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xA6))&0x9000)==0x1000)
|
|
group.word 0xA6++0x01
|
|
line.word 0x00 "PPC_PCFGR83,Pin Configuration Register 83"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xA6++0x01
|
|
line.word 0x00 "PPC_PCFGR83,Pin Configuration Register 83"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xA8))&0x9000)==0x9000)
|
|
group.word 0xA8++0x01
|
|
line.word 0x00 "PPC_PCFGR84,Pin Configuration Register 84"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xA8))&0x9000)==0x8000)
|
|
group.word 0xA8++0x01
|
|
line.word 0x00 "PPC_PCFGR84,Pin Configuration Register 84"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xA8))&0x9000)==0x1000)
|
|
group.word 0xA8++0x01
|
|
line.word 0x00 "PPC_PCFGR84,Pin Configuration Register 84"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xA8++0x01
|
|
line.word 0x00 "PPC_PCFGR84,Pin Configuration Register 84"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xAA))&0x9000)==0x9000)
|
|
group.word 0xAA++0x01
|
|
line.word 0x00 "PPC_PCFGR85,Pin Configuration Register 85"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xAA))&0x9000)==0x8000)
|
|
group.word 0xAA++0x01
|
|
line.word 0x00 "PPC_PCFGR85,Pin Configuration Register 85"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xAA))&0x9000)==0x1000)
|
|
group.word 0xAA++0x01
|
|
line.word 0x00 "PPC_PCFGR85,Pin Configuration Register 85"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xAA++0x01
|
|
line.word 0x00 "PPC_PCFGR85,Pin Configuration Register 85"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xAC))&0x9000)==0x9000)
|
|
group.word 0xAC++0x01
|
|
line.word 0x00 "PPC_PCFGR86,Pin Configuration Register 86"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xAC))&0x9000)==0x8000)
|
|
group.word 0xAC++0x01
|
|
line.word 0x00 "PPC_PCFGR86,Pin Configuration Register 86"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xAC))&0x9000)==0x1000)
|
|
group.word 0xAC++0x01
|
|
line.word 0x00 "PPC_PCFGR86,Pin Configuration Register 86"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xAC++0x01
|
|
line.word 0x00 "PPC_PCFGR86,Pin Configuration Register 86"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xAE))&0x9000)==0x9000)
|
|
group.word 0xAE++0x01
|
|
line.word 0x00 "PPC_PCFGR87,Pin Configuration Register 87"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xAE))&0x9000)==0x8000)
|
|
group.word 0xAE++0x01
|
|
line.word 0x00 "PPC_PCFGR87,Pin Configuration Register 87"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xAE))&0x9000)==0x1000)
|
|
group.word 0xAE++0x01
|
|
line.word 0x00 "PPC_PCFGR87,Pin Configuration Register 87"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xAE++0x01
|
|
line.word 0x00 "PPC_PCFGR87,Pin Configuration Register 87"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xB0))&0x9000)==0x9000)
|
|
group.word 0xB0++0x01
|
|
line.word 0x00 "PPC_PCFGR88,Pin Configuration Register 88"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xB0))&0x9000)==0x8000)
|
|
group.word 0xB0++0x01
|
|
line.word 0x00 "PPC_PCFGR88,Pin Configuration Register 88"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xB0))&0x9000)==0x1000)
|
|
group.word 0xB0++0x01
|
|
line.word 0x00 "PPC_PCFGR88,Pin Configuration Register 88"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xB0++0x01
|
|
line.word 0x00 "PPC_PCFGR88,Pin Configuration Register 88"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xB2))&0x9000)==0x9000)
|
|
group.word 0xB2++0x01
|
|
line.word 0x00 "PPC_PCFGR89,Pin Configuration Register 89"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xB2))&0x9000)==0x8000)
|
|
group.word 0xB2++0x01
|
|
line.word 0x00 "PPC_PCFGR89,Pin Configuration Register 89"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xB2))&0x9000)==0x1000)
|
|
group.word 0xB2++0x01
|
|
line.word 0x00 "PPC_PCFGR89,Pin Configuration Register 89"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xB2++0x01
|
|
line.word 0x00 "PPC_PCFGR89,Pin Configuration Register 89"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xB4))&0x9000)==0x9000)
|
|
group.word 0xB4++0x01
|
|
line.word 0x00 "PPC_PCFGR90,Pin Configuration Register 90"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xB4))&0x9000)==0x8000)
|
|
group.word 0xB4++0x01
|
|
line.word 0x00 "PPC_PCFGR90,Pin Configuration Register 90"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xB4))&0x9000)==0x1000)
|
|
group.word 0xB4++0x01
|
|
line.word 0x00 "PPC_PCFGR90,Pin Configuration Register 90"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xB4++0x01
|
|
line.word 0x00 "PPC_PCFGR90,Pin Configuration Register 90"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xB6))&0x9000)==0x9000)
|
|
group.word 0xB6++0x01
|
|
line.word 0x00 "PPC_PCFGR91,Pin Configuration Register 91"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xB6))&0x9000)==0x8000)
|
|
group.word 0xB6++0x01
|
|
line.word 0x00 "PPC_PCFGR91,Pin Configuration Register 91"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xB6))&0x9000)==0x1000)
|
|
group.word 0xB6++0x01
|
|
line.word 0x00 "PPC_PCFGR91,Pin Configuration Register 91"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xB6++0x01
|
|
line.word 0x00 "PPC_PCFGR91,Pin Configuration Register 91"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xB8))&0x9000)==0x9000)
|
|
group.word 0xB8++0x01
|
|
line.word 0x00 "PPC_PCFGR92,Pin Configuration Register 92"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xB8))&0x9000)==0x8000)
|
|
group.word 0xB8++0x01
|
|
line.word 0x00 "PPC_PCFGR92,Pin Configuration Register 92"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xB8))&0x9000)==0x1000)
|
|
group.word 0xB8++0x01
|
|
line.word 0x00 "PPC_PCFGR92,Pin Configuration Register 92"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xB8++0x01
|
|
line.word 0x00 "PPC_PCFGR92,Pin Configuration Register 92"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xBA))&0x9000)==0x9000)
|
|
group.word 0xBA++0x01
|
|
line.word 0x00 "PPC_PCFGR93,Pin Configuration Register 93"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xBA))&0x9000)==0x8000)
|
|
group.word 0xBA++0x01
|
|
line.word 0x00 "PPC_PCFGR93,Pin Configuration Register 93"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xBA))&0x9000)==0x1000)
|
|
group.word 0xBA++0x01
|
|
line.word 0x00 "PPC_PCFGR93,Pin Configuration Register 93"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xBA++0x01
|
|
line.word 0x00 "PPC_PCFGR93,Pin Configuration Register 93"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xBC))&0x9000)==0x9000)
|
|
group.word 0xBC++0x01
|
|
line.word 0x00 "PPC_PCFGR94,Pin Configuration Register 94"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xBC))&0x9000)==0x8000)
|
|
group.word 0xBC++0x01
|
|
line.word 0x00 "PPC_PCFGR94,Pin Configuration Register 94"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xBC))&0x9000)==0x1000)
|
|
group.word 0xBC++0x01
|
|
line.word 0x00 "PPC_PCFGR94,Pin Configuration Register 94"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xBC++0x01
|
|
line.word 0x00 "PPC_PCFGR94,Pin Configuration Register 94"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xBE))&0x9000)==0x9000)
|
|
group.word 0xBE++0x01
|
|
line.word 0x00 "PPC_PCFGR95,Pin Configuration Register 95"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xBE))&0x9000)==0x8000)
|
|
group.word 0xBE++0x01
|
|
line.word 0x00 "PPC_PCFGR95,Pin Configuration Register 95"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xBE))&0x9000)==0x1000)
|
|
group.word 0xBE++0x01
|
|
line.word 0x00 "PPC_PCFGR95,Pin Configuration Register 95"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xBE++0x01
|
|
line.word 0x00 "PPC_PCFGR95,Pin Configuration Register 95"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xC0))&0x9000)==0x9000)
|
|
group.word 0xC0++0x01
|
|
line.word 0x00 "PPC_PCFGR96,Pin Configuration Register 96"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xC0))&0x9000)==0x8000)
|
|
group.word 0xC0++0x01
|
|
line.word 0x00 "PPC_PCFGR96,Pin Configuration Register 96"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xC0))&0x9000)==0x1000)
|
|
group.word 0xC0++0x01
|
|
line.word 0x00 "PPC_PCFGR96,Pin Configuration Register 96"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xC0++0x01
|
|
line.word 0x00 "PPC_PCFGR96,Pin Configuration Register 96"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xC2))&0x9000)==0x9000)
|
|
group.word 0xC2++0x01
|
|
line.word 0x00 "PPC_PCFGR97,Pin Configuration Register 97"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xC2))&0x9000)==0x8000)
|
|
group.word 0xC2++0x01
|
|
line.word 0x00 "PPC_PCFGR97,Pin Configuration Register 97"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xC2))&0x9000)==0x1000)
|
|
group.word 0xC2++0x01
|
|
line.word 0x00 "PPC_PCFGR97,Pin Configuration Register 97"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xC2++0x01
|
|
line.word 0x00 "PPC_PCFGR97,Pin Configuration Register 97"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xC4))&0x9000)==0x9000)
|
|
group.word 0xC4++0x01
|
|
line.word 0x00 "PPC_PCFGR98,Pin Configuration Register 98"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xC4))&0x9000)==0x8000)
|
|
group.word 0xC4++0x01
|
|
line.word 0x00 "PPC_PCFGR98,Pin Configuration Register 98"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xC4))&0x9000)==0x1000)
|
|
group.word 0xC4++0x01
|
|
line.word 0x00 "PPC_PCFGR98,Pin Configuration Register 98"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xC4++0x01
|
|
line.word 0x00 "PPC_PCFGR98,Pin Configuration Register 98"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xC6))&0x9000)==0x9000)
|
|
group.word 0xC6++0x01
|
|
line.word 0x00 "PPC_PCFGR99,Pin Configuration Register 99"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xC6))&0x9000)==0x8000)
|
|
group.word 0xC6++0x01
|
|
line.word 0x00 "PPC_PCFGR99,Pin Configuration Register 99"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xC6))&0x9000)==0x1000)
|
|
group.word 0xC6++0x01
|
|
line.word 0x00 "PPC_PCFGR99,Pin Configuration Register 99"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xC6++0x01
|
|
line.word 0x00 "PPC_PCFGR99,Pin Configuration Register 99"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xC8))&0x9000)==0x9000)
|
|
group.word 0xC8++0x01
|
|
line.word 0x00 "PPC_PCFGR100,Pin Configuration Register 100"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xC8))&0x9000)==0x8000)
|
|
group.word 0xC8++0x01
|
|
line.word 0x00 "PPC_PCFGR100,Pin Configuration Register 100"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xC8))&0x9000)==0x1000)
|
|
group.word 0xC8++0x01
|
|
line.word 0x00 "PPC_PCFGR100,Pin Configuration Register 100"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xC8++0x01
|
|
line.word 0x00 "PPC_PCFGR100,Pin Configuration Register 100"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xCA))&0x9000)==0x9000)
|
|
group.word 0xCA++0x01
|
|
line.word 0x00 "PPC_PCFGR101,Pin Configuration Register 101"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xCA))&0x9000)==0x8000)
|
|
group.word 0xCA++0x01
|
|
line.word 0x00 "PPC_PCFGR101,Pin Configuration Register 101"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xCA))&0x9000)==0x1000)
|
|
group.word 0xCA++0x01
|
|
line.word 0x00 "PPC_PCFGR101,Pin Configuration Register 101"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xCA++0x01
|
|
line.word 0x00 "PPC_PCFGR101,Pin Configuration Register 101"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xCC))&0x9000)==0x9000)
|
|
group.word 0xCC++0x01
|
|
line.word 0x00 "PPC_PCFGR102,Pin Configuration Register 102"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xCC))&0x9000)==0x8000)
|
|
group.word 0xCC++0x01
|
|
line.word 0x00 "PPC_PCFGR102,Pin Configuration Register 102"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xCC))&0x9000)==0x1000)
|
|
group.word 0xCC++0x01
|
|
line.word 0x00 "PPC_PCFGR102,Pin Configuration Register 102"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xCC++0x01
|
|
line.word 0x00 "PPC_PCFGR102,Pin Configuration Register 102"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xCE))&0x9000)==0x9000)
|
|
group.word 0xCE++0x01
|
|
line.word 0x00 "PPC_PCFGR103,Pin Configuration Register 103"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xCE))&0x9000)==0x8000)
|
|
group.word 0xCE++0x01
|
|
line.word 0x00 "PPC_PCFGR103,Pin Configuration Register 103"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xCE))&0x9000)==0x1000)
|
|
group.word 0xCE++0x01
|
|
line.word 0x00 "PPC_PCFGR103,Pin Configuration Register 103"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xCE++0x01
|
|
line.word 0x00 "PPC_PCFGR103,Pin Configuration Register 103"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xD0))&0x9000)==0x9000)
|
|
group.word 0xD0++0x01
|
|
line.word 0x00 "PPC_PCFGR104,Pin Configuration Register 104"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xD0))&0x9000)==0x8000)
|
|
group.word 0xD0++0x01
|
|
line.word 0x00 "PPC_PCFGR104,Pin Configuration Register 104"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xD0))&0x9000)==0x1000)
|
|
group.word 0xD0++0x01
|
|
line.word 0x00 "PPC_PCFGR104,Pin Configuration Register 104"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xD0++0x01
|
|
line.word 0x00 "PPC_PCFGR104,Pin Configuration Register 104"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xD2))&0x9000)==0x9000)
|
|
group.word 0xD2++0x01
|
|
line.word 0x00 "PPC_PCFGR105,Pin Configuration Register 105"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xD2))&0x9000)==0x8000)
|
|
group.word 0xD2++0x01
|
|
line.word 0x00 "PPC_PCFGR105,Pin Configuration Register 105"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xD2))&0x9000)==0x1000)
|
|
group.word 0xD2++0x01
|
|
line.word 0x00 "PPC_PCFGR105,Pin Configuration Register 105"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xD2++0x01
|
|
line.word 0x00 "PPC_PCFGR105,Pin Configuration Register 105"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xD4))&0x9000)==0x9000)
|
|
group.word 0xD4++0x01
|
|
line.word 0x00 "PPC_PCFGR106,Pin Configuration Register 106"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xD4))&0x9000)==0x8000)
|
|
group.word 0xD4++0x01
|
|
line.word 0x00 "PPC_PCFGR106,Pin Configuration Register 106"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xD4))&0x9000)==0x1000)
|
|
group.word 0xD4++0x01
|
|
line.word 0x00 "PPC_PCFGR106,Pin Configuration Register 106"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xD4++0x01
|
|
line.word 0x00 "PPC_PCFGR106,Pin Configuration Register 106"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xD6))&0x9000)==0x9000)
|
|
group.word 0xD6++0x01
|
|
line.word 0x00 "PPC_PCFGR107,Pin Configuration Register 107"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xD6))&0x9000)==0x8000)
|
|
group.word 0xD6++0x01
|
|
line.word 0x00 "PPC_PCFGR107,Pin Configuration Register 107"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xD6))&0x9000)==0x1000)
|
|
group.word 0xD6++0x01
|
|
line.word 0x00 "PPC_PCFGR107,Pin Configuration Register 107"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xD6++0x01
|
|
line.word 0x00 "PPC_PCFGR107,Pin Configuration Register 107"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xD8))&0x9000)==0x9000)
|
|
group.word 0xD8++0x01
|
|
line.word 0x00 "PPC_PCFGR108,Pin Configuration Register 108"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xD8))&0x9000)==0x8000)
|
|
group.word 0xD8++0x01
|
|
line.word 0x00 "PPC_PCFGR108,Pin Configuration Register 108"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xD8))&0x9000)==0x1000)
|
|
group.word 0xD8++0x01
|
|
line.word 0x00 "PPC_PCFGR108,Pin Configuration Register 108"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xD8++0x01
|
|
line.word 0x00 "PPC_PCFGR108,Pin Configuration Register 108"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xDA))&0x9000)==0x9000)
|
|
group.word 0xDA++0x01
|
|
line.word 0x00 "PPC_PCFGR109,Pin Configuration Register 109"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xDA))&0x9000)==0x8000)
|
|
group.word 0xDA++0x01
|
|
line.word 0x00 "PPC_PCFGR109,Pin Configuration Register 109"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xDA))&0x9000)==0x1000)
|
|
group.word 0xDA++0x01
|
|
line.word 0x00 "PPC_PCFGR109,Pin Configuration Register 109"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xDA++0x01
|
|
line.word 0x00 "PPC_PCFGR109,Pin Configuration Register 109"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xDC))&0x9000)==0x9000)
|
|
group.word 0xDC++0x01
|
|
line.word 0x00 "PPC_PCFGR110,Pin Configuration Register 110"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xDC))&0x9000)==0x8000)
|
|
group.word 0xDC++0x01
|
|
line.word 0x00 "PPC_PCFGR110,Pin Configuration Register 110"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xDC))&0x9000)==0x1000)
|
|
group.word 0xDC++0x01
|
|
line.word 0x00 "PPC_PCFGR110,Pin Configuration Register 110"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xDC++0x01
|
|
line.word 0x00 "PPC_PCFGR110,Pin Configuration Register 110"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xDE))&0x9000)==0x9000)
|
|
group.word 0xDE++0x01
|
|
line.word 0x00 "PPC_PCFGR111,Pin Configuration Register 111"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xDE))&0x9000)==0x8000)
|
|
group.word 0xDE++0x01
|
|
line.word 0x00 "PPC_PCFGR111,Pin Configuration Register 111"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xDE))&0x9000)==0x1000)
|
|
group.word 0xDE++0x01
|
|
line.word 0x00 "PPC_PCFGR111,Pin Configuration Register 111"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xDE++0x01
|
|
line.word 0x00 "PPC_PCFGR111,Pin Configuration Register 111"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xE0))&0x9000)==0x9000)
|
|
group.word 0xE0++0x01
|
|
line.word 0x00 "PPC_PCFGR112,Pin Configuration Register 112"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xE0))&0x9000)==0x8000)
|
|
group.word 0xE0++0x01
|
|
line.word 0x00 "PPC_PCFGR112,Pin Configuration Register 112"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xE0))&0x9000)==0x1000)
|
|
group.word 0xE0++0x01
|
|
line.word 0x00 "PPC_PCFGR112,Pin Configuration Register 112"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xE0++0x01
|
|
line.word 0x00 "PPC_PCFGR112,Pin Configuration Register 112"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xE2))&0x9000)==0x9000)
|
|
group.word 0xE2++0x01
|
|
line.word 0x00 "PPC_PCFGR113,Pin Configuration Register 113"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xE2))&0x9000)==0x8000)
|
|
group.word 0xE2++0x01
|
|
line.word 0x00 "PPC_PCFGR113,Pin Configuration Register 113"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xE2))&0x9000)==0x1000)
|
|
group.word 0xE2++0x01
|
|
line.word 0x00 "PPC_PCFGR113,Pin Configuration Register 113"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xE2++0x01
|
|
line.word 0x00 "PPC_PCFGR113,Pin Configuration Register 113"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xE4))&0x9000)==0x9000)
|
|
group.word 0xE4++0x01
|
|
line.word 0x00 "PPC_PCFGR114,Pin Configuration Register 114"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xE4))&0x9000)==0x8000)
|
|
group.word 0xE4++0x01
|
|
line.word 0x00 "PPC_PCFGR114,Pin Configuration Register 114"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xE4))&0x9000)==0x1000)
|
|
group.word 0xE4++0x01
|
|
line.word 0x00 "PPC_PCFGR114,Pin Configuration Register 114"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xE4++0x01
|
|
line.word 0x00 "PPC_PCFGR114,Pin Configuration Register 114"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xE6))&0x9000)==0x9000)
|
|
group.word 0xE6++0x01
|
|
line.word 0x00 "PPC_PCFGR115,Pin Configuration Register 115"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xE6))&0x9000)==0x8000)
|
|
group.word 0xE6++0x01
|
|
line.word 0x00 "PPC_PCFGR115,Pin Configuration Register 115"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xE6))&0x9000)==0x1000)
|
|
group.word 0xE6++0x01
|
|
line.word 0x00 "PPC_PCFGR115,Pin Configuration Register 115"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xE6++0x01
|
|
line.word 0x00 "PPC_PCFGR115,Pin Configuration Register 115"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xE8))&0x9000)==0x9000)
|
|
group.word 0xE8++0x01
|
|
line.word 0x00 "PPC_PCFGR116,Pin Configuration Register 116"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xE8))&0x9000)==0x8000)
|
|
group.word 0xE8++0x01
|
|
line.word 0x00 "PPC_PCFGR116,Pin Configuration Register 116"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xE8))&0x9000)==0x1000)
|
|
group.word 0xE8++0x01
|
|
line.word 0x00 "PPC_PCFGR116,Pin Configuration Register 116"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xE8++0x01
|
|
line.word 0x00 "PPC_PCFGR116,Pin Configuration Register 116"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xEA))&0x9000)==0x9000)
|
|
group.word 0xEA++0x01
|
|
line.word 0x00 "PPC_PCFGR117,Pin Configuration Register 117"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xEA))&0x9000)==0x8000)
|
|
group.word 0xEA++0x01
|
|
line.word 0x00 "PPC_PCFGR117,Pin Configuration Register 117"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xEA))&0x9000)==0x1000)
|
|
group.word 0xEA++0x01
|
|
line.word 0x00 "PPC_PCFGR117,Pin Configuration Register 117"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xEA++0x01
|
|
line.word 0x00 "PPC_PCFGR117,Pin Configuration Register 117"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xEC))&0x9000)==0x9000)
|
|
group.word 0xEC++0x01
|
|
line.word 0x00 "PPC_PCFGR118,Pin Configuration Register 118"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xEC))&0x9000)==0x8000)
|
|
group.word 0xEC++0x01
|
|
line.word 0x00 "PPC_PCFGR118,Pin Configuration Register 118"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xEC))&0x9000)==0x1000)
|
|
group.word 0xEC++0x01
|
|
line.word 0x00 "PPC_PCFGR118,Pin Configuration Register 118"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xEC++0x01
|
|
line.word 0x00 "PPC_PCFGR118,Pin Configuration Register 118"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xEE))&0x9000)==0x9000)
|
|
group.word 0xEE++0x01
|
|
line.word 0x00 "PPC_PCFGR119,Pin Configuration Register 119"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xEE))&0x9000)==0x8000)
|
|
group.word 0xEE++0x01
|
|
line.word 0x00 "PPC_PCFGR119,Pin Configuration Register 119"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xEE))&0x9000)==0x1000)
|
|
group.word 0xEE++0x01
|
|
line.word 0x00 "PPC_PCFGR119,Pin Configuration Register 119"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xEE++0x01
|
|
line.word 0x00 "PPC_PCFGR119,Pin Configuration Register 119"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xF0))&0x9000)==0x9000)
|
|
group.word 0xF0++0x01
|
|
line.word 0x00 "PPC_PCFGR120,Pin Configuration Register 120"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xF0))&0x9000)==0x8000)
|
|
group.word 0xF0++0x01
|
|
line.word 0x00 "PPC_PCFGR120,Pin Configuration Register 120"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xF0))&0x9000)==0x1000)
|
|
group.word 0xF0++0x01
|
|
line.word 0x00 "PPC_PCFGR120,Pin Configuration Register 120"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xF0++0x01
|
|
line.word 0x00 "PPC_PCFGR120,Pin Configuration Register 120"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xF2))&0x9000)==0x9000)
|
|
group.word 0xF2++0x01
|
|
line.word 0x00 "PPC_PCFGR121,Pin Configuration Register 121"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xF2))&0x9000)==0x8000)
|
|
group.word 0xF2++0x01
|
|
line.word 0x00 "PPC_PCFGR121,Pin Configuration Register 121"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xF2))&0x9000)==0x1000)
|
|
group.word 0xF2++0x01
|
|
line.word 0x00 "PPC_PCFGR121,Pin Configuration Register 121"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xF2++0x01
|
|
line.word 0x00 "PPC_PCFGR121,Pin Configuration Register 121"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xF4))&0x9000)==0x9000)
|
|
group.word 0xF4++0x01
|
|
line.word 0x00 "PPC_PCFGR122,Pin Configuration Register 122"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xF4))&0x9000)==0x8000)
|
|
group.word 0xF4++0x01
|
|
line.word 0x00 "PPC_PCFGR122,Pin Configuration Register 122"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xF4))&0x9000)==0x1000)
|
|
group.word 0xF4++0x01
|
|
line.word 0x00 "PPC_PCFGR122,Pin Configuration Register 122"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xF4++0x01
|
|
line.word 0x00 "PPC_PCFGR122,Pin Configuration Register 122"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xF6))&0x9000)==0x9000)
|
|
group.word 0xF6++0x01
|
|
line.word 0x00 "PPC_PCFGR123,Pin Configuration Register 123"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xF6))&0x9000)==0x8000)
|
|
group.word 0xF6++0x01
|
|
line.word 0x00 "PPC_PCFGR123,Pin Configuration Register 123"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xF6))&0x9000)==0x1000)
|
|
group.word 0xF6++0x01
|
|
line.word 0x00 "PPC_PCFGR123,Pin Configuration Register 123"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xF6++0x01
|
|
line.word 0x00 "PPC_PCFGR123,Pin Configuration Register 123"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xF8))&0x9000)==0x9000)
|
|
group.word 0xF8++0x01
|
|
line.word 0x00 "PPC_PCFGR124,Pin Configuration Register 124"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xF8))&0x9000)==0x8000)
|
|
group.word 0xF8++0x01
|
|
line.word 0x00 "PPC_PCFGR124,Pin Configuration Register 124"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xF8))&0x9000)==0x1000)
|
|
group.word 0xF8++0x01
|
|
line.word 0x00 "PPC_PCFGR124,Pin Configuration Register 124"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xF8++0x01
|
|
line.word 0x00 "PPC_PCFGR124,Pin Configuration Register 124"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xFA))&0x9000)==0x9000)
|
|
group.word 0xFA++0x01
|
|
line.word 0x00 "PPC_PCFGR125,Pin Configuration Register 125"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xFA))&0x9000)==0x8000)
|
|
group.word 0xFA++0x01
|
|
line.word 0x00 "PPC_PCFGR125,Pin Configuration Register 125"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xFA))&0x9000)==0x1000)
|
|
group.word 0xFA++0x01
|
|
line.word 0x00 "PPC_PCFGR125,Pin Configuration Register 125"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xFA++0x01
|
|
line.word 0x00 "PPC_PCFGR125,Pin Configuration Register 125"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xFC))&0x9000)==0x9000)
|
|
group.word 0xFC++0x01
|
|
line.word 0x00 "PPC_PCFGR126,Pin Configuration Register 126"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xFC))&0x9000)==0x8000)
|
|
group.word 0xFC++0x01
|
|
line.word 0x00 "PPC_PCFGR126,Pin Configuration Register 126"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xFC))&0x9000)==0x1000)
|
|
group.word 0xFC++0x01
|
|
line.word 0x00 "PPC_PCFGR126,Pin Configuration Register 126"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xFC++0x01
|
|
line.word 0x00 "PPC_PCFGR126,Pin Configuration Register 126"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0xFE))&0x9000)==0x9000)
|
|
group.word 0xFE++0x01
|
|
line.word 0x00 "PPC_PCFGR127,Pin Configuration Register 127"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xFE))&0x9000)==0x8000)
|
|
group.word 0xFE++0x01
|
|
line.word 0x00 "PPC_PCFGR127,Pin Configuration Register 127"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0xFE))&0x9000)==0x1000)
|
|
group.word 0xFE++0x01
|
|
line.word 0x00 "PPC_PCFGR127,Pin Configuration Register 127"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0xFE++0x01
|
|
line.word 0x00 "PPC_PCFGR127,Pin Configuration Register 127"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x100))&0x9000)==0x9000)
|
|
group.word 0x100++0x01
|
|
line.word 0x00 "PPC_PCFGR128,Pin Configuration Register 128"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x100))&0x9000)==0x8000)
|
|
group.word 0x100++0x01
|
|
line.word 0x00 "PPC_PCFGR128,Pin Configuration Register 128"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x100))&0x9000)==0x1000)
|
|
group.word 0x100++0x01
|
|
line.word 0x00 "PPC_PCFGR128,Pin Configuration Register 128"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x100++0x01
|
|
line.word 0x00 "PPC_PCFGR128,Pin Configuration Register 128"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x102))&0x9000)==0x9000)
|
|
group.word 0x102++0x01
|
|
line.word 0x00 "PPC_PCFGR129,Pin Configuration Register 129"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x102))&0x9000)==0x8000)
|
|
group.word 0x102++0x01
|
|
line.word 0x00 "PPC_PCFGR129,Pin Configuration Register 129"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x102))&0x9000)==0x1000)
|
|
group.word 0x102++0x01
|
|
line.word 0x00 "PPC_PCFGR129,Pin Configuration Register 129"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x102++0x01
|
|
line.word 0x00 "PPC_PCFGR129,Pin Configuration Register 129"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x104))&0x9000)==0x9000)
|
|
group.word 0x104++0x01
|
|
line.word 0x00 "PPC_PCFGR130,Pin Configuration Register 130"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x104))&0x9000)==0x8000)
|
|
group.word 0x104++0x01
|
|
line.word 0x00 "PPC_PCFGR130,Pin Configuration Register 130"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x104))&0x9000)==0x1000)
|
|
group.word 0x104++0x01
|
|
line.word 0x00 "PPC_PCFGR130,Pin Configuration Register 130"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x104++0x01
|
|
line.word 0x00 "PPC_PCFGR130,Pin Configuration Register 130"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x106))&0x9000)==0x9000)
|
|
group.word 0x106++0x01
|
|
line.word 0x00 "PPC_PCFGR131,Pin Configuration Register 131"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x106))&0x9000)==0x8000)
|
|
group.word 0x106++0x01
|
|
line.word 0x00 "PPC_PCFGR131,Pin Configuration Register 131"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x106))&0x9000)==0x1000)
|
|
group.word 0x106++0x01
|
|
line.word 0x00 "PPC_PCFGR131,Pin Configuration Register 131"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x106++0x01
|
|
line.word 0x00 "PPC_PCFGR131,Pin Configuration Register 131"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x108))&0x9000)==0x9000)
|
|
group.word 0x108++0x01
|
|
line.word 0x00 "PPC_PCFGR132,Pin Configuration Register 132"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x108))&0x9000)==0x8000)
|
|
group.word 0x108++0x01
|
|
line.word 0x00 "PPC_PCFGR132,Pin Configuration Register 132"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x108))&0x9000)==0x1000)
|
|
group.word 0x108++0x01
|
|
line.word 0x00 "PPC_PCFGR132,Pin Configuration Register 132"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x108++0x01
|
|
line.word 0x00 "PPC_PCFGR132,Pin Configuration Register 132"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x10A))&0x9000)==0x9000)
|
|
group.word 0x10A++0x01
|
|
line.word 0x00 "PPC_PCFGR133,Pin Configuration Register 133"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x10A))&0x9000)==0x8000)
|
|
group.word 0x10A++0x01
|
|
line.word 0x00 "PPC_PCFGR133,Pin Configuration Register 133"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x10A))&0x9000)==0x1000)
|
|
group.word 0x10A++0x01
|
|
line.word 0x00 "PPC_PCFGR133,Pin Configuration Register 133"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x10A++0x01
|
|
line.word 0x00 "PPC_PCFGR133,Pin Configuration Register 133"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x10C))&0x9000)==0x9000)
|
|
group.word 0x10C++0x01
|
|
line.word 0x00 "PPC_PCFGR134,Pin Configuration Register 134"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x10C))&0x9000)==0x8000)
|
|
group.word 0x10C++0x01
|
|
line.word 0x00 "PPC_PCFGR134,Pin Configuration Register 134"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x10C))&0x9000)==0x1000)
|
|
group.word 0x10C++0x01
|
|
line.word 0x00 "PPC_PCFGR134,Pin Configuration Register 134"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x10C++0x01
|
|
line.word 0x00 "PPC_PCFGR134,Pin Configuration Register 134"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x10E))&0x9000)==0x9000)
|
|
group.word 0x10E++0x01
|
|
line.word 0x00 "PPC_PCFGR135,Pin Configuration Register 135"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x10E))&0x9000)==0x8000)
|
|
group.word 0x10E++0x01
|
|
line.word 0x00 "PPC_PCFGR135,Pin Configuration Register 135"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x10E))&0x9000)==0x1000)
|
|
group.word 0x10E++0x01
|
|
line.word 0x00 "PPC_PCFGR135,Pin Configuration Register 135"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x10E++0x01
|
|
line.word 0x00 "PPC_PCFGR135,Pin Configuration Register 135"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x110))&0x9000)==0x9000)
|
|
group.word 0x110++0x01
|
|
line.word 0x00 "PPC_PCFGR136,Pin Configuration Register 136"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x110))&0x9000)==0x8000)
|
|
group.word 0x110++0x01
|
|
line.word 0x00 "PPC_PCFGR136,Pin Configuration Register 136"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x110))&0x9000)==0x1000)
|
|
group.word 0x110++0x01
|
|
line.word 0x00 "PPC_PCFGR136,Pin Configuration Register 136"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x110++0x01
|
|
line.word 0x00 "PPC_PCFGR136,Pin Configuration Register 136"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x112))&0x9000)==0x9000)
|
|
group.word 0x112++0x01
|
|
line.word 0x00 "PPC_PCFGR137,Pin Configuration Register 137"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x112))&0x9000)==0x8000)
|
|
group.word 0x112++0x01
|
|
line.word 0x00 "PPC_PCFGR137,Pin Configuration Register 137"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x112))&0x9000)==0x1000)
|
|
group.word 0x112++0x01
|
|
line.word 0x00 "PPC_PCFGR137,Pin Configuration Register 137"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x112++0x01
|
|
line.word 0x00 "PPC_PCFGR137,Pin Configuration Register 137"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x114))&0x9000)==0x9000)
|
|
group.word 0x114++0x01
|
|
line.word 0x00 "PPC_PCFGR138,Pin Configuration Register 138"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x114))&0x9000)==0x8000)
|
|
group.word 0x114++0x01
|
|
line.word 0x00 "PPC_PCFGR138,Pin Configuration Register 138"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x114))&0x9000)==0x1000)
|
|
group.word 0x114++0x01
|
|
line.word 0x00 "PPC_PCFGR138,Pin Configuration Register 138"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x114++0x01
|
|
line.word 0x00 "PPC_PCFGR138,Pin Configuration Register 138"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x116))&0x9000)==0x9000)
|
|
group.word 0x116++0x01
|
|
line.word 0x00 "PPC_PCFGR139,Pin Configuration Register 139"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x116))&0x9000)==0x8000)
|
|
group.word 0x116++0x01
|
|
line.word 0x00 "PPC_PCFGR139,Pin Configuration Register 139"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x116))&0x9000)==0x1000)
|
|
group.word 0x116++0x01
|
|
line.word 0x00 "PPC_PCFGR139,Pin Configuration Register 139"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x116++0x01
|
|
line.word 0x00 "PPC_PCFGR139,Pin Configuration Register 139"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x118))&0x9000)==0x9000)
|
|
group.word 0x118++0x01
|
|
line.word 0x00 "PPC_PCFGR140,Pin Configuration Register 140"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x118))&0x9000)==0x8000)
|
|
group.word 0x118++0x01
|
|
line.word 0x00 "PPC_PCFGR140,Pin Configuration Register 140"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x118))&0x9000)==0x1000)
|
|
group.word 0x118++0x01
|
|
line.word 0x00 "PPC_PCFGR140,Pin Configuration Register 140"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x118++0x01
|
|
line.word 0x00 "PPC_PCFGR140,Pin Configuration Register 140"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x11A))&0x9000)==0x9000)
|
|
group.word 0x11A++0x01
|
|
line.word 0x00 "PPC_PCFGR141,Pin Configuration Register 141"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x11A))&0x9000)==0x8000)
|
|
group.word 0x11A++0x01
|
|
line.word 0x00 "PPC_PCFGR141,Pin Configuration Register 141"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x11A))&0x9000)==0x1000)
|
|
group.word 0x11A++0x01
|
|
line.word 0x00 "PPC_PCFGR141,Pin Configuration Register 141"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x11A++0x01
|
|
line.word 0x00 "PPC_PCFGR141,Pin Configuration Register 141"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x11C))&0x9000)==0x9000)
|
|
group.word 0x11C++0x01
|
|
line.word 0x00 "PPC_PCFGR142,Pin Configuration Register 142"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x11C))&0x9000)==0x8000)
|
|
group.word 0x11C++0x01
|
|
line.word 0x00 "PPC_PCFGR142,Pin Configuration Register 142"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x11C))&0x9000)==0x1000)
|
|
group.word 0x11C++0x01
|
|
line.word 0x00 "PPC_PCFGR142,Pin Configuration Register 142"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x11C++0x01
|
|
line.word 0x00 "PPC_PCFGR142,Pin Configuration Register 142"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x11E))&0x9000)==0x9000)
|
|
group.word 0x11E++0x01
|
|
line.word 0x00 "PPC_PCFGR143,Pin Configuration Register 143"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x11E))&0x9000)==0x8000)
|
|
group.word 0x11E++0x01
|
|
line.word 0x00 "PPC_PCFGR143,Pin Configuration Register 143"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x11E))&0x9000)==0x1000)
|
|
group.word 0x11E++0x01
|
|
line.word 0x00 "PPC_PCFGR143,Pin Configuration Register 143"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x11E++0x01
|
|
line.word 0x00 "PPC_PCFGR143,Pin Configuration Register 143"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x120))&0x9000)==0x9000)
|
|
group.word 0x120++0x01
|
|
line.word 0x00 "PPC_PCFGR144,Pin Configuration Register 144"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x120))&0x9000)==0x8000)
|
|
group.word 0x120++0x01
|
|
line.word 0x00 "PPC_PCFGR144,Pin Configuration Register 144"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x120))&0x9000)==0x1000)
|
|
group.word 0x120++0x01
|
|
line.word 0x00 "PPC_PCFGR144,Pin Configuration Register 144"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x120++0x01
|
|
line.word 0x00 "PPC_PCFGR144,Pin Configuration Register 144"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x122))&0x9000)==0x9000)
|
|
group.word 0x122++0x01
|
|
line.word 0x00 "PPC_PCFGR145,Pin Configuration Register 145"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x122))&0x9000)==0x8000)
|
|
group.word 0x122++0x01
|
|
line.word 0x00 "PPC_PCFGR145,Pin Configuration Register 145"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x122))&0x9000)==0x1000)
|
|
group.word 0x122++0x01
|
|
line.word 0x00 "PPC_PCFGR145,Pin Configuration Register 145"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x122++0x01
|
|
line.word 0x00 "PPC_PCFGR145,Pin Configuration Register 145"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x124))&0x9000)==0x9000)
|
|
group.word 0x124++0x01
|
|
line.word 0x00 "PPC_PCFGR146,Pin Configuration Register 146"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x124))&0x9000)==0x8000)
|
|
group.word 0x124++0x01
|
|
line.word 0x00 "PPC_PCFGR146,Pin Configuration Register 146"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x124))&0x9000)==0x1000)
|
|
group.word 0x124++0x01
|
|
line.word 0x00 "PPC_PCFGR146,Pin Configuration Register 146"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x124++0x01
|
|
line.word 0x00 "PPC_PCFGR146,Pin Configuration Register 146"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x126))&0x9000)==0x9000)
|
|
group.word 0x126++0x01
|
|
line.word 0x00 "PPC_PCFGR147,Pin Configuration Register 147"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x126))&0x9000)==0x8000)
|
|
group.word 0x126++0x01
|
|
line.word 0x00 "PPC_PCFGR147,Pin Configuration Register 147"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x126))&0x9000)==0x1000)
|
|
group.word 0x126++0x01
|
|
line.word 0x00 "PPC_PCFGR147,Pin Configuration Register 147"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x126++0x01
|
|
line.word 0x00 "PPC_PCFGR147,Pin Configuration Register 147"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x128))&0x9000)==0x9000)
|
|
group.word 0x128++0x01
|
|
line.word 0x00 "PPC_PCFGR148,Pin Configuration Register 148"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x128))&0x9000)==0x8000)
|
|
group.word 0x128++0x01
|
|
line.word 0x00 "PPC_PCFGR148,Pin Configuration Register 148"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x128))&0x9000)==0x1000)
|
|
group.word 0x128++0x01
|
|
line.word 0x00 "PPC_PCFGR148,Pin Configuration Register 148"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x128++0x01
|
|
line.word 0x00 "PPC_PCFGR148,Pin Configuration Register 148"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x12A))&0x9000)==0x9000)
|
|
group.word 0x12A++0x01
|
|
line.word 0x00 "PPC_PCFGR149,Pin Configuration Register 149"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x12A))&0x9000)==0x8000)
|
|
group.word 0x12A++0x01
|
|
line.word 0x00 "PPC_PCFGR149,Pin Configuration Register 149"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x12A))&0x9000)==0x1000)
|
|
group.word 0x12A++0x01
|
|
line.word 0x00 "PPC_PCFGR149,Pin Configuration Register 149"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x12A++0x01
|
|
line.word 0x00 "PPC_PCFGR149,Pin Configuration Register 149"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x12C))&0x9000)==0x9000)
|
|
group.word 0x12C++0x01
|
|
line.word 0x00 "PPC_PCFGR150,Pin Configuration Register 150"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x12C))&0x9000)==0x8000)
|
|
group.word 0x12C++0x01
|
|
line.word 0x00 "PPC_PCFGR150,Pin Configuration Register 150"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x12C))&0x9000)==0x1000)
|
|
group.word 0x12C++0x01
|
|
line.word 0x00 "PPC_PCFGR150,Pin Configuration Register 150"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x12C++0x01
|
|
line.word 0x00 "PPC_PCFGR150,Pin Configuration Register 150"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x12E))&0x9000)==0x9000)
|
|
group.word 0x12E++0x01
|
|
line.word 0x00 "PPC_PCFGR151,Pin Configuration Register 151"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x12E))&0x9000)==0x8000)
|
|
group.word 0x12E++0x01
|
|
line.word 0x00 "PPC_PCFGR151,Pin Configuration Register 151"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x12E))&0x9000)==0x1000)
|
|
group.word 0x12E++0x01
|
|
line.word 0x00 "PPC_PCFGR151,Pin Configuration Register 151"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x12E++0x01
|
|
line.word 0x00 "PPC_PCFGR151,Pin Configuration Register 151"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x130))&0x9000)==0x9000)
|
|
group.word 0x130++0x01
|
|
line.word 0x00 "PPC_PCFGR152,Pin Configuration Register 152"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x130))&0x9000)==0x8000)
|
|
group.word 0x130++0x01
|
|
line.word 0x00 "PPC_PCFGR152,Pin Configuration Register 152"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x130))&0x9000)==0x1000)
|
|
group.word 0x130++0x01
|
|
line.word 0x00 "PPC_PCFGR152,Pin Configuration Register 152"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x130++0x01
|
|
line.word 0x00 "PPC_PCFGR152,Pin Configuration Register 152"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x132))&0x9000)==0x9000)
|
|
group.word 0x132++0x01
|
|
line.word 0x00 "PPC_PCFGR153,Pin Configuration Register 153"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x132))&0x9000)==0x8000)
|
|
group.word 0x132++0x01
|
|
line.word 0x00 "PPC_PCFGR153,Pin Configuration Register 153"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x132))&0x9000)==0x1000)
|
|
group.word 0x132++0x01
|
|
line.word 0x00 "PPC_PCFGR153,Pin Configuration Register 153"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x132++0x01
|
|
line.word 0x00 "PPC_PCFGR153,Pin Configuration Register 153"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x134))&0x9000)==0x9000)
|
|
group.word 0x134++0x01
|
|
line.word 0x00 "PPC_PCFGR154,Pin Configuration Register 154"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x134))&0x9000)==0x8000)
|
|
group.word 0x134++0x01
|
|
line.word 0x00 "PPC_PCFGR154,Pin Configuration Register 154"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x134))&0x9000)==0x1000)
|
|
group.word 0x134++0x01
|
|
line.word 0x00 "PPC_PCFGR154,Pin Configuration Register 154"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x134++0x01
|
|
line.word 0x00 "PPC_PCFGR154,Pin Configuration Register 154"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x136))&0x9000)==0x9000)
|
|
group.word 0x136++0x01
|
|
line.word 0x00 "PPC_PCFGR155,Pin Configuration Register 155"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x136))&0x9000)==0x8000)
|
|
group.word 0x136++0x01
|
|
line.word 0x00 "PPC_PCFGR155,Pin Configuration Register 155"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x136))&0x9000)==0x1000)
|
|
group.word 0x136++0x01
|
|
line.word 0x00 "PPC_PCFGR155,Pin Configuration Register 155"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x136++0x01
|
|
line.word 0x00 "PPC_PCFGR155,Pin Configuration Register 155"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x138))&0x9000)==0x9000)
|
|
group.word 0x138++0x01
|
|
line.word 0x00 "PPC_PCFGR156,Pin Configuration Register 156"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x138))&0x9000)==0x8000)
|
|
group.word 0x138++0x01
|
|
line.word 0x00 "PPC_PCFGR156,Pin Configuration Register 156"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x138))&0x9000)==0x1000)
|
|
group.word 0x138++0x01
|
|
line.word 0x00 "PPC_PCFGR156,Pin Configuration Register 156"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x138++0x01
|
|
line.word 0x00 "PPC_PCFGR156,Pin Configuration Register 156"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x13A))&0x9000)==0x9000)
|
|
group.word 0x13A++0x01
|
|
line.word 0x00 "PPC_PCFGR157,Pin Configuration Register 157"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x13A))&0x9000)==0x8000)
|
|
group.word 0x13A++0x01
|
|
line.word 0x00 "PPC_PCFGR157,Pin Configuration Register 157"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x13A))&0x9000)==0x1000)
|
|
group.word 0x13A++0x01
|
|
line.word 0x00 "PPC_PCFGR157,Pin Configuration Register 157"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x13A++0x01
|
|
line.word 0x00 "PPC_PCFGR157,Pin Configuration Register 157"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x13C))&0x9000)==0x9000)
|
|
group.word 0x13C++0x01
|
|
line.word 0x00 "PPC_PCFGR158,Pin Configuration Register 158"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x13C))&0x9000)==0x8000)
|
|
group.word 0x13C++0x01
|
|
line.word 0x00 "PPC_PCFGR158,Pin Configuration Register 158"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x13C))&0x9000)==0x1000)
|
|
group.word 0x13C++0x01
|
|
line.word 0x00 "PPC_PCFGR158,Pin Configuration Register 158"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x13C++0x01
|
|
line.word 0x00 "PPC_PCFGR158,Pin Configuration Register 158"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x13E))&0x9000)==0x9000)
|
|
group.word 0x13E++0x01
|
|
line.word 0x00 "PPC_PCFGR159,Pin Configuration Register 159"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x13E))&0x9000)==0x8000)
|
|
group.word 0x13E++0x01
|
|
line.word 0x00 "PPC_PCFGR159,Pin Configuration Register 159"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x13E))&0x9000)==0x1000)
|
|
group.word 0x13E++0x01
|
|
line.word 0x00 "PPC_PCFGR159,Pin Configuration Register 159"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x13E++0x01
|
|
line.word 0x00 "PPC_PCFGR159,Pin Configuration Register 159"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x140))&0x9000)==0x9000)
|
|
group.word 0x140++0x01
|
|
line.word 0x00 "PPC_PCFGR160,Pin Configuration Register 160"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x140))&0x9000)==0x8000)
|
|
group.word 0x140++0x01
|
|
line.word 0x00 "PPC_PCFGR160,Pin Configuration Register 160"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x140))&0x9000)==0x1000)
|
|
group.word 0x140++0x01
|
|
line.word 0x00 "PPC_PCFGR160,Pin Configuration Register 160"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x140++0x01
|
|
line.word 0x00 "PPC_PCFGR160,Pin Configuration Register 160"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x142))&0x9000)==0x9000)
|
|
group.word 0x142++0x01
|
|
line.word 0x00 "PPC_PCFGR161,Pin Configuration Register 161"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x142))&0x9000)==0x8000)
|
|
group.word 0x142++0x01
|
|
line.word 0x00 "PPC_PCFGR161,Pin Configuration Register 161"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x142))&0x9000)==0x1000)
|
|
group.word 0x142++0x01
|
|
line.word 0x00 "PPC_PCFGR161,Pin Configuration Register 161"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x142++0x01
|
|
line.word 0x00 "PPC_PCFGR161,Pin Configuration Register 161"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x144))&0x9000)==0x9000)
|
|
group.word 0x144++0x01
|
|
line.word 0x00 "PPC_PCFGR162,Pin Configuration Register 162"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x144))&0x9000)==0x8000)
|
|
group.word 0x144++0x01
|
|
line.word 0x00 "PPC_PCFGR162,Pin Configuration Register 162"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x144))&0x9000)==0x1000)
|
|
group.word 0x144++0x01
|
|
line.word 0x00 "PPC_PCFGR162,Pin Configuration Register 162"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x144++0x01
|
|
line.word 0x00 "PPC_PCFGR162,Pin Configuration Register 162"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x146))&0x9000)==0x9000)
|
|
group.word 0x146++0x01
|
|
line.word 0x00 "PPC_PCFGR163,Pin Configuration Register 163"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x146))&0x9000)==0x8000)
|
|
group.word 0x146++0x01
|
|
line.word 0x00 "PPC_PCFGR163,Pin Configuration Register 163"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x146))&0x9000)==0x1000)
|
|
group.word 0x146++0x01
|
|
line.word 0x00 "PPC_PCFGR163,Pin Configuration Register 163"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x146++0x01
|
|
line.word 0x00 "PPC_PCFGR163,Pin Configuration Register 163"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x148))&0x9000)==0x9000)
|
|
group.word 0x148++0x01
|
|
line.word 0x00 "PPC_PCFGR164,Pin Configuration Register 164"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x148))&0x9000)==0x8000)
|
|
group.word 0x148++0x01
|
|
line.word 0x00 "PPC_PCFGR164,Pin Configuration Register 164"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x148))&0x9000)==0x1000)
|
|
group.word 0x148++0x01
|
|
line.word 0x00 "PPC_PCFGR164,Pin Configuration Register 164"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x148++0x01
|
|
line.word 0x00 "PPC_PCFGR164,Pin Configuration Register 164"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x14A))&0x9000)==0x9000)
|
|
group.word 0x14A++0x01
|
|
line.word 0x00 "PPC_PCFGR165,Pin Configuration Register 165"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x14A))&0x9000)==0x8000)
|
|
group.word 0x14A++0x01
|
|
line.word 0x00 "PPC_PCFGR165,Pin Configuration Register 165"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x14A))&0x9000)==0x1000)
|
|
group.word 0x14A++0x01
|
|
line.word 0x00 "PPC_PCFGR165,Pin Configuration Register 165"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x14A++0x01
|
|
line.word 0x00 "PPC_PCFGR165,Pin Configuration Register 165"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x14C))&0x9000)==0x9000)
|
|
group.word 0x14C++0x01
|
|
line.word 0x00 "PPC_PCFGR166,Pin Configuration Register 166"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x14C))&0x9000)==0x8000)
|
|
group.word 0x14C++0x01
|
|
line.word 0x00 "PPC_PCFGR166,Pin Configuration Register 166"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x14C))&0x9000)==0x1000)
|
|
group.word 0x14C++0x01
|
|
line.word 0x00 "PPC_PCFGR166,Pin Configuration Register 166"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x14C++0x01
|
|
line.word 0x00 "PPC_PCFGR166,Pin Configuration Register 166"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x14E))&0x9000)==0x9000)
|
|
group.word 0x14E++0x01
|
|
line.word 0x00 "PPC_PCFGR167,Pin Configuration Register 167"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x14E))&0x9000)==0x8000)
|
|
group.word 0x14E++0x01
|
|
line.word 0x00 "PPC_PCFGR167,Pin Configuration Register 167"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x14E))&0x9000)==0x1000)
|
|
group.word 0x14E++0x01
|
|
line.word 0x00 "PPC_PCFGR167,Pin Configuration Register 167"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x14E++0x01
|
|
line.word 0x00 "PPC_PCFGR167,Pin Configuration Register 167"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x150))&0x9000)==0x9000)
|
|
group.word 0x150++0x01
|
|
line.word 0x00 "PPC_PCFGR168,Pin Configuration Register 168"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x150))&0x9000)==0x8000)
|
|
group.word 0x150++0x01
|
|
line.word 0x00 "PPC_PCFGR168,Pin Configuration Register 168"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x150))&0x9000)==0x1000)
|
|
group.word 0x150++0x01
|
|
line.word 0x00 "PPC_PCFGR168,Pin Configuration Register 168"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x150++0x01
|
|
line.word 0x00 "PPC_PCFGR168,Pin Configuration Register 168"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x152))&0x9000)==0x9000)
|
|
group.word 0x152++0x01
|
|
line.word 0x00 "PPC_PCFGR169,Pin Configuration Register 169"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x152))&0x9000)==0x8000)
|
|
group.word 0x152++0x01
|
|
line.word 0x00 "PPC_PCFGR169,Pin Configuration Register 169"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x152))&0x9000)==0x1000)
|
|
group.word 0x152++0x01
|
|
line.word 0x00 "PPC_PCFGR169,Pin Configuration Register 169"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x152++0x01
|
|
line.word 0x00 "PPC_PCFGR169,Pin Configuration Register 169"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x154))&0x9000)==0x9000)
|
|
group.word 0x154++0x01
|
|
line.word 0x00 "PPC_PCFGR170,Pin Configuration Register 170"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x154))&0x9000)==0x8000)
|
|
group.word 0x154++0x01
|
|
line.word 0x00 "PPC_PCFGR170,Pin Configuration Register 170"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x154))&0x9000)==0x1000)
|
|
group.word 0x154++0x01
|
|
line.word 0x00 "PPC_PCFGR170,Pin Configuration Register 170"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x154++0x01
|
|
line.word 0x00 "PPC_PCFGR170,Pin Configuration Register 170"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x156))&0x9000)==0x9000)
|
|
group.word 0x156++0x01
|
|
line.word 0x00 "PPC_PCFGR171,Pin Configuration Register 171"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x156))&0x9000)==0x8000)
|
|
group.word 0x156++0x01
|
|
line.word 0x00 "PPC_PCFGR171,Pin Configuration Register 171"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x156))&0x9000)==0x1000)
|
|
group.word 0x156++0x01
|
|
line.word 0x00 "PPC_PCFGR171,Pin Configuration Register 171"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x156++0x01
|
|
line.word 0x00 "PPC_PCFGR171,Pin Configuration Register 171"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x158))&0x9000)==0x9000)
|
|
group.word 0x158++0x01
|
|
line.word 0x00 "PPC_PCFGR172,Pin Configuration Register 172"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x158))&0x9000)==0x8000)
|
|
group.word 0x158++0x01
|
|
line.word 0x00 "PPC_PCFGR172,Pin Configuration Register 172"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x158))&0x9000)==0x1000)
|
|
group.word 0x158++0x01
|
|
line.word 0x00 "PPC_PCFGR172,Pin Configuration Register 172"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x158++0x01
|
|
line.word 0x00 "PPC_PCFGR172,Pin Configuration Register 172"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x15A))&0x9000)==0x9000)
|
|
group.word 0x15A++0x01
|
|
line.word 0x00 "PPC_PCFGR173,Pin Configuration Register 173"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x15A))&0x9000)==0x8000)
|
|
group.word 0x15A++0x01
|
|
line.word 0x00 "PPC_PCFGR173,Pin Configuration Register 173"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x15A))&0x9000)==0x1000)
|
|
group.word 0x15A++0x01
|
|
line.word 0x00 "PPC_PCFGR173,Pin Configuration Register 173"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x15A++0x01
|
|
line.word 0x00 "PPC_PCFGR173,Pin Configuration Register 173"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x15C))&0x9000)==0x9000)
|
|
group.word 0x15C++0x01
|
|
line.word 0x00 "PPC_PCFGR174,Pin Configuration Register 174"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x15C))&0x9000)==0x8000)
|
|
group.word 0x15C++0x01
|
|
line.word 0x00 "PPC_PCFGR174,Pin Configuration Register 174"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x15C))&0x9000)==0x1000)
|
|
group.word 0x15C++0x01
|
|
line.word 0x00 "PPC_PCFGR174,Pin Configuration Register 174"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x15C++0x01
|
|
line.word 0x00 "PPC_PCFGR174,Pin Configuration Register 174"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x15E))&0x9000)==0x9000)
|
|
group.word 0x15E++0x01
|
|
line.word 0x00 "PPC_PCFGR175,Pin Configuration Register 175"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x15E))&0x9000)==0x8000)
|
|
group.word 0x15E++0x01
|
|
line.word 0x00 "PPC_PCFGR175,Pin Configuration Register 175"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x15E))&0x9000)==0x1000)
|
|
group.word 0x15E++0x01
|
|
line.word 0x00 "PPC_PCFGR175,Pin Configuration Register 175"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x15E++0x01
|
|
line.word 0x00 "PPC_PCFGR175,Pin Configuration Register 175"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x160))&0x9000)==0x9000)
|
|
group.word 0x160++0x01
|
|
line.word 0x00 "PPC_PCFGR176,Pin Configuration Register 176"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x160))&0x9000)==0x8000)
|
|
group.word 0x160++0x01
|
|
line.word 0x00 "PPC_PCFGR176,Pin Configuration Register 176"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x160))&0x9000)==0x1000)
|
|
group.word 0x160++0x01
|
|
line.word 0x00 "PPC_PCFGR176,Pin Configuration Register 176"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x160++0x01
|
|
line.word 0x00 "PPC_PCFGR176,Pin Configuration Register 176"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x162))&0x9000)==0x9000)
|
|
group.word 0x162++0x01
|
|
line.word 0x00 "PPC_PCFGR177,Pin Configuration Register 177"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x162))&0x9000)==0x8000)
|
|
group.word 0x162++0x01
|
|
line.word 0x00 "PPC_PCFGR177,Pin Configuration Register 177"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x162))&0x9000)==0x1000)
|
|
group.word 0x162++0x01
|
|
line.word 0x00 "PPC_PCFGR177,Pin Configuration Register 177"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x162++0x01
|
|
line.word 0x00 "PPC_PCFGR177,Pin Configuration Register 177"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x164))&0x9000)==0x9000)
|
|
group.word 0x164++0x01
|
|
line.word 0x00 "PPC_PCFGR178,Pin Configuration Register 178"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x164))&0x9000)==0x8000)
|
|
group.word 0x164++0x01
|
|
line.word 0x00 "PPC_PCFGR178,Pin Configuration Register 178"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x164))&0x9000)==0x1000)
|
|
group.word 0x164++0x01
|
|
line.word 0x00 "PPC_PCFGR178,Pin Configuration Register 178"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x164++0x01
|
|
line.word 0x00 "PPC_PCFGR178,Pin Configuration Register 178"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x166))&0x9000)==0x9000)
|
|
group.word 0x166++0x01
|
|
line.word 0x00 "PPC_PCFGR179,Pin Configuration Register 179"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x166))&0x9000)==0x8000)
|
|
group.word 0x166++0x01
|
|
line.word 0x00 "PPC_PCFGR179,Pin Configuration Register 179"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x166))&0x9000)==0x1000)
|
|
group.word 0x166++0x01
|
|
line.word 0x00 "PPC_PCFGR179,Pin Configuration Register 179"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x166++0x01
|
|
line.word 0x00 "PPC_PCFGR179,Pin Configuration Register 179"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x168))&0x9000)==0x9000)
|
|
group.word 0x168++0x01
|
|
line.word 0x00 "PPC_PCFGR180,Pin Configuration Register 180"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x168))&0x9000)==0x8000)
|
|
group.word 0x168++0x01
|
|
line.word 0x00 "PPC_PCFGR180,Pin Configuration Register 180"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x168))&0x9000)==0x1000)
|
|
group.word 0x168++0x01
|
|
line.word 0x00 "PPC_PCFGR180,Pin Configuration Register 180"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x168++0x01
|
|
line.word 0x00 "PPC_PCFGR180,Pin Configuration Register 180"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x16A))&0x9000)==0x9000)
|
|
group.word 0x16A++0x01
|
|
line.word 0x00 "PPC_PCFGR181,Pin Configuration Register 181"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x16A))&0x9000)==0x8000)
|
|
group.word 0x16A++0x01
|
|
line.word 0x00 "PPC_PCFGR181,Pin Configuration Register 181"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x16A))&0x9000)==0x1000)
|
|
group.word 0x16A++0x01
|
|
line.word 0x00 "PPC_PCFGR181,Pin Configuration Register 181"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x16A++0x01
|
|
line.word 0x00 "PPC_PCFGR181,Pin Configuration Register 181"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x16C))&0x9000)==0x9000)
|
|
group.word 0x16C++0x01
|
|
line.word 0x00 "PPC_PCFGR182,Pin Configuration Register 182"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x16C))&0x9000)==0x8000)
|
|
group.word 0x16C++0x01
|
|
line.word 0x00 "PPC_PCFGR182,Pin Configuration Register 182"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x16C))&0x9000)==0x1000)
|
|
group.word 0x16C++0x01
|
|
line.word 0x00 "PPC_PCFGR182,Pin Configuration Register 182"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x16C++0x01
|
|
line.word 0x00 "PPC_PCFGR182,Pin Configuration Register 182"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x16E))&0x9000)==0x9000)
|
|
group.word 0x16E++0x01
|
|
line.word 0x00 "PPC_PCFGR183,Pin Configuration Register 183"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x16E))&0x9000)==0x8000)
|
|
group.word 0x16E++0x01
|
|
line.word 0x00 "PPC_PCFGR183,Pin Configuration Register 183"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x16E))&0x9000)==0x1000)
|
|
group.word 0x16E++0x01
|
|
line.word 0x00 "PPC_PCFGR183,Pin Configuration Register 183"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x16E++0x01
|
|
line.word 0x00 "PPC_PCFGR183,Pin Configuration Register 183"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x170))&0x9000)==0x9000)
|
|
group.word 0x170++0x01
|
|
line.word 0x00 "PPC_PCFGR184,Pin Configuration Register 184"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x170))&0x9000)==0x8000)
|
|
group.word 0x170++0x01
|
|
line.word 0x00 "PPC_PCFGR184,Pin Configuration Register 184"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x170))&0x9000)==0x1000)
|
|
group.word 0x170++0x01
|
|
line.word 0x00 "PPC_PCFGR184,Pin Configuration Register 184"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x170++0x01
|
|
line.word 0x00 "PPC_PCFGR184,Pin Configuration Register 184"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x172))&0x9000)==0x9000)
|
|
group.word 0x172++0x01
|
|
line.word 0x00 "PPC_PCFGR185,Pin Configuration Register 185"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x172))&0x9000)==0x8000)
|
|
group.word 0x172++0x01
|
|
line.word 0x00 "PPC_PCFGR185,Pin Configuration Register 185"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x172))&0x9000)==0x1000)
|
|
group.word 0x172++0x01
|
|
line.word 0x00 "PPC_PCFGR185,Pin Configuration Register 185"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x172++0x01
|
|
line.word 0x00 "PPC_PCFGR185,Pin Configuration Register 185"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x174))&0x9000)==0x9000)
|
|
group.word 0x174++0x01
|
|
line.word 0x00 "PPC_PCFGR186,Pin Configuration Register 186"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x174))&0x9000)==0x8000)
|
|
group.word 0x174++0x01
|
|
line.word 0x00 "PPC_PCFGR186,Pin Configuration Register 186"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x174))&0x9000)==0x1000)
|
|
group.word 0x174++0x01
|
|
line.word 0x00 "PPC_PCFGR186,Pin Configuration Register 186"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x174++0x01
|
|
line.word 0x00 "PPC_PCFGR186,Pin Configuration Register 186"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x176))&0x9000)==0x9000)
|
|
group.word 0x176++0x01
|
|
line.word 0x00 "PPC_PCFGR187,Pin Configuration Register 187"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x176))&0x9000)==0x8000)
|
|
group.word 0x176++0x01
|
|
line.word 0x00 "PPC_PCFGR187,Pin Configuration Register 187"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x176))&0x9000)==0x1000)
|
|
group.word 0x176++0x01
|
|
line.word 0x00 "PPC_PCFGR187,Pin Configuration Register 187"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x176++0x01
|
|
line.word 0x00 "PPC_PCFGR187,Pin Configuration Register 187"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x178))&0x9000)==0x9000)
|
|
group.word 0x178++0x01
|
|
line.word 0x00 "PPC_PCFGR188,Pin Configuration Register 188"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x178))&0x9000)==0x8000)
|
|
group.word 0x178++0x01
|
|
line.word 0x00 "PPC_PCFGR188,Pin Configuration Register 188"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x178))&0x9000)==0x1000)
|
|
group.word 0x178++0x01
|
|
line.word 0x00 "PPC_PCFGR188,Pin Configuration Register 188"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x178++0x01
|
|
line.word 0x00 "PPC_PCFGR188,Pin Configuration Register 188"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x17A))&0x9000)==0x9000)
|
|
group.word 0x17A++0x01
|
|
line.word 0x00 "PPC_PCFGR189,Pin Configuration Register 189"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x17A))&0x9000)==0x8000)
|
|
group.word 0x17A++0x01
|
|
line.word 0x00 "PPC_PCFGR189,Pin Configuration Register 189"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x17A))&0x9000)==0x1000)
|
|
group.word 0x17A++0x01
|
|
line.word 0x00 "PPC_PCFGR189,Pin Configuration Register 189"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x17A++0x01
|
|
line.word 0x00 "PPC_PCFGR189,Pin Configuration Register 189"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x17C))&0x9000)==0x9000)
|
|
group.word 0x17C++0x01
|
|
line.word 0x00 "PPC_PCFGR190,Pin Configuration Register 190"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x17C))&0x9000)==0x8000)
|
|
group.word 0x17C++0x01
|
|
line.word 0x00 "PPC_PCFGR190,Pin Configuration Register 190"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x17C))&0x9000)==0x1000)
|
|
group.word 0x17C++0x01
|
|
line.word 0x00 "PPC_PCFGR190,Pin Configuration Register 190"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x17C++0x01
|
|
line.word 0x00 "PPC_PCFGR190,Pin Configuration Register 190"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x17E))&0x9000)==0x9000)
|
|
group.word 0x17E++0x01
|
|
line.word 0x00 "PPC_PCFGR191,Pin Configuration Register 191"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x17E))&0x9000)==0x8000)
|
|
group.word 0x17E++0x01
|
|
line.word 0x00 "PPC_PCFGR191,Pin Configuration Register 191"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x17E))&0x9000)==0x1000)
|
|
group.word 0x17E++0x01
|
|
line.word 0x00 "PPC_PCFGR191,Pin Configuration Register 191"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x17E++0x01
|
|
line.word 0x00 "PPC_PCFGR191,Pin Configuration Register 191"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x180))&0x9000)==0x9000)
|
|
group.word 0x180++0x01
|
|
line.word 0x00 "PPC_PCFGR192,Pin Configuration Register 192"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x180))&0x9000)==0x8000)
|
|
group.word 0x180++0x01
|
|
line.word 0x00 "PPC_PCFGR192,Pin Configuration Register 192"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x180))&0x9000)==0x1000)
|
|
group.word 0x180++0x01
|
|
line.word 0x00 "PPC_PCFGR192,Pin Configuration Register 192"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x180++0x01
|
|
line.word 0x00 "PPC_PCFGR192,Pin Configuration Register 192"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x182))&0x9000)==0x9000)
|
|
group.word 0x182++0x01
|
|
line.word 0x00 "PPC_PCFGR193,Pin Configuration Register 193"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x182))&0x9000)==0x8000)
|
|
group.word 0x182++0x01
|
|
line.word 0x00 "PPC_PCFGR193,Pin Configuration Register 193"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x182))&0x9000)==0x1000)
|
|
group.word 0x182++0x01
|
|
line.word 0x00 "PPC_PCFGR193,Pin Configuration Register 193"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x182++0x01
|
|
line.word 0x00 "PPC_PCFGR193,Pin Configuration Register 193"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x184))&0x9000)==0x9000)
|
|
group.word 0x184++0x01
|
|
line.word 0x00 "PPC_PCFGR194,Pin Configuration Register 194"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x184))&0x9000)==0x8000)
|
|
group.word 0x184++0x01
|
|
line.word 0x00 "PPC_PCFGR194,Pin Configuration Register 194"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x184))&0x9000)==0x1000)
|
|
group.word 0x184++0x01
|
|
line.word 0x00 "PPC_PCFGR194,Pin Configuration Register 194"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x184++0x01
|
|
line.word 0x00 "PPC_PCFGR194,Pin Configuration Register 194"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x186))&0x9000)==0x9000)
|
|
group.word 0x186++0x01
|
|
line.word 0x00 "PPC_PCFGR195,Pin Configuration Register 195"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x186))&0x9000)==0x8000)
|
|
group.word 0x186++0x01
|
|
line.word 0x00 "PPC_PCFGR195,Pin Configuration Register 195"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x186))&0x9000)==0x1000)
|
|
group.word 0x186++0x01
|
|
line.word 0x00 "PPC_PCFGR195,Pin Configuration Register 195"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x186++0x01
|
|
line.word 0x00 "PPC_PCFGR195,Pin Configuration Register 195"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x188))&0x9000)==0x9000)
|
|
group.word 0x188++0x01
|
|
line.word 0x00 "PPC_PCFGR196,Pin Configuration Register 196"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x188))&0x9000)==0x8000)
|
|
group.word 0x188++0x01
|
|
line.word 0x00 "PPC_PCFGR196,Pin Configuration Register 196"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x188))&0x9000)==0x1000)
|
|
group.word 0x188++0x01
|
|
line.word 0x00 "PPC_PCFGR196,Pin Configuration Register 196"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x188++0x01
|
|
line.word 0x00 "PPC_PCFGR196,Pin Configuration Register 196"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x18A))&0x9000)==0x9000)
|
|
group.word 0x18A++0x01
|
|
line.word 0x00 "PPC_PCFGR197,Pin Configuration Register 197"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x18A))&0x9000)==0x8000)
|
|
group.word 0x18A++0x01
|
|
line.word 0x00 "PPC_PCFGR197,Pin Configuration Register 197"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x18A))&0x9000)==0x1000)
|
|
group.word 0x18A++0x01
|
|
line.word 0x00 "PPC_PCFGR197,Pin Configuration Register 197"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x18A++0x01
|
|
line.word 0x00 "PPC_PCFGR197,Pin Configuration Register 197"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x18C))&0x9000)==0x9000)
|
|
group.word 0x18C++0x01
|
|
line.word 0x00 "PPC_PCFGR198,Pin Configuration Register 198"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x18C))&0x9000)==0x8000)
|
|
group.word 0x18C++0x01
|
|
line.word 0x00 "PPC_PCFGR198,Pin Configuration Register 198"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x18C))&0x9000)==0x1000)
|
|
group.word 0x18C++0x01
|
|
line.word 0x00 "PPC_PCFGR198,Pin Configuration Register 198"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x18C++0x01
|
|
line.word 0x00 "PPC_PCFGR198,Pin Configuration Register 198"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x18E))&0x9000)==0x9000)
|
|
group.word 0x18E++0x01
|
|
line.word 0x00 "PPC_PCFGR199,Pin Configuration Register 199"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x18E))&0x9000)==0x8000)
|
|
group.word 0x18E++0x01
|
|
line.word 0x00 "PPC_PCFGR199,Pin Configuration Register 199"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x18E))&0x9000)==0x1000)
|
|
group.word 0x18E++0x01
|
|
line.word 0x00 "PPC_PCFGR199,Pin Configuration Register 199"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x18E++0x01
|
|
line.word 0x00 "PPC_PCFGR199,Pin Configuration Register 199"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x190))&0x9000)==0x9000)
|
|
group.word 0x190++0x01
|
|
line.word 0x00 "PPC_PCFGR200,Pin Configuration Register 200"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x190))&0x9000)==0x8000)
|
|
group.word 0x190++0x01
|
|
line.word 0x00 "PPC_PCFGR200,Pin Configuration Register 200"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x190))&0x9000)==0x1000)
|
|
group.word 0x190++0x01
|
|
line.word 0x00 "PPC_PCFGR200,Pin Configuration Register 200"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x190++0x01
|
|
line.word 0x00 "PPC_PCFGR200,Pin Configuration Register 200"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x192))&0x9000)==0x9000)
|
|
group.word 0x192++0x01
|
|
line.word 0x00 "PPC_PCFGR201,Pin Configuration Register 201"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x192))&0x9000)==0x8000)
|
|
group.word 0x192++0x01
|
|
line.word 0x00 "PPC_PCFGR201,Pin Configuration Register 201"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x192))&0x9000)==0x1000)
|
|
group.word 0x192++0x01
|
|
line.word 0x00 "PPC_PCFGR201,Pin Configuration Register 201"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x192++0x01
|
|
line.word 0x00 "PPC_PCFGR201,Pin Configuration Register 201"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x194))&0x9000)==0x9000)
|
|
group.word 0x194++0x01
|
|
line.word 0x00 "PPC_PCFGR202,Pin Configuration Register 202"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x194))&0x9000)==0x8000)
|
|
group.word 0x194++0x01
|
|
line.word 0x00 "PPC_PCFGR202,Pin Configuration Register 202"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x194))&0x9000)==0x1000)
|
|
group.word 0x194++0x01
|
|
line.word 0x00 "PPC_PCFGR202,Pin Configuration Register 202"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x194++0x01
|
|
line.word 0x00 "PPC_PCFGR202,Pin Configuration Register 202"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x196))&0x9000)==0x9000)
|
|
group.word 0x196++0x01
|
|
line.word 0x00 "PPC_PCFGR203,Pin Configuration Register 203"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x196))&0x9000)==0x8000)
|
|
group.word 0x196++0x01
|
|
line.word 0x00 "PPC_PCFGR203,Pin Configuration Register 203"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x196))&0x9000)==0x1000)
|
|
group.word 0x196++0x01
|
|
line.word 0x00 "PPC_PCFGR203,Pin Configuration Register 203"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x196++0x01
|
|
line.word 0x00 "PPC_PCFGR203,Pin Configuration Register 203"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x198))&0x9000)==0x9000)
|
|
group.word 0x198++0x01
|
|
line.word 0x00 "PPC_PCFGR204,Pin Configuration Register 204"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x198))&0x9000)==0x8000)
|
|
group.word 0x198++0x01
|
|
line.word 0x00 "PPC_PCFGR204,Pin Configuration Register 204"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x198))&0x9000)==0x1000)
|
|
group.word 0x198++0x01
|
|
line.word 0x00 "PPC_PCFGR204,Pin Configuration Register 204"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x198++0x01
|
|
line.word 0x00 "PPC_PCFGR204,Pin Configuration Register 204"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x19A))&0x9000)==0x9000)
|
|
group.word 0x19A++0x01
|
|
line.word 0x00 "PPC_PCFGR205,Pin Configuration Register 205"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x19A))&0x9000)==0x8000)
|
|
group.word 0x19A++0x01
|
|
line.word 0x00 "PPC_PCFGR205,Pin Configuration Register 205"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x19A))&0x9000)==0x1000)
|
|
group.word 0x19A++0x01
|
|
line.word 0x00 "PPC_PCFGR205,Pin Configuration Register 205"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x19A++0x01
|
|
line.word 0x00 "PPC_PCFGR205,Pin Configuration Register 205"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x19C))&0x9000)==0x9000)
|
|
group.word 0x19C++0x01
|
|
line.word 0x00 "PPC_PCFGR206,Pin Configuration Register 206"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x19C))&0x9000)==0x8000)
|
|
group.word 0x19C++0x01
|
|
line.word 0x00 "PPC_PCFGR206,Pin Configuration Register 206"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x19C))&0x9000)==0x1000)
|
|
group.word 0x19C++0x01
|
|
line.word 0x00 "PPC_PCFGR206,Pin Configuration Register 206"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x19C++0x01
|
|
line.word 0x00 "PPC_PCFGR206,Pin Configuration Register 206"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x19E))&0x9000)==0x9000)
|
|
group.word 0x19E++0x01
|
|
line.word 0x00 "PPC_PCFGR207,Pin Configuration Register 207"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x19E))&0x9000)==0x8000)
|
|
group.word 0x19E++0x01
|
|
line.word 0x00 "PPC_PCFGR207,Pin Configuration Register 207"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x19E))&0x9000)==0x1000)
|
|
group.word 0x19E++0x01
|
|
line.word 0x00 "PPC_PCFGR207,Pin Configuration Register 207"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x19E++0x01
|
|
line.word 0x00 "PPC_PCFGR207,Pin Configuration Register 207"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1A0))&0x9000)==0x9000)
|
|
group.word 0x1A0++0x01
|
|
line.word 0x00 "PPC_PCFGR208,Pin Configuration Register 208"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1A0))&0x9000)==0x8000)
|
|
group.word 0x1A0++0x01
|
|
line.word 0x00 "PPC_PCFGR208,Pin Configuration Register 208"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1A0))&0x9000)==0x1000)
|
|
group.word 0x1A0++0x01
|
|
line.word 0x00 "PPC_PCFGR208,Pin Configuration Register 208"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1A0++0x01
|
|
line.word 0x00 "PPC_PCFGR208,Pin Configuration Register 208"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1A2))&0x9000)==0x9000)
|
|
group.word 0x1A2++0x01
|
|
line.word 0x00 "PPC_PCFGR209,Pin Configuration Register 209"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1A2))&0x9000)==0x8000)
|
|
group.word 0x1A2++0x01
|
|
line.word 0x00 "PPC_PCFGR209,Pin Configuration Register 209"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1A2))&0x9000)==0x1000)
|
|
group.word 0x1A2++0x01
|
|
line.word 0x00 "PPC_PCFGR209,Pin Configuration Register 209"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1A2++0x01
|
|
line.word 0x00 "PPC_PCFGR209,Pin Configuration Register 209"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1A4))&0x9000)==0x9000)
|
|
group.word 0x1A4++0x01
|
|
line.word 0x00 "PPC_PCFGR210,Pin Configuration Register 210"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1A4))&0x9000)==0x8000)
|
|
group.word 0x1A4++0x01
|
|
line.word 0x00 "PPC_PCFGR210,Pin Configuration Register 210"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1A4))&0x9000)==0x1000)
|
|
group.word 0x1A4++0x01
|
|
line.word 0x00 "PPC_PCFGR210,Pin Configuration Register 210"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1A4++0x01
|
|
line.word 0x00 "PPC_PCFGR210,Pin Configuration Register 210"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1A6))&0x9000)==0x9000)
|
|
group.word 0x1A6++0x01
|
|
line.word 0x00 "PPC_PCFGR211,Pin Configuration Register 211"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1A6))&0x9000)==0x8000)
|
|
group.word 0x1A6++0x01
|
|
line.word 0x00 "PPC_PCFGR211,Pin Configuration Register 211"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1A6))&0x9000)==0x1000)
|
|
group.word 0x1A6++0x01
|
|
line.word 0x00 "PPC_PCFGR211,Pin Configuration Register 211"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1A6++0x01
|
|
line.word 0x00 "PPC_PCFGR211,Pin Configuration Register 211"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1A8))&0x9000)==0x9000)
|
|
group.word 0x1A8++0x01
|
|
line.word 0x00 "PPC_PCFGR212,Pin Configuration Register 212"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1A8))&0x9000)==0x8000)
|
|
group.word 0x1A8++0x01
|
|
line.word 0x00 "PPC_PCFGR212,Pin Configuration Register 212"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1A8))&0x9000)==0x1000)
|
|
group.word 0x1A8++0x01
|
|
line.word 0x00 "PPC_PCFGR212,Pin Configuration Register 212"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1A8++0x01
|
|
line.word 0x00 "PPC_PCFGR212,Pin Configuration Register 212"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1AA))&0x9000)==0x9000)
|
|
group.word 0x1AA++0x01
|
|
line.word 0x00 "PPC_PCFGR213,Pin Configuration Register 213"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1AA))&0x9000)==0x8000)
|
|
group.word 0x1AA++0x01
|
|
line.word 0x00 "PPC_PCFGR213,Pin Configuration Register 213"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1AA))&0x9000)==0x1000)
|
|
group.word 0x1AA++0x01
|
|
line.word 0x00 "PPC_PCFGR213,Pin Configuration Register 213"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1AA++0x01
|
|
line.word 0x00 "PPC_PCFGR213,Pin Configuration Register 213"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1AC))&0x9000)==0x9000)
|
|
group.word 0x1AC++0x01
|
|
line.word 0x00 "PPC_PCFGR214,Pin Configuration Register 214"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1AC))&0x9000)==0x8000)
|
|
group.word 0x1AC++0x01
|
|
line.word 0x00 "PPC_PCFGR214,Pin Configuration Register 214"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1AC))&0x9000)==0x1000)
|
|
group.word 0x1AC++0x01
|
|
line.word 0x00 "PPC_PCFGR214,Pin Configuration Register 214"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1AC++0x01
|
|
line.word 0x00 "PPC_PCFGR214,Pin Configuration Register 214"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1AE))&0x9000)==0x9000)
|
|
group.word 0x1AE++0x01
|
|
line.word 0x00 "PPC_PCFGR215,Pin Configuration Register 215"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1AE))&0x9000)==0x8000)
|
|
group.word 0x1AE++0x01
|
|
line.word 0x00 "PPC_PCFGR215,Pin Configuration Register 215"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1AE))&0x9000)==0x1000)
|
|
group.word 0x1AE++0x01
|
|
line.word 0x00 "PPC_PCFGR215,Pin Configuration Register 215"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1AE++0x01
|
|
line.word 0x00 "PPC_PCFGR215,Pin Configuration Register 215"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1B0))&0x9000)==0x9000)
|
|
group.word 0x1B0++0x01
|
|
line.word 0x00 "PPC_PCFGR216,Pin Configuration Register 216"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1B0))&0x9000)==0x8000)
|
|
group.word 0x1B0++0x01
|
|
line.word 0x00 "PPC_PCFGR216,Pin Configuration Register 216"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1B0))&0x9000)==0x1000)
|
|
group.word 0x1B0++0x01
|
|
line.word 0x00 "PPC_PCFGR216,Pin Configuration Register 216"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1B0++0x01
|
|
line.word 0x00 "PPC_PCFGR216,Pin Configuration Register 216"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1B2))&0x9000)==0x9000)
|
|
group.word 0x1B2++0x01
|
|
line.word 0x00 "PPC_PCFGR217,Pin Configuration Register 217"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1B2))&0x9000)==0x8000)
|
|
group.word 0x1B2++0x01
|
|
line.word 0x00 "PPC_PCFGR217,Pin Configuration Register 217"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1B2))&0x9000)==0x1000)
|
|
group.word 0x1B2++0x01
|
|
line.word 0x00 "PPC_PCFGR217,Pin Configuration Register 217"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1B2++0x01
|
|
line.word 0x00 "PPC_PCFGR217,Pin Configuration Register 217"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1B4))&0x9000)==0x9000)
|
|
group.word 0x1B4++0x01
|
|
line.word 0x00 "PPC_PCFGR218,Pin Configuration Register 218"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1B4))&0x9000)==0x8000)
|
|
group.word 0x1B4++0x01
|
|
line.word 0x00 "PPC_PCFGR218,Pin Configuration Register 218"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1B4))&0x9000)==0x1000)
|
|
group.word 0x1B4++0x01
|
|
line.word 0x00 "PPC_PCFGR218,Pin Configuration Register 218"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1B4++0x01
|
|
line.word 0x00 "PPC_PCFGR218,Pin Configuration Register 218"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1B6))&0x9000)==0x9000)
|
|
group.word 0x1B6++0x01
|
|
line.word 0x00 "PPC_PCFGR219,Pin Configuration Register 219"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1B6))&0x9000)==0x8000)
|
|
group.word 0x1B6++0x01
|
|
line.word 0x00 "PPC_PCFGR219,Pin Configuration Register 219"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1B6))&0x9000)==0x1000)
|
|
group.word 0x1B6++0x01
|
|
line.word 0x00 "PPC_PCFGR219,Pin Configuration Register 219"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1B6++0x01
|
|
line.word 0x00 "PPC_PCFGR219,Pin Configuration Register 219"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1B8))&0x9000)==0x9000)
|
|
group.word 0x1B8++0x01
|
|
line.word 0x00 "PPC_PCFGR220,Pin Configuration Register 220"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1B8))&0x9000)==0x8000)
|
|
group.word 0x1B8++0x01
|
|
line.word 0x00 "PPC_PCFGR220,Pin Configuration Register 220"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1B8))&0x9000)==0x1000)
|
|
group.word 0x1B8++0x01
|
|
line.word 0x00 "PPC_PCFGR220,Pin Configuration Register 220"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1B8++0x01
|
|
line.word 0x00 "PPC_PCFGR220,Pin Configuration Register 220"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1BA))&0x9000)==0x9000)
|
|
group.word 0x1BA++0x01
|
|
line.word 0x00 "PPC_PCFGR221,Pin Configuration Register 221"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1BA))&0x9000)==0x8000)
|
|
group.word 0x1BA++0x01
|
|
line.word 0x00 "PPC_PCFGR221,Pin Configuration Register 221"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1BA))&0x9000)==0x1000)
|
|
group.word 0x1BA++0x01
|
|
line.word 0x00 "PPC_PCFGR221,Pin Configuration Register 221"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1BA++0x01
|
|
line.word 0x00 "PPC_PCFGR221,Pin Configuration Register 221"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1BC))&0x9000)==0x9000)
|
|
group.word 0x1BC++0x01
|
|
line.word 0x00 "PPC_PCFGR222,Pin Configuration Register 222"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1BC))&0x9000)==0x8000)
|
|
group.word 0x1BC++0x01
|
|
line.word 0x00 "PPC_PCFGR222,Pin Configuration Register 222"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1BC))&0x9000)==0x1000)
|
|
group.word 0x1BC++0x01
|
|
line.word 0x00 "PPC_PCFGR222,Pin Configuration Register 222"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1BC++0x01
|
|
line.word 0x00 "PPC_PCFGR222,Pin Configuration Register 222"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1BE))&0x9000)==0x9000)
|
|
group.word 0x1BE++0x01
|
|
line.word 0x00 "PPC_PCFGR223,Pin Configuration Register 223"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1BE))&0x9000)==0x8000)
|
|
group.word 0x1BE++0x01
|
|
line.word 0x00 "PPC_PCFGR223,Pin Configuration Register 223"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1BE))&0x9000)==0x1000)
|
|
group.word 0x1BE++0x01
|
|
line.word 0x00 "PPC_PCFGR223,Pin Configuration Register 223"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1BE++0x01
|
|
line.word 0x00 "PPC_PCFGR223,Pin Configuration Register 223"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1C0))&0x9000)==0x9000)
|
|
group.word 0x1C0++0x01
|
|
line.word 0x00 "PPC_PCFGR224,Pin Configuration Register 224"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1C0))&0x9000)==0x8000)
|
|
group.word 0x1C0++0x01
|
|
line.word 0x00 "PPC_PCFGR224,Pin Configuration Register 224"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1C0))&0x9000)==0x1000)
|
|
group.word 0x1C0++0x01
|
|
line.word 0x00 "PPC_PCFGR224,Pin Configuration Register 224"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1C0++0x01
|
|
line.word 0x00 "PPC_PCFGR224,Pin Configuration Register 224"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1C2))&0x9000)==0x9000)
|
|
group.word 0x1C2++0x01
|
|
line.word 0x00 "PPC_PCFGR225,Pin Configuration Register 225"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1C2))&0x9000)==0x8000)
|
|
group.word 0x1C2++0x01
|
|
line.word 0x00 "PPC_PCFGR225,Pin Configuration Register 225"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1C2))&0x9000)==0x1000)
|
|
group.word 0x1C2++0x01
|
|
line.word 0x00 "PPC_PCFGR225,Pin Configuration Register 225"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1C2++0x01
|
|
line.word 0x00 "PPC_PCFGR225,Pin Configuration Register 225"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1C4))&0x9000)==0x9000)
|
|
group.word 0x1C4++0x01
|
|
line.word 0x00 "PPC_PCFGR226,Pin Configuration Register 226"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1C4))&0x9000)==0x8000)
|
|
group.word 0x1C4++0x01
|
|
line.word 0x00 "PPC_PCFGR226,Pin Configuration Register 226"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1C4))&0x9000)==0x1000)
|
|
group.word 0x1C4++0x01
|
|
line.word 0x00 "PPC_PCFGR226,Pin Configuration Register 226"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1C4++0x01
|
|
line.word 0x00 "PPC_PCFGR226,Pin Configuration Register 226"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1C6))&0x9000)==0x9000)
|
|
group.word 0x1C6++0x01
|
|
line.word 0x00 "PPC_PCFGR227,Pin Configuration Register 227"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1C6))&0x9000)==0x8000)
|
|
group.word 0x1C6++0x01
|
|
line.word 0x00 "PPC_PCFGR227,Pin Configuration Register 227"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1C6))&0x9000)==0x1000)
|
|
group.word 0x1C6++0x01
|
|
line.word 0x00 "PPC_PCFGR227,Pin Configuration Register 227"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1C6++0x01
|
|
line.word 0x00 "PPC_PCFGR227,Pin Configuration Register 227"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1C8))&0x9000)==0x9000)
|
|
group.word 0x1C8++0x01
|
|
line.word 0x00 "PPC_PCFGR228,Pin Configuration Register 228"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1C8))&0x9000)==0x8000)
|
|
group.word 0x1C8++0x01
|
|
line.word 0x00 "PPC_PCFGR228,Pin Configuration Register 228"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1C8))&0x9000)==0x1000)
|
|
group.word 0x1C8++0x01
|
|
line.word 0x00 "PPC_PCFGR228,Pin Configuration Register 228"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1C8++0x01
|
|
line.word 0x00 "PPC_PCFGR228,Pin Configuration Register 228"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1CA))&0x9000)==0x9000)
|
|
group.word 0x1CA++0x01
|
|
line.word 0x00 "PPC_PCFGR229,Pin Configuration Register 229"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1CA))&0x9000)==0x8000)
|
|
group.word 0x1CA++0x01
|
|
line.word 0x00 "PPC_PCFGR229,Pin Configuration Register 229"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1CA))&0x9000)==0x1000)
|
|
group.word 0x1CA++0x01
|
|
line.word 0x00 "PPC_PCFGR229,Pin Configuration Register 229"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1CA++0x01
|
|
line.word 0x00 "PPC_PCFGR229,Pin Configuration Register 229"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1CC))&0x9000)==0x9000)
|
|
group.word 0x1CC++0x01
|
|
line.word 0x00 "PPC_PCFGR230,Pin Configuration Register 230"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1CC))&0x9000)==0x8000)
|
|
group.word 0x1CC++0x01
|
|
line.word 0x00 "PPC_PCFGR230,Pin Configuration Register 230"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1CC))&0x9000)==0x1000)
|
|
group.word 0x1CC++0x01
|
|
line.word 0x00 "PPC_PCFGR230,Pin Configuration Register 230"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1CC++0x01
|
|
line.word 0x00 "PPC_PCFGR230,Pin Configuration Register 230"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1CE))&0x9000)==0x9000)
|
|
group.word 0x1CE++0x01
|
|
line.word 0x00 "PPC_PCFGR231,Pin Configuration Register 231"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1CE))&0x9000)==0x8000)
|
|
group.word 0x1CE++0x01
|
|
line.word 0x00 "PPC_PCFGR231,Pin Configuration Register 231"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1CE))&0x9000)==0x1000)
|
|
group.word 0x1CE++0x01
|
|
line.word 0x00 "PPC_PCFGR231,Pin Configuration Register 231"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1CE++0x01
|
|
line.word 0x00 "PPC_PCFGR231,Pin Configuration Register 231"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1D0))&0x9000)==0x9000)
|
|
group.word 0x1D0++0x01
|
|
line.word 0x00 "PPC_PCFGR232,Pin Configuration Register 232"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1D0))&0x9000)==0x8000)
|
|
group.word 0x1D0++0x01
|
|
line.word 0x00 "PPC_PCFGR232,Pin Configuration Register 232"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1D0))&0x9000)==0x1000)
|
|
group.word 0x1D0++0x01
|
|
line.word 0x00 "PPC_PCFGR232,Pin Configuration Register 232"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1D0++0x01
|
|
line.word 0x00 "PPC_PCFGR232,Pin Configuration Register 232"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1D2))&0x9000)==0x9000)
|
|
group.word 0x1D2++0x01
|
|
line.word 0x00 "PPC_PCFGR233,Pin Configuration Register 233"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1D2))&0x9000)==0x8000)
|
|
group.word 0x1D2++0x01
|
|
line.word 0x00 "PPC_PCFGR233,Pin Configuration Register 233"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1D2))&0x9000)==0x1000)
|
|
group.word 0x1D2++0x01
|
|
line.word 0x00 "PPC_PCFGR233,Pin Configuration Register 233"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1D2++0x01
|
|
line.word 0x00 "PPC_PCFGR233,Pin Configuration Register 233"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1D4))&0x9000)==0x9000)
|
|
group.word 0x1D4++0x01
|
|
line.word 0x00 "PPC_PCFGR234,Pin Configuration Register 234"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1D4))&0x9000)==0x8000)
|
|
group.word 0x1D4++0x01
|
|
line.word 0x00 "PPC_PCFGR234,Pin Configuration Register 234"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1D4))&0x9000)==0x1000)
|
|
group.word 0x1D4++0x01
|
|
line.word 0x00 "PPC_PCFGR234,Pin Configuration Register 234"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1D4++0x01
|
|
line.word 0x00 "PPC_PCFGR234,Pin Configuration Register 234"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1D6))&0x9000)==0x9000)
|
|
group.word 0x1D6++0x01
|
|
line.word 0x00 "PPC_PCFGR235,Pin Configuration Register 235"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1D6))&0x9000)==0x8000)
|
|
group.word 0x1D6++0x01
|
|
line.word 0x00 "PPC_PCFGR235,Pin Configuration Register 235"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1D6))&0x9000)==0x1000)
|
|
group.word 0x1D6++0x01
|
|
line.word 0x00 "PPC_PCFGR235,Pin Configuration Register 235"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1D6++0x01
|
|
line.word 0x00 "PPC_PCFGR235,Pin Configuration Register 235"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1D8))&0x9000)==0x9000)
|
|
group.word 0x1D8++0x01
|
|
line.word 0x00 "PPC_PCFGR236,Pin Configuration Register 236"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1D8))&0x9000)==0x8000)
|
|
group.word 0x1D8++0x01
|
|
line.word 0x00 "PPC_PCFGR236,Pin Configuration Register 236"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1D8))&0x9000)==0x1000)
|
|
group.word 0x1D8++0x01
|
|
line.word 0x00 "PPC_PCFGR236,Pin Configuration Register 236"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1D8++0x01
|
|
line.word 0x00 "PPC_PCFGR236,Pin Configuration Register 236"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1DA))&0x9000)==0x9000)
|
|
group.word 0x1DA++0x01
|
|
line.word 0x00 "PPC_PCFGR237,Pin Configuration Register 237"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1DA))&0x9000)==0x8000)
|
|
group.word 0x1DA++0x01
|
|
line.word 0x00 "PPC_PCFGR237,Pin Configuration Register 237"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1DA))&0x9000)==0x1000)
|
|
group.word 0x1DA++0x01
|
|
line.word 0x00 "PPC_PCFGR237,Pin Configuration Register 237"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1DA++0x01
|
|
line.word 0x00 "PPC_PCFGR237,Pin Configuration Register 237"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1DC))&0x9000)==0x9000)
|
|
group.word 0x1DC++0x01
|
|
line.word 0x00 "PPC_PCFGR238,Pin Configuration Register 238"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1DC))&0x9000)==0x8000)
|
|
group.word 0x1DC++0x01
|
|
line.word 0x00 "PPC_PCFGR238,Pin Configuration Register 238"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1DC))&0x9000)==0x1000)
|
|
group.word 0x1DC++0x01
|
|
line.word 0x00 "PPC_PCFGR238,Pin Configuration Register 238"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1DC++0x01
|
|
line.word 0x00 "PPC_PCFGR238,Pin Configuration Register 238"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1DE))&0x9000)==0x9000)
|
|
group.word 0x1DE++0x01
|
|
line.word 0x00 "PPC_PCFGR239,Pin Configuration Register 239"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1DE))&0x9000)==0x8000)
|
|
group.word 0x1DE++0x01
|
|
line.word 0x00 "PPC_PCFGR239,Pin Configuration Register 239"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1DE))&0x9000)==0x1000)
|
|
group.word 0x1DE++0x01
|
|
line.word 0x00 "PPC_PCFGR239,Pin Configuration Register 239"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1DE++0x01
|
|
line.word 0x00 "PPC_PCFGR239,Pin Configuration Register 239"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1E0))&0x9000)==0x9000)
|
|
group.word 0x1E0++0x01
|
|
line.word 0x00 "PPC_PCFGR240,Pin Configuration Register 240"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1E0))&0x9000)==0x8000)
|
|
group.word 0x1E0++0x01
|
|
line.word 0x00 "PPC_PCFGR240,Pin Configuration Register 240"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1E0))&0x9000)==0x1000)
|
|
group.word 0x1E0++0x01
|
|
line.word 0x00 "PPC_PCFGR240,Pin Configuration Register 240"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1E0++0x01
|
|
line.word 0x00 "PPC_PCFGR240,Pin Configuration Register 240"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1E2))&0x9000)==0x9000)
|
|
group.word 0x1E2++0x01
|
|
line.word 0x00 "PPC_PCFGR241,Pin Configuration Register 241"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1E2))&0x9000)==0x8000)
|
|
group.word 0x1E2++0x01
|
|
line.word 0x00 "PPC_PCFGR241,Pin Configuration Register 241"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1E2))&0x9000)==0x1000)
|
|
group.word 0x1E2++0x01
|
|
line.word 0x00 "PPC_PCFGR241,Pin Configuration Register 241"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1E2++0x01
|
|
line.word 0x00 "PPC_PCFGR241,Pin Configuration Register 241"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1E4))&0x9000)==0x9000)
|
|
group.word 0x1E4++0x01
|
|
line.word 0x00 "PPC_PCFGR242,Pin Configuration Register 242"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1E4))&0x9000)==0x8000)
|
|
group.word 0x1E4++0x01
|
|
line.word 0x00 "PPC_PCFGR242,Pin Configuration Register 242"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1E4))&0x9000)==0x1000)
|
|
group.word 0x1E4++0x01
|
|
line.word 0x00 "PPC_PCFGR242,Pin Configuration Register 242"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1E4++0x01
|
|
line.word 0x00 "PPC_PCFGR242,Pin Configuration Register 242"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1E6))&0x9000)==0x9000)
|
|
group.word 0x1E6++0x01
|
|
line.word 0x00 "PPC_PCFGR243,Pin Configuration Register 243"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1E6))&0x9000)==0x8000)
|
|
group.word 0x1E6++0x01
|
|
line.word 0x00 "PPC_PCFGR243,Pin Configuration Register 243"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1E6))&0x9000)==0x1000)
|
|
group.word 0x1E6++0x01
|
|
line.word 0x00 "PPC_PCFGR243,Pin Configuration Register 243"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1E6++0x01
|
|
line.word 0x00 "PPC_PCFGR243,Pin Configuration Register 243"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1E8))&0x9000)==0x9000)
|
|
group.word 0x1E8++0x01
|
|
line.word 0x00 "PPC_PCFGR244,Pin Configuration Register 244"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1E8))&0x9000)==0x8000)
|
|
group.word 0x1E8++0x01
|
|
line.word 0x00 "PPC_PCFGR244,Pin Configuration Register 244"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1E8))&0x9000)==0x1000)
|
|
group.word 0x1E8++0x01
|
|
line.word 0x00 "PPC_PCFGR244,Pin Configuration Register 244"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1E8++0x01
|
|
line.word 0x00 "PPC_PCFGR244,Pin Configuration Register 244"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1EA))&0x9000)==0x9000)
|
|
group.word 0x1EA++0x01
|
|
line.word 0x00 "PPC_PCFGR245,Pin Configuration Register 245"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1EA))&0x9000)==0x8000)
|
|
group.word 0x1EA++0x01
|
|
line.word 0x00 "PPC_PCFGR245,Pin Configuration Register 245"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1EA))&0x9000)==0x1000)
|
|
group.word 0x1EA++0x01
|
|
line.word 0x00 "PPC_PCFGR245,Pin Configuration Register 245"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1EA++0x01
|
|
line.word 0x00 "PPC_PCFGR245,Pin Configuration Register 245"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1EC))&0x9000)==0x9000)
|
|
group.word 0x1EC++0x01
|
|
line.word 0x00 "PPC_PCFGR246,Pin Configuration Register 246"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1EC))&0x9000)==0x8000)
|
|
group.word 0x1EC++0x01
|
|
line.word 0x00 "PPC_PCFGR246,Pin Configuration Register 246"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1EC))&0x9000)==0x1000)
|
|
group.word 0x1EC++0x01
|
|
line.word 0x00 "PPC_PCFGR246,Pin Configuration Register 246"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1EC++0x01
|
|
line.word 0x00 "PPC_PCFGR246,Pin Configuration Register 246"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1EE))&0x9000)==0x9000)
|
|
group.word 0x1EE++0x01
|
|
line.word 0x00 "PPC_PCFGR247,Pin Configuration Register 247"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1EE))&0x9000)==0x8000)
|
|
group.word 0x1EE++0x01
|
|
line.word 0x00 "PPC_PCFGR247,Pin Configuration Register 247"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1EE))&0x9000)==0x1000)
|
|
group.word 0x1EE++0x01
|
|
line.word 0x00 "PPC_PCFGR247,Pin Configuration Register 247"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1EE++0x01
|
|
line.word 0x00 "PPC_PCFGR247,Pin Configuration Register 247"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1F0))&0x9000)==0x9000)
|
|
group.word 0x1F0++0x01
|
|
line.word 0x00 "PPC_PCFGR248,Pin Configuration Register 248"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1F0))&0x9000)==0x8000)
|
|
group.word 0x1F0++0x01
|
|
line.word 0x00 "PPC_PCFGR248,Pin Configuration Register 248"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1F0))&0x9000)==0x1000)
|
|
group.word 0x1F0++0x01
|
|
line.word 0x00 "PPC_PCFGR248,Pin Configuration Register 248"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1F0++0x01
|
|
line.word 0x00 "PPC_PCFGR248,Pin Configuration Register 248"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1F2))&0x9000)==0x9000)
|
|
group.word 0x1F2++0x01
|
|
line.word 0x00 "PPC_PCFGR249,Pin Configuration Register 249"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1F2))&0x9000)==0x8000)
|
|
group.word 0x1F2++0x01
|
|
line.word 0x00 "PPC_PCFGR249,Pin Configuration Register 249"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1F2))&0x9000)==0x1000)
|
|
group.word 0x1F2++0x01
|
|
line.word 0x00 "PPC_PCFGR249,Pin Configuration Register 249"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1F2++0x01
|
|
line.word 0x00 "PPC_PCFGR249,Pin Configuration Register 249"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1F4))&0x9000)==0x9000)
|
|
group.word 0x1F4++0x01
|
|
line.word 0x00 "PPC_PCFGR250,Pin Configuration Register 250"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1F4))&0x9000)==0x8000)
|
|
group.word 0x1F4++0x01
|
|
line.word 0x00 "PPC_PCFGR250,Pin Configuration Register 250"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1F4))&0x9000)==0x1000)
|
|
group.word 0x1F4++0x01
|
|
line.word 0x00 "PPC_PCFGR250,Pin Configuration Register 250"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1F4++0x01
|
|
line.word 0x00 "PPC_PCFGR250,Pin Configuration Register 250"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1F6))&0x9000)==0x9000)
|
|
group.word 0x1F6++0x01
|
|
line.word 0x00 "PPC_PCFGR251,Pin Configuration Register 251"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1F6))&0x9000)==0x8000)
|
|
group.word 0x1F6++0x01
|
|
line.word 0x00 "PPC_PCFGR251,Pin Configuration Register 251"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1F6))&0x9000)==0x1000)
|
|
group.word 0x1F6++0x01
|
|
line.word 0x00 "PPC_PCFGR251,Pin Configuration Register 251"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1F6++0x01
|
|
line.word 0x00 "PPC_PCFGR251,Pin Configuration Register 251"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1F8))&0x9000)==0x9000)
|
|
group.word 0x1F8++0x01
|
|
line.word 0x00 "PPC_PCFGR252,Pin Configuration Register 252"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1F8))&0x9000)==0x8000)
|
|
group.word 0x1F8++0x01
|
|
line.word 0x00 "PPC_PCFGR252,Pin Configuration Register 252"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1F8))&0x9000)==0x1000)
|
|
group.word 0x1F8++0x01
|
|
line.word 0x00 "PPC_PCFGR252,Pin Configuration Register 252"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1F8++0x01
|
|
line.word 0x00 "PPC_PCFGR252,Pin Configuration Register 252"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1FA))&0x9000)==0x9000)
|
|
group.word 0x1FA++0x01
|
|
line.word 0x00 "PPC_PCFGR253,Pin Configuration Register 253"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1FA))&0x9000)==0x8000)
|
|
group.word 0x1FA++0x01
|
|
line.word 0x00 "PPC_PCFGR253,Pin Configuration Register 253"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1FA))&0x9000)==0x1000)
|
|
group.word 0x1FA++0x01
|
|
line.word 0x00 "PPC_PCFGR253,Pin Configuration Register 253"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1FA++0x01
|
|
line.word 0x00 "PPC_PCFGR253,Pin Configuration Register 253"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1FC))&0x9000)==0x9000)
|
|
group.word 0x1FC++0x01
|
|
line.word 0x00 "PPC_PCFGR254,Pin Configuration Register 254"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1FC))&0x9000)==0x8000)
|
|
group.word 0x1FC++0x01
|
|
line.word 0x00 "PPC_PCFGR254,Pin Configuration Register 254"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1FC))&0x9000)==0x1000)
|
|
group.word 0x1FC++0x01
|
|
line.word 0x00 "PPC_PCFGR254,Pin Configuration Register 254"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1FC++0x01
|
|
line.word 0x00 "PPC_PCFGR254,Pin Configuration Register 254"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x1FE))&0x9000)==0x9000)
|
|
group.word 0x1FE++0x01
|
|
line.word 0x00 "PPC_PCFGR255,Pin Configuration Register 255"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1FE))&0x9000)==0x8000)
|
|
group.word 0x1FE++0x01
|
|
line.word 0x00 "PPC_PCFGR255,Pin Configuration Register 255"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x1FE))&0x9000)==0x1000)
|
|
group.word 0x1FE++0x01
|
|
line.word 0x00 "PPC_PCFGR255,Pin Configuration Register 255"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x1FE++0x01
|
|
line.word 0x00 "PPC_PCFGR255,Pin Configuration Register 255"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x200))&0x9000)==0x9000)
|
|
group.word 0x200++0x01
|
|
line.word 0x00 "PPC_PCFGR256,Pin Configuration Register 256"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x200))&0x9000)==0x8000)
|
|
group.word 0x200++0x01
|
|
line.word 0x00 "PPC_PCFGR256,Pin Configuration Register 256"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x200))&0x9000)==0x1000)
|
|
group.word 0x200++0x01
|
|
line.word 0x00 "PPC_PCFGR256,Pin Configuration Register 256"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x200++0x01
|
|
line.word 0x00 "PPC_PCFGR256,Pin Configuration Register 256"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x202))&0x9000)==0x9000)
|
|
group.word 0x202++0x01
|
|
line.word 0x00 "PPC_PCFGR257,Pin Configuration Register 257"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x202))&0x9000)==0x8000)
|
|
group.word 0x202++0x01
|
|
line.word 0x00 "PPC_PCFGR257,Pin Configuration Register 257"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x202))&0x9000)==0x1000)
|
|
group.word 0x202++0x01
|
|
line.word 0x00 "PPC_PCFGR257,Pin Configuration Register 257"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x202++0x01
|
|
line.word 0x00 "PPC_PCFGR257,Pin Configuration Register 257"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x204))&0x9000)==0x9000)
|
|
group.word 0x204++0x01
|
|
line.word 0x00 "PPC_PCFGR258,Pin Configuration Register 258"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x204))&0x9000)==0x8000)
|
|
group.word 0x204++0x01
|
|
line.word 0x00 "PPC_PCFGR258,Pin Configuration Register 258"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x204))&0x9000)==0x1000)
|
|
group.word 0x204++0x01
|
|
line.word 0x00 "PPC_PCFGR258,Pin Configuration Register 258"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x204++0x01
|
|
line.word 0x00 "PPC_PCFGR258,Pin Configuration Register 258"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x206))&0x9000)==0x9000)
|
|
group.word 0x206++0x01
|
|
line.word 0x00 "PPC_PCFGR259,Pin Configuration Register 259"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x206))&0x9000)==0x8000)
|
|
group.word 0x206++0x01
|
|
line.word 0x00 "PPC_PCFGR259,Pin Configuration Register 259"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x206))&0x9000)==0x1000)
|
|
group.word 0x206++0x01
|
|
line.word 0x00 "PPC_PCFGR259,Pin Configuration Register 259"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x206++0x01
|
|
line.word 0x00 "PPC_PCFGR259,Pin Configuration Register 259"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x208))&0x9000)==0x9000)
|
|
group.word 0x208++0x01
|
|
line.word 0x00 "PPC_PCFGR260,Pin Configuration Register 260"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x208))&0x9000)==0x8000)
|
|
group.word 0x208++0x01
|
|
line.word 0x00 "PPC_PCFGR260,Pin Configuration Register 260"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x208))&0x9000)==0x1000)
|
|
group.word 0x208++0x01
|
|
line.word 0x00 "PPC_PCFGR260,Pin Configuration Register 260"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x208++0x01
|
|
line.word 0x00 "PPC_PCFGR260,Pin Configuration Register 260"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x20A))&0x9000)==0x9000)
|
|
group.word 0x20A++0x01
|
|
line.word 0x00 "PPC_PCFGR261,Pin Configuration Register 261"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x20A))&0x9000)==0x8000)
|
|
group.word 0x20A++0x01
|
|
line.word 0x00 "PPC_PCFGR261,Pin Configuration Register 261"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x20A))&0x9000)==0x1000)
|
|
group.word 0x20A++0x01
|
|
line.word 0x00 "PPC_PCFGR261,Pin Configuration Register 261"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x20A++0x01
|
|
line.word 0x00 "PPC_PCFGR261,Pin Configuration Register 261"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x20C))&0x9000)==0x9000)
|
|
group.word 0x20C++0x01
|
|
line.word 0x00 "PPC_PCFGR262,Pin Configuration Register 262"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x20C))&0x9000)==0x8000)
|
|
group.word 0x20C++0x01
|
|
line.word 0x00 "PPC_PCFGR262,Pin Configuration Register 262"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x20C))&0x9000)==0x1000)
|
|
group.word 0x20C++0x01
|
|
line.word 0x00 "PPC_PCFGR262,Pin Configuration Register 262"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x20C++0x01
|
|
line.word 0x00 "PPC_PCFGR262,Pin Configuration Register 262"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x20E))&0x9000)==0x9000)
|
|
group.word 0x20E++0x01
|
|
line.word 0x00 "PPC_PCFGR263,Pin Configuration Register 263"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x20E))&0x9000)==0x8000)
|
|
group.word 0x20E++0x01
|
|
line.word 0x00 "PPC_PCFGR263,Pin Configuration Register 263"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x20E))&0x9000)==0x1000)
|
|
group.word 0x20E++0x01
|
|
line.word 0x00 "PPC_PCFGR263,Pin Configuration Register 263"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x20E++0x01
|
|
line.word 0x00 "PPC_PCFGR263,Pin Configuration Register 263"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x210))&0x9000)==0x9000)
|
|
group.word 0x210++0x01
|
|
line.word 0x00 "PPC_PCFGR264,Pin Configuration Register 264"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x210))&0x9000)==0x8000)
|
|
group.word 0x210++0x01
|
|
line.word 0x00 "PPC_PCFGR264,Pin Configuration Register 264"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x210))&0x9000)==0x1000)
|
|
group.word 0x210++0x01
|
|
line.word 0x00 "PPC_PCFGR264,Pin Configuration Register 264"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x210++0x01
|
|
line.word 0x00 "PPC_PCFGR264,Pin Configuration Register 264"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x212))&0x9000)==0x9000)
|
|
group.word 0x212++0x01
|
|
line.word 0x00 "PPC_PCFGR265,Pin Configuration Register 265"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x212))&0x9000)==0x8000)
|
|
group.word 0x212++0x01
|
|
line.word 0x00 "PPC_PCFGR265,Pin Configuration Register 265"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x212))&0x9000)==0x1000)
|
|
group.word 0x212++0x01
|
|
line.word 0x00 "PPC_PCFGR265,Pin Configuration Register 265"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x212++0x01
|
|
line.word 0x00 "PPC_PCFGR265,Pin Configuration Register 265"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x214))&0x9000)==0x9000)
|
|
group.word 0x214++0x01
|
|
line.word 0x00 "PPC_PCFGR266,Pin Configuration Register 266"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x214))&0x9000)==0x8000)
|
|
group.word 0x214++0x01
|
|
line.word 0x00 "PPC_PCFGR266,Pin Configuration Register 266"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x214))&0x9000)==0x1000)
|
|
group.word 0x214++0x01
|
|
line.word 0x00 "PPC_PCFGR266,Pin Configuration Register 266"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x214++0x01
|
|
line.word 0x00 "PPC_PCFGR266,Pin Configuration Register 266"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x216))&0x9000)==0x9000)
|
|
group.word 0x216++0x01
|
|
line.word 0x00 "PPC_PCFGR267,Pin Configuration Register 267"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x216))&0x9000)==0x8000)
|
|
group.word 0x216++0x01
|
|
line.word 0x00 "PPC_PCFGR267,Pin Configuration Register 267"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x216))&0x9000)==0x1000)
|
|
group.word 0x216++0x01
|
|
line.word 0x00 "PPC_PCFGR267,Pin Configuration Register 267"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x216++0x01
|
|
line.word 0x00 "PPC_PCFGR267,Pin Configuration Register 267"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x218))&0x9000)==0x9000)
|
|
group.word 0x218++0x01
|
|
line.word 0x00 "PPC_PCFGR268,Pin Configuration Register 268"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x218))&0x9000)==0x8000)
|
|
group.word 0x218++0x01
|
|
line.word 0x00 "PPC_PCFGR268,Pin Configuration Register 268"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x218))&0x9000)==0x1000)
|
|
group.word 0x218++0x01
|
|
line.word 0x00 "PPC_PCFGR268,Pin Configuration Register 268"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x218++0x01
|
|
line.word 0x00 "PPC_PCFGR268,Pin Configuration Register 268"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x21A))&0x9000)==0x9000)
|
|
group.word 0x21A++0x01
|
|
line.word 0x00 "PPC_PCFGR269,Pin Configuration Register 269"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x21A))&0x9000)==0x8000)
|
|
group.word 0x21A++0x01
|
|
line.word 0x00 "PPC_PCFGR269,Pin Configuration Register 269"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x21A))&0x9000)==0x1000)
|
|
group.word 0x21A++0x01
|
|
line.word 0x00 "PPC_PCFGR269,Pin Configuration Register 269"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x21A++0x01
|
|
line.word 0x00 "PPC_PCFGR269,Pin Configuration Register 269"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x21C))&0x9000)==0x9000)
|
|
group.word 0x21C++0x01
|
|
line.word 0x00 "PPC_PCFGR270,Pin Configuration Register 270"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x21C))&0x9000)==0x8000)
|
|
group.word 0x21C++0x01
|
|
line.word 0x00 "PPC_PCFGR270,Pin Configuration Register 270"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x21C))&0x9000)==0x1000)
|
|
group.word 0x21C++0x01
|
|
line.word 0x00 "PPC_PCFGR270,Pin Configuration Register 270"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x21C++0x01
|
|
line.word 0x00 "PPC_PCFGR270,Pin Configuration Register 270"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x21E))&0x9000)==0x9000)
|
|
group.word 0x21E++0x01
|
|
line.word 0x00 "PPC_PCFGR271,Pin Configuration Register 271"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x21E))&0x9000)==0x8000)
|
|
group.word 0x21E++0x01
|
|
line.word 0x00 "PPC_PCFGR271,Pin Configuration Register 271"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x21E))&0x9000)==0x1000)
|
|
group.word 0x21E++0x01
|
|
line.word 0x00 "PPC_PCFGR271,Pin Configuration Register 271"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x21E++0x01
|
|
line.word 0x00 "PPC_PCFGR271,Pin Configuration Register 271"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x220))&0x9000)==0x9000)
|
|
group.word 0x220++0x01
|
|
line.word 0x00 "PPC_PCFGR272,Pin Configuration Register 272"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x220))&0x9000)==0x8000)
|
|
group.word 0x220++0x01
|
|
line.word 0x00 "PPC_PCFGR272,Pin Configuration Register 272"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x220))&0x9000)==0x1000)
|
|
group.word 0x220++0x01
|
|
line.word 0x00 "PPC_PCFGR272,Pin Configuration Register 272"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x220++0x01
|
|
line.word 0x00 "PPC_PCFGR272,Pin Configuration Register 272"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x222))&0x9000)==0x9000)
|
|
group.word 0x222++0x01
|
|
line.word 0x00 "PPC_PCFGR273,Pin Configuration Register 273"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x222))&0x9000)==0x8000)
|
|
group.word 0x222++0x01
|
|
line.word 0x00 "PPC_PCFGR273,Pin Configuration Register 273"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x222))&0x9000)==0x1000)
|
|
group.word 0x222++0x01
|
|
line.word 0x00 "PPC_PCFGR273,Pin Configuration Register 273"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x222++0x01
|
|
line.word 0x00 "PPC_PCFGR273,Pin Configuration Register 273"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x224))&0x9000)==0x9000)
|
|
group.word 0x224++0x01
|
|
line.word 0x00 "PPC_PCFGR274,Pin Configuration Register 274"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x224))&0x9000)==0x8000)
|
|
group.word 0x224++0x01
|
|
line.word 0x00 "PPC_PCFGR274,Pin Configuration Register 274"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x224))&0x9000)==0x1000)
|
|
group.word 0x224++0x01
|
|
line.word 0x00 "PPC_PCFGR274,Pin Configuration Register 274"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x224++0x01
|
|
line.word 0x00 "PPC_PCFGR274,Pin Configuration Register 274"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x226))&0x9000)==0x9000)
|
|
group.word 0x226++0x01
|
|
line.word 0x00 "PPC_PCFGR275,Pin Configuration Register 275"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x226))&0x9000)==0x8000)
|
|
group.word 0x226++0x01
|
|
line.word 0x00 "PPC_PCFGR275,Pin Configuration Register 275"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x226))&0x9000)==0x1000)
|
|
group.word 0x226++0x01
|
|
line.word 0x00 "PPC_PCFGR275,Pin Configuration Register 275"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x226++0x01
|
|
line.word 0x00 "PPC_PCFGR275,Pin Configuration Register 275"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x228))&0x9000)==0x9000)
|
|
group.word 0x228++0x01
|
|
line.word 0x00 "PPC_PCFGR276,Pin Configuration Register 276"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x228))&0x9000)==0x8000)
|
|
group.word 0x228++0x01
|
|
line.word 0x00 "PPC_PCFGR276,Pin Configuration Register 276"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x228))&0x9000)==0x1000)
|
|
group.word 0x228++0x01
|
|
line.word 0x00 "PPC_PCFGR276,Pin Configuration Register 276"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x228++0x01
|
|
line.word 0x00 "PPC_PCFGR276,Pin Configuration Register 276"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x22A))&0x9000)==0x9000)
|
|
group.word 0x22A++0x01
|
|
line.word 0x00 "PPC_PCFGR277,Pin Configuration Register 277"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x22A))&0x9000)==0x8000)
|
|
group.word 0x22A++0x01
|
|
line.word 0x00 "PPC_PCFGR277,Pin Configuration Register 277"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x22A))&0x9000)==0x1000)
|
|
group.word 0x22A++0x01
|
|
line.word 0x00 "PPC_PCFGR277,Pin Configuration Register 277"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x22A++0x01
|
|
line.word 0x00 "PPC_PCFGR277,Pin Configuration Register 277"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x22C))&0x9000)==0x9000)
|
|
group.word 0x22C++0x01
|
|
line.word 0x00 "PPC_PCFGR278,Pin Configuration Register 278"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x22C))&0x9000)==0x8000)
|
|
group.word 0x22C++0x01
|
|
line.word 0x00 "PPC_PCFGR278,Pin Configuration Register 278"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x22C))&0x9000)==0x1000)
|
|
group.word 0x22C++0x01
|
|
line.word 0x00 "PPC_PCFGR278,Pin Configuration Register 278"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x22C++0x01
|
|
line.word 0x00 "PPC_PCFGR278,Pin Configuration Register 278"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x22E))&0x9000)==0x9000)
|
|
group.word 0x22E++0x01
|
|
line.word 0x00 "PPC_PCFGR279,Pin Configuration Register 279"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x22E))&0x9000)==0x8000)
|
|
group.word 0x22E++0x01
|
|
line.word 0x00 "PPC_PCFGR279,Pin Configuration Register 279"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x22E))&0x9000)==0x1000)
|
|
group.word 0x22E++0x01
|
|
line.word 0x00 "PPC_PCFGR279,Pin Configuration Register 279"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x22E++0x01
|
|
line.word 0x00 "PPC_PCFGR279,Pin Configuration Register 279"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x230))&0x9000)==0x9000)
|
|
group.word 0x230++0x01
|
|
line.word 0x00 "PPC_PCFGR280,Pin Configuration Register 280"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x230))&0x9000)==0x8000)
|
|
group.word 0x230++0x01
|
|
line.word 0x00 "PPC_PCFGR280,Pin Configuration Register 280"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x230))&0x9000)==0x1000)
|
|
group.word 0x230++0x01
|
|
line.word 0x00 "PPC_PCFGR280,Pin Configuration Register 280"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x230++0x01
|
|
line.word 0x00 "PPC_PCFGR280,Pin Configuration Register 280"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x232))&0x9000)==0x9000)
|
|
group.word 0x232++0x01
|
|
line.word 0x00 "PPC_PCFGR281,Pin Configuration Register 281"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x232))&0x9000)==0x8000)
|
|
group.word 0x232++0x01
|
|
line.word 0x00 "PPC_PCFGR281,Pin Configuration Register 281"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x232))&0x9000)==0x1000)
|
|
group.word 0x232++0x01
|
|
line.word 0x00 "PPC_PCFGR281,Pin Configuration Register 281"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x232++0x01
|
|
line.word 0x00 "PPC_PCFGR281,Pin Configuration Register 281"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x234))&0x9000)==0x9000)
|
|
group.word 0x234++0x01
|
|
line.word 0x00 "PPC_PCFGR282,Pin Configuration Register 282"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x234))&0x9000)==0x8000)
|
|
group.word 0x234++0x01
|
|
line.word 0x00 "PPC_PCFGR282,Pin Configuration Register 282"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x234))&0x9000)==0x1000)
|
|
group.word 0x234++0x01
|
|
line.word 0x00 "PPC_PCFGR282,Pin Configuration Register 282"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x234++0x01
|
|
line.word 0x00 "PPC_PCFGR282,Pin Configuration Register 282"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x236))&0x9000)==0x9000)
|
|
group.word 0x236++0x01
|
|
line.word 0x00 "PPC_PCFGR283,Pin Configuration Register 283"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x236))&0x9000)==0x8000)
|
|
group.word 0x236++0x01
|
|
line.word 0x00 "PPC_PCFGR283,Pin Configuration Register 283"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x236))&0x9000)==0x1000)
|
|
group.word 0x236++0x01
|
|
line.word 0x00 "PPC_PCFGR283,Pin Configuration Register 283"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x236++0x01
|
|
line.word 0x00 "PPC_PCFGR283,Pin Configuration Register 283"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x238))&0x9000)==0x9000)
|
|
group.word 0x238++0x01
|
|
line.word 0x00 "PPC_PCFGR284,Pin Configuration Register 284"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x238))&0x9000)==0x8000)
|
|
group.word 0x238++0x01
|
|
line.word 0x00 "PPC_PCFGR284,Pin Configuration Register 284"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x238))&0x9000)==0x1000)
|
|
group.word 0x238++0x01
|
|
line.word 0x00 "PPC_PCFGR284,Pin Configuration Register 284"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x238++0x01
|
|
line.word 0x00 "PPC_PCFGR284,Pin Configuration Register 284"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x23A))&0x9000)==0x9000)
|
|
group.word 0x23A++0x01
|
|
line.word 0x00 "PPC_PCFGR285,Pin Configuration Register 285"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x23A))&0x9000)==0x8000)
|
|
group.word 0x23A++0x01
|
|
line.word 0x00 "PPC_PCFGR285,Pin Configuration Register 285"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x23A))&0x9000)==0x1000)
|
|
group.word 0x23A++0x01
|
|
line.word 0x00 "PPC_PCFGR285,Pin Configuration Register 285"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x23A++0x01
|
|
line.word 0x00 "PPC_PCFGR285,Pin Configuration Register 285"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x23C))&0x9000)==0x9000)
|
|
group.word 0x23C++0x01
|
|
line.word 0x00 "PPC_PCFGR286,Pin Configuration Register 286"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x23C))&0x9000)==0x8000)
|
|
group.word 0x23C++0x01
|
|
line.word 0x00 "PPC_PCFGR286,Pin Configuration Register 286"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x23C))&0x9000)==0x1000)
|
|
group.word 0x23C++0x01
|
|
line.word 0x00 "PPC_PCFGR286,Pin Configuration Register 286"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x23C++0x01
|
|
line.word 0x00 "PPC_PCFGR286,Pin Configuration Register 286"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x23E))&0x9000)==0x9000)
|
|
group.word 0x23E++0x01
|
|
line.word 0x00 "PPC_PCFGR287,Pin Configuration Register 287"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x23E))&0x9000)==0x8000)
|
|
group.word 0x23E++0x01
|
|
line.word 0x00 "PPC_PCFGR287,Pin Configuration Register 287"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x23E))&0x9000)==0x1000)
|
|
group.word 0x23E++0x01
|
|
line.word 0x00 "PPC_PCFGR287,Pin Configuration Register 287"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x23E++0x01
|
|
line.word 0x00 "PPC_PCFGR287,Pin Configuration Register 287"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x240))&0x9000)==0x9000)
|
|
group.word 0x240++0x01
|
|
line.word 0x00 "PPC_PCFGR288,Pin Configuration Register 288"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x240))&0x9000)==0x8000)
|
|
group.word 0x240++0x01
|
|
line.word 0x00 "PPC_PCFGR288,Pin Configuration Register 288"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x240))&0x9000)==0x1000)
|
|
group.word 0x240++0x01
|
|
line.word 0x00 "PPC_PCFGR288,Pin Configuration Register 288"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x240++0x01
|
|
line.word 0x00 "PPC_PCFGR288,Pin Configuration Register 288"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x242))&0x9000)==0x9000)
|
|
group.word 0x242++0x01
|
|
line.word 0x00 "PPC_PCFGR289,Pin Configuration Register 289"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x242))&0x9000)==0x8000)
|
|
group.word 0x242++0x01
|
|
line.word 0x00 "PPC_PCFGR289,Pin Configuration Register 289"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x242))&0x9000)==0x1000)
|
|
group.word 0x242++0x01
|
|
line.word 0x00 "PPC_PCFGR289,Pin Configuration Register 289"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x242++0x01
|
|
line.word 0x00 "PPC_PCFGR289,Pin Configuration Register 289"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x244))&0x9000)==0x9000)
|
|
group.word 0x244++0x01
|
|
line.word 0x00 "PPC_PCFGR290,Pin Configuration Register 290"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x244))&0x9000)==0x8000)
|
|
group.word 0x244++0x01
|
|
line.word 0x00 "PPC_PCFGR290,Pin Configuration Register 290"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x244))&0x9000)==0x1000)
|
|
group.word 0x244++0x01
|
|
line.word 0x00 "PPC_PCFGR290,Pin Configuration Register 290"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x244++0x01
|
|
line.word 0x00 "PPC_PCFGR290,Pin Configuration Register 290"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x246))&0x9000)==0x9000)
|
|
group.word 0x246++0x01
|
|
line.word 0x00 "PPC_PCFGR291,Pin Configuration Register 291"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x246))&0x9000)==0x8000)
|
|
group.word 0x246++0x01
|
|
line.word 0x00 "PPC_PCFGR291,Pin Configuration Register 291"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x246))&0x9000)==0x1000)
|
|
group.word 0x246++0x01
|
|
line.word 0x00 "PPC_PCFGR291,Pin Configuration Register 291"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x246++0x01
|
|
line.word 0x00 "PPC_PCFGR291,Pin Configuration Register 291"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x248))&0x9000)==0x9000)
|
|
group.word 0x248++0x01
|
|
line.word 0x00 "PPC_PCFGR292,Pin Configuration Register 292"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x248))&0x9000)==0x8000)
|
|
group.word 0x248++0x01
|
|
line.word 0x00 "PPC_PCFGR292,Pin Configuration Register 292"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x248))&0x9000)==0x1000)
|
|
group.word 0x248++0x01
|
|
line.word 0x00 "PPC_PCFGR292,Pin Configuration Register 292"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x248++0x01
|
|
line.word 0x00 "PPC_PCFGR292,Pin Configuration Register 292"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x24A))&0x9000)==0x9000)
|
|
group.word 0x24A++0x01
|
|
line.word 0x00 "PPC_PCFGR293,Pin Configuration Register 293"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x24A))&0x9000)==0x8000)
|
|
group.word 0x24A++0x01
|
|
line.word 0x00 "PPC_PCFGR293,Pin Configuration Register 293"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x24A))&0x9000)==0x1000)
|
|
group.word 0x24A++0x01
|
|
line.word 0x00 "PPC_PCFGR293,Pin Configuration Register 293"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x24A++0x01
|
|
line.word 0x00 "PPC_PCFGR293,Pin Configuration Register 293"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x24C))&0x9000)==0x9000)
|
|
group.word 0x24C++0x01
|
|
line.word 0x00 "PPC_PCFGR294,Pin Configuration Register 294"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x24C))&0x9000)==0x8000)
|
|
group.word 0x24C++0x01
|
|
line.word 0x00 "PPC_PCFGR294,Pin Configuration Register 294"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x24C))&0x9000)==0x1000)
|
|
group.word 0x24C++0x01
|
|
line.word 0x00 "PPC_PCFGR294,Pin Configuration Register 294"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x24C++0x01
|
|
line.word 0x00 "PPC_PCFGR294,Pin Configuration Register 294"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x24E))&0x9000)==0x9000)
|
|
group.word 0x24E++0x01
|
|
line.word 0x00 "PPC_PCFGR295,Pin Configuration Register 295"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x24E))&0x9000)==0x8000)
|
|
group.word 0x24E++0x01
|
|
line.word 0x00 "PPC_PCFGR295,Pin Configuration Register 295"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x24E))&0x9000)==0x1000)
|
|
group.word 0x24E++0x01
|
|
line.word 0x00 "PPC_PCFGR295,Pin Configuration Register 295"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x24E++0x01
|
|
line.word 0x00 "PPC_PCFGR295,Pin Configuration Register 295"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x250))&0x9000)==0x9000)
|
|
group.word 0x250++0x01
|
|
line.word 0x00 "PPC_PCFGR296,Pin Configuration Register 296"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x250))&0x9000)==0x8000)
|
|
group.word 0x250++0x01
|
|
line.word 0x00 "PPC_PCFGR296,Pin Configuration Register 296"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x250))&0x9000)==0x1000)
|
|
group.word 0x250++0x01
|
|
line.word 0x00 "PPC_PCFGR296,Pin Configuration Register 296"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x250++0x01
|
|
line.word 0x00 "PPC_PCFGR296,Pin Configuration Register 296"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x252))&0x9000)==0x9000)
|
|
group.word 0x252++0x01
|
|
line.word 0x00 "PPC_PCFGR297,Pin Configuration Register 297"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x252))&0x9000)==0x8000)
|
|
group.word 0x252++0x01
|
|
line.word 0x00 "PPC_PCFGR297,Pin Configuration Register 297"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x252))&0x9000)==0x1000)
|
|
group.word 0x252++0x01
|
|
line.word 0x00 "PPC_PCFGR297,Pin Configuration Register 297"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x252++0x01
|
|
line.word 0x00 "PPC_PCFGR297,Pin Configuration Register 297"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x254))&0x9000)==0x9000)
|
|
group.word 0x254++0x01
|
|
line.word 0x00 "PPC_PCFGR298,Pin Configuration Register 298"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x254))&0x9000)==0x8000)
|
|
group.word 0x254++0x01
|
|
line.word 0x00 "PPC_PCFGR298,Pin Configuration Register 298"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x254))&0x9000)==0x1000)
|
|
group.word 0x254++0x01
|
|
line.word 0x00 "PPC_PCFGR298,Pin Configuration Register 298"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x254++0x01
|
|
line.word 0x00 "PPC_PCFGR298,Pin Configuration Register 298"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x256))&0x9000)==0x9000)
|
|
group.word 0x256++0x01
|
|
line.word 0x00 "PPC_PCFGR299,Pin Configuration Register 299"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x256))&0x9000)==0x8000)
|
|
group.word 0x256++0x01
|
|
line.word 0x00 "PPC_PCFGR299,Pin Configuration Register 299"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x256))&0x9000)==0x1000)
|
|
group.word 0x256++0x01
|
|
line.word 0x00 "PPC_PCFGR299,Pin Configuration Register 299"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x256++0x01
|
|
line.word 0x00 "PPC_PCFGR299,Pin Configuration Register 299"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x258))&0x9000)==0x9000)
|
|
group.word 0x258++0x01
|
|
line.word 0x00 "PPC_PCFGR300,Pin Configuration Register 300"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x258))&0x9000)==0x8000)
|
|
group.word 0x258++0x01
|
|
line.word 0x00 "PPC_PCFGR300,Pin Configuration Register 300"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x258))&0x9000)==0x1000)
|
|
group.word 0x258++0x01
|
|
line.word 0x00 "PPC_PCFGR300,Pin Configuration Register 300"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x258++0x01
|
|
line.word 0x00 "PPC_PCFGR300,Pin Configuration Register 300"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x25A))&0x9000)==0x9000)
|
|
group.word 0x25A++0x01
|
|
line.word 0x00 "PPC_PCFGR301,Pin Configuration Register 301"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x25A))&0x9000)==0x8000)
|
|
group.word 0x25A++0x01
|
|
line.word 0x00 "PPC_PCFGR301,Pin Configuration Register 301"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x25A))&0x9000)==0x1000)
|
|
group.word 0x25A++0x01
|
|
line.word 0x00 "PPC_PCFGR301,Pin Configuration Register 301"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x25A++0x01
|
|
line.word 0x00 "PPC_PCFGR301,Pin Configuration Register 301"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x25C))&0x9000)==0x9000)
|
|
group.word 0x25C++0x01
|
|
line.word 0x00 "PPC_PCFGR302,Pin Configuration Register 302"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x25C))&0x9000)==0x8000)
|
|
group.word 0x25C++0x01
|
|
line.word 0x00 "PPC_PCFGR302,Pin Configuration Register 302"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x25C))&0x9000)==0x1000)
|
|
group.word 0x25C++0x01
|
|
line.word 0x00 "PPC_PCFGR302,Pin Configuration Register 302"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x25C++0x01
|
|
line.word 0x00 "PPC_PCFGR302,Pin Configuration Register 302"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x25E))&0x9000)==0x9000)
|
|
group.word 0x25E++0x01
|
|
line.word 0x00 "PPC_PCFGR303,Pin Configuration Register 303"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x25E))&0x9000)==0x8000)
|
|
group.word 0x25E++0x01
|
|
line.word 0x00 "PPC_PCFGR303,Pin Configuration Register 303"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x25E))&0x9000)==0x1000)
|
|
group.word 0x25E++0x01
|
|
line.word 0x00 "PPC_PCFGR303,Pin Configuration Register 303"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x25E++0x01
|
|
line.word 0x00 "PPC_PCFGR303,Pin Configuration Register 303"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x260))&0x9000)==0x9000)
|
|
group.word 0x260++0x01
|
|
line.word 0x00 "PPC_PCFGR304,Pin Configuration Register 304"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x260))&0x9000)==0x8000)
|
|
group.word 0x260++0x01
|
|
line.word 0x00 "PPC_PCFGR304,Pin Configuration Register 304"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x260))&0x9000)==0x1000)
|
|
group.word 0x260++0x01
|
|
line.word 0x00 "PPC_PCFGR304,Pin Configuration Register 304"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x260++0x01
|
|
line.word 0x00 "PPC_PCFGR304,Pin Configuration Register 304"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x262))&0x9000)==0x9000)
|
|
group.word 0x262++0x01
|
|
line.word 0x00 "PPC_PCFGR305,Pin Configuration Register 305"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x262))&0x9000)==0x8000)
|
|
group.word 0x262++0x01
|
|
line.word 0x00 "PPC_PCFGR305,Pin Configuration Register 305"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x262))&0x9000)==0x1000)
|
|
group.word 0x262++0x01
|
|
line.word 0x00 "PPC_PCFGR305,Pin Configuration Register 305"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x262++0x01
|
|
line.word 0x00 "PPC_PCFGR305,Pin Configuration Register 305"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x264))&0x9000)==0x9000)
|
|
group.word 0x264++0x01
|
|
line.word 0x00 "PPC_PCFGR306,Pin Configuration Register 306"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x264))&0x9000)==0x8000)
|
|
group.word 0x264++0x01
|
|
line.word 0x00 "PPC_PCFGR306,Pin Configuration Register 306"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x264))&0x9000)==0x1000)
|
|
group.word 0x264++0x01
|
|
line.word 0x00 "PPC_PCFGR306,Pin Configuration Register 306"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x264++0x01
|
|
line.word 0x00 "PPC_PCFGR306,Pin Configuration Register 306"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x266))&0x9000)==0x9000)
|
|
group.word 0x266++0x01
|
|
line.word 0x00 "PPC_PCFGR307,Pin Configuration Register 307"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x266))&0x9000)==0x8000)
|
|
group.word 0x266++0x01
|
|
line.word 0x00 "PPC_PCFGR307,Pin Configuration Register 307"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x266))&0x9000)==0x1000)
|
|
group.word 0x266++0x01
|
|
line.word 0x00 "PPC_PCFGR307,Pin Configuration Register 307"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x266++0x01
|
|
line.word 0x00 "PPC_PCFGR307,Pin Configuration Register 307"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x268))&0x9000)==0x9000)
|
|
group.word 0x268++0x01
|
|
line.word 0x00 "PPC_PCFGR308,Pin Configuration Register 308"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x268))&0x9000)==0x8000)
|
|
group.word 0x268++0x01
|
|
line.word 0x00 "PPC_PCFGR308,Pin Configuration Register 308"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x268))&0x9000)==0x1000)
|
|
group.word 0x268++0x01
|
|
line.word 0x00 "PPC_PCFGR308,Pin Configuration Register 308"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x268++0x01
|
|
line.word 0x00 "PPC_PCFGR308,Pin Configuration Register 308"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x26A))&0x9000)==0x9000)
|
|
group.word 0x26A++0x01
|
|
line.word 0x00 "PPC_PCFGR309,Pin Configuration Register 309"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x26A))&0x9000)==0x8000)
|
|
group.word 0x26A++0x01
|
|
line.word 0x00 "PPC_PCFGR309,Pin Configuration Register 309"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x26A))&0x9000)==0x1000)
|
|
group.word 0x26A++0x01
|
|
line.word 0x00 "PPC_PCFGR309,Pin Configuration Register 309"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x26A++0x01
|
|
line.word 0x00 "PPC_PCFGR309,Pin Configuration Register 309"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x26C))&0x9000)==0x9000)
|
|
group.word 0x26C++0x01
|
|
line.word 0x00 "PPC_PCFGR310,Pin Configuration Register 310"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x26C))&0x9000)==0x8000)
|
|
group.word 0x26C++0x01
|
|
line.word 0x00 "PPC_PCFGR310,Pin Configuration Register 310"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x26C))&0x9000)==0x1000)
|
|
group.word 0x26C++0x01
|
|
line.word 0x00 "PPC_PCFGR310,Pin Configuration Register 310"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x26C++0x01
|
|
line.word 0x00 "PPC_PCFGR310,Pin Configuration Register 310"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x26E))&0x9000)==0x9000)
|
|
group.word 0x26E++0x01
|
|
line.word 0x00 "PPC_PCFGR311,Pin Configuration Register 311"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x26E))&0x9000)==0x8000)
|
|
group.word 0x26E++0x01
|
|
line.word 0x00 "PPC_PCFGR311,Pin Configuration Register 311"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x26E))&0x9000)==0x1000)
|
|
group.word 0x26E++0x01
|
|
line.word 0x00 "PPC_PCFGR311,Pin Configuration Register 311"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x26E++0x01
|
|
line.word 0x00 "PPC_PCFGR311,Pin Configuration Register 311"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x270))&0x9000)==0x9000)
|
|
group.word 0x270++0x01
|
|
line.word 0x00 "PPC_PCFGR312,Pin Configuration Register 312"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x270))&0x9000)==0x8000)
|
|
group.word 0x270++0x01
|
|
line.word 0x00 "PPC_PCFGR312,Pin Configuration Register 312"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x270))&0x9000)==0x1000)
|
|
group.word 0x270++0x01
|
|
line.word 0x00 "PPC_PCFGR312,Pin Configuration Register 312"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x270++0x01
|
|
line.word 0x00 "PPC_PCFGR312,Pin Configuration Register 312"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x272))&0x9000)==0x9000)
|
|
group.word 0x272++0x01
|
|
line.word 0x00 "PPC_PCFGR313,Pin Configuration Register 313"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x272))&0x9000)==0x8000)
|
|
group.word 0x272++0x01
|
|
line.word 0x00 "PPC_PCFGR313,Pin Configuration Register 313"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x272))&0x9000)==0x1000)
|
|
group.word 0x272++0x01
|
|
line.word 0x00 "PPC_PCFGR313,Pin Configuration Register 313"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x272++0x01
|
|
line.word 0x00 "PPC_PCFGR313,Pin Configuration Register 313"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x274))&0x9000)==0x9000)
|
|
group.word 0x274++0x01
|
|
line.word 0x00 "PPC_PCFGR314,Pin Configuration Register 314"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x274))&0x9000)==0x8000)
|
|
group.word 0x274++0x01
|
|
line.word 0x00 "PPC_PCFGR314,Pin Configuration Register 314"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x274))&0x9000)==0x1000)
|
|
group.word 0x274++0x01
|
|
line.word 0x00 "PPC_PCFGR314,Pin Configuration Register 314"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x274++0x01
|
|
line.word 0x00 "PPC_PCFGR314,Pin Configuration Register 314"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x276))&0x9000)==0x9000)
|
|
group.word 0x276++0x01
|
|
line.word 0x00 "PPC_PCFGR315,Pin Configuration Register 315"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x276))&0x9000)==0x8000)
|
|
group.word 0x276++0x01
|
|
line.word 0x00 "PPC_PCFGR315,Pin Configuration Register 315"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x276))&0x9000)==0x1000)
|
|
group.word 0x276++0x01
|
|
line.word 0x00 "PPC_PCFGR315,Pin Configuration Register 315"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x276++0x01
|
|
line.word 0x00 "PPC_PCFGR315,Pin Configuration Register 315"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x278))&0x9000)==0x9000)
|
|
group.word 0x278++0x01
|
|
line.word 0x00 "PPC_PCFGR316,Pin Configuration Register 316"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x278))&0x9000)==0x8000)
|
|
group.word 0x278++0x01
|
|
line.word 0x00 "PPC_PCFGR316,Pin Configuration Register 316"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x278))&0x9000)==0x1000)
|
|
group.word 0x278++0x01
|
|
line.word 0x00 "PPC_PCFGR316,Pin Configuration Register 316"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x278++0x01
|
|
line.word 0x00 "PPC_PCFGR316,Pin Configuration Register 316"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x27A))&0x9000)==0x9000)
|
|
group.word 0x27A++0x01
|
|
line.word 0x00 "PPC_PCFGR317,Pin Configuration Register 317"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x27A))&0x9000)==0x8000)
|
|
group.word 0x27A++0x01
|
|
line.word 0x00 "PPC_PCFGR317,Pin Configuration Register 317"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x27A))&0x9000)==0x1000)
|
|
group.word 0x27A++0x01
|
|
line.word 0x00 "PPC_PCFGR317,Pin Configuration Register 317"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x27A++0x01
|
|
line.word 0x00 "PPC_PCFGR317,Pin Configuration Register 317"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x27C))&0x9000)==0x9000)
|
|
group.word 0x27C++0x01
|
|
line.word 0x00 "PPC_PCFGR318,Pin Configuration Register 318"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x27C))&0x9000)==0x8000)
|
|
group.word 0x27C++0x01
|
|
line.word 0x00 "PPC_PCFGR318,Pin Configuration Register 318"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x27C))&0x9000)==0x1000)
|
|
group.word 0x27C++0x01
|
|
line.word 0x00 "PPC_PCFGR318,Pin Configuration Register 318"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x27C++0x01
|
|
line.word 0x00 "PPC_PCFGR318,Pin Configuration Register 318"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x27E))&0x9000)==0x9000)
|
|
group.word 0x27E++0x01
|
|
line.word 0x00 "PPC_PCFGR319,Pin Configuration Register 319"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x27E))&0x9000)==0x8000)
|
|
group.word 0x27E++0x01
|
|
line.word 0x00 "PPC_PCFGR319,Pin Configuration Register 319"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x27E))&0x9000)==0x1000)
|
|
group.word 0x27E++0x01
|
|
line.word 0x00 "PPC_PCFGR319,Pin Configuration Register 319"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x27E++0x01
|
|
line.word 0x00 "PPC_PCFGR319,Pin Configuration Register 319"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x280))&0x9000)==0x9000)
|
|
group.word 0x280++0x01
|
|
line.word 0x00 "PPC_PCFGR320,Pin Configuration Register 320"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x280))&0x9000)==0x8000)
|
|
group.word 0x280++0x01
|
|
line.word 0x00 "PPC_PCFGR320,Pin Configuration Register 320"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x280))&0x9000)==0x1000)
|
|
group.word 0x280++0x01
|
|
line.word 0x00 "PPC_PCFGR320,Pin Configuration Register 320"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x280++0x01
|
|
line.word 0x00 "PPC_PCFGR320,Pin Configuration Register 320"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x282))&0x9000)==0x9000)
|
|
group.word 0x282++0x01
|
|
line.word 0x00 "PPC_PCFGR321,Pin Configuration Register 321"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x282))&0x9000)==0x8000)
|
|
group.word 0x282++0x01
|
|
line.word 0x00 "PPC_PCFGR321,Pin Configuration Register 321"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x282))&0x9000)==0x1000)
|
|
group.word 0x282++0x01
|
|
line.word 0x00 "PPC_PCFGR321,Pin Configuration Register 321"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x282++0x01
|
|
line.word 0x00 "PPC_PCFGR321,Pin Configuration Register 321"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x284))&0x9000)==0x9000)
|
|
group.word 0x284++0x01
|
|
line.word 0x00 "PPC_PCFGR322,Pin Configuration Register 322"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x284))&0x9000)==0x8000)
|
|
group.word 0x284++0x01
|
|
line.word 0x00 "PPC_PCFGR322,Pin Configuration Register 322"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x284))&0x9000)==0x1000)
|
|
group.word 0x284++0x01
|
|
line.word 0x00 "PPC_PCFGR322,Pin Configuration Register 322"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x284++0x01
|
|
line.word 0x00 "PPC_PCFGR322,Pin Configuration Register 322"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x286))&0x9000)==0x9000)
|
|
group.word 0x286++0x01
|
|
line.word 0x00 "PPC_PCFGR323,Pin Configuration Register 323"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x286))&0x9000)==0x8000)
|
|
group.word 0x286++0x01
|
|
line.word 0x00 "PPC_PCFGR323,Pin Configuration Register 323"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x286))&0x9000)==0x1000)
|
|
group.word 0x286++0x01
|
|
line.word 0x00 "PPC_PCFGR323,Pin Configuration Register 323"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x286++0x01
|
|
line.word 0x00 "PPC_PCFGR323,Pin Configuration Register 323"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x288))&0x9000)==0x9000)
|
|
group.word 0x288++0x01
|
|
line.word 0x00 "PPC_PCFGR324,Pin Configuration Register 324"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x288))&0x9000)==0x8000)
|
|
group.word 0x288++0x01
|
|
line.word 0x00 "PPC_PCFGR324,Pin Configuration Register 324"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x288))&0x9000)==0x1000)
|
|
group.word 0x288++0x01
|
|
line.word 0x00 "PPC_PCFGR324,Pin Configuration Register 324"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x288++0x01
|
|
line.word 0x00 "PPC_PCFGR324,Pin Configuration Register 324"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x28A))&0x9000)==0x9000)
|
|
group.word 0x28A++0x01
|
|
line.word 0x00 "PPC_PCFGR325,Pin Configuration Register 325"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x28A))&0x9000)==0x8000)
|
|
group.word 0x28A++0x01
|
|
line.word 0x00 "PPC_PCFGR325,Pin Configuration Register 325"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x28A))&0x9000)==0x1000)
|
|
group.word 0x28A++0x01
|
|
line.word 0x00 "PPC_PCFGR325,Pin Configuration Register 325"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x28A++0x01
|
|
line.word 0x00 "PPC_PCFGR325,Pin Configuration Register 325"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x28C))&0x9000)==0x9000)
|
|
group.word 0x28C++0x01
|
|
line.word 0x00 "PPC_PCFGR326,Pin Configuration Register 326"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x28C))&0x9000)==0x8000)
|
|
group.word 0x28C++0x01
|
|
line.word 0x00 "PPC_PCFGR326,Pin Configuration Register 326"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x28C))&0x9000)==0x1000)
|
|
group.word 0x28C++0x01
|
|
line.word 0x00 "PPC_PCFGR326,Pin Configuration Register 326"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x28C++0x01
|
|
line.word 0x00 "PPC_PCFGR326,Pin Configuration Register 326"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x28E))&0x9000)==0x9000)
|
|
group.word 0x28E++0x01
|
|
line.word 0x00 "PPC_PCFGR327,Pin Configuration Register 327"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x28E))&0x9000)==0x8000)
|
|
group.word 0x28E++0x01
|
|
line.word 0x00 "PPC_PCFGR327,Pin Configuration Register 327"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x28E))&0x9000)==0x1000)
|
|
group.word 0x28E++0x01
|
|
line.word 0x00 "PPC_PCFGR327,Pin Configuration Register 327"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x28E++0x01
|
|
line.word 0x00 "PPC_PCFGR327,Pin Configuration Register 327"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x290))&0x9000)==0x9000)
|
|
group.word 0x290++0x01
|
|
line.word 0x00 "PPC_PCFGR328,Pin Configuration Register 328"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x290))&0x9000)==0x8000)
|
|
group.word 0x290++0x01
|
|
line.word 0x00 "PPC_PCFGR328,Pin Configuration Register 328"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x290))&0x9000)==0x1000)
|
|
group.word 0x290++0x01
|
|
line.word 0x00 "PPC_PCFGR328,Pin Configuration Register 328"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x290++0x01
|
|
line.word 0x00 "PPC_PCFGR328,Pin Configuration Register 328"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x292))&0x9000)==0x9000)
|
|
group.word 0x292++0x01
|
|
line.word 0x00 "PPC_PCFGR329,Pin Configuration Register 329"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x292))&0x9000)==0x8000)
|
|
group.word 0x292++0x01
|
|
line.word 0x00 "PPC_PCFGR329,Pin Configuration Register 329"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x292))&0x9000)==0x1000)
|
|
group.word 0x292++0x01
|
|
line.word 0x00 "PPC_PCFGR329,Pin Configuration Register 329"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x292++0x01
|
|
line.word 0x00 "PPC_PCFGR329,Pin Configuration Register 329"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x294))&0x9000)==0x9000)
|
|
group.word 0x294++0x01
|
|
line.word 0x00 "PPC_PCFGR330,Pin Configuration Register 330"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x294))&0x9000)==0x8000)
|
|
group.word 0x294++0x01
|
|
line.word 0x00 "PPC_PCFGR330,Pin Configuration Register 330"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x294))&0x9000)==0x1000)
|
|
group.word 0x294++0x01
|
|
line.word 0x00 "PPC_PCFGR330,Pin Configuration Register 330"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x294++0x01
|
|
line.word 0x00 "PPC_PCFGR330,Pin Configuration Register 330"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x296))&0x9000)==0x9000)
|
|
group.word 0x296++0x01
|
|
line.word 0x00 "PPC_PCFGR331,Pin Configuration Register 331"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x296))&0x9000)==0x8000)
|
|
group.word 0x296++0x01
|
|
line.word 0x00 "PPC_PCFGR331,Pin Configuration Register 331"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x296))&0x9000)==0x1000)
|
|
group.word 0x296++0x01
|
|
line.word 0x00 "PPC_PCFGR331,Pin Configuration Register 331"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x296++0x01
|
|
line.word 0x00 "PPC_PCFGR331,Pin Configuration Register 331"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x298))&0x9000)==0x9000)
|
|
group.word 0x298++0x01
|
|
line.word 0x00 "PPC_PCFGR332,Pin Configuration Register 332"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x298))&0x9000)==0x8000)
|
|
group.word 0x298++0x01
|
|
line.word 0x00 "PPC_PCFGR332,Pin Configuration Register 332"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x298))&0x9000)==0x1000)
|
|
group.word 0x298++0x01
|
|
line.word 0x00 "PPC_PCFGR332,Pin Configuration Register 332"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x298++0x01
|
|
line.word 0x00 "PPC_PCFGR332,Pin Configuration Register 332"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x29A))&0x9000)==0x9000)
|
|
group.word 0x29A++0x01
|
|
line.word 0x00 "PPC_PCFGR333,Pin Configuration Register 333"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x29A))&0x9000)==0x8000)
|
|
group.word 0x29A++0x01
|
|
line.word 0x00 "PPC_PCFGR333,Pin Configuration Register 333"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x29A))&0x9000)==0x1000)
|
|
group.word 0x29A++0x01
|
|
line.word 0x00 "PPC_PCFGR333,Pin Configuration Register 333"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x29A++0x01
|
|
line.word 0x00 "PPC_PCFGR333,Pin Configuration Register 333"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x29C))&0x9000)==0x9000)
|
|
group.word 0x29C++0x01
|
|
line.word 0x00 "PPC_PCFGR334,Pin Configuration Register 334"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x29C))&0x9000)==0x8000)
|
|
group.word 0x29C++0x01
|
|
line.word 0x00 "PPC_PCFGR334,Pin Configuration Register 334"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x29C))&0x9000)==0x1000)
|
|
group.word 0x29C++0x01
|
|
line.word 0x00 "PPC_PCFGR334,Pin Configuration Register 334"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x29C++0x01
|
|
line.word 0x00 "PPC_PCFGR334,Pin Configuration Register 334"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x29E))&0x9000)==0x9000)
|
|
group.word 0x29E++0x01
|
|
line.word 0x00 "PPC_PCFGR335,Pin Configuration Register 335"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x29E))&0x9000)==0x8000)
|
|
group.word 0x29E++0x01
|
|
line.word 0x00 "PPC_PCFGR335,Pin Configuration Register 335"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x29E))&0x9000)==0x1000)
|
|
group.word 0x29E++0x01
|
|
line.word 0x00 "PPC_PCFGR335,Pin Configuration Register 335"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x29E++0x01
|
|
line.word 0x00 "PPC_PCFGR335,Pin Configuration Register 335"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2A0))&0x9000)==0x9000)
|
|
group.word 0x2A0++0x01
|
|
line.word 0x00 "PPC_PCFGR336,Pin Configuration Register 336"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2A0))&0x9000)==0x8000)
|
|
group.word 0x2A0++0x01
|
|
line.word 0x00 "PPC_PCFGR336,Pin Configuration Register 336"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2A0))&0x9000)==0x1000)
|
|
group.word 0x2A0++0x01
|
|
line.word 0x00 "PPC_PCFGR336,Pin Configuration Register 336"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2A0++0x01
|
|
line.word 0x00 "PPC_PCFGR336,Pin Configuration Register 336"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2A2))&0x9000)==0x9000)
|
|
group.word 0x2A2++0x01
|
|
line.word 0x00 "PPC_PCFGR337,Pin Configuration Register 337"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2A2))&0x9000)==0x8000)
|
|
group.word 0x2A2++0x01
|
|
line.word 0x00 "PPC_PCFGR337,Pin Configuration Register 337"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2A2))&0x9000)==0x1000)
|
|
group.word 0x2A2++0x01
|
|
line.word 0x00 "PPC_PCFGR337,Pin Configuration Register 337"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2A2++0x01
|
|
line.word 0x00 "PPC_PCFGR337,Pin Configuration Register 337"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2A4))&0x9000)==0x9000)
|
|
group.word 0x2A4++0x01
|
|
line.word 0x00 "PPC_PCFGR338,Pin Configuration Register 338"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2A4))&0x9000)==0x8000)
|
|
group.word 0x2A4++0x01
|
|
line.word 0x00 "PPC_PCFGR338,Pin Configuration Register 338"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2A4))&0x9000)==0x1000)
|
|
group.word 0x2A4++0x01
|
|
line.word 0x00 "PPC_PCFGR338,Pin Configuration Register 338"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2A4++0x01
|
|
line.word 0x00 "PPC_PCFGR338,Pin Configuration Register 338"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2A6))&0x9000)==0x9000)
|
|
group.word 0x2A6++0x01
|
|
line.word 0x00 "PPC_PCFGR339,Pin Configuration Register 339"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2A6))&0x9000)==0x8000)
|
|
group.word 0x2A6++0x01
|
|
line.word 0x00 "PPC_PCFGR339,Pin Configuration Register 339"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2A6))&0x9000)==0x1000)
|
|
group.word 0x2A6++0x01
|
|
line.word 0x00 "PPC_PCFGR339,Pin Configuration Register 339"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2A6++0x01
|
|
line.word 0x00 "PPC_PCFGR339,Pin Configuration Register 339"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2A8))&0x9000)==0x9000)
|
|
group.word 0x2A8++0x01
|
|
line.word 0x00 "PPC_PCFGR340,Pin Configuration Register 340"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2A8))&0x9000)==0x8000)
|
|
group.word 0x2A8++0x01
|
|
line.word 0x00 "PPC_PCFGR340,Pin Configuration Register 340"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2A8))&0x9000)==0x1000)
|
|
group.word 0x2A8++0x01
|
|
line.word 0x00 "PPC_PCFGR340,Pin Configuration Register 340"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2A8++0x01
|
|
line.word 0x00 "PPC_PCFGR340,Pin Configuration Register 340"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2AA))&0x9000)==0x9000)
|
|
group.word 0x2AA++0x01
|
|
line.word 0x00 "PPC_PCFGR341,Pin Configuration Register 341"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2AA))&0x9000)==0x8000)
|
|
group.word 0x2AA++0x01
|
|
line.word 0x00 "PPC_PCFGR341,Pin Configuration Register 341"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2AA))&0x9000)==0x1000)
|
|
group.word 0x2AA++0x01
|
|
line.word 0x00 "PPC_PCFGR341,Pin Configuration Register 341"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2AA++0x01
|
|
line.word 0x00 "PPC_PCFGR341,Pin Configuration Register 341"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2AC))&0x9000)==0x9000)
|
|
group.word 0x2AC++0x01
|
|
line.word 0x00 "PPC_PCFGR342,Pin Configuration Register 342"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2AC))&0x9000)==0x8000)
|
|
group.word 0x2AC++0x01
|
|
line.word 0x00 "PPC_PCFGR342,Pin Configuration Register 342"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2AC))&0x9000)==0x1000)
|
|
group.word 0x2AC++0x01
|
|
line.word 0x00 "PPC_PCFGR342,Pin Configuration Register 342"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2AC++0x01
|
|
line.word 0x00 "PPC_PCFGR342,Pin Configuration Register 342"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2AE))&0x9000)==0x9000)
|
|
group.word 0x2AE++0x01
|
|
line.word 0x00 "PPC_PCFGR343,Pin Configuration Register 343"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2AE))&0x9000)==0x8000)
|
|
group.word 0x2AE++0x01
|
|
line.word 0x00 "PPC_PCFGR343,Pin Configuration Register 343"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2AE))&0x9000)==0x1000)
|
|
group.word 0x2AE++0x01
|
|
line.word 0x00 "PPC_PCFGR343,Pin Configuration Register 343"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2AE++0x01
|
|
line.word 0x00 "PPC_PCFGR343,Pin Configuration Register 343"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2B0))&0x9000)==0x9000)
|
|
group.word 0x2B0++0x01
|
|
line.word 0x00 "PPC_PCFGR344,Pin Configuration Register 344"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2B0))&0x9000)==0x8000)
|
|
group.word 0x2B0++0x01
|
|
line.word 0x00 "PPC_PCFGR344,Pin Configuration Register 344"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2B0))&0x9000)==0x1000)
|
|
group.word 0x2B0++0x01
|
|
line.word 0x00 "PPC_PCFGR344,Pin Configuration Register 344"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2B0++0x01
|
|
line.word 0x00 "PPC_PCFGR344,Pin Configuration Register 344"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2B2))&0x9000)==0x9000)
|
|
group.word 0x2B2++0x01
|
|
line.word 0x00 "PPC_PCFGR345,Pin Configuration Register 345"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2B2))&0x9000)==0x8000)
|
|
group.word 0x2B2++0x01
|
|
line.word 0x00 "PPC_PCFGR345,Pin Configuration Register 345"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2B2))&0x9000)==0x1000)
|
|
group.word 0x2B2++0x01
|
|
line.word 0x00 "PPC_PCFGR345,Pin Configuration Register 345"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2B2++0x01
|
|
line.word 0x00 "PPC_PCFGR345,Pin Configuration Register 345"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2B4))&0x9000)==0x9000)
|
|
group.word 0x2B4++0x01
|
|
line.word 0x00 "PPC_PCFGR346,Pin Configuration Register 346"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2B4))&0x9000)==0x8000)
|
|
group.word 0x2B4++0x01
|
|
line.word 0x00 "PPC_PCFGR346,Pin Configuration Register 346"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2B4))&0x9000)==0x1000)
|
|
group.word 0x2B4++0x01
|
|
line.word 0x00 "PPC_PCFGR346,Pin Configuration Register 346"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2B4++0x01
|
|
line.word 0x00 "PPC_PCFGR346,Pin Configuration Register 346"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2B6))&0x9000)==0x9000)
|
|
group.word 0x2B6++0x01
|
|
line.word 0x00 "PPC_PCFGR347,Pin Configuration Register 347"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2B6))&0x9000)==0x8000)
|
|
group.word 0x2B6++0x01
|
|
line.word 0x00 "PPC_PCFGR347,Pin Configuration Register 347"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2B6))&0x9000)==0x1000)
|
|
group.word 0x2B6++0x01
|
|
line.word 0x00 "PPC_PCFGR347,Pin Configuration Register 347"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2B6++0x01
|
|
line.word 0x00 "PPC_PCFGR347,Pin Configuration Register 347"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2B8))&0x9000)==0x9000)
|
|
group.word 0x2B8++0x01
|
|
line.word 0x00 "PPC_PCFGR348,Pin Configuration Register 348"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2B8))&0x9000)==0x8000)
|
|
group.word 0x2B8++0x01
|
|
line.word 0x00 "PPC_PCFGR348,Pin Configuration Register 348"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2B8))&0x9000)==0x1000)
|
|
group.word 0x2B8++0x01
|
|
line.word 0x00 "PPC_PCFGR348,Pin Configuration Register 348"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2B8++0x01
|
|
line.word 0x00 "PPC_PCFGR348,Pin Configuration Register 348"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2BA))&0x9000)==0x9000)
|
|
group.word 0x2BA++0x01
|
|
line.word 0x00 "PPC_PCFGR349,Pin Configuration Register 349"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2BA))&0x9000)==0x8000)
|
|
group.word 0x2BA++0x01
|
|
line.word 0x00 "PPC_PCFGR349,Pin Configuration Register 349"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2BA))&0x9000)==0x1000)
|
|
group.word 0x2BA++0x01
|
|
line.word 0x00 "PPC_PCFGR349,Pin Configuration Register 349"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2BA++0x01
|
|
line.word 0x00 "PPC_PCFGR349,Pin Configuration Register 349"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2BC))&0x9000)==0x9000)
|
|
group.word 0x2BC++0x01
|
|
line.word 0x00 "PPC_PCFGR350,Pin Configuration Register 350"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2BC))&0x9000)==0x8000)
|
|
group.word 0x2BC++0x01
|
|
line.word 0x00 "PPC_PCFGR350,Pin Configuration Register 350"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2BC))&0x9000)==0x1000)
|
|
group.word 0x2BC++0x01
|
|
line.word 0x00 "PPC_PCFGR350,Pin Configuration Register 350"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2BC++0x01
|
|
line.word 0x00 "PPC_PCFGR350,Pin Configuration Register 350"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2BE))&0x9000)==0x9000)
|
|
group.word 0x2BE++0x01
|
|
line.word 0x00 "PPC_PCFGR351,Pin Configuration Register 351"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2BE))&0x9000)==0x8000)
|
|
group.word 0x2BE++0x01
|
|
line.word 0x00 "PPC_PCFGR351,Pin Configuration Register 351"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2BE))&0x9000)==0x1000)
|
|
group.word 0x2BE++0x01
|
|
line.word 0x00 "PPC_PCFGR351,Pin Configuration Register 351"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2BE++0x01
|
|
line.word 0x00 "PPC_PCFGR351,Pin Configuration Register 351"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2C0))&0x9000)==0x9000)
|
|
group.word 0x2C0++0x01
|
|
line.word 0x00 "PPC_PCFGR352,Pin Configuration Register 352"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2C0))&0x9000)==0x8000)
|
|
group.word 0x2C0++0x01
|
|
line.word 0x00 "PPC_PCFGR352,Pin Configuration Register 352"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2C0))&0x9000)==0x1000)
|
|
group.word 0x2C0++0x01
|
|
line.word 0x00 "PPC_PCFGR352,Pin Configuration Register 352"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2C0++0x01
|
|
line.word 0x00 "PPC_PCFGR352,Pin Configuration Register 352"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2C2))&0x9000)==0x9000)
|
|
group.word 0x2C2++0x01
|
|
line.word 0x00 "PPC_PCFGR353,Pin Configuration Register 353"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2C2))&0x9000)==0x8000)
|
|
group.word 0x2C2++0x01
|
|
line.word 0x00 "PPC_PCFGR353,Pin Configuration Register 353"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2C2))&0x9000)==0x1000)
|
|
group.word 0x2C2++0x01
|
|
line.word 0x00 "PPC_PCFGR353,Pin Configuration Register 353"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2C2++0x01
|
|
line.word 0x00 "PPC_PCFGR353,Pin Configuration Register 353"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2C4))&0x9000)==0x9000)
|
|
group.word 0x2C4++0x01
|
|
line.word 0x00 "PPC_PCFGR354,Pin Configuration Register 354"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2C4))&0x9000)==0x8000)
|
|
group.word 0x2C4++0x01
|
|
line.word 0x00 "PPC_PCFGR354,Pin Configuration Register 354"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2C4))&0x9000)==0x1000)
|
|
group.word 0x2C4++0x01
|
|
line.word 0x00 "PPC_PCFGR354,Pin Configuration Register 354"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2C4++0x01
|
|
line.word 0x00 "PPC_PCFGR354,Pin Configuration Register 354"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2C6))&0x9000)==0x9000)
|
|
group.word 0x2C6++0x01
|
|
line.word 0x00 "PPC_PCFGR355,Pin Configuration Register 355"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2C6))&0x9000)==0x8000)
|
|
group.word 0x2C6++0x01
|
|
line.word 0x00 "PPC_PCFGR355,Pin Configuration Register 355"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2C6))&0x9000)==0x1000)
|
|
group.word 0x2C6++0x01
|
|
line.word 0x00 "PPC_PCFGR355,Pin Configuration Register 355"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2C6++0x01
|
|
line.word 0x00 "PPC_PCFGR355,Pin Configuration Register 355"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2C8))&0x9000)==0x9000)
|
|
group.word 0x2C8++0x01
|
|
line.word 0x00 "PPC_PCFGR356,Pin Configuration Register 356"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2C8))&0x9000)==0x8000)
|
|
group.word 0x2C8++0x01
|
|
line.word 0x00 "PPC_PCFGR356,Pin Configuration Register 356"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2C8))&0x9000)==0x1000)
|
|
group.word 0x2C8++0x01
|
|
line.word 0x00 "PPC_PCFGR356,Pin Configuration Register 356"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2C8++0x01
|
|
line.word 0x00 "PPC_PCFGR356,Pin Configuration Register 356"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2CA))&0x9000)==0x9000)
|
|
group.word 0x2CA++0x01
|
|
line.word 0x00 "PPC_PCFGR357,Pin Configuration Register 357"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2CA))&0x9000)==0x8000)
|
|
group.word 0x2CA++0x01
|
|
line.word 0x00 "PPC_PCFGR357,Pin Configuration Register 357"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2CA))&0x9000)==0x1000)
|
|
group.word 0x2CA++0x01
|
|
line.word 0x00 "PPC_PCFGR357,Pin Configuration Register 357"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2CA++0x01
|
|
line.word 0x00 "PPC_PCFGR357,Pin Configuration Register 357"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2CC))&0x9000)==0x9000)
|
|
group.word 0x2CC++0x01
|
|
line.word 0x00 "PPC_PCFGR358,Pin Configuration Register 358"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2CC))&0x9000)==0x8000)
|
|
group.word 0x2CC++0x01
|
|
line.word 0x00 "PPC_PCFGR358,Pin Configuration Register 358"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2CC))&0x9000)==0x1000)
|
|
group.word 0x2CC++0x01
|
|
line.word 0x00 "PPC_PCFGR358,Pin Configuration Register 358"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2CC++0x01
|
|
line.word 0x00 "PPC_PCFGR358,Pin Configuration Register 358"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2CE))&0x9000)==0x9000)
|
|
group.word 0x2CE++0x01
|
|
line.word 0x00 "PPC_PCFGR359,Pin Configuration Register 359"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2CE))&0x9000)==0x8000)
|
|
group.word 0x2CE++0x01
|
|
line.word 0x00 "PPC_PCFGR359,Pin Configuration Register 359"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2CE))&0x9000)==0x1000)
|
|
group.word 0x2CE++0x01
|
|
line.word 0x00 "PPC_PCFGR359,Pin Configuration Register 359"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2CE++0x01
|
|
line.word 0x00 "PPC_PCFGR359,Pin Configuration Register 359"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2D0))&0x9000)==0x9000)
|
|
group.word 0x2D0++0x01
|
|
line.word 0x00 "PPC_PCFGR360,Pin Configuration Register 360"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2D0))&0x9000)==0x8000)
|
|
group.word 0x2D0++0x01
|
|
line.word 0x00 "PPC_PCFGR360,Pin Configuration Register 360"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2D0))&0x9000)==0x1000)
|
|
group.word 0x2D0++0x01
|
|
line.word 0x00 "PPC_PCFGR360,Pin Configuration Register 360"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2D0++0x01
|
|
line.word 0x00 "PPC_PCFGR360,Pin Configuration Register 360"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2D2))&0x9000)==0x9000)
|
|
group.word 0x2D2++0x01
|
|
line.word 0x00 "PPC_PCFGR361,Pin Configuration Register 361"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2D2))&0x9000)==0x8000)
|
|
group.word 0x2D2++0x01
|
|
line.word 0x00 "PPC_PCFGR361,Pin Configuration Register 361"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2D2))&0x9000)==0x1000)
|
|
group.word 0x2D2++0x01
|
|
line.word 0x00 "PPC_PCFGR361,Pin Configuration Register 361"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2D2++0x01
|
|
line.word 0x00 "PPC_PCFGR361,Pin Configuration Register 361"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2D4))&0x9000)==0x9000)
|
|
group.word 0x2D4++0x01
|
|
line.word 0x00 "PPC_PCFGR362,Pin Configuration Register 362"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2D4))&0x9000)==0x8000)
|
|
group.word 0x2D4++0x01
|
|
line.word 0x00 "PPC_PCFGR362,Pin Configuration Register 362"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2D4))&0x9000)==0x1000)
|
|
group.word 0x2D4++0x01
|
|
line.word 0x00 "PPC_PCFGR362,Pin Configuration Register 362"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2D4++0x01
|
|
line.word 0x00 "PPC_PCFGR362,Pin Configuration Register 362"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
if ((d.l((ad:0xb07e8000+0x2D6))&0x9000)==0x9000)
|
|
group.word 0x2D6++0x01
|
|
line.word 0x00 "PPC_PCFGR363,Pin Configuration Register 363"
|
|
rbitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
rbitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
rbitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2D6))&0x9000)==0x8000)
|
|
group.word 0x2D6++0x01
|
|
line.word 0x00 "PPC_PCFGR363,Pin Configuration Register 363"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
elif ((d.l((ad:0xb07e8000+0x2D6))&0x9000)==0x1000)
|
|
group.word 0x2D6++0x01
|
|
line.word 0x00 "PPC_PCFGR363,Pin Configuration Register 363"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 14. " POD ,Pin Output Data" "Low,High"
|
|
bitfld.word 0x00 13. " PID ,Pin Input Data" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
else
|
|
group.word 0x2D6++0x01
|
|
line.word 0x00 "PPC_PCFGR363,Pin Configuration Register 363"
|
|
bitfld.word 0x00 15. " POE ,Pin Output Enable" "Hi-Z,Enabled"
|
|
bitfld.word 0x00 12. " PIE ,Pin Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " PIL ,Pin Input Level" "CMOS type A,Automotive,TTL,CMOS type B"
|
|
bitfld.word 0x00 9. " PUE ,Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PDE ,Pull-Down Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " ODR ,Pin Output Drive" "5 mA,2 mA,30 mA,Reserved"
|
|
bitfld.word 0x00 0.--2. " POF ,Port Pin Output Function Select" "GPIO,B,C,D,E,F,G,H"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
tree "External Interrupt Capture Unit"
|
|
base ad:0xb0628000
|
|
width 13.
|
|
if (((d.l(ad:0xb0628000))&0x800000)==0x0)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "EICU0_CNFGR,Configuration Register"
|
|
bitfld.long 0x00 26. " IRQEN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " OBSEN ,Observation Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DATARESET ,Data Reset" "No effect,Reset"
|
|
bitfld.long 0x00 23. " DATAVALID ,Data Valid" "Invalid,Valid"
|
|
bitfld.long 0x00 22. " BUSY ,Sampling Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " OBSCH ,Observed Channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 2.--7. " PRESCALE ,Prescale" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--1. " CLKSEL ,Clock Select" "Slow RC,RC,Main,Sub"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "EICU0_CNFGR,Configuration Register"
|
|
bitfld.long 0x00 26. " IRQEN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " OBSEN ,Observation Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DATARESET ,Data Reset" "No effect,Reset"
|
|
bitfld.long 0x00 23. " DATAVALID ,Data Valid" "Invalid,Valid"
|
|
bitfld.long 0x00 22. " BUSY ,Sampling Status" "Not busy,Busy"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--20. " OBSCH ,Observed Channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 2.--7. " PRESCALE ,Prescale" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--1. " CLKSEL ,Clock Select" "Slow RC,RC,Main,Sub"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EICU0_IRENR,External Interrupt Pin Enable Register"
|
|
bitfld.long 0x00 31. " IREN[31] ,External Interrupt Pin 31 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IREN[30] ,External Interrupt Pin 30 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IREN[29] ,External Interrupt Pin 29 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " IREN[28] ,External Interrupt Pin 28 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IREN[27] ,External Interrupt Pin 27 Observe Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " IREN[26] ,External Interrupt Pin 26 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IREN[25] ,External Interrupt Pin 25 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IREN[24] ,External Interrupt Pin 24 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IREN[23] ,External Interrupt Pin 23 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " IREN[22] ,External Interrupt Pin 22 Observe Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IREN[21] ,External Interrupt Pin 21 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IREN[20] ,External Interrupt Pin 20 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " IREN[19] ,External Interrupt Pin 19 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IREN[18] ,External Interrupt Pin 18 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IREN[17] ,External Interrupt Pin 17 Observe Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IREN[16] ,External Interrupt Pin 16 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IREN[15] ,External Interrupt Pin 15 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IREN[14] ,External Interrupt Pin 14 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " IREN[13] ,External Interrupt Pin 13 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IREN[12] ,External Interrupt Pin 12 Observe Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IREN[11] ,External Interrupt Pin 11 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " IREN[10] ,External Interrupt Pin 10 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IREN[9] ,External Interrupt Pin 9 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IREN[8] ,External Interrupt Pin 8 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " IREN[7] ,External Interrupt Pin 7 Observe Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IREN[6] ,External Interrupt Pin 6 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IREN[5] ,External Interrupt Pin 5 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IREN[4] ,External Interrupt Pin 4 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IREN[3] ,External Interrupt Pin 3 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IREN[2] ,External Interrupt Pin 2 Observe Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IREN[1] ,External Interrupt Pin 1 Observe Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IREN[0] ,External Interrupt Pin 0 Observe Enable" "Disabled,Enabled"
|
|
if ((d.l(ad:0xb0628000)&0x800000)==0x800000)
|
|
rgroup.long 0x08++0x1f
|
|
line.long 0x0 "EICU0_SPLR0,Sample Register 0"
|
|
line.long 0x4 "EICU0_SPLR1,Sample Register 1"
|
|
line.long 0x8 "EICU0_SPLR2,Sample Register 2"
|
|
line.long 0xC "EICU0_SPLR3,Sample Register 3"
|
|
line.long 0x10 "EICU0_SPLR4,Sample Register 4"
|
|
line.long 0x14 "EICU0_SPLR5,Sample Register 5"
|
|
line.long 0x18 "EICU0_SPLR6,Sample Register 6"
|
|
line.long 0x1C "EICU0_SPLR7,Sample Register 7"
|
|
else
|
|
hgroup.long 0x08++0x1f
|
|
hide.long 0x0 "EICU0_SPLR0,Sample Register 0"
|
|
hide.long 0x4 "EICU0_SPLR1,Sample Register 1"
|
|
hide.long 0x8 "EICU0_SPLR2,Sample Register 2"
|
|
hide.long 0xC "EICU0_SPLR3,Sample Register 3"
|
|
hide.long 0x10 "EICU0_SPLR4,Sample Register 4"
|
|
hide.long 0x14 "EICU0_SPLR5,Sample Register 5"
|
|
hide.long 0x18 "EICU0_SPLR6,Sample Register 6"
|
|
hide.long 0x1C "EICU0_SPLR7,Sample Register 7"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
tree "Timing Protection Unit"
|
|
base ad:0xb0408000
|
|
width 13.
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TPU0_UNLOCK,TPU Unlock Register"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "TPU0_LST,TPU Lock Status Register"
|
|
bitfld.long 0x00 0. " LST ,TPU Lock Status" "Not locked,Locked"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "TPU0_CFG,TPU Configuration Register"
|
|
bitfld.long 0x00 24. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " GLBPSE ,Global Prescaler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--21. " GLBPS ,Global Prescaler" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
bitfld.long 0x00 0. " INTE ,TPU Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "TPU0_TIR,TPU Timer Interrupt Request Register"
|
|
bitfld.long 0x00 7. " IR[7] ,Interrupt from timer 7 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " IR[6] ,Interrupt from timer 6 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " IR[5] ,Interrupt from timer 5 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " IR[4] ,Interrupt from timer 4 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " IR[3] ,Interrupt from timer 3 Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IR[2] ,Interrupt from timer 2 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " IR[1] ,Interrupt from timer 1 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " IR[0] ,Interrupt from timer 0 Request" "Not requested,Requested"
|
|
line.long 0x04 "TPU0_TST,TPU Timer Status Register"
|
|
bitfld.long 0x04 7. " TS[7] ,Timer 7 Status" "Not active,Active"
|
|
bitfld.long 0x04 6. " TS[6] ,Timer 6 Status" "Not active,Active"
|
|
bitfld.long 0x04 5. " TS[5] ,Timer 5 Status" "Not active,Active"
|
|
bitfld.long 0x04 4. " TS[4] ,Timer 4 Status" "Not active,Active"
|
|
bitfld.long 0x04 3. " TS[3] ,Timer 3 Status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 2. " TS[2] ,Timer 2 Status" "Not active,Active"
|
|
bitfld.long 0x04 1. " TS[1] ,Timer 1 Status" "Not active,Active"
|
|
bitfld.long 0x04 0. " TS[0] ,Timer 0 Status" "Not active,Active"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TPU0_TIE,TPU Timer Interrupt Enable Register"
|
|
bitfld.long 0x00 7. " IE[7] ,Timer 7 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IE[6] ,Timer 6 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IE[5] ,Timer 5 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IE[4] ,Timer 4 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IE[3] ,Timer 3 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IE[2] ,Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IE[1] ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IE[0] ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TPU0_MID,TPU Module ID Register"
|
|
tree "Timers Control Register 0"
|
|
group.long 0x30++0x1f
|
|
line.long 0x0 "TPU0_TCN00,TPU Timer 0 Control Register 0"
|
|
bitfld.long 0x0 31. " START ,Start" "No effect,Start"
|
|
bitfld.long 0x0 30. " STOP ,Stop" "No effect,Stop"
|
|
bitfld.long 0x0 29. " CONT ,Continue" "No effect,Continue"
|
|
bitfld.long 0x0 28. " IES ,Interrupt Enable Set" "No effect,Set"
|
|
bitfld.long 0x0 27. " IEC ,Interrupt Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 26. " IRC ,Interrupt Request Clear" "No effect,Clear"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. " ECPL ,End Count or Pre Load"
|
|
line.long 0x4 "TPU0_TCN01,TPU Timer 1 Control Register 0"
|
|
bitfld.long 0x4 31. " START ,Start" "No effect,Start"
|
|
bitfld.long 0x4 30. " STOP ,Stop" "No effect,Stop"
|
|
bitfld.long 0x4 29. " CONT ,Continue" "No effect,Continue"
|
|
bitfld.long 0x4 28. " IES ,Interrupt Enable Set" "No effect,Set"
|
|
bitfld.long 0x4 27. " IEC ,Interrupt Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x4 26. " IRC ,Interrupt Request Clear" "No effect,Clear"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. " ECPL ,End Count or Pre Load"
|
|
line.long 0x8 "TPU0_TCN02,TPU Timer 2 Control Register 0"
|
|
bitfld.long 0x8 31. " START ,Start" "No effect,Start"
|
|
bitfld.long 0x8 30. " STOP ,Stop" "No effect,Stop"
|
|
bitfld.long 0x8 29. " CONT ,Continue" "No effect,Continue"
|
|
bitfld.long 0x8 28. " IES ,Interrupt Enable Set" "No effect,Set"
|
|
bitfld.long 0x8 27. " IEC ,Interrupt Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x8 26. " IRC ,Interrupt Request Clear" "No effect,Clear"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. " ECPL ,End Count or Pre Load"
|
|
line.long 0xC "TPU0_TCN03,TPU Timer 3 Control Register 0"
|
|
bitfld.long 0xC 31. " START ,Start" "No effect,Start"
|
|
bitfld.long 0xC 30. " STOP ,Stop" "No effect,Stop"
|
|
bitfld.long 0xC 29. " CONT ,Continue" "No effect,Continue"
|
|
bitfld.long 0xC 28. " IES ,Interrupt Enable Set" "No effect,Set"
|
|
bitfld.long 0xC 27. " IEC ,Interrupt Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0xC 26. " IRC ,Interrupt Request Clear" "No effect,Clear"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. " ECPL ,End Count or Pre Load"
|
|
line.long 0x10 "TPU0_TCN04,TPU Timer 4 Control Register 0"
|
|
bitfld.long 0x10 31. " START ,Start" "No effect,Start"
|
|
bitfld.long 0x10 30. " STOP ,Stop" "No effect,Stop"
|
|
bitfld.long 0x10 29. " CONT ,Continue" "No effect,Continue"
|
|
bitfld.long 0x10 28. " IES ,Interrupt Enable Set" "No effect,Set"
|
|
bitfld.long 0x10 27. " IEC ,Interrupt Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x10 26. " IRC ,Interrupt Request Clear" "No effect,Clear"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. " ECPL ,End Count or Pre Load"
|
|
line.long 0x14 "TPU0_TCN05,TPU Timer 5 Control Register 0"
|
|
bitfld.long 0x14 31. " START ,Start" "No effect,Start"
|
|
bitfld.long 0x14 30. " STOP ,Stop" "No effect,Stop"
|
|
bitfld.long 0x14 29. " CONT ,Continue" "No effect,Continue"
|
|
bitfld.long 0x14 28. " IES ,Interrupt Enable Set" "No effect,Set"
|
|
bitfld.long 0x14 27. " IEC ,Interrupt Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x14 26. " IRC ,Interrupt Request Clear" "No effect,Clear"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. " ECPL ,End Count or Pre Load"
|
|
line.long 0x18 "TPU0_TCN06,TPU Timer 6 Control Register 0"
|
|
bitfld.long 0x18 31. " START ,Start" "No effect,Start"
|
|
bitfld.long 0x18 30. " STOP ,Stop" "No effect,Stop"
|
|
bitfld.long 0x18 29. " CONT ,Continue" "No effect,Continue"
|
|
bitfld.long 0x18 28. " IES ,Interrupt Enable Set" "No effect,Set"
|
|
bitfld.long 0x18 27. " IEC ,Interrupt Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x18 26. " IRC ,Interrupt Request Clear" "No effect,Clear"
|
|
hexmask.long.tbyte 0x18 0.--23. 1. " ECPL ,End Count or Pre Load"
|
|
line.long 0x1C "TPU0_TCN07,TPU Timer 7 Control Register 0"
|
|
bitfld.long 0x1C 31. " START ,Start" "No effect,Start"
|
|
bitfld.long 0x1C 30. " STOP ,Stop" "No effect,Stop"
|
|
bitfld.long 0x1C 29. " CONT ,Continue" "No effect,Continue"
|
|
bitfld.long 0x1C 28. " IES ,Interrupt Enable Set" "No effect,Set"
|
|
bitfld.long 0x1C 27. " IEC ,Interrupt Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x1C 26. " IRC ,Interrupt Request Clear" "No effect,Clear"
|
|
hexmask.long.tbyte 0x1C 0.--23. 1. " ECPL ,End Count or Pre Load"
|
|
tree.end
|
|
tree "Timers Control Register 1"
|
|
if (((d.l(ad:0xb0408000+0x50))&0x4)==0x4)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TPU0_TCN10,TPU Timer 0 Control Register 1"
|
|
bitfld.long 0x00 4. " PL ,Preload" "Not active,Active"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
else
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TPU0_TCN10,TPU Timer 0 Control Register 1"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
endif
|
|
if (((d.l(ad:0xb0408000+0x54))&0x4)==0x4)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "TPU0_TCN11,TPU Timer 1 Control Register 1"
|
|
bitfld.long 0x00 4. " PL ,Preload" "Not active,Active"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "TPU0_TCN11,TPU Timer 1 Control Register 1"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
endif
|
|
if (((d.l(ad:0xb0408000+0x58))&0x4)==0x4)
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "TPU0_TCN12,TPU Timer 2 Control Register 1"
|
|
bitfld.long 0x00 4. " PL ,Preload" "Not active,Active"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "TPU0_TCN12,TPU Timer 2 Control Register 1"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
endif
|
|
if (((d.l(ad:0xb0408000+0x5C))&0x4)==0x4)
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "TPU0_TCN13,TPU Timer 3 Control Register 1"
|
|
bitfld.long 0x00 4. " PL ,Preload" "Not active,Active"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
else
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "TPU0_TCN13,TPU Timer 3 Control Register 1"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
endif
|
|
if (((d.l(ad:0xb0408000+0x60))&0x4)==0x4)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TPU0_TCN14,TPU Timer 4 Control Register 1"
|
|
bitfld.long 0x00 4. " PL ,Preload" "Not active,Active"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TPU0_TCN14,TPU Timer 4 Control Register 1"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
endif
|
|
if (((d.l(ad:0xb0408000+0x64))&0x4)==0x4)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "TPU0_TCN15,TPU Timer 5 Control Register 1"
|
|
bitfld.long 0x00 4. " PL ,Preload" "Not active,Active"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "TPU0_TCN15,TPU Timer 5 Control Register 1"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
endif
|
|
if (((d.l(ad:0xb0408000+0x68))&0x4)==0x4)
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "TPU0_TCN16,TPU Timer 6 Control Register 1"
|
|
bitfld.long 0x00 4. " PL ,Preload" "Not active,Active"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
else
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "TPU0_TCN16,TPU Timer 6 Control Register 1"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
endif
|
|
if (((d.l(ad:0xb0408000+0x6C))&0x4)==0x4)
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "TPU0_TCN17,TPU Timer 7 Control Register 1"
|
|
bitfld.long 0x00 4. " PL ,Preload" "Not active,Active"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
else
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "TPU0_TCN17,TPU Timer 7 Control Register 1"
|
|
bitfld.long 0x00 3. " FRT ,Free Running Timer Mode" "Not active,Active"
|
|
bitfld.long 0x00 2. " TMOD ,TPU Mode" "Normal,Overflow"
|
|
bitfld.long 0x00 0.--1. " PS ,Individual Prescaler" "/1,/2,/4,/16"
|
|
endif
|
|
tree.end
|
|
tree "Timers Current Count Register"
|
|
rgroup.long 0x70++0x1f
|
|
line.long 0x0 "TPU0_TCC0,TPU Timer 0 Current Count Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. " TCC ,Timer Current Count"
|
|
line.long 0x4 "TPU0_TCC1,TPU Timer 1 Current Count Register"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. " TCC ,Timer Current Count"
|
|
line.long 0x8 "TPU0_TCC2,TPU Timer 2 Current Count Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. " TCC ,Timer Current Count"
|
|
line.long 0xC "TPU0_TCC3,TPU Timer 3 Current Count Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. " TCC ,Timer Current Count"
|
|
line.long 0x10 "TPU0_TCC4,TPU Timer 4 Current Count Register"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. " TCC ,Timer Current Count"
|
|
line.long 0x14 "TPU0_TCC5,TPU Timer 5 Current Count Register"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. " TCC ,Timer Current Count"
|
|
line.long 0x18 "TPU0_TCC6,TPU Timer 6 Current Count Register"
|
|
hexmask.long.tbyte 0x18 0.--23. 1. " TCC ,Timer Current Count"
|
|
line.long 0x1C "TPU0_TCC7,TPU Timer 7 Current Count Register"
|
|
hexmask.long.tbyte 0x1C 0.--23. 1. " TCC ,Timer Current Count"
|
|
tree.end
|
|
width 12.
|
|
tree.end
|
|
tree "Peripheral Protection Unit"
|
|
base ad:0xb0a00000
|
|
width 19.
|
|
tree "Peripheral Read Attribute Registers"
|
|
if (((d.l(ad:0xb0a00248))&0x1)==0x0)
|
|
group.long 0x188++0x2F
|
|
line.long 0x00 "PPU0_PR2_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 2 (Peripheral 64 to 95)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x00 31. -0x180 31. -0xc0 31. " PR[95]_set/clr ,Peripheral 95 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 30. -0x180 30. -0xc0 30. " PR[94]_set/clr ,Peripheral 94 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 29. -0x180 29. -0xc0 29. " PR[93]_set/clr ,Peripheral 93 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 28. -0x180 28. -0xc0 28. " PR[92]_set/clr ,Peripheral 92 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x180 27. -0xc0 27. " PR[91]_set/clr ,Peripheral 91 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 26. -0x180 26. -0xc0 26. " PR[90]_set/clr ,Peripheral 90 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 25. -0x180 25. -0xc0 25. " PR[89]_set/clr ,Peripheral 89 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 24. -0x180 24. -0xc0 24. " PR[88]_set/clr ,Peripheral 88 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x180 23. -0xc0 23. " PR[87]_set/clr ,Peripheral 87 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 22. -0x180 22. -0xc0 22. " PR[86]_set/clr ,Peripheral 86 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 21. -0x180 21. -0xc0 21. " PR[85]_set/clr ,Peripheral 85 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 20. -0x180 20. -0xc0 20. " PR[84]_set/clr ,Peripheral 84 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x180 19. -0xc0 19. " PR[83]_set/clr ,Peripheral 83 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 18. -0x180 18. -0xc0 18. " PR[82]_set/clr ,Peripheral 82 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 17. -0x180 17. -0xc0 17. " PR[81]_set/clr ,Peripheral 81 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x00 16. -0x180 16. -0xc0 16. " PR[80]_set/clr ,Peripheral 80 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x00 15. -0x180 15. -0xc0 15. " PR[79]_set/clr ,Peripheral 79 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 14. -0x180 14. -0xc0 14. " PR[78]_set/clr ,Peripheral 78 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 13. -0x180 13. -0xc0 13. " PR[77]_set/clr ,Peripheral 77 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 12. -0x180 12. -0xc0 12. " PR[76]_set/clr ,Peripheral 76 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 11. -0x180 11. -0xc0 11. " PR[75]_set/clr ,Peripheral 75 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 10. -0x180 10. -0xc0 10. " PR[74]_set/clr ,Peripheral 74 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 9. -0x180 9. -0xc0 9. " PR[73]_set/clr ,Peripheral 73 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x180 8. -0xc0 8. " PR[72]_set/clr ,Peripheral 72 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 7. -0x180 7. -0xc0 7. " PR[71]_set/clr ,Peripheral 71 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x00 6. -0x180 6. -0xc0 6. " PR[70]_set/clr ,Peripheral 70 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 5. -0x180 5. -0xc0 5. " PR[69]_set/clr ,Peripheral 69 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x180 4. -0xc0 4. " PR[68]_set/clr ,Peripheral 68 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 3. -0x180 3. -0xc0 3. " PR[67]_set/clr ,Peripheral 67 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 2. -0x180 2. -0xc0 2. " PR[66]_set/clr ,Peripheral 66 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 1. -0x180 1. -0xc0 1. " PR[65]_set/clr ,Peripheral 65 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x180 0. -0xc0 0. " PR[64]_set/clr ,Peripheral 64 Read Attribute" "Not read,Read"
|
|
line.long 0x04 "PPU0_PR3_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 3 (Peripheral 96 to 127)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x04 31. -0x184 31. -0xc4 31. " PR[127]_set/clr ,Peripheral 127 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 30. -0x184 30. -0xc4 30. " PR[126]_set/clr ,Peripheral 126 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 29. -0x184 29. -0xc4 29. " PR[125]_set/clr ,Peripheral 125 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 28. -0x184 28. -0xc4 28. " PR[124]_set/clr ,Peripheral 124 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x04 27. -0x184 27. -0xc4 27. " PR[123]_set/clr ,Peripheral 123 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 26. -0x184 26. -0xc4 26. " PR[122]_set/clr ,Peripheral 122 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 25. -0x184 25. -0xc4 25. " PR[121]_set/clr ,Peripheral 121 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x04 24. -0x184 24. -0xc4 24. " PR[120]_set/clr ,Peripheral 120 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x04 23. -0x184 23. -0xc4 23. " PR[119]_set/clr ,Peripheral 119 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 22. -0x184 22. -0xc4 22. " PR[118]_set/clr ,Peripheral 118 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 21. -0x184 21. -0xc4 21. " PR[117]_set/clr ,Peripheral 117 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 20. -0x184 20. -0xc4 20. " PR[116]_set/clr ,Peripheral 116 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x04 19. -0x184 19. -0xc4 19. " PR[115]_set/clr ,Peripheral 115 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 18. -0x184 18. -0xc4 18. " PR[114]_set/clr ,Peripheral 114 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x04 17. -0x184 17. -0xc4 17. " PR[113]_set/clr ,Peripheral 113 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 16. -0x184 16. -0xc4 16. " PR[112]_set/clr ,Peripheral 112 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x04 15. -0x184 15. -0xc4 15. " PR[111]_set/clr ,Peripheral 111 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 14. -0x184 14. -0xc4 14. " PR[110]_set/clr ,Peripheral 110 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x04 13. -0x184 13. -0xc4 13. " PR[109]_set/clr ,Peripheral 109 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 12. -0x184 12. -0xc4 12. " PR[108]_set/clr ,Peripheral 108 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 11. -0x184 11. -0xc4 11. " PR[107]_set/clr ,Peripheral 107 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 10. -0x184 10. -0xc4 10. " PR[106]_set/clr ,Peripheral 106 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x04 9. -0x184 9. -0xc4 9. " PR[105]_set/clr ,Peripheral 105 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x04 8. -0x184 8. -0xc4 8. " PR[104]_set/clr ,Peripheral 104 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF125")
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.long 0x04 7. -0x184 7. -0xc4 7. " PR[103]_set/clr ,Peripheral 103 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 6. -0x184 6. -0xc4 6. " PR[102]_set/clr ,Peripheral 102 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 5. -0x184 5. -0xc4 5. " PR[101]_set/clr ,Peripheral 101 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x04 4. -0x184 4. -0xc4 4. " PR[100]_set/clr ,Peripheral 100 Read Attribute" "Not read,Read"
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.long 0x04 3. -0x184 3. -0xc4 3. " PR[99]_set/clr ,Peripheral 99 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 2. -0x184 2. -0xc4 2. " PR[98]_set/clr ,Peripheral 98 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x04 1. -0x184 1. -0xc4 1. " PR[97]_set/clr ,Peripheral 97 Read Attribute" "Not read,Read"
|
|
endif
|
|
endif
|
|
setclrfld.long 0x04 0. -0x184 0. -0xc4 0. " PR[96]_set/clr ,Peripheral 96 Read Attribute" "Not read,Read"
|
|
line.long 0x08 "PPU0_PR4_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 4 (Peripheral 128 to 159)"
|
|
sif cpu()!="MB9EF126"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.long 0x08 31. -0x188 31. -0xc8 31. " PR[128]_set/clr ,Peripheral 128 Read Attribute" "Not read,Read"
|
|
endif
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.long 0x08 30. -0x188 30. -0xc8 30. " PR[129]_set/clr ,Peripheral 129 Read Attribute" "Not read,Read"
|
|
sif cpu()!="MB9DF125"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.long 0x08 29. -0x188 29. -0xc8 29. " PR[130]_set/clr ,Peripheral 130 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x08 28. -0x188 28. -0xc8 28. " PR[131]_set/clr ,Peripheral 131 Read Attribute" "Not read,Read"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.long 0x08 27. -0x188 27. -0xc8 27. " PR[132]_set/clr ,Peripheral 132 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 26. -0x188 26. -0xc8 26. " PR[133]_set/clr ,Peripheral 133 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x08 25. -0x188 25. -0xc8 25. " PR[134]_set/clr ,Peripheral 134 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 24. -0x188 24. -0xc8 24. " PR[135]_set/clr ,Peripheral 135 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 23. -0x188 23. -0xc8 23. " PR[136]_set/clr ,Peripheral 136 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 22. -0x188 22. -0xc8 22. " PR[137]_set/clr ,Peripheral 137 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x08 21. -0x188 21. -0xc8 21. " PR[138]_set/clr ,Peripheral 138 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x08 20. -0x188 20. -0xc8 20. " PR[139]_set/clr ,Peripheral 139 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif cpu()!="MB9EF126"
|
|
setclrfld.long 0x08 19. -0x188 19. -0xc8 19. " PR[140]_set/clr ,Peripheral 140 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 18. -0x188 18. -0xc8 18. " PR[141]_set/clr ,Peripheral 141 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 17. -0x188 17. -0xc8 17. " PR[142]_set/clr ,Peripheral 142 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
endif
|
|
endif
|
|
endif
|
|
setclrfld.long 0x08 16. -0x188 16. -0xc8 16. " PR[143]_set/clr ,Peripheral 143 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x08 15. -0x188 15. -0xc8 15. " PR[144]_set/clr ,Peripheral 144 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 14. -0x188 14. -0xc8 14. " PR[145]_set/clr ,Peripheral 145 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x08 13. -0x188 13. -0xc8 13. " PR[146]_set/clr ,Peripheral 146 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 12. -0x188 12. -0xc8 12. " PR[147]_set/clr ,Peripheral 147 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 11. -0x188 11. -0xc8 11. " PR[148]_set/clr ,Peripheral 148 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 10. -0x188 10. -0xc8 10. " PR[149]_set/clr ,Peripheral 149 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x08 9. -0x188 9. -0xc8 9. " PR[150]_set/clr ,Peripheral 150 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 8. -0x188 8. -0xc8 8. " PR[151]_set/clr ,Peripheral 151 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 7. -0x188 7. -0xc8 7. " PR[152]_set/clr ,Peripheral 152 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 6. -0x188 6. -0xc8 6. " PR[153]_set/clr ,Peripheral 153 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x08 5. -0x188 5. -0xc8 5. " PR[154]_set/clr ,Peripheral 154 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 4. -0x188 4. -0xc8 4. " PR[155]_set/clr ,Peripheral 155 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 3. -0x188 3. -0xc8 3. " PR[156]_set/clr ,Peripheral 156 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x08 2. -0x188 2. -0xc8 2. " PR[157]_set/clr ,Peripheral 157 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x08 1. -0x188 1. -0xc8 1. " PR[158]_set/clr ,Peripheral 158 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 0. -0x188 0. -0xc8 0. " PR[159]_set/clr ,Peripheral 159 Read Attribute" "Not read,Read"
|
|
line.long 0x0c "PPU0_PR5_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 5 (Peripheral 160 to 191)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9DF125")
|
|
sif (cpu()!="MB9EF126"&&cpu()!="MB9DF126")
|
|
setclrfld.long 0x0c 31. -0x18c 31. -0xcc 31. " PR[191]_set/clr ,Peripheral 191 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 30. -0x18c 30. -0xcc 30. " PR[190]_set/clr ,Peripheral 190 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 29. -0x18c 29. -0xcc 29. " PR[189]_set/clr ,Peripheral 189 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 28. -0x18c 28. -0xcc 28. " PR[188]_set/clr ,Peripheral 188 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x0c 27. -0x18c 27. -0xcc 27. " PR[187]_set/clr ,Peripheral 187 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 26. -0x18c 26. -0xcc 26. " PR[186]_set/clr ,Peripheral 186 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 25. -0x18c 25. -0xcc 25. " PR[185]_set/clr ,Peripheral 185 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 24. -0x18c 24. -0xcc 24. " PR[184]_set/clr ,Peripheral 184 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x0c 23. -0x18c 23. -0xcc 23. " PR[183]_set/clr ,Peripheral 183 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 22. -0x18c 22. -0xcc 22. " PR[182]_set/clr ,Peripheral 182 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 21. -0x18c 21. -0xcc 21. " PR[181]_set/clr ,Peripheral 181 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 20. -0x18c 20. -0xcc 20. " PR[180]_set/clr ,Peripheral 180 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. -0x18c 19. -0xcc 19. " PR[179]_set/clr ,Peripheral 179 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x0c 18. -0x18c 18. -0xcc 18. " PR[178]_set/clr ,Peripheral 178 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x0c 17. -0x18c 17. -0xcc 17. " PR[177]_set/clr ,Peripheral 177 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 16. -0x18c 16. -0xcc 16. " PR[176]_set/clr ,Peripheral 176 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x0c 15. -0x18c 15. -0xcc 15. " PR[175]_set/clr ,Peripheral 175 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 14. -0x18c 14. -0xcc 14. " PR[174]_set/clr ,Peripheral 174 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 13. -0x18c 13. -0xcc 13. " PR[173]_set/clr ,Peripheral 173 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 12. -0x18c 12. -0xcc 12. " PR[172]_set/clr ,Peripheral 172 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x0c 11. -0x18c 11. -0xcc 11. " PR[171]_set/clr ,Peripheral 171 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 10. -0x18c 10. -0xcc 10. " PR[170]_set/clr ,Peripheral 170 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 9. -0x18c 9. -0xcc 9. " PR[169]_set/clr ,Peripheral 169 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 8. -0x18c 8. -0xcc 8. " PR[168]_set/clr ,Peripheral 168 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. -0x18c 7. -0xcc 7. " PR[167]_set/clr ,Peripheral 167 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x0c 6. -0x18c 6. -0xcc 6. " PR[166]_set/clr ,Peripheral 166 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x0c 5. -0x18c 5. -0xcc 5. " PR[165]_set/clr ,Peripheral 165 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 4. -0x18c 4. -0xcc 4. " PR[164]_set/clr ,Peripheral 164 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 3. -0x18c 3. -0xcc 3. " PR[163]_set/clr ,Peripheral 163 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 2. -0x18c 2. -0xcc 2. " PR[162]_set/clr ,Peripheral 162 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. -0x18c 1. -0xcc 1. " PR[161]_set/clr ,Peripheral 161 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x0c 0. -0x18c 0. -0xcc 0. " PR[160]_set/clr ,Peripheral 160 Read Attribute" "Not read,Read"
|
|
line.long 0x10 "PPU0_PR6_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 6 (Peripheral 192 to 223)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x10 31. -0x190 31. -0xd0 31. " PR[223]_set/clr ,Peripheral 223 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 30. -0x190 30. -0xd0 30. " PR[222]_set/clr ,Peripheral 222 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 29. -0x190 29. -0xd0 29. " PR[221]_set/clr ,Peripheral 221 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 28. -0x190 28. -0xd0 28. " PR[220]_set/clr ,Peripheral 220 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 27. -0x190 27. -0xd0 27. " PR[219]_set/clr ,Peripheral 219 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 26. -0x190 26. -0xd0 26. " PR[218]_set/clr ,Peripheral 218 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 25. -0x190 25. -0xd0 25. " PR[217]_set/clr ,Peripheral 217 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 24. -0x190 24. -0xd0 24. " PR[216]_set/clr ,Peripheral 216 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 23. -0x190 23. -0xd0 23. " PR[215]_set/clr ,Peripheral 215 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 22. -0x190 22. -0xd0 22. " PR[214]_set/clr ,Peripheral 214 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 21. -0x190 21. -0xd0 21. " PR[213]_set/clr ,Peripheral 213 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 20. -0x190 20. -0xd0 20. " PR[212]_set/clr ,Peripheral 212 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 19. -0x190 19. -0xd0 19. " PR[211]_set/clr ,Peripheral 211 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 18. -0x190 18. -0xd0 18. " PR[210]_set/clr ,Peripheral 210 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 17. -0x190 17. -0xd0 17. " PR[209]_set/clr ,Peripheral 209 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 16. -0x190 16. -0xd0 16. " PR[208]_set/clr ,Peripheral 208 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 15. -0x190 15. -0xd0 15. " PR[207]_set/clr ,Peripheral 207 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 14. -0x190 14. -0xd0 14. " PR[206]_set/clr ,Peripheral 206 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 13. -0x190 13. -0xd0 13. " PR[205]_set/clr ,Peripheral 205 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 12. -0x190 12. -0xd0 12. " PR[204]_set/clr ,Peripheral 204 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 11. -0x190 11. -0xd0 11. " PR[203]_set/clr ,Peripheral 203 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 10. -0x190 10. -0xd0 10. " PR[202]_set/clr ,Peripheral 202 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x10 9. -0x190 9. -0xd0 9. " PR[201]_set/clr ,Peripheral 201 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 8. -0x190 8. -0xd0 8. " PR[200]_set/clr ,Peripheral 200 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 7. -0x190 7. -0xd0 7. " PR[199]_set/clr ,Peripheral 199 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 6. -0x190 6. -0xd0 6. " PR[198]_set/clr ,Peripheral 198 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 5. -0x190 5. -0xd0 5. " PR[197]_set/clr ,Peripheral 197 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 4. -0x190 4. -0xd0 4. " PR[196]_set/clr ,Peripheral 196 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 3. -0x190 3. -0xd0 3. " PR[195]_set/clr ,Peripheral 195 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 2. -0x190 2. -0xd0 2. " PR[194]_set/clr ,Peripheral 194 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 1. -0x190 1. -0xd0 1. " PR[193]_set/clr ,Peripheral 193 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 0. -0x190 0. -0xd0 0. " PR[192]_set/clr ,Peripheral 192 Read Attribute" "Not read,Read"
|
|
line.long 0x14 "PPU0_PR7_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 7 (Peripheral 224 to 255)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x14 31. -0x194 31. -0xd4 31. " PR[255]_set/clr ,Peripheral 255 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 30. -0x194 30. -0xd4 30. " PR[254]_set/clr ,Peripheral 254 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 29. -0x194 29. -0xd4 29. " PR[253]_set/clr ,Peripheral 253 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 28. -0x194 28. -0xd4 28. " PR[252]_set/clr ,Peripheral 252 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x14 27. -0x194 27. -0xd4 27. " PR[251]_set/clr ,Peripheral 251 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 26. -0x194 26. -0xd4 26. " PR[250]_set/clr ,Peripheral 250 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 25. -0x194 25. -0xd4 25. " PR[249]_set/clr ,Peripheral 249 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 24. -0x194 24. -0xd4 24. " PR[248]_set/clr ,Peripheral 248 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x14 23. -0x194 23. -0xd4 23. " PR[247]_set/clr ,Peripheral 247 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 22. -0x194 22. -0xd4 22. " PR[246]_set/clr ,Peripheral 246 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 21. -0x194 21. -0xd4 21. " PR[245]_set/clr ,Peripheral 245 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 20. -0x194 20. -0xd4 20. " PR[244]_set/clr ,Peripheral 244 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x14 19. -0x194 19. -0xd4 19. " PR[243]_set/clr ,Peripheral 243 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 18. -0x194 18. -0xd4 18. " PR[242]_set/clr ,Peripheral 242 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 17. -0x194 17. -0xd4 17. " PR[241]_set/clr ,Peripheral 241 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 16. -0x194 16. -0xd4 16. " PR[240]_set/clr ,Peripheral 240 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x14 15. -0x194 15. -0xd4 15. " PR[239]_set/clr ,Peripheral 239 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 14. -0x194 14. -0xd4 14. " PR[238]_set/clr ,Peripheral 238 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x14 13. -0x194 13. -0xd4 13. " PR[237]_set/clr ,Peripheral 237 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 12. -0x194 12. -0xd4 12. " PR[236]_set/clr ,Peripheral 236 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 11. -0x194 11. -0xd4 11. " PR[235]_set/clr ,Peripheral 235 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 10. -0x194 10. -0xd4 10. " PR[234]_set/clr ,Peripheral 234 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x14 9. -0x194 9. -0xd4 9. " PR[233]_set/clr ,Peripheral 233 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 8. -0x194 8. -0xd4 8. " PR[232]_set/clr ,Peripheral 232 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 7. -0x194 7. -0xd4 7. " PR[231]_set/clr ,Peripheral 231 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 6. -0x194 6. -0xd4 6. " PR[230]_set/clr ,Peripheral 230 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x14 5. -0x194 5. -0xd4 5. " PR[229]_set/clr ,Peripheral 229 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 4. -0x194 4. -0xd4 4. " PR[228]_set/clr ,Peripheral 228 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x14 3. -0x194 3. -0xd4 3. " PR[227]_set/clr ,Peripheral 227 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 2. -0x194 2. -0xd4 2. " PR[226]_set/clr ,Peripheral 226 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x14 1. -0x194 1. -0xd4 1. " PR[225]_set/clr ,Peripheral 225 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 0. -0x194 0. -0xd4 0. " PR[224]_set/clr ,Peripheral 224 Read Attribute" "Not read,Read"
|
|
line.long 0x18 "PPU0_PR8_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 8 (Peripheral 256 to 287)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x18 31. -0x198 31. -0xd8 31. " PR[287]_set/clr ,Peripheral 287 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 30. -0x198 30. -0xd8 30. " PR[286]_set/clr ,Peripheral 286 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 29. -0x198 29. -0xd8 29. " PR[285]_set/clr ,Peripheral 285 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 28. -0x198 28. -0xd8 28. " PR[284]_set/clr ,Peripheral 284 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x18 27. -0x198 27. -0xd8 27. " PR[283]_set/clr ,Peripheral 283 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 26. -0x198 26. -0xd8 26. " PR[282]_set/clr ,Peripheral 282 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 25. -0x198 25. -0xd8 25. " PR[281]_set/clr ,Peripheral 281 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 24. -0x198 24. -0xd8 24. " PR[280]_set/clr ,Peripheral 280 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x18 23. -0x198 23. -0xd8 23. " PR[279]_set/clr ,Peripheral 279 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 22. -0x198 22. -0xd8 22. " PR[278]_set/clr ,Peripheral 278 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 21. -0x198 21. -0xd8 21. " PR[277]_set/clr ,Peripheral 277 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 20. -0x198 20. -0xd8 20. " PR[276]_set/clr ,Peripheral 276 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x18 19. -0x198 19. -0xd8 19. " PR[275]_set/clr ,Peripheral 275 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 18. -0x198 18. -0xd8 18. " PR[274]_set/clr ,Peripheral 274 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x18 17. -0x198 17. -0xd8 17. " PR[273]_set/clr ,Peripheral 273 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 16. -0x198 16. -0xd8 16. " PR[272]_set/clr ,Peripheral 272 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x18 15. -0x198 15. -0xd8 15. " PR[271]_set/clr ,Peripheral 271 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 14. -0x198 14. -0xd8 14. " PR[270]_set/clr ,Peripheral 270 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 13. -0x198 13. -0xd8 13. " PR[269]_set/clr ,Peripheral 269 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 12. -0x198 12. -0xd8 12. " PR[268]_set/clr ,Peripheral 268 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x18 11. -0x198 11. -0xd8 11. " PR[267]_set/clr ,Peripheral 267 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 10. -0x198 10. -0xd8 10. " PR[266]_set/clr ,Peripheral 266 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 9. -0x198 9. -0xd8 9. " PR[265]_set/clr ,Peripheral 265 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 8. -0x198 8. -0xd8 8. " PR[264]_set/clr ,Peripheral 264 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x18 7. -0x198 7. -0xd8 7. " PR[263]_set/clr ,Peripheral 263 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 6. -0x198 6. -0xd8 6. " PR[262]_set/clr ,Peripheral 262 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 5. -0x198 5. -0xd8 5. " PR[261]_set/clr ,Peripheral 261 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 4. -0x198 4. -0xd8 4. " PR[260]_set/clr ,Peripheral 260 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x18 3. -0x198 3. -0xd8 3. " PR[259]_set/clr ,Peripheral 259 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 2. -0x198 2. -0xd8 2. " PR[258]_set/clr ,Peripheral 258 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x18 1. -0x198 1. -0xd8 1. " PR[257]_set/clr ,Peripheral 257 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 0. -0x198 0. -0xd8 0. " PR[256]_set/clr ,Peripheral 256 Read Attribute" "Not read,Read"
|
|
endif
|
|
line.long 0x1c "PPU0_PR9_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 9 (Peripheral 288 to 319)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x1c 31. -0x19c 31. -0xdc 31. " PR[319]_set/clr ,Peripheral 319 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 30. -0x19c 30. -0xdc 30. " PR[318]_set/clr ,Peripheral 318 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 29. -0x19c 29. -0xdc 29. " PR[317]_set/clr ,Peripheral 317 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 28. -0x19c 28. -0xdc 28. " PR[316]_set/clr ,Peripheral 316 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x1c 27. -0x19c 27. -0xdc 27. " PR[315]_set/clr ,Peripheral 315 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 26. -0x19c 26. -0xdc 26. " PR[314]_set/clr ,Peripheral 314 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 25. -0x19c 25. -0xdc 25. " PR[313]_set/clr ,Peripheral 313 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 24. -0x19c 24. -0xdc 24. " PR[312]_set/clr ,Peripheral 312 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x1c 23. -0x19c 23. -0xdc 23. " PR[311]_set/clr ,Peripheral 311 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 22. -0x19c 22. -0xdc 22. " PR[310]_set/clr ,Peripheral 310 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 21. -0x19c 21. -0xdc 21. " PR[309]_set/clr ,Peripheral 309 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 20. -0x19c 20. -0xdc 20. " PR[308]_set/clr ,Peripheral 308 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x1c 19. -0x19c 19. -0xdc 19. " PR[307]_set/clr ,Peripheral 307 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 18. -0x19c 18. -0xdc 18. " PR[306]_set/clr ,Peripheral 306 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x1c 17. -0x19c 17. -0xdc 17. " PR[305]_set/clr ,Peripheral 305 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 16. -0x19c 16. -0xdc 16. " PR[304]_set/clr ,Peripheral 304 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x1c 15. -0x19c 15. -0xdc 15. " PR[303]_set/clr ,Peripheral 303 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 14. -0x19c 14. -0xdc 14. " PR[302]_set/clr ,Peripheral 302 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 13. -0x19c 13. -0xdc 13. " PR[301]_set/clr ,Peripheral 301 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 12. -0x19c 12. -0xdc 12. " PR[300]_set/clr ,Peripheral 300 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x1c 11. -0x19c 11. -0xdc 11. " PR[299]_set/clr ,Peripheral 299 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 10. -0x19c 10. -0xdc 10. " PR[298]_set/clr ,Peripheral 298 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 9. -0x19c 9. -0xdc 9. " PR[297]_set/clr ,Peripheral 297 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 8. -0x19c 8. -0xdc 8. " PR[296]_set/clr ,Peripheral 296 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x1c 7. -0x19c 7. -0xdc 7. " PR[295]_set/clr ,Peripheral 295 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 6. -0x19c 6. -0xdc 6. " PR[294]_set/clr ,Peripheral 294 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 5. -0x19c 5. -0xdc 5. " PR[293]_set/clr ,Peripheral 293 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 4. -0x19c 4. -0xdc 4. " PR[292]_set/clr ,Peripheral 292 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. -0x19c 3. -0xdc 3. " PR[291]_set/clr ,Peripheral 291 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 2. -0x19c 2. -0xdc 2. " PR[290]_set/clr ,Peripheral 290 Read Attribute" "Not read,Read"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x1c 1. -0x19c 1. -0xdc 1. " PR[289]_set/clr ,Peripheral 289 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 0. -0x19c 0. -0xdc 0. " PR[288]_set/clr ,Peripheral 288 Read Attribute" "Not read,Read"
|
|
line.long 0x20 "PPU0_PR10_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 10 (Peripheral 320 to 351)"
|
|
setclrfld.long 0x20 31. -0x1a0 31. -0xe0 31. " PR[351]_set/clr ,Peripheral 351 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 30. -0x1a0 30. -0xe0 30. " PR[350]_set/clr ,Peripheral 350 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 29. -0x1a0 29. -0xe0 29. " PR[349]_set/clr ,Peripheral 349 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 28. -0x1a0 28. -0xe0 28. " PR[348]_set/clr ,Peripheral 348 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x20 27. -0x1a0 27. -0xe0 27. " PR[347]_set/clr ,Peripheral 347 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x20 26. -0x1a0 26. -0xe0 26. " PR[346]_set/clr ,Peripheral 346 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x20 25. -0x1a0 25. -0xe0 25. " PR[345]_set/clr ,Peripheral 345 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x20 24. -0x1a0 24. -0xe0 24. " PR[344]_set/clr ,Peripheral 344 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126")
|
|
setclrfld.long 0x20 23. -0x1a0 23. -0xe0 23. " PR[343]_set/clr ,Peripheral 343 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 22. -0x1a0 22. -0xe0 22. " PR[342]_set/clr ,Peripheral 342 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 21. -0x1a0 21. -0xe0 21. " PR[341]_set/clr ,Peripheral 341 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 20. -0x1a0 20. -0xe0 20. " PR[340]_set/clr ,Peripheral 340 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x20 19. -0x1a0 19. -0xe0 19. " PR[339]_set/clr ,Peripheral 339 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 18. -0x1a0 18. -0xe0 18. " PR[338]_set/clr ,Peripheral 338 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 17. -0x1a0 17. -0xe0 17. " PR[337]_set/clr ,Peripheral 337 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 16. -0x1a0 16. -0xe0 16. " PR[336]_set/clr ,Peripheral 336 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x20 15. -0x1a0 15. -0xe0 15. " PR[335]_set/clr ,Peripheral 335 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 14. -0x1a0 14. -0xe0 14. " PR[334]_set/clr ,Peripheral 334 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 13. -0x1a0 13. -0xe0 13. " PR[333]_set/clr ,Peripheral 333 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 12. -0x1a0 12. -0xe0 12. " PR[332]_set/clr ,Peripheral 332 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x20 11. -0x1a0 11. -0xe0 11. " PR[331]_set/clr ,Peripheral 331 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x20 10. -0x1a0 10. -0xe0 10. " PR[330]_set/clr ,Peripheral 330 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 9. -0x1a0 9. -0xe0 9. " PR[329]_set/clr ,Peripheral 329 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 8. -0x1a0 8. -0xe0 8. " PR[328]_set/clr ,Peripheral 328 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x20 7. -0x1a0 7. -0xe0 7. " PR[327]_set/clr ,Peripheral 327 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 6. -0x1a0 6. -0xe0 6. " PR[326]_set/clr ,Peripheral 326 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 5. -0x1a0 5. -0xe0 5. " PR[325]_set/clr ,Peripheral 325 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 4. -0x1a0 4. -0xe0 4. " PR[324]_set/clr ,Peripheral 324 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x20 3. -0x1a0 3. -0xe0 3. " PR[323]_set/clr ,Peripheral 323 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 2. -0x1a0 2. -0xe0 2. " PR[322]_set/clr ,Peripheral 322 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 1. -0x1a0 1. -0xe0 1. " PR[321]_set/clr ,Peripheral 321 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 0. -0x1a0 0. -0xe0 0. " PR[320]_set/clr ,Peripheral 320 Read Attribute" "Not read,Read"
|
|
line.long 0x24 "PPU0_PR11_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 11 (Peripheral 352 to 383)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x24 31. -0x1a4 31. -0xe4 31. " PR[383]_set/clr ,Peripheral 383 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 30. -0x1a4 30. -0xe4 30. " PR[382]_set/clr ,Peripheral 382 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 29. -0x1a4 29. -0xe4 29. " PR[381]_set/clr ,Peripheral 381 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 28. -0x1a4 28. -0xe4 28. " PR[380]_set/clr ,Peripheral 380 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x24 27. -0x1a4 27. -0xe4 27. " PR[379]_set/clr ,Peripheral 379 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 26. -0x1a4 26. -0xe4 26. " PR[378]_set/clr ,Peripheral 378 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 25. -0x1a4 25. -0xe4 25. " PR[377]_set/clr ,Peripheral 377 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 24. -0x1a4 24. -0xe4 24. " PR[376]_set/clr ,Peripheral 376 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x24 23. -0x1a4 23. -0xe4 23. " PR[375]_set/clr ,Peripheral 375 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 22. -0x1a4 22. -0xe4 22. " PR[374]_set/clr ,Peripheral 374 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 21. -0x1a4 21. -0xe4 21. " PR[373]_set/clr ,Peripheral 373 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 20. -0x1a4 20. -0xe4 20. " PR[372]_set/clr ,Peripheral 372 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x24 19. -0x1a4 19. -0xe4 19. " PR[371]_set/clr ,Peripheral 371 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 18. -0x1a4 18. -0xe4 18. " PR[370]_set/clr ,Peripheral 370 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x24 17. -0x1a4 17. -0xe4 17. " PR[369]_set/clr ,Peripheral 369 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 16. -0x1a4 16. -0xe4 16. " PR[368]_set/clr ,Peripheral 368 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x24 15. -0x1a4 15. -0xe4 15. " PR[367]_set/clr ,Peripheral 367 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 14. -0x1a4 14. -0xe4 14. " PR[366]_set/clr ,Peripheral 366 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 13. -0x1a4 13. -0xe4 13. " PR[365]_set/clr ,Peripheral 365 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 12. -0x1a4 12. -0xe4 12. " PR[364]_set/clr ,Peripheral 364 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x24 11. -0x1a4 11. -0xe4 11. " PR[363]_set/clr ,Peripheral 363 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 10. -0x1a4 10. -0xe4 10. " PR[362]_set/clr ,Peripheral 362 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 9. -0x1a4 9. -0xe4 9. " PR[361]_set/clr ,Peripheral 361 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 8. -0x1a4 8. -0xe4 8. " PR[360]_set/clr ,Peripheral 360 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x24 7. -0x1a4 7. -0xe4 7. " PR[359]_set/clr ,Peripheral 359 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 6. -0x1a4 6. -0xe4 6. " PR[358]_set/clr ,Peripheral 358 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 5. -0x1a4 5. -0xe4 5. " PR[357]_set/clr ,Peripheral 357 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 4. -0x1a4 4. -0xe4 4. " PR[356]_set/clr ,Peripheral 356 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x24 3. -0x1a4 3. -0xe4 3. " PR[355]_set/clr ,Peripheral 355 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 2. -0x1a4 2. -0xe4 2. " PR[354]_set/clr ,Peripheral 354 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 1. -0x1a4 1. -0xe4 1. " PR[353]_set/clr ,Peripheral 353 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 0. -0x1a4 0. -0xe4 0. " PR[352]_set/clr ,Peripheral 352 Read Attribute" "Not read,Read"
|
|
line.long 0x28 "PPU0_PR12_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 12 (Peripheral 384 to 415)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x28 31. -0x1a8 31. -0xe8 31. " PR[415]_set/clr ,Peripheral 415 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 30. -0x1a8 30. -0xe8 30. " PR[414]_set/clr ,Peripheral 414 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 29. -0x1a8 29. -0xe8 29. " PR[413]_set/clr ,Peripheral 413 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 28. -0x1a8 28. -0xe8 28. " PR[412]_set/clr ,Peripheral 412 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x28 27. -0x1a8 27. -0xe8 27. " PR[411]_set/clr ,Peripheral 411 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 26. -0x1a8 26. -0xe8 26. " PR[410]_set/clr ,Peripheral 410 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 25. -0x1a8 25. -0xe8 25. " PR[409]_set/clr ,Peripheral 409 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 24. -0x1a8 24. -0xe8 24. " PR[408]_set/clr ,Peripheral 408 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x28 23. -0x1a8 23. -0xe8 23. " PR[407]_set/clr ,Peripheral 407 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 22. -0x1a8 22. -0xe8 22. " PR[406]_set/clr ,Peripheral 406 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 21. -0x1a8 21. -0xe8 21. " PR[405]_set/clr ,Peripheral 405 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 20. -0x1a8 20. -0xe8 20. " PR[404]_set/clr ,Peripheral 404 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x28 19. -0x1a8 19. -0xe8 19. " PR[403]_set/clr ,Peripheral 403 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 18. -0x1a8 18. -0xe8 18. " PR[402]_set/clr ,Peripheral 402 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 17. -0x1a8 17. -0xe8 17. " PR[401]_set/clr ,Peripheral 401 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 16. -0x1a8 16. -0xe8 16. " PR[400]_set/clr ,Peripheral 400 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x28 15. -0x1a8 15. -0xe8 15. " PR[399]_set/clr ,Peripheral 399 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 14. -0x1a8 14. -0xe8 14. " PR[398]_set/clr ,Peripheral 398 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 13. -0x1a8 13. -0xe8 13. " PR[397]_set/clr ,Peripheral 397 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 12. -0x1a8 12. -0xe8 12. " PR[396]_set/clr ,Peripheral 396 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x28 11. -0x1a8 11. -0xe8 11. " PR[395]_set/clr ,Peripheral 395 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 10. -0x1a8 10. -0xe8 10. " PR[394]_set/clr ,Peripheral 394 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 9. -0x1a8 9. -0xe8 9. " PR[393]_set/clr ,Peripheral 393 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 8. -0x1a8 8. -0xe8 8. " PR[392]_set/clr ,Peripheral 392 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x28 7. -0x1a8 7. -0xe8 7. " PR[391]_set/clr ,Peripheral 391 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 6. -0x1a8 6. -0xe8 6. " PR[390]_set/clr ,Peripheral 390 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 5. -0x1a8 5. -0xe8 5. " PR[389]_set/clr ,Peripheral 389 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 4. -0x1a8 4. -0xe8 4. " PR[388]_set/clr ,Peripheral 388 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x28 3. -0x1a8 3. -0xe8 3. " PR[387]_set/clr ,Peripheral 387 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 2. -0x1a8 2. -0xe8 2. " PR[386]_set/clr ,Peripheral 386 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 1. -0x1a8 1. -0xe8 1. " PR[385]_set/clr ,Peripheral 385 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 0. -0x1a8 0. -0xe8 0. " PR[384]_set/clr ,Peripheral 384 Read Attribute" "Not read,Read"
|
|
line.long 0x2c "PPU0_PR13_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 13 (Peripheral 416 to 447)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x2c 31. -0x1ac 31. -0xec 31. " PR[447]_set/clr ,Peripheral 447 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 30. -0x1ac 30. -0xec 30. " PR[446]_set/clr ,Peripheral 446 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 29. -0x1ac 29. -0xec 29. " PR[445]_set/clr ,Peripheral 445 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 28. -0x1ac 28. -0xec 28. " PR[444]_set/clr ,Peripheral 444 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x2c 27. -0x1ac 27. -0xec 27. " PR[443]_set/clr ,Peripheral 443 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 26. -0x1ac 26. -0xec 26. " PR[442]_set/clr ,Peripheral 442 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 25. -0x1ac 25. -0xec 25. " PR[441]_set/clr ,Peripheral 441 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 24. -0x1ac 24. -0xec 24. " PR[440]_set/clr ,Peripheral 440 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x2c 23. -0x1ac 23. -0xec 23. " PR[439]_set/clr ,Peripheral 439 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 22. -0x1ac 22. -0xec 22. " PR[438]_set/clr ,Peripheral 438 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 21. -0x1ac 21. -0xec 21. " PR[437]_set/clr ,Peripheral 437 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 20. -0x1ac 20. -0xec 20. " PR[436]_set/clr ,Peripheral 436 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x2c 19. -0x1ac 19. -0xec 19. " PR[435]_set/clr ,Peripheral 435 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 18. -0x1ac 18. -0xec 18. " PR[434]_set/clr ,Peripheral 434 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 17. -0x1ac 17. -0xec 17. " PR[433]_set/clr ,Peripheral 433 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 16. -0x1ac 16. -0xec 16. " PR[432]_set/clr ,Peripheral 432 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x2c 15. -0x1ac 15. -0xec 15. " PR[431]_set/clr ,Peripheral 431 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 14. -0x1ac 14. -0xec 14. " PR[430]_set/clr ,Peripheral 430 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 13. -0x1ac 13. -0xec 13. " PR[429]_set/clr ,Peripheral 429 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 12. -0x1ac 12. -0xec 12. " PR[428]_set/clr ,Peripheral 428 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x2c 11. -0x1ac 11. -0xec 11. " PR[427]_set/clr ,Peripheral 427 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 10. -0x1ac 10. -0xec 10. " PR[426]_set/clr ,Peripheral 426 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 9. -0x1ac 9. -0xec 9. " PR[425]_set/clr ,Peripheral 425 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 8. -0x1ac 8. -0xec 8. " PR[424]_set/clr ,Peripheral 424 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x2c 7. -0x1ac 7. -0xec 7. " PR[423]_set/clr ,Peripheral 423 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 6. -0x1ac 6. -0xec 6. " PR[422]_set/clr ,Peripheral 422 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 5. -0x1ac 5. -0xec 5. " PR[421]_set/clr ,Peripheral 421 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 4. -0x1ac 4. -0xec 4. " PR[420]_set/clr ,Peripheral 420 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x2c 3. -0x1ac 3. -0xec 3. " PR[419]_set/clr ,Peripheral 419 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 2. -0x1ac 2. -0xec 2. " PR[418]_set/clr ,Peripheral 418 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 1. -0x1ac 1. -0xec 1. " PR[417]_set/clr ,Peripheral 417 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 0. -0x1ac 0. -0xec 0. " PR[416]_set/clr ,Peripheral 416 Read Attribute" "Not read,Read"
|
|
else
|
|
rgroup.long 0x188++0x2F
|
|
line.long 0x00 "PPU0_PR2_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 2 (Peripheral 64 to 95)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x00 31. -0x180 31. -0xc0 31. " PR[95]_set/clr ,Peripheral 95 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 30. -0x180 30. -0xc0 30. " PR[94]_set/clr ,Peripheral 94 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 29. -0x180 29. -0xc0 29. " PR[93]_set/clr ,Peripheral 93 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 28. -0x180 28. -0xc0 28. " PR[92]_set/clr ,Peripheral 92 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x180 27. -0xc0 27. " PR[91]_set/clr ,Peripheral 91 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 26. -0x180 26. -0xc0 26. " PR[90]_set/clr ,Peripheral 90 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 25. -0x180 25. -0xc0 25. " PR[89]_set/clr ,Peripheral 89 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 24. -0x180 24. -0xc0 24. " PR[88]_set/clr ,Peripheral 88 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x180 23. -0xc0 23. " PR[87]_set/clr ,Peripheral 87 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 22. -0x180 22. -0xc0 22. " PR[86]_set/clr ,Peripheral 86 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 21. -0x180 21. -0xc0 21. " PR[85]_set/clr ,Peripheral 85 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 20. -0x180 20. -0xc0 20. " PR[84]_set/clr ,Peripheral 84 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x180 19. -0xc0 19. " PR[83]_set/clr ,Peripheral 83 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 18. -0x180 18. -0xc0 18. " PR[82]_set/clr ,Peripheral 82 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 17. -0x180 17. -0xc0 17. " PR[81]_set/clr ,Peripheral 81 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x00 16. -0x180 16. -0xc0 16. " PR[80]_set/clr ,Peripheral 80 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x00 15. -0x180 15. -0xc0 15. " PR[79]_set/clr ,Peripheral 79 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 14. -0x180 14. -0xc0 14. " PR[78]_set/clr ,Peripheral 78 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 13. -0x180 13. -0xc0 13. " PR[77]_set/clr ,Peripheral 77 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 12. -0x180 12. -0xc0 12. " PR[76]_set/clr ,Peripheral 76 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 11. -0x180 11. -0xc0 11. " PR[75]_set/clr ,Peripheral 75 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 10. -0x180 10. -0xc0 10. " PR[74]_set/clr ,Peripheral 74 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 9. -0x180 9. -0xc0 9. " PR[73]_set/clr ,Peripheral 73 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x180 8. -0xc0 8. " PR[72]_set/clr ,Peripheral 72 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 7. -0x180 7. -0xc0 7. " PR[71]_set/clr ,Peripheral 71 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x00 6. -0x180 6. -0xc0 6. " PR[70]_set/clr ,Peripheral 70 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 5. -0x180 5. -0xc0 5. " PR[69]_set/clr ,Peripheral 69 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x180 4. -0xc0 4. " PR[68]_set/clr ,Peripheral 68 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 3. -0x180 3. -0xc0 3. " PR[67]_set/clr ,Peripheral 67 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 2. -0x180 2. -0xc0 2. " PR[66]_set/clr ,Peripheral 66 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x00 1. -0x180 1. -0xc0 1. " PR[65]_set/clr ,Peripheral 65 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x180 0. -0xc0 0. " PR[64]_set/clr ,Peripheral 64 Read Attribute" "Not read,Read"
|
|
line.long 0x04 "PPU0_PR3_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 3 (Peripheral 96 to 127)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x04 31. -0x184 31. -0xc4 31. " PR[127]_set/clr ,Peripheral 127 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 30. -0x184 30. -0xc4 30. " PR[126]_set/clr ,Peripheral 126 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 29. -0x184 29. -0xc4 29. " PR[125]_set/clr ,Peripheral 125 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 28. -0x184 28. -0xc4 28. " PR[124]_set/clr ,Peripheral 124 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x04 27. -0x184 27. -0xc4 27. " PR[123]_set/clr ,Peripheral 123 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 26. -0x184 26. -0xc4 26. " PR[122]_set/clr ,Peripheral 122 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 25. -0x184 25. -0xc4 25. " PR[121]_set/clr ,Peripheral 121 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x04 24. -0x184 24. -0xc4 24. " PR[120]_set/clr ,Peripheral 120 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x04 23. -0x184 23. -0xc4 23. " PR[119]_set/clr ,Peripheral 119 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 22. -0x184 22. -0xc4 22. " PR[118]_set/clr ,Peripheral 118 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 21. -0x184 21. -0xc4 21. " PR[117]_set/clr ,Peripheral 117 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 20. -0x184 20. -0xc4 20. " PR[116]_set/clr ,Peripheral 116 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x04 19. -0x184 19. -0xc4 19. " PR[115]_set/clr ,Peripheral 115 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 18. -0x184 18. -0xc4 18. " PR[114]_set/clr ,Peripheral 114 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x04 17. -0x184 17. -0xc4 17. " PR[113]_set/clr ,Peripheral 113 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 16. -0x184 16. -0xc4 16. " PR[112]_set/clr ,Peripheral 112 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x04 15. -0x184 15. -0xc4 15. " PR[111]_set/clr ,Peripheral 111 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 14. -0x184 14. -0xc4 14. " PR[110]_set/clr ,Peripheral 110 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x04 13. -0x184 13. -0xc4 13. " PR[109]_set/clr ,Peripheral 109 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 12. -0x184 12. -0xc4 12. " PR[108]_set/clr ,Peripheral 108 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 11. -0x184 11. -0xc4 11. " PR[107]_set/clr ,Peripheral 107 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 10. -0x184 10. -0xc4 10. " PR[106]_set/clr ,Peripheral 106 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x04 9. -0x184 9. -0xc4 9. " PR[105]_set/clr ,Peripheral 105 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x04 8. -0x184 8. -0xc4 8. " PR[104]_set/clr ,Peripheral 104 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF125")
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.long 0x04 7. -0x184 7. -0xc4 7. " PR[103]_set/clr ,Peripheral 103 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 6. -0x184 6. -0xc4 6. " PR[102]_set/clr ,Peripheral 102 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 5. -0x184 5. -0xc4 5. " PR[101]_set/clr ,Peripheral 101 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x04 4. -0x184 4. -0xc4 4. " PR[100]_set/clr ,Peripheral 100 Read Attribute" "Not read,Read"
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.long 0x04 3. -0x184 3. -0xc4 3. " PR[99]_set/clr ,Peripheral 99 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x04 2. -0x184 2. -0xc4 2. " PR[98]_set/clr ,Peripheral 98 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x04 1. -0x184 1. -0xc4 1. " PR[97]_set/clr ,Peripheral 97 Read Attribute" "Not read,Read"
|
|
endif
|
|
endif
|
|
setclrfld.long 0x04 0. -0x184 0. -0xc4 0. " PR[96]_set/clr ,Peripheral 96 Read Attribute" "Not read,Read"
|
|
line.long 0x08 "PPU0_PR4_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 4 (Peripheral 128 to 159)"
|
|
sif cpu()!="MB9EF126"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.long 0x08 31. -0x188 31. -0xc8 31. " PR[128]_set/clr ,Peripheral 128 Read Attribute" "Not read,Read"
|
|
endif
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.long 0x08 30. -0x188 30. -0xc8 30. " PR[129]_set/clr ,Peripheral 129 Read Attribute" "Not read,Read"
|
|
sif cpu()!="MB9DF125"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.long 0x08 29. -0x188 29. -0xc8 29. " PR[130]_set/clr ,Peripheral 130 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x08 28. -0x188 28. -0xc8 28. " PR[131]_set/clr ,Peripheral 131 Read Attribute" "Not read,Read"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.long 0x08 27. -0x188 27. -0xc8 27. " PR[132]_set/clr ,Peripheral 132 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 26. -0x188 26. -0xc8 26. " PR[133]_set/clr ,Peripheral 133 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x08 25. -0x188 25. -0xc8 25. " PR[134]_set/clr ,Peripheral 134 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 24. -0x188 24. -0xc8 24. " PR[135]_set/clr ,Peripheral 135 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 23. -0x188 23. -0xc8 23. " PR[136]_set/clr ,Peripheral 136 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 22. -0x188 22. -0xc8 22. " PR[137]_set/clr ,Peripheral 137 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x08 21. -0x188 21. -0xc8 21. " PR[138]_set/clr ,Peripheral 138 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x08 20. -0x188 20. -0xc8 20. " PR[139]_set/clr ,Peripheral 139 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif cpu()!="MB9EF126"
|
|
setclrfld.long 0x08 19. -0x188 19. -0xc8 19. " PR[140]_set/clr ,Peripheral 140 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 18. -0x188 18. -0xc8 18. " PR[141]_set/clr ,Peripheral 141 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 17. -0x188 17. -0xc8 17. " PR[142]_set/clr ,Peripheral 142 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
endif
|
|
endif
|
|
endif
|
|
setclrfld.long 0x08 16. -0x188 16. -0xc8 16. " PR[143]_set/clr ,Peripheral 143 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x08 15. -0x188 15. -0xc8 15. " PR[144]_set/clr ,Peripheral 144 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 14. -0x188 14. -0xc8 14. " PR[145]_set/clr ,Peripheral 145 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x08 13. -0x188 13. -0xc8 13. " PR[146]_set/clr ,Peripheral 146 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 12. -0x188 12. -0xc8 12. " PR[147]_set/clr ,Peripheral 147 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 11. -0x188 11. -0xc8 11. " PR[148]_set/clr ,Peripheral 148 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 10. -0x188 10. -0xc8 10. " PR[149]_set/clr ,Peripheral 149 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x08 9. -0x188 9. -0xc8 9. " PR[150]_set/clr ,Peripheral 150 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 8. -0x188 8. -0xc8 8. " PR[151]_set/clr ,Peripheral 151 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 7. -0x188 7. -0xc8 7. " PR[152]_set/clr ,Peripheral 152 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 6. -0x188 6. -0xc8 6. " PR[153]_set/clr ,Peripheral 153 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x08 5. -0x188 5. -0xc8 5. " PR[154]_set/clr ,Peripheral 154 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 4. -0x188 4. -0xc8 4. " PR[155]_set/clr ,Peripheral 155 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 3. -0x188 3. -0xc8 3. " PR[156]_set/clr ,Peripheral 156 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x08 2. -0x188 2. -0xc8 2. " PR[157]_set/clr ,Peripheral 157 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x08 1. -0x188 1. -0xc8 1. " PR[158]_set/clr ,Peripheral 158 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x08 0. -0x188 0. -0xc8 0. " PR[159]_set/clr ,Peripheral 159 Read Attribute" "Not read,Read"
|
|
line.long 0x0c "PPU0_PR5_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 5 (Peripheral 160 to 191)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9DF125")
|
|
sif (cpu()!="MB9EF126"&&cpu()!="MB9DF126")
|
|
setclrfld.long 0x0c 31. -0x18c 31. -0xcc 31. " PR[191]_set/clr ,Peripheral 191 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 30. -0x18c 30. -0xcc 30. " PR[190]_set/clr ,Peripheral 190 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 29. -0x18c 29. -0xcc 29. " PR[189]_set/clr ,Peripheral 189 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 28. -0x18c 28. -0xcc 28. " PR[188]_set/clr ,Peripheral 188 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x0c 27. -0x18c 27. -0xcc 27. " PR[187]_set/clr ,Peripheral 187 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 26. -0x18c 26. -0xcc 26. " PR[186]_set/clr ,Peripheral 186 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 25. -0x18c 25. -0xcc 25. " PR[185]_set/clr ,Peripheral 185 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 24. -0x18c 24. -0xcc 24. " PR[184]_set/clr ,Peripheral 184 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x0c 23. -0x18c 23. -0xcc 23. " PR[183]_set/clr ,Peripheral 183 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 22. -0x18c 22. -0xcc 22. " PR[182]_set/clr ,Peripheral 182 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 21. -0x18c 21. -0xcc 21. " PR[181]_set/clr ,Peripheral 181 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 20. -0x18c 20. -0xcc 20. " PR[180]_set/clr ,Peripheral 180 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. -0x18c 19. -0xcc 19. " PR[179]_set/clr ,Peripheral 179 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x0c 18. -0x18c 18. -0xcc 18. " PR[178]_set/clr ,Peripheral 178 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x0c 17. -0x18c 17. -0xcc 17. " PR[177]_set/clr ,Peripheral 177 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 16. -0x18c 16. -0xcc 16. " PR[176]_set/clr ,Peripheral 176 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x0c 15. -0x18c 15. -0xcc 15. " PR[175]_set/clr ,Peripheral 175 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 14. -0x18c 14. -0xcc 14. " PR[174]_set/clr ,Peripheral 174 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 13. -0x18c 13. -0xcc 13. " PR[173]_set/clr ,Peripheral 173 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 12. -0x18c 12. -0xcc 12. " PR[172]_set/clr ,Peripheral 172 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x0c 11. -0x18c 11. -0xcc 11. " PR[171]_set/clr ,Peripheral 171 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 10. -0x18c 10. -0xcc 10. " PR[170]_set/clr ,Peripheral 170 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 9. -0x18c 9. -0xcc 9. " PR[169]_set/clr ,Peripheral 169 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 8. -0x18c 8. -0xcc 8. " PR[168]_set/clr ,Peripheral 168 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. -0x18c 7. -0xcc 7. " PR[167]_set/clr ,Peripheral 167 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x0c 6. -0x18c 6. -0xcc 6. " PR[166]_set/clr ,Peripheral 166 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x0c 5. -0x18c 5. -0xcc 5. " PR[165]_set/clr ,Peripheral 165 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 4. -0x18c 4. -0xcc 4. " PR[164]_set/clr ,Peripheral 164 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 3. -0x18c 3. -0xcc 3. " PR[163]_set/clr ,Peripheral 163 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x0c 2. -0x18c 2. -0xcc 2. " PR[162]_set/clr ,Peripheral 162 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. -0x18c 1. -0xcc 1. " PR[161]_set/clr ,Peripheral 161 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x0c 0. -0x18c 0. -0xcc 0. " PR[160]_set/clr ,Peripheral 160 Read Attribute" "Not read,Read"
|
|
line.long 0x10 "PPU0_PR6_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 6 (Peripheral 192 to 223)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x10 31. -0x190 31. -0xd0 31. " PR[223]_set/clr ,Peripheral 223 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 30. -0x190 30. -0xd0 30. " PR[222]_set/clr ,Peripheral 222 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 29. -0x190 29. -0xd0 29. " PR[221]_set/clr ,Peripheral 221 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 28. -0x190 28. -0xd0 28. " PR[220]_set/clr ,Peripheral 220 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 27. -0x190 27. -0xd0 27. " PR[219]_set/clr ,Peripheral 219 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 26. -0x190 26. -0xd0 26. " PR[218]_set/clr ,Peripheral 218 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 25. -0x190 25. -0xd0 25. " PR[217]_set/clr ,Peripheral 217 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 24. -0x190 24. -0xd0 24. " PR[216]_set/clr ,Peripheral 216 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 23. -0x190 23. -0xd0 23. " PR[215]_set/clr ,Peripheral 215 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 22. -0x190 22. -0xd0 22. " PR[214]_set/clr ,Peripheral 214 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 21. -0x190 21. -0xd0 21. " PR[213]_set/clr ,Peripheral 213 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 20. -0x190 20. -0xd0 20. " PR[212]_set/clr ,Peripheral 212 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 19. -0x190 19. -0xd0 19. " PR[211]_set/clr ,Peripheral 211 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 18. -0x190 18. -0xd0 18. " PR[210]_set/clr ,Peripheral 210 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 17. -0x190 17. -0xd0 17. " PR[209]_set/clr ,Peripheral 209 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 16. -0x190 16. -0xd0 16. " PR[208]_set/clr ,Peripheral 208 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 15. -0x190 15. -0xd0 15. " PR[207]_set/clr ,Peripheral 207 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 14. -0x190 14. -0xd0 14. " PR[206]_set/clr ,Peripheral 206 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 13. -0x190 13. -0xd0 13. " PR[205]_set/clr ,Peripheral 205 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 12. -0x190 12. -0xd0 12. " PR[204]_set/clr ,Peripheral 204 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 11. -0x190 11. -0xd0 11. " PR[203]_set/clr ,Peripheral 203 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 10. -0x190 10. -0xd0 10. " PR[202]_set/clr ,Peripheral 202 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x10 9. -0x190 9. -0xd0 9. " PR[201]_set/clr ,Peripheral 201 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 8. -0x190 8. -0xd0 8. " PR[200]_set/clr ,Peripheral 200 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 7. -0x190 7. -0xd0 7. " PR[199]_set/clr ,Peripheral 199 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 6. -0x190 6. -0xd0 6. " PR[198]_set/clr ,Peripheral 198 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 5. -0x190 5. -0xd0 5. " PR[197]_set/clr ,Peripheral 197 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 4. -0x190 4. -0xd0 4. " PR[196]_set/clr ,Peripheral 196 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x10 3. -0x190 3. -0xd0 3. " PR[195]_set/clr ,Peripheral 195 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 2. -0x190 2. -0xd0 2. " PR[194]_set/clr ,Peripheral 194 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 1. -0x190 1. -0xd0 1. " PR[193]_set/clr ,Peripheral 193 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x10 0. -0x190 0. -0xd0 0. " PR[192]_set/clr ,Peripheral 192 Read Attribute" "Not read,Read"
|
|
line.long 0x14 "PPU0_PR7_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 7 (Peripheral 224 to 255)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x14 31. -0x194 31. -0xd4 31. " PR[255]_set/clr ,Peripheral 255 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 30. -0x194 30. -0xd4 30. " PR[254]_set/clr ,Peripheral 254 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 29. -0x194 29. -0xd4 29. " PR[253]_set/clr ,Peripheral 253 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 28. -0x194 28. -0xd4 28. " PR[252]_set/clr ,Peripheral 252 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x14 27. -0x194 27. -0xd4 27. " PR[251]_set/clr ,Peripheral 251 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 26. -0x194 26. -0xd4 26. " PR[250]_set/clr ,Peripheral 250 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 25. -0x194 25. -0xd4 25. " PR[249]_set/clr ,Peripheral 249 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 24. -0x194 24. -0xd4 24. " PR[248]_set/clr ,Peripheral 248 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x14 23. -0x194 23. -0xd4 23. " PR[247]_set/clr ,Peripheral 247 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 22. -0x194 22. -0xd4 22. " PR[246]_set/clr ,Peripheral 246 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 21. -0x194 21. -0xd4 21. " PR[245]_set/clr ,Peripheral 245 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 20. -0x194 20. -0xd4 20. " PR[244]_set/clr ,Peripheral 244 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x14 19. -0x194 19. -0xd4 19. " PR[243]_set/clr ,Peripheral 243 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 18. -0x194 18. -0xd4 18. " PR[242]_set/clr ,Peripheral 242 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 17. -0x194 17. -0xd4 17. " PR[241]_set/clr ,Peripheral 241 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 16. -0x194 16. -0xd4 16. " PR[240]_set/clr ,Peripheral 240 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x14 15. -0x194 15. -0xd4 15. " PR[239]_set/clr ,Peripheral 239 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 14. -0x194 14. -0xd4 14. " PR[238]_set/clr ,Peripheral 238 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x14 13. -0x194 13. -0xd4 13. " PR[237]_set/clr ,Peripheral 237 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 12. -0x194 12. -0xd4 12. " PR[236]_set/clr ,Peripheral 236 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 11. -0x194 11. -0xd4 11. " PR[235]_set/clr ,Peripheral 235 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 10. -0x194 10. -0xd4 10. " PR[234]_set/clr ,Peripheral 234 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x14 9. -0x194 9. -0xd4 9. " PR[233]_set/clr ,Peripheral 233 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 8. -0x194 8. -0xd4 8. " PR[232]_set/clr ,Peripheral 232 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 7. -0x194 7. -0xd4 7. " PR[231]_set/clr ,Peripheral 231 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 6. -0x194 6. -0xd4 6. " PR[230]_set/clr ,Peripheral 230 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x14 5. -0x194 5. -0xd4 5. " PR[229]_set/clr ,Peripheral 229 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 4. -0x194 4. -0xd4 4. " PR[228]_set/clr ,Peripheral 228 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x14 3. -0x194 3. -0xd4 3. " PR[227]_set/clr ,Peripheral 227 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 2. -0x194 2. -0xd4 2. " PR[226]_set/clr ,Peripheral 226 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x14 1. -0x194 1. -0xd4 1. " PR[225]_set/clr ,Peripheral 225 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x14 0. -0x194 0. -0xd4 0. " PR[224]_set/clr ,Peripheral 224 Read Attribute" "Not read,Read"
|
|
line.long 0x18 "PPU0_PR8_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 8 (Peripheral 256 to 287)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x18 31. -0x198 31. -0xd8 31. " PR[287]_set/clr ,Peripheral 287 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 30. -0x198 30. -0xd8 30. " PR[286]_set/clr ,Peripheral 286 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 29. -0x198 29. -0xd8 29. " PR[285]_set/clr ,Peripheral 285 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 28. -0x198 28. -0xd8 28. " PR[284]_set/clr ,Peripheral 284 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x18 27. -0x198 27. -0xd8 27. " PR[283]_set/clr ,Peripheral 283 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 26. -0x198 26. -0xd8 26. " PR[282]_set/clr ,Peripheral 282 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 25. -0x198 25. -0xd8 25. " PR[281]_set/clr ,Peripheral 281 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 24. -0x198 24. -0xd8 24. " PR[280]_set/clr ,Peripheral 280 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x18 23. -0x198 23. -0xd8 23. " PR[279]_set/clr ,Peripheral 279 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 22. -0x198 22. -0xd8 22. " PR[278]_set/clr ,Peripheral 278 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 21. -0x198 21. -0xd8 21. " PR[277]_set/clr ,Peripheral 277 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 20. -0x198 20. -0xd8 20. " PR[276]_set/clr ,Peripheral 276 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x18 19. -0x198 19. -0xd8 19. " PR[275]_set/clr ,Peripheral 275 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 18. -0x198 18. -0xd8 18. " PR[274]_set/clr ,Peripheral 274 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x18 17. -0x198 17. -0xd8 17. " PR[273]_set/clr ,Peripheral 273 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 16. -0x198 16. -0xd8 16. " PR[272]_set/clr ,Peripheral 272 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x18 15. -0x198 15. -0xd8 15. " PR[271]_set/clr ,Peripheral 271 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 14. -0x198 14. -0xd8 14. " PR[270]_set/clr ,Peripheral 270 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 13. -0x198 13. -0xd8 13. " PR[269]_set/clr ,Peripheral 269 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 12. -0x198 12. -0xd8 12. " PR[268]_set/clr ,Peripheral 268 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x18 11. -0x198 11. -0xd8 11. " PR[267]_set/clr ,Peripheral 267 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 10. -0x198 10. -0xd8 10. " PR[266]_set/clr ,Peripheral 266 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 9. -0x198 9. -0xd8 9. " PR[265]_set/clr ,Peripheral 265 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 8. -0x198 8. -0xd8 8. " PR[264]_set/clr ,Peripheral 264 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x18 7. -0x198 7. -0xd8 7. " PR[263]_set/clr ,Peripheral 263 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 6. -0x198 6. -0xd8 6. " PR[262]_set/clr ,Peripheral 262 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 5. -0x198 5. -0xd8 5. " PR[261]_set/clr ,Peripheral 261 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 4. -0x198 4. -0xd8 4. " PR[260]_set/clr ,Peripheral 260 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x18 3. -0x198 3. -0xd8 3. " PR[259]_set/clr ,Peripheral 259 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 2. -0x198 2. -0xd8 2. " PR[258]_set/clr ,Peripheral 258 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x18 1. -0x198 1. -0xd8 1. " PR[257]_set/clr ,Peripheral 257 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x18 0. -0x198 0. -0xd8 0. " PR[256]_set/clr ,Peripheral 256 Read Attribute" "Not read,Read"
|
|
endif
|
|
line.long 0x1c "PPU0_PR9_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 9 (Peripheral 288 to 319)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x1c 31. -0x19c 31. -0xdc 31. " PR[319]_set/clr ,Peripheral 319 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 30. -0x19c 30. -0xdc 30. " PR[318]_set/clr ,Peripheral 318 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 29. -0x19c 29. -0xdc 29. " PR[317]_set/clr ,Peripheral 317 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 28. -0x19c 28. -0xdc 28. " PR[316]_set/clr ,Peripheral 316 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x1c 27. -0x19c 27. -0xdc 27. " PR[315]_set/clr ,Peripheral 315 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 26. -0x19c 26. -0xdc 26. " PR[314]_set/clr ,Peripheral 314 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 25. -0x19c 25. -0xdc 25. " PR[313]_set/clr ,Peripheral 313 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 24. -0x19c 24. -0xdc 24. " PR[312]_set/clr ,Peripheral 312 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x1c 23. -0x19c 23. -0xdc 23. " PR[311]_set/clr ,Peripheral 311 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 22. -0x19c 22. -0xdc 22. " PR[310]_set/clr ,Peripheral 310 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 21. -0x19c 21. -0xdc 21. " PR[309]_set/clr ,Peripheral 309 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 20. -0x19c 20. -0xdc 20. " PR[308]_set/clr ,Peripheral 308 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x1c 19. -0x19c 19. -0xdc 19. " PR[307]_set/clr ,Peripheral 307 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 18. -0x19c 18. -0xdc 18. " PR[306]_set/clr ,Peripheral 306 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x1c 17. -0x19c 17. -0xdc 17. " PR[305]_set/clr ,Peripheral 305 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 16. -0x19c 16. -0xdc 16. " PR[304]_set/clr ,Peripheral 304 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x1c 15. -0x19c 15. -0xdc 15. " PR[303]_set/clr ,Peripheral 303 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 14. -0x19c 14. -0xdc 14. " PR[302]_set/clr ,Peripheral 302 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 13. -0x19c 13. -0xdc 13. " PR[301]_set/clr ,Peripheral 301 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 12. -0x19c 12. -0xdc 12. " PR[300]_set/clr ,Peripheral 300 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x1c 11. -0x19c 11. -0xdc 11. " PR[299]_set/clr ,Peripheral 299 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 10. -0x19c 10. -0xdc 10. " PR[298]_set/clr ,Peripheral 298 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 9. -0x19c 9. -0xdc 9. " PR[297]_set/clr ,Peripheral 297 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 8. -0x19c 8. -0xdc 8. " PR[296]_set/clr ,Peripheral 296 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x1c 7. -0x19c 7. -0xdc 7. " PR[295]_set/clr ,Peripheral 295 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 6. -0x19c 6. -0xdc 6. " PR[294]_set/clr ,Peripheral 294 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 5. -0x19c 5. -0xdc 5. " PR[293]_set/clr ,Peripheral 293 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 4. -0x19c 4. -0xdc 4. " PR[292]_set/clr ,Peripheral 292 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. -0x19c 3. -0xdc 3. " PR[291]_set/clr ,Peripheral 291 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 2. -0x19c 2. -0xdc 2. " PR[290]_set/clr ,Peripheral 290 Read Attribute" "Not read,Read"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x1c 1. -0x19c 1. -0xdc 1. " PR[289]_set/clr ,Peripheral 289 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x1c 0. -0x19c 0. -0xdc 0. " PR[288]_set/clr ,Peripheral 288 Read Attribute" "Not read,Read"
|
|
line.long 0x20 "PPU0_PR10_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 10 (Peripheral 320 to 351)"
|
|
setclrfld.long 0x20 31. -0x1a0 31. -0xe0 31. " PR[351]_set/clr ,Peripheral 351 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 30. -0x1a0 30. -0xe0 30. " PR[350]_set/clr ,Peripheral 350 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 29. -0x1a0 29. -0xe0 29. " PR[349]_set/clr ,Peripheral 349 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 28. -0x1a0 28. -0xe0 28. " PR[348]_set/clr ,Peripheral 348 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x20 27. -0x1a0 27. -0xe0 27. " PR[347]_set/clr ,Peripheral 347 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x20 26. -0x1a0 26. -0xe0 26. " PR[346]_set/clr ,Peripheral 346 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x20 25. -0x1a0 25. -0xe0 25. " PR[345]_set/clr ,Peripheral 345 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x20 24. -0x1a0 24. -0xe0 24. " PR[344]_set/clr ,Peripheral 344 Read Attribute" "Not read,Read"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126")
|
|
setclrfld.long 0x20 23. -0x1a0 23. -0xe0 23. " PR[343]_set/clr ,Peripheral 343 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 22. -0x1a0 22. -0xe0 22. " PR[342]_set/clr ,Peripheral 342 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 21. -0x1a0 21. -0xe0 21. " PR[341]_set/clr ,Peripheral 341 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 20. -0x1a0 20. -0xe0 20. " PR[340]_set/clr ,Peripheral 340 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x20 19. -0x1a0 19. -0xe0 19. " PR[339]_set/clr ,Peripheral 339 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 18. -0x1a0 18. -0xe0 18. " PR[338]_set/clr ,Peripheral 338 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 17. -0x1a0 17. -0xe0 17. " PR[337]_set/clr ,Peripheral 337 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 16. -0x1a0 16. -0xe0 16. " PR[336]_set/clr ,Peripheral 336 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x20 15. -0x1a0 15. -0xe0 15. " PR[335]_set/clr ,Peripheral 335 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 14. -0x1a0 14. -0xe0 14. " PR[334]_set/clr ,Peripheral 334 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 13. -0x1a0 13. -0xe0 13. " PR[333]_set/clr ,Peripheral 333 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 12. -0x1a0 12. -0xe0 12. " PR[332]_set/clr ,Peripheral 332 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x20 11. -0x1a0 11. -0xe0 11. " PR[331]_set/clr ,Peripheral 331 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x20 10. -0x1a0 10. -0xe0 10. " PR[330]_set/clr ,Peripheral 330 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 9. -0x1a0 9. -0xe0 9. " PR[329]_set/clr ,Peripheral 329 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 8. -0x1a0 8. -0xe0 8. " PR[328]_set/clr ,Peripheral 328 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x20 7. -0x1a0 7. -0xe0 7. " PR[327]_set/clr ,Peripheral 327 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 6. -0x1a0 6. -0xe0 6. " PR[326]_set/clr ,Peripheral 326 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 5. -0x1a0 5. -0xe0 5. " PR[325]_set/clr ,Peripheral 325 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 4. -0x1a0 4. -0xe0 4. " PR[324]_set/clr ,Peripheral 324 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x20 3. -0x1a0 3. -0xe0 3. " PR[323]_set/clr ,Peripheral 323 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 2. -0x1a0 2. -0xe0 2. " PR[322]_set/clr ,Peripheral 322 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 1. -0x1a0 1. -0xe0 1. " PR[321]_set/clr ,Peripheral 321 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x20 0. -0x1a0 0. -0xe0 0. " PR[320]_set/clr ,Peripheral 320 Read Attribute" "Not read,Read"
|
|
line.long 0x24 "PPU0_PR11_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 11 (Peripheral 352 to 383)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x24 31. -0x1a4 31. -0xe4 31. " PR[383]_set/clr ,Peripheral 383 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 30. -0x1a4 30. -0xe4 30. " PR[382]_set/clr ,Peripheral 382 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 29. -0x1a4 29. -0xe4 29. " PR[381]_set/clr ,Peripheral 381 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 28. -0x1a4 28. -0xe4 28. " PR[380]_set/clr ,Peripheral 380 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x24 27. -0x1a4 27. -0xe4 27. " PR[379]_set/clr ,Peripheral 379 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 26. -0x1a4 26. -0xe4 26. " PR[378]_set/clr ,Peripheral 378 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 25. -0x1a4 25. -0xe4 25. " PR[377]_set/clr ,Peripheral 377 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 24. -0x1a4 24. -0xe4 24. " PR[376]_set/clr ,Peripheral 376 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x24 23. -0x1a4 23. -0xe4 23. " PR[375]_set/clr ,Peripheral 375 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 22. -0x1a4 22. -0xe4 22. " PR[374]_set/clr ,Peripheral 374 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 21. -0x1a4 21. -0xe4 21. " PR[373]_set/clr ,Peripheral 373 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 20. -0x1a4 20. -0xe4 20. " PR[372]_set/clr ,Peripheral 372 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x24 19. -0x1a4 19. -0xe4 19. " PR[371]_set/clr ,Peripheral 371 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 18. -0x1a4 18. -0xe4 18. " PR[370]_set/clr ,Peripheral 370 Read Attribute" "Not read,Read"
|
|
endif
|
|
setclrfld.long 0x24 17. -0x1a4 17. -0xe4 17. " PR[369]_set/clr ,Peripheral 369 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 16. -0x1a4 16. -0xe4 16. " PR[368]_set/clr ,Peripheral 368 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x24 15. -0x1a4 15. -0xe4 15. " PR[367]_set/clr ,Peripheral 367 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 14. -0x1a4 14. -0xe4 14. " PR[366]_set/clr ,Peripheral 366 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 13. -0x1a4 13. -0xe4 13. " PR[365]_set/clr ,Peripheral 365 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 12. -0x1a4 12. -0xe4 12. " PR[364]_set/clr ,Peripheral 364 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x24 11. -0x1a4 11. -0xe4 11. " PR[363]_set/clr ,Peripheral 363 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 10. -0x1a4 10. -0xe4 10. " PR[362]_set/clr ,Peripheral 362 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 9. -0x1a4 9. -0xe4 9. " PR[361]_set/clr ,Peripheral 361 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 8. -0x1a4 8. -0xe4 8. " PR[360]_set/clr ,Peripheral 360 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x24 7. -0x1a4 7. -0xe4 7. " PR[359]_set/clr ,Peripheral 359 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 6. -0x1a4 6. -0xe4 6. " PR[358]_set/clr ,Peripheral 358 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 5. -0x1a4 5. -0xe4 5. " PR[357]_set/clr ,Peripheral 357 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 4. -0x1a4 4. -0xe4 4. " PR[356]_set/clr ,Peripheral 356 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x24 3. -0x1a4 3. -0xe4 3. " PR[355]_set/clr ,Peripheral 355 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 2. -0x1a4 2. -0xe4 2. " PR[354]_set/clr ,Peripheral 354 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 1. -0x1a4 1. -0xe4 1. " PR[353]_set/clr ,Peripheral 353 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x24 0. -0x1a4 0. -0xe4 0. " PR[352]_set/clr ,Peripheral 352 Read Attribute" "Not read,Read"
|
|
line.long 0x28 "PPU0_PR12_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 12 (Peripheral 384 to 415)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x28 31. -0x1a8 31. -0xe8 31. " PR[415]_set/clr ,Peripheral 415 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 30. -0x1a8 30. -0xe8 30. " PR[414]_set/clr ,Peripheral 414 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 29. -0x1a8 29. -0xe8 29. " PR[413]_set/clr ,Peripheral 413 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 28. -0x1a8 28. -0xe8 28. " PR[412]_set/clr ,Peripheral 412 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x28 27. -0x1a8 27. -0xe8 27. " PR[411]_set/clr ,Peripheral 411 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 26. -0x1a8 26. -0xe8 26. " PR[410]_set/clr ,Peripheral 410 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 25. -0x1a8 25. -0xe8 25. " PR[409]_set/clr ,Peripheral 409 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 24. -0x1a8 24. -0xe8 24. " PR[408]_set/clr ,Peripheral 408 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x28 23. -0x1a8 23. -0xe8 23. " PR[407]_set/clr ,Peripheral 407 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 22. -0x1a8 22. -0xe8 22. " PR[406]_set/clr ,Peripheral 406 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 21. -0x1a8 21. -0xe8 21. " PR[405]_set/clr ,Peripheral 405 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 20. -0x1a8 20. -0xe8 20. " PR[404]_set/clr ,Peripheral 404 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x28 19. -0x1a8 19. -0xe8 19. " PR[403]_set/clr ,Peripheral 403 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 18. -0x1a8 18. -0xe8 18. " PR[402]_set/clr ,Peripheral 402 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 17. -0x1a8 17. -0xe8 17. " PR[401]_set/clr ,Peripheral 401 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 16. -0x1a8 16. -0xe8 16. " PR[400]_set/clr ,Peripheral 400 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x28 15. -0x1a8 15. -0xe8 15. " PR[399]_set/clr ,Peripheral 399 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 14. -0x1a8 14. -0xe8 14. " PR[398]_set/clr ,Peripheral 398 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 13. -0x1a8 13. -0xe8 13. " PR[397]_set/clr ,Peripheral 397 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 12. -0x1a8 12. -0xe8 12. " PR[396]_set/clr ,Peripheral 396 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x28 11. -0x1a8 11. -0xe8 11. " PR[395]_set/clr ,Peripheral 395 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 10. -0x1a8 10. -0xe8 10. " PR[394]_set/clr ,Peripheral 394 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 9. -0x1a8 9. -0xe8 9. " PR[393]_set/clr ,Peripheral 393 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 8. -0x1a8 8. -0xe8 8. " PR[392]_set/clr ,Peripheral 392 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x28 7. -0x1a8 7. -0xe8 7. " PR[391]_set/clr ,Peripheral 391 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 6. -0x1a8 6. -0xe8 6. " PR[390]_set/clr ,Peripheral 390 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 5. -0x1a8 5. -0xe8 5. " PR[389]_set/clr ,Peripheral 389 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 4. -0x1a8 4. -0xe8 4. " PR[388]_set/clr ,Peripheral 388 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x28 3. -0x1a8 3. -0xe8 3. " PR[387]_set/clr ,Peripheral 387 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 2. -0x1a8 2. -0xe8 2. " PR[386]_set/clr ,Peripheral 386 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 1. -0x1a8 1. -0xe8 1. " PR[385]_set/clr ,Peripheral 385 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x28 0. -0x1a8 0. -0xe8 0. " PR[384]_set/clr ,Peripheral 384 Read Attribute" "Not read,Read"
|
|
line.long 0x2c "PPU0_PR13_SET/CLR,PPU Peripheral Read Attribute Set/Clear Register 13 (Peripheral 416 to 447)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x2c 31. -0x1ac 31. -0xec 31. " PR[447]_set/clr ,Peripheral 447 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 30. -0x1ac 30. -0xec 30. " PR[446]_set/clr ,Peripheral 446 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 29. -0x1ac 29. -0xec 29. " PR[445]_set/clr ,Peripheral 445 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 28. -0x1ac 28. -0xec 28. " PR[444]_set/clr ,Peripheral 444 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x2c 27. -0x1ac 27. -0xec 27. " PR[443]_set/clr ,Peripheral 443 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 26. -0x1ac 26. -0xec 26. " PR[442]_set/clr ,Peripheral 442 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 25. -0x1ac 25. -0xec 25. " PR[441]_set/clr ,Peripheral 441 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 24. -0x1ac 24. -0xec 24. " PR[440]_set/clr ,Peripheral 440 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x2c 23. -0x1ac 23. -0xec 23. " PR[439]_set/clr ,Peripheral 439 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 22. -0x1ac 22. -0xec 22. " PR[438]_set/clr ,Peripheral 438 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 21. -0x1ac 21. -0xec 21. " PR[437]_set/clr ,Peripheral 437 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 20. -0x1ac 20. -0xec 20. " PR[436]_set/clr ,Peripheral 436 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x2c 19. -0x1ac 19. -0xec 19. " PR[435]_set/clr ,Peripheral 435 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 18. -0x1ac 18. -0xec 18. " PR[434]_set/clr ,Peripheral 434 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 17. -0x1ac 17. -0xec 17. " PR[433]_set/clr ,Peripheral 433 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 16. -0x1ac 16. -0xec 16. " PR[432]_set/clr ,Peripheral 432 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x2c 15. -0x1ac 15. -0xec 15. " PR[431]_set/clr ,Peripheral 431 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 14. -0x1ac 14. -0xec 14. " PR[430]_set/clr ,Peripheral 430 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 13. -0x1ac 13. -0xec 13. " PR[429]_set/clr ,Peripheral 429 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 12. -0x1ac 12. -0xec 12. " PR[428]_set/clr ,Peripheral 428 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x2c 11. -0x1ac 11. -0xec 11. " PR[427]_set/clr ,Peripheral 427 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 10. -0x1ac 10. -0xec 10. " PR[426]_set/clr ,Peripheral 426 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 9. -0x1ac 9. -0xec 9. " PR[425]_set/clr ,Peripheral 425 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 8. -0x1ac 8. -0xec 8. " PR[424]_set/clr ,Peripheral 424 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x2c 7. -0x1ac 7. -0xec 7. " PR[423]_set/clr ,Peripheral 423 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 6. -0x1ac 6. -0xec 6. " PR[422]_set/clr ,Peripheral 422 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 5. -0x1ac 5. -0xec 5. " PR[421]_set/clr ,Peripheral 421 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 4. -0x1ac 4. -0xec 4. " PR[420]_set/clr ,Peripheral 420 Read Attribute" "Not read,Read"
|
|
textline " "
|
|
setclrfld.long 0x2c 3. -0x1ac 3. -0xec 3. " PR[419]_set/clr ,Peripheral 419 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 2. -0x1ac 2. -0xec 2. " PR[418]_set/clr ,Peripheral 418 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 1. -0x1ac 1. -0xec 1. " PR[417]_set/clr ,Peripheral 417 Read Attribute" "Not read,Read"
|
|
setclrfld.long 0x2c 0. -0x1ac 0. -0xec 0. " PR[416]_set/clr ,Peripheral 416 Read Attribute" "Not read,Read"
|
|
endif
|
|
tree.end
|
|
tree "Peripheral Access Attribute Registers"
|
|
if (((d.l(ad:0xb0a00248))&0x1)==0x0)
|
|
group.long 0x1c8++0x2f
|
|
line.long 0x00 "PPU0_PA2_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 2 (Peripheral 64 to 95)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x00 31. -0x180 31. -0xc0 31. " PA[95]_set/clr ,Peripheral 95 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 30. -0x180 30. -0xc0 30. " PA[94]_set/clr ,Peripheral 94 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 29. -0x180 29. -0xc0 29. " PA[93]_set/clr ,Peripheral 93 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 28. -0x180 28. -0xc0 28. " PA[92]_set/clr ,Peripheral 92 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x180 27. -0xc0 27. " PA[91]_set/clr ,Peripheral 91 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 26. -0x180 26. -0xc0 26. " PA[90]_set/clr ,Peripheral 90 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 25. -0x180 25. -0xc0 25. " PA[89]_set/clr ,Peripheral 89 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 24. -0x180 24. -0xc0 24. " PA[88]_set/clr ,Peripheral 88 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x180 23. -0xc0 23. " PA[87]_set/clr ,Peripheral 87 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 22. -0x180 22. -0xc0 22. " PA[86]_set/clr ,Peripheral 86 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 21. -0x180 21. -0xc0 21. " PA[85]_set/clr ,Peripheral 85 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 20. -0x180 20. -0xc0 20. " PA[84]_set/clr ,Peripheral 84 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x180 19. -0xc0 19. " PA[83]_set/clr ,Peripheral 83 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 18. -0x180 18. -0xc0 18. " PA[82]_set/clr ,Peripheral 82 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 17. -0x180 17. -0xc0 17. " PA[81]_set/clr ,Peripheral 81 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 16. -0x180 16. -0xc0 16. " PA[80]_set/clr ,Peripheral 80 Access Attribute" "No access,Access"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x00 15. -0x180 15. -0xc0 15. " PA[79]_set/clr ,Peripheral 79 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 14. -0x180 14. -0xc0 14. " PA[78]_set/clr ,Peripheral 78 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x180 13. -0xc0 13. " PA[77]_set/clr ,Peripheral 77 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 12. -0x180 12. -0xc0 12. " PA[76]_set/clr ,Peripheral 76 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 11. -0x180 11. -0xc0 11. " PA[75]_set/clr ,Peripheral 75 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 10. -0x180 10. -0xc0 10. " PA[74]_set/clr ,Peripheral 74 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x180 9. -0xc0 9. " PA[73]_set/clr ,Peripheral 73 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 8. -0x180 8. -0xc0 8. " PA[72]_set/clr ,Peripheral 72 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 7. -0x180 7. -0xc0 7. " PA[71]_set/clr ,Peripheral 71 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 6. -0x180 6. -0xc0 6. " PA[70]_set/clr ,Peripheral 70 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 5. -0x180 5. -0xc0 5. " PA[69]_set/clr ,Peripheral 69 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 4. -0x180 4. -0xc0 4. " PA[68]_set/clr ,Peripheral 68 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 3. -0x180 3. -0xc0 3. " PA[67]_set/clr ,Peripheral 67 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x180 2. -0xc0 2. " PA[66]_set/clr ,Peripheral 66 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 1. -0x180 1. -0xc0 1. " PA[65]_set/clr ,Peripheral 65 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 0. -0x180 0. -0xc0 0. " PA[64]_set/clr ,Peripheral 64 Access Attribute" "No access,Access"
|
|
line.long 0x04 "PPU0_PA3_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 3 (Peripheral 96 to 127)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x04 31. -0x184 31. -0xc4 31. " PA[127]_set/clr ,Peripheral 127 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 30. -0x184 30. -0xc4 30. " PA[126]_set/clr ,Peripheral 126 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 29. -0x184 29. -0xc4 29. " PA[125]_set/clr ,Peripheral 125 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 28. -0x184 28. -0xc4 28. " PA[124]_set/clr ,Peripheral 124 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 27. -0x184 27. -0xc4 27. " PA[123]_set/clr ,Peripheral 123 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 26. -0x184 26. -0xc4 26. " PA[122]_set/clr ,Peripheral 122 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 25. -0x184 25. -0xc4 25. " PA[121]_set/clr ,Peripheral 121 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x04 24. -0x184 24. -0xc4 24. " PA[120]_set/clr ,Peripheral 120 Access Attribute" "No access,Access"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x04 23. -0x184 23. -0xc4 23. " PA[119]_set/clr ,Peripheral 119 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 22. -0x184 22. -0xc4 22. " PA[118]_set/clr ,Peripheral 118 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 21. -0x184 21. -0xc4 21. " PA[117]_set/clr ,Peripheral 117 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 20. -0x184 20. -0xc4 20. " PA[116]_set/clr ,Peripheral 116 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 19. -0x184 19. -0xc4 19. " PA[115]_set/clr ,Peripheral 115 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 18. -0x184 18. -0xc4 18. " PA[114]_set/clr ,Peripheral 114 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x04 17. -0x184 17. -0xc4 17. " PA[113]_set/clr ,Peripheral 113 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 16. -0x184 16. -0xc4 16. " PA[112]_set/clr ,Peripheral 112 Access Attribute" "No access,Access"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x04 15. -0x184 15. -0xc4 15. " PA[111]_set/clr ,Peripheral 111 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 14. -0x184 14. -0xc4 14. " PA[110]_set/clr ,Peripheral 110 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 13. -0x184 13. -0xc4 13. " PA[109]_set/clr ,Peripheral 109 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 12. -0x184 12. -0xc4 12. " PA[108]_set/clr ,Peripheral 108 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 11. -0x184 11. -0xc4 11. " PA[107]_set/clr ,Peripheral 107 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 10. -0x184 10. -0xc4 10. " PA[106]_set/clr ,Peripheral 106 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 9. -0x184 9. -0xc4 9. " PA[105]_set/clr ,Peripheral 105 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x04 8. -0x184 8. -0xc4 8. " PA[104]_set/clr ,Peripheral 104 Access Attribute" "No access,Access"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF125")
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.long 0x04 7. -0x184 7. -0xc4 7. " PA[103]_set/clr ,Peripheral 103 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 6. -0x184 6. -0xc4 6. " PA[102]_set/clr ,Peripheral 102 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 5. -0x184 5. -0xc4 5. " PA[101]_set/clr ,Peripheral 101 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x04 4. -0x184 4. -0xc4 4. " PA[100]_set/clr ,Peripheral 100 Access Attribute" "No access,Access"
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.long 0x04 3. -0x184 3. -0xc4 3. " PA[99]_set/clr ,Peripheral 99 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 2. -0x184 2. -0xc4 2. " PA[98]_set/clr ,Peripheral 98 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 1. -0x184 1. -0xc4 1. " PA[97]_set/clr ,Peripheral 97 Access Attribute" "No access,Access"
|
|
endif
|
|
endif
|
|
setclrfld.long 0x04 0. -0x184 0. -0xc4 0. " PA[96]_set/clr ,Peripheral 96 Access Attribute" "No access,Access"
|
|
line.long 0x08 "PPU0_PA4_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 4 (Peripheral 128 to 159)"
|
|
sif cpu()!="MB9EF126"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.long 0x08 31. -0x188 31. -0xc8 31. " PA[128]_set/clr ,Peripheral 128 Access Attribute" "No access,Access"
|
|
endif
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.long 0x08 30. -0x188 30. -0xc8 30. " PA[129]_set/clr ,Peripheral 129 Access Attribute" "No access,Access"
|
|
sif cpu()!="MB9DF125"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.long 0x08 29. -0x188 29. -0xc8 29. " PA[130]_set/clr ,Peripheral 130 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x08 28. -0x188 28. -0xc8 28. " PA[131]_set/clr ,Peripheral 131 Access Attribute" "No access,Access"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.long 0x08 27. -0x188 27. -0xc8 27. " PA[132]_set/clr ,Peripheral 132 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 26. -0x188 26. -0xc8 26. " PA[133]_set/clr ,Peripheral 133 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 25. -0x188 25. -0xc8 25. " PA[134]_set/clr ,Peripheral 134 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 24. -0x188 24. -0xc8 24. " PA[135]_set/clr ,Peripheral 135 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 23. -0x188 23. -0xc8 23. " PA[136]_set/clr ,Peripheral 136 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 22. -0x188 22. -0xc8 22. " PA[137]_set/clr ,Peripheral 137 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 21. -0x188 21. -0xc8 21. " PA[138]_set/clr ,Peripheral 138 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x08 20. -0x188 20. -0xc8 20. " PA[139]_set/clr ,Peripheral 139 Access Attribute" "No access,Access"
|
|
sif cpu()!="MB9EF126"
|
|
textline " "
|
|
setclrfld.long 0x08 19. -0x188 19. -0xc8 19. " PA[140]_set/clr ,Peripheral 140 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 18. -0x188 18. -0xc8 18. " PA[141]_set/clr ,Peripheral 141 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 17. -0x188 17. -0xc8 17. " PA[142]_set/clr ,Peripheral 142 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
endif
|
|
endif
|
|
endif
|
|
setclrfld.long 0x08 16. -0x188 16. -0xc8 16. " PA[143]_set/clr ,Peripheral 143 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 15. -0x188 15. -0xc8 15. " PA[144]_set/clr ,Peripheral 144 Access Attribute" "No access,Access"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x08 14. -0x188 14. -0xc8 14. " PA[145]_set/clr ,Peripheral 145 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 13. -0x188 13. -0xc8 13. " PA[146]_set/clr ,Peripheral 146 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 12. -0x188 12. -0xc8 12. " PA[147]_set/clr ,Peripheral 147 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 11. -0x188 11. -0xc8 11. " PA[148]_set/clr ,Peripheral 148 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 10. -0x188 10. -0xc8 10. " PA[149]_set/clr ,Peripheral 149 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 9. -0x188 9. -0xc8 9. " PA[150]_set/clr ,Peripheral 150 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 8. -0x188 8. -0xc8 8. " PA[151]_set/clr ,Peripheral 151 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 7. -0x188 7. -0xc8 7. " PA[152]_set/clr ,Peripheral 152 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 6. -0x188 6. -0xc8 6. " PA[153]_set/clr ,Peripheral 153 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 5. -0x188 5. -0xc8 5. " PA[154]_set/clr ,Peripheral 154 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 4. -0x188 4. -0xc8 4. " PA[155]_set/clr ,Peripheral 155 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 3. -0x188 3. -0xc8 3. " PA[156]_set/clr ,Peripheral 156 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x08 2. -0x188 2. -0xc8 2. " PA[157]_set/clr ,Peripheral 157 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 1. -0x188 1. -0xc8 1. " PA[158]_set/clr ,Peripheral 158 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 0. -0x188 0. -0xc8 0. " PA[159]_set/clr ,Peripheral 159 Access Attribute" "No access,Access"
|
|
line.long 0x0c "PPU0_PA5_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 5 (Peripheral 160 to 191)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9DF125")
|
|
sif (cpu()!="MB9EF126"&&cpu()!="MB9DF126")
|
|
setclrfld.long 0x0c 31. -0x18c 31. -0xcc 31. " PA[191]_set/clr ,Peripheral 191 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 30. -0x18c 30. -0xcc 30. " PA[190]_set/clr ,Peripheral 190 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 29. -0x18c 29. -0xcc 29. " PA[189]_set/clr ,Peripheral 189 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 28. -0x18c 28. -0xcc 28. " PA[188]_set/clr ,Peripheral 188 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 27. -0x18c 27. -0xcc 27. " PA[187]_set/clr ,Peripheral 187 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 26. -0x18c 26. -0xcc 26. " PA[186]_set/clr ,Peripheral 186 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 25. -0x18c 25. -0xcc 25. " PA[185]_set/clr ,Peripheral 185 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 24. -0x18c 24. -0xcc 24. " PA[184]_set/clr ,Peripheral 184 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 23. -0x18c 23. -0xcc 23. " PA[183]_set/clr ,Peripheral 183 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 22. -0x18c 22. -0xcc 22. " PA[182]_set/clr ,Peripheral 182 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 21. -0x18c 21. -0xcc 21. " PA[181]_set/clr ,Peripheral 181 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 20. -0x18c 20. -0xcc 20. " PA[180]_set/clr ,Peripheral 180 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. -0x18c 19. -0xcc 19. " PA[179]_set/clr ,Peripheral 179 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x0c 18. -0x18c 18. -0xcc 18. " PA[178]_set/clr ,Peripheral 178 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x0c 17. -0x18c 17. -0xcc 17. " PA[177]_set/clr ,Peripheral 177 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 16. -0x18c 16. -0xcc 16. " PA[176]_set/clr ,Peripheral 176 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x0c 15. -0x18c 15. -0xcc 15. " PA[175]_set/clr ,Peripheral 175 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 14. -0x18c 14. -0xcc 14. " PA[174]_set/clr ,Peripheral 174 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. -0x18c 13. -0xcc 13. " PA[173]_set/clr ,Peripheral 173 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 12. -0x18c 12. -0xcc 12. " PA[172]_set/clr ,Peripheral 172 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 11. -0x18c 11. -0xcc 11. " PA[171]_set/clr ,Peripheral 171 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 10. -0x18c 10. -0xcc 10. " PA[170]_set/clr ,Peripheral 170 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 9. -0x18c 9. -0xcc 9. " PA[169]_set/clr ,Peripheral 169 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 8. -0x18c 8. -0xcc 8. " PA[168]_set/clr ,Peripheral 168 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 7. -0x18c 7. -0xcc 7. " PA[167]_set/clr ,Peripheral 167 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x0c 6. -0x18c 6. -0xcc 6. " PA[166]_set/clr ,Peripheral 166 Access Attribute" "No access,Access"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x0c 5. -0x18c 5. -0xcc 5. " PA[165]_set/clr ,Peripheral 165 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 4. -0x18c 4. -0xcc 4. " PA[164]_set/clr ,Peripheral 164 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 3. -0x18c 3. -0xcc 3. " PA[163]_set/clr ,Peripheral 163 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 2. -0x18c 2. -0xcc 2. " PA[162]_set/clr ,Peripheral 162 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. -0x18c 1. -0xcc 1. " PA[161]_set/clr ,Peripheral 161 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x0c 0. -0x18c 0. -0xcc 0. " PA[160]_set/clr ,Peripheral 160 Access Attribute" "No access,Access"
|
|
line.long 0x10 "PPU0_PA6_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 6 (Peripheral 192 to 223)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x10 31. -0x190 31. -0xd0 31. " PA[223]_set/clr ,Peripheral 223 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 30. -0x190 30. -0xd0 30. " PA[222]_set/clr ,Peripheral 222 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 29. -0x190 29. -0xd0 29. " PA[221]_set/clr ,Peripheral 221 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 28. -0x190 28. -0xd0 28. " PA[220]_set/clr ,Peripheral 220 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 27. -0x190 27. -0xd0 27. " PA[219]_set/clr ,Peripheral 219 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 26. -0x190 26. -0xd0 26. " PA[218]_set/clr ,Peripheral 218 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 25. -0x190 25. -0xd0 25. " PA[217]_set/clr ,Peripheral 217 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 24. -0x190 24. -0xd0 24. " PA[216]_set/clr ,Peripheral 216 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 23. -0x190 23. -0xd0 23. " PA[215]_set/clr ,Peripheral 215 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 22. -0x190 22. -0xd0 22. " PA[214]_set/clr ,Peripheral 214 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 21. -0x190 21. -0xd0 21. " PA[213]_set/clr ,Peripheral 213 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 20. -0x190 20. -0xd0 20. " PA[212]_set/clr ,Peripheral 212 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 19. -0x190 19. -0xd0 19. " PA[211]_set/clr ,Peripheral 211 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 18. -0x190 18. -0xd0 18. " PA[210]_set/clr ,Peripheral 210 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 17. -0x190 17. -0xd0 17. " PA[209]_set/clr ,Peripheral 209 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 16. -0x190 16. -0xd0 16. " PA[208]_set/clr ,Peripheral 208 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 15. -0x190 15. -0xd0 15. " PA[207]_set/clr ,Peripheral 207 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 14. -0x190 14. -0xd0 14. " PA[206]_set/clr ,Peripheral 206 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 13. -0x190 13. -0xd0 13. " PA[205]_set/clr ,Peripheral 205 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 12. -0x190 12. -0xd0 12. " PA[204]_set/clr ,Peripheral 204 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 11. -0x190 11. -0xd0 11. " PA[203]_set/clr ,Peripheral 203 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 10. -0x190 10. -0xd0 10. " PA[202]_set/clr ,Peripheral 202 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x10 9. -0x190 9. -0xd0 9. " PA[201]_set/clr ,Peripheral 201 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 8. -0x190 8. -0xd0 8. " PA[200]_set/clr ,Peripheral 200 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 7. -0x190 7. -0xd0 7. " PA[199]_set/clr ,Peripheral 199 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 6. -0x190 6. -0xd0 6. " PA[198]_set/clr ,Peripheral 198 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 5. -0x190 5. -0xd0 5. " PA[197]_set/clr ,Peripheral 197 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 4. -0x190 4. -0xd0 4. " PA[196]_set/clr ,Peripheral 196 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 3. -0x190 3. -0xd0 3. " PA[195]_set/clr ,Peripheral 195 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 2. -0x190 2. -0xd0 2. " PA[194]_set/clr ,Peripheral 194 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 1. -0x190 1. -0xd0 1. " PA[193]_set/clr ,Peripheral 193 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 0. -0x190 0. -0xd0 0. " PA[192]_set/clr ,Peripheral 192 Access Attribute" "No access,Access"
|
|
line.long 0x14 "PPU0_PA7_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 7 (Peripheral 224 to 255)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x14 31. -0x194 31. -0xd4 31. " PA[255]_set/clr ,Peripheral 255 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 30. -0x194 30. -0xd4 30. " PA[254]_set/clr ,Peripheral 254 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 29. -0x194 29. -0xd4 29. " PA[253]_set/clr ,Peripheral 253 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 28. -0x194 28. -0xd4 28. " PA[252]_set/clr ,Peripheral 252 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 27. -0x194 27. -0xd4 27. " PA[251]_set/clr ,Peripheral 251 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 26. -0x194 26. -0xd4 26. " PA[250]_set/clr ,Peripheral 250 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 25. -0x194 25. -0xd4 25. " PA[249]_set/clr ,Peripheral 249 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 24. -0x194 24. -0xd4 24. " PA[248]_set/clr ,Peripheral 248 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 23. -0x194 23. -0xd4 23. " PA[247]_set/clr ,Peripheral 247 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 22. -0x194 22. -0xd4 22. " PA[246]_set/clr ,Peripheral 246 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 21. -0x194 21. -0xd4 21. " PA[245]_set/clr ,Peripheral 245 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 20. -0x194 20. -0xd4 20. " PA[244]_set/clr ,Peripheral 244 Access Attribute" "No access,Access"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x14 19. -0x194 19. -0xd4 19. " PA[243]_set/clr ,Peripheral 243 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 18. -0x194 18. -0xd4 18. " PA[242]_set/clr ,Peripheral 242 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 17. -0x194 17. -0xd4 17. " PA[241]_set/clr ,Peripheral 241 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 16. -0x194 16. -0xd4 16. " PA[240]_set/clr ,Peripheral 240 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x14 15. -0x194 15. -0xd4 15. " PA[239]_set/clr ,Peripheral 239 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 14. -0x194 14. -0xd4 14. " PA[238]_set/clr ,Peripheral 238 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 13. -0x194 13. -0xd4 13. " PA[237]_set/clr ,Peripheral 237 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 12. -0x194 12. -0xd4 12. " PA[236]_set/clr ,Peripheral 236 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 11. -0x194 11. -0xd4 11. " PA[235]_set/clr ,Peripheral 235 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 10. -0x194 10. -0xd4 10. " PA[234]_set/clr ,Peripheral 234 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 9. -0x194 9. -0xd4 9. " PA[233]_set/clr ,Peripheral 233 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 8. -0x194 8. -0xd4 8. " PA[232]_set/clr ,Peripheral 232 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 7. -0x194 7. -0xd4 7. " PA[231]_set/clr ,Peripheral 231 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 6. -0x194 6. -0xd4 6. " PA[230]_set/clr ,Peripheral 230 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 5. -0x194 5. -0xd4 5. " PA[229]_set/clr ,Peripheral 229 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 4. -0x194 4. -0xd4 4. " PA[228]_set/clr ,Peripheral 228 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x14 3. -0x194 3. -0xd4 3. " PA[227]_set/clr ,Peripheral 227 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 2. -0x194 2. -0xd4 2. " PA[226]_set/clr ,Peripheral 226 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 1. -0x194 1. -0xd4 1. " PA[225]_set/clr ,Peripheral 225 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 0. -0x194 0. -0xd4 0. " PA[224]_set/clr ,Peripheral 224 Access Attribute" "No access,Access"
|
|
line.long 0x18 "PPU0_PA8_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 8 (Peripheral 256 to 287)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x18 31. -0x198 31. -0xd8 31. " PA[287]_set/clr ,Peripheral 287 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 30. -0x198 30. -0xd8 30. " PA[286]_set/clr ,Peripheral 286 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 29. -0x198 29. -0xd8 29. " PA[285]_set/clr ,Peripheral 285 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 28. -0x198 28. -0xd8 28. " PA[284]_set/clr ,Peripheral 284 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x18 27. -0x198 27. -0xd8 27. " PA[283]_set/clr ,Peripheral 283 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 26. -0x198 26. -0xd8 26. " PA[282]_set/clr ,Peripheral 282 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 25. -0x198 25. -0xd8 25. " PA[281]_set/clr ,Peripheral 281 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 24. -0x198 24. -0xd8 24. " PA[280]_set/clr ,Peripheral 280 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x18 23. -0x198 23. -0xd8 23. " PA[279]_set/clr ,Peripheral 279 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 22. -0x198 22. -0xd8 22. " PA[278]_set/clr ,Peripheral 278 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 21. -0x198 21. -0xd8 21. " PA[277]_set/clr ,Peripheral 277 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 20. -0x198 20. -0xd8 20. " PA[276]_set/clr ,Peripheral 276 Access Attribute" "No access,Access"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x18 19. -0x198 19. -0xd8 19. " PA[275]_set/clr ,Peripheral 275 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 18. -0x198 18. -0xd8 18. " PA[274]_set/clr ,Peripheral 274 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x18 17. -0x198 17. -0xd8 17. " PA[273]_set/clr ,Peripheral 273 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 16. -0x198 16. -0xd8 16. " PA[272]_set/clr ,Peripheral 272 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 15. -0x198 15. -0xd8 15. " PA[271]_set/clr ,Peripheral 271 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 14. -0x198 14. -0xd8 14. " PA[270]_set/clr ,Peripheral 270 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x18 13. -0x198 13. -0xd8 13. " PA[269]_set/clr ,Peripheral 269 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 12. -0x198 12. -0xd8 12. " PA[268]_set/clr ,Peripheral 268 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 11. -0x198 11. -0xd8 11. " PA[267]_set/clr ,Peripheral 267 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 10. -0x198 10. -0xd8 10. " PA[266]_set/clr ,Peripheral 266 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x18 9. -0x198 9. -0xd8 9. " PA[265]_set/clr ,Peripheral 265 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 8. -0x198 8. -0xd8 8. " PA[264]_set/clr ,Peripheral 264 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 7. -0x198 7. -0xd8 7. " PA[263]_set/clr ,Peripheral 263 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 6. -0x198 6. -0xd8 6. " PA[262]_set/clr ,Peripheral 262 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x18 5. -0x198 5. -0xd8 5. " PA[261]_set/clr ,Peripheral 261 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 4. -0x198 4. -0xd8 4. " PA[260]_set/clr ,Peripheral 260 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x18 3. -0x198 3. -0xd8 3. " PA[259]_set/clr ,Peripheral 259 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 2. -0x198 2. -0xd8 2. " PA[258]_set/clr ,Peripheral 258 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x18 1. -0x198 1. -0xd8 1. " PA[257]_set/clr ,Peripheral 257 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 0. -0x198 0. -0xd8 0. " PA[256]_set/clr ,Peripheral 256 Access Attribute" "No access,Access"
|
|
endif
|
|
line.long 0x1c "PPU0_PA9_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 9 (Peripheral 288 to 319)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x1c 31. -0x19c 31. -0xdc 31. " PA[319]_set/clr ,Peripheral 319 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 30. -0x19c 30. -0xdc 30. " PA[318]_set/clr ,Peripheral 318 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 29. -0x19c 29. -0xdc 29. " PA[317]_set/clr ,Peripheral 317 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 28. -0x19c 28. -0xdc 28. " PA[316]_set/clr ,Peripheral 316 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x1c 27. -0x19c 27. -0xdc 27. " PA[315]_set/clr ,Peripheral 315 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 26. -0x19c 26. -0xdc 26. " PA[314]_set/clr ,Peripheral 314 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 25. -0x19c 25. -0xdc 25. " PA[313]_set/clr ,Peripheral 313 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 24. -0x19c 24. -0xdc 24. " PA[312]_set/clr ,Peripheral 312 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x1c 23. -0x19c 23. -0xdc 23. " PA[311]_set/clr ,Peripheral 311 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 22. -0x19c 22. -0xdc 22. " PA[310]_set/clr ,Peripheral 310 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 21. -0x19c 21. -0xdc 21. " PA[309]_set/clr ,Peripheral 309 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 20. -0x19c 20. -0xdc 20. " PA[308]_set/clr ,Peripheral 308 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x1c 19. -0x19c 19. -0xdc 19. " PA[307]_set/clr ,Peripheral 307 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 18. -0x19c 18. -0xdc 18. " PA[306]_set/clr ,Peripheral 306 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x1c 17. -0x19c 17. -0xdc 17. " PA[305]_set/clr ,Peripheral 305 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 16. -0x19c 16. -0xdc 16. " PA[304]_set/clr ,Peripheral 304 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x1c 15. -0x19c 15. -0xdc 15. " PA[303]_set/clr ,Peripheral 303 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 14. -0x19c 14. -0xdc 14. " PA[302]_set/clr ,Peripheral 302 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x1c 13. -0x19c 13. -0xdc 13. " PA[301]_set/clr ,Peripheral 301 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 12. -0x19c 12. -0xdc 12. " PA[300]_set/clr ,Peripheral 300 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 11. -0x19c 11. -0xdc 11. " PA[299]_set/clr ,Peripheral 299 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 10. -0x19c 10. -0xdc 10. " PA[298]_set/clr ,Peripheral 298 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. -0x19c 9. -0xdc 9. " PA[297]_set/clr ,Peripheral 297 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 8. -0x19c 8. -0xdc 8. " PA[296]_set/clr ,Peripheral 296 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 7. -0x19c 7. -0xdc 7. " PA[295]_set/clr ,Peripheral 295 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 6. -0x19c 6. -0xdc 6. " PA[294]_set/clr ,Peripheral 294 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x1c 5. -0x19c 5. -0xdc 5. " PA[293]_set/clr ,Peripheral 293 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 4. -0x19c 4. -0xdc 4. " PA[292]_set/clr ,Peripheral 292 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 3. -0x19c 3. -0xdc 3. " PA[291]_set/clr ,Peripheral 291 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 2. -0x19c 2. -0xdc 2. " PA[290]_set/clr ,Peripheral 290 Access Attribute" "No access,Access"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x1c 1. -0x19c 1. -0xdc 1. " PA[289]_set/clr ,Peripheral 289 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 0. -0x19c 0. -0xdc 0. " PA[288]_set/clr ,Peripheral 288 Access Attribute" "No access,Access"
|
|
line.long 0x20 "PPU0_PA10_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 10 (Peripheral 320 to 351)"
|
|
setclrfld.long 0x20 31. -0x1a0 31. -0xe0 31. " PA[351]_set/clr ,Peripheral 351 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 30. -0x1a0 30. -0xe0 30. " PA[350]_set/clr ,Peripheral 350 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 29. -0x1a0 29. -0xe0 29. " PA[349]_set/clr ,Peripheral 349 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 28. -0x1a0 28. -0xe0 28. " PA[348]_set/clr ,Peripheral 348 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x20 27. -0x1a0 27. -0xe0 27. " PA[347]_set/clr ,Peripheral 347 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x20 26. -0x1a0 26. -0xe0 26. " PA[346]_set/clr ,Peripheral 346 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x20 25. -0x1a0 25. -0xe0 25. " PA[345]_set/clr ,Peripheral 345 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x20 24. -0x1a0 24. -0xe0 24. " PA[344]_set/clr ,Peripheral 344 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126")
|
|
setclrfld.long 0x20 23. -0x1a0 23. -0xe0 23. " PA[343]_set/clr ,Peripheral 343 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 22. -0x1a0 22. -0xe0 22. " PA[342]_set/clr ,Peripheral 342 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 21. -0x1a0 21. -0xe0 21. " PA[341]_set/clr ,Peripheral 341 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 20. -0x1a0 20. -0xe0 20. " PA[340]_set/clr ,Peripheral 340 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x20 19. -0x1a0 19. -0xe0 19. " PA[339]_set/clr ,Peripheral 339 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 18. -0x1a0 18. -0xe0 18. " PA[338]_set/clr ,Peripheral 338 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 17. -0x1a0 17. -0xe0 17. " PA[337]_set/clr ,Peripheral 337 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 16. -0x1a0 16. -0xe0 16. " PA[336]_set/clr ,Peripheral 336 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x20 15. -0x1a0 15. -0xe0 15. " PA[335]_set/clr ,Peripheral 335 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 14. -0x1a0 14. -0xe0 14. " PA[334]_set/clr ,Peripheral 334 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 13. -0x1a0 13. -0xe0 13. " PA[333]_set/clr ,Peripheral 333 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 12. -0x1a0 12. -0xe0 12. " PA[332]_set/clr ,Peripheral 332 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x20 11. -0x1a0 11. -0xe0 11. " PA[331]_set/clr ,Peripheral 331 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x20 10. -0x1a0 10. -0xe0 10. " PA[330]_set/clr ,Peripheral 330 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 9. -0x1a0 9. -0xe0 9. " PA[329]_set/clr ,Peripheral 329 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 8. -0x1a0 8. -0xe0 8. " PA[328]_set/clr ,Peripheral 328 Access Attribute" "No access,Access"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x20 7. -0x1a0 7. -0xe0 7. " PA[327]_set/clr ,Peripheral 327 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 6. -0x1a0 6. -0xe0 6. " PA[326]_set/clr ,Peripheral 326 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 5. -0x1a0 5. -0xe0 5. " PA[325]_set/clr ,Peripheral 325 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 4. -0x1a0 4. -0xe0 4. " PA[324]_set/clr ,Peripheral 324 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x20 3. -0x1a0 3. -0xe0 3. " PA[323]_set/clr ,Peripheral 323 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 2. -0x1a0 2. -0xe0 2. " PA[322]_set/clr ,Peripheral 322 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 1. -0x1a0 1. -0xe0 1. " PA[321]_set/clr ,Peripheral 321 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 0. -0x1a0 0. -0xe0 0. " PA[320]_set/clr ,Peripheral 320 Access Attribute" "No access,Access"
|
|
line.long 0x24 "PPU0_PA11_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 11 (Peripheral 352 to 383)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x24 31. -0x1a4 31. -0xe4 31. " PA[383]_set/clr ,Peripheral 383 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 30. -0x1a4 30. -0xe4 30. " PA[382]_set/clr ,Peripheral 382 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 29. -0x1a4 29. -0xe4 29. " PA[381]_set/clr ,Peripheral 381 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 28. -0x1a4 28. -0xe4 28. " PA[380]_set/clr ,Peripheral 380 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x24 27. -0x1a4 27. -0xe4 27. " PA[379]_set/clr ,Peripheral 379 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 26. -0x1a4 26. -0xe4 26. " PA[378]_set/clr ,Peripheral 378 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 25. -0x1a4 25. -0xe4 25. " PA[377]_set/clr ,Peripheral 377 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 24. -0x1a4 24. -0xe4 24. " PA[376]_set/clr ,Peripheral 376 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x24 23. -0x1a4 23. -0xe4 23. " PA[375]_set/clr ,Peripheral 375 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 22. -0x1a4 22. -0xe4 22. " PA[374]_set/clr ,Peripheral 374 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 21. -0x1a4 21. -0xe4 21. " PA[373]_set/clr ,Peripheral 373 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 20. -0x1a4 20. -0xe4 20. " PA[372]_set/clr ,Peripheral 372 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x24 19. -0x1a4 19. -0xe4 19. " PA[371]_set/clr ,Peripheral 371 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 18. -0x1a4 18. -0xe4 18. " PA[370]_set/clr ,Peripheral 370 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x24 17. -0x1a4 17. -0xe4 17. " PA[369]_set/clr ,Peripheral 369 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 16. -0x1a4 16. -0xe4 16. " PA[368]_set/clr ,Peripheral 368 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x24 15. -0x1a4 15. -0xe4 15. " PA[367]_set/clr ,Peripheral 367 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 14. -0x1a4 14. -0xe4 14. " PA[366]_set/clr ,Peripheral 366 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 13. -0x1a4 13. -0xe4 13. " PA[365]_set/clr ,Peripheral 365 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 12. -0x1a4 12. -0xe4 12. " PA[364]_set/clr ,Peripheral 364 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x24 11. -0x1a4 11. -0xe4 11. " PA[363]_set/clr ,Peripheral 363 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 10. -0x1a4 10. -0xe4 10. " PA[362]_set/clr ,Peripheral 362 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 9. -0x1a4 9. -0xe4 9. " PA[361]_set/clr ,Peripheral 361 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 8. -0x1a4 8. -0xe4 8. " PA[360]_set/clr ,Peripheral 360 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x24 7. -0x1a4 7. -0xe4 7. " PA[359]_set/clr ,Peripheral 359 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 6. -0x1a4 6. -0xe4 6. " PA[358]_set/clr ,Peripheral 358 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 5. -0x1a4 5. -0xe4 5. " PA[357]_set/clr ,Peripheral 357 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 4. -0x1a4 4. -0xe4 4. " PA[356]_set/clr ,Peripheral 356 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x24 3. -0x1a4 3. -0xe4 3. " PA[355]_set/clr ,Peripheral 355 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 2. -0x1a4 2. -0xe4 2. " PA[354]_set/clr ,Peripheral 354 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 1. -0x1a4 1. -0xe4 1. " PA[353]_set/clr ,Peripheral 353 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 0. -0x1a4 0. -0xe4 0. " PA[352]_set/clr ,Peripheral 352 Access Attribute" "No access,Access"
|
|
line.long 0x28 "PPU0_PA12_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 12 (Peripheral 384 to 415)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x28 31. -0x1a8 31. -0xe8 31. " PA[415]_set/clr ,Peripheral 415 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 30. -0x1a8 30. -0xe8 30. " PA[414]_set/clr ,Peripheral 414 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 29. -0x1a8 29. -0xe8 29. " PA[413]_set/clr ,Peripheral 413 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 28. -0x1a8 28. -0xe8 28. " PA[412]_set/clr ,Peripheral 412 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x28 27. -0x1a8 27. -0xe8 27. " PA[411]_set/clr ,Peripheral 411 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 26. -0x1a8 26. -0xe8 26. " PA[410]_set/clr ,Peripheral 410 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 25. -0x1a8 25. -0xe8 25. " PA[409]_set/clr ,Peripheral 409 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 24. -0x1a8 24. -0xe8 24. " PA[408]_set/clr ,Peripheral 408 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x28 23. -0x1a8 23. -0xe8 23. " PA[407]_set/clr ,Peripheral 407 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 22. -0x1a8 22. -0xe8 22. " PA[406]_set/clr ,Peripheral 406 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 21. -0x1a8 21. -0xe8 21. " PA[405]_set/clr ,Peripheral 405 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 20. -0x1a8 20. -0xe8 20. " PA[404]_set/clr ,Peripheral 404 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x28 19. -0x1a8 19. -0xe8 19. " PA[403]_set/clr ,Peripheral 403 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 18. -0x1a8 18. -0xe8 18. " PA[402]_set/clr ,Peripheral 402 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 17. -0x1a8 17. -0xe8 17. " PA[401]_set/clr ,Peripheral 401 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 16. -0x1a8 16. -0xe8 16. " PA[400]_set/clr ,Peripheral 400 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x28 15. -0x1a8 15. -0xe8 15. " PA[399]_set/clr ,Peripheral 399 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 14. -0x1a8 14. -0xe8 14. " PA[398]_set/clr ,Peripheral 398 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 13. -0x1a8 13. -0xe8 13. " PA[397]_set/clr ,Peripheral 397 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 12. -0x1a8 12. -0xe8 12. " PA[396]_set/clr ,Peripheral 396 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x28 11. -0x1a8 11. -0xe8 11. " PA[395]_set/clr ,Peripheral 395 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 10. -0x1a8 10. -0xe8 10. " PA[394]_set/clr ,Peripheral 394 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 9. -0x1a8 9. -0xe8 9. " PA[393]_set/clr ,Peripheral 393 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 8. -0x1a8 8. -0xe8 8. " PA[392]_set/clr ,Peripheral 392 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x28 7. -0x1a8 7. -0xe8 7. " PA[391]_set/clr ,Peripheral 391 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 6. -0x1a8 6. -0xe8 6. " PA[390]_set/clr ,Peripheral 390 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 5. -0x1a8 5. -0xe8 5. " PA[389]_set/clr ,Peripheral 389 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 4. -0x1a8 4. -0xe8 4. " PA[388]_set/clr ,Peripheral 388 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x28 3. -0x1a8 3. -0xe8 3. " PA[387]_set/clr ,Peripheral 387 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 2. -0x1a8 2. -0xe8 2. " PA[386]_set/clr ,Peripheral 386 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 1. -0x1a8 1. -0xe8 1. " PA[385]_set/clr ,Peripheral 385 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 0. -0x1a8 0. -0xe8 0. " PA[384]_set/clr ,Peripheral 384 Access Attribute" "No access,Access"
|
|
line.long 0x2c "PPU0_PA13_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 13 (Peripheral 416 to 447)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x2c 31. -0x1ac 31. -0xec 31. " PA[447]_set/clr ,Peripheral 447 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 30. -0x1ac 30. -0xec 30. " PA[446]_set/clr ,Peripheral 446 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 29. -0x1ac 29. -0xec 29. " PA[445]_set/clr ,Peripheral 445 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 28. -0x1ac 28. -0xec 28. " PA[444]_set/clr ,Peripheral 444 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x2c 27. -0x1ac 27. -0xec 27. " PA[443]_set/clr ,Peripheral 443 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 26. -0x1ac 26. -0xec 26. " PA[442]_set/clr ,Peripheral 442 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 25. -0x1ac 25. -0xec 25. " PA[441]_set/clr ,Peripheral 441 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 24. -0x1ac 24. -0xec 24. " PA[440]_set/clr ,Peripheral 440 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x2c 23. -0x1ac 23. -0xec 23. " PA[439]_set/clr ,Peripheral 439 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 22. -0x1ac 22. -0xec 22. " PA[438]_set/clr ,Peripheral 438 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 21. -0x1ac 21. -0xec 21. " PA[437]_set/clr ,Peripheral 437 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 20. -0x1ac 20. -0xec 20. " PA[436]_set/clr ,Peripheral 436 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x2c 19. -0x1ac 19. -0xec 19. " PA[435]_set/clr ,Peripheral 435 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 18. -0x1ac 18. -0xec 18. " PA[434]_set/clr ,Peripheral 434 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 17. -0x1ac 17. -0xec 17. " PA[433]_set/clr ,Peripheral 433 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 16. -0x1ac 16. -0xec 16. " PA[432]_set/clr ,Peripheral 432 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x2c 15. -0x1ac 15. -0xec 15. " PA[431]_set/clr ,Peripheral 431 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 14. -0x1ac 14. -0xec 14. " PA[430]_set/clr ,Peripheral 430 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 13. -0x1ac 13. -0xec 13. " PA[429]_set/clr ,Peripheral 429 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 12. -0x1ac 12. -0xec 12. " PA[428]_set/clr ,Peripheral 428 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x2c 11. -0x1ac 11. -0xec 11. " PA[427]_set/clr ,Peripheral 427 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 10. -0x1ac 10. -0xec 10. " PA[426]_set/clr ,Peripheral 426 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 9. -0x1ac 9. -0xec 9. " PA[425]_set/clr ,Peripheral 425 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 8. -0x1ac 8. -0xec 8. " PA[424]_set/clr ,Peripheral 424 Access Attribute" "No access,Access"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x2c 7. -0x1ac 7. -0xec 7. " PA[423]_set/clr ,Peripheral 423 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 6. -0x1ac 6. -0xec 6. " PA[422]_set/clr ,Peripheral 422 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 5. -0x1ac 5. -0xec 5. " PA[421]_set/clr ,Peripheral 421 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 4. -0x1ac 4. -0xec 4. " PA[420]_set/clr ,Peripheral 420 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x2c 3. -0x1ac 3. -0xec 3. " PA[419]_set/clr ,Peripheral 419 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 2. -0x1ac 2. -0xec 2. " PA[418]_set/clr ,Peripheral 418 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 1. -0x1ac 1. -0xec 1. " PA[417]_set/clr ,Peripheral 417 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 0. -0x1ac 0. -0xec 0. " PA[416]_set/clr ,Peripheral 416 Access Attribute" "No access,Access"
|
|
else
|
|
rgroup.long 0x1c8++0x2f
|
|
line.long 0x00 "PPU0_PA2_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 2 (Peripheral 64 to 95)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x00 31. -0x180 31. -0xc0 31. " PA[95]_set/clr ,Peripheral 95 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 30. -0x180 30. -0xc0 30. " PA[94]_set/clr ,Peripheral 94 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 29. -0x180 29. -0xc0 29. " PA[93]_set/clr ,Peripheral 93 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 28. -0x180 28. -0xc0 28. " PA[92]_set/clr ,Peripheral 92 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x180 27. -0xc0 27. " PA[91]_set/clr ,Peripheral 91 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 26. -0x180 26. -0xc0 26. " PA[90]_set/clr ,Peripheral 90 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 25. -0x180 25. -0xc0 25. " PA[89]_set/clr ,Peripheral 89 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 24. -0x180 24. -0xc0 24. " PA[88]_set/clr ,Peripheral 88 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x180 23. -0xc0 23. " PA[87]_set/clr ,Peripheral 87 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 22. -0x180 22. -0xc0 22. " PA[86]_set/clr ,Peripheral 86 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 21. -0x180 21. -0xc0 21. " PA[85]_set/clr ,Peripheral 85 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 20. -0x180 20. -0xc0 20. " PA[84]_set/clr ,Peripheral 84 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x180 19. -0xc0 19. " PA[83]_set/clr ,Peripheral 83 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 18. -0x180 18. -0xc0 18. " PA[82]_set/clr ,Peripheral 82 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 17. -0x180 17. -0xc0 17. " PA[81]_set/clr ,Peripheral 81 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 16. -0x180 16. -0xc0 16. " PA[80]_set/clr ,Peripheral 80 Access Attribute" "No access,Access"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x00 15. -0x180 15. -0xc0 15. " PA[79]_set/clr ,Peripheral 79 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 14. -0x180 14. -0xc0 14. " PA[78]_set/clr ,Peripheral 78 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x180 13. -0xc0 13. " PA[77]_set/clr ,Peripheral 77 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 12. -0x180 12. -0xc0 12. " PA[76]_set/clr ,Peripheral 76 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 11. -0x180 11. -0xc0 11. " PA[75]_set/clr ,Peripheral 75 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 10. -0x180 10. -0xc0 10. " PA[74]_set/clr ,Peripheral 74 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x180 9. -0xc0 9. " PA[73]_set/clr ,Peripheral 73 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 8. -0x180 8. -0xc0 8. " PA[72]_set/clr ,Peripheral 72 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 7. -0x180 7. -0xc0 7. " PA[71]_set/clr ,Peripheral 71 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 6. -0x180 6. -0xc0 6. " PA[70]_set/clr ,Peripheral 70 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 5. -0x180 5. -0xc0 5. " PA[69]_set/clr ,Peripheral 69 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 4. -0x180 4. -0xc0 4. " PA[68]_set/clr ,Peripheral 68 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 3. -0x180 3. -0xc0 3. " PA[67]_set/clr ,Peripheral 67 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x180 2. -0xc0 2. " PA[66]_set/clr ,Peripheral 66 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 1. -0x180 1. -0xc0 1. " PA[65]_set/clr ,Peripheral 65 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 0. -0x180 0. -0xc0 0. " PA[64]_set/clr ,Peripheral 64 Access Attribute" "No access,Access"
|
|
line.long 0x04 "PPU0_PA3_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 3 (Peripheral 96 to 127)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x04 31. -0x184 31. -0xc4 31. " PA[127]_set/clr ,Peripheral 127 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 30. -0x184 30. -0xc4 30. " PA[126]_set/clr ,Peripheral 126 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 29. -0x184 29. -0xc4 29. " PA[125]_set/clr ,Peripheral 125 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 28. -0x184 28. -0xc4 28. " PA[124]_set/clr ,Peripheral 124 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 27. -0x184 27. -0xc4 27. " PA[123]_set/clr ,Peripheral 123 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 26. -0x184 26. -0xc4 26. " PA[122]_set/clr ,Peripheral 122 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 25. -0x184 25. -0xc4 25. " PA[121]_set/clr ,Peripheral 121 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x04 24. -0x184 24. -0xc4 24. " PA[120]_set/clr ,Peripheral 120 Access Attribute" "No access,Access"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x04 23. -0x184 23. -0xc4 23. " PA[119]_set/clr ,Peripheral 119 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 22. -0x184 22. -0xc4 22. " PA[118]_set/clr ,Peripheral 118 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 21. -0x184 21. -0xc4 21. " PA[117]_set/clr ,Peripheral 117 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 20. -0x184 20. -0xc4 20. " PA[116]_set/clr ,Peripheral 116 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 19. -0x184 19. -0xc4 19. " PA[115]_set/clr ,Peripheral 115 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 18. -0x184 18. -0xc4 18. " PA[114]_set/clr ,Peripheral 114 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x04 17. -0x184 17. -0xc4 17. " PA[113]_set/clr ,Peripheral 113 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 16. -0x184 16. -0xc4 16. " PA[112]_set/clr ,Peripheral 112 Access Attribute" "No access,Access"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x04 15. -0x184 15. -0xc4 15. " PA[111]_set/clr ,Peripheral 111 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 14. -0x184 14. -0xc4 14. " PA[110]_set/clr ,Peripheral 110 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 13. -0x184 13. -0xc4 13. " PA[109]_set/clr ,Peripheral 109 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 12. -0x184 12. -0xc4 12. " PA[108]_set/clr ,Peripheral 108 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 11. -0x184 11. -0xc4 11. " PA[107]_set/clr ,Peripheral 107 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 10. -0x184 10. -0xc4 10. " PA[106]_set/clr ,Peripheral 106 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 9. -0x184 9. -0xc4 9. " PA[105]_set/clr ,Peripheral 105 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x04 8. -0x184 8. -0xc4 8. " PA[104]_set/clr ,Peripheral 104 Access Attribute" "No access,Access"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF125")
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.long 0x04 7. -0x184 7. -0xc4 7. " PA[103]_set/clr ,Peripheral 103 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 6. -0x184 6. -0xc4 6. " PA[102]_set/clr ,Peripheral 102 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 5. -0x184 5. -0xc4 5. " PA[101]_set/clr ,Peripheral 101 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x04 4. -0x184 4. -0xc4 4. " PA[100]_set/clr ,Peripheral 100 Access Attribute" "No access,Access"
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.long 0x04 3. -0x184 3. -0xc4 3. " PA[99]_set/clr ,Peripheral 99 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 2. -0x184 2. -0xc4 2. " PA[98]_set/clr ,Peripheral 98 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 1. -0x184 1. -0xc4 1. " PA[97]_set/clr ,Peripheral 97 Access Attribute" "No access,Access"
|
|
endif
|
|
endif
|
|
setclrfld.long 0x04 0. -0x184 0. -0xc4 0. " PA[96]_set/clr ,Peripheral 96 Access Attribute" "No access,Access"
|
|
line.long 0x08 "PPU0_PA4_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 4 (Peripheral 128 to 159)"
|
|
sif cpu()!="MB9EF126"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.long 0x08 31. -0x188 31. -0xc8 31. " PA[128]_set/clr ,Peripheral 128 Access Attribute" "No access,Access"
|
|
endif
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.long 0x08 30. -0x188 30. -0xc8 30. " PA[129]_set/clr ,Peripheral 129 Access Attribute" "No access,Access"
|
|
sif cpu()!="MB9DF125"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.long 0x08 29. -0x188 29. -0xc8 29. " PA[130]_set/clr ,Peripheral 130 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x08 28. -0x188 28. -0xc8 28. " PA[131]_set/clr ,Peripheral 131 Access Attribute" "No access,Access"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.long 0x08 27. -0x188 27. -0xc8 27. " PA[132]_set/clr ,Peripheral 132 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 26. -0x188 26. -0xc8 26. " PA[133]_set/clr ,Peripheral 133 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 25. -0x188 25. -0xc8 25. " PA[134]_set/clr ,Peripheral 134 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 24. -0x188 24. -0xc8 24. " PA[135]_set/clr ,Peripheral 135 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 23. -0x188 23. -0xc8 23. " PA[136]_set/clr ,Peripheral 136 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 22. -0x188 22. -0xc8 22. " PA[137]_set/clr ,Peripheral 137 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 21. -0x188 21. -0xc8 21. " PA[138]_set/clr ,Peripheral 138 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x08 20. -0x188 20. -0xc8 20. " PA[139]_set/clr ,Peripheral 139 Access Attribute" "No access,Access"
|
|
sif cpu()!="MB9EF126"
|
|
textline " "
|
|
setclrfld.long 0x08 19. -0x188 19. -0xc8 19. " PA[140]_set/clr ,Peripheral 140 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 18. -0x188 18. -0xc8 18. " PA[141]_set/clr ,Peripheral 141 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 17. -0x188 17. -0xc8 17. " PA[142]_set/clr ,Peripheral 142 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
endif
|
|
endif
|
|
endif
|
|
setclrfld.long 0x08 16. -0x188 16. -0xc8 16. " PA[143]_set/clr ,Peripheral 143 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 15. -0x188 15. -0xc8 15. " PA[144]_set/clr ,Peripheral 144 Access Attribute" "No access,Access"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x08 14. -0x188 14. -0xc8 14. " PA[145]_set/clr ,Peripheral 145 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 13. -0x188 13. -0xc8 13. " PA[146]_set/clr ,Peripheral 146 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 12. -0x188 12. -0xc8 12. " PA[147]_set/clr ,Peripheral 147 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 11. -0x188 11. -0xc8 11. " PA[148]_set/clr ,Peripheral 148 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 10. -0x188 10. -0xc8 10. " PA[149]_set/clr ,Peripheral 149 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 9. -0x188 9. -0xc8 9. " PA[150]_set/clr ,Peripheral 150 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 8. -0x188 8. -0xc8 8. " PA[151]_set/clr ,Peripheral 151 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 7. -0x188 7. -0xc8 7. " PA[152]_set/clr ,Peripheral 152 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 6. -0x188 6. -0xc8 6. " PA[153]_set/clr ,Peripheral 153 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 5. -0x188 5. -0xc8 5. " PA[154]_set/clr ,Peripheral 154 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 4. -0x188 4. -0xc8 4. " PA[155]_set/clr ,Peripheral 155 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 3. -0x188 3. -0xc8 3. " PA[156]_set/clr ,Peripheral 156 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x08 2. -0x188 2. -0xc8 2. " PA[157]_set/clr ,Peripheral 157 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 1. -0x188 1. -0xc8 1. " PA[158]_set/clr ,Peripheral 158 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 0. -0x188 0. -0xc8 0. " PA[159]_set/clr ,Peripheral 159 Access Attribute" "No access,Access"
|
|
line.long 0x0c "PPU0_PA5_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 5 (Peripheral 160 to 191)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9DF125")
|
|
sif (cpu()!="MB9EF126"&&cpu()!="MB9DF126")
|
|
setclrfld.long 0x0c 31. -0x18c 31. -0xcc 31. " PA[191]_set/clr ,Peripheral 191 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 30. -0x18c 30. -0xcc 30. " PA[190]_set/clr ,Peripheral 190 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 29. -0x18c 29. -0xcc 29. " PA[189]_set/clr ,Peripheral 189 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 28. -0x18c 28. -0xcc 28. " PA[188]_set/clr ,Peripheral 188 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 27. -0x18c 27. -0xcc 27. " PA[187]_set/clr ,Peripheral 187 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 26. -0x18c 26. -0xcc 26. " PA[186]_set/clr ,Peripheral 186 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 25. -0x18c 25. -0xcc 25. " PA[185]_set/clr ,Peripheral 185 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 24. -0x18c 24. -0xcc 24. " PA[184]_set/clr ,Peripheral 184 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 23. -0x18c 23. -0xcc 23. " PA[183]_set/clr ,Peripheral 183 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 22. -0x18c 22. -0xcc 22. " PA[182]_set/clr ,Peripheral 182 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 21. -0x18c 21. -0xcc 21. " PA[181]_set/clr ,Peripheral 181 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 20. -0x18c 20. -0xcc 20. " PA[180]_set/clr ,Peripheral 180 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. -0x18c 19. -0xcc 19. " PA[179]_set/clr ,Peripheral 179 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x0c 18. -0x18c 18. -0xcc 18. " PA[178]_set/clr ,Peripheral 178 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x0c 17. -0x18c 17. -0xcc 17. " PA[177]_set/clr ,Peripheral 177 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 16. -0x18c 16. -0xcc 16. " PA[176]_set/clr ,Peripheral 176 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x0c 15. -0x18c 15. -0xcc 15. " PA[175]_set/clr ,Peripheral 175 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 14. -0x18c 14. -0xcc 14. " PA[174]_set/clr ,Peripheral 174 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. -0x18c 13. -0xcc 13. " PA[173]_set/clr ,Peripheral 173 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 12. -0x18c 12. -0xcc 12. " PA[172]_set/clr ,Peripheral 172 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 11. -0x18c 11. -0xcc 11. " PA[171]_set/clr ,Peripheral 171 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 10. -0x18c 10. -0xcc 10. " PA[170]_set/clr ,Peripheral 170 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 9. -0x18c 9. -0xcc 9. " PA[169]_set/clr ,Peripheral 169 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 8. -0x18c 8. -0xcc 8. " PA[168]_set/clr ,Peripheral 168 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 7. -0x18c 7. -0xcc 7. " PA[167]_set/clr ,Peripheral 167 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x0c 6. -0x18c 6. -0xcc 6. " PA[166]_set/clr ,Peripheral 166 Access Attribute" "No access,Access"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x0c 5. -0x18c 5. -0xcc 5. " PA[165]_set/clr ,Peripheral 165 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 4. -0x18c 4. -0xcc 4. " PA[164]_set/clr ,Peripheral 164 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 3. -0x18c 3. -0xcc 3. " PA[163]_set/clr ,Peripheral 163 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 2. -0x18c 2. -0xcc 2. " PA[162]_set/clr ,Peripheral 162 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. -0x18c 1. -0xcc 1. " PA[161]_set/clr ,Peripheral 161 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x0c 0. -0x18c 0. -0xcc 0. " PA[160]_set/clr ,Peripheral 160 Access Attribute" "No access,Access"
|
|
line.long 0x10 "PPU0_PA6_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 6 (Peripheral 192 to 223)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x10 31. -0x190 31. -0xd0 31. " PA[223]_set/clr ,Peripheral 223 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 30. -0x190 30. -0xd0 30. " PA[222]_set/clr ,Peripheral 222 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 29. -0x190 29. -0xd0 29. " PA[221]_set/clr ,Peripheral 221 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 28. -0x190 28. -0xd0 28. " PA[220]_set/clr ,Peripheral 220 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 27. -0x190 27. -0xd0 27. " PA[219]_set/clr ,Peripheral 219 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 26. -0x190 26. -0xd0 26. " PA[218]_set/clr ,Peripheral 218 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 25. -0x190 25. -0xd0 25. " PA[217]_set/clr ,Peripheral 217 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 24. -0x190 24. -0xd0 24. " PA[216]_set/clr ,Peripheral 216 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 23. -0x190 23. -0xd0 23. " PA[215]_set/clr ,Peripheral 215 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 22. -0x190 22. -0xd0 22. " PA[214]_set/clr ,Peripheral 214 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 21. -0x190 21. -0xd0 21. " PA[213]_set/clr ,Peripheral 213 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 20. -0x190 20. -0xd0 20. " PA[212]_set/clr ,Peripheral 212 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 19. -0x190 19. -0xd0 19. " PA[211]_set/clr ,Peripheral 211 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 18. -0x190 18. -0xd0 18. " PA[210]_set/clr ,Peripheral 210 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 17. -0x190 17. -0xd0 17. " PA[209]_set/clr ,Peripheral 209 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 16. -0x190 16. -0xd0 16. " PA[208]_set/clr ,Peripheral 208 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 15. -0x190 15. -0xd0 15. " PA[207]_set/clr ,Peripheral 207 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 14. -0x190 14. -0xd0 14. " PA[206]_set/clr ,Peripheral 206 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 13. -0x190 13. -0xd0 13. " PA[205]_set/clr ,Peripheral 205 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 12. -0x190 12. -0xd0 12. " PA[204]_set/clr ,Peripheral 204 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 11. -0x190 11. -0xd0 11. " PA[203]_set/clr ,Peripheral 203 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 10. -0x190 10. -0xd0 10. " PA[202]_set/clr ,Peripheral 202 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x10 9. -0x190 9. -0xd0 9. " PA[201]_set/clr ,Peripheral 201 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 8. -0x190 8. -0xd0 8. " PA[200]_set/clr ,Peripheral 200 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 7. -0x190 7. -0xd0 7. " PA[199]_set/clr ,Peripheral 199 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 6. -0x190 6. -0xd0 6. " PA[198]_set/clr ,Peripheral 198 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 5. -0x190 5. -0xd0 5. " PA[197]_set/clr ,Peripheral 197 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 4. -0x190 4. -0xd0 4. " PA[196]_set/clr ,Peripheral 196 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 3. -0x190 3. -0xd0 3. " PA[195]_set/clr ,Peripheral 195 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 2. -0x190 2. -0xd0 2. " PA[194]_set/clr ,Peripheral 194 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 1. -0x190 1. -0xd0 1. " PA[193]_set/clr ,Peripheral 193 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 0. -0x190 0. -0xd0 0. " PA[192]_set/clr ,Peripheral 192 Access Attribute" "No access,Access"
|
|
line.long 0x14 "PPU0_PA7_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 7 (Peripheral 224 to 255)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x14 31. -0x194 31. -0xd4 31. " PA[255]_set/clr ,Peripheral 255 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 30. -0x194 30. -0xd4 30. " PA[254]_set/clr ,Peripheral 254 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 29. -0x194 29. -0xd4 29. " PA[253]_set/clr ,Peripheral 253 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 28. -0x194 28. -0xd4 28. " PA[252]_set/clr ,Peripheral 252 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 27. -0x194 27. -0xd4 27. " PA[251]_set/clr ,Peripheral 251 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 26. -0x194 26. -0xd4 26. " PA[250]_set/clr ,Peripheral 250 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 25. -0x194 25. -0xd4 25. " PA[249]_set/clr ,Peripheral 249 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 24. -0x194 24. -0xd4 24. " PA[248]_set/clr ,Peripheral 248 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 23. -0x194 23. -0xd4 23. " PA[247]_set/clr ,Peripheral 247 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 22. -0x194 22. -0xd4 22. " PA[246]_set/clr ,Peripheral 246 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 21. -0x194 21. -0xd4 21. " PA[245]_set/clr ,Peripheral 245 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 20. -0x194 20. -0xd4 20. " PA[244]_set/clr ,Peripheral 244 Access Attribute" "No access,Access"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x14 19. -0x194 19. -0xd4 19. " PA[243]_set/clr ,Peripheral 243 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 18. -0x194 18. -0xd4 18. " PA[242]_set/clr ,Peripheral 242 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 17. -0x194 17. -0xd4 17. " PA[241]_set/clr ,Peripheral 241 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 16. -0x194 16. -0xd4 16. " PA[240]_set/clr ,Peripheral 240 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x14 15. -0x194 15. -0xd4 15. " PA[239]_set/clr ,Peripheral 239 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 14. -0x194 14. -0xd4 14. " PA[238]_set/clr ,Peripheral 238 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 13. -0x194 13. -0xd4 13. " PA[237]_set/clr ,Peripheral 237 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 12. -0x194 12. -0xd4 12. " PA[236]_set/clr ,Peripheral 236 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 11. -0x194 11. -0xd4 11. " PA[235]_set/clr ,Peripheral 235 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 10. -0x194 10. -0xd4 10. " PA[234]_set/clr ,Peripheral 234 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 9. -0x194 9. -0xd4 9. " PA[233]_set/clr ,Peripheral 233 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 8. -0x194 8. -0xd4 8. " PA[232]_set/clr ,Peripheral 232 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 7. -0x194 7. -0xd4 7. " PA[231]_set/clr ,Peripheral 231 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 6. -0x194 6. -0xd4 6. " PA[230]_set/clr ,Peripheral 230 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 5. -0x194 5. -0xd4 5. " PA[229]_set/clr ,Peripheral 229 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 4. -0x194 4. -0xd4 4. " PA[228]_set/clr ,Peripheral 228 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x14 3. -0x194 3. -0xd4 3. " PA[227]_set/clr ,Peripheral 227 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 2. -0x194 2. -0xd4 2. " PA[226]_set/clr ,Peripheral 226 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 1. -0x194 1. -0xd4 1. " PA[225]_set/clr ,Peripheral 225 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 0. -0x194 0. -0xd4 0. " PA[224]_set/clr ,Peripheral 224 Access Attribute" "No access,Access"
|
|
line.long 0x18 "PPU0_PA8_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 8 (Peripheral 256 to 287)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x18 31. -0x198 31. -0xd8 31. " PA[287]_set/clr ,Peripheral 287 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 30. -0x198 30. -0xd8 30. " PA[286]_set/clr ,Peripheral 286 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 29. -0x198 29. -0xd8 29. " PA[285]_set/clr ,Peripheral 285 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 28. -0x198 28. -0xd8 28. " PA[284]_set/clr ,Peripheral 284 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x18 27. -0x198 27. -0xd8 27. " PA[283]_set/clr ,Peripheral 283 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 26. -0x198 26. -0xd8 26. " PA[282]_set/clr ,Peripheral 282 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 25. -0x198 25. -0xd8 25. " PA[281]_set/clr ,Peripheral 281 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 24. -0x198 24. -0xd8 24. " PA[280]_set/clr ,Peripheral 280 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x18 23. -0x198 23. -0xd8 23. " PA[279]_set/clr ,Peripheral 279 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 22. -0x198 22. -0xd8 22. " PA[278]_set/clr ,Peripheral 278 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 21. -0x198 21. -0xd8 21. " PA[277]_set/clr ,Peripheral 277 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 20. -0x198 20. -0xd8 20. " PA[276]_set/clr ,Peripheral 276 Access Attribute" "No access,Access"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x18 19. -0x198 19. -0xd8 19. " PA[275]_set/clr ,Peripheral 275 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 18. -0x198 18. -0xd8 18. " PA[274]_set/clr ,Peripheral 274 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x18 17. -0x198 17. -0xd8 17. " PA[273]_set/clr ,Peripheral 273 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 16. -0x198 16. -0xd8 16. " PA[272]_set/clr ,Peripheral 272 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 15. -0x198 15. -0xd8 15. " PA[271]_set/clr ,Peripheral 271 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 14. -0x198 14. -0xd8 14. " PA[270]_set/clr ,Peripheral 270 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x18 13. -0x198 13. -0xd8 13. " PA[269]_set/clr ,Peripheral 269 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 12. -0x198 12. -0xd8 12. " PA[268]_set/clr ,Peripheral 268 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 11. -0x198 11. -0xd8 11. " PA[267]_set/clr ,Peripheral 267 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 10. -0x198 10. -0xd8 10. " PA[266]_set/clr ,Peripheral 266 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x18 9. -0x198 9. -0xd8 9. " PA[265]_set/clr ,Peripheral 265 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 8. -0x198 8. -0xd8 8. " PA[264]_set/clr ,Peripheral 264 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 7. -0x198 7. -0xd8 7. " PA[263]_set/clr ,Peripheral 263 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 6. -0x198 6. -0xd8 6. " PA[262]_set/clr ,Peripheral 262 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x18 5. -0x198 5. -0xd8 5. " PA[261]_set/clr ,Peripheral 261 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 4. -0x198 4. -0xd8 4. " PA[260]_set/clr ,Peripheral 260 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x18 3. -0x198 3. -0xd8 3. " PA[259]_set/clr ,Peripheral 259 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 2. -0x198 2. -0xd8 2. " PA[258]_set/clr ,Peripheral 258 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x18 1. -0x198 1. -0xd8 1. " PA[257]_set/clr ,Peripheral 257 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x18 0. -0x198 0. -0xd8 0. " PA[256]_set/clr ,Peripheral 256 Access Attribute" "No access,Access"
|
|
endif
|
|
line.long 0x1c "PPU0_PA9_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 9 (Peripheral 288 to 319)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x1c 31. -0x19c 31. -0xdc 31. " PA[319]_set/clr ,Peripheral 319 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 30. -0x19c 30. -0xdc 30. " PA[318]_set/clr ,Peripheral 318 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 29. -0x19c 29. -0xdc 29. " PA[317]_set/clr ,Peripheral 317 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 28. -0x19c 28. -0xdc 28. " PA[316]_set/clr ,Peripheral 316 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x1c 27. -0x19c 27. -0xdc 27. " PA[315]_set/clr ,Peripheral 315 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 26. -0x19c 26. -0xdc 26. " PA[314]_set/clr ,Peripheral 314 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 25. -0x19c 25. -0xdc 25. " PA[313]_set/clr ,Peripheral 313 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 24. -0x19c 24. -0xdc 24. " PA[312]_set/clr ,Peripheral 312 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x1c 23. -0x19c 23. -0xdc 23. " PA[311]_set/clr ,Peripheral 311 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 22. -0x19c 22. -0xdc 22. " PA[310]_set/clr ,Peripheral 310 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 21. -0x19c 21. -0xdc 21. " PA[309]_set/clr ,Peripheral 309 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 20. -0x19c 20. -0xdc 20. " PA[308]_set/clr ,Peripheral 308 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x1c 19. -0x19c 19. -0xdc 19. " PA[307]_set/clr ,Peripheral 307 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 18. -0x19c 18. -0xdc 18. " PA[306]_set/clr ,Peripheral 306 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x1c 17. -0x19c 17. -0xdc 17. " PA[305]_set/clr ,Peripheral 305 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 16. -0x19c 16. -0xdc 16. " PA[304]_set/clr ,Peripheral 304 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x1c 15. -0x19c 15. -0xdc 15. " PA[303]_set/clr ,Peripheral 303 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 14. -0x19c 14. -0xdc 14. " PA[302]_set/clr ,Peripheral 302 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x1c 13. -0x19c 13. -0xdc 13. " PA[301]_set/clr ,Peripheral 301 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 12. -0x19c 12. -0xdc 12. " PA[300]_set/clr ,Peripheral 300 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 11. -0x19c 11. -0xdc 11. " PA[299]_set/clr ,Peripheral 299 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 10. -0x19c 10. -0xdc 10. " PA[298]_set/clr ,Peripheral 298 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. -0x19c 9. -0xdc 9. " PA[297]_set/clr ,Peripheral 297 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 8. -0x19c 8. -0xdc 8. " PA[296]_set/clr ,Peripheral 296 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 7. -0x19c 7. -0xdc 7. " PA[295]_set/clr ,Peripheral 295 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 6. -0x19c 6. -0xdc 6. " PA[294]_set/clr ,Peripheral 294 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x1c 5. -0x19c 5. -0xdc 5. " PA[293]_set/clr ,Peripheral 293 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 4. -0x19c 4. -0xdc 4. " PA[292]_set/clr ,Peripheral 292 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 3. -0x19c 3. -0xdc 3. " PA[291]_set/clr ,Peripheral 291 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 2. -0x19c 2. -0xdc 2. " PA[290]_set/clr ,Peripheral 290 Access Attribute" "No access,Access"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x1c 1. -0x19c 1. -0xdc 1. " PA[289]_set/clr ,Peripheral 289 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x1c 0. -0x19c 0. -0xdc 0. " PA[288]_set/clr ,Peripheral 288 Access Attribute" "No access,Access"
|
|
line.long 0x20 "PPU0_PA10_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 10 (Peripheral 320 to 351)"
|
|
setclrfld.long 0x20 31. -0x1a0 31. -0xe0 31. " PA[351]_set/clr ,Peripheral 351 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 30. -0x1a0 30. -0xe0 30. " PA[350]_set/clr ,Peripheral 350 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 29. -0x1a0 29. -0xe0 29. " PA[349]_set/clr ,Peripheral 349 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 28. -0x1a0 28. -0xe0 28. " PA[348]_set/clr ,Peripheral 348 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x20 27. -0x1a0 27. -0xe0 27. " PA[347]_set/clr ,Peripheral 347 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x20 26. -0x1a0 26. -0xe0 26. " PA[346]_set/clr ,Peripheral 346 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x20 25. -0x1a0 25. -0xe0 25. " PA[345]_set/clr ,Peripheral 345 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x20 24. -0x1a0 24. -0xe0 24. " PA[344]_set/clr ,Peripheral 344 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126")
|
|
setclrfld.long 0x20 23. -0x1a0 23. -0xe0 23. " PA[343]_set/clr ,Peripheral 343 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 22. -0x1a0 22. -0xe0 22. " PA[342]_set/clr ,Peripheral 342 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 21. -0x1a0 21. -0xe0 21. " PA[341]_set/clr ,Peripheral 341 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 20. -0x1a0 20. -0xe0 20. " PA[340]_set/clr ,Peripheral 340 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x20 19. -0x1a0 19. -0xe0 19. " PA[339]_set/clr ,Peripheral 339 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 18. -0x1a0 18. -0xe0 18. " PA[338]_set/clr ,Peripheral 338 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 17. -0x1a0 17. -0xe0 17. " PA[337]_set/clr ,Peripheral 337 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 16. -0x1a0 16. -0xe0 16. " PA[336]_set/clr ,Peripheral 336 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x20 15. -0x1a0 15. -0xe0 15. " PA[335]_set/clr ,Peripheral 335 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 14. -0x1a0 14. -0xe0 14. " PA[334]_set/clr ,Peripheral 334 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 13. -0x1a0 13. -0xe0 13. " PA[333]_set/clr ,Peripheral 333 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 12. -0x1a0 12. -0xe0 12. " PA[332]_set/clr ,Peripheral 332 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x20 11. -0x1a0 11. -0xe0 11. " PA[331]_set/clr ,Peripheral 331 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x20 10. -0x1a0 10. -0xe0 10. " PA[330]_set/clr ,Peripheral 330 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 9. -0x1a0 9. -0xe0 9. " PA[329]_set/clr ,Peripheral 329 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 8. -0x1a0 8. -0xe0 8. " PA[328]_set/clr ,Peripheral 328 Access Attribute" "No access,Access"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x20 7. -0x1a0 7. -0xe0 7. " PA[327]_set/clr ,Peripheral 327 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 6. -0x1a0 6. -0xe0 6. " PA[326]_set/clr ,Peripheral 326 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 5. -0x1a0 5. -0xe0 5. " PA[325]_set/clr ,Peripheral 325 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 4. -0x1a0 4. -0xe0 4. " PA[324]_set/clr ,Peripheral 324 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x20 3. -0x1a0 3. -0xe0 3. " PA[323]_set/clr ,Peripheral 323 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 2. -0x1a0 2. -0xe0 2. " PA[322]_set/clr ,Peripheral 322 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 1. -0x1a0 1. -0xe0 1. " PA[321]_set/clr ,Peripheral 321 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x20 0. -0x1a0 0. -0xe0 0. " PA[320]_set/clr ,Peripheral 320 Access Attribute" "No access,Access"
|
|
line.long 0x24 "PPU0_PA11_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 11 (Peripheral 352 to 383)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x24 31. -0x1a4 31. -0xe4 31. " PA[383]_set/clr ,Peripheral 383 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 30. -0x1a4 30. -0xe4 30. " PA[382]_set/clr ,Peripheral 382 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 29. -0x1a4 29. -0xe4 29. " PA[381]_set/clr ,Peripheral 381 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 28. -0x1a4 28. -0xe4 28. " PA[380]_set/clr ,Peripheral 380 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x24 27. -0x1a4 27. -0xe4 27. " PA[379]_set/clr ,Peripheral 379 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 26. -0x1a4 26. -0xe4 26. " PA[378]_set/clr ,Peripheral 378 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 25. -0x1a4 25. -0xe4 25. " PA[377]_set/clr ,Peripheral 377 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 24. -0x1a4 24. -0xe4 24. " PA[376]_set/clr ,Peripheral 376 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x24 23. -0x1a4 23. -0xe4 23. " PA[375]_set/clr ,Peripheral 375 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 22. -0x1a4 22. -0xe4 22. " PA[374]_set/clr ,Peripheral 374 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 21. -0x1a4 21. -0xe4 21. " PA[373]_set/clr ,Peripheral 373 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 20. -0x1a4 20. -0xe4 20. " PA[372]_set/clr ,Peripheral 372 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x24 19. -0x1a4 19. -0xe4 19. " PA[371]_set/clr ,Peripheral 371 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 18. -0x1a4 18. -0xe4 18. " PA[370]_set/clr ,Peripheral 370 Access Attribute" "No access,Access"
|
|
endif
|
|
setclrfld.long 0x24 17. -0x1a4 17. -0xe4 17. " PA[369]_set/clr ,Peripheral 369 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 16. -0x1a4 16. -0xe4 16. " PA[368]_set/clr ,Peripheral 368 Access Attribute" "No access,Access"
|
|
textline " "
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x24 15. -0x1a4 15. -0xe4 15. " PA[367]_set/clr ,Peripheral 367 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 14. -0x1a4 14. -0xe4 14. " PA[366]_set/clr ,Peripheral 366 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 13. -0x1a4 13. -0xe4 13. " PA[365]_set/clr ,Peripheral 365 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 12. -0x1a4 12. -0xe4 12. " PA[364]_set/clr ,Peripheral 364 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x24 11. -0x1a4 11. -0xe4 11. " PA[363]_set/clr ,Peripheral 363 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 10. -0x1a4 10. -0xe4 10. " PA[362]_set/clr ,Peripheral 362 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 9. -0x1a4 9. -0xe4 9. " PA[361]_set/clr ,Peripheral 361 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 8. -0x1a4 8. -0xe4 8. " PA[360]_set/clr ,Peripheral 360 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x24 7. -0x1a4 7. -0xe4 7. " PA[359]_set/clr ,Peripheral 359 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 6. -0x1a4 6. -0xe4 6. " PA[358]_set/clr ,Peripheral 358 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 5. -0x1a4 5. -0xe4 5. " PA[357]_set/clr ,Peripheral 357 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 4. -0x1a4 4. -0xe4 4. " PA[356]_set/clr ,Peripheral 356 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x24 3. -0x1a4 3. -0xe4 3. " PA[355]_set/clr ,Peripheral 355 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 2. -0x1a4 2. -0xe4 2. " PA[354]_set/clr ,Peripheral 354 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 1. -0x1a4 1. -0xe4 1. " PA[353]_set/clr ,Peripheral 353 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x24 0. -0x1a4 0. -0xe4 0. " PA[352]_set/clr ,Peripheral 352 Access Attribute" "No access,Access"
|
|
line.long 0x28 "PPU0_PA12_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 12 (Peripheral 384 to 415)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x28 31. -0x1a8 31. -0xe8 31. " PA[415]_set/clr ,Peripheral 415 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 30. -0x1a8 30. -0xe8 30. " PA[414]_set/clr ,Peripheral 414 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 29. -0x1a8 29. -0xe8 29. " PA[413]_set/clr ,Peripheral 413 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 28. -0x1a8 28. -0xe8 28. " PA[412]_set/clr ,Peripheral 412 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x28 27. -0x1a8 27. -0xe8 27. " PA[411]_set/clr ,Peripheral 411 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 26. -0x1a8 26. -0xe8 26. " PA[410]_set/clr ,Peripheral 410 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 25. -0x1a8 25. -0xe8 25. " PA[409]_set/clr ,Peripheral 409 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 24. -0x1a8 24. -0xe8 24. " PA[408]_set/clr ,Peripheral 408 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x28 23. -0x1a8 23. -0xe8 23. " PA[407]_set/clr ,Peripheral 407 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 22. -0x1a8 22. -0xe8 22. " PA[406]_set/clr ,Peripheral 406 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 21. -0x1a8 21. -0xe8 21. " PA[405]_set/clr ,Peripheral 405 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 20. -0x1a8 20. -0xe8 20. " PA[404]_set/clr ,Peripheral 404 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x28 19. -0x1a8 19. -0xe8 19. " PA[403]_set/clr ,Peripheral 403 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 18. -0x1a8 18. -0xe8 18. " PA[402]_set/clr ,Peripheral 402 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 17. -0x1a8 17. -0xe8 17. " PA[401]_set/clr ,Peripheral 401 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 16. -0x1a8 16. -0xe8 16. " PA[400]_set/clr ,Peripheral 400 Access Attribute" "No access,Access"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x28 15. -0x1a8 15. -0xe8 15. " PA[399]_set/clr ,Peripheral 399 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 14. -0x1a8 14. -0xe8 14. " PA[398]_set/clr ,Peripheral 398 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 13. -0x1a8 13. -0xe8 13. " PA[397]_set/clr ,Peripheral 397 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 12. -0x1a8 12. -0xe8 12. " PA[396]_set/clr ,Peripheral 396 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x28 11. -0x1a8 11. -0xe8 11. " PA[395]_set/clr ,Peripheral 395 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 10. -0x1a8 10. -0xe8 10. " PA[394]_set/clr ,Peripheral 394 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 9. -0x1a8 9. -0xe8 9. " PA[393]_set/clr ,Peripheral 393 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 8. -0x1a8 8. -0xe8 8. " PA[392]_set/clr ,Peripheral 392 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x28 7. -0x1a8 7. -0xe8 7. " PA[391]_set/clr ,Peripheral 391 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 6. -0x1a8 6. -0xe8 6. " PA[390]_set/clr ,Peripheral 390 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 5. -0x1a8 5. -0xe8 5. " PA[389]_set/clr ,Peripheral 389 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 4. -0x1a8 4. -0xe8 4. " PA[388]_set/clr ,Peripheral 388 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x28 3. -0x1a8 3. -0xe8 3. " PA[387]_set/clr ,Peripheral 387 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 2. -0x1a8 2. -0xe8 2. " PA[386]_set/clr ,Peripheral 386 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 1. -0x1a8 1. -0xe8 1. " PA[385]_set/clr ,Peripheral 385 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x28 0. -0x1a8 0. -0xe8 0. " PA[384]_set/clr ,Peripheral 384 Access Attribute" "No access,Access"
|
|
line.long 0x2c "PPU0_PA13_SET/CLR,PPU Peripheral Access Attribute Set/Clear Register 13 (Peripheral 416 to 447)"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.long 0x2c 31. -0x1ac 31. -0xec 31. " PA[447]_set/clr ,Peripheral 447 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 30. -0x1ac 30. -0xec 30. " PA[446]_set/clr ,Peripheral 446 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 29. -0x1ac 29. -0xec 29. " PA[445]_set/clr ,Peripheral 445 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 28. -0x1ac 28. -0xec 28. " PA[444]_set/clr ,Peripheral 444 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x2c 27. -0x1ac 27. -0xec 27. " PA[443]_set/clr ,Peripheral 443 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 26. -0x1ac 26. -0xec 26. " PA[442]_set/clr ,Peripheral 442 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 25. -0x1ac 25. -0xec 25. " PA[441]_set/clr ,Peripheral 441 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 24. -0x1ac 24. -0xec 24. " PA[440]_set/clr ,Peripheral 440 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x2c 23. -0x1ac 23. -0xec 23. " PA[439]_set/clr ,Peripheral 439 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 22. -0x1ac 22. -0xec 22. " PA[438]_set/clr ,Peripheral 438 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 21. -0x1ac 21. -0xec 21. " PA[437]_set/clr ,Peripheral 437 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 20. -0x1ac 20. -0xec 20. " PA[436]_set/clr ,Peripheral 436 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x2c 19. -0x1ac 19. -0xec 19. " PA[435]_set/clr ,Peripheral 435 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 18. -0x1ac 18. -0xec 18. " PA[434]_set/clr ,Peripheral 434 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 17. -0x1ac 17. -0xec 17. " PA[433]_set/clr ,Peripheral 433 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 16. -0x1ac 16. -0xec 16. " PA[432]_set/clr ,Peripheral 432 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x2c 15. -0x1ac 15. -0xec 15. " PA[431]_set/clr ,Peripheral 431 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 14. -0x1ac 14. -0xec 14. " PA[430]_set/clr ,Peripheral 430 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 13. -0x1ac 13. -0xec 13. " PA[429]_set/clr ,Peripheral 429 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 12. -0x1ac 12. -0xec 12. " PA[428]_set/clr ,Peripheral 428 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x2c 11. -0x1ac 11. -0xec 11. " PA[427]_set/clr ,Peripheral 427 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 10. -0x1ac 10. -0xec 10. " PA[426]_set/clr ,Peripheral 426 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 9. -0x1ac 9. -0xec 9. " PA[425]_set/clr ,Peripheral 425 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 8. -0x1ac 8. -0xec 8. " PA[424]_set/clr ,Peripheral 424 Access Attribute" "No access,Access"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x2c 7. -0x1ac 7. -0xec 7. " PA[423]_set/clr ,Peripheral 423 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 6. -0x1ac 6. -0xec 6. " PA[422]_set/clr ,Peripheral 422 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 5. -0x1ac 5. -0xec 5. " PA[421]_set/clr ,Peripheral 421 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 4. -0x1ac 4. -0xec 4. " PA[420]_set/clr ,Peripheral 420 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x2c 3. -0x1ac 3. -0xec 3. " PA[419]_set/clr ,Peripheral 419 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 2. -0x1ac 2. -0xec 2. " PA[418]_set/clr ,Peripheral 418 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 1. -0x1ac 1. -0xec 1. " PA[417]_set/clr ,Peripheral 417 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x2c 0. -0x1ac 0. -0xec 0. " PA[416]_set/clr ,Peripheral 416 Access Attribute" "No access,Access"
|
|
endif
|
|
tree.end
|
|
tree "GPIO Access Attribute Registers"
|
|
if (((d.l(ad:0xb0a00248))&0x1)==0x0)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "PPU0_GA0_SET/CLR,PPU GPIO Access Attribute Set/Clear Register 0 (GPIO Channel 0 to 31)"
|
|
setclrfld.long 0x00 31. -0x180 31. -0xc0 31. " GA[31]_set/clr ,GPIO Channel 31 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 30. -0x180 30. -0xc0 30. " GA[30]_set/clr ,GPIO Channel 30 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 29. -0x180 29. -0xc0 29. " GA[29]_set/clr ,GPIO Channel 29 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 28. -0x180 28. -0xc0 28. " GA[28]_set/clr ,GPIO Channel 28 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x180 27. -0xc0 27. " GA[27]_set/clr ,GPIO Channel 27 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 26. -0x180 26. -0xc0 26. " GA[26]_set/clr ,GPIO Channel 26 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 25. -0x180 25. -0xc0 25. " GA[25]_set/clr ,GPIO Channel 25 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 24. -0x180 24. -0xc0 24. " GA[24]_set/clr ,GPIO Channel 24 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x180 23. -0xc0 23. " GA[23]_set/clr ,GPIO Channel 23 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 22. -0x180 22. -0xc0 22. " GA[22]_set/clr ,GPIO Channel 22 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 21. -0x180 21. -0xc0 21. " GA[21]_set/clr ,GPIO Channel 21 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 20. -0x180 20. -0xc0 20. " GA[20]_set/clr ,GPIO Channel 20 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x180 19. -0xc0 19. " GA[19]_set/clr ,GPIO Channel 19 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 18. -0x180 18. -0xc0 18. " GA[18]_set/clr ,GPIO Channel 18 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 17. -0x180 17. -0xc0 17. " GA[17]_set/clr ,GPIO Channel 17 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 16. -0x180 16. -0xc0 16. " GA[16]_set/clr ,GPIO Channel 16 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x180 15. -0xc0 15. " GA[15]_set/clr ,GPIO Channel 15 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 14. -0x180 14. -0xc0 14. " GA[14]_set/clr ,GPIO Channel 14 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 13. -0x180 13. -0xc0 13. " GA[13]_set/clr ,GPIO Channel 13 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 12. -0x180 12. -0xc0 12. " GA[12]_set/clr ,GPIO Channel 12 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x180 11. -0xc0 11. " GA[11]_set/clr ,GPIO Channel 11 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 10. -0x180 10. -0xc0 10. " GA[10]_set/clr ,GPIO Channel 10 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 9. -0x180 9. -0xc0 9. " GA[9]_set/clr ,GPIO Channel 9 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 8. -0x180 8. -0xc0 8. " GA[8]_set/clr ,GPIO Channel 8 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x180 7. -0xc0 7. " GA[7]_set/clr ,GPIO Channel 7 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 6. -0x180 6. -0xc0 6. " GA[6]_set/clr ,GPIO Channel 6 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 5. -0x180 5. -0xc0 5. " GA[5]_set/clr ,GPIO Channel 5 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 4. -0x180 4. -0xc0 4. " GA[4]_set/clr ,GPIO Channel 4 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x180 3. -0xc0 3. " GA[3]_set/clr ,GPIO Channel 3 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 2. -0x180 2. -0xc0 2. " GA[2]_set/clr ,GPIO Channel 2 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 1. -0x180 1. -0xc0 1. " GA[1]_set/clr ,GPIO Channel 1 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 0. -0x180 0. -0xc0 0. " GA[0]_set/clr ,GPIO Channel 0 Access Attribute" "No access,Access"
|
|
line.long 0x04 "PPU0_GA1_SET/CLR,PPU GPIO Access Attribute Set/Clear Register 1 (GPIO Channel 32 to 63)"
|
|
setclrfld.long 0x04 31. -0x184 31. -0xc4 31. " GA[63]_set/clr ,GPIO Channel 63 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 30. -0x184 30. -0xc4 30. " GA[62]_set/clr ,GPIO Channel 62 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 29. -0x184 29. -0xc4 29. " GA[61]_set/clr ,GPIO Channel 61 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 28. -0x184 28. -0xc4 28. " GA[60]_set/clr ,GPIO Channel 60 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 27. -0x184 27. -0xc4 27. " GA[59]_set/clr ,GPIO Channel 59 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 26. -0x184 26. -0xc4 26. " GA[58]_set/clr ,GPIO Channel 58 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 25. -0x184 25. -0xc4 25. " GA[57]_set/clr ,GPIO Channel 57 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 24. -0x184 24. -0xc4 24. " GA[56]_set/clr ,GPIO Channel 56 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 23. -0x184 23. -0xc4 23. " GA[55]_set/clr ,GPIO Channel 55 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 22. -0x184 22. -0xc4 22. " GA[54]_set/clr ,GPIO Channel 54 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 21. -0x184 21. -0xc4 21. " GA[53]_set/clr ,GPIO Channel 53 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 20. -0x184 20. -0xc4 20. " GA[52]_set/clr ,GPIO Channel 52 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 19. -0x184 19. -0xc4 19. " GA[51]_set/clr ,GPIO Channel 51 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 18. -0x184 18. -0xc4 18. " GA[50]_set/clr ,GPIO Channel 50 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 17. -0x184 17. -0xc4 17. " GA[49]_set/clr ,GPIO Channel 49 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 16. -0x184 16. -0xc4 16. " GA[48]_set/clr ,GPIO Channel 48 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 15. -0x184 15. -0xc4 15. " GA[47]_set/clr ,GPIO Channel 47 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 14. -0x184 14. -0xc4 14. " GA[46]_set/clr ,GPIO Channel 46 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 13. -0x184 13. -0xc4 13. " GA[45]_set/clr ,GPIO Channel 45 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 12. -0x184 12. -0xc4 12. " GA[44]_set/clr ,GPIO Channel 44 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 11. -0x184 11. -0xc4 11. " GA[43]_set/clr ,GPIO Channel 43 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 10. -0x184 10. -0xc4 10. " GA[42]_set/clr ,GPIO Channel 42 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 9. -0x184 9. -0xc4 9. " GA[41]_set/clr ,GPIO Channel 41 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 8. -0x184 8. -0xc4 8. " GA[40]_set/clr ,GPIO Channel 40 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 7. -0x184 7. -0xc4 7. " GA[39]_set/clr ,GPIO Channel 39 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 6. -0x184 6. -0xc4 6. " GA[38]_set/clr ,GPIO Channel 38 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 5. -0x184 5. -0xc4 5. " GA[37]_set/clr ,GPIO Channel 37 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 4. -0x184 4. -0xc4 4. " GA[36]_set/clr ,GPIO Channel 36 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 3. -0x184 3. -0xc4 3. " GA[35]_set/clr ,GPIO Channel 35 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 2. -0x184 2. -0xc4 2. " GA[34]_set/clr ,GPIO Channel 34 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 1. -0x184 1. -0xc4 1. " GA[33]_set/clr ,GPIO Channel 33 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 0. -0x184 0. -0xc4 0. " GA[32]_set/clr ,GPIO Channel 32 Access Attribute" "No access,Access"
|
|
line.long 0x08 "PPU0_GA2_SET/CLR,PPU GPIO Access Attribute Set/Clear Register 2 (GPIO Channel 64 to 95)"
|
|
setclrfld.long 0x08 31. -0x188 31. -0xc8 31. " GA[95]_set/clr ,GPIO Channel 95 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 30. -0x188 30. -0xc8 30. " GA[94]_set/clr ,GPIO Channel 94 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 29. -0x188 29. -0xc8 29. " GA[93]_set/clr ,GPIO Channel 93 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 28. -0x188 28. -0xc8 28. " GA[92]_set/clr ,GPIO Channel 92 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 27. -0x188 27. -0xc8 27. " GA[91]_set/clr ,GPIO Channel 91 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 26. -0x188 26. -0xc8 26. " GA[90]_set/clr ,GPIO Channel 90 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 25. -0x188 25. -0xc8 25. " GA[89]_set/clr ,GPIO Channel 89 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 24. -0x188 24. -0xc8 24. " GA[88]_set/clr ,GPIO Channel 88 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 23. -0x188 23. -0xc8 23. " GA[87]_set/clr ,GPIO Channel 87 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 22. -0x188 22. -0xc8 22. " GA[86]_set/clr ,GPIO Channel 86 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 21. -0x188 21. -0xc8 21. " GA[85]_set/clr ,GPIO Channel 85 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 20. -0x188 20. -0xc8 20. " GA[84]_set/clr ,GPIO Channel 84 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 19. -0x188 19. -0xc8 19. " GA[83]_set/clr ,GPIO Channel 83 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 18. -0x188 18. -0xc8 18. " GA[82]_set/clr ,GPIO Channel 82 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 17. -0x188 17. -0xc8 17. " GA[81]_set/clr ,GPIO Channel 81 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 16. -0x188 16. -0xc8 16. " GA[80]_set/clr ,GPIO Channel 80 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 15. -0x188 15. -0xc8 15. " GA[79]_set/clr ,GPIO Channel 79 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 14. -0x188 14. -0xc8 14. " GA[78]_set/clr ,GPIO Channel 78 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 13. -0x188 13. -0xc8 13. " GA[77]_set/clr ,GPIO Channel 77 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 12. -0x188 12. -0xc8 12. " GA[76]_set/clr ,GPIO Channel 76 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 11. -0x188 11. -0xc8 11. " GA[75]_set/clr ,GPIO Channel 75 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 10. -0x188 10. -0xc8 10. " GA[74]_set/clr ,GPIO Channel 74 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 9. -0x188 9. -0xc8 9. " GA[73]_set/clr ,GPIO Channel 73 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 8. -0x188 8. -0xc8 8. " GA[72]_set/clr ,GPIO Channel 72 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 7. -0x188 7. -0xc8 7. " GA[71]_set/clr ,GPIO Channel 71 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 6. -0x188 6. -0xc8 6. " GA[70]_set/clr ,GPIO Channel 70 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 5. -0x188 5. -0xc8 5. " GA[69]_set/clr ,GPIO Channel 69 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 4. -0x188 4. -0xc8 4. " GA[68]_set/clr ,GPIO Channel 68 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 3. -0x188 3. -0xc8 3. " GA[67]_set/clr ,GPIO Channel 67 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 2. -0x188 2. -0xc8 2. " GA[66]_set/clr ,GPIO Channel 66 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 1. -0x188 1. -0xc8 1. " GA[65]_set/clr ,GPIO Channel 65 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 0. -0x188 0. -0xc8 0. " GA[64]_set/clr ,GPIO Channel 64 Access Attribute" "No access,Access"
|
|
line.long 0x0c "PPU0_GA3_SET/CLR,PPU GPIO Access Attribute Set/Clear Register 3 (GPIO Channel 96 to 127)"
|
|
setclrfld.long 0x0c 31. -0x18c 31. -0xcc 31. " GA[127]_set/clr ,GPIO Channel 127 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 30. -0x18c 30. -0xcc 30. " GA[126]_set/clr ,GPIO Channel 126 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 29. -0x18c 29. -0xcc 29. " GA[125]_set/clr ,GPIO Channel 125 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 28. -0x18c 28. -0xcc 28. " GA[124]_set/clr ,GPIO Channel 124 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 27. -0x18c 27. -0xcc 27. " GA[123]_set/clr ,GPIO Channel 123 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 26. -0x18c 26. -0xcc 26. " GA[122]_set/clr ,GPIO Channel 122 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 25. -0x18c 25. -0xcc 25. " GA[121]_set/clr ,GPIO Channel 121 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 24. -0x18c 24. -0xcc 24. " GA[120]_set/clr ,GPIO Channel 120 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 23. -0x18c 23. -0xcc 23. " GA[119]_set/clr ,GPIO Channel 119 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 22. -0x18c 22. -0xcc 22. " GA[118]_set/clr ,GPIO Channel 118 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 21. -0x18c 21. -0xcc 21. " GA[117]_set/clr ,GPIO Channel 117 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 20. -0x18c 20. -0xcc 20. " GA[116]_set/clr ,GPIO Channel 116 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. -0x18c 19. -0xcc 19. " GA[115]_set/clr ,GPIO Channel 115 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 18. -0x18c 18. -0xcc 18. " GA[114]_set/clr ,GPIO Channel 114 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 17. -0x18c 17. -0xcc 17. " GA[113]_set/clr ,GPIO Channel 113 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 16. -0x18c 16. -0xcc 16. " GA[112]_set/clr ,GPIO Channel 112 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 15. -0x18c 15. -0xcc 15. " GA[111]_set/clr ,GPIO Channel 111 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 14. -0x18c 14. -0xcc 14. " GA[110]_set/clr ,GPIO Channel 110 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 13. -0x18c 13. -0xcc 13. " GA[109]_set/clr ,GPIO Channel 109 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 12. -0x18c 12. -0xcc 12. " GA[108]_set/clr ,GPIO Channel 108 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 11. -0x18c 11. -0xcc 11. " GA[107]_set/clr ,GPIO Channel 107 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 10. -0x18c 10. -0xcc 10. " GA[106]_set/clr ,GPIO Channel 106 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 9. -0x18c 9. -0xcc 9. " GA[105]_set/clr ,GPIO Channel 105 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 8. -0x18c 8. -0xcc 8. " GA[104]_set/clr ,GPIO Channel 104 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. -0x18c 7. -0xcc 7. " GA[103]_set/clr ,GPIO Channel 103 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 6. -0x18c 6. -0xcc 6. " GA[102]_set/clr ,GPIO Channel 102 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 5. -0x18c 5. -0xcc 5. " GA[101]_set/clr ,GPIO Channel 101 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 4. -0x18c 4. -0xcc 4. " GA[100]_set/clr ,GPIO Channel 100 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 3. -0x18c 3. -0xcc 3. " GA[99]_set/clr ,GPIO Channel 99 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 2. -0x18c 2. -0xcc 2. " GA[98]_set/clr ,GPIO Channel 98 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 1. -0x18c 1. -0xcc 1. " GA[97]_set/clr ,GPIO Channel 97 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 0. -0x18c 0. -0xcc 0. " GA[96]_set/clr ,GPIO Channel 96 Access Attribute" "No access,Access"
|
|
line.long 0x10 "PPU0_GA4_SET/CLR,PPU GPIO Access Attribute Set/Clear Register 4 (GPIO Channel 128 to 159)"
|
|
setclrfld.long 0x10 31. -0x190 31. -0xd0 31. " GA[128]_set/clr ,GPIO Channel 128 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 30. -0x190 30. -0xd0 30. " GA[129]_set/clr ,GPIO Channel 129 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 29. -0x190 29. -0xd0 29. " GA[130]_set/clr ,GPIO Channel 130 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 28. -0x190 28. -0xd0 28. " GA[131]_set/clr ,GPIO Channel 131 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 27. -0x190 27. -0xd0 27. " GA[132]_set/clr ,GPIO Channel 132 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 26. -0x190 26. -0xd0 26. " GA[133]_set/clr ,GPIO Channel 133 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 25. -0x190 25. -0xd0 25. " GA[134]_set/clr ,GPIO Channel 134 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 24. -0x190 24. -0xd0 24. " GA[135]_set/clr ,GPIO Channel 135 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 23. -0x190 23. -0xd0 23. " GA[136]_set/clr ,GPIO Channel 136 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 22. -0x190 22. -0xd0 22. " GA[137]_set/clr ,GPIO Channel 137 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 21. -0x190 21. -0xd0 21. " GA[138]_set/clr ,GPIO Channel 138 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 20. -0x190 20. -0xd0 20. " GA[139]_set/clr ,GPIO Channel 139 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 19. -0x190 19. -0xd0 19. " GA[140]_set/clr ,GPIO Channel 140 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 18. -0x190 18. -0xd0 18. " GA[141]_set/clr ,GPIO Channel 141 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 17. -0x190 17. -0xd0 17. " GA[142]_set/clr ,GPIO Channel 142 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 16. -0x190 16. -0xd0 16. " GA[143]_set/clr ,GPIO Channel 143 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 15. -0x190 15. -0xd0 15. " GA[144]_set/clr ,GPIO Channel 144 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 14. -0x190 14. -0xd0 14. " GA[145]_set/clr ,GPIO Channel 145 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 13. -0x190 13. -0xd0 13. " GA[146]_set/clr ,GPIO Channel 146 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 12. -0x190 12. -0xd0 12. " GA[147]_set/clr ,GPIO Channel 147 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 11. -0x190 11. -0xd0 11. " GA[148]_set/clr ,GPIO Channel 148 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 10. -0x190 10. -0xd0 10. " GA[149]_set/clr ,GPIO Channel 149 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 9. -0x190 9. -0xd0 9. " GA[150]_set/clr ,GPIO Channel 150 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 8. -0x190 8. -0xd0 8. " GA[151]_set/clr ,GPIO Channel 151 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 7. -0x190 7. -0xd0 7. " GA[152]_set/clr ,GPIO Channel 152 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 6. -0x190 6. -0xd0 6. " GA[153]_set/clr ,GPIO Channel 153 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 5. -0x190 5. -0xd0 5. " GA[154]_set/clr ,GPIO Channel 154 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 4. -0x190 4. -0xd0 4. " GA[155]_set/clr ,GPIO Channel 155 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 3. -0x190 3. -0xd0 3. " GA[156]_set/clr ,GPIO Channel 156 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 2. -0x190 2. -0xd0 2. " GA[157]_set/clr ,GPIO Channel 157 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 1. -0x190 1. -0xd0 1. " GA[158]_set/clr ,GPIO Channel 158 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 0. -0x190 0. -0xd0 0. " GA[159]_set/clr ,GPIO Channel 159 Access Attribute" "No access,Access"
|
|
line.long 0x14 "PPU0_GA5_SET/CLR,PPU GPIO Access Attribute Set/Clear Register 5 (GPIO Channel 160 to 191)"
|
|
setclrfld.long 0x14 31. -0x194 31. -0xd4 31. " GA[191]_set/clr ,GPIO Channel 191 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 30. -0x194 30. -0xd4 30. " GA[190]_set/clr ,GPIO Channel 190 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 29. -0x194 29. -0xd4 29. " GA[189]_set/clr ,GPIO Channel 189 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 28. -0x194 28. -0xd4 28. " GA[188]_set/clr ,GPIO Channel 188 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 27. -0x194 27. -0xd4 27. " GA[187]_set/clr ,GPIO Channel 187 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 26. -0x194 26. -0xd4 26. " GA[186]_set/clr ,GPIO Channel 186 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 25. -0x194 25. -0xd4 25. " GA[185]_set/clr ,GPIO Channel 185 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 24. -0x194 24. -0xd4 24. " GA[184]_set/clr ,GPIO Channel 184 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 23. -0x194 23. -0xd4 23. " GA[183]_set/clr ,GPIO Channel 183 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 22. -0x194 22. -0xd4 22. " GA[182]_set/clr ,GPIO Channel 182 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 21. -0x194 21. -0xd4 21. " GA[181]_set/clr ,GPIO Channel 181 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 20. -0x194 20. -0xd4 20. " GA[180]_set/clr ,GPIO Channel 180 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 19. -0x194 19. -0xd4 19. " GA[179]_set/clr ,GPIO Channel 179 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 18. -0x194 18. -0xd4 18. " GA[178]_set/clr ,GPIO Channel 178 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 17. -0x194 17. -0xd4 17. " GA[177]_set/clr ,GPIO Channel 177 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 16. -0x194 16. -0xd4 16. " GA[176]_set/clr ,GPIO Channel 176 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 15. -0x194 15. -0xd4 15. " GA[175]_set/clr ,GPIO Channel 175 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 14. -0x194 14. -0xd4 14. " GA[174]_set/clr ,GPIO Channel 174 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 13. -0x194 13. -0xd4 13. " GA[173]_set/clr ,GPIO Channel 173 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 12. -0x194 12. -0xd4 12. " GA[172]_set/clr ,GPIO Channel 172 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 11. -0x194 11. -0xd4 11. " GA[171]_set/clr ,GPIO Channel 171 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 10. -0x194 10. -0xd4 10. " GA[170]_set/clr ,GPIO Channel 170 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 9. -0x194 9. -0xd4 9. " GA[169]_set/clr ,GPIO Channel 169 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 8. -0x194 8. -0xd4 8. " GA[168]_set/clr ,GPIO Channel 168 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 7. -0x194 7. -0xd4 7. " GA[167]_set/clr ,GPIO Channel 167 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 6. -0x194 6. -0xd4 6. " GA[166]_set/clr ,GPIO Channel 166 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 5. -0x194 5. -0xd4 5. " GA[165]_set/clr ,GPIO Channel 165 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 4. -0x194 4. -0xd4 4. " GA[164]_set/clr ,GPIO Channel 164 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 3. -0x194 3. -0xd4 3. " GA[163]_set/clr ,GPIO Channel 163 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 2. -0x194 2. -0xd4 2. " GA[162]_set/clr ,GPIO Channel 162 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 1. -0x194 1. -0xd4 1. " GA[161]_set/clr ,GPIO Channel 161 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 0. -0x194 0. -0xd4 0. " GA[160]_set/clr ,GPIO Channel 160 Access Attribute" "No access,Access"
|
|
else
|
|
rgroup.long 0x200++0x17
|
|
line.long 0x00 "PPU0_GA0_SET/CLR,PPU GPIO Access Attribute Set/Clear Register 0 (GPIO Channel 0 to 31)"
|
|
setclrfld.long 0x00 31. -0x180 31. -0xc0 31. " GA[31]_set/clr ,GPIO Channel 31 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 30. -0x180 30. -0xc0 30. " GA[30]_set/clr ,GPIO Channel 30 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 29. -0x180 29. -0xc0 29. " GA[29]_set/clr ,GPIO Channel 29 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 28. -0x180 28. -0xc0 28. " GA[28]_set/clr ,GPIO Channel 28 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x180 27. -0xc0 27. " GA[27]_set/clr ,GPIO Channel 27 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 26. -0x180 26. -0xc0 26. " GA[26]_set/clr ,GPIO Channel 26 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 25. -0x180 25. -0xc0 25. " GA[25]_set/clr ,GPIO Channel 25 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 24. -0x180 24. -0xc0 24. " GA[24]_set/clr ,GPIO Channel 24 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x180 23. -0xc0 23. " GA[23]_set/clr ,GPIO Channel 23 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 22. -0x180 22. -0xc0 22. " GA[22]_set/clr ,GPIO Channel 22 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 21. -0x180 21. -0xc0 21. " GA[21]_set/clr ,GPIO Channel 21 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 20. -0x180 20. -0xc0 20. " GA[20]_set/clr ,GPIO Channel 20 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x180 19. -0xc0 19. " GA[19]_set/clr ,GPIO Channel 19 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 18. -0x180 18. -0xc0 18. " GA[18]_set/clr ,GPIO Channel 18 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 17. -0x180 17. -0xc0 17. " GA[17]_set/clr ,GPIO Channel 17 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 16. -0x180 16. -0xc0 16. " GA[16]_set/clr ,GPIO Channel 16 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x180 15. -0xc0 15. " GA[15]_set/clr ,GPIO Channel 15 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 14. -0x180 14. -0xc0 14. " GA[14]_set/clr ,GPIO Channel 14 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 13. -0x180 13. -0xc0 13. " GA[13]_set/clr ,GPIO Channel 13 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 12. -0x180 12. -0xc0 12. " GA[12]_set/clr ,GPIO Channel 12 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x180 11. -0xc0 11. " GA[11]_set/clr ,GPIO Channel 11 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 10. -0x180 10. -0xc0 10. " GA[10]_set/clr ,GPIO Channel 10 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 9. -0x180 9. -0xc0 9. " GA[9]_set/clr ,GPIO Channel 9 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 8. -0x180 8. -0xc0 8. " GA[8]_set/clr ,GPIO Channel 8 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x180 7. -0xc0 7. " GA[7]_set/clr ,GPIO Channel 7 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 6. -0x180 6. -0xc0 6. " GA[6]_set/clr ,GPIO Channel 6 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 5. -0x180 5. -0xc0 5. " GA[5]_set/clr ,GPIO Channel 5 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 4. -0x180 4. -0xc0 4. " GA[4]_set/clr ,GPIO Channel 4 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x180 3. -0xc0 3. " GA[3]_set/clr ,GPIO Channel 3 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 2. -0x180 2. -0xc0 2. " GA[2]_set/clr ,GPIO Channel 2 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 1. -0x180 1. -0xc0 1. " GA[1]_set/clr ,GPIO Channel 1 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x00 0. -0x180 0. -0xc0 0. " GA[0]_set/clr ,GPIO Channel 0 Access Attribute" "No access,Access"
|
|
line.long 0x04 "PPU0_GA1_SET/CLR,PPU GPIO Access Attribute Set/Clear Register 1 (GPIO Channel 32 to 63)"
|
|
setclrfld.long 0x04 31. -0x184 31. -0xc4 31. " GA[63]_set/clr ,GPIO Channel 63 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 30. -0x184 30. -0xc4 30. " GA[62]_set/clr ,GPIO Channel 62 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 29. -0x184 29. -0xc4 29. " GA[61]_set/clr ,GPIO Channel 61 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 28. -0x184 28. -0xc4 28. " GA[60]_set/clr ,GPIO Channel 60 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 27. -0x184 27. -0xc4 27. " GA[59]_set/clr ,GPIO Channel 59 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 26. -0x184 26. -0xc4 26. " GA[58]_set/clr ,GPIO Channel 58 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 25. -0x184 25. -0xc4 25. " GA[57]_set/clr ,GPIO Channel 57 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 24. -0x184 24. -0xc4 24. " GA[56]_set/clr ,GPIO Channel 56 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 23. -0x184 23. -0xc4 23. " GA[55]_set/clr ,GPIO Channel 55 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 22. -0x184 22. -0xc4 22. " GA[54]_set/clr ,GPIO Channel 54 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 21. -0x184 21. -0xc4 21. " GA[53]_set/clr ,GPIO Channel 53 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 20. -0x184 20. -0xc4 20. " GA[52]_set/clr ,GPIO Channel 52 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 19. -0x184 19. -0xc4 19. " GA[51]_set/clr ,GPIO Channel 51 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 18. -0x184 18. -0xc4 18. " GA[50]_set/clr ,GPIO Channel 50 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 17. -0x184 17. -0xc4 17. " GA[49]_set/clr ,GPIO Channel 49 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 16. -0x184 16. -0xc4 16. " GA[48]_set/clr ,GPIO Channel 48 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 15. -0x184 15. -0xc4 15. " GA[47]_set/clr ,GPIO Channel 47 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 14. -0x184 14. -0xc4 14. " GA[46]_set/clr ,GPIO Channel 46 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 13. -0x184 13. -0xc4 13. " GA[45]_set/clr ,GPIO Channel 45 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 12. -0x184 12. -0xc4 12. " GA[44]_set/clr ,GPIO Channel 44 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 11. -0x184 11. -0xc4 11. " GA[43]_set/clr ,GPIO Channel 43 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 10. -0x184 10. -0xc4 10. " GA[42]_set/clr ,GPIO Channel 42 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 9. -0x184 9. -0xc4 9. " GA[41]_set/clr ,GPIO Channel 41 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 8. -0x184 8. -0xc4 8. " GA[40]_set/clr ,GPIO Channel 40 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 7. -0x184 7. -0xc4 7. " GA[39]_set/clr ,GPIO Channel 39 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 6. -0x184 6. -0xc4 6. " GA[38]_set/clr ,GPIO Channel 38 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 5. -0x184 5. -0xc4 5. " GA[37]_set/clr ,GPIO Channel 37 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 4. -0x184 4. -0xc4 4. " GA[36]_set/clr ,GPIO Channel 36 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x04 3. -0x184 3. -0xc4 3. " GA[35]_set/clr ,GPIO Channel 35 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 2. -0x184 2. -0xc4 2. " GA[34]_set/clr ,GPIO Channel 34 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 1. -0x184 1. -0xc4 1. " GA[33]_set/clr ,GPIO Channel 33 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x04 0. -0x184 0. -0xc4 0. " GA[32]_set/clr ,GPIO Channel 32 Access Attribute" "No access,Access"
|
|
line.long 0x08 "PPU0_GA2_SET/CLR,PPU GPIO Access Attribute Set/Clear Register 2 (GPIO Channel 64 to 95)"
|
|
setclrfld.long 0x08 31. -0x188 31. -0xc8 31. " GA[95]_set/clr ,GPIO Channel 95 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 30. -0x188 30. -0xc8 30. " GA[94]_set/clr ,GPIO Channel 94 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 29. -0x188 29. -0xc8 29. " GA[93]_set/clr ,GPIO Channel 93 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 28. -0x188 28. -0xc8 28. " GA[92]_set/clr ,GPIO Channel 92 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 27. -0x188 27. -0xc8 27. " GA[91]_set/clr ,GPIO Channel 91 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 26. -0x188 26. -0xc8 26. " GA[90]_set/clr ,GPIO Channel 90 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 25. -0x188 25. -0xc8 25. " GA[89]_set/clr ,GPIO Channel 89 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 24. -0x188 24. -0xc8 24. " GA[88]_set/clr ,GPIO Channel 88 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 23. -0x188 23. -0xc8 23. " GA[87]_set/clr ,GPIO Channel 87 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 22. -0x188 22. -0xc8 22. " GA[86]_set/clr ,GPIO Channel 86 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 21. -0x188 21. -0xc8 21. " GA[85]_set/clr ,GPIO Channel 85 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 20. -0x188 20. -0xc8 20. " GA[84]_set/clr ,GPIO Channel 84 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 19. -0x188 19. -0xc8 19. " GA[83]_set/clr ,GPIO Channel 83 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 18. -0x188 18. -0xc8 18. " GA[82]_set/clr ,GPIO Channel 82 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 17. -0x188 17. -0xc8 17. " GA[81]_set/clr ,GPIO Channel 81 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 16. -0x188 16. -0xc8 16. " GA[80]_set/clr ,GPIO Channel 80 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 15. -0x188 15. -0xc8 15. " GA[79]_set/clr ,GPIO Channel 79 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 14. -0x188 14. -0xc8 14. " GA[78]_set/clr ,GPIO Channel 78 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 13. -0x188 13. -0xc8 13. " GA[77]_set/clr ,GPIO Channel 77 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 12. -0x188 12. -0xc8 12. " GA[76]_set/clr ,GPIO Channel 76 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 11. -0x188 11. -0xc8 11. " GA[75]_set/clr ,GPIO Channel 75 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 10. -0x188 10. -0xc8 10. " GA[74]_set/clr ,GPIO Channel 74 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 9. -0x188 9. -0xc8 9. " GA[73]_set/clr ,GPIO Channel 73 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 8. -0x188 8. -0xc8 8. " GA[72]_set/clr ,GPIO Channel 72 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 7. -0x188 7. -0xc8 7. " GA[71]_set/clr ,GPIO Channel 71 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 6. -0x188 6. -0xc8 6. " GA[70]_set/clr ,GPIO Channel 70 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 5. -0x188 5. -0xc8 5. " GA[69]_set/clr ,GPIO Channel 69 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 4. -0x188 4. -0xc8 4. " GA[68]_set/clr ,GPIO Channel 68 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x08 3. -0x188 3. -0xc8 3. " GA[67]_set/clr ,GPIO Channel 67 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 2. -0x188 2. -0xc8 2. " GA[66]_set/clr ,GPIO Channel 66 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 1. -0x188 1. -0xc8 1. " GA[65]_set/clr ,GPIO Channel 65 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x08 0. -0x188 0. -0xc8 0. " GA[64]_set/clr ,GPIO Channel 64 Access Attribute" "No access,Access"
|
|
line.long 0x0c "PPU0_GA3_SET/CLR,PPU GPIO Access Attribute Set/Clear Register 3 (GPIO Channel 96 to 127)"
|
|
setclrfld.long 0x0c 31. -0x18c 31. -0xcc 31. " GA[127]_set/clr ,GPIO Channel 127 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 30. -0x18c 30. -0xcc 30. " GA[126]_set/clr ,GPIO Channel 126 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 29. -0x18c 29. -0xcc 29. " GA[125]_set/clr ,GPIO Channel 125 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 28. -0x18c 28. -0xcc 28. " GA[124]_set/clr ,GPIO Channel 124 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 27. -0x18c 27. -0xcc 27. " GA[123]_set/clr ,GPIO Channel 123 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 26. -0x18c 26. -0xcc 26. " GA[122]_set/clr ,GPIO Channel 122 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 25. -0x18c 25. -0xcc 25. " GA[121]_set/clr ,GPIO Channel 121 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 24. -0x18c 24. -0xcc 24. " GA[120]_set/clr ,GPIO Channel 120 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 23. -0x18c 23. -0xcc 23. " GA[119]_set/clr ,GPIO Channel 119 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 22. -0x18c 22. -0xcc 22. " GA[118]_set/clr ,GPIO Channel 118 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 21. -0x18c 21. -0xcc 21. " GA[117]_set/clr ,GPIO Channel 117 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 20. -0x18c 20. -0xcc 20. " GA[116]_set/clr ,GPIO Channel 116 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. -0x18c 19. -0xcc 19. " GA[115]_set/clr ,GPIO Channel 115 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 18. -0x18c 18. -0xcc 18. " GA[114]_set/clr ,GPIO Channel 114 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 17. -0x18c 17. -0xcc 17. " GA[113]_set/clr ,GPIO Channel 113 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 16. -0x18c 16. -0xcc 16. " GA[112]_set/clr ,GPIO Channel 112 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 15. -0x18c 15. -0xcc 15. " GA[111]_set/clr ,GPIO Channel 111 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 14. -0x18c 14. -0xcc 14. " GA[110]_set/clr ,GPIO Channel 110 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 13. -0x18c 13. -0xcc 13. " GA[109]_set/clr ,GPIO Channel 109 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 12. -0x18c 12. -0xcc 12. " GA[108]_set/clr ,GPIO Channel 108 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 11. -0x18c 11. -0xcc 11. " GA[107]_set/clr ,GPIO Channel 107 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 10. -0x18c 10. -0xcc 10. " GA[106]_set/clr ,GPIO Channel 106 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 9. -0x18c 9. -0xcc 9. " GA[105]_set/clr ,GPIO Channel 105 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 8. -0x18c 8. -0xcc 8. " GA[104]_set/clr ,GPIO Channel 104 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. -0x18c 7. -0xcc 7. " GA[103]_set/clr ,GPIO Channel 103 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 6. -0x18c 6. -0xcc 6. " GA[102]_set/clr ,GPIO Channel 102 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 5. -0x18c 5. -0xcc 5. " GA[101]_set/clr ,GPIO Channel 101 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 4. -0x18c 4. -0xcc 4. " GA[100]_set/clr ,GPIO Channel 100 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x0c 3. -0x18c 3. -0xcc 3. " GA[99]_set/clr ,GPIO Channel 99 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 2. -0x18c 2. -0xcc 2. " GA[98]_set/clr ,GPIO Channel 98 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 1. -0x18c 1. -0xcc 1. " GA[97]_set/clr ,GPIO Channel 97 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x0c 0. -0x18c 0. -0xcc 0. " GA[96]_set/clr ,GPIO Channel 96 Access Attribute" "No access,Access"
|
|
line.long 0x10 "PPU0_GA4_SET/CLR,PPU GPIO Access Attribute Set/Clear Register 4 (GPIO Channel 128 to 159)"
|
|
setclrfld.long 0x10 31. -0x190 31. -0xd0 31. " GA[128]_set/clr ,GPIO Channel 128 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 30. -0x190 30. -0xd0 30. " GA[129]_set/clr ,GPIO Channel 129 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 29. -0x190 29. -0xd0 29. " GA[130]_set/clr ,GPIO Channel 130 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 28. -0x190 28. -0xd0 28. " GA[131]_set/clr ,GPIO Channel 131 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 27. -0x190 27. -0xd0 27. " GA[132]_set/clr ,GPIO Channel 132 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 26. -0x190 26. -0xd0 26. " GA[133]_set/clr ,GPIO Channel 133 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 25. -0x190 25. -0xd0 25. " GA[134]_set/clr ,GPIO Channel 134 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 24. -0x190 24. -0xd0 24. " GA[135]_set/clr ,GPIO Channel 135 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 23. -0x190 23. -0xd0 23. " GA[136]_set/clr ,GPIO Channel 136 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 22. -0x190 22. -0xd0 22. " GA[137]_set/clr ,GPIO Channel 137 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 21. -0x190 21. -0xd0 21. " GA[138]_set/clr ,GPIO Channel 138 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 20. -0x190 20. -0xd0 20. " GA[139]_set/clr ,GPIO Channel 139 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 19. -0x190 19. -0xd0 19. " GA[140]_set/clr ,GPIO Channel 140 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 18. -0x190 18. -0xd0 18. " GA[141]_set/clr ,GPIO Channel 141 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 17. -0x190 17. -0xd0 17. " GA[142]_set/clr ,GPIO Channel 142 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 16. -0x190 16. -0xd0 16. " GA[143]_set/clr ,GPIO Channel 143 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 15. -0x190 15. -0xd0 15. " GA[144]_set/clr ,GPIO Channel 144 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 14. -0x190 14. -0xd0 14. " GA[145]_set/clr ,GPIO Channel 145 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 13. -0x190 13. -0xd0 13. " GA[146]_set/clr ,GPIO Channel 146 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 12. -0x190 12. -0xd0 12. " GA[147]_set/clr ,GPIO Channel 147 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 11. -0x190 11. -0xd0 11. " GA[148]_set/clr ,GPIO Channel 148 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 10. -0x190 10. -0xd0 10. " GA[149]_set/clr ,GPIO Channel 149 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 9. -0x190 9. -0xd0 9. " GA[150]_set/clr ,GPIO Channel 150 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 8. -0x190 8. -0xd0 8. " GA[151]_set/clr ,GPIO Channel 151 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 7. -0x190 7. -0xd0 7. " GA[152]_set/clr ,GPIO Channel 152 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 6. -0x190 6. -0xd0 6. " GA[153]_set/clr ,GPIO Channel 153 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 5. -0x190 5. -0xd0 5. " GA[154]_set/clr ,GPIO Channel 154 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 4. -0x190 4. -0xd0 4. " GA[155]_set/clr ,GPIO Channel 155 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x10 3. -0x190 3. -0xd0 3. " GA[156]_set/clr ,GPIO Channel 156 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 2. -0x190 2. -0xd0 2. " GA[157]_set/clr ,GPIO Channel 157 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 1. -0x190 1. -0xd0 1. " GA[158]_set/clr ,GPIO Channel 158 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x10 0. -0x190 0. -0xd0 0. " GA[159]_set/clr ,GPIO Channel 159 Access Attribute" "No access,Access"
|
|
line.long 0x14 "PPU0_GA5_SET/CLR,PPU GPIO Access Attribute Set/Clear Register 5 (GPIO Channel 160 to 191)"
|
|
setclrfld.long 0x14 31. -0x194 31. -0xd4 31. " GA[191]_set/clr ,GPIO Channel 191 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 30. -0x194 30. -0xd4 30. " GA[190]_set/clr ,GPIO Channel 190 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 29. -0x194 29. -0xd4 29. " GA[189]_set/clr ,GPIO Channel 189 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 28. -0x194 28. -0xd4 28. " GA[188]_set/clr ,GPIO Channel 188 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 27. -0x194 27. -0xd4 27. " GA[187]_set/clr ,GPIO Channel 187 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 26. -0x194 26. -0xd4 26. " GA[186]_set/clr ,GPIO Channel 186 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 25. -0x194 25. -0xd4 25. " GA[185]_set/clr ,GPIO Channel 185 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 24. -0x194 24. -0xd4 24. " GA[184]_set/clr ,GPIO Channel 184 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 23. -0x194 23. -0xd4 23. " GA[183]_set/clr ,GPIO Channel 183 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 22. -0x194 22. -0xd4 22. " GA[182]_set/clr ,GPIO Channel 182 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 21. -0x194 21. -0xd4 21. " GA[181]_set/clr ,GPIO Channel 181 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 20. -0x194 20. -0xd4 20. " GA[180]_set/clr ,GPIO Channel 180 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 19. -0x194 19. -0xd4 19. " GA[179]_set/clr ,GPIO Channel 179 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 18. -0x194 18. -0xd4 18. " GA[178]_set/clr ,GPIO Channel 178 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 17. -0x194 17. -0xd4 17. " GA[177]_set/clr ,GPIO Channel 177 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 16. -0x194 16. -0xd4 16. " GA[176]_set/clr ,GPIO Channel 176 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 15. -0x194 15. -0xd4 15. " GA[175]_set/clr ,GPIO Channel 175 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 14. -0x194 14. -0xd4 14. " GA[174]_set/clr ,GPIO Channel 174 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 13. -0x194 13. -0xd4 13. " GA[173]_set/clr ,GPIO Channel 173 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 12. -0x194 12. -0xd4 12. " GA[172]_set/clr ,GPIO Channel 172 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 11. -0x194 11. -0xd4 11. " GA[171]_set/clr ,GPIO Channel 171 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 10. -0x194 10. -0xd4 10. " GA[170]_set/clr ,GPIO Channel 170 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 9. -0x194 9. -0xd4 9. " GA[169]_set/clr ,GPIO Channel 169 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 8. -0x194 8. -0xd4 8. " GA[168]_set/clr ,GPIO Channel 168 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 7. -0x194 7. -0xd4 7. " GA[167]_set/clr ,GPIO Channel 167 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 6. -0x194 6. -0xd4 6. " GA[166]_set/clr ,GPIO Channel 166 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 5. -0x194 5. -0xd4 5. " GA[165]_set/clr ,GPIO Channel 165 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 4. -0x194 4. -0xd4 4. " GA[164]_set/clr ,GPIO Channel 164 Access Attribute" "No access,Access"
|
|
textline " "
|
|
setclrfld.long 0x14 3. -0x194 3. -0xd4 3. " GA[163]_set/clr ,GPIO Channel 163 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 2. -0x194 2. -0xd4 2. " GA[162]_set/clr ,GPIO Channel 162 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 1. -0x194 1. -0xd4 1. " GA[161]_set/clr ,GPIO Channel 161 Access Attribute" "No access,Access"
|
|
setclrfld.long 0x14 0. -0x194 0. -0xd4 0. " GA[160]_set/clr ,GPIO Channel 160 Access Attribute" "No access,Access"
|
|
endif
|
|
tree.end
|
|
width 19.
|
|
rgroup.long 0x248++0x03
|
|
line.long 0x00 "PPU0_ST,PPU Status Register"
|
|
bitfld.long 0x00 8. " PSA ,PPU Settings Applied" "Not applied,Applied"
|
|
bitfld.long 0x00 0. " LST ,PPU Lock Status" "Unlocked,Locked"
|
|
group.long 0x24c++0x03
|
|
line.long 0x00 "PPU0_CTR,PPU Control Register"
|
|
bitfld.long 0x00 16. " NEAV ,Non-Existent Address Violation" "No error,Error"
|
|
bitfld.long 0x00 8. " PTST ,Protection of Test Registers" "Protected,Not protected"
|
|
bitfld.long 0x00 0. " DMAEN ,DMA Enable" "Disabled,Enabled"
|
|
wgroup.long 0x240++0x03
|
|
line.long 0x00 "PPU0_UNLOCK,PPU Unlock Register"
|
|
width 12.
|
|
tree.end
|
|
tree.open "Bus Error Collection Unit"
|
|
tree "BECU 0"
|
|
base ad:0xb07f0000
|
|
width 16.
|
|
textline " "
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "BECU0_CTRL,BECU 0 Control Register - L"
|
|
rbitfld.word 0x00 8. " PROT ,Protection Information" "User,Privilege"
|
|
bitfld.word 0x00 1. " NMICL ,Non-Maskable Interrupt Clear" "No effect,Clear"
|
|
rbitfld.word 0x00 0. " NMI ,Non-Maskable Interrupt Flag" "Not pending,Pending"
|
|
rgroup.word 0x02++0x13
|
|
line.word 0x00 "BECU0_CTRH,BECU 0 Control Register - H"
|
|
bitfld.word 0x00 15. " WR[7] ,Write data bus 7" "No write,Write"
|
|
bitfld.word 0x00 14. " [6] ,Write data bus 6" "No write,Write"
|
|
bitfld.word 0x00 13. " [5] ,Write data bus 5" "No write,Write"
|
|
bitfld.word 0x00 12. " [4] ,Write data bus 4" "No write,Write"
|
|
bitfld.word 0x00 11. " [3] ,Write data bus 3" "No write,Write"
|
|
bitfld.word 0x00 10. " [2] ,Write data bus 2" "No write,Write"
|
|
bitfld.word 0x00 9. " [1] ,Write data bus 1" "No write,Write"
|
|
bitfld.word 0x00 8. " [0] ,Write data bus 0" "No write,Write"
|
|
textline " "
|
|
bitfld.word 0x00 7. " RD[7] ,Read data bus 7" "No read,Read"
|
|
bitfld.word 0x00 6. " [6] ,Read data bus 6" "No read,Read"
|
|
bitfld.word 0x00 5. " [5] ,Read data bus 5" "No read,Read"
|
|
bitfld.word 0x00 4. " [4] ,Read data bus 4" "No read,Read"
|
|
bitfld.word 0x00 3. " [3] ,Read data bus 3" "No read,Read"
|
|
bitfld.word 0x00 2. " [2] ,Read data bus 2" "No read,Read"
|
|
bitfld.word 0x00 1. " [1] ,Read data bus 1" "No read,Read"
|
|
bitfld.word 0x00 0. " [0] ,Read data bus 0" "No read,Read"
|
|
line.word 0x02 "BECU0_ADDRL,BECU 0 Address Register - L"
|
|
line.word 0x04 "BECU0_ADDRH,BECU 0 Address Register - H"
|
|
line.word 0x06 "BECU0_DATALL,BECU 0 Data Register - LL"
|
|
line.word 0x08 "BECU0_DATALH,BECU 0 Data Register - LH"
|
|
line.word 0x0a "BECU0_DATAHL,BECU 0 Data Register - HL"
|
|
line.word 0x0c "BECU0_DATAHH,BECU 0 Data Register - HH"
|
|
line.word 0x0e "BECU0_MASTERID,BECU 0 Master ID Register"
|
|
line.word 0x10 "BECU0_MIDL,BECU Module ID Register - L"
|
|
line.word 0x12 "BECU0_MIDH,BECU Module ID Register - H"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "BECU0_NMIEN,BECU 0 NMI Enable Register"
|
|
bitfld.word 0x00 0. " NMIEN ,Non-Maskable Interrupt Enable" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "BECU 1"
|
|
base ad:0xb08f0000
|
|
width 16.
|
|
textline " "
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "BECU1_CTRL,BECU 1 Control Register - L"
|
|
rbitfld.word 0x00 8. " PROT ,Protection Information" "User,Privilege"
|
|
bitfld.word 0x00 1. " NMICL ,Non-Maskable Interrupt Clear" "No effect,Clear"
|
|
rbitfld.word 0x00 0. " NMI ,Non-Maskable Interrupt Flag" "Not pending,Pending"
|
|
rgroup.word 0x02++0x13
|
|
line.word 0x00 "BECU1_CTRH,BECU 1 Control Register - H"
|
|
bitfld.word 0x00 15. " WR[7] ,Write data bus 7" "No write,Write"
|
|
bitfld.word 0x00 14. " [6] ,Write data bus 6" "No write,Write"
|
|
bitfld.word 0x00 13. " [5] ,Write data bus 5" "No write,Write"
|
|
bitfld.word 0x00 12. " [4] ,Write data bus 4" "No write,Write"
|
|
bitfld.word 0x00 11. " [3] ,Write data bus 3" "No write,Write"
|
|
bitfld.word 0x00 10. " [2] ,Write data bus 2" "No write,Write"
|
|
bitfld.word 0x00 9. " [1] ,Write data bus 1" "No write,Write"
|
|
bitfld.word 0x00 8. " [0] ,Write data bus 0" "No write,Write"
|
|
textline " "
|
|
bitfld.word 0x00 7. " RD[7] ,Read data bus 7" "No read,Read"
|
|
bitfld.word 0x00 6. " [6] ,Read data bus 6" "No read,Read"
|
|
bitfld.word 0x00 5. " [5] ,Read data bus 5" "No read,Read"
|
|
bitfld.word 0x00 4. " [4] ,Read data bus 4" "No read,Read"
|
|
bitfld.word 0x00 3. " [3] ,Read data bus 3" "No read,Read"
|
|
bitfld.word 0x00 2. " [2] ,Read data bus 2" "No read,Read"
|
|
bitfld.word 0x00 1. " [1] ,Read data bus 1" "No read,Read"
|
|
bitfld.word 0x00 0. " [0] ,Read data bus 0" "No read,Read"
|
|
line.word 0x02 "BECU1_ADDRL,BECU 1 Address Register - L"
|
|
line.word 0x04 "BECU1_ADDRH,BECU 1 Address Register - H"
|
|
line.word 0x06 "BECU1_DATALL,BECU 1 Data Register - LL"
|
|
line.word 0x08 "BECU1_DATALH,BECU 1 Data Register - LH"
|
|
line.word 0x0a "BECU1_DATAHL,BECU 1 Data Register - HL"
|
|
line.word 0x0c "BECU1_DATAHH,BECU 1 Data Register - HH"
|
|
line.word 0x0e "BECU1_MASTERID,BECU 1 Master ID Register"
|
|
line.word 0x10 "BECU1_MIDL,BECU Module ID Register - L"
|
|
line.word 0x12 "BECU1_MIDH,BECU Module ID Register - H"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "BECU1_NMIEN,BECU 1 NMI Enable Register"
|
|
bitfld.word 0x00 0. " NMIEN ,Non-Maskable Interrupt Enable" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "BECU 3"
|
|
base ad:0xb0af0000
|
|
width 16.
|
|
textline " "
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "BECU3_CTRL,BECU 3 Control Register - L"
|
|
rbitfld.word 0x00 8. " PROT ,Protection Information" "User,Privilege"
|
|
bitfld.word 0x00 1. " NMICL ,Non-Maskable Interrupt Clear" "No effect,Clear"
|
|
rbitfld.word 0x00 0. " NMI ,Non-Maskable Interrupt Flag" "Not pending,Pending"
|
|
rgroup.word 0x02++0x13
|
|
line.word 0x00 "BECU3_CTRH,BECU 3 Control Register - H"
|
|
bitfld.word 0x00 15. " WR[7] ,Write data bus 7" "No write,Write"
|
|
bitfld.word 0x00 14. " [6] ,Write data bus 6" "No write,Write"
|
|
bitfld.word 0x00 13. " [5] ,Write data bus 5" "No write,Write"
|
|
bitfld.word 0x00 12. " [4] ,Write data bus 4" "No write,Write"
|
|
bitfld.word 0x00 11. " [3] ,Write data bus 3" "No write,Write"
|
|
bitfld.word 0x00 10. " [2] ,Write data bus 2" "No write,Write"
|
|
bitfld.word 0x00 9. " [1] ,Write data bus 1" "No write,Write"
|
|
bitfld.word 0x00 8. " [0] ,Write data bus 0" "No write,Write"
|
|
textline " "
|
|
bitfld.word 0x00 7. " RD[7] ,Read data bus 7" "No read,Read"
|
|
bitfld.word 0x00 6. " [6] ,Read data bus 6" "No read,Read"
|
|
bitfld.word 0x00 5. " [5] ,Read data bus 5" "No read,Read"
|
|
bitfld.word 0x00 4. " [4] ,Read data bus 4" "No read,Read"
|
|
bitfld.word 0x00 3. " [3] ,Read data bus 3" "No read,Read"
|
|
bitfld.word 0x00 2. " [2] ,Read data bus 2" "No read,Read"
|
|
bitfld.word 0x00 1. " [1] ,Read data bus 1" "No read,Read"
|
|
bitfld.word 0x00 0. " [0] ,Read data bus 0" "No read,Read"
|
|
line.word 0x02 "BECU3_ADDRL,BECU 3 Address Register - L"
|
|
line.word 0x04 "BECU3_ADDRH,BECU 3 Address Register - H"
|
|
line.word 0x06 "BECU3_DATALL,BECU 3 Data Register - LL"
|
|
line.word 0x08 "BECU3_DATALH,BECU 3 Data Register - LH"
|
|
line.word 0x0a "BECU3_DATAHL,BECU 3 Data Register - HL"
|
|
line.word 0x0c "BECU3_DATAHH,BECU 3 Data Register - HH"
|
|
line.word 0x0e "BECU3_MASTERID,BECU 3 Master ID Register"
|
|
line.word 0x10 "BECU3_MIDL,BECU Module ID Register - L"
|
|
line.word 0x12 "BECU3_MIDH,BECU Module ID Register - H"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "BECU3_NMIEN,BECU 3 NMI Enable Register"
|
|
bitfld.word 0x00 0. " NMIEN ,Non-Maskable Interrupt Enable" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "RETENTIONRAM"
|
|
base ad:0xb0610000
|
|
width 16.
|
|
textline " "
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "RRCFG_UNLOCKR,RETENTIONRAM Unlock Register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RRCFG_CSR,RETENTIONRAM Configuration and Status Register"
|
|
bitfld.long 0x00 26.--27. " WAWC1 ,RAM Write Access Wait Cycle Configuration" "0 states,1 state,2 states,3 states"
|
|
bitfld.long 0x00 24.--25. " RAWC1 ,RAM Read Access Wait Cycle Configuration" "0 states,1 state,2 states,3 states"
|
|
bitfld.long 0x00 16. " CEIC ,ECC Correctable Error Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 9. " LCK ,Lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " CEIF ,ECC Correctable Error Interrupt Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CEIEN ,ECC Correctable Error Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "RRCFG_EAN,RETENTIONRAM ECC Error Address Number Register"
|
|
group.long 0x0c++0x0b
|
|
line.long 0x00 "RRCFG_ERRMSKR0,RETENTIONRAM Error Mask Register 0"
|
|
bitfld.long 0x00 31. " MSK[31] ,ECC Error Mask bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " MSK[30] ,ECC Error Mask bit 30" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " MSK[29] ,ECC Error Mask bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " MSK[28] ,ECC Error Mask bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " MSK[27] ,ECC Error Mask bit 27" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " MSK[26] ,ECC Error Mask bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " MSK[25] ,ECC Error Mask bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " MSK[24] ,ECC Error Mask bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK[23] ,ECC Error Mask bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " MSK[22] ,ECC Error Mask bit 22" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " MSK[21] ,ECC Error Mask bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MSK[20] ,ECC Error Mask bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MSK[19] ,ECC Error Mask bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " MSK[18] ,ECC Error Mask bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MSK[17] ,ECC Error Mask bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MSK[16] ,ECC Error Mask bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " MSK[15] ,ECC Error Mask bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " MSK[14] ,ECC Error Mask bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " MSK[13] ,ECC Error Mask bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " MSK[12] ,ECC Error Mask bit 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MSK[11] ,ECC Error Mask bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " MSK[10] ,ECC Error Mask bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " MSK[9] ,ECC Error Mask bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " MSK[8] ,ECC Error Mask bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK[7] ,ECC Error Mask bit 7" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " MSK[6] ,ECC Error Mask bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " MSK[5] ,ECC Error Mask bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " MSK[4] ,ECC Error Mask bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " MSK[3] ,ECC Error Mask bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " MSK[2] ,ECC Error Mask bit 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MSK[1] ,ECC Error Mask bit 1" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " MSK[0] ,ECC Error Mask bit 0" "Not masked,Masked"
|
|
line.long 0x04 "RRCFG_ERRMSKR1,RETENTIONRAM Error Mask Register 1"
|
|
bitfld.long 0x04 6. " MSK[6] ,ECC Error Mask bit 38" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " MSK[5] ,ECC Error Mask bit 37" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " MSK[4] ,ECC Error Mask bit 36" "Not masked,Masked"
|
|
bitfld.long 0x04 3. " MSK[3] ,ECC Error Mask bit 35" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " MSK[2] ,ECC Error Mask bit 34" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MSK[1] ,ECC Error Mask bit 33" "Not masked,Masked"
|
|
bitfld.long 0x04 0. " MSK[0] ,ECC Error Mask bit 32" "Not masked,Masked"
|
|
line.long 0x08 "RRCFG_ECCEN,RETENTIONRAM ECC Enable Register"
|
|
bitfld.long 0x08 0. " ECCEN ,ECC Calculation Enable" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "External Interrupts"
|
|
base ad:0xb0620000
|
|
width 19.
|
|
textline " "
|
|
group.long 0x00++0x03 "External Interrupt Enable Set/Clear Register"
|
|
line.long 0x00 "EIC0_ENIR_SET/CLR,External Interrupt Enable Set/Clear Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EN[31]_set/clr ,Interrupt 31 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " EN[30]_set/clr ,Interrupt 30 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " EN[29]_set/clr ,Interrupt 29 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EN[28]_set/clr ,Interrupt 28 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " EN[27]_set/clr ,Interrupt 27 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " EN[26]_set/clr ,Interrupt 26 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " EN[25]_set/clr ,Interrupt 25 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " EN[24]_set/clr ,Interrupt 24 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " EN[23]_set/clr ,Interrupt 23 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " EN[22]_set/clr ,Interrupt 22 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " EN[21]_set/clr ,Interrupt 21 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " EN[20]_set/clr ,Interrupt 20 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " EN[19]_set/clr ,Interrupt 19 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " EN[18]_set/clr ,Interrupt 18 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " EN[17]_set/clr ,Interrupt 17 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " EN[16]_set/clr ,Interrupt 16 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EN[15]_set/clr ,Interrupt 15 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " EN[14]_set/clr ,Interrupt 14 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " EN[13]_set/clr ,Interrupt 13 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " EN[12]_set/clr ,Interrupt 12 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " EN[11]_set/clr ,Interrupt 11 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " EN[10]_set/clr ,Interrupt 10 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " EN[9]_set/clr ,Interrupt 9 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " EN[8]_set/clr ,Interrupt 8 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " EN[7]_set/clr ,Interrupt 7 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " EN[6]_set/clr ,Interrupt 6 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " EN[5]_set/clr ,Interrupt 5 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " EN[4]_set/clr ,Interrupt 4 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EN[3]_set/clr ,Interrupt 3 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " EN[2]_set/clr ,Interrupt 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " EN[1]_set/clr ,Interrupt 1 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EN[0]_set/clr ,Interrupt 0 Enable" "Disabled,Enabled"
|
|
width 19.
|
|
rgroup.long 0x0c++0x03 "External Interrupt Request Register"
|
|
line.long 0x00 "EIC0_EIRR,External Interrupt Request Register"
|
|
bitfld.long 0x00 31. " ER[31] ,Interrupt 31 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " ER[30] ,Interrupt 30 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " ER[29] ,Interrupt 29 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 28. " ER[28] ,Interrupt 28 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " ER[27] ,Interrupt 27 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " ER[26] ,Interrupt 26 Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ER[25] ,Interrupt 25 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " ER[24] ,Interrupt 24 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " ER[23] ,Interrupt 23 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " ER[22] ,Interrupt 22 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " ER[21] ,Interrupt 21 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " ER[20] ,Interrupt 20 Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ER[19] ,Interrupt 19 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " ER[18] ,Interrupt 18 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " ER[17] ,Interrupt 17 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " ER[16] ,Interrupt 16 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " ER[15] ,Interrupt 15 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " ER[14] ,Interrupt 14 Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ER[13] ,Interrupt 13 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " ER[12] ,Interrupt 12 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " ER[11] ,Interrupt 11 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " ER[10] ,Interrupt 10 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " ER[9] ,Interrupt 9 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " ER[8] ,Interrupt 8 Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ER[7] ,Interrupt 7 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " ER[6] ,Interrupt 6 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " ER[5] ,Interrupt 5 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " ER[4] ,Interrupt 4 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " ER[3] ,Interrupt 3 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " ER[2] ,Interrupt 2 Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ER[1] ,Interrupt 1 Request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " ER[0] ,Interrupt 0 Request" "Not requested,Requested"
|
|
wgroup.long 0x10++0x03 "External Interrupt Request Clear Register"
|
|
line.long 0x00 "EIC0_EIRCR,External Interrupt Request Clear Register"
|
|
bitfld.long 0x00 31. " ERC[31] ,Interrupt 31 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " ERC[30] ,Interrupt 30 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 29. " ERC[29] ,Interrupt 29 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 28. " ERC[28] ,Interrupt 28 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 27. " ERC[27] ,Interrupt 27 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " ERC[26] ,Interrupt 26 Request Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ERC[25] ,Interrupt 25 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " ERC[24] ,Interrupt 24 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 23. " ERC[23] ,Interrupt 23 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " ERC[22] ,Interrupt 22 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " ERC[21] ,Interrupt 21 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " ERC[20] ,Interrupt 20 Request Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ERC[19] ,Interrupt 19 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " ERC[18] ,Interrupt 18 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " ERC[17] ,Interrupt 17 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " ERC[16] ,Interrupt 16 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 15. " ERC[15] ,Interrupt 15 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " ERC[14] ,Interrupt 14 Request Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERC[13] ,Interrupt 13 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " ERC[12] ,Interrupt 12 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " ERC[11] ,Interrupt 11 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " ERC[10] ,Interrupt 10 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " ERC[9] ,Interrupt 9 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " ERC[8] ,Interrupt 8 Request Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ERC[7] ,Interrupt 7 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " ERC[6] ,Interrupt 6 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " ERC[5] ,Interrupt 5 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " ERC[4] ,Interrupt 4 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " ERC[3] ,Interrupt 3 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " ERC[2] ,Interrupt 2 Request Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ERC[1] ,Interrupt 1 Request Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " ERC[0] ,Interrupt 0 Request Clear" "No effect,Clear"
|
|
width 19.
|
|
group.long 0x14++0x03 "Noise Filter Enable Set/Clear Register"
|
|
line.long 0x00 "EIC0_NFER_SET/CLR,Noise Filter Enable Set/Clear Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " NFE[31]_set/clr ,Noise Filter 31 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " NFE[30]_set/clr ,Noise Filter 30 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " NFE[29]_set/clr ,Noise Filter 29 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " NFE[28]_set/clr ,Noise Filter 28 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " NFE[27]_set/clr ,Noise Filter 27 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " NFE[26]_set/clr ,Noise Filter 26 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " NFE[25]_set/clr ,Noise Filter 25 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " NFE[24]_set/clr ,Noise Filter 24 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " NFE[23]_set/clr ,Noise Filter 23 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " NFE[22]_set/clr ,Noise Filter 22 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " NFE[21]_set/clr ,Noise Filter 21 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " NFE[20]_set/clr ,Noise Filter 20 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " NFE[19]_set/clr ,Noise Filter 19 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " NFE[18]_set/clr ,Noise Filter 18 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " NFE[17]_set/clr ,Noise Filter 17 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " NFE[16]_set/clr ,Noise Filter 16 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " NFE[15]_set/clr ,Noise Filter 15 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " NFE[14]_set/clr ,Noise Filter 14 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " NFE[13]_set/clr ,Noise Filter 13 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " NFE[12]_set/clr ,Noise Filter 12 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " NFE[11]_set/clr ,Noise Filter 11 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " NFE[10]_set/clr ,Noise Filter 10 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " NFE[9]_set/clr ,Noise Filter 9 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " NFE[8]_set/clr ,Noise Filter 8 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " NFE[7]_set/clr ,Noise Filter 7 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NFE[6]_set/clr ,Noise Filter 6 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " NFE[5]_set/clr ,Noise Filter 5 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " NFE[4]_set/clr ,Noise Filter 4 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " NFE[3]_set/clr ,Noise Filter 3 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " NFE[2]_set/clr ,Noise Filter 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " NFE[1]_set/clr ,Noise Filter 1 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " NFE[0]_set/clr ,Noise Filter 0 Enable" "Disabled,Enabled"
|
|
width 19.
|
|
group.long 0x20++0x13 "External Interrupt Level Registers"
|
|
line.long 0x00 "EIC0_ELVR0,External Interrupt Level Register 0"
|
|
bitfld.long 0x00 28.--30. " EIL7 ,External Interrupt 7 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x00 24.--26. " EIL6 ,External Interrupt 6 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x00 20.--22. " EIL5 ,External Interrupt 5 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x00 16.--18. " EIL4 ,External Interrupt 4 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x00 12.--14. " EIL3 ,External Interrupt 3 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x00 8.--10. " EIL2 ,External Interrupt 2 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EIL1 ,External Interrupt 1 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x00 0.--2. " EIL0 ,External Interrupt 0 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
line.long 0x04 "EIC0_ELVR1,External Interrupt Level Register 1"
|
|
bitfld.long 0x04 28.--30. " EIL15 ,External Interrupt 15 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x04 24.--26. " EIL14 ,External Interrupt 14 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x04 20.--22. " EIL13 ,External Interrupt 13 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x04 16.--18. " EIL12 ,External Interrupt 12 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x04 12.--14. " EIL11 ,External Interrupt 11 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x04 8.--10. " EIL10 ,External Interrupt 10 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " EIL9 ,External Interrupt 9 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x04 0.--2. " EIL8 ,External Interrupt 8 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
line.long 0x08 "EIC0_ELVR2,External Interrupt Level Register 2"
|
|
bitfld.long 0x08 28.--30. " EIL23 ,External Interrupt 23 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x08 24.--26. " EIL22 ,External Interrupt 22 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x08 20.--22. " EIL21 ,External Interrupt 21 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x08 16.--18. " EIL20 ,External Interrupt 20 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x08 12.--14. " EIL19 ,External Interrupt 19 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x08 8.--10. " EIL18 ,External Interrupt 18 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.long 0x08 4.--6. " EIL17 ,External Interrupt 17 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x08 0.--2. " EIL16 ,External Interrupt 16 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
line.long 0x0c "EIC0_ELVR3,External Interrupt Level Register 3"
|
|
bitfld.long 0x0c 28.--30. " EIL31 ,External Interrupt 31 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x0c 24.--26. " EIL30 ,External Interrupt 30 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x0c 20.--22. " EIL29 ,External Interrupt 29 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x0c 16.--18. " EIL28 ,External Interrupt 28 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x0c 12.--14. " EIL27 ,External Interrupt 27 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x0c 8.--10. " EIL26 ,External Interrupt 26 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.long 0x0c 4.--6. " EIL25 ,External Interrupt 25 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
bitfld.long 0x0c 0.--2. " EIL24 ,External Interrupt 24 Level" "'L' level,'H' level,Rising edge,Falling edge,Any edge,Any edge,Any edge,Any edge"
|
|
line.long 0x10 "EIC0_NMIR,Non-Maskable Interrupt Register"
|
|
bitfld.long 0x10 8. " NMICLR ,Non Maskable Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x10 0. " NMIINT ,Non Maskable Interrupt" "No interrupt,Interrupt"
|
|
width 19.
|
|
group.long 0x34++0x03 "DMA Request Enable Set/Clear Register"
|
|
line.long 0x00 "EIC0_DRER_SET/CLR,DMA Request Enable Set/Clear Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DRE[31]_set/clr ,DMA 31 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " DRE[30]_set/clr ,DMA 30 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " DRE[29]_set/clr ,DMA 29 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DRE[28]_set/clr ,DMA 28 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " DRE[27]_set/clr ,DMA 27 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " DRE[26]_set/clr ,DMA 26 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DRE[25]_set/clr ,DMA 25 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " DRE[24]_set/clr ,DMA 24 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " DRE[23]_set/clr ,DMA 23 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " DRE[22]_set/clr ,DMA 22 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DRE[21]_set/clr ,DMA 21 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " DRE[20]_set/clr ,DMA 20 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " DRE[19]_set/clr ,DMA 19 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " DRE[18]_set/clr ,DMA 18 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " DRE[17]_set/clr ,DMA 17 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " DRE[16]_set/clr ,DMA 16 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " DRE[15]_set/clr ,DMA 15 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " DRE[14]_set/clr ,DMA 14 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " DRE[13]_set/clr ,DMA 13 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " DRE[12]_set/clr ,DMA 12 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DRE[11]_set/clr ,DMA 11 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " DRE[10]_set/clr ,DMA 10 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " DRE[9]_set/clr ,DMA 9 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " DRE[8]_set/clr ,DMA 8 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " DRE[7]_set/clr ,DMA 7 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " DRE[6]_set/clr ,DMA 6 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DRE[5]_set/clr ,DMA 5 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DRE[4]_set/clr ,DMA 4 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " DRE[3]_set/clr ,DMA 3 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " DRE[2]_set/clr ,DMA 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DRE[1]_set/clr ,DMA 1 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DRE[0]_set/clr ,DMA 0 Enable" "Disabled,Enabled"
|
|
width 19.
|
|
rgroup.long 0x40++0x03 "DMA Request Flag Register"
|
|
line.long 0x00 "EIC0_DRFR,DMA Request Flag Register"
|
|
bitfld.long 0x00 31. " DRF[31] ,DMA 31 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " DRF[30] ,DMA 30 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " DRF[29] ,DMA 29 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 28. " DRF[28] ,DMA 28 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " DRF[27] ,DMA 27 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " DRF[26] ,DMA 26 Request Flag" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DRF[25] ,DMA 25 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " DRF[24] ,DMA 24 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " DRF[23] ,DMA 23 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " DRF[22] ,DMA 22 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " DRF[21] ,DMA 21 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " DRF[20] ,DMA 20 Request Flag" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DRF[19] ,DMA 19 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " DRF[18] ,DMA 18 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " DRF[17] ,DMA 17 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " DRF[16] ,DMA 16 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " DRF[15] ,DMA 15 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " DRF[14] ,DMA 14 Request Flag" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DRF[13] ,DMA 13 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " DRF[12] ,DMA 12 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " DRF[11] ,DMA 11 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " DRF[10] ,DMA 10 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " DRF[9] ,DMA 9 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " DRF[8] ,DMA 8 Request Flag" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DRF[7] ,DMA 7 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " DRF[6] ,DMA 6 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " DRF[5] ,DMA 5 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " DRF[4] ,DMA 4 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " DRF[3] ,DMA 3 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " DRF[2] ,DMA 2 Request Flag" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DRF[1] ,DMA 1 Request Flag" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " DRF[0] ,DMA 0 Request Flag" "Not requested,Requested"
|
|
width 12.
|
|
tree.end
|
|
tree "Sound Generator"
|
|
base ad:0xb0800000
|
|
width 14.
|
|
textline " "
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SG0_CR0,Sound Generator Control Register 0"
|
|
bitfld.word 0x00 15. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " FSEL ,Number of PWM Cycles" "255,511"
|
|
bitfld.word 0x00 13. " DMA ,DMA Mode Select" "Disabled,Enabled"
|
|
rbitfld.word 0x00 12. " SGDADS ,Automatic Output Stop Status" "Not stopped,Stopped"
|
|
bitfld.word 0x00 10.--11. " T[3:2] ,Prescaler-2 Clock Division Select" "/1,/2,/3,/4"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " S[1:0] ,Prescaler-1 Clock Division Select" "/1,/2,/3,/4"
|
|
bitfld.word 0x00 6. " AMICLR ,Amplitude Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 5. " TCICLR ,Tone Pulse Count Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 4. " ZAICLR ,Zero Amplitude Interrupt Clear" "No effect,Clear"
|
|
rbitfld.word 0x00 3. " RUNNING ,Sound Generation Status" "Stopped,Running"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RESUME ,Sound Generation Resume" "No effect,Resume"
|
|
bitfld.word 0x00 1. " STOP ,Sound Generation Stop" "No effect,Stop"
|
|
bitfld.word 0x00 0. " START ,Sound Generation Start" "No effect,Start"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "SG0_CR1,Sound Generator Control Register 1"
|
|
eventfld.byte 0x00 6. " AMINT ,Amplitude Match Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.byte 0x00 5. " TCINT ,Tone Pulse Count Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.byte 0x00 4. " ZAINT ,Zero Amplitude Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " TONE ,SGO Output Select" "Mixed-Tone,Tone"
|
|
bitfld.byte 0x00 2. " AMP ,SGA Output Select" "Mixed-Inverted-Tone,PWM"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SGOOE ,SGO Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " SGAOE ,SGA Output Enable" "Disabled,Enabled"
|
|
group.word 0x04++0x03
|
|
line.word 0x00 "SG0_ECRL,Sound Generator Extended Control Reload Register"
|
|
bitfld.word 0x00 15. " AUTO ,Automatic Amplitude Increment and Decrement Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " IDS ,Amplitude Increment/Decrement Select" "Decrement,Increment"
|
|
bitfld.word 0x00 13. " ELS ,Exponential/Linear Select" "Linear,Expotential"
|
|
bitfld.word 0x00 12. " SGDADR ,Sound Output Automatic Stop Control" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " AMRLE ,Amplitude Match Reload Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " TCRLE ,Tone Count Reload Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " ZARLE ,Zero Amplitude Reload Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " AMIE ,Amplitude Match Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TCIE ,Tone Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ZAIE ,Zero Amplitude Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " AMDMAE ,Amplitude Match DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TCDMAE ,Tone Pulse Count DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ZADMAE ,Zero Amplitude Match DMA Request Enable" "Disabled,Enabled"
|
|
line.word 0x02 "SG0_FRL,Sound Generator Frequency Data Reload Register"
|
|
hexmask.word 0x02 0.--14. 1. " SGFRL ,Sound Generator Frequency Data Reload Value"
|
|
rgroup.word 0x08++0x01
|
|
line.word 0x00 "SG0_AR,Sound Generator Amplitude Status Register"
|
|
hexmask.word 0x00 0.--8. 1. " SGAR ,Sound Generator Amplitude Status Value"
|
|
group.word 0x0a++0x01
|
|
line.word 0x00 "SG0_ARL,Sound Generator Amplitude Data Reload Register"
|
|
hexmask.word 0x00 0.--8. 1. " SGARL ,Sound Generator Amplitude Data Reload Value"
|
|
if (((d.w(ad:0xb0800004))&0x2000)==0x0)
|
|
group.word 0x0e++0x01
|
|
line.word 0x00 "SG0_TCRLIDRL,Sound Generator Time Cycle Data Reload Register & Increment or Decrement Data Reload Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " SGTCRL ,Sound Generator Time Cycle Data Reload Value"
|
|
hexmask.word.byte 0x00 0.--7. 1. " SGIDRL ,Sound Generator Amplitude Increment/Decrement Data Reload Value"
|
|
else
|
|
group.word 0x0e++0x01
|
|
line.word 0x00 "SG0_TCRLIDRL,Sound Generator Time Cycle Data Reload Register & Increment or Decrement Data Reload Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " SGTCRL ,Sound Generator Time Cycle Data Reload Value"
|
|
endif
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "SG0_TARL,Sound Generator Target Amplitude Data Reload Register"
|
|
hexmask.word 0x00 0.--8. 1. " SGTARL ,Sound Generator Target Amplitude Data Reload Value"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "SG0_NRL,Sound Generator Tone Output Number Reload Register"
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "SG0_DER,Sound Generator DMA Transfer Update Enable Register"
|
|
bitfld.word 0x00 10. " NRE ,DMA Update Enable for SG_NRL" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " TCRE ,DMA Update Enable for SGn_TCRLIDRL:SGTCRL" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " IDRE ,DMA Update Enable for SGn_TCRLIDRL:SGIDRL" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " TARE1 ,DMA Update Enable for SGn_TARL High byte" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " TARE0 ,DMA Update Enable for SGn_TARL Low byte" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ARE1 ,DMA Update Enable for SGn_ARL High byte" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ARE0 ,DMA Update Enable for SGn_ARL Low byte" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " FRE1 ,DMA Update Enable for SGn_FRL High byte" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRE0 ,DMA Update Enable for SGn_FRL Low byte" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " CRE1 ,DMA Update Enable for SGn_ECRL High byte" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " CRE0 ,DMA Update Enable for SGn_ECRL Low byte" "Disabled,Enabled"
|
|
wgroup.word 0x14++0x01
|
|
line.word 0x00 "SG0_DMAR,Sound Generator DMA Transfer Indirect Data Register"
|
|
width 12.
|
|
tree.end
|
|
tree.open "16-bit I/O Timer"
|
|
tree "Free Running Timers"
|
|
tree "FRT 0"
|
|
base ad:0xb0708000
|
|
width 16.
|
|
if (((d.w(ad:0xb0708008))&0x1)==0x1)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "FRT0_TCDT,Data Register"
|
|
else
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "FRT0_TCDT,Data Register"
|
|
endif
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "FRT0_CPCLRB,Compare Clear Buffer Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "FRT0_CPCLR,Compare Clear Register"
|
|
group.word 0x06++0x07
|
|
line.word 0x00 "FRT0_TCCS,Control Status Register"
|
|
bitfld.word 0x00 10. " ZFCLR ,IRQZF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 9. " IVFCLR ,IVF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " CLR ,Clear Timer" "No effect,Clear"
|
|
rbitfld.word 0x00 7. " IVF ,Interrupt Request Flag bit for Compare Clear" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 6. " IVFE ,Interrupt Enable bit for Compare Clear or Overflow" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MODE ,Set Reset Condition of Timer" "Reset or clear bit,Reset/clear bit or compare"
|
|
line.word 0x02 "FRT0_TSTPTCLK,Timer Stop/Timer Clock Configuration Register"
|
|
bitfld.word 0x02 15. " ECKE ,External Clock Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " FSEL ,Frequency Selection" "Div by 2,No division"
|
|
bitfld.word 0x02 8.--11. " CLK ,Clock Multiplier Selection" "1,1/2,1/4,1/8,1/16,1/32,1/64,1/128,1/256,1/512,1/1024,..."
|
|
bitfld.word 0x02 0. " STOP ,Stop Timer" "Running,Stopped"
|
|
line.word 0x04 "FRT0_ETCCS,Extended Control Status Register"
|
|
hexmask.word.byte 0x04 12.--14. 1. " CIMC ,Compare Clear Mask Counter Read"
|
|
hexmask.word.byte 0x04 8.--10. 1. " ZIMC ,Zero Detect Mask Counter Read"
|
|
bitfld.word 0x04 6. " DBGE ,Debug mode Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 5. " CNTDIR ,Count Direction" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x04 4. " ICUR ,FRT Counter Reset by ICU Enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " BFE ,Compare Clear Buffer Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 2. " IRQZF ,Interrupt Request Flag for Zero Detect" "Not requested,Requested"
|
|
bitfld.word 0x04 1. " IRQZE ,Zero Detect Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 0. " CNTMD ,Count Mode of FRT" "Up,Up/Down"
|
|
line.word 0x06 "FRT0_CIMSZIMS,Compare/Zero-Interrupt Mask Register"
|
|
bitfld.word 0x06 8.--10. " ZIMS ,Zero Detect Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
bitfld.word 0x06 0.--2. " CIMS ,Compare Clear Interrupt Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "FRT0_DMACFG,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " EN_DMA_CCM ,Compare clear match interrupt DMA request" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EN_DMA_ZD ,Zero-detect interrupt DMA request" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "FRT 1"
|
|
base ad:0xb0708400
|
|
width 16.
|
|
if (((d.w(ad:0xb0708408))&0x1)==0x1)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "FRT1_TCDT,Data Register"
|
|
else
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "FRT1_TCDT,Data Register"
|
|
endif
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "FRT1_CPCLRB,Compare Clear Buffer Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "FRT1_CPCLR,Compare Clear Register"
|
|
group.word 0x06++0x07
|
|
line.word 0x00 "FRT1_TCCS,Control Status Register"
|
|
bitfld.word 0x00 10. " ZFCLR ,IRQZF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 9. " IVFCLR ,IVF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " CLR ,Clear Timer" "No effect,Clear"
|
|
rbitfld.word 0x00 7. " IVF ,Interrupt Request Flag bit for Compare Clear" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 6. " IVFE ,Interrupt Enable bit for Compare Clear or Overflow" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MODE ,Set Reset Condition of Timer" "Reset or clear bit,Reset/clear bit or compare"
|
|
line.word 0x02 "FRT1_TSTPTCLK,Timer Stop/Timer Clock Configuration Register"
|
|
bitfld.word 0x02 15. " ECKE ,External Clock Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " FSEL ,Frequency Selection" "Div by 2,No division"
|
|
bitfld.word 0x02 8.--11. " CLK ,Clock Multiplier Selection" "1,1/2,1/4,1/8,1/16,1/32,1/64,1/128,1/256,1/512,1/1024,..."
|
|
bitfld.word 0x02 0. " STOP ,Stop Timer" "Running,Stopped"
|
|
line.word 0x04 "FRT1_ETCCS,Extended Control Status Register"
|
|
hexmask.word.byte 0x04 12.--14. 1. " CIMC ,Compare Clear Mask Counter Read"
|
|
hexmask.word.byte 0x04 8.--10. 1. " ZIMC ,Zero Detect Mask Counter Read"
|
|
bitfld.word 0x04 6. " DBGE ,Debug mode Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 5. " CNTDIR ,Count Direction" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x04 4. " ICUR ,FRT Counter Reset by ICU Enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " BFE ,Compare Clear Buffer Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 2. " IRQZF ,Interrupt Request Flag for Zero Detect" "Not requested,Requested"
|
|
bitfld.word 0x04 1. " IRQZE ,Zero Detect Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 0. " CNTMD ,Count Mode of FRT" "Up,Up/Down"
|
|
line.word 0x06 "FRT1_CIMSZIMS,Compare/Zero-Interrupt Mask Register"
|
|
bitfld.word 0x06 8.--10. " ZIMS ,Zero Detect Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
bitfld.word 0x06 0.--2. " CIMS ,Compare Clear Interrupt Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "FRT1_DMACFG,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " EN_DMA_CCM ,Compare clear match interrupt DMA request" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EN_DMA_ZD ,Zero-detect interrupt DMA request" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "FRT 2"
|
|
base ad:0xb0708800
|
|
width 16.
|
|
if (((d.w(ad:0xb0708808))&0x1)==0x1)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "FRT2_TCDT,Data Register"
|
|
else
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "FRT2_TCDT,Data Register"
|
|
endif
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "FRT2_CPCLRB,Compare Clear Buffer Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "FRT2_CPCLR,Compare Clear Register"
|
|
group.word 0x06++0x07
|
|
line.word 0x00 "FRT2_TCCS,Control Status Register"
|
|
bitfld.word 0x00 10. " ZFCLR ,IRQZF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 9. " IVFCLR ,IVF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " CLR ,Clear Timer" "No effect,Clear"
|
|
rbitfld.word 0x00 7. " IVF ,Interrupt Request Flag bit for Compare Clear" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 6. " IVFE ,Interrupt Enable bit for Compare Clear or Overflow" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MODE ,Set Reset Condition of Timer" "Reset or clear bit,Reset/clear bit or compare"
|
|
line.word 0x02 "FRT2_TSTPTCLK,Timer Stop/Timer Clock Configuration Register"
|
|
bitfld.word 0x02 15. " ECKE ,External Clock Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " FSEL ,Frequency Selection" "Div by 2,No division"
|
|
bitfld.word 0x02 8.--11. " CLK ,Clock Multiplier Selection" "1,1/2,1/4,1/8,1/16,1/32,1/64,1/128,1/256,1/512,1/1024,..."
|
|
bitfld.word 0x02 0. " STOP ,Stop Timer" "Running,Stopped"
|
|
line.word 0x04 "FRT2_ETCCS,Extended Control Status Register"
|
|
hexmask.word.byte 0x04 12.--14. 1. " CIMC ,Compare Clear Mask Counter Read"
|
|
hexmask.word.byte 0x04 8.--10. 1. " ZIMC ,Zero Detect Mask Counter Read"
|
|
bitfld.word 0x04 6. " DBGE ,Debug mode Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 5. " CNTDIR ,Count Direction" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x04 4. " ICUR ,FRT Counter Reset by ICU Enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " BFE ,Compare Clear Buffer Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 2. " IRQZF ,Interrupt Request Flag for Zero Detect" "Not requested,Requested"
|
|
bitfld.word 0x04 1. " IRQZE ,Zero Detect Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 0. " CNTMD ,Count Mode of FRT" "Up,Up/Down"
|
|
line.word 0x06 "FRT2_CIMSZIMS,Compare/Zero-Interrupt Mask Register"
|
|
bitfld.word 0x06 8.--10. " ZIMS ,Zero Detect Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
bitfld.word 0x06 0.--2. " CIMS ,Compare Clear Interrupt Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "FRT2_DMACFG,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " EN_DMA_CCM ,Compare clear match interrupt DMA request" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EN_DMA_ZD ,Zero-detect interrupt DMA request" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "FRT 3"
|
|
base ad:0xb0708c00
|
|
width 16.
|
|
if (((d.w(ad:0xb0708c08))&0x1)==0x1)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "FRT3_TCDT,Data Register"
|
|
else
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "FRT3_TCDT,Data Register"
|
|
endif
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "FRT3_CPCLRB,Compare Clear Buffer Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "FRT3_CPCLR,Compare Clear Register"
|
|
group.word 0x06++0x07
|
|
line.word 0x00 "FRT3_TCCS,Control Status Register"
|
|
bitfld.word 0x00 10. " ZFCLR ,IRQZF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 9. " IVFCLR ,IVF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " CLR ,Clear Timer" "No effect,Clear"
|
|
rbitfld.word 0x00 7. " IVF ,Interrupt Request Flag bit for Compare Clear" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 6. " IVFE ,Interrupt Enable bit for Compare Clear or Overflow" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MODE ,Set Reset Condition of Timer" "Reset or clear bit,Reset/clear bit or compare"
|
|
line.word 0x02 "FRT3_TSTPTCLK,Timer Stop/Timer Clock Configuration Register"
|
|
bitfld.word 0x02 15. " ECKE ,External Clock Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " FSEL ,Frequency Selection" "Div by 2,No division"
|
|
bitfld.word 0x02 8.--11. " CLK ,Clock Multiplier Selection" "1,1/2,1/4,1/8,1/16,1/32,1/64,1/128,1/256,1/512,1/1024,..."
|
|
bitfld.word 0x02 0. " STOP ,Stop Timer" "Running,Stopped"
|
|
line.word 0x04 "FRT3_ETCCS,Extended Control Status Register"
|
|
hexmask.word.byte 0x04 12.--14. 1. " CIMC ,Compare Clear Mask Counter Read"
|
|
hexmask.word.byte 0x04 8.--10. 1. " ZIMC ,Zero Detect Mask Counter Read"
|
|
bitfld.word 0x04 6. " DBGE ,Debug mode Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 5. " CNTDIR ,Count Direction" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x04 4. " ICUR ,FRT Counter Reset by ICU Enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " BFE ,Compare Clear Buffer Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 2. " IRQZF ,Interrupt Request Flag for Zero Detect" "Not requested,Requested"
|
|
bitfld.word 0x04 1. " IRQZE ,Zero Detect Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 0. " CNTMD ,Count Mode of FRT" "Up,Up/Down"
|
|
line.word 0x06 "FRT3_CIMSZIMS,Compare/Zero-Interrupt Mask Register"
|
|
bitfld.word 0x06 8.--10. " ZIMS ,Zero Detect Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
bitfld.word 0x06 0.--2. " CIMS ,Compare Clear Interrupt Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "FRT3_DMACFG,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " EN_DMA_CCM ,Compare clear match interrupt DMA request" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EN_DMA_ZD ,Zero-detect interrupt DMA request" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "FRT 16"
|
|
base ad:0xb0818000
|
|
width 16.
|
|
if (((d.w(ad:0xb0818008))&0x1)==0x1)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "FRT16_TCDT,Data Register"
|
|
else
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "FRT16_TCDT,Data Register"
|
|
endif
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "FRT16_CPCLRB,Compare Clear Buffer Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "FRT16_CPCLR,Compare Clear Register"
|
|
group.word 0x06++0x07
|
|
line.word 0x00 "FRT16_TCCS,Control Status Register"
|
|
bitfld.word 0x00 10. " ZFCLR ,IRQZF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 9. " IVFCLR ,IVF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " CLR ,Clear Timer" "No effect,Clear"
|
|
rbitfld.word 0x00 7. " IVF ,Interrupt Request Flag bit for Compare Clear" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 6. " IVFE ,Interrupt Enable bit for Compare Clear or Overflow" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MODE ,Set Reset Condition of Timer" "Reset or clear bit,Reset/clear bit or compare"
|
|
line.word 0x02 "FRT16_TSTPTCLK,Timer Stop/Timer Clock Configuration Register"
|
|
bitfld.word 0x02 15. " ECKE ,External Clock Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " FSEL ,Frequency Selection" "Div by 2,No division"
|
|
bitfld.word 0x02 8.--11. " CLK ,Clock Multiplier Selection" "1,1/2,1/4,1/8,1/16,1/32,1/64,1/128,1/256,1/512,1/1024,..."
|
|
bitfld.word 0x02 0. " STOP ,Stop Timer" "Running,Stopped"
|
|
line.word 0x04 "FRT16_ETCCS,Extended Control Status Register"
|
|
hexmask.word.byte 0x04 12.--14. 1. " CIMC ,Compare Clear Mask Counter Read"
|
|
hexmask.word.byte 0x04 8.--10. 1. " ZIMC ,Zero Detect Mask Counter Read"
|
|
bitfld.word 0x04 6. " DBGE ,Debug mode Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 5. " CNTDIR ,Count Direction" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x04 4. " ICUR ,FRT Counter Reset by ICU Enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " BFE ,Compare Clear Buffer Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 2. " IRQZF ,Interrupt Request Flag for Zero Detect" "Not requested,Requested"
|
|
bitfld.word 0x04 1. " IRQZE ,Zero Detect Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 0. " CNTMD ,Count Mode of FRT" "Up,Up/Down"
|
|
line.word 0x06 "FRT16_CIMSZIMS,Compare/Zero-Interrupt Mask Register"
|
|
bitfld.word 0x06 8.--10. " ZIMS ,Zero Detect Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
bitfld.word 0x06 0.--2. " CIMS ,Compare Clear Interrupt Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "FRT16_DMACFG,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " EN_DMA_CCM ,Compare clear match interrupt DMA request" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EN_DMA_ZD ,Zero-detect interrupt DMA request" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "FRT 17"
|
|
base ad:0xb0818400
|
|
width 16.
|
|
if (((d.w(ad:0xb0818408))&0x1)==0x1)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "FRT17_TCDT,Data Register"
|
|
else
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "FRT17_TCDT,Data Register"
|
|
endif
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "FRT17_CPCLRB,Compare Clear Buffer Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "FRT17_CPCLR,Compare Clear Register"
|
|
group.word 0x06++0x07
|
|
line.word 0x00 "FRT17_TCCS,Control Status Register"
|
|
bitfld.word 0x00 10. " ZFCLR ,IRQZF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 9. " IVFCLR ,IVF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " CLR ,Clear Timer" "No effect,Clear"
|
|
rbitfld.word 0x00 7. " IVF ,Interrupt Request Flag bit for Compare Clear" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 6. " IVFE ,Interrupt Enable bit for Compare Clear or Overflow" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MODE ,Set Reset Condition of Timer" "Reset or clear bit,Reset/clear bit or compare"
|
|
line.word 0x02 "FRT17_TSTPTCLK,Timer Stop/Timer Clock Configuration Register"
|
|
bitfld.word 0x02 15. " ECKE ,External Clock Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " FSEL ,Frequency Selection" "Div by 2,No division"
|
|
bitfld.word 0x02 8.--11. " CLK ,Clock Multiplier Selection" "1,1/2,1/4,1/8,1/16,1/32,1/64,1/128,1/256,1/512,1/1024,..."
|
|
bitfld.word 0x02 0. " STOP ,Stop Timer" "Running,Stopped"
|
|
line.word 0x04 "FRT17_ETCCS,Extended Control Status Register"
|
|
hexmask.word.byte 0x04 12.--14. 1. " CIMC ,Compare Clear Mask Counter Read"
|
|
hexmask.word.byte 0x04 8.--10. 1. " ZIMC ,Zero Detect Mask Counter Read"
|
|
bitfld.word 0x04 6. " DBGE ,Debug mode Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 5. " CNTDIR ,Count Direction" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x04 4. " ICUR ,FRT Counter Reset by ICU Enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " BFE ,Compare Clear Buffer Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 2. " IRQZF ,Interrupt Request Flag for Zero Detect" "Not requested,Requested"
|
|
bitfld.word 0x04 1. " IRQZE ,Zero Detect Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 0. " CNTMD ,Count Mode of FRT" "Up,Up/Down"
|
|
line.word 0x06 "FRT17_CIMSZIMS,Compare/Zero-Interrupt Mask Register"
|
|
bitfld.word 0x06 8.--10. " ZIMS ,Zero Detect Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
bitfld.word 0x06 0.--2. " CIMS ,Compare Clear Interrupt Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "FRT17_DMACFG,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " EN_DMA_CCM ,Compare clear match interrupt DMA request" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EN_DMA_ZD ,Zero-detect interrupt DMA request" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "FRT 18"
|
|
base ad:0xb0818800
|
|
width 16.
|
|
if (((d.w(ad:0xb0818808))&0x1)==0x1)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "FRT18_TCDT,Data Register"
|
|
else
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "FRT18_TCDT,Data Register"
|
|
endif
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "FRT18_CPCLRB,Compare Clear Buffer Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "FRT18_CPCLR,Compare Clear Register"
|
|
group.word 0x06++0x07
|
|
line.word 0x00 "FRT18_TCCS,Control Status Register"
|
|
bitfld.word 0x00 10. " ZFCLR ,IRQZF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 9. " IVFCLR ,IVF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " CLR ,Clear Timer" "No effect,Clear"
|
|
rbitfld.word 0x00 7. " IVF ,Interrupt Request Flag bit for Compare Clear" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 6. " IVFE ,Interrupt Enable bit for Compare Clear or Overflow" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MODE ,Set Reset Condition of Timer" "Reset or clear bit,Reset/clear bit or compare"
|
|
line.word 0x02 "FRT18_TSTPTCLK,Timer Stop/Timer Clock Configuration Register"
|
|
bitfld.word 0x02 15. " ECKE ,External Clock Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " FSEL ,Frequency Selection" "Div by 2,No division"
|
|
bitfld.word 0x02 8.--11. " CLK ,Clock Multiplier Selection" "1,1/2,1/4,1/8,1/16,1/32,1/64,1/128,1/256,1/512,1/1024,..."
|
|
bitfld.word 0x02 0. " STOP ,Stop Timer" "Running,Stopped"
|
|
line.word 0x04 "FRT18_ETCCS,Extended Control Status Register"
|
|
hexmask.word.byte 0x04 12.--14. 1. " CIMC ,Compare Clear Mask Counter Read"
|
|
hexmask.word.byte 0x04 8.--10. 1. " ZIMC ,Zero Detect Mask Counter Read"
|
|
bitfld.word 0x04 6. " DBGE ,Debug mode Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 5. " CNTDIR ,Count Direction" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x04 4. " ICUR ,FRT Counter Reset by ICU Enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " BFE ,Compare Clear Buffer Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 2. " IRQZF ,Interrupt Request Flag for Zero Detect" "Not requested,Requested"
|
|
bitfld.word 0x04 1. " IRQZE ,Zero Detect Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 0. " CNTMD ,Count Mode of FRT" "Up,Up/Down"
|
|
line.word 0x06 "FRT18_CIMSZIMS,Compare/Zero-Interrupt Mask Register"
|
|
bitfld.word 0x06 8.--10. " ZIMS ,Zero Detect Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
bitfld.word 0x06 0.--2. " CIMS ,Compare Clear Interrupt Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "FRT18_DMACFG,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " EN_DMA_CCM ,Compare clear match interrupt DMA request" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EN_DMA_ZD ,Zero-detect interrupt DMA request" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "FRT 19"
|
|
base ad:0xb0818c00
|
|
width 16.
|
|
if (((d.w(ad:0xb0818c08))&0x1)==0x1)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "FRT19_TCDT,Data Register"
|
|
else
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "FRT19_TCDT,Data Register"
|
|
endif
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "FRT19_CPCLRB,Compare Clear Buffer Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "FRT19_CPCLR,Compare Clear Register"
|
|
group.word 0x06++0x07
|
|
line.word 0x00 "FRT19_TCCS,Control Status Register"
|
|
bitfld.word 0x00 10. " ZFCLR ,IRQZF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 9. " IVFCLR ,IVF Interrupt Clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " CLR ,Clear Timer" "No effect,Clear"
|
|
rbitfld.word 0x00 7. " IVF ,Interrupt Request Flag bit for Compare Clear" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 6. " IVFE ,Interrupt Enable bit for Compare Clear or Overflow" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MODE ,Set Reset Condition of Timer" "Reset or clear bit,Reset/clear bit or compare"
|
|
line.word 0x02 "FRT19_TSTPTCLK,Timer Stop/Timer Clock Configuration Register"
|
|
bitfld.word 0x02 15. " ECKE ,External Clock Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " FSEL ,Frequency Selection" "Div by 2,No division"
|
|
bitfld.word 0x02 8.--11. " CLK ,Clock Multiplier Selection" "1,1/2,1/4,1/8,1/16,1/32,1/64,1/128,1/256,1/512,1/1024,..."
|
|
bitfld.word 0x02 0. " STOP ,Stop Timer" "Running,Stopped"
|
|
line.word 0x04 "FRT19_ETCCS,Extended Control Status Register"
|
|
hexmask.word.byte 0x04 12.--14. 1. " CIMC ,Compare Clear Mask Counter Read"
|
|
hexmask.word.byte 0x04 8.--10. 1. " ZIMC ,Zero Detect Mask Counter Read"
|
|
bitfld.word 0x04 6. " DBGE ,Debug mode Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 5. " CNTDIR ,Count Direction" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x04 4. " ICUR ,FRT Counter Reset by ICU Enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " BFE ,Compare Clear Buffer Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x04 2. " IRQZF ,Interrupt Request Flag for Zero Detect" "Not requested,Requested"
|
|
bitfld.word 0x04 1. " IRQZE ,Zero Detect Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 0. " CNTMD ,Count Mode of FRT" "Up,Up/Down"
|
|
line.word 0x06 "FRT19_CIMSZIMS,Compare/Zero-Interrupt Mask Register"
|
|
bitfld.word 0x06 8.--10. " ZIMS ,Zero Detect Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
bitfld.word 0x06 0.--2. " CIMS ,Compare Clear Interrupt Mask Select" "Not masked,Masked,Masked,Masked,Masked,Masked,Masked,Masked"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "FRT19_DMACFG,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " EN_DMA_CCM ,Compare clear match interrupt DMA request" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EN_DMA_ZD ,Zero-detect interrupt DMA request" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "Output Compare Units"
|
|
tree "OCU 0"
|
|
base ad:0xb0718000
|
|
width 16.
|
|
textline " "
|
|
rgroup.word 0x00++0x03
|
|
line.word 0x00 "OCU0_OCCP0,Output Compare Register 0"
|
|
line.word 0x02 "OCU0_OCCP1,Output Compare Register 1"
|
|
wgroup.word 0x04++0x03
|
|
line.word 0x00 "OCU0_OCCPB0,Output Compare Buffer Register 0"
|
|
line.word 0x02 "OCU0_OCCPB1,Output Compare Buffer Register 1"
|
|
group.word 0x08++0x03
|
|
line.word 0x00 "OCU0_OCCPBD0,Output Compare Down Buffer Register 0"
|
|
line.word 0x02 "OCU0_OCCPBD1,Output Compare Down Buffer Register 1"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "OCU0_OCS01,Control Register"
|
|
bitfld.word 0x00 12. 15. " CMOD[1:0] ,Define Comparison Mode" "0,1,2,3"
|
|
setclrfld.word 0x00 9. 0x04 9. 0x02 9. " OTD1_set/clr ,Output Pin Level Select for Channel 1" "Low,High"
|
|
setclrfld.word 0x00 8. 0x04 8. 0x02 8. " OTD0_set/clr ,Output Pin Level Select for Channel 0" "Low,High"
|
|
setclrfld.word 0x00 5. 0x04 5. 0x02 5. " ICE1_set/clr ,Compare Interrupt Enable for Channel 1" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.word 0x00 4. 0x04 4. 0x02 4. " ICE0_set/clr ,Compare Interrupt Enable for Channel 0" "Disabled,Enabled"
|
|
setclrfld.word 0x00 1. 0x04 1. 0x02 1. " CST1_set/clr ,Comparison with Timer for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 0. 0x04 0. 0x02 0. " CST0_set/clr ,Comparison with Timer for Channel 0" "Disabled,Enabled"
|
|
rgroup.byte 0x12++0x00
|
|
line.byte 0x00 "OCU0_OSR01,Status Register"
|
|
bitfld.byte 0x00 1. " ICP1 ,Compare Match Status for Channel 1" "Not matched,Matched"
|
|
bitfld.byte 0x00 0. " ICP0 ,Compare Match Status for Channel 0" "Not matched,Matched"
|
|
wgroup.byte 0x14++0x00
|
|
line.byte 0x00 "OCU0_OSCR01,Status Clear Register"
|
|
bitfld.byte 0x00 1. " ICPC1 ,Compare Match Status Clear for Channel 1" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " ICPC0 ,Compare Match Status Clear for Channel 0" "No effect,Clear"
|
|
if (((d.w(ad:0xb0708000+0x0a))&0x1)==0x1)
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "OCU0_EOCS01,Extended Output Compare Control Status Register"
|
|
setclrfld.word 0x00 13. 0x03 5. 0x05 5. " OFD1_set/clr ,Output Fixed Data for Channel 1" "Low,High"
|
|
setclrfld.word 0x00 12. 0x03 4. 0x05 4. " OFM1_set/clr ,Output Fixed Mode for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 9. 0x03 1. 0x05 1. " OFD0_set/clr ,Output Fixed Data for Channel 0" "Low,High"
|
|
setclrfld.word 0x00 8. 0x03 0. 0x05 0. " OFM0_set/clr ,Output Fixed Mode for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " BTS[3:2] ,Buffer Transfer Selection bit for OCUn_OCCP1" "No operation,No operation,FRT cleared,"
|
|
bitfld.word 0x00 4. " BUF1 ,Compare Buffer Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.word 0x00 1.--2. " BTS[1:0] ,Buffer Transfer Selection bit for OCUn_OCCP0" "No operation,No operation,FRT cleared,"
|
|
bitfld.word 0x00 0. " BUF0 ,Compare Buffer Enable bit for Channel 0" "Disabled,Enabled"
|
|
else
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "OCU0_EOCS01,Extended Output Compare Control Status Register"
|
|
setclrfld.word 0x00 13. 0x03 5. 0x05 5. " OFD1_set/clr ,Output Fixed Data for Channel 1" "Low,High"
|
|
setclrfld.word 0x00 12. 0x03 4. 0x05 4. " OFM1_set/clr ,Output Fixed Mode for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 9. 0x03 1. 0x05 1. " OFD0_set/clr ,Output Fixed Data for Channel 0" "Low,High"
|
|
setclrfld.word 0x00 8. 0x03 0. 0x05 0. " OFM0_set/clr ,Output Fixed Mode for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " BTS[3:2] ,Buffer Transfer Selection bit for OCUn_OCCP1" "No operation,No operation,,"
|
|
bitfld.word 0x00 4. " BUF1 ,Compare Buffer Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.word 0x00 1.--2. " BTS[1:0] ,Buffer Transfer Selection bit for OCUn_OCCP0" "No operation,No operation,,"
|
|
bitfld.word 0x00 0. " BUF0 ,Compare Buffer Enable bit for Channel 0" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x1d++0x00
|
|
line.byte 0x00 "OCU0_DEBUG01,Debug Configuration Register"
|
|
bitfld.byte 0x00 1. " DBGEN1 ,Enable Debug Mode for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " DBGEN0 ,Enable Debug Mode for Channel 0" "Disabled,Enabled"
|
|
group.byte 0x1c++0x00
|
|
line.byte 0x00 "OCU0_DMACFG01,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " EN_DMA_REQ1 ,Enable DMA Request for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EN_DMA_REQ0 ,Enable DMA Request for Channel 0" "Disabled,Enabled"
|
|
if (((d.w(ad:0xb0708000+0x0c))&0x9000)==0x0&&((d.w(ad:0xb0708000+0x1f))&0x40)==0x40&&((d.w(ad:0xb0708000+0x1f))&0x04)==0x04)
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU0_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
elif (((d.w(ad:0xb0708000+0x0c))&0x9000)==0x0&&((d.w(ad:0xb0708000+0x1f))&0x40)==0x00&&((d.w(ad:0xb0708000+0x1f))&0x04)==0x04)
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU0_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
elif (((d.w(ad:0xb0708000+0x0c))&0x9000)==0x0&&((d.w(ad:0xb0708000+0x1f))&0x40)==0x40&&((d.w(ad:0xb0708000+0x1f))&0x04)==0x00)
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU0_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
else
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU0_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
tree "OCU 1"
|
|
base ad:0xb0718400
|
|
width 16.
|
|
rgroup.word 0x00++0x03
|
|
line.word 0x00 "OCU1_OCCP0,Output Compare Register 0"
|
|
line.word 0x02 "OCU1_OCCP1,Output Compare Register 1"
|
|
wgroup.word 0x04++0x03
|
|
line.word 0x00 "OCU1_OCCPB0,Output Compare Buffer Register 0"
|
|
line.word 0x02 "OCU1_OCCPB1,Output Compare Buffer Register 1"
|
|
group.word 0x08++0x03
|
|
line.word 0x00 "OCU1_OCCPBD0,Output Compare Down Buffer Register 0"
|
|
line.word 0x02 "OCU1_OCCPBD1,Output Compare Down Buffer Register 1"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "OCU1_OCS01,Control Register"
|
|
bitfld.word 0x00 15. " CMOD1 ,Define Comparison Mode" "Low,High"
|
|
bitfld.word 0x00 12. " CMOD0 ,Define Comparison Mode" "Low,High"
|
|
setclrfld.word 0x00 9. 0x04 9. 0x02 9. " OTD1_set/clr ,Output Pin Level Select for Channel 1" "Low,High"
|
|
setclrfld.word 0x00 8. 0x04 8. 0x02 8. " OTD0_set/clr ,Output Pin Level Select for Channel 0" "Low,High"
|
|
textline " "
|
|
setclrfld.word 0x00 5. 0x04 5. 0x02 5. " ICE1_set/clr ,Compare Interrupt Enable for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 4. 0x04 4. 0x02 4. " ICE0_set/clr ,Compare Interrupt Enable for Channel 0" "Disabled,Enabled"
|
|
setclrfld.word 0x00 1. 0x04 1. 0x02 1. " CST1_set/clr ,Comparison with Timer for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 0. 0x04 0. 0x02 0. " CST0_set/clr ,Comparison with Timer for Channel 0" "Disabled,Enabled"
|
|
rgroup.byte 0x12++0x00
|
|
line.byte 0x00 "OCU1_OSR01,Status Register"
|
|
bitfld.byte 0x00 1. " ICP1 ,Compare Match Status for Channel 1" "Not matched,Matched"
|
|
bitfld.byte 0x00 0. " ICP0 ,Compare Match Status for Channel 0" "Not matched,Matched"
|
|
wgroup.byte 0x14++0x00
|
|
line.byte 0x00 "OCU1_OSCR01,Status Clear Register"
|
|
bitfld.byte 0x00 1. " ICPC1 ,Compare Match Status Clear for Channel 1" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " ICPC0 ,Compare Match Status Clear for Channel 0" "No effect,Clear"
|
|
if (((d.w(ad:0xb0708400+0x0a))&0x1)==0x1)
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "OCU1_EOCS01,Extended Output Compare Control Status Register"
|
|
setclrfld.word 0x00 13. 0x03 5. 0x05 5. " OFD1_set/clr ,Output Fixed Data for Channel 1" "Low,High"
|
|
setclrfld.word 0x00 12. 0x03 4. 0x05 4. " OFM1_set/clr ,Output Fixed Mode for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 9. 0x03 1. 0x05 1. " OFD0_set/clr ,Output Fixed Data for Channel 0" "Low,High"
|
|
setclrfld.word 0x00 8. 0x03 0. 0x05 0. " OFM0_set/clr ,Output Fixed Mode for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " BTS[3:2] ,Buffer Transfer Selection bit for OCUn_OCCP1" "No operation,No operation,FRT cleared,"
|
|
bitfld.word 0x00 4. " BUF1 ,Compare Buffer Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.word 0x00 1.--2. " BTS[1:0] ,Buffer Transfer Selection bit for OCUn_OCCP0" "No operation,No operation,FRT cleared,"
|
|
bitfld.word 0x00 0. " BUF0 ,Compare Buffer Enable bit for Channel 0" "Disabled,Enabled"
|
|
else
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "OCU1_EOCS01,Extended Output Compare Control Status Register"
|
|
setclrfld.word 0x00 13. 0x03 5. 0x05 5. " OFD1_set/clr ,Output Fixed Data for Channel 1" "Low,High"
|
|
setclrfld.word 0x00 12. 0x03 4. 0x05 4. " OFM1_set/clr ,Output Fixed Mode for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 9. 0x03 1. 0x05 1. " OFD0_set/clr ,Output Fixed Data for Channel 0" "Low,High"
|
|
setclrfld.word 0x00 8. 0x03 0. 0x05 0. " OFM0_set/clr ,Output Fixed Mode for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " BTS[3:2] ,Buffer Transfer Selection bit for OCUn_OCCP1" "No operation,No operation,,"
|
|
bitfld.word 0x00 4. " BUF1 ,Compare Buffer Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.word 0x00 1.--2. " BTS[1:0] ,Buffer Transfer Selection bit for OCUn_OCCP0" "No operation,No operation,,"
|
|
bitfld.word 0x00 0. " BUF0 ,Compare Buffer Enable bit for Channel 0" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x1d++0x00
|
|
line.byte 0x00 "OCU1_DEBUG01,Debug Configuration Register"
|
|
bitfld.byte 0x00 1. " DBGEN1 ,Enable Debug Mode for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " DBGEN0 ,Enable Debug Mode for Channel 0" "Disabled,Enabled"
|
|
group.byte 0x1c++0x00
|
|
line.byte 0x00 "OCU1_DMACFG01,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " EN_DMA_REQ1 ,Enable DMA Request for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EN_DMA_REQ0 ,Enable DMA Request for Channel 0" "Disabled,Enabled"
|
|
if (((d.w(ad:0xb0708400+0x0c))&0x9000)==0x0&&((d.w(ad:0xb0708400+0x1f))&0x40)==0x40&&((d.w(ad:0xb0708400+0x1f))&0x04)==0x04)
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU1_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
elif (((d.w(ad:0xb0708400+0x0c))&0x9000)==0x0&&((d.w(ad:0xb0708400+0x1f))&0x40)==0x00&&((d.w(ad:0xb0708400+0x1f))&0x04)==0x04)
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU1_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
elif (((d.w(ad:0xb0708400+0x0c))&0x9000)==0x0&&((d.w(ad:0xb0708400+0x1f))&0x40)==0x40&&((d.w(ad:0xb0708400+0x1f))&0x04)==0x00)
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU1_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
else
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU1_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
tree "OCU 16"
|
|
base ad:0xb0828000
|
|
width 16.
|
|
rgroup.word 0x00++0x03
|
|
line.word 0x00 "OCU16_OCCP0,Output Compare Register 0"
|
|
line.word 0x02 "OCU16_OCCP1,Output Compare Register 1"
|
|
wgroup.word 0x04++0x03
|
|
line.word 0x00 "OCU16_OCCPB0,Output Compare Buffer Register 0"
|
|
line.word 0x02 "OCU16_OCCPB1,Output Compare Buffer Register 1"
|
|
group.word 0x08++0x03
|
|
line.word 0x00 "OCU16_OCCPBD0,Output Compare Down Buffer Register 0"
|
|
line.word 0x02 "OCU16_OCCPBD1,Output Compare Down Buffer Register 1"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "OCU16_OCS01,Control Register"
|
|
bitfld.word 0x00 15. " CMOD1 ,Define Comparison Mode" "Low,High"
|
|
bitfld.word 0x00 12. " CMOD0 ,Define Comparison Mode" "Low,High"
|
|
setclrfld.word 0x00 9. 0x04 9. 0x02 9. " OTD1_set/clr ,Output Pin Level Select for Channel 1" "Low,High"
|
|
setclrfld.word 0x00 8. 0x04 8. 0x02 8. " OTD0_set/clr ,Output Pin Level Select for Channel 0" "Low,High"
|
|
textline " "
|
|
setclrfld.word 0x00 5. 0x04 5. 0x02 5. " ICE1_set/clr ,Compare Interrupt Enable for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 4. 0x04 4. 0x02 4. " ICE0_set/clr ,Compare Interrupt Enable for Channel 0" "Disabled,Enabled"
|
|
setclrfld.word 0x00 1. 0x04 1. 0x02 1. " CST1_set/clr ,Comparison with Timer for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 0. 0x04 0. 0x02 0. " CST0_set/clr ,Comparison with Timer for Channel 0" "Disabled,Enabled"
|
|
rgroup.byte 0x12++0x00
|
|
line.byte 0x00 "OCU16_OSR01,Status Register"
|
|
bitfld.byte 0x00 1. " ICP1 ,Compare Match Status for Channel 1" "Not matched,Matched"
|
|
bitfld.byte 0x00 0. " ICP0 ,Compare Match Status for Channel 0" "Not matched,Matched"
|
|
wgroup.byte 0x14++0x00
|
|
line.byte 0x00 "OCU16_OSCR01,Status Clear Register"
|
|
bitfld.byte 0x00 1. " ICPC1 ,Compare Match Status Clear for Channel 1" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " ICPC0 ,Compare Match Status Clear for Channel 0" "No effect,Clear"
|
|
if (((d.w(ad:0xb0818000+0x0a))&0x1)==0x1)
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "OCU16_EOCS01,Extended Output Compare Control Status Register"
|
|
setclrfld.word 0x00 13. 0x03 5. 0x05 5. " OFD1_set/clr ,Output Fixed Data for Channel 1" "Low,High"
|
|
setclrfld.word 0x00 12. 0x03 4. 0x05 4. " OFM1_set/clr ,Output Fixed Mode for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 9. 0x03 1. 0x05 1. " OFD0_set/clr ,Output Fixed Data for Channel 0" "Low,High"
|
|
setclrfld.word 0x00 8. 0x03 0. 0x05 0. " OFM0_set/clr ,Output Fixed Mode for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " BTS[3:2] ,Buffer Transfer Selection bit for OCUn_OCCP1" "No operation,No operation,FRT cleared,"
|
|
bitfld.word 0x00 4. " BUF1 ,Compare Buffer Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.word 0x00 1.--2. " BTS[1:0] ,Buffer Transfer Selection bit for OCUn_OCCP0" "No operation,No operation,FRT cleared,"
|
|
bitfld.word 0x00 0. " BUF0 ,Compare Buffer Enable bit for Channel 0" "Disabled,Enabled"
|
|
else
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "OCU16_EOCS01,Extended Output Compare Control Status Register"
|
|
setclrfld.word 0x00 13. 0x02 5. 0x04 5. " OFD1_set/clr ,Output Fixed Data for Channel 1" "Low,High"
|
|
setclrfld.word 0x00 12. 0x02 4. 0x04 4. " OFM1_set/clr ,Output Fixed Mode for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 9. 0x02 1. 0x04 1. " OFD0_set/clr ,Output Fixed Data for Channel 0" "Low,High"
|
|
setclrfld.word 0x00 8. 0x02 0. 0x04 0. " OFM0_set/clr ,Output Fixed Mode for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " BTS[3:2] ,Buffer Transfer Selection bit for OCUn_OCCP1" "No operation,No operation,,"
|
|
bitfld.word 0x00 4. " BUF1 ,Compare Buffer Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.word 0x00 1.--2. " BTS[1:0] ,Buffer Transfer Selection bit for OCUn_OCCP0" "No operation,No operation,,"
|
|
bitfld.word 0x00 0. " BUF0 ,Compare Buffer Enable bit for Channel 0" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x1d++0x00
|
|
line.byte 0x00 "OCU16_DEBUG01,Debug Configuration Register"
|
|
bitfld.byte 0x00 1. " DBGEN1 ,Enable Debug Mode for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " DBGEN0 ,Enable Debug Mode for Channel 0" "Disabled,Enabled"
|
|
group.byte 0x1c++0x00
|
|
line.byte 0x00 "OCU16_DMACFG01,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " EN_DMA_REQ1 ,Enable DMA Request for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EN_DMA_REQ0 ,Enable DMA Request for Channel 0" "Disabled,Enabled"
|
|
if (((d.w(ad:0xb0818000+0x0c))&0x9000)==0x0&&((d.w(ad:0xb0818000+0x1f))&0x40)==0x40&&((d.w(ad:0xb0818000+0x1f))&0x04)==0x04)
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU16_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
elif (((d.w(ad:0xb0818000+0x0c))&0x9000)==0x0&&((d.w(ad:0xb0818000+0x1f))&0x40)==0x00&&((d.w(ad:0xb0818000+0x1f))&0x04)==0x04)
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU16_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
elif (((d.w(ad:0xb0818000+0x0c))&0x9000)==0x0&&((d.w(ad:0xb0818000+0x1f))&0x40)==0x40&&((d.w(ad:0xb0818000+0x1f))&0x04)==0x00)
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU16_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
else
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU16_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
tree "OCU 17"
|
|
base ad:0xb0828400
|
|
width 16.
|
|
rgroup.word 0x00++0x03
|
|
line.word 0x00 "OCU17_OCCP0,Output Compare Register 0"
|
|
line.word 0x02 "OCU17_OCCP1,Output Compare Register 1"
|
|
wgroup.word 0x04++0x03
|
|
line.word 0x00 "OCU17_OCCPB0,Output Compare Buffer Register 0"
|
|
line.word 0x02 "OCU17_OCCPB1,Output Compare Buffer Register 1"
|
|
group.word 0x08++0x03
|
|
line.word 0x00 "OCU17_OCCPBD0,Output Compare Down Buffer Register 0"
|
|
line.word 0x02 "OCU17_OCCPBD1,Output Compare Down Buffer Register 1"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "OCU17_OCS01,Control Register"
|
|
bitfld.word 0x00 15. " CMOD1 ,Define Comparison Mode" "Low,High"
|
|
bitfld.word 0x00 12. " CMOD0 ,Define Comparison Mode" "Low,High"
|
|
setclrfld.word 0x00 9. 0x04 9. 0x02 9. " OTD1_set/clr ,Output Pin Level Select for Channel 1" "Low,High"
|
|
setclrfld.word 0x00 8. 0x04 8. 0x02 8. " OTD0_set/clr ,Output Pin Level Select for Channel 0" "Low,High"
|
|
textline " "
|
|
setclrfld.word 0x00 5. 0x04 5. 0x02 5. " ICE1_set/clr ,Compare Interrupt Enable for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 4. 0x04 4. 0x02 4. " ICE0_set/clr ,Compare Interrupt Enable for Channel 0" "Disabled,Enabled"
|
|
setclrfld.word 0x00 1. 0x04 1. 0x02 1. " CST1_set/clr ,Comparison with Timer for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 0. 0x04 0. 0x02 0. " CST0_set/clr ,Comparison with Timer for Channel 0" "Disabled,Enabled"
|
|
rgroup.byte 0x12++0x00
|
|
line.byte 0x00 "OCU17_OSR01,Status Register"
|
|
bitfld.byte 0x00 1. " ICP1 ,Compare Match Status for Channel 1" "Not matched,Matched"
|
|
bitfld.byte 0x00 0. " ICP0 ,Compare Match Status for Channel 0" "Not matched,Matched"
|
|
wgroup.byte 0x14++0x00
|
|
line.byte 0x00 "OCU17_OSCR01,Status Clear Register"
|
|
bitfld.byte 0x00 1. " ICPC1 ,Compare Match Status Clear for Channel 1" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " ICPC0 ,Compare Match Status Clear for Channel 0" "No effect,Clear"
|
|
if (((d.w(ad:0xb0818400+0x0a))&0x1)==0x1)
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "OCU17_EOCS01,Extended Output Compare Control Status Register"
|
|
setclrfld.word 0x00 13. 0x03 5. 0x05 5. " OFD1_set/clr ,Output Fixed Data for Channel 1" "Low,High"
|
|
setclrfld.word 0x00 12. 0x03 4. 0x05 4. " OFM1_set/clr ,Output Fixed Mode for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 9. 0x03 1. 0x05 1. " OFD0_set/clr ,Output Fixed Data for Channel 0" "Low,High"
|
|
setclrfld.word 0x00 8. 0x03 0. 0x05 0. " OFM0_set/clr ,Output Fixed Mode for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " BTS[3:2] ,Buffer Transfer Selection bit for OCUn_OCCP1" "No operation,No operation,FRT cleared,"
|
|
bitfld.word 0x00 4. " BUF1 ,Compare Buffer Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.word 0x00 1.--2. " BTS[1:0] ,Buffer Transfer Selection bit for OCUn_OCCP0" "No operation,No operation,FRT cleared,"
|
|
bitfld.word 0x00 0. " BUF0 ,Compare Buffer Enable bit for Channel 0" "Disabled,Enabled"
|
|
else
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "OCU17_EOCS01,Extended Output Compare Control Status Register"
|
|
setclrfld.word 0x00 13. 0x02 5. 0x04 5. " OFD1_set/clr ,Output Fixed Data for Channel 1" "Low,High"
|
|
setclrfld.word 0x00 12. 0x02 4. 0x04 4. " OFM1_set/clr ,Output Fixed Mode for Channel 1" "Disabled,Enabled"
|
|
setclrfld.word 0x00 9. 0x02 1. 0x04 1. " OFD0_set/clr ,Output Fixed Data for Channel 0" "Low,High"
|
|
setclrfld.word 0x00 8. 0x02 0. 0x04 0. " OFM0_set/clr ,Output Fixed Mode for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " BTS[3:2] ,Buffer Transfer Selection bit for OCUn_OCCP1" "No operation,No operation,,"
|
|
bitfld.word 0x00 4. " BUF1 ,Compare Buffer Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.word 0x00 1.--2. " BTS[1:0] ,Buffer Transfer Selection bit for OCUn_OCCP0" "No operation,No operation,,"
|
|
bitfld.word 0x00 0. " BUF0 ,Compare Buffer Enable bit for Channel 0" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x1d++0x00
|
|
line.byte 0x00 "OCU17_DEBUG01,Debug Configuration Register"
|
|
bitfld.byte 0x00 1. " DBGEN1 ,Enable Debug Mode for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " DBGEN0 ,Enable Debug Mode for Channel 0" "Disabled,Enabled"
|
|
group.byte 0x1c++0x00
|
|
line.byte 0x00 "OCU17_DMACFG01,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " EN_DMA_REQ1 ,Enable DMA Request for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EN_DMA_REQ0 ,Enable DMA Request for Channel 0" "Disabled,Enabled"
|
|
if (((d.w(ad:0xb0818400+0x0c))&0x9000)==0x0&&((d.w(ad:0xb0818400+0x1f))&0x40)==0x40&&((d.w(ad:0xb0818400+0x1f))&0x04)==0x04)
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU17_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
elif (((d.w(ad:0xb0818400+0x0c))&0x9000)==0x0&&((d.w(ad:0xb0818400+0x1f))&0x40)==0x00&&((d.w(ad:0xb0818400+0x1f))&0x04)==0x04)
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU17_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
elif (((d.w(ad:0xb0818400+0x0c))&0x9000)==0x0&&((d.w(ad:0xb0818400+0x1f))&0x40)==0x40&&((d.w(ad:0xb0818400+0x1f))&0x04)==0x00)
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU17_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
else
|
|
group.byte 0x1f++0x00
|
|
line.byte 0x00 "OCU17_OCMCR01,Compare Mode Control Register"
|
|
bitfld.byte 0x00 6. " FDEN1 ,Full Duty Range Enable bit for Channel 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INV1 ,Invert bit for Output of Channel 1" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 4. " CMPMD1 ,Compare Match Output Setting bit for Channel 1" "Low,High"
|
|
bitfld.byte 0x00 2. " FDEN0 ,Full Duty Range Enable bit for Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " INV0 ,Invert bit for Output of Channel 0" "Not inverted,Inverted"
|
|
rbitfld.byte 0x00 0. " CMPMD0 ,Compare Match Output Setting bit for Channel 0" "Low,High"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "Input Capture Unit"
|
|
tree "ICU 2"
|
|
base ad:0xb0710800
|
|
width 16.
|
|
textline " "
|
|
rgroup.word 0x00++0x03
|
|
line.word 0x00 "ICU2_IPC0,Input Capture Data Register 0"
|
|
line.word 0x02 "ICU2_IPC1,Input Capture Data Register 1"
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "ICU2_ICEICS01,Input Capture Edge Register and Control Status Register"
|
|
bitfld.word 0x00 15. " IDSE1 ,ICU Edge Detection Indication Signal Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " IDSE0 ,ICU Edge Detection Indication Signal Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 11. -0x02 11. -0x02 3. " NFE1_set/clr ,Noise Filter Enable" "Bypassed,Enabled"
|
|
setclrfld.word 0x00 10. -0x02 10. -0x02 2. " NFE0_set/clr ,Noise Filter Enable" "Bypassed,Enabled"
|
|
bitfld.word 0x00 9. " IEI1 ,Valid Edge Indication bit for ICU channel 1" "Falling,Rising"
|
|
bitfld.word 0x00 8. " IEI0 ,Valid Edge Indication bit for ICU channel 0" "Falling,Rising"
|
|
setclrfld.word 0x00 7. 0x00 7. -0x02 7. " ICP1_set/clr ,Interrupt Request Flag for channel 1" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.word 0x00 6. 0x00 6. -0x02 6. " ICP0_set/clr ,Interrupt Request Flag for channel 0" "Not requested,Requested"
|
|
setclrfld.word 0x00 5. -0x02 13. -0x02 5. " ICE1_set/clr ,Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 4. -0x02 12. -0x02 4. " ICE0_set/clr ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--3. " EG1 ,ICU Edge Selection" "Disabled,Rising,Falling,Both"
|
|
bitfld.word 0x00 0.--1. " EG0 ,ICU Edge Selection" "Disabled,Rising,Falling,Both"
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "ICU2_DMACFG01,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " ENDMAREQ1 ,Enable DMA Request (ICU channel 1)" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " ENDMAREQ0 ,Enable DMA Request (ICU channel 0)" "Disabled,Enabled"
|
|
line.byte 0x01 "ICU2_DEBUG01,Debug Register"
|
|
bitfld.byte 0x01 1. " DBGEN1 ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " DBGEN0 ,Debug Enable" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "ICU 3"
|
|
base ad:0xb0710c00
|
|
width 16.
|
|
textline " "
|
|
rgroup.word 0x00++0x03
|
|
line.word 0x00 "ICU3_IPC0,Input Capture Data Register 0"
|
|
line.word 0x02 "ICU3_IPC1,Input Capture Data Register 1"
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "ICU3_ICEICS01,Input Capture Edge Register and Control Status Register"
|
|
bitfld.word 0x00 15. " IDSE1 ,ICU Edge Detection Indication Signal Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " IDSE0 ,ICU Edge Detection Indication Signal Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 11. -0x02 11. -0x02 3. " NFE1_set/clr ,Noise Filter Enable" "Bypassed,Enabled"
|
|
setclrfld.word 0x00 10. -0x02 10. -0x02 2. " NFE0_set/clr ,Noise Filter Enable" "Bypassed,Enabled"
|
|
bitfld.word 0x00 9. " IEI1 ,Valid Edge Indication bit for ICU channel 1" "Falling,Rising"
|
|
bitfld.word 0x00 8. " IEI0 ,Valid Edge Indication bit for ICU channel 0" "Falling,Rising"
|
|
setclrfld.word 0x00 7. 0x00 7. -0x02 7. " ICP1_set/clr ,Interrupt Request Flag for channel 1" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.word 0x00 6. 0x00 6. -0x02 6. " ICP0_set/clr ,Interrupt Request Flag for channel 0" "Not requested,Requested"
|
|
setclrfld.word 0x00 5. -0x02 13. -0x02 5. " ICE1_set/clr ,Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 4. -0x02 12. -0x02 4. " ICE0_set/clr ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--3. " EG1 ,ICU Edge Selection" "Disabled,Rising,Falling,Both"
|
|
bitfld.word 0x00 0.--1. " EG0 ,ICU Edge Selection" "Disabled,Rising,Falling,Both"
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "ICU3_DMACFG01,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " ENDMAREQ1 ,Enable DMA Request (ICU channel 1)" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " ENDMAREQ0 ,Enable DMA Request (ICU channel 0)" "Disabled,Enabled"
|
|
line.byte 0x01 "ICU3_DEBUG01,Debug Register"
|
|
bitfld.byte 0x01 1. " DBGEN1 ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " DBGEN0 ,Debug Enable" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "ICU 18"
|
|
base ad:0xb0820800
|
|
width 16.
|
|
textline " "
|
|
rgroup.word 0x00++0x03
|
|
line.word 0x00 "ICU18_IPC0,Input Capture Data Register 0"
|
|
line.word 0x02 "ICU18_IPC1,Input Capture Data Register 1"
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "ICU18_ICEICS01,Input Capture Edge Register and Control Status Register"
|
|
bitfld.word 0x00 15. " IDSE1 ,ICU Edge Detection Indication Signal Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " IDSE0 ,ICU Edge Detection Indication Signal Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 11. -0x02 11. -0x02 3. " NFE1_set/clr ,Noise Filter Enable" "Bypassed,Enabled"
|
|
setclrfld.word 0x00 10. -0x02 10. -0x02 2. " NFE0_set/clr ,Noise Filter Enable" "Bypassed,Enabled"
|
|
bitfld.word 0x00 9. " IEI1 ,Valid Edge Indication bit for ICU channel 1" "Falling,Rising"
|
|
bitfld.word 0x00 8. " IEI0 ,Valid Edge Indication bit for ICU channel 0" "Falling,Rising"
|
|
setclrfld.word 0x00 7. 0x00 7. -0x02 7. " ICP1_set/clr ,Interrupt Request Flag for channel 1" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.word 0x00 6. 0x00 6. -0x02 6. " ICP0_set/clr ,Interrupt Request Flag for channel 0" "Not requested,Requested"
|
|
setclrfld.word 0x00 5. -0x02 13. -0x02 5. " ICE1_set/clr ,Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 4. -0x02 12. -0x02 4. " ICE0_set/clr ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--3. " EG1 ,ICU Edge Selection" "Disabled,Rising,Falling,Both"
|
|
bitfld.word 0x00 0.--1. " EG0 ,ICU Edge Selection" "Disabled,Rising,Falling,Both"
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "ICU18_DMACFG01,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " ENDMAREQ1 ,Enable DMA Request (ICU channel 1)" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " ENDMAREQ0 ,Enable DMA Request (ICU channel 0)" "Disabled,Enabled"
|
|
line.byte 0x01 "ICU18_DEBUG01,Debug Register"
|
|
bitfld.byte 0x01 1. " DBGEN1 ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " DBGEN0 ,Debug Enable" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "ICU 19"
|
|
base ad:0xb0820C00
|
|
width 16.
|
|
textline " "
|
|
rgroup.word 0x00++0x03
|
|
line.word 0x00 "ICU19_IPC0,Input Capture Data Register 0"
|
|
line.word 0x02 "ICU19_IPC1,Input Capture Data Register 1"
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "ICU19_ICEICS01,Input Capture Edge Register and Control Status Register"
|
|
bitfld.word 0x00 15. " IDSE1 ,ICU Edge Detection Indication Signal Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " IDSE0 ,ICU Edge Detection Indication Signal Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 11. -0x02 11. -0x02 3. " NFE1_set/clr ,Noise Filter Enable" "Bypassed,Enabled"
|
|
setclrfld.word 0x00 10. -0x02 10. -0x02 2. " NFE0_set/clr ,Noise Filter Enable" "Bypassed,Enabled"
|
|
bitfld.word 0x00 9. " IEI1 ,Valid Edge Indication bit for ICU channel 1" "Falling,Rising"
|
|
bitfld.word 0x00 8. " IEI0 ,Valid Edge Indication bit for ICU channel 0" "Falling,Rising"
|
|
setclrfld.word 0x00 7. 0x00 7. -0x02 7. " ICP1_set/clr ,Interrupt Request Flag for channel 1" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.word 0x00 6. 0x00 6. -0x02 6. " ICP0_set/clr ,Interrupt Request Flag for channel 0" "Not requested,Requested"
|
|
setclrfld.word 0x00 5. -0x02 13. -0x02 5. " ICE1_set/clr ,Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 4. -0x02 12. -0x02 4. " ICE0_set/clr ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--3. " EG1 ,ICU Edge Selection" "Disabled,Rising,Falling,Both"
|
|
bitfld.word 0x00 0.--1. " EG0 ,ICU Edge Selection" "Disabled,Rising,Falling,Both"
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "ICU19_DMACFG01,DMA Configuration Register"
|
|
bitfld.byte 0x00 1. " ENDMAREQ1 ,Enable DMA Request (ICU channel 1)" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " ENDMAREQ0 ,Enable DMA Request (ICU channel 0)" "Disabled,Enabled"
|
|
line.byte 0x01 "ICU19_DEBUG01,Debug Register"
|
|
bitfld.byte 0x01 1. " DBGEN1 ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " DBGEN0 ,Debug Enable" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree.open "Programmable Pulse Generator"
|
|
tree "PPG Core Registers"
|
|
width 15.
|
|
textline " "
|
|
tree "PPG 0"
|
|
base ad:0xB0738000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG0_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG0_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG0_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG0_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG0_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG0_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG0_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG0_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG0_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG0_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG0_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG0_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG0_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG0_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG0_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG0_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG0_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG0_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG0_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG0_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG0_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG0_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG0_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 1"
|
|
base ad:0xB0738400
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG1_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG1_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG1_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG1_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG1_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG1_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG1_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG1_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG1_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG1_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG1_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG1_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG1_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG1_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG1_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG1_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG1_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG1_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG1_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG1_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG1_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG1_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG1_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 2"
|
|
base ad:0xB0738800
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG2_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG2_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG2_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG2_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG2_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG2_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG2_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG2_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG2_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG2_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG2_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG2_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG2_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG2_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG2_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG2_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG2_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG2_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG2_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG2_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG2_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG2_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG2_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 3"
|
|
base ad:0xB0738C00
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG3_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG3_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG3_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG3_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG3_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG3_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG3_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG3_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG3_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG3_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG3_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG3_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG3_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG3_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG3_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG3_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG3_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG3_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG3_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG3_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG3_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG3_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG3_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 4"
|
|
base ad:0xB0739000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG4_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG4_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG4_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG4_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG4_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG4_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG4_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG4_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG4_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG4_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG4_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG4_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG4_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG4_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG4_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG4_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG4_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG4_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG4_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG4_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG4_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG4_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG4_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 5"
|
|
base ad:0xB0739400
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG5_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG5_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG5_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG5_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG5_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG5_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG5_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG5_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG5_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG5_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG5_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG5_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG5_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG5_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG5_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG5_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG5_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG5_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG5_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG5_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG5_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG5_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG5_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 6"
|
|
base ad:0xB0739800
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG6_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG6_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG6_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG6_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG6_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG6_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG6_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG6_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG6_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG6_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG6_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG6_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG6_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG6_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG6_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG6_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG6_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG6_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG6_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG6_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG6_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG6_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG6_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 7"
|
|
base ad:0xB0739C00
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG7_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG7_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG7_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG7_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG7_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG7_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG7_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG7_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG7_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG7_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG7_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG7_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG7_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG7_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG7_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG7_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG7_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG7_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG7_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG7_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG7_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG7_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG7_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 8"
|
|
base ad:0xB073A000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG8_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG8_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG8_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG8_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG8_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG8_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG8_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG8_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG8_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG8_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG8_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG8_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG8_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG8_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG8_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG8_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG8_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG8_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG8_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG8_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG8_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG8_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG8_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 9"
|
|
base ad:0xB073A400
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG9_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG9_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG9_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG9_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG9_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG9_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG9_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG9_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG9_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG9_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG9_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG9_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG9_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG9_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG9_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG9_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG9_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG9_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG9_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG9_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG9_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG9_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG9_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 10"
|
|
base ad:0xB073A800
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG10_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG10_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG10_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG10_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG10_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG10_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG10_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG10_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG10_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG10_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG10_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG10_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG10_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG10_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG10_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG10_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG10_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG10_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG10_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG10_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG10_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG10_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG10_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 11"
|
|
base ad:0xB073AC00
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG11_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG11_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG11_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG11_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG11_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG11_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG11_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG11_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG11_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG11_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG11_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG11_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG11_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG11_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG11_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG11_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG11_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG11_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG11_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG11_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG11_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG11_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG11_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 12"
|
|
base ad:0xB073B000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG12_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG12_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG12_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG12_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG12_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG12_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG12_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG12_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG12_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG12_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG12_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG12_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG12_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG12_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG12_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG12_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG12_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG12_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG12_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG12_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG12_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG12_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG12_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 13"
|
|
base ad:0xB073B400
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG13_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG13_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG13_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG13_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG13_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG13_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG13_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG13_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG13_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG13_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG13_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG13_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG13_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG13_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG13_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG13_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG13_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG13_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG13_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG13_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG13_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG13_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG13_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 14"
|
|
base ad:0xB073B800
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG14_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG14_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG14_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG14_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG14_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG14_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG14_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG14_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG14_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG14_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG14_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG14_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG14_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG14_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG14_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG14_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG14_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG14_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG14_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG14_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG14_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG14_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG14_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 15"
|
|
base ad:0xB073BC00
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG15_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG15_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG15_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG15_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG15_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG15_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG15_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG15_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG15_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG15_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG15_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG15_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG15_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x02 "PPG15_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT0 compare clear match,FRT3 compare clear match,FRT16 compare clear match,FRT16 compare clear match"
|
|
line.byte 0x03 "PPG15_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG15_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG15_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG15_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG15_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG15_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG15_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG15_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG15_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 12.
|
|
width 15.
|
|
textline " "
|
|
tree "PPG 64"
|
|
base ad:0xB0848000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG64_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG64_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG64_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG64_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG64_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG64_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG64_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG64_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG64_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG64_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG64_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG64_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG64_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x02 "PPG64_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x03 "PPG64_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG64_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG64_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG64_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG64_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG64_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG64_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG64_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG64_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 65"
|
|
base ad:0xB0848400
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG65_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG65_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG65_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG65_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG65_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG65_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG65_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG65_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG65_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG65_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG65_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG65_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG65_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x02 "PPG65_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x03 "PPG65_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG65_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG65_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG65_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG65_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG65_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG65_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG65_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG65_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 66"
|
|
base ad:0xB0848800
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG66_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG66_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG66_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG66_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG66_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG66_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG66_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG66_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG66_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG66_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG66_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG66_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG66_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x02 "PPG66_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x03 "PPG66_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG66_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG66_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG66_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG66_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG66_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG66_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG66_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG66_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 67"
|
|
base ad:0xB0848C00
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG67_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG67_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG67_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG67_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG67_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG67_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG67_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG67_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG67_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG67_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG67_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG67_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG67_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x02 "PPG67_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x03 "PPG67_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG67_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG67_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG67_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG67_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG67_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG67_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG67_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG67_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 68"
|
|
base ad:0xB0849000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG68_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG68_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG68_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG68_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG68_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG68_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG68_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG68_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG68_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG68_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG68_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG68_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG68_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x02 "PPG68_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x03 "PPG68_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG68_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG68_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG68_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG68_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG68_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG68_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG68_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG68_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 69"
|
|
base ad:0xB0849400
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG69_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG69_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG69_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG69_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG69_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG69_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG69_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG69_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG69_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG69_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG69_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG69_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG69_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x02 "PPG69_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x03 "PPG69_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG69_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG69_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG69_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG69_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG69_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG69_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG69_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG69_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 70"
|
|
base ad:0xB0849800
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG70_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG70_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG70_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG70_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG70_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG70_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG70_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG70_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG70_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG70_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG70_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG70_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG70_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x02 "PPG70_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x03 "PPG70_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG70_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG70_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG70_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG70_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG70_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG70_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG70_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG70_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PPG 71"
|
|
base ad:0xB0849C00
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PPG71_PCN,PPG Control Status Register"
|
|
bitfld.word 0x00 13. " MDSE ,Mode Selection" "PWM,One-shot"
|
|
bitfld.word 0x00 12. " RTRG ,Restart Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " CKS ,Counter Clock Selection" "CKSEL,CKSEL/4,CKSEL/16,CKSEL/64"
|
|
bitfld.word 0x00 8. " MOD ,PPG 16-bit/8-bit Operation Mode" "16-bit,8-bit"
|
|
bitfld.word 0x00 6.--7. " EGS ,Trigger Input Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.word 0x00 5. " IREN ,Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " IRQF ,Interrupt Request Flag" "Not requested,Requested"
|
|
bitfld.word 0x00 1.--3. " IRS ,Interrupt Cause Selection" "Software or external,Counter borrow,Counter match,Counter borrow or match,Timing point capture,End duty match,,"
|
|
wgroup.byte 0x02++0x01
|
|
line.byte 0x00 "PPG71_IRQCLR,Interrupt Flag Clear Register"
|
|
bitfld.byte 0x00 0. " IRQCLR ,Interrupt Request Flag Clear" "No effect,Clear"
|
|
line.byte 0x01 "PPG71_SWTRIG,Software Trigger Activation Register"
|
|
bitfld.byte 0x01 1. " STGR ,Software Trigger" "No effect,Activate"
|
|
group.byte 0x04++0x04
|
|
line.byte 0x00 "PPG71_OE,Output Enable Register"
|
|
bitfld.byte 0x00 1. " OE2 ,PPGB Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE ,PPGA Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG71_CNTEN,Timer Enable Operation Register"
|
|
bitfld.byte 0x01 0. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
line.byte 0x02 "PPG71_OPTMSK,Output Mask and Polarity Selection Register"
|
|
bitfld.byte 0x02 2. " PGMS ,PPG Output Mask Selection" "Not masked,Masked"
|
|
bitfld.byte 0x02 1. " OSEL2 ,PPGB Output Polarity Specification (high 8-bit part)" "Normal,Inverted"
|
|
bitfld.byte 0x02 0. " OSEL ,PPGA Output Polarity Specification" "Normal,Inverted"
|
|
line.byte 0x03 "PPG71_RMPCFG,Ramp Configuration Register"
|
|
bitfld.byte 0x03 3. " RIDH ,Duty Increment/Decrement in Ramp Mode (high 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 2. " RIDL ,Duty Increment/Decrement in Ramp Mode (16-bit or low 8-bit part)" "Increment,Decrement"
|
|
bitfld.byte 0x03 1. " RAMPH ,Ramp Mode Selection (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0. " RAMPL ,Ramp Mode Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.byte 0x04 "PPG71_STRD,Start Delay Mode Register"
|
|
bitfld.byte 0x04 0. " STRD ,Start Delay Mode" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "PPG71_TRIGCLR,PPG Trigger Clear Flag Register"
|
|
bitfld.byte 0x00 0. " TRGCLR ,PPG Start/Trigger Event Flag Clear" "No effect,Clear"
|
|
group.word 0x0a++0x03
|
|
line.word 0x00 "PPG71_EPCN1,Extended PPG Control Status Register 1"
|
|
rbitfld.word 0x00 12. " TRIG ,PPG Start/Trigger Event Flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " FRMH ,Full Range Mode (high 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " FRML ,Full Range Mode (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TPCH ,Timing Point Capture Selection (high 8-bit part) enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TPCL ,Timing Point Capture Selection (16-bit or low 8-bit part)" "Disabled,Enabled"
|
|
line.word 0x02 "PPG71_EPCN2,Extended PPG Control Status Register 2"
|
|
bitfld.word 0x02 15. " TCHCLR ,Timing Point Capture Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 14. " TCLCLR ,Timing Point Capture Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 13. " EDMHCLR ,End Duty Match Flag in Ramp Mode (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 12. " EDMLCLR ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 11. " DTHCLR ,Duty Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 10. " DTLCLR ,Duty Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PRDHCLR ,Cycle Match Flag (high 8-bit part) Clear" "No effect,Clear"
|
|
bitfld.word 0x02 8. " PRDLCLR ,Cycle Match Flag (16-bit or low 8-bit part) Clear" "No effect,Clear"
|
|
rbitfld.word 0x02 7. " TCH ,Timing Point Capture Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 6. " TCL ,Timing Point Capture Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 5. " EDMH ,End Duty Match Flag in Ramp Mode" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 4. " EDML ,End Duty Match Flag in Ramp Mode (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.word 0x02 3. " DTH ,Duty Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 2. " DTL ,Duty Match Flag" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 1. " PRDH ,Cycle Match Flag (high 8-bit part)" "No interrupt,Interrupt"
|
|
rbitfld.word 0x02 0. " PRDL ,Cycle Match Flag (16-bit or low 8-bit part)" "No interrupt,Interrupt"
|
|
group.byte 0x0e++0x03
|
|
line.byte 0x00 "PPG71_GCN1,General Control Register 1"
|
|
bitfld.byte 0x00 0.--3. " TSEL ,Trigger input to PPG select" "EN0,EN1,EN2,EN3,32-bit Reload Timer 0 output,32-bit RT by RLTTRG1,CTG0,CTG1,External trigger 0,External trigger 1,External trigger 2,External trigger 3,Disabled,Disabled,Disabled,Disabled"
|
|
line.byte 0x01 "PPG71_GCN3,General Control Register 3"
|
|
bitfld.byte 0x01 0.--2. " RTG ,Trigger specification" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x02 "PPG71_GCN4,General Control Register 4"
|
|
bitfld.byte 0x02 3. " CKSEL ,Prescaler Input Selection" "CLKP,RCK/RSH"
|
|
bitfld.byte 0x02 0.--2. " RCK ,Input signal used as PPG count clock" "Reload Timer 0 underflow,Reload Timer 1 underflow,Reload Timer 2 underflow,Reload Timer 3 underflow,FRT16 compare clear match,FRT19 compare clear match,FRT0 compare clear match,FRT0 compare clear match"
|
|
line.byte 0x03 "PPG71_GCN5,General Control Register 5"
|
|
bitfld.byte 0x03 0.--1. " RSH ,Delay of the selected input signal used as PPG count clock" "No delay,4 CLKP cycles,8 CLKP cycles,12 CLKP cycles"
|
|
group.word 0x12++0x03
|
|
line.word 0x00 "PPG71_PCSR,PPG Cycle Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PCSRH ,PPG Cycle Setting High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PCSRL ,PPG Cycle Setting Low"
|
|
line.word 0x02 "PPG71_PDUT,PPG Duty Setting Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PDUTH ,PPG Duty Setting High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PDUTL ,PPG Duty Setting Low"
|
|
rgroup.word 0x16++0x01
|
|
line.word 0x00 "PPG71_PTMR,PPG Timer Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PTMRH ,PPG Timer Register High 8-bit Part"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PTMRL ,PPG Timer Register 16-bit or Low 8-bit Part"
|
|
group.word 0x18++0x05
|
|
line.word 0x00 "PPG71_PSDR,PPG Start Delay Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PSDRH ,PPG Start Delay High"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PSDRL ,PPG Start Delay Low"
|
|
line.word 0x02 "PPG71_PTPC,PPG Timing Point Capture Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " PTPCH ,PPG Timing Point Capture High"
|
|
hexmask.word.byte 0x02 0.--7. 1. " PTPCL ,PPG Timing Point Capture Low"
|
|
line.word 0x04 "PPG71_PEDR,PPG End Duty Register Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " PEDRH ,PPG End Duty High"
|
|
hexmask.word.byte 0x04 0.--7. 1. " PEDRL ,PPG End Duty Low"
|
|
group.byte 0x1e++0x01
|
|
line.byte 0x00 "PPG71_DMACFG,PPG DMA Configuration Register"
|
|
bitfld.byte 0x00 0. " ENDMAREQ ,Enable DMA Request" "Disabled,Enabled"
|
|
line.byte 0x01 "PPG71_DEBUG,PPG Debug Enable Register"
|
|
bitfld.byte 0x01 0. " DBGEN ,PPG Debug Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 12.
|
|
tree.end
|
|
width 16.
|
|
tree "PPG Group Control Registers"
|
|
base ad:0xb0748000
|
|
group.byte 0x0++0x00
|
|
line.byte 0x00 "PPGGRP0_GCTRL,Group Control Register"
|
|
bitfld.byte 0x00 3. " EN3 ,Internal Trigger 3" "Low,High"
|
|
bitfld.byte 0x00 2. " EN2 ,Internal Trigger 2" "Low,High"
|
|
bitfld.byte 0x00 1. " EN1 ,Internal Trigger 1" "Low,High"
|
|
bitfld.byte 0x00 0. " EN0 ,Internal Trigger 0" "Low,High"
|
|
group.byte 0x400++0x00
|
|
line.byte 0x00 "PPGGRP1_GCTRL,Group Control Register"
|
|
bitfld.byte 0x00 3. " EN3 ,Internal Trigger 3" "Low,High"
|
|
bitfld.byte 0x00 2. " EN2 ,Internal Trigger 2" "Low,High"
|
|
bitfld.byte 0x00 1. " EN1 ,Internal Trigger 1" "Low,High"
|
|
bitfld.byte 0x00 0. " EN0 ,Internal Trigger 0" "Low,High"
|
|
group.byte 0x800++0x00
|
|
line.byte 0x00 "PPGGRP2_GCTRL,Group Control Register"
|
|
bitfld.byte 0x00 3. " EN3 ,Internal Trigger 3" "Low,High"
|
|
bitfld.byte 0x00 2. " EN2 ,Internal Trigger 2" "Low,High"
|
|
bitfld.byte 0x00 1. " EN1 ,Internal Trigger 1" "Low,High"
|
|
bitfld.byte 0x00 0. " EN0 ,Internal Trigger 0" "Low,High"
|
|
group.byte 0xC00++0x00
|
|
line.byte 0x00 "PPGGRP3_GCTRL,Group Control Register"
|
|
bitfld.byte 0x00 3. " EN3 ,Internal Trigger 3" "Low,High"
|
|
bitfld.byte 0x00 2. " EN2 ,Internal Trigger 2" "Low,High"
|
|
bitfld.byte 0x00 1. " EN1 ,Internal Trigger 1" "Low,High"
|
|
bitfld.byte 0x00 0. " EN0 ,Internal Trigger 0" "Low,High"
|
|
group.byte 0x110000++0x00
|
|
line.byte 0x00 "PPGGRP16_GCTRL,Group Control Register"
|
|
bitfld.byte 0x00 3. " EN3 ,Internal Trigger 3" "Low,High"
|
|
bitfld.byte 0x00 2. " EN2 ,Internal Trigger 2" "Low,High"
|
|
bitfld.byte 0x00 1. " EN1 ,Internal Trigger 1" "Low,High"
|
|
bitfld.byte 0x00 0. " EN0 ,Internal Trigger 0" "Low,High"
|
|
group.byte 0x110400++0x00
|
|
line.byte 0x00 "PPGGRP17_GCTRL,Group Control Register"
|
|
bitfld.byte 0x00 3. " EN3 ,Internal Trigger 3" "Low,High"
|
|
bitfld.byte 0x00 2. " EN2 ,Internal Trigger 2" "Low,High"
|
|
bitfld.byte 0x00 1. " EN1 ,Internal Trigger 1" "Low,High"
|
|
bitfld.byte 0x00 0. " EN0 ,Internal Trigger 0" "Low,High"
|
|
tree.end
|
|
tree "PPG General Control Registers"
|
|
group.byte 0x4000++0x00
|
|
line.byte 0x00 "PPGGCL0_GCNR,PPG General Control Register"
|
|
bitfld.byte 0x00 1. " CTG1 ,PPG General Control 1" "Low,High"
|
|
bitfld.byte 0x00 0. " CTG0 ,PPG General Control 0" "Low,High"
|
|
group.byte 0x114000++0x00
|
|
line.byte 0x00 "PPGGCL1_GCNR,PPG General Control Register"
|
|
bitfld.byte 0x00 1. " CTG1 ,PPG General Control 1" "Low,High"
|
|
bitfld.byte 0x00 0. " CTG0 ,PPG General Control 0" "Low,High"
|
|
tree.end
|
|
width 12.
|
|
tree.end
|
|
tree.open "32-bit Reload Timer"
|
|
tree "RLT 0"
|
|
base ad:0xb0a10000
|
|
width 13.
|
|
textline " "
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RLT0_DMACFG,DMA Configuration Register"
|
|
bitfld.long 0x00 0. " ENDMAUF ,DMA Enable for Underflow" "Disabled,Enabled"
|
|
if ((d.l((ad:0xb0a10000+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a10000+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT0_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a10000+0x8))&0x1800)!=0x1800&&((d.l(ad:0xb0a10000+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT0_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a10000+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a10000+0x8))&0x1000000)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT0_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT0_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RLT0_TMRLR,32-bit Reload Register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RLT$1_TMR,32-bit Timer Register"
|
|
width 12.
|
|
tree.end
|
|
tree "RLT 1"
|
|
base ad:0xb0a10400
|
|
width 13.
|
|
textline " "
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RLT1_DMACFG,DMA Configuration Register"
|
|
bitfld.long 0x00 0. " ENDMAUF ,DMA Enable for Underflow" "Disabled,Enabled"
|
|
if ((d.l((ad:0xb0a10400+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a10400+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT1_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a10400+0x8))&0x1800)!=0x1800&&((d.l(ad:0xb0a10400+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT1_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a10400+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a10400+0x8))&0x1000000)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT1_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT1_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RLT1_TMRLR,32-bit Reload Register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RLT$1_TMR,32-bit Timer Register"
|
|
width 12.
|
|
tree.end
|
|
tree "RLT 2"
|
|
base ad:0xb0a10800
|
|
width 13.
|
|
textline " "
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RLT2_DMACFG,DMA Configuration Register"
|
|
bitfld.long 0x00 0. " ENDMAUF ,DMA Enable for Underflow" "Disabled,Enabled"
|
|
if ((d.l((ad:0xb0a10800+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a10800+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT2_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a10800+0x8))&0x1800)!=0x1800&&((d.l(ad:0xb0a10800+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT2_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a10800+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a10800+0x8))&0x1000000)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT2_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT2_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RLT2_TMRLR,32-bit Reload Register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RLT$1_TMR,32-bit Timer Register"
|
|
width 12.
|
|
tree.end
|
|
tree "RLT 3"
|
|
base ad:0xb0a10c00
|
|
width 13.
|
|
textline " "
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RLT3_DMACFG,DMA Configuration Register"
|
|
bitfld.long 0x00 0. " ENDMAUF ,DMA Enable for Underflow" "Disabled,Enabled"
|
|
if ((d.l((ad:0xb0a10c00+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a10c00+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT3_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a10c00+0x8))&0x1800)!=0x1800&&((d.l(ad:0xb0a10c00+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT3_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a10c00+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a10c00+0x8))&0x1000000)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT3_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT3_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RLT3_TMRLR,32-bit Reload Register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RLT$1_TMR,32-bit Timer Register"
|
|
width 12.
|
|
tree.end
|
|
tree "RLT 4"
|
|
base ad:0xb0a11000
|
|
width 13.
|
|
textline " "
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RLT4_DMACFG,DMA Configuration Register"
|
|
bitfld.long 0x00 0. " ENDMAUF ,DMA Enable for Underflow" "Disabled,Enabled"
|
|
if ((d.l((ad:0xb0a11000+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a11000+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT4_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a11000+0x8))&0x1800)!=0x1800&&((d.l(ad:0xb0a11000+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT4_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a11000+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a11000+0x8))&0x1000000)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT4_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT4_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RLT4_TMRLR,32-bit Reload Register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RLT$1_TMR,32-bit Timer Register"
|
|
width 12.
|
|
tree.end
|
|
tree "RLT 5"
|
|
base ad:0xb0a11400
|
|
width 13.
|
|
textline " "
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RLT5_DMACFG,DMA Configuration Register"
|
|
bitfld.long 0x00 0. " ENDMAUF ,DMA Enable for Underflow" "Disabled,Enabled"
|
|
if ((d.l((ad:0xb0a11400+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a11400+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT5_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a11400+0x8))&0x1800)!=0x1800&&((d.l(ad:0xb0a11400+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT5_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a11400+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a11400+0x8))&0x1000000)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT5_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT5_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RLT5_TMRLR,32-bit Reload Register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RLT$1_TMR,32-bit Timer Register"
|
|
width 12.
|
|
tree.end
|
|
tree "RLT 6"
|
|
base ad:0xb0a11800
|
|
width 13.
|
|
textline " "
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RLT6_DMACFG,DMA Configuration Register"
|
|
bitfld.long 0x00 0. " ENDMAUF ,DMA Enable for Underflow" "Disabled,Enabled"
|
|
if ((d.l((ad:0xb0a11800+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a11800+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT6_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a11800+0x8))&0x1800)!=0x1800&&((d.l(ad:0xb0a11800+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT6_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a11800+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a11800+0x8))&0x1000000)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT6_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT6_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RLT6_TMRLR,32-bit Reload Register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RLT$1_TMR,32-bit Timer Register"
|
|
width 12.
|
|
tree.end
|
|
tree "RLT 7"
|
|
base ad:0xb0a11c00
|
|
width 13.
|
|
textline " "
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RLT7_DMACFG,DMA Configuration Register"
|
|
bitfld.long 0x00 0. " ENDMAUF ,DMA Enable for Underflow" "Disabled,Enabled"
|
|
if ((d.l((ad:0xb0a11c00+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a11c00+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT7_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a11c00+0x8))&0x1800)!=0x1800&&((d.l(ad:0xb0a11c00+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT7_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a11c00+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a11c00+0x8))&0x1000000)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT7_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT7_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RLT7_TMRLR,32-bit Reload Register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RLT$1_TMR,32-bit Timer Register"
|
|
width 12.
|
|
tree.end
|
|
tree "RLT 8"
|
|
base ad:0xb0a12000
|
|
width 13.
|
|
textline " "
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RLT8_DMACFG,DMA Configuration Register"
|
|
bitfld.long 0x00 0. " ENDMAUF ,DMA Enable for Underflow" "Disabled,Enabled"
|
|
if ((d.l((ad:0xb0a12000+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a12000+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT8_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a12000+0x8))&0x1800)!=0x1800&&((d.l(ad:0xb0a12000+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT8_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a12000+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a12000+0x8))&0x1000000)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT8_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT8_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RLT8_TMRLR,32-bit Reload Register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RLT$1_TMR,32-bit Timer Register"
|
|
width 12.
|
|
tree.end
|
|
tree "RLT 9"
|
|
base ad:0xb0a12400
|
|
width 13.
|
|
textline " "
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RLT9_DMACFG,DMA Configuration Register"
|
|
bitfld.long 0x00 0. " ENDMAUF ,DMA Enable for Underflow" "Disabled,Enabled"
|
|
if ((d.l((ad:0xb0a12400+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a12400+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT9_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a12400+0x8))&0x1800)!=0x1800&&((d.l(ad:0xb0a12400+0x8))&0x1000000)==0x1000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT9_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
elif ((d.l((ad:0xb0a12400+0x8))&0x1800)==0x1800&&((d.l(ad:0xb0a12400+0x8))&0x1000000)==0x0)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT9_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
rbitfld.long 0x00 16. " UF ,Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" ",Event/Rising edge,Event/Falling edge,Event/Both edges,,Event/Rising edge,Event/Falling edge,Event/Both edges"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLT9_TMCSR,Timer Control Status Register"
|
|
bitfld.long 0x00 24. " CNTE ,Count Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " TRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 17. " UFCLR ,Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " UF ,Underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 13.--15. " MOD ,Operation Mode Input function/Active edge or level" "Disabled,Trigger/Rising edge,Trigger/Falling edge,Trigger/Both edges,Gate/Low level,Gate/High level,Gate/Low level,Gate/High level"
|
|
bitfld.long 0x00 10.--12. " CSL ,Clock Select" "/1,/2,/4,/8,/16,/32,External,External/2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NFE ,Noise Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DBGE ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OUTE ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OUTL ,Output Level" "Low,High"
|
|
bitfld.long 0x00 4. " RELD ,Reload Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INTE ,Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RLT9_TMRLR,32-bit Reload Register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RLT$1_TMR,32-bit Timer Register"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree.open "Stepper Motor Controller"
|
|
tree "SMC 0"
|
|
base ad:0xb0730000
|
|
width 13.
|
|
textline " "
|
|
if (((d.b(ad:0xb0730000))&0x8)==0x0&&((d.b(ad:0xb0730000))&0x4)==0x0)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC0_PWC,PWM Control Register"
|
|
bitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "3.2ns,12.8ns,16ns,19.2ns,25.6ns,32ns,38.4ns,51.2ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0730000))&0x8)==0x0&&((d.b(ad:0xb0730000))&0x4)==0x4)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC0_PWC,PWM Control Register"
|
|
bitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "12.8ns,51.2ns,64ns,76.8ns,102.4ns,128ns,153.6ns,204.8ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0730000))&0x8)==0x8&&((d.b(ad:0xb0730000))&0x4)==0x0)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC0_PWC,PWM Control Register"
|
|
rbitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "3.2ns,12.8ns,16ns,19.2ns,25.6ns,32ns,38.4ns,51.2ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0730000))&0x8)==0x8&&((d.b(ad:0xb0730000))&0x4)==0x4)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC0_PWC,PWM Control Register"
|
|
rbitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "12.8ns,51.2ns,64ns,76.8ns,102.4ns,128ns,153.6ns,204.8ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
endif
|
|
if (((d.b(ad:0xb0730000))&0x4)==0x0)
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "SMC0_PWC1,PWM Compare 1 Register"
|
|
hexmask.word 0x00 0.--9. 1. " D ,10-bit PWM Compare Value"
|
|
line.word 0x02 "SMC0_PWC2,PWM Compare 2 Register"
|
|
hexmask.word 0x02 0.--9. 1. " D ,10-bit PWM Compare Value"
|
|
else
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "SMC0_PWC1,PWM Compare 1 Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " D ,8-bit PWM Compare Value"
|
|
line.word 0x02 "SMC0_PWC2,PWM Compare 2 Register"
|
|
hexmask.word.byte 0x02 0.--7. 1. " D ,8-bit PWM Compare Value"
|
|
endif
|
|
group.word 0x0a++0x01
|
|
line.word 0x00 "SMC0_PWS,PWM Selection Register"
|
|
bitfld.word 0x00 14. " BS ,Output Update" "No update,Update"
|
|
bitfld.word 0x00 11.--13. " P2 ,Plus Output 2 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 8.--10. " M2 ,Minus Output 2 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 3.--5. " P1 ,Plus Output 1 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 0.--2. " M1 ,Minus Output 1 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
wgroup.word 0x0c++0x01
|
|
line.word 0x00 "SMC0_PWSS,PWM Selection Set Register"
|
|
bitfld.word 0x00 14. " BSS ,Output Update Set" "No effect,Set"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "SMC0_PTRGDL,SMC Trigger Delay Register"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "SMC0_DEBUG,SMC Debug Register"
|
|
bitfld.byte 0x00 0. " DBGEN ,Debug Mode" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "SMC 1"
|
|
base ad:0xb0730400
|
|
width 13.
|
|
textline " "
|
|
if (((d.b(ad:0xb0730400))&0x8)==0x0&&((d.b(ad:0xb0730400))&0x4)==0x0)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC1_PWC,PWM Control Register"
|
|
bitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "3.2ns,12.8ns,16ns,19.2ns,25.6ns,32ns,38.4ns,51.2ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0730400))&0x8)==0x0&&((d.b(ad:0xb0730400))&0x4)==0x4)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC1_PWC,PWM Control Register"
|
|
bitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "12.8ns,51.2ns,64ns,76.8ns,102.4ns,128ns,153.6ns,204.8ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0730400))&0x8)==0x8&&((d.b(ad:0xb0730400))&0x4)==0x0)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC1_PWC,PWM Control Register"
|
|
rbitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "3.2ns,12.8ns,16ns,19.2ns,25.6ns,32ns,38.4ns,51.2ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0730400))&0x8)==0x8&&((d.b(ad:0xb0730400))&0x4)==0x4)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC1_PWC,PWM Control Register"
|
|
rbitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "12.8ns,51.2ns,64ns,76.8ns,102.4ns,128ns,153.6ns,204.8ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
endif
|
|
if (((d.b(ad:0xb0730400))&0x4)==0x0)
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "SMC1_PWC1,PWM Compare 1 Register"
|
|
hexmask.word 0x00 0.--9. 1. " D ,10-bit PWM Compare Value"
|
|
line.word 0x02 "SMC1_PWC2,PWM Compare 2 Register"
|
|
hexmask.word 0x02 0.--9. 1. " D ,10-bit PWM Compare Value"
|
|
else
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "SMC1_PWC1,PWM Compare 1 Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " D ,8-bit PWM Compare Value"
|
|
line.word 0x02 "SMC1_PWC2,PWM Compare 2 Register"
|
|
hexmask.word.byte 0x02 0.--7. 1. " D ,8-bit PWM Compare Value"
|
|
endif
|
|
group.word 0x0a++0x01
|
|
line.word 0x00 "SMC1_PWS,PWM Selection Register"
|
|
bitfld.word 0x00 14. " BS ,Output Update" "No update,Update"
|
|
bitfld.word 0x00 11.--13. " P2 ,Plus Output 2 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 8.--10. " M2 ,Minus Output 2 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 3.--5. " P1 ,Plus Output 1 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 0.--2. " M1 ,Minus Output 1 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
wgroup.word 0x0c++0x01
|
|
line.word 0x00 "SMC1_PWSS,PWM Selection Set Register"
|
|
bitfld.word 0x00 14. " BSS ,Output Update Set" "No effect,Set"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "SMC1_PTRGDL,SMC Trigger Delay Register"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "SMC1_DEBUG,SMC Debug Register"
|
|
bitfld.byte 0x00 0. " DBGEN ,Debug Mode" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "SMC 2"
|
|
base ad:0xb0730800
|
|
width 13.
|
|
textline " "
|
|
if (((d.b(ad:0xb0730800))&0x8)==0x0&&((d.b(ad:0xb0730800))&0x4)==0x0)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC2_PWC,PWM Control Register"
|
|
bitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "3.2ns,12.8ns,16ns,19.2ns,25.6ns,32ns,38.4ns,51.2ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0730800))&0x8)==0x0&&((d.b(ad:0xb0730800))&0x4)==0x4)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC2_PWC,PWM Control Register"
|
|
bitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "12.8ns,51.2ns,64ns,76.8ns,102.4ns,128ns,153.6ns,204.8ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0730800))&0x8)==0x8&&((d.b(ad:0xb0730800))&0x4)==0x0)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC2_PWC,PWM Control Register"
|
|
rbitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "3.2ns,12.8ns,16ns,19.2ns,25.6ns,32ns,38.4ns,51.2ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0730800))&0x8)==0x8&&((d.b(ad:0xb0730800))&0x4)==0x4)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC2_PWC,PWM Control Register"
|
|
rbitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "12.8ns,51.2ns,64ns,76.8ns,102.4ns,128ns,153.6ns,204.8ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
endif
|
|
if (((d.b(ad:0xb0730800))&0x4)==0x0)
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "SMC2_PWC1,PWM Compare 1 Register"
|
|
hexmask.word 0x00 0.--9. 1. " D ,10-bit PWM Compare Value"
|
|
line.word 0x02 "SMC2_PWC2,PWM Compare 2 Register"
|
|
hexmask.word 0x02 0.--9. 1. " D ,10-bit PWM Compare Value"
|
|
else
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "SMC2_PWC1,PWM Compare 1 Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " D ,8-bit PWM Compare Value"
|
|
line.word 0x02 "SMC2_PWC2,PWM Compare 2 Register"
|
|
hexmask.word.byte 0x02 0.--7. 1. " D ,8-bit PWM Compare Value"
|
|
endif
|
|
group.word 0x0a++0x01
|
|
line.word 0x00 "SMC2_PWS,PWM Selection Register"
|
|
bitfld.word 0x00 14. " BS ,Output Update" "No update,Update"
|
|
bitfld.word 0x00 11.--13. " P2 ,Plus Output 2 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 8.--10. " M2 ,Minus Output 2 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 3.--5. " P1 ,Plus Output 1 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 0.--2. " M1 ,Minus Output 1 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
wgroup.word 0x0c++0x01
|
|
line.word 0x00 "SMC2_PWSS,PWM Selection Set Register"
|
|
bitfld.word 0x00 14. " BSS ,Output Update Set" "No effect,Set"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "SMC2_PTRGDL,SMC Trigger Delay Register"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "SMC2_DEBUG,SMC Debug Register"
|
|
bitfld.byte 0x00 0. " DBGEN ,Debug Mode" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "SMC 3"
|
|
base ad:0xb0730c00
|
|
width 13.
|
|
textline " "
|
|
if (((d.b(ad:0xb0730c00))&0x8)==0x0&&((d.b(ad:0xb0730c00))&0x4)==0x0)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC3_PWC,PWM Control Register"
|
|
bitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "3.2ns,12.8ns,16ns,19.2ns,25.6ns,32ns,38.4ns,51.2ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0730c00))&0x8)==0x0&&((d.b(ad:0xb0730c00))&0x4)==0x4)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC3_PWC,PWM Control Register"
|
|
bitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "12.8ns,51.2ns,64ns,76.8ns,102.4ns,128ns,153.6ns,204.8ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0730c00))&0x8)==0x8&&((d.b(ad:0xb0730c00))&0x4)==0x0)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC3_PWC,PWM Control Register"
|
|
rbitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "3.2ns,12.8ns,16ns,19.2ns,25.6ns,32ns,38.4ns,51.2ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0730c00))&0x8)==0x8&&((d.b(ad:0xb0730c00))&0x4)==0x4)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC3_PWC,PWM Control Register"
|
|
rbitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "12.8ns,51.2ns,64ns,76.8ns,102.4ns,128ns,153.6ns,204.8ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
endif
|
|
if (((d.b(ad:0xb0730c00))&0x4)==0x0)
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "SMC3_PWC1,PWM Compare 1 Register"
|
|
hexmask.word 0x00 0.--9. 1. " D ,10-bit PWM Compare Value"
|
|
line.word 0x02 "SMC3_PWC2,PWM Compare 2 Register"
|
|
hexmask.word 0x02 0.--9. 1. " D ,10-bit PWM Compare Value"
|
|
else
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "SMC3_PWC1,PWM Compare 1 Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " D ,8-bit PWM Compare Value"
|
|
line.word 0x02 "SMC3_PWC2,PWM Compare 2 Register"
|
|
hexmask.word.byte 0x02 0.--7. 1. " D ,8-bit PWM Compare Value"
|
|
endif
|
|
group.word 0x0a++0x01
|
|
line.word 0x00 "SMC3_PWS,PWM Selection Register"
|
|
bitfld.word 0x00 14. " BS ,Output Update" "No update,Update"
|
|
bitfld.word 0x00 11.--13. " P2 ,Plus Output 2 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 8.--10. " M2 ,Minus Output 2 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 3.--5. " P1 ,Plus Output 1 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 0.--2. " M1 ,Minus Output 1 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
wgroup.word 0x0c++0x01
|
|
line.word 0x00 "SMC3_PWSS,PWM Selection Set Register"
|
|
bitfld.word 0x00 14. " BSS ,Output Update Set" "No effect,Set"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "SMC3_PTRGDL,SMC Trigger Delay Register"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "SMC3_DEBUG,SMC Debug Register"
|
|
bitfld.byte 0x00 0. " DBGEN ,Debug Mode" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "SMC 4"
|
|
base ad:0xb0731000
|
|
width 13.
|
|
textline " "
|
|
if (((d.b(ad:0xb0731000))&0x8)==0x0&&((d.b(ad:0xb0731000))&0x4)==0x0)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC4_PWC,PWM Control Register"
|
|
bitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "3.2ns,12.8ns,16ns,19.2ns,25.6ns,32ns,38.4ns,51.2ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0731000))&0x8)==0x0&&((d.b(ad:0xb0731000))&0x4)==0x4)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC4_PWC,PWM Control Register"
|
|
bitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "12.8ns,51.2ns,64ns,76.8ns,102.4ns,128ns,153.6ns,204.8ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0731000))&0x8)==0x8&&((d.b(ad:0xb0731000))&0x4)==0x0)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC4_PWC,PWM Control Register"
|
|
rbitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "3.2ns,12.8ns,16ns,19.2ns,25.6ns,32ns,38.4ns,51.2ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0731000))&0x8)==0x8&&((d.b(ad:0xb0731000))&0x4)==0x4)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC4_PWC,PWM Control Register"
|
|
rbitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "12.8ns,51.2ns,64ns,76.8ns,102.4ns,128ns,153.6ns,204.8ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
endif
|
|
if (((d.b(ad:0xb0731000))&0x4)==0x0)
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "SMC4_PWC1,PWM Compare 1 Register"
|
|
hexmask.word 0x00 0.--9. 1. " D ,10-bit PWM Compare Value"
|
|
line.word 0x02 "SMC4_PWC2,PWM Compare 2 Register"
|
|
hexmask.word 0x02 0.--9. 1. " D ,10-bit PWM Compare Value"
|
|
else
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "SMC4_PWC1,PWM Compare 1 Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " D ,8-bit PWM Compare Value"
|
|
line.word 0x02 "SMC4_PWC2,PWM Compare 2 Register"
|
|
hexmask.word.byte 0x02 0.--7. 1. " D ,8-bit PWM Compare Value"
|
|
endif
|
|
group.word 0x0a++0x01
|
|
line.word 0x00 "SMC4_PWS,PWM Selection Register"
|
|
bitfld.word 0x00 14. " BS ,Output Update" "No update,Update"
|
|
bitfld.word 0x00 11.--13. " P2 ,Plus Output 2 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 8.--10. " M2 ,Minus Output 2 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 3.--5. " P1 ,Plus Output 1 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 0.--2. " M1 ,Minus Output 1 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
wgroup.word 0x0c++0x01
|
|
line.word 0x00 "SMC4_PWSS,PWM Selection Set Register"
|
|
bitfld.word 0x00 14. " BSS ,Output Update Set" "No effect,Set"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "SMC4_PTRGDL,SMC Trigger Delay Register"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "SMC4_DEBUG,SMC Debug Register"
|
|
bitfld.byte 0x00 0. " DBGEN ,Debug Mode" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "SMC 5"
|
|
base ad:0xb0731400
|
|
width 13.
|
|
textline " "
|
|
if (((d.b(ad:0xb0731400))&0x8)==0x0&&((d.b(ad:0xb0731400))&0x4)==0x0)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC5_PWC,PWM Control Register"
|
|
bitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "3.2ns,12.8ns,16ns,19.2ns,25.6ns,32ns,38.4ns,51.2ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0731400))&0x8)==0x0&&((d.b(ad:0xb0731400))&0x4)==0x4)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC5_PWC,PWM Control Register"
|
|
bitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "12.8ns,51.2ns,64ns,76.8ns,102.4ns,128ns,153.6ns,204.8ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0731400))&0x8)==0x8&&((d.b(ad:0xb0731400))&0x4)==0x0)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC5_PWC,PWM Control Register"
|
|
rbitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "3.2ns,12.8ns,16ns,19.2ns,25.6ns,32ns,38.4ns,51.2ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
elif (((d.b(ad:0xb0731400))&0x8)==0x8&&((d.b(ad:0xb0731400))&0x4)==0x4)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMC5_PWC,PWM Control Register"
|
|
rbitfld.byte 0x00 4.--6. " P ,Clock Prescaler" "12.8ns,51.2ns,64ns,76.8ns,102.4ns,128ns,153.6ns,204.8ns"
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x04 3. " CE_set/clr ,Count Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SC ,SMC PWM Pulse Generator operating resolution" "8-bit,10-bit"
|
|
endif
|
|
if (((d.b(ad:0xb0731400))&0x4)==0x0)
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "SMC5_PWC1,PWM Compare 1 Register"
|
|
hexmask.word 0x00 0.--9. 1. " D ,10-bit PWM Compare Value"
|
|
line.word 0x02 "SMC5_PWC2,PWM Compare 2 Register"
|
|
hexmask.word 0x02 0.--9. 1. " D ,10-bit PWM Compare Value"
|
|
else
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "SMC5_PWC1,PWM Compare 1 Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " D ,8-bit PWM Compare Value"
|
|
line.word 0x02 "SMC5_PWC2,PWM Compare 2 Register"
|
|
hexmask.word.byte 0x02 0.--7. 1. " D ,8-bit PWM Compare Value"
|
|
endif
|
|
group.word 0x0a++0x01
|
|
line.word 0x00 "SMC5_PWS,PWM Selection Register"
|
|
bitfld.word 0x00 14. " BS ,Output Update" "No update,Update"
|
|
bitfld.word 0x00 11.--13. " P2 ,Plus Output 2 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 8.--10. " M2 ,Minus Output 2 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 3.--5. " P1 ,Plus Output 1 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
bitfld.word 0x00 0.--2. " M1 ,Minus Output 1 Selection" "Hi-Z,Hi-Z,Hi-Z,Hi-Z,Low,High,PWM Pulse,PWM Pulse"
|
|
wgroup.word 0x0c++0x01
|
|
line.word 0x00 "SMC5_PWSS,PWM Selection Set Register"
|
|
bitfld.word 0x00 14. " BSS ,Output Update Set" "No effect,Set"
|
|
group.byte 0x0e++0x00
|
|
line.byte 0x00 "SMC5_PTRGDL,SMC Trigger Delay Register"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "SMC5_DEBUG,SMC Debug Register"
|
|
bitfld.byte 0x00 0. " DBGEN ,Debug Mode" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "Stepper Motor Controller Trigger Group"
|
|
base ad:0xb0731800
|
|
width 14.
|
|
textline " "
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SMCTG0_PTRGS,SMC Trigger Selection Register"
|
|
bitfld.word 0x00 13. " S25 ,Trigger Enable for operation of SMC5" "Not triggered,Triggered"
|
|
bitfld.word 0x00 12. " S24 ,Trigger Enable for operation of SMC4" "Not triggered,Triggered"
|
|
bitfld.word 0x00 11. " S23 ,Trigger Enable for operation of SMC3" "Not triggered,Triggered"
|
|
bitfld.word 0x00 10. "S22 ,Trigger Enable for operation of SMC2" "Not triggered,Triggered"
|
|
bitfld.word 0x00 9. " S21 ,Trigger Enable for operation of SMC1" "Not triggered,Triggered"
|
|
bitfld.word 0x00 8. " S20 ,Trigger Enable for operation of SMC0" "Not triggered,Triggered"
|
|
bitfld.word 0x00 5. " S15 ,Trigger Enable for operation of SMC5" "Not triggered,Triggered"
|
|
bitfld.word 0x00 4. " S14 ,Trigger Enable for operation of SMC4" "Not triggered,Triggered"
|
|
bitfld.word 0x00 3. " S13 ,Trigger Enable for operation of SMC3" "Not triggered,Triggered"
|
|
textline " "
|
|
bitfld.word 0x00 2. " S12 ,Trigger Enable for operation of SMC2" "Not triggered,Triggered"
|
|
bitfld.word 0x00 1. " S11 ,Trigger Enable for operation of SMC1" "Not triggered,Triggered"
|
|
bitfld.word 0x00 0. " S10 ,Trigger Enable for operation of SMC0" "Not triggered,Triggered"
|
|
wgroup.byte 0x02++0x00
|
|
line.byte 0x00 "SMCTG0_PTRG,SMC Trigger Register"
|
|
bitfld.byte 0x00 1. " TR2 ,SMC Trigger 2" "No effect,Trigger"
|
|
bitfld.byte 0x00 0. " TR1 ,SMC Trigger 1" "No effect,Trigger"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree.open "CAN Controller"
|
|
tree "CAN 0"
|
|
base ad:0xb0808000
|
|
width 12.
|
|
group.byte 0xCE++0x0 "Device Related Register"
|
|
line.byte 0x0 "COER0,CAN Output Enable Register"
|
|
bitfld.byte 0x0 0. " OE ,Output Enable" "Disabled,Enabled"
|
|
width 12.
|
|
group.byte 0x0++0x0 "Protocol Related Registers"
|
|
line.byte 0x0 "CTRLR0,CAN Control Register"
|
|
bitfld.byte 0x0 7. " TEST ,Test Mode Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " CCE ,Configuration Change Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 5. " DAR ,Disable Automatic Retransmission" "No,Yes"
|
|
bitfld.byte 0x0 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 2. " SIE ,Status Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " IE ,Module Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " INIT ,Initialization" "Normal,Initialization"
|
|
hgroup.byte 0x2++0x0
|
|
hide.byte 0x0 "STATR0,Status Register"
|
|
in
|
|
rgroup.word 0x4++0x1
|
|
line.word 0x0 "ERRCNT0,Error Counter"
|
|
bitfld.word 0x0 15. " RP ,Receive Error Passive" "Below level,Reached level"
|
|
hexmask.word.byte 0x0 8.--14. 0x1 " REC ,Receive Error Counter"
|
|
hexmask.word.byte 0x0 0.--7. 0x1 " TEC ,Transmit Error Counter"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "BTR0,Bit Timing Register"
|
|
bitfld.word 0x0 12.--14. " TSEG2 ,The time segment after sample point" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x0 8.--11. " TSEG1 ,The time segment before sample point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x0 6.--7. " SJW ,(Re)Synchronisation Jump Width" "0,1,2,3"
|
|
bitfld.word 0x0 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.word 0xA++0x01
|
|
line.word 0x0 "TESTR0,Test Register"
|
|
rbitfld.word 0x0 7. " RX ,Monitors the actual value of the CAN_RX Pin" "Dominant,Recessive"
|
|
bitfld.word 0x0 5.--6. " TX ,Control of CAN_TX pin" "CAN Core,Sample point,Dominant,Recessive"
|
|
bitfld.word 0x0 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " SILENT ,Silent Mode" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " BASIC ,Basic Mode" "Disabled,Enabled"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BRPER0,BRP Extension Register"
|
|
bitfld.word 0x0 0.--3. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree "Message Interface Register Sets"
|
|
tree "IF1 Registers"
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "IF1CREQ0,IF1 Command Request Register"
|
|
bitfld.word 0x0 15. " BUSY ,Busy Flag" "Not busy,Busy"
|
|
hexmask.word.byte 0x0 0.--7. 0x1 " MSGN ,Message Number"
|
|
if (((d.b(ad:0xb0808000+0x10+0x2))&0x80)==0x80)
|
|
group.byte (0x10+0x2)++0x0
|
|
line.byte 0x0 "IF1CMSK0,IF1 Command Mask Register"
|
|
bitfld.byte 0x0 7. " WRRD ,Write/Read" "Read,Write"
|
|
bitfld.byte 0x0 6. " MASK ,Access Mask Bit" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 5. " ARB ,Access Arbitration Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 4. " CONTROL ,Access Control Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 2. " TXREQ ,Access Transmission Request Bit (TXRQST)" "Unchanged,Set"
|
|
bitfld.byte 0x0 1. " DATAA ,Access Data Bytes 0-3" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " DATAB ,Access Data Bytes 4-7" "Unchanged,Transferred"
|
|
else
|
|
group.byte (0x10+0x2)++0x0
|
|
line.byte 0x0 "IF1CMSK0,IF1 Command Mask Register"
|
|
bitfld.byte 0x0 7. " WRRD ,Write/Read" "Read,Write"
|
|
bitfld.byte 0x0 6. " MASK ,Access Mask Bit" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 5. " ARB ,Access Arbitration Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 4. " CONTROL ,Access Control Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 3. " CIP ,Clear Interrupt Pending Bit (INTPND)" "Unchanged,Cleared"
|
|
bitfld.byte 0x0 2. " TXREQ ,Access Transmission Request Bit (NEWDAT)" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " DATAA ,Access Data Bytes 0-3" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 0. " DATAB ,Access Data Bytes 4-7" "Unchanged,Transferred"
|
|
endif
|
|
group.word (0x10+0x4)++0x7
|
|
line.word 0x0 "IF1MSK10,IF1 Mask Registers 1"
|
|
bitfld.word 0x0 15. " MSK[15:0] ,Identifier Mask bit 15" "0,1"
|
|
bitfld.word 0x0 14. ",Identifier Mask bit 14" "0,1"
|
|
bitfld.word 0x0 13. ",Identifier Mask bit 13" "0,1"
|
|
bitfld.word 0x0 12. ",Identifier Mask bit 12" "0,1"
|
|
bitfld.word 0x0 11. ",Identifier Mask bit 11" "0,1"
|
|
bitfld.word 0x0 10. ",Identifier Mask bit 10" "0,1"
|
|
bitfld.word 0x0 9. ",Identifier Mask bit 9" "0,1"
|
|
bitfld.word 0x0 8. ",Identifier Mask bit 8" "0,1"
|
|
bitfld.word 0x0 7. ",Identifier Mask bit 7" "0,1"
|
|
bitfld.word 0x0 6. ",Identifier Mask bit 6" "0,1"
|
|
bitfld.word 0x0 5. ",Identifier Mask bit 5" "0,1"
|
|
bitfld.word 0x0 4. ",Identifier Mask bit 4" "0,1"
|
|
bitfld.word 0x0 3. ",Identifier Mask bit 3" "0,1"
|
|
bitfld.word 0x0 2. ",Identifier Mask bit 2" "0,1"
|
|
bitfld.word 0x0 1. ",Identifier Mask bit 1" "0,1"
|
|
bitfld.word 0x0 0. ",Identifier Mask bit 0" "0,1"
|
|
line.word 0x2 "IF1MSK20,IF1 Mask Registers 2 (Mask bits of Message Object)"
|
|
bitfld.word 0x2 15. " MXTD ,Mask Extended Identifier" "0,1"
|
|
bitfld.word 0x2 14. " MDIR ,Mask Message Direction (effect of DIR in filtering)" "0,1"
|
|
bitfld.word 0x2 12. " MSK[28:16] ,Identifier Mask bit 28" "0,1"
|
|
bitfld.word 0x2 11. ",Identifier Mask bit 27" "0,1"
|
|
bitfld.word 0x2 10. ",Identifier Mask bit 26" "0,1"
|
|
bitfld.word 0x2 9. ",Identifier Mask bit 25" "0,1"
|
|
bitfld.word 0x2 8. ",Identifier Mask bit 24" "0,1"
|
|
bitfld.word 0x2 7. ",Identifier Mask bit 23" "0,1"
|
|
bitfld.word 0x2 6. ",Identifier Mask bit 22" "0,1"
|
|
bitfld.word 0x2 5. ",Identifier Mask bit 21" "0,1"
|
|
bitfld.word 0x2 4. ",Identifier Mask bit 20" "0,1"
|
|
bitfld.word 0x2 3. ",Identifier Mask bit 19" "0,1"
|
|
bitfld.word 0x2 2. ",Identifier Mask bit 18" "0,1"
|
|
bitfld.word 0x2 1. ",Identifier Mask bit 17" "0,1"
|
|
bitfld.word 0x2 0. ",Identifier Mask bit 16" "0,1"
|
|
line.word 0x4 "IF1ARB10,IF1 Arbitration Register 1"
|
|
line.word 0x6 "IF1ARB20,IF1 Arbitration Registers 2"
|
|
bitfld.word 0x6 15. " MSGVAL ,Message Valid (Message Object is:)" "Invalid,Valid"
|
|
bitfld.word 0x6 14. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.word 0x6 13. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.word 0x6 0.--12. 1. " ID[28-16] ,Message Identifier bits 28...16"
|
|
if (((d.w(ad:0xb0808000+0x10+0xA))&0x2000)==0x2000)
|
|
group.word (0x10+0xC)++0x1
|
|
line.word 0x0 "IF1MCTR0,IF1 Message Control Register"
|
|
bitfld.word 0x0 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.word 0x0 13. " INTPND ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " UMASK ,Use Acceptance Mask" "Not used,Used"
|
|
bitfld.word 0x0 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " EOB ,End of FIFO Buffer" "No EOB,EOB"
|
|
bitfld.word 0x0 0.--3. " DLC[3:0] ,Data Length Code (in bytes)" "1,2,3,4,5,6,7,8,8,8,8,8,8,8,8,8"
|
|
else
|
|
group.word (0x10+0xC)++0x1
|
|
line.word 0x0 "IF1MCTR0,IF1 Message Control Register"
|
|
bitfld.word 0x0 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.word 0x0 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.word 0x0 13. " INTPND ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " UMASK ,Use Acceptance Mask" "Not used,Used"
|
|
bitfld.word 0x0 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " EOB ,End of FIFO Buffer" "No EOB,EOB"
|
|
bitfld.word 0x0 0.--3. " DLC ,Data Length Code (in bytes)" "1,2,3,4,5,6,7,8,8,8,8,8,8,8,8,8"
|
|
endif
|
|
group.word (0x10+0x10)++0x7
|
|
line.word 0x0 "IF1DTA10,IF1 Data A1 Register"
|
|
line.word 0x2 "IF1DTA20,IF1 Data A2 Register"
|
|
line.word 0x4 "IF1DTB10,IF1 Data B1 Register"
|
|
line.word 0x6 "IF1DTB20,IF1 Data B2 Register"
|
|
tree.end
|
|
tree "IF2 Registers"
|
|
group.word 0x40++0x1
|
|
line.word 0x0 "IF2CREQ0,IF2 Command Request Register"
|
|
bitfld.word 0x0 15. " BUSY ,Busy Flag" "Not busy,Busy"
|
|
hexmask.word.byte 0x0 0.--7. 0x1 " MSGN ,Message Number"
|
|
if (((d.b(ad:0xb0808000+0x40+0x2))&0x80)==0x80)
|
|
group.byte (0x40+0x2)++0x0
|
|
line.byte 0x0 "IF2CMSK0,IF2 Command Mask Register"
|
|
bitfld.byte 0x0 7. " WRRD ,Write/Read" "Read,Write"
|
|
bitfld.byte 0x0 6. " MASK ,Access Mask Bit" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 5. " ARB ,Access Arbitration Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 4. " CONTROL ,Access Control Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 2. " TXREQ ,Access Transmission Request Bit (TXRQST)" "Unchanged,Set"
|
|
bitfld.byte 0x0 1. " DATAA ,Access Data Bytes 0-3" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " DATAB ,Access Data Bytes 4-7" "Unchanged,Transferred"
|
|
else
|
|
group.byte (0x40+0x2)++0x0
|
|
line.byte 0x0 "IF2CMSK0,IF2 Command Mask Register"
|
|
bitfld.byte 0x0 7. " WRRD ,Write/Read" "Read,Write"
|
|
bitfld.byte 0x0 6. " MASK ,Access Mask Bit" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 5. " ARB ,Access Arbitration Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 4. " CONTROL ,Access Control Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 3. " CIP ,Clear Interrupt Pending Bit (INTPND)" "Unchanged,Cleared"
|
|
bitfld.byte 0x0 2. " TXREQ ,Access Transmission Request Bit (NEWDAT)" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " DATAA ,Access Data Bytes 0-3" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 0. " DATAB ,Access Data Bytes 4-7" "Unchanged,Transferred"
|
|
endif
|
|
group.word (0x40+0x4)++0x7
|
|
line.word 0x0 "IF2MSK10,IF2 Mask Registers 1"
|
|
bitfld.word 0x0 15. " MSK[15:0] ,Identifier Mask bit 15" "0,1"
|
|
bitfld.word 0x0 14. ",Identifier Mask bit 14" "0,1"
|
|
bitfld.word 0x0 13. ",Identifier Mask bit 13" "0,1"
|
|
bitfld.word 0x0 12. ",Identifier Mask bit 12" "0,1"
|
|
bitfld.word 0x0 11. ",Identifier Mask bit 11" "0,1"
|
|
bitfld.word 0x0 10. ",Identifier Mask bit 10" "0,1"
|
|
bitfld.word 0x0 9. ",Identifier Mask bit 9" "0,1"
|
|
bitfld.word 0x0 8. ",Identifier Mask bit 8" "0,1"
|
|
bitfld.word 0x0 7. ",Identifier Mask bit 7" "0,1"
|
|
bitfld.word 0x0 6. ",Identifier Mask bit 6" "0,1"
|
|
bitfld.word 0x0 5. ",Identifier Mask bit 5" "0,1"
|
|
bitfld.word 0x0 4. ",Identifier Mask bit 4" "0,1"
|
|
bitfld.word 0x0 3. ",Identifier Mask bit 3" "0,1"
|
|
bitfld.word 0x0 2. ",Identifier Mask bit 2" "0,1"
|
|
bitfld.word 0x0 1. ",Identifier Mask bit 1" "0,1"
|
|
bitfld.word 0x0 0. ",Identifier Mask bit 0" "0,1"
|
|
line.word 0x2 "IF2MSK20,IF2 Mask Registers 2 (Mask bits of Message Object)"
|
|
bitfld.word 0x2 15. " MXTD ,Mask Extended Identifier" "0,1"
|
|
bitfld.word 0x2 14. " MDIR ,Mask Message Direction (effect of DIR in filtering)" "0,1"
|
|
bitfld.word 0x2 12. " MSK[28:16] ,Identifier Mask bit 28" "0,1"
|
|
bitfld.word 0x2 11. ",Identifier Mask bit 27" "0,1"
|
|
bitfld.word 0x2 10. ",Identifier Mask bit 26" "0,1"
|
|
bitfld.word 0x2 9. ",Identifier Mask bit 25" "0,1"
|
|
bitfld.word 0x2 8. ",Identifier Mask bit 24" "0,1"
|
|
bitfld.word 0x2 7. ",Identifier Mask bit 23" "0,1"
|
|
bitfld.word 0x2 6. ",Identifier Mask bit 22" "0,1"
|
|
bitfld.word 0x2 5. ",Identifier Mask bit 21" "0,1"
|
|
bitfld.word 0x2 4. ",Identifier Mask bit 20" "0,1"
|
|
bitfld.word 0x2 3. ",Identifier Mask bit 19" "0,1"
|
|
bitfld.word 0x2 2. ",Identifier Mask bit 18" "0,1"
|
|
bitfld.word 0x2 1. ",Identifier Mask bit 17" "0,1"
|
|
bitfld.word 0x2 0. ",Identifier Mask bit 16" "0,1"
|
|
line.word 0x4 "IF2ARB10,IF2 Arbitration Register 1"
|
|
line.word 0x6 "IF2ARB20,IF2 Arbitration Registers 2"
|
|
bitfld.word 0x6 15. " MSGVAL ,Message Valid (Message Object is:)" "Invalid,Valid"
|
|
bitfld.word 0x6 14. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.word 0x6 13. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.word 0x6 0.--12. 1. " ID[28-16] ,Message Identifier bits 28...16"
|
|
if (((d.w(ad:0xb0808000+0x40+0xA))&0x2000)==0x2000)
|
|
group.word (0x40+0xC)++0x1
|
|
line.word 0x0 "IF2MCTR0,IF2 Message Control Register"
|
|
bitfld.word 0x0 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.word 0x0 13. " INTPND ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " UMASK ,Use Acceptance Mask" "Not used,Used"
|
|
bitfld.word 0x0 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " EOB ,End of FIFO Buffer" "No EOB,EOB"
|
|
bitfld.word 0x0 0.--3. " DLC[3:0] ,Data Length Code (in bytes)" "1,2,3,4,5,6,7,8,8,8,8,8,8,8,8,8"
|
|
else
|
|
group.word (0x40+0xC)++0x1
|
|
line.word 0x0 "IF2MCTR0,IF2 Message Control Register"
|
|
bitfld.word 0x0 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.word 0x0 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.word 0x0 13. " INTPND ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " UMASK ,Use Acceptance Mask" "Not used,Used"
|
|
bitfld.word 0x0 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " EOB ,End of FIFO Buffer" "No EOB,EOB"
|
|
bitfld.word 0x0 0.--3. " DLC ,Data Length Code (in bytes)" "1,2,3,4,5,6,7,8,8,8,8,8,8,8,8,8"
|
|
endif
|
|
group.word (0x40+0x10)++0x7
|
|
line.word 0x0 "IF2DTA10,IF2 Data A1 Register"
|
|
line.word 0x2 "IF2DTA20,IF2 Data A2 Register"
|
|
line.word 0x4 "IF2DTB10,IF2 Data B1 Register"
|
|
line.word 0x6 "IF2DTB20,IF2 Data B2 Register"
|
|
tree.end
|
|
tree.end
|
|
tree "Message Handler Registers"
|
|
rgroup.word 0x8++0x1 "Interrupt Register"
|
|
line.word 0x0 "INTR0,Interrupt Register (Source of Interrupt)"
|
|
tree "Transmission Request Registers"
|
|
rgroup.word 0x80++0x7
|
|
line.word 0x0 "TREQR10,Transmission Request Register for Message Objects 16-1"
|
|
bitfld.word 0x0 15. " TXRQST[16] ,Transmission Request MO 16" "Not requested,Requested"
|
|
bitfld.word 0x0 14. " [15] ,Transmission Request MO 15" "Not requested,Requested"
|
|
bitfld.word 0x0 13. " [14] ,Transmission Request MO 14" "Not requested,Requested"
|
|
bitfld.word 0x0 12. " [13] ,Transmission Request MO 13" "Not requested,Requested"
|
|
bitfld.word 0x0 11. " [12] ,Transmission Request MO 12" "Not requested,Requested"
|
|
bitfld.word 0x0 10. " [11] ,Transmission Request MO 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [10] ,Transmission Request MO 10" "Not requested,Requested"
|
|
bitfld.word 0x0 8. " [9] ,Transmission Request MO 9" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " [8] ,Transmission Request MO 8" "Not requested,Requested"
|
|
bitfld.word 0x0 6. " [7] ,Transmission Request MO 7" "Not requested,Requested"
|
|
bitfld.word 0x0 5. " [6] ,Transmission Request MO 6" "Not requested,Requested"
|
|
bitfld.word 0x0 4. " [5] ,Transmission Request MO 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [4] ,Transmission Request MO 4" "Not requested,Requested"
|
|
bitfld.word 0x0 2. " [3] ,Transmission Request MO 3" "Not requested,Requested"
|
|
bitfld.word 0x0 1. " [2] ,Transmission Request MO 2" "Not requested,Requested"
|
|
bitfld.word 0x0 0. " [1] ,Transmission Request MO 1" "Not requested,Requested"
|
|
line.word 0x2 "TREQR20,Transmission Request Register for Message Objects 32-17"
|
|
bitfld.word 0x2 15. " TXRQST[32] ,Transmission Request MO 32" "Not requested,Requested"
|
|
bitfld.word 0x2 14. " [31] ,Transmission Request MO 31" "Not requested,Requested"
|
|
bitfld.word 0x2 13. " [30] ,Transmission Request MO 30" "Not requested,Requested"
|
|
bitfld.word 0x2 12. " [29] ,Transmission Request MO 29" "Not requested,Requested"
|
|
bitfld.word 0x2 11. " [28] ,Transmission Request MO 28" "Not requested,Requested"
|
|
bitfld.word 0x2 10. " [27] ,Transmission Request MO 27" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [26] ,Transmission Request MO 26" "Not requested,Requested"
|
|
bitfld.word 0x2 8. " [25] ,Transmission Request MO 25" "Not requested,Requested"
|
|
bitfld.word 0x2 7. " [24] ,Transmission Request MO 24" "Not requested,Requested"
|
|
bitfld.word 0x2 6. " [23] ,Transmission Request MO 23" "Not requested,Requested"
|
|
bitfld.word 0x2 5. " [22] ,Transmission Request MO 22" "Not requested,Requested"
|
|
bitfld.word 0x2 4. " [21] ,Transmission Request MO 21" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [20] ,Transmission Request MO 20" "Not requested,Requested"
|
|
bitfld.word 0x2 2. " [19] ,Transmission Request MO 19" "Not requested,Requested"
|
|
bitfld.word 0x2 1. " [18] ,Transmission Request MO 18" "Not requested,Requested"
|
|
bitfld.word 0x2 0. " [17] ,Transmission Request MO 17" "Not requested,Requested"
|
|
line.word 0x4 "TREQR30,Transmission Request Register for Message Objects 48-33"
|
|
bitfld.word 0x4 15. " TXRQST[48] ,Transmission Request MO 48" "Not requested,Requested"
|
|
bitfld.word 0x4 14. " [47] ,Transmission Request MO 47" "Not requested,Requested"
|
|
bitfld.word 0x4 13. " [46] ,Transmission Request MO 46" "Not requested,Requested"
|
|
bitfld.word 0x4 12. " [45] ,Transmission Request MO 45" "Not requested,Requested"
|
|
bitfld.word 0x4 11. " [44] ,Transmission Request MO 44" "Not requested,Requested"
|
|
bitfld.word 0x4 10. " [43] ,Transmission Request MO 43" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x4 9. " [42] ,Transmission Request MO 42" "Not requested,Requested"
|
|
bitfld.word 0x4 8. " [41] ,Transmission Request MO 41" "Not requested,Requested"
|
|
bitfld.word 0x4 7. " [40] ,Transmission Request MO 40" "Not requested,Requested"
|
|
bitfld.word 0x4 6. " [39] ,Transmission Request MO 39" "Not requested,Requested"
|
|
bitfld.word 0x4 5. " [38] ,Transmission Request MO 38" "Not requested,Requested"
|
|
bitfld.word 0x4 4. " [37] ,Transmission Request MO 37" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x4 3. " [36] ,Transmission Request MO 36" "Not requested,Requested"
|
|
bitfld.word 0x4 2. " [35] ,Transmission Request MO 35" "Not requested,Requested"
|
|
bitfld.word 0x4 1. " [34] ,Transmission Request MO 34" "Not requested,Requested"
|
|
bitfld.word 0x4 0. " [33] ,Transmission Request MO 33" "Not requested,Requested"
|
|
line.word 0x6 "TREQR40,Transmission Request Register for Message Objects 64-49"
|
|
bitfld.word 0x6 15. " TXRQST[64] ,Transmission Request MO 64" "Not requested,Requested"
|
|
bitfld.word 0x6 14. " [63] ,Transmission Request MO 63" "Not requested,Requested"
|
|
bitfld.word 0x6 13. " [62] ,Transmission Request MO 62" "Not requested,Requested"
|
|
bitfld.word 0x6 12. " [61] ,Transmission Request MO 61" "Not requested,Requested"
|
|
bitfld.word 0x6 11. " [60] ,Transmission Request MO 60" "Not requested,Requested"
|
|
bitfld.word 0x6 10. " [59] ,Transmission Request MO 59" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x6 9. " [58] ,Transmission Request MO 58" "Not requested,Requested"
|
|
bitfld.word 0x6 8. " [57] ,Transmission Request MO 57" "Not requested,Requested"
|
|
bitfld.word 0x6 7. " [56] ,Transmission Request MO 56" "Not requested,Requested"
|
|
bitfld.word 0x6 6. " [55] ,Transmission Request MO 55" "Not requested,Requested"
|
|
bitfld.word 0x6 5. " [54] ,Transmission Request MO 54" "Not requested,Requested"
|
|
bitfld.word 0x6 4. " [53] ,Transmission Request MO 53" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x6 3. " [52] ,Transmission Request MO 52" "Not requested,Requested"
|
|
bitfld.word 0x6 2. " [51] ,Transmission Request MO 51" "Not requested,Requested"
|
|
bitfld.word 0x6 1. " [50] ,Transmission Request MO 50" "Not requested,Requested"
|
|
bitfld.word 0x6 0. " [49] ,Transmission Request MO 49" "Not requested,Requested"
|
|
tree.end
|
|
tree "New Data Registers"
|
|
rgroup.word 0x90++0x7
|
|
line.word 0x0 "NEWDT10,New Data Register for Message Objects 16-1"
|
|
bitfld.word 0x0 15. " NEWDAT[16] ,New Data on MO 16" "No new data,New data"
|
|
bitfld.word 0x0 14. " [15] ,New Data on MO 15" "No new data,New data"
|
|
bitfld.word 0x0 13. " [14] ,New Data on MO 14" "No new data,New data"
|
|
bitfld.word 0x0 12. " [13] ,New Data on MO 13" "No new data,New data"
|
|
bitfld.word 0x0 11. " [12] ,New Data on MO 12" "No new data,New data"
|
|
bitfld.word 0x0 10. " [11] ,New Data on MO 11" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [10] ,New Data on MO 10" "No new data,New data"
|
|
bitfld.word 0x0 8. " [9] ,New Data on MO 9" "No new data,New data"
|
|
bitfld.word 0x0 7. " [8] ,New Data on MO 8" "No new data,New data"
|
|
bitfld.word 0x0 6. " [7] ,New Data on MO 7" "No new data,New data"
|
|
bitfld.word 0x0 5. " [6] ,New Data on MO 6" "No new data,New data"
|
|
bitfld.word 0x0 4. " [5] ,New Data on MO 5" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [4] ,New Data on MO 4" "No new data,New data"
|
|
bitfld.word 0x0 2. " [3] ,New Data on MO 3" "No new data,New data"
|
|
bitfld.word 0x0 1. " [2] ,New Data on MO 2" "No new data,New data"
|
|
bitfld.word 0x0 0. " [1] ,New Data on MO 1" "No new data,New data"
|
|
line.word 0x2 "NEWDT20,New Data Register for Message Objects 32-17"
|
|
bitfld.word 0x2 15. " NEWDAT[32] ,New Data on MO 32" "No new data,New data"
|
|
bitfld.word 0x2 14. " [31] ,New Data on MO 31" "No new data,New data"
|
|
bitfld.word 0x2 13. " [30] ,New Data on MO 30" "No new data,New data"
|
|
bitfld.word 0x2 12. " [29] ,New Data on MO 29" "No new data,New data"
|
|
bitfld.word 0x2 11. " [28] ,New Data on MO 28" "No new data,New data"
|
|
bitfld.word 0x2 10. " [27] ,New Data on MO 27" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [26] ,New Data on MO 26" "No new data,New data"
|
|
bitfld.word 0x2 8. " [25] ,New Data on MO 25" "No new data,New data"
|
|
bitfld.word 0x2 7. " [24] ,New Data on MO 24" "No new data,New data"
|
|
bitfld.word 0x2 6. " [23] ,New Data on MO 23" "No new data,New data"
|
|
bitfld.word 0x2 5. " [22] ,New Data on MO 22" "No new data,New data"
|
|
bitfld.word 0x2 4. " [21] ,New Data on MO 21" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [20] ,New Data on MO 20" "No new data,New data"
|
|
bitfld.word 0x2 2. " [19] ,New Data on MO 19" "No new data,New data"
|
|
bitfld.word 0x2 1. " [18] ,New Data on MO 18" "No new data,New data"
|
|
bitfld.word 0x2 0. " [17] ,New Data on MO 17" "No new data,New data"
|
|
line.word 0x4 "NEWDT30,New Data Register for Message Objects 48-33"
|
|
bitfld.word 0x4 15. " NEWDAT[48] ,New Data on MO 48" "No new data,New data"
|
|
bitfld.word 0x4 14. " [47] ,New Data on MO 47" "No new data,New data"
|
|
bitfld.word 0x4 13. " [46] ,New Data on MO 46" "No new data,New data"
|
|
bitfld.word 0x4 12. " [45] ,New Data on MO 45" "No new data,New data"
|
|
bitfld.word 0x4 11. " [44] ,New Data on MO 44" "No new data,New data"
|
|
bitfld.word 0x4 10. " [43] ,New Data on MO 43" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x4 9. " [42] ,New Data on MO 42" "No new data,New data"
|
|
bitfld.word 0x4 8. " [41] ,New Data on MO 41" "No new data,New data"
|
|
bitfld.word 0x4 7. " [40] ,New Data on MO 40" "No new data,New data"
|
|
bitfld.word 0x4 6. " [39] ,New Data on MO 39" "No new data,New data"
|
|
bitfld.word 0x4 5. " [38] ,New Data on MO 38" "No new data,New data"
|
|
bitfld.word 0x4 4. " [37] ,New Data on MO 37" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x4 3. " [36] ,New Data on MO 36" "No new data,New data"
|
|
bitfld.word 0x4 2. " [35] ,New Data on MO 35" "No new data,New data"
|
|
bitfld.word 0x4 1. " [34] ,New Data on MO 34" "No new data,New data"
|
|
bitfld.word 0x4 0. " [33] ,New Data on MO 33" "No new data,New data"
|
|
line.word 0x6 "NEWDT40,New Data Register for Message Objects 64-49"
|
|
bitfld.word 0x6 15. " NEWDAT[64] ,New Data on MO 64" "No new data,New data"
|
|
bitfld.word 0x6 14. " [63] ,New Data on MO 63" "No new data,New data"
|
|
bitfld.word 0x6 13. " [62] ,New Data on MO 62" "No new data,New data"
|
|
bitfld.word 0x6 12. " [61] ,New Data on MO 61" "No new data,New data"
|
|
bitfld.word 0x6 11. " [60] ,New Data on MO 60" "No new data,New data"
|
|
bitfld.word 0x6 10. " [59] ,New Data on MO 59" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x6 9. " [58] ,New Data on MO 58" "No new data,New data"
|
|
bitfld.word 0x6 8. " [57] ,New Data on MO 57" "No new data,New data"
|
|
bitfld.word 0x6 7. " [56] ,New Data on MO 56" "No new data,New data"
|
|
bitfld.word 0x6 6. " [55] ,New Data on MO 55" "No new data,New data"
|
|
bitfld.word 0x6 5. " [54] ,New Data on MO 54" "No new data,New data"
|
|
bitfld.word 0x6 4. " [53] ,New Data on MO 53" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x6 3. " [52] ,New Data on MO 52" "No new data,New data"
|
|
bitfld.word 0x6 2. " [51] ,New Data on MO 51" "No new data,New data"
|
|
bitfld.word 0x6 1. " [50] ,New Data on MO 50" "No new data,New data"
|
|
bitfld.word 0x6 0. " [49] ,New Data on MO 49" "No new data,New data"
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
rgroup.word 0xA0++0x7
|
|
line.word 0x0 "INTPND10,Interrupt Pending Register for Message Objects 16-1"
|
|
bitfld.word 0x0 15. " INTPND[16] ,MO 16 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 14. " [15] ,MO 15 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 13. " [14] ,MO 14 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " [13] ,MO 13 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 11. " [12] ,MO 12 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 10. " [11] ,MO 11 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [10] ,MO 10 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 8. " [9] ,MO 9 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 7. " [8] ,MO 8 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 6. " [7] ,MO 7 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 5. " [6] ,MO 6 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 4. " [5] ,MO 5 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [4] ,MO 4 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 2. " [3] ,MO 3 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 1. " [2] ,MO 2 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 0. " [1] ,MO 1 Interrupt Pending" "Not pending,Pending"
|
|
line.word 0x2 "INTPND20,Interrupt Pending Register for Message Objects 32-17"
|
|
bitfld.word 0x2 15. " INTPND[32] ,MO 32 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 14. " [31] ,MO 31 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 13. " [30] ,MO 30 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 12. " [29] ,MO 29 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 11. " [28] ,MO 28 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 10. " [27] ,MO 27 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [26] ,MO 26 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 8. " [25] ,MO 25 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 7. " [24] ,MO 24 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 6. " [23] ,MO 23 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 5. " [22] ,MO 22 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 4. " [21] ,MO 21 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [20] ,MO 20 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 2. " [19] ,MO 19 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 1. " [18] ,MO 18 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 0. " [17] ,MO 17 Interrupt Pending" "Not pending,Pending"
|
|
line.word 0x4 "INTPND30,Interrupt Pending Register for Message Objects 48-33"
|
|
bitfld.word 0x4 15. " INTPND[48] ,MO 48 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 14. " [47] ,MO 47 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 13. " [46] ,MO 46 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 12. " [45] ,MO 45 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 11. " [44] ,MO 44 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 10. " [43] ,MO 43 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x4 9. " [42] ,MO 42 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 8. " [41] ,MO 41 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 7. " [40] ,MO 40 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 6. " [39] ,MO 39 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 5. " [38] ,MO 38 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 4. " [37] ,MO 37 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x4 3. " [36] ,MO 36 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 2. " [35] ,MO 35 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 1. " [34] ,MO 34 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 0. " [33] ,MO 33 Interrupt Pending" "Not pending,Pending"
|
|
line.word 0x6 "INTPND40,Interrupt Pending Register for Message Objects 64-49"
|
|
bitfld.word 0x6 15. " INTPND[64] ,MO 64 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 14. " [63] ,MO 63 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 13. " [62] ,MO 62 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 12. " [61] ,MO 61 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 11. " [60] ,MO 60 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 10. " [59] ,MO 59 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x6 9. " [58] ,MO 58 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 8. " [57] ,MO 57 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 7. " [56] ,MO 56 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 6. " [55] ,MO 55 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 5. " [54] ,MO 54 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 4. " [53] ,MO 53 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x6 3. " [52] ,MO 52 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 2. " [51] ,MO 51 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 1. " [50] ,MO 50 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 0. " [49] ,MO 49 Interrupt Pending" "Not pending,Pending"
|
|
tree.end
|
|
width 12.
|
|
tree "Message Valid Registers"
|
|
rgroup.word 0xB0++0x7
|
|
line.word 0x0 "MSGVAL10,Message Valid Register for Message Objects 16-1"
|
|
bitfld.word 0x0 15. " MSGVAL[16] ,Validity status of MO 16" "Not valid,Valid"
|
|
bitfld.word 0x0 14. " [15] ,Validity status of MO 15" "Not valid,Valid"
|
|
bitfld.word 0x0 13. " [14] ,Validity status of MO 14" "Not valid,Valid"
|
|
bitfld.word 0x0 12. " [13] ,Validity status of MO 13" "Not valid,Valid"
|
|
bitfld.word 0x0 11. " [12] ,Validity status of MO 12" "Not valid,Valid"
|
|
bitfld.word 0x0 10. " [11] ,Validity status of MO 11" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [10] ,Validity status of MO 10" "Not valid,Valid"
|
|
bitfld.word 0x0 8. " [9] ,Validity status of MO 9" "Not valid,Valid"
|
|
bitfld.word 0x0 7. " [8] ,Validity status of MO 8" "Not valid,Valid"
|
|
bitfld.word 0x0 6. " [7] ,Validity status of MO 7" "Not valid,Valid"
|
|
bitfld.word 0x0 5. " [6] ,Validity status of MO 6" "Not valid,Valid"
|
|
bitfld.word 0x0 4. " [5] ,Validity status of MO 5" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [4] ,Validity status of MO 4" "Not valid,Valid"
|
|
bitfld.word 0x0 2. " [3] ,Validity status of MO 3" "Not valid,Valid"
|
|
bitfld.word 0x0 1. " [2] ,Validity status of MO 2" "Not valid,Valid"
|
|
bitfld.word 0x0 0. " [1] ,Validity status of MO 1" "Not valid,Valid"
|
|
line.word 0x2 "MSGVAL20,Message Valid Register for Message Objects 32-17"
|
|
bitfld.word 0x2 15. " MSGVAL[32] ,Validity status of MO 32" "Not valid,Valid"
|
|
bitfld.word 0x2 14. " [31] ,Validity status of MO 31" "Not valid,Valid"
|
|
bitfld.word 0x2 13. " [30] ,Validity status of MO 30" "Not valid,Valid"
|
|
bitfld.word 0x2 12. " [29] ,Validity status of MO 29" "Not valid,Valid"
|
|
bitfld.word 0x2 11. " [28] ,Validity status of MO 28" "Not valid,Valid"
|
|
bitfld.word 0x2 10. " [27] ,Validity status of MO 27" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [26] ,Validity status of MO 26" "Not valid,Valid"
|
|
bitfld.word 0x2 8. " [25] ,Validity status of MO 25" "Not valid,Valid"
|
|
bitfld.word 0x2 7. " [24] ,Validity status of MO 24" "Not valid,Valid"
|
|
bitfld.word 0x2 6. " [23] ,Validity status of MO 23" "Not valid,Valid"
|
|
bitfld.word 0x2 5. " [22] ,Validity status of MO 22" "Not valid,Valid"
|
|
bitfld.word 0x2 4. " [21] ,Validity status of MO 21" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [20] ,Validity status of MO 20" "Not valid,Valid"
|
|
bitfld.word 0x2 2. " [19] ,Validity status of MO 19" "Not valid,Valid"
|
|
bitfld.word 0x2 1. " [18] ,Validity status of MO 18" "Not valid,Valid"
|
|
bitfld.word 0x2 0. " [17] ,Validity status of MO 17" "Not valid,Valid"
|
|
line.word 0x4 "MSGVAL30,Message Valid Register for Message Objects 48-33"
|
|
bitfld.word 0x4 15. " MSGVAL[48] ,Validity status of MO 48" "Not valid,Valid"
|
|
bitfld.word 0x4 14. " [47] ,Validity status of MO 47" "Not valid,Valid"
|
|
bitfld.word 0x4 13. " [46] ,Validity status of MO 46" "Not valid,Valid"
|
|
bitfld.word 0x4 12. " [45] ,Validity status of MO 45" "Not valid,Valid"
|
|
bitfld.word 0x4 11. " [44] ,Validity status of MO 44" "Not valid,Valid"
|
|
bitfld.word 0x4 10. " [43] ,Validity status of MO 43" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x4 9. " [42] ,Validity status of MO 42" "Not valid,Valid"
|
|
bitfld.word 0x4 8. " [41] ,Validity status of MO 41" "Not valid,Valid"
|
|
bitfld.word 0x4 7. " [40] ,Validity status of MO 40" "Not valid,Valid"
|
|
bitfld.word 0x4 6. " [39] ,Validity status of MO 39" "Not valid,Valid"
|
|
bitfld.word 0x4 5. " [38] ,Validity status of MO 38" "Not valid,Valid"
|
|
bitfld.word 0x4 4. " [37] ,Validity status of MO 37" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x4 3. " [36] ,Validity status of MO 36" "Not valid,Valid"
|
|
bitfld.word 0x4 2. " [35] ,Validity status of MO 35" "Not valid,Valid"
|
|
bitfld.word 0x4 1. " [34] ,Validity status of MO 34" "Not valid,Valid"
|
|
bitfld.word 0x4 0. " [33] ,Validity status of MO 33" "Not valid,Valid"
|
|
line.word 0x6 "MSGVAL40,Message Valid Register for Message Objects 64-49"
|
|
bitfld.word 0x6 15. " MSGVAL[64] ,Validity status of MO 64" "Not valid,Valid"
|
|
bitfld.word 0x6 14. " [63] ,Validity status of MO 63" "Not valid,Valid"
|
|
bitfld.word 0x6 13. " [62] ,Validity status of MO 62" "Not valid,Valid"
|
|
bitfld.word 0x6 12. " [61] ,Validity status of MO 61" "Not valid,Valid"
|
|
bitfld.word 0x6 11. " [60] ,Validity status of MO 60" "Not valid,Valid"
|
|
bitfld.word 0x6 10. " [59] ,Validity status of MO 59" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x6 9. " [58] ,Validity status of MO 58" "Not valid,Valid"
|
|
bitfld.word 0x6 8. " [57] ,Validity status of MO 57" "Not valid,Valid"
|
|
bitfld.word 0x6 7. " [56] ,Validity status of MO 56" "Not valid,Valid"
|
|
bitfld.word 0x6 6. " [55] ,Validity status of MO 55" "Not valid,Valid"
|
|
bitfld.word 0x6 5. " [54] ,Validity status of MO 54" "Not valid,Valid"
|
|
bitfld.word 0x6 4. " [53] ,Validity status of MO 53" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x6 3. " [52] ,Validity status of MO 52" "Not valid,Valid"
|
|
bitfld.word 0x6 2. " [51] ,Validity status of MO 51" "Not valid,Valid"
|
|
bitfld.word 0x6 1. " [50] ,Validity status of MO 50" "Not valid,Valid"
|
|
bitfld.word 0x6 0. " [49] ,Validity status of MO 49" "Not valid,Valid"
|
|
tree.end
|
|
tree.end
|
|
width 12.
|
|
tree "Debug Register"
|
|
group.word 0xD0++0x1
|
|
line.word 0x0 "DEBUG0,Debug Register"
|
|
bitfld.word 0x0 1. " DBGLB ,Debug Loop Back Mode Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " DBGSL ,Debug Silent Mode Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 12.
|
|
tree.end
|
|
tree "CAN 1"
|
|
base ad:0xB0808400
|
|
width 12.
|
|
group.byte 0xCE++0x0 "Device Related Register"
|
|
line.byte 0x0 "COER1,CAN Output Enable Register"
|
|
bitfld.byte 0x0 0. " OE ,Output Enable" "Disabled,Enabled"
|
|
width 12.
|
|
group.byte 0x0++0x0 "Protocol Related Registers"
|
|
line.byte 0x0 "CTRLR1,CAN Control Register"
|
|
bitfld.byte 0x0 7. " TEST ,Test Mode Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " CCE ,Configuration Change Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 5. " DAR ,Disable Automatic Retransmission" "No,Yes"
|
|
bitfld.byte 0x0 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 2. " SIE ,Status Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " IE ,Module Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " INIT ,Initialization" "Normal,Initialization"
|
|
hgroup.byte 0x2++0x0
|
|
hide.byte 0x0 "STATR1,Status Register"
|
|
in
|
|
rgroup.word 0x4++0x1
|
|
line.word 0x0 "ERRCNT1,Error Counter"
|
|
bitfld.word 0x0 15. " RP ,Receive Error Passive" "Below level,Reached level"
|
|
hexmask.word.byte 0x0 8.--14. 0x1 " REC ,Receive Error Counter"
|
|
hexmask.word.byte 0x0 0.--7. 0x1 " TEC ,Transmit Error Counter"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "BTR1,Bit Timing Register"
|
|
bitfld.word 0x0 12.--14. " TSEG2 ,The time segment after sample point" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x0 8.--11. " TSEG1 ,The time segment before sample point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x0 6.--7. " SJW ,(Re)Synchronisation Jump Width" "0,1,2,3"
|
|
bitfld.word 0x0 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.word 0xA++0x01
|
|
line.word 0x0 "TESTR1,Test Register"
|
|
rbitfld.word 0x0 7. " RX ,Monitors the actual value of the CAN_RX Pin" "Dominant,Recessive"
|
|
bitfld.word 0x0 5.--6. " TX ,Control of CAN_TX pin" "CAN Core,Sample point,Dominant,Recessive"
|
|
bitfld.word 0x0 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " SILENT ,Silent Mode" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " BASIC ,Basic Mode" "Disabled,Enabled"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BRPER1,BRP Extension Register"
|
|
bitfld.word 0x0 0.--3. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree "Message Interface Register Sets"
|
|
tree "IF1 Registers"
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "IF1CREQ1,IF1 Command Request Register"
|
|
bitfld.word 0x0 15. " BUSY ,Busy Flag" "Not busy,Busy"
|
|
hexmask.word.byte 0x0 0.--7. 0x1 " MSGN ,Message Number"
|
|
if (((d.b(ad:0xB0808400+0x10+0x2))&0x80)==0x80)
|
|
group.byte (0x10+0x2)++0x0
|
|
line.byte 0x0 "IF1CMSK1,IF1 Command Mask Register"
|
|
bitfld.byte 0x0 7. " WRRD ,Write/Read" "Read,Write"
|
|
bitfld.byte 0x0 6. " MASK ,Access Mask Bit" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 5. " ARB ,Access Arbitration Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 4. " CONTROL ,Access Control Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 2. " TXREQ ,Access Transmission Request Bit (TXRQST)" "Unchanged,Set"
|
|
bitfld.byte 0x0 1. " DATAA ,Access Data Bytes 0-3" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " DATAB ,Access Data Bytes 4-7" "Unchanged,Transferred"
|
|
else
|
|
group.byte (0x10+0x2)++0x0
|
|
line.byte 0x0 "IF1CMSK1,IF1 Command Mask Register"
|
|
bitfld.byte 0x0 7. " WRRD ,Write/Read" "Read,Write"
|
|
bitfld.byte 0x0 6. " MASK ,Access Mask Bit" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 5. " ARB ,Access Arbitration Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 4. " CONTROL ,Access Control Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 3. " CIP ,Clear Interrupt Pending Bit (INTPND)" "Unchanged,Cleared"
|
|
bitfld.byte 0x0 2. " TXREQ ,Access Transmission Request Bit (NEWDAT)" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " DATAA ,Access Data Bytes 0-3" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 0. " DATAB ,Access Data Bytes 4-7" "Unchanged,Transferred"
|
|
endif
|
|
group.word (0x10+0x4)++0x7
|
|
line.word 0x0 "IF1MSK11,IF1 Mask Registers 1"
|
|
bitfld.word 0x0 15. " MSK[15:0] ,Identifier Mask bit 15" "0,1"
|
|
bitfld.word 0x0 14. ",Identifier Mask bit 14" "0,1"
|
|
bitfld.word 0x0 13. ",Identifier Mask bit 13" "0,1"
|
|
bitfld.word 0x0 12. ",Identifier Mask bit 12" "0,1"
|
|
bitfld.word 0x0 11. ",Identifier Mask bit 11" "0,1"
|
|
bitfld.word 0x0 10. ",Identifier Mask bit 10" "0,1"
|
|
bitfld.word 0x0 9. ",Identifier Mask bit 9" "0,1"
|
|
bitfld.word 0x0 8. ",Identifier Mask bit 8" "0,1"
|
|
bitfld.word 0x0 7. ",Identifier Mask bit 7" "0,1"
|
|
bitfld.word 0x0 6. ",Identifier Mask bit 6" "0,1"
|
|
bitfld.word 0x0 5. ",Identifier Mask bit 5" "0,1"
|
|
bitfld.word 0x0 4. ",Identifier Mask bit 4" "0,1"
|
|
bitfld.word 0x0 3. ",Identifier Mask bit 3" "0,1"
|
|
bitfld.word 0x0 2. ",Identifier Mask bit 2" "0,1"
|
|
bitfld.word 0x0 1. ",Identifier Mask bit 1" "0,1"
|
|
bitfld.word 0x0 0. ",Identifier Mask bit 0" "0,1"
|
|
line.word 0x2 "IF1MSK21,IF1 Mask Registers 2 (Mask bits of Message Object)"
|
|
bitfld.word 0x2 15. " MXTD ,Mask Extended Identifier" "0,1"
|
|
bitfld.word 0x2 14. " MDIR ,Mask Message Direction (effect of DIR in filtering)" "0,1"
|
|
bitfld.word 0x2 12. " MSK[28:16] ,Identifier Mask bit 28" "0,1"
|
|
bitfld.word 0x2 11. ",Identifier Mask bit 27" "0,1"
|
|
bitfld.word 0x2 10. ",Identifier Mask bit 26" "0,1"
|
|
bitfld.word 0x2 9. ",Identifier Mask bit 25" "0,1"
|
|
bitfld.word 0x2 8. ",Identifier Mask bit 24" "0,1"
|
|
bitfld.word 0x2 7. ",Identifier Mask bit 23" "0,1"
|
|
bitfld.word 0x2 6. ",Identifier Mask bit 22" "0,1"
|
|
bitfld.word 0x2 5. ",Identifier Mask bit 21" "0,1"
|
|
bitfld.word 0x2 4. ",Identifier Mask bit 20" "0,1"
|
|
bitfld.word 0x2 3. ",Identifier Mask bit 19" "0,1"
|
|
bitfld.word 0x2 2. ",Identifier Mask bit 18" "0,1"
|
|
bitfld.word 0x2 1. ",Identifier Mask bit 17" "0,1"
|
|
bitfld.word 0x2 0. ",Identifier Mask bit 16" "0,1"
|
|
line.word 0x4 "IF1ARB11,IF1 Arbitration Register 1"
|
|
line.word 0x6 "IF1ARB21,IF1 Arbitration Registers 2"
|
|
bitfld.word 0x6 15. " MSGVAL ,Message Valid (Message Object is:)" "Invalid,Valid"
|
|
bitfld.word 0x6 14. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.word 0x6 13. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.word 0x6 0.--12. 1. " ID[28-16] ,Message Identifier bits 28...16"
|
|
if (((d.w(ad:0xB0808400+0x10+0xA))&0x2000)==0x2000)
|
|
group.word (0x10+0xC)++0x1
|
|
line.word 0x0 "IF1MCTR1,IF1 Message Control Register"
|
|
bitfld.word 0x0 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.word 0x0 13. " INTPND ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " UMASK ,Use Acceptance Mask" "Not used,Used"
|
|
bitfld.word 0x0 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " EOB ,End of FIFO Buffer" "No EOB,EOB"
|
|
bitfld.word 0x0 0.--3. " DLC[3:0] ,Data Length Code (in bytes)" "1,2,3,4,5,6,7,8,8,8,8,8,8,8,8,8"
|
|
else
|
|
group.word (0x10+0xC)++0x1
|
|
line.word 0x0 "IF1MCTR1,IF1 Message Control Register"
|
|
bitfld.word 0x0 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.word 0x0 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.word 0x0 13. " INTPND ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " UMASK ,Use Acceptance Mask" "Not used,Used"
|
|
bitfld.word 0x0 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " EOB ,End of FIFO Buffer" "No EOB,EOB"
|
|
bitfld.word 0x0 0.--3. " DLC ,Data Length Code (in bytes)" "1,2,3,4,5,6,7,8,8,8,8,8,8,8,8,8"
|
|
endif
|
|
group.word (0x10+0x10)++0x7
|
|
line.word 0x0 "IF1DTA11,IF1 Data A1 Register"
|
|
line.word 0x2 "IF1DTA21,IF1 Data A2 Register"
|
|
line.word 0x4 "IF1DTB11,IF1 Data B1 Register"
|
|
line.word 0x6 "IF1DTB21,IF1 Data B2 Register"
|
|
tree.end
|
|
tree "IF2 Registers"
|
|
group.word 0x40++0x1
|
|
line.word 0x0 "IF2CREQ1,IF2 Command Request Register"
|
|
bitfld.word 0x0 15. " BUSY ,Busy Flag" "Not busy,Busy"
|
|
hexmask.word.byte 0x0 0.--7. 0x1 " MSGN ,Message Number"
|
|
if (((d.b(ad:0xB0808400+0x40+0x2))&0x80)==0x80)
|
|
group.byte (0x40+0x2)++0x0
|
|
line.byte 0x0 "IF2CMSK1,IF2 Command Mask Register"
|
|
bitfld.byte 0x0 7. " WRRD ,Write/Read" "Read,Write"
|
|
bitfld.byte 0x0 6. " MASK ,Access Mask Bit" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 5. " ARB ,Access Arbitration Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 4. " CONTROL ,Access Control Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 2. " TXREQ ,Access Transmission Request Bit (TXRQST)" "Unchanged,Set"
|
|
bitfld.byte 0x0 1. " DATAA ,Access Data Bytes 0-3" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " DATAB ,Access Data Bytes 4-7" "Unchanged,Transferred"
|
|
else
|
|
group.byte (0x40+0x2)++0x0
|
|
line.byte 0x0 "IF2CMSK1,IF2 Command Mask Register"
|
|
bitfld.byte 0x0 7. " WRRD ,Write/Read" "Read,Write"
|
|
bitfld.byte 0x0 6. " MASK ,Access Mask Bit" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 5. " ARB ,Access Arbitration Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 4. " CONTROL ,Access Control Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 3. " CIP ,Clear Interrupt Pending Bit (INTPND)" "Unchanged,Cleared"
|
|
bitfld.byte 0x0 2. " TXREQ ,Access Transmission Request Bit (NEWDAT)" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " DATAA ,Access Data Bytes 0-3" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 0. " DATAB ,Access Data Bytes 4-7" "Unchanged,Transferred"
|
|
endif
|
|
group.word (0x40+0x4)++0x7
|
|
line.word 0x0 "IF2MSK11,IF2 Mask Registers 1"
|
|
bitfld.word 0x0 15. " MSK[15:0] ,Identifier Mask bit 15" "0,1"
|
|
bitfld.word 0x0 14. ",Identifier Mask bit 14" "0,1"
|
|
bitfld.word 0x0 13. ",Identifier Mask bit 13" "0,1"
|
|
bitfld.word 0x0 12. ",Identifier Mask bit 12" "0,1"
|
|
bitfld.word 0x0 11. ",Identifier Mask bit 11" "0,1"
|
|
bitfld.word 0x0 10. ",Identifier Mask bit 10" "0,1"
|
|
bitfld.word 0x0 9. ",Identifier Mask bit 9" "0,1"
|
|
bitfld.word 0x0 8. ",Identifier Mask bit 8" "0,1"
|
|
bitfld.word 0x0 7. ",Identifier Mask bit 7" "0,1"
|
|
bitfld.word 0x0 6. ",Identifier Mask bit 6" "0,1"
|
|
bitfld.word 0x0 5. ",Identifier Mask bit 5" "0,1"
|
|
bitfld.word 0x0 4. ",Identifier Mask bit 4" "0,1"
|
|
bitfld.word 0x0 3. ",Identifier Mask bit 3" "0,1"
|
|
bitfld.word 0x0 2. ",Identifier Mask bit 2" "0,1"
|
|
bitfld.word 0x0 1. ",Identifier Mask bit 1" "0,1"
|
|
bitfld.word 0x0 0. ",Identifier Mask bit 0" "0,1"
|
|
line.word 0x2 "IF2MSK21,IF2 Mask Registers 2 (Mask bits of Message Object)"
|
|
bitfld.word 0x2 15. " MXTD ,Mask Extended Identifier" "0,1"
|
|
bitfld.word 0x2 14. " MDIR ,Mask Message Direction (effect of DIR in filtering)" "0,1"
|
|
bitfld.word 0x2 12. " MSK[28:16] ,Identifier Mask bit 28" "0,1"
|
|
bitfld.word 0x2 11. ",Identifier Mask bit 27" "0,1"
|
|
bitfld.word 0x2 10. ",Identifier Mask bit 26" "0,1"
|
|
bitfld.word 0x2 9. ",Identifier Mask bit 25" "0,1"
|
|
bitfld.word 0x2 8. ",Identifier Mask bit 24" "0,1"
|
|
bitfld.word 0x2 7. ",Identifier Mask bit 23" "0,1"
|
|
bitfld.word 0x2 6. ",Identifier Mask bit 22" "0,1"
|
|
bitfld.word 0x2 5. ",Identifier Mask bit 21" "0,1"
|
|
bitfld.word 0x2 4. ",Identifier Mask bit 20" "0,1"
|
|
bitfld.word 0x2 3. ",Identifier Mask bit 19" "0,1"
|
|
bitfld.word 0x2 2. ",Identifier Mask bit 18" "0,1"
|
|
bitfld.word 0x2 1. ",Identifier Mask bit 17" "0,1"
|
|
bitfld.word 0x2 0. ",Identifier Mask bit 16" "0,1"
|
|
line.word 0x4 "IF2ARB11,IF2 Arbitration Register 1"
|
|
line.word 0x6 "IF2ARB21,IF2 Arbitration Registers 2"
|
|
bitfld.word 0x6 15. " MSGVAL ,Message Valid (Message Object is:)" "Invalid,Valid"
|
|
bitfld.word 0x6 14. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.word 0x6 13. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.word 0x6 0.--12. 1. " ID[28-16] ,Message Identifier bits 28...16"
|
|
if (((d.w(ad:0xB0808400+0x40+0xA))&0x2000)==0x2000)
|
|
group.word (0x40+0xC)++0x1
|
|
line.word 0x0 "IF2MCTR1,IF2 Message Control Register"
|
|
bitfld.word 0x0 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.word 0x0 13. " INTPND ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " UMASK ,Use Acceptance Mask" "Not used,Used"
|
|
bitfld.word 0x0 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " EOB ,End of FIFO Buffer" "No EOB,EOB"
|
|
bitfld.word 0x0 0.--3. " DLC[3:0] ,Data Length Code (in bytes)" "1,2,3,4,5,6,7,8,8,8,8,8,8,8,8,8"
|
|
else
|
|
group.word (0x40+0xC)++0x1
|
|
line.word 0x0 "IF2MCTR1,IF2 Message Control Register"
|
|
bitfld.word 0x0 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.word 0x0 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.word 0x0 13. " INTPND ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " UMASK ,Use Acceptance Mask" "Not used,Used"
|
|
bitfld.word 0x0 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " EOB ,End of FIFO Buffer" "No EOB,EOB"
|
|
bitfld.word 0x0 0.--3. " DLC ,Data Length Code (in bytes)" "1,2,3,4,5,6,7,8,8,8,8,8,8,8,8,8"
|
|
endif
|
|
group.word (0x40+0x10)++0x7
|
|
line.word 0x0 "IF2DTA11,IF2 Data A1 Register"
|
|
line.word 0x2 "IF2DTA21,IF2 Data A2 Register"
|
|
line.word 0x4 "IF2DTB11,IF2 Data B1 Register"
|
|
line.word 0x6 "IF2DTB21,IF2 Data B2 Register"
|
|
tree.end
|
|
tree.end
|
|
tree "Message Handler Registers"
|
|
rgroup.word 0x8++0x1 "Interrupt Register"
|
|
line.word 0x0 "INTR1,Interrupt Register (Source of Interrupt)"
|
|
tree "Transmission Request Registers"
|
|
rgroup.word 0x80++0x7
|
|
line.word 0x0 "TREQR11,Transmission Request Register for Message Objects 16-1"
|
|
bitfld.word 0x0 15. " TXRQST[16] ,Transmission Request MO 16" "Not requested,Requested"
|
|
bitfld.word 0x0 14. " [15] ,Transmission Request MO 15" "Not requested,Requested"
|
|
bitfld.word 0x0 13. " [14] ,Transmission Request MO 14" "Not requested,Requested"
|
|
bitfld.word 0x0 12. " [13] ,Transmission Request MO 13" "Not requested,Requested"
|
|
bitfld.word 0x0 11. " [12] ,Transmission Request MO 12" "Not requested,Requested"
|
|
bitfld.word 0x0 10. " [11] ,Transmission Request MO 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [10] ,Transmission Request MO 10" "Not requested,Requested"
|
|
bitfld.word 0x0 8. " [9] ,Transmission Request MO 9" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " [8] ,Transmission Request MO 8" "Not requested,Requested"
|
|
bitfld.word 0x0 6. " [7] ,Transmission Request MO 7" "Not requested,Requested"
|
|
bitfld.word 0x0 5. " [6] ,Transmission Request MO 6" "Not requested,Requested"
|
|
bitfld.word 0x0 4. " [5] ,Transmission Request MO 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [4] ,Transmission Request MO 4" "Not requested,Requested"
|
|
bitfld.word 0x0 2. " [3] ,Transmission Request MO 3" "Not requested,Requested"
|
|
bitfld.word 0x0 1. " [2] ,Transmission Request MO 2" "Not requested,Requested"
|
|
bitfld.word 0x0 0. " [1] ,Transmission Request MO 1" "Not requested,Requested"
|
|
line.word 0x2 "TREQR21,Transmission Request Register for Message Objects 32-17"
|
|
bitfld.word 0x2 15. " TXRQST[32] ,Transmission Request MO 32" "Not requested,Requested"
|
|
bitfld.word 0x2 14. " [31] ,Transmission Request MO 31" "Not requested,Requested"
|
|
bitfld.word 0x2 13. " [30] ,Transmission Request MO 30" "Not requested,Requested"
|
|
bitfld.word 0x2 12. " [29] ,Transmission Request MO 29" "Not requested,Requested"
|
|
bitfld.word 0x2 11. " [28] ,Transmission Request MO 28" "Not requested,Requested"
|
|
bitfld.word 0x2 10. " [27] ,Transmission Request MO 27" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [26] ,Transmission Request MO 26" "Not requested,Requested"
|
|
bitfld.word 0x2 8. " [25] ,Transmission Request MO 25" "Not requested,Requested"
|
|
bitfld.word 0x2 7. " [24] ,Transmission Request MO 24" "Not requested,Requested"
|
|
bitfld.word 0x2 6. " [23] ,Transmission Request MO 23" "Not requested,Requested"
|
|
bitfld.word 0x2 5. " [22] ,Transmission Request MO 22" "Not requested,Requested"
|
|
bitfld.word 0x2 4. " [21] ,Transmission Request MO 21" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [20] ,Transmission Request MO 20" "Not requested,Requested"
|
|
bitfld.word 0x2 2. " [19] ,Transmission Request MO 19" "Not requested,Requested"
|
|
bitfld.word 0x2 1. " [18] ,Transmission Request MO 18" "Not requested,Requested"
|
|
bitfld.word 0x2 0. " [17] ,Transmission Request MO 17" "Not requested,Requested"
|
|
line.word 0x4 "TREQR31,Transmission Request Register for Message Objects 48-33"
|
|
bitfld.word 0x4 15. " TXRQST[48] ,Transmission Request MO 48" "Not requested,Requested"
|
|
bitfld.word 0x4 14. " [47] ,Transmission Request MO 47" "Not requested,Requested"
|
|
bitfld.word 0x4 13. " [46] ,Transmission Request MO 46" "Not requested,Requested"
|
|
bitfld.word 0x4 12. " [45] ,Transmission Request MO 45" "Not requested,Requested"
|
|
bitfld.word 0x4 11. " [44] ,Transmission Request MO 44" "Not requested,Requested"
|
|
bitfld.word 0x4 10. " [43] ,Transmission Request MO 43" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x4 9. " [42] ,Transmission Request MO 42" "Not requested,Requested"
|
|
bitfld.word 0x4 8. " [41] ,Transmission Request MO 41" "Not requested,Requested"
|
|
bitfld.word 0x4 7. " [40] ,Transmission Request MO 40" "Not requested,Requested"
|
|
bitfld.word 0x4 6. " [39] ,Transmission Request MO 39" "Not requested,Requested"
|
|
bitfld.word 0x4 5. " [38] ,Transmission Request MO 38" "Not requested,Requested"
|
|
bitfld.word 0x4 4. " [37] ,Transmission Request MO 37" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x4 3. " [36] ,Transmission Request MO 36" "Not requested,Requested"
|
|
bitfld.word 0x4 2. " [35] ,Transmission Request MO 35" "Not requested,Requested"
|
|
bitfld.word 0x4 1. " [34] ,Transmission Request MO 34" "Not requested,Requested"
|
|
bitfld.word 0x4 0. " [33] ,Transmission Request MO 33" "Not requested,Requested"
|
|
line.word 0x6 "TREQR41,Transmission Request Register for Message Objects 64-49"
|
|
bitfld.word 0x6 15. " TXRQST[64] ,Transmission Request MO 64" "Not requested,Requested"
|
|
bitfld.word 0x6 14. " [63] ,Transmission Request MO 63" "Not requested,Requested"
|
|
bitfld.word 0x6 13. " [62] ,Transmission Request MO 62" "Not requested,Requested"
|
|
bitfld.word 0x6 12. " [61] ,Transmission Request MO 61" "Not requested,Requested"
|
|
bitfld.word 0x6 11. " [60] ,Transmission Request MO 60" "Not requested,Requested"
|
|
bitfld.word 0x6 10. " [59] ,Transmission Request MO 59" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x6 9. " [58] ,Transmission Request MO 58" "Not requested,Requested"
|
|
bitfld.word 0x6 8. " [57] ,Transmission Request MO 57" "Not requested,Requested"
|
|
bitfld.word 0x6 7. " [56] ,Transmission Request MO 56" "Not requested,Requested"
|
|
bitfld.word 0x6 6. " [55] ,Transmission Request MO 55" "Not requested,Requested"
|
|
bitfld.word 0x6 5. " [54] ,Transmission Request MO 54" "Not requested,Requested"
|
|
bitfld.word 0x6 4. " [53] ,Transmission Request MO 53" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x6 3. " [52] ,Transmission Request MO 52" "Not requested,Requested"
|
|
bitfld.word 0x6 2. " [51] ,Transmission Request MO 51" "Not requested,Requested"
|
|
bitfld.word 0x6 1. " [50] ,Transmission Request MO 50" "Not requested,Requested"
|
|
bitfld.word 0x6 0. " [49] ,Transmission Request MO 49" "Not requested,Requested"
|
|
tree.end
|
|
tree "New Data Registers"
|
|
rgroup.word 0x90++0x7
|
|
line.word 0x0 "NEWDT11,New Data Register for Message Objects 16-1"
|
|
bitfld.word 0x0 15. " NEWDAT[16] ,New Data on MO 16" "No new data,New data"
|
|
bitfld.word 0x0 14. " [15] ,New Data on MO 15" "No new data,New data"
|
|
bitfld.word 0x0 13. " [14] ,New Data on MO 14" "No new data,New data"
|
|
bitfld.word 0x0 12. " [13] ,New Data on MO 13" "No new data,New data"
|
|
bitfld.word 0x0 11. " [12] ,New Data on MO 12" "No new data,New data"
|
|
bitfld.word 0x0 10. " [11] ,New Data on MO 11" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [10] ,New Data on MO 10" "No new data,New data"
|
|
bitfld.word 0x0 8. " [9] ,New Data on MO 9" "No new data,New data"
|
|
bitfld.word 0x0 7. " [8] ,New Data on MO 8" "No new data,New data"
|
|
bitfld.word 0x0 6. " [7] ,New Data on MO 7" "No new data,New data"
|
|
bitfld.word 0x0 5. " [6] ,New Data on MO 6" "No new data,New data"
|
|
bitfld.word 0x0 4. " [5] ,New Data on MO 5" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [4] ,New Data on MO 4" "No new data,New data"
|
|
bitfld.word 0x0 2. " [3] ,New Data on MO 3" "No new data,New data"
|
|
bitfld.word 0x0 1. " [2] ,New Data on MO 2" "No new data,New data"
|
|
bitfld.word 0x0 0. " [1] ,New Data on MO 1" "No new data,New data"
|
|
line.word 0x2 "NEWDT21,New Data Register for Message Objects 32-17"
|
|
bitfld.word 0x2 15. " NEWDAT[32] ,New Data on MO 32" "No new data,New data"
|
|
bitfld.word 0x2 14. " [31] ,New Data on MO 31" "No new data,New data"
|
|
bitfld.word 0x2 13. " [30] ,New Data on MO 30" "No new data,New data"
|
|
bitfld.word 0x2 12. " [29] ,New Data on MO 29" "No new data,New data"
|
|
bitfld.word 0x2 11. " [28] ,New Data on MO 28" "No new data,New data"
|
|
bitfld.word 0x2 10. " [27] ,New Data on MO 27" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [26] ,New Data on MO 26" "No new data,New data"
|
|
bitfld.word 0x2 8. " [25] ,New Data on MO 25" "No new data,New data"
|
|
bitfld.word 0x2 7. " [24] ,New Data on MO 24" "No new data,New data"
|
|
bitfld.word 0x2 6. " [23] ,New Data on MO 23" "No new data,New data"
|
|
bitfld.word 0x2 5. " [22] ,New Data on MO 22" "No new data,New data"
|
|
bitfld.word 0x2 4. " [21] ,New Data on MO 21" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [20] ,New Data on MO 20" "No new data,New data"
|
|
bitfld.word 0x2 2. " [19] ,New Data on MO 19" "No new data,New data"
|
|
bitfld.word 0x2 1. " [18] ,New Data on MO 18" "No new data,New data"
|
|
bitfld.word 0x2 0. " [17] ,New Data on MO 17" "No new data,New data"
|
|
line.word 0x4 "NEWDT31,New Data Register for Message Objects 48-33"
|
|
bitfld.word 0x4 15. " NEWDAT[48] ,New Data on MO 48" "No new data,New data"
|
|
bitfld.word 0x4 14. " [47] ,New Data on MO 47" "No new data,New data"
|
|
bitfld.word 0x4 13. " [46] ,New Data on MO 46" "No new data,New data"
|
|
bitfld.word 0x4 12. " [45] ,New Data on MO 45" "No new data,New data"
|
|
bitfld.word 0x4 11. " [44] ,New Data on MO 44" "No new data,New data"
|
|
bitfld.word 0x4 10. " [43] ,New Data on MO 43" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x4 9. " [42] ,New Data on MO 42" "No new data,New data"
|
|
bitfld.word 0x4 8. " [41] ,New Data on MO 41" "No new data,New data"
|
|
bitfld.word 0x4 7. " [40] ,New Data on MO 40" "No new data,New data"
|
|
bitfld.word 0x4 6. " [39] ,New Data on MO 39" "No new data,New data"
|
|
bitfld.word 0x4 5. " [38] ,New Data on MO 38" "No new data,New data"
|
|
bitfld.word 0x4 4. " [37] ,New Data on MO 37" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x4 3. " [36] ,New Data on MO 36" "No new data,New data"
|
|
bitfld.word 0x4 2. " [35] ,New Data on MO 35" "No new data,New data"
|
|
bitfld.word 0x4 1. " [34] ,New Data on MO 34" "No new data,New data"
|
|
bitfld.word 0x4 0. " [33] ,New Data on MO 33" "No new data,New data"
|
|
line.word 0x6 "NEWDT41,New Data Register for Message Objects 64-49"
|
|
bitfld.word 0x6 15. " NEWDAT[64] ,New Data on MO 64" "No new data,New data"
|
|
bitfld.word 0x6 14. " [63] ,New Data on MO 63" "No new data,New data"
|
|
bitfld.word 0x6 13. " [62] ,New Data on MO 62" "No new data,New data"
|
|
bitfld.word 0x6 12. " [61] ,New Data on MO 61" "No new data,New data"
|
|
bitfld.word 0x6 11. " [60] ,New Data on MO 60" "No new data,New data"
|
|
bitfld.word 0x6 10. " [59] ,New Data on MO 59" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x6 9. " [58] ,New Data on MO 58" "No new data,New data"
|
|
bitfld.word 0x6 8. " [57] ,New Data on MO 57" "No new data,New data"
|
|
bitfld.word 0x6 7. " [56] ,New Data on MO 56" "No new data,New data"
|
|
bitfld.word 0x6 6. " [55] ,New Data on MO 55" "No new data,New data"
|
|
bitfld.word 0x6 5. " [54] ,New Data on MO 54" "No new data,New data"
|
|
bitfld.word 0x6 4. " [53] ,New Data on MO 53" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x6 3. " [52] ,New Data on MO 52" "No new data,New data"
|
|
bitfld.word 0x6 2. " [51] ,New Data on MO 51" "No new data,New data"
|
|
bitfld.word 0x6 1. " [50] ,New Data on MO 50" "No new data,New data"
|
|
bitfld.word 0x6 0. " [49] ,New Data on MO 49" "No new data,New data"
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
rgroup.word 0xA0++0x7
|
|
line.word 0x0 "INTPND11,Interrupt Pending Register for Message Objects 16-1"
|
|
bitfld.word 0x0 15. " INTPND[16] ,MO 16 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 14. " [15] ,MO 15 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 13. " [14] ,MO 14 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " [13] ,MO 13 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 11. " [12] ,MO 12 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 10. " [11] ,MO 11 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [10] ,MO 10 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 8. " [9] ,MO 9 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 7. " [8] ,MO 8 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 6. " [7] ,MO 7 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 5. " [6] ,MO 6 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 4. " [5] ,MO 5 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [4] ,MO 4 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 2. " [3] ,MO 3 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 1. " [2] ,MO 2 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 0. " [1] ,MO 1 Interrupt Pending" "Not pending,Pending"
|
|
line.word 0x2 "INTPND21,Interrupt Pending Register for Message Objects 32-17"
|
|
bitfld.word 0x2 15. " INTPND[32] ,MO 32 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 14. " [31] ,MO 31 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 13. " [30] ,MO 30 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 12. " [29] ,MO 29 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 11. " [28] ,MO 28 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 10. " [27] ,MO 27 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [26] ,MO 26 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 8. " [25] ,MO 25 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 7. " [24] ,MO 24 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 6. " [23] ,MO 23 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 5. " [22] ,MO 22 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 4. " [21] ,MO 21 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [20] ,MO 20 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 2. " [19] ,MO 19 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 1. " [18] ,MO 18 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 0. " [17] ,MO 17 Interrupt Pending" "Not pending,Pending"
|
|
line.word 0x4 "INTPND31,Interrupt Pending Register for Message Objects 48-33"
|
|
bitfld.word 0x4 15. " INTPND[48] ,MO 48 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 14. " [47] ,MO 47 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 13. " [46] ,MO 46 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 12. " [45] ,MO 45 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 11. " [44] ,MO 44 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 10. " [43] ,MO 43 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x4 9. " [42] ,MO 42 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 8. " [41] ,MO 41 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 7. " [40] ,MO 40 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 6. " [39] ,MO 39 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 5. " [38] ,MO 38 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 4. " [37] ,MO 37 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x4 3. " [36] ,MO 36 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 2. " [35] ,MO 35 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 1. " [34] ,MO 34 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 0. " [33] ,MO 33 Interrupt Pending" "Not pending,Pending"
|
|
line.word 0x6 "INTPND41,Interrupt Pending Register for Message Objects 64-49"
|
|
bitfld.word 0x6 15. " INTPND[64] ,MO 64 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 14. " [63] ,MO 63 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 13. " [62] ,MO 62 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 12. " [61] ,MO 61 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 11. " [60] ,MO 60 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 10. " [59] ,MO 59 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x6 9. " [58] ,MO 58 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 8. " [57] ,MO 57 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 7. " [56] ,MO 56 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 6. " [55] ,MO 55 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 5. " [54] ,MO 54 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 4. " [53] ,MO 53 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x6 3. " [52] ,MO 52 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 2. " [51] ,MO 51 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 1. " [50] ,MO 50 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 0. " [49] ,MO 49 Interrupt Pending" "Not pending,Pending"
|
|
tree.end
|
|
width 12.
|
|
tree "Message Valid Registers"
|
|
rgroup.word 0xB0++0x7
|
|
line.word 0x0 "MSGVAL11,Message Valid Register for Message Objects 16-1"
|
|
bitfld.word 0x0 15. " MSGVAL[16] ,Validity status of MO 16" "Not valid,Valid"
|
|
bitfld.word 0x0 14. " [15] ,Validity status of MO 15" "Not valid,Valid"
|
|
bitfld.word 0x0 13. " [14] ,Validity status of MO 14" "Not valid,Valid"
|
|
bitfld.word 0x0 12. " [13] ,Validity status of MO 13" "Not valid,Valid"
|
|
bitfld.word 0x0 11. " [12] ,Validity status of MO 12" "Not valid,Valid"
|
|
bitfld.word 0x0 10. " [11] ,Validity status of MO 11" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [10] ,Validity status of MO 10" "Not valid,Valid"
|
|
bitfld.word 0x0 8. " [9] ,Validity status of MO 9" "Not valid,Valid"
|
|
bitfld.word 0x0 7. " [8] ,Validity status of MO 8" "Not valid,Valid"
|
|
bitfld.word 0x0 6. " [7] ,Validity status of MO 7" "Not valid,Valid"
|
|
bitfld.word 0x0 5. " [6] ,Validity status of MO 6" "Not valid,Valid"
|
|
bitfld.word 0x0 4. " [5] ,Validity status of MO 5" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [4] ,Validity status of MO 4" "Not valid,Valid"
|
|
bitfld.word 0x0 2. " [3] ,Validity status of MO 3" "Not valid,Valid"
|
|
bitfld.word 0x0 1. " [2] ,Validity status of MO 2" "Not valid,Valid"
|
|
bitfld.word 0x0 0. " [1] ,Validity status of MO 1" "Not valid,Valid"
|
|
line.word 0x2 "MSGVAL21,Message Valid Register for Message Objects 32-17"
|
|
bitfld.word 0x2 15. " MSGVAL[32] ,Validity status of MO 32" "Not valid,Valid"
|
|
bitfld.word 0x2 14. " [31] ,Validity status of MO 31" "Not valid,Valid"
|
|
bitfld.word 0x2 13. " [30] ,Validity status of MO 30" "Not valid,Valid"
|
|
bitfld.word 0x2 12. " [29] ,Validity status of MO 29" "Not valid,Valid"
|
|
bitfld.word 0x2 11. " [28] ,Validity status of MO 28" "Not valid,Valid"
|
|
bitfld.word 0x2 10. " [27] ,Validity status of MO 27" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [26] ,Validity status of MO 26" "Not valid,Valid"
|
|
bitfld.word 0x2 8. " [25] ,Validity status of MO 25" "Not valid,Valid"
|
|
bitfld.word 0x2 7. " [24] ,Validity status of MO 24" "Not valid,Valid"
|
|
bitfld.word 0x2 6. " [23] ,Validity status of MO 23" "Not valid,Valid"
|
|
bitfld.word 0x2 5. " [22] ,Validity status of MO 22" "Not valid,Valid"
|
|
bitfld.word 0x2 4. " [21] ,Validity status of MO 21" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [20] ,Validity status of MO 20" "Not valid,Valid"
|
|
bitfld.word 0x2 2. " [19] ,Validity status of MO 19" "Not valid,Valid"
|
|
bitfld.word 0x2 1. " [18] ,Validity status of MO 18" "Not valid,Valid"
|
|
bitfld.word 0x2 0. " [17] ,Validity status of MO 17" "Not valid,Valid"
|
|
line.word 0x4 "MSGVAL31,Message Valid Register for Message Objects 48-33"
|
|
bitfld.word 0x4 15. " MSGVAL[48] ,Validity status of MO 48" "Not valid,Valid"
|
|
bitfld.word 0x4 14. " [47] ,Validity status of MO 47" "Not valid,Valid"
|
|
bitfld.word 0x4 13. " [46] ,Validity status of MO 46" "Not valid,Valid"
|
|
bitfld.word 0x4 12. " [45] ,Validity status of MO 45" "Not valid,Valid"
|
|
bitfld.word 0x4 11. " [44] ,Validity status of MO 44" "Not valid,Valid"
|
|
bitfld.word 0x4 10. " [43] ,Validity status of MO 43" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x4 9. " [42] ,Validity status of MO 42" "Not valid,Valid"
|
|
bitfld.word 0x4 8. " [41] ,Validity status of MO 41" "Not valid,Valid"
|
|
bitfld.word 0x4 7. " [40] ,Validity status of MO 40" "Not valid,Valid"
|
|
bitfld.word 0x4 6. " [39] ,Validity status of MO 39" "Not valid,Valid"
|
|
bitfld.word 0x4 5. " [38] ,Validity status of MO 38" "Not valid,Valid"
|
|
bitfld.word 0x4 4. " [37] ,Validity status of MO 37" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x4 3. " [36] ,Validity status of MO 36" "Not valid,Valid"
|
|
bitfld.word 0x4 2. " [35] ,Validity status of MO 35" "Not valid,Valid"
|
|
bitfld.word 0x4 1. " [34] ,Validity status of MO 34" "Not valid,Valid"
|
|
bitfld.word 0x4 0. " [33] ,Validity status of MO 33" "Not valid,Valid"
|
|
line.word 0x6 "MSGVAL41,Message Valid Register for Message Objects 64-49"
|
|
bitfld.word 0x6 15. " MSGVAL[64] ,Validity status of MO 64" "Not valid,Valid"
|
|
bitfld.word 0x6 14. " [63] ,Validity status of MO 63" "Not valid,Valid"
|
|
bitfld.word 0x6 13. " [62] ,Validity status of MO 62" "Not valid,Valid"
|
|
bitfld.word 0x6 12. " [61] ,Validity status of MO 61" "Not valid,Valid"
|
|
bitfld.word 0x6 11. " [60] ,Validity status of MO 60" "Not valid,Valid"
|
|
bitfld.word 0x6 10. " [59] ,Validity status of MO 59" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x6 9. " [58] ,Validity status of MO 58" "Not valid,Valid"
|
|
bitfld.word 0x6 8. " [57] ,Validity status of MO 57" "Not valid,Valid"
|
|
bitfld.word 0x6 7. " [56] ,Validity status of MO 56" "Not valid,Valid"
|
|
bitfld.word 0x6 6. " [55] ,Validity status of MO 55" "Not valid,Valid"
|
|
bitfld.word 0x6 5. " [54] ,Validity status of MO 54" "Not valid,Valid"
|
|
bitfld.word 0x6 4. " [53] ,Validity status of MO 53" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x6 3. " [52] ,Validity status of MO 52" "Not valid,Valid"
|
|
bitfld.word 0x6 2. " [51] ,Validity status of MO 51" "Not valid,Valid"
|
|
bitfld.word 0x6 1. " [50] ,Validity status of MO 50" "Not valid,Valid"
|
|
bitfld.word 0x6 0. " [49] ,Validity status of MO 49" "Not valid,Valid"
|
|
tree.end
|
|
tree.end
|
|
width 12.
|
|
tree "Debug Register"
|
|
group.word 0xD0++0x1
|
|
line.word 0x0 "DEBUG1,Debug Register"
|
|
bitfld.word 0x0 1. " DBGLB ,Debug Loop Back Mode Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " DBGSL ,Debug Silent Mode Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 12.
|
|
tree.end
|
|
sif (cpu()!="MB9DF125"&&cpu()!="MB9EF226")
|
|
tree "CAN 2"
|
|
base ad:0xb0808800
|
|
width 12.
|
|
group.byte 0xCE++0x0 "Device Related Register"
|
|
line.byte 0x0 "COER2,CAN Output Enable Register"
|
|
bitfld.byte 0x0 0. " OE ,Output Enable" "Disabled,Enabled"
|
|
width 12.
|
|
group.byte 0x0++0x0 "Protocol Related Registers"
|
|
line.byte 0x0 "CTRLR2,CAN Control Register"
|
|
bitfld.byte 0x0 7. " TEST ,Test Mode Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " CCE ,Configuration Change Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 5. " DAR ,Disable Automatic Retransmission" "No,Yes"
|
|
bitfld.byte 0x0 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 2. " SIE ,Status Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " IE ,Module Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " INIT ,Initialization" "Normal,Initialization"
|
|
hgroup.byte 0x2++0x0
|
|
hide.byte 0x0 "STATR2,Status Register"
|
|
in
|
|
rgroup.word 0x4++0x1
|
|
line.word 0x0 "ERRCNT2,Error Counter"
|
|
bitfld.word 0x0 15. " RP ,Receive Error Passive" "Below level,Reached level"
|
|
hexmask.word.byte 0x0 8.--14. 0x1 " REC ,Receive Error Counter"
|
|
hexmask.word.byte 0x0 0.--7. 0x1 " TEC ,Transmit Error Counter"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "BTR2,Bit Timing Register"
|
|
bitfld.word 0x0 12.--14. " TSEG2 ,The time segment after sample point" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x0 8.--11. " TSEG1 ,The time segment before sample point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x0 6.--7. " SJW ,(Re)Synchronisation Jump Width" "0,1,2,3"
|
|
bitfld.word 0x0 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.word 0xA++0x01
|
|
line.word 0x0 "TESTR2,Test Register"
|
|
rbitfld.word 0x0 7. " RX ,Monitors the actual value of the CAN_RX Pin" "Dominant,Recessive"
|
|
bitfld.word 0x0 5.--6. " TX ,Control of CAN_TX pin" "CAN Core,Sample point,Dominant,Recessive"
|
|
bitfld.word 0x0 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " SILENT ,Silent Mode" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " BASIC ,Basic Mode" "Disabled,Enabled"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "BRPER2,BRP Extension Register"
|
|
bitfld.word 0x0 0.--3. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree "Message Interface Register Sets"
|
|
tree "IF1 Registers"
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "IF1CREQ2,IF1 Command Request Register"
|
|
bitfld.word 0x0 15. " BUSY ,Busy Flag" "Not busy,Busy"
|
|
hexmask.word.byte 0x0 0.--7. 0x1 " MSGN ,Message Number"
|
|
if (((d.b(ad:0xb0808800+0x10+0x2))&0x80)==0x80)
|
|
group.byte (0x10+0x2)++0x0
|
|
line.byte 0x0 "IF1CMSK2,IF1 Command Mask Register"
|
|
bitfld.byte 0x0 7. " WRRD ,Write/Read" "Read,Write"
|
|
bitfld.byte 0x0 6. " MASK ,Access Mask Bit" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 5. " ARB ,Access Arbitration Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 4. " CONTROL ,Access Control Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 2. " TXREQ ,Access Transmission Request Bit (TXRQST)" "Unchanged,Set"
|
|
bitfld.byte 0x0 1. " DATAA ,Access Data Bytes 0-3" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " DATAB ,Access Data Bytes 4-7" "Unchanged,Transferred"
|
|
else
|
|
group.byte (0x10+0x2)++0x0
|
|
line.byte 0x0 "IF1CMSK2,IF1 Command Mask Register"
|
|
bitfld.byte 0x0 7. " WRRD ,Write/Read" "Read,Write"
|
|
bitfld.byte 0x0 6. " MASK ,Access Mask Bit" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 5. " ARB ,Access Arbitration Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 4. " CONTROL ,Access Control Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 3. " CIP ,Clear Interrupt Pending Bit (INTPND)" "Unchanged,Cleared"
|
|
bitfld.byte 0x0 2. " TXREQ ,Access Transmission Request Bit (NEWDAT)" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " DATAA ,Access Data Bytes 0-3" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 0. " DATAB ,Access Data Bytes 4-7" "Unchanged,Transferred"
|
|
endif
|
|
group.word (0x10+0x4)++0x7
|
|
line.word 0x0 "IF1MSK12,IF1 Mask Registers 1"
|
|
bitfld.word 0x0 15. " MSK[15:0] ,Identifier Mask bit 15" "0,1"
|
|
bitfld.word 0x0 14. ",Identifier Mask bit 14" "0,1"
|
|
bitfld.word 0x0 13. ",Identifier Mask bit 13" "0,1"
|
|
bitfld.word 0x0 12. ",Identifier Mask bit 12" "0,1"
|
|
bitfld.word 0x0 11. ",Identifier Mask bit 11" "0,1"
|
|
bitfld.word 0x0 10. ",Identifier Mask bit 10" "0,1"
|
|
bitfld.word 0x0 9. ",Identifier Mask bit 9" "0,1"
|
|
bitfld.word 0x0 8. ",Identifier Mask bit 8" "0,1"
|
|
bitfld.word 0x0 7. ",Identifier Mask bit 7" "0,1"
|
|
bitfld.word 0x0 6. ",Identifier Mask bit 6" "0,1"
|
|
bitfld.word 0x0 5. ",Identifier Mask bit 5" "0,1"
|
|
bitfld.word 0x0 4. ",Identifier Mask bit 4" "0,1"
|
|
bitfld.word 0x0 3. ",Identifier Mask bit 3" "0,1"
|
|
bitfld.word 0x0 2. ",Identifier Mask bit 2" "0,1"
|
|
bitfld.word 0x0 1. ",Identifier Mask bit 1" "0,1"
|
|
bitfld.word 0x0 0. ",Identifier Mask bit 0" "0,1"
|
|
line.word 0x2 "IF1MSK22,IF1 Mask Registers 2 (Mask bits of Message Object)"
|
|
bitfld.word 0x2 15. " MXTD ,Mask Extended Identifier" "0,1"
|
|
bitfld.word 0x2 14. " MDIR ,Mask Message Direction (effect of DIR in filtering)" "0,1"
|
|
bitfld.word 0x2 12. " MSK[28:16] ,Identifier Mask bit 28" "0,1"
|
|
bitfld.word 0x2 11. ",Identifier Mask bit 27" "0,1"
|
|
bitfld.word 0x2 10. ",Identifier Mask bit 26" "0,1"
|
|
bitfld.word 0x2 9. ",Identifier Mask bit 25" "0,1"
|
|
bitfld.word 0x2 8. ",Identifier Mask bit 24" "0,1"
|
|
bitfld.word 0x2 7. ",Identifier Mask bit 23" "0,1"
|
|
bitfld.word 0x2 6. ",Identifier Mask bit 22" "0,1"
|
|
bitfld.word 0x2 5. ",Identifier Mask bit 21" "0,1"
|
|
bitfld.word 0x2 4. ",Identifier Mask bit 20" "0,1"
|
|
bitfld.word 0x2 3. ",Identifier Mask bit 19" "0,1"
|
|
bitfld.word 0x2 2. ",Identifier Mask bit 18" "0,1"
|
|
bitfld.word 0x2 1. ",Identifier Mask bit 17" "0,1"
|
|
bitfld.word 0x2 0. ",Identifier Mask bit 16" "0,1"
|
|
line.word 0x4 "IF1ARB12,IF1 Arbitration Register 1"
|
|
line.word 0x6 "IF1ARB22,IF1 Arbitration Registers 2"
|
|
bitfld.word 0x6 15. " MSGVAL ,Message Valid (Message Object is:)" "Invalid,Valid"
|
|
bitfld.word 0x6 14. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.word 0x6 13. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.word 0x6 0.--12. 1. " ID[28-16] ,Message Identifier bits 28...16"
|
|
if (((d.w(ad:0xb0808800+0x10+0xA))&0x2000)==0x2000)
|
|
group.word (0x10+0xC)++0x1
|
|
line.word 0x0 "IF1MCTR2,IF1 Message Control Register"
|
|
bitfld.word 0x0 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.word 0x0 13. " INTPND ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " UMASK ,Use Acceptance Mask" "Not used,Used"
|
|
bitfld.word 0x0 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " EOB ,End of FIFO Buffer" "No EOB,EOB"
|
|
bitfld.word 0x0 0.--3. " DLC[3:0] ,Data Length Code (in bytes)" "1,2,3,4,5,6,7,8,8,8,8,8,8,8,8,8"
|
|
else
|
|
group.word (0x10+0xC)++0x1
|
|
line.word 0x0 "IF1MCTR2,IF1 Message Control Register"
|
|
bitfld.word 0x0 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.word 0x0 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.word 0x0 13. " INTPND ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " UMASK ,Use Acceptance Mask" "Not used,Used"
|
|
bitfld.word 0x0 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " EOB ,End of FIFO Buffer" "No EOB,EOB"
|
|
bitfld.word 0x0 0.--3. " DLC ,Data Length Code (in bytes)" "1,2,3,4,5,6,7,8,8,8,8,8,8,8,8,8"
|
|
endif
|
|
group.word (0x10+0x10)++0x7
|
|
line.word 0x0 "IF1DTA12,IF1 Data A1 Register"
|
|
line.word 0x2 "IF1DTA22,IF1 Data A2 Register"
|
|
line.word 0x4 "IF1DTB12,IF1 Data B1 Register"
|
|
line.word 0x6 "IF1DTB22,IF1 Data B2 Register"
|
|
tree.end
|
|
tree "IF2 Registers"
|
|
group.word 0x40++0x1
|
|
line.word 0x0 "IF2CREQ2,IF2 Command Request Register"
|
|
bitfld.word 0x0 15. " BUSY ,Busy Flag" "Not busy,Busy"
|
|
hexmask.word.byte 0x0 0.--7. 0x1 " MSGN ,Message Number"
|
|
if (((d.b(ad:0xb0808800+0x40+0x2))&0x80)==0x80)
|
|
group.byte (0x40+0x2)++0x0
|
|
line.byte 0x0 "IF2CMSK2,IF2 Command Mask Register"
|
|
bitfld.byte 0x0 7. " WRRD ,Write/Read" "Read,Write"
|
|
bitfld.byte 0x0 6. " MASK ,Access Mask Bit" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 5. " ARB ,Access Arbitration Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 4. " CONTROL ,Access Control Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 2. " TXREQ ,Access Transmission Request Bit (TXRQST)" "Unchanged,Set"
|
|
bitfld.byte 0x0 1. " DATAA ,Access Data Bytes 0-3" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " DATAB ,Access Data Bytes 4-7" "Unchanged,Transferred"
|
|
else
|
|
group.byte (0x40+0x2)++0x0
|
|
line.byte 0x0 "IF2CMSK2,IF2 Command Mask Register"
|
|
bitfld.byte 0x0 7. " WRRD ,Write/Read" "Read,Write"
|
|
bitfld.byte 0x0 6. " MASK ,Access Mask Bit" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 5. " ARB ,Access Arbitration Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 4. " CONTROL ,Access Control Bits" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 3. " CIP ,Clear Interrupt Pending Bit (INTPND)" "Unchanged,Cleared"
|
|
bitfld.byte 0x0 2. " TXREQ ,Access Transmission Request Bit (NEWDAT)" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " DATAA ,Access Data Bytes 0-3" "Unchanged,Transferred"
|
|
bitfld.byte 0x0 0. " DATAB ,Access Data Bytes 4-7" "Unchanged,Transferred"
|
|
endif
|
|
group.word (0x40+0x4)++0x7
|
|
line.word 0x0 "IF2MSK12,IF2 Mask Registers 1"
|
|
bitfld.word 0x0 15. " MSK[15:0] ,Identifier Mask bit 15" "0,1"
|
|
bitfld.word 0x0 14. ",Identifier Mask bit 14" "0,1"
|
|
bitfld.word 0x0 13. ",Identifier Mask bit 13" "0,1"
|
|
bitfld.word 0x0 12. ",Identifier Mask bit 12" "0,1"
|
|
bitfld.word 0x0 11. ",Identifier Mask bit 11" "0,1"
|
|
bitfld.word 0x0 10. ",Identifier Mask bit 10" "0,1"
|
|
bitfld.word 0x0 9. ",Identifier Mask bit 9" "0,1"
|
|
bitfld.word 0x0 8. ",Identifier Mask bit 8" "0,1"
|
|
bitfld.word 0x0 7. ",Identifier Mask bit 7" "0,1"
|
|
bitfld.word 0x0 6. ",Identifier Mask bit 6" "0,1"
|
|
bitfld.word 0x0 5. ",Identifier Mask bit 5" "0,1"
|
|
bitfld.word 0x0 4. ",Identifier Mask bit 4" "0,1"
|
|
bitfld.word 0x0 3. ",Identifier Mask bit 3" "0,1"
|
|
bitfld.word 0x0 2. ",Identifier Mask bit 2" "0,1"
|
|
bitfld.word 0x0 1. ",Identifier Mask bit 1" "0,1"
|
|
bitfld.word 0x0 0. ",Identifier Mask bit 0" "0,1"
|
|
line.word 0x2 "IF2MSK22,IF2 Mask Registers 2 (Mask bits of Message Object)"
|
|
bitfld.word 0x2 15. " MXTD ,Mask Extended Identifier" "0,1"
|
|
bitfld.word 0x2 14. " MDIR ,Mask Message Direction (effect of DIR in filtering)" "0,1"
|
|
bitfld.word 0x2 12. " MSK[28:16] ,Identifier Mask bit 28" "0,1"
|
|
bitfld.word 0x2 11. ",Identifier Mask bit 27" "0,1"
|
|
bitfld.word 0x2 10. ",Identifier Mask bit 26" "0,1"
|
|
bitfld.word 0x2 9. ",Identifier Mask bit 25" "0,1"
|
|
bitfld.word 0x2 8. ",Identifier Mask bit 24" "0,1"
|
|
bitfld.word 0x2 7. ",Identifier Mask bit 23" "0,1"
|
|
bitfld.word 0x2 6. ",Identifier Mask bit 22" "0,1"
|
|
bitfld.word 0x2 5. ",Identifier Mask bit 21" "0,1"
|
|
bitfld.word 0x2 4. ",Identifier Mask bit 20" "0,1"
|
|
bitfld.word 0x2 3. ",Identifier Mask bit 19" "0,1"
|
|
bitfld.word 0x2 2. ",Identifier Mask bit 18" "0,1"
|
|
bitfld.word 0x2 1. ",Identifier Mask bit 17" "0,1"
|
|
bitfld.word 0x2 0. ",Identifier Mask bit 16" "0,1"
|
|
line.word 0x4 "IF2ARB12,IF2 Arbitration Register 1"
|
|
line.word 0x6 "IF2ARB22,IF2 Arbitration Registers 2"
|
|
bitfld.word 0x6 15. " MSGVAL ,Message Valid (Message Object is:)" "Invalid,Valid"
|
|
bitfld.word 0x6 14. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.word 0x6 13. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.word 0x6 0.--12. 1. " ID[28-16] ,Message Identifier bits 28...16"
|
|
if (((d.w(ad:0xb0808800+0x40+0xA))&0x2000)==0x2000)
|
|
group.word (0x40+0xC)++0x1
|
|
line.word 0x0 "IF2MCTR2,IF2 Message Control Register"
|
|
bitfld.word 0x0 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.word 0x0 13. " INTPND ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " UMASK ,Use Acceptance Mask" "Not used,Used"
|
|
bitfld.word 0x0 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " EOB ,End of FIFO Buffer" "No EOB,EOB"
|
|
bitfld.word 0x0 0.--3. " DLC[3:0] ,Data Length Code (in bytes)" "1,2,3,4,5,6,7,8,8,8,8,8,8,8,8,8"
|
|
else
|
|
group.word (0x40+0xC)++0x1
|
|
line.word 0x0 "IF2MCTR2,IF2 Message Control Register"
|
|
bitfld.word 0x0 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.word 0x0 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.word 0x0 13. " INTPND ,Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " UMASK ,Use Acceptance Mask" "Not used,Used"
|
|
bitfld.word 0x0 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " EOB ,End of FIFO Buffer" "No EOB,EOB"
|
|
bitfld.word 0x0 0.--3. " DLC ,Data Length Code (in bytes)" "1,2,3,4,5,6,7,8,8,8,8,8,8,8,8,8"
|
|
endif
|
|
group.word (0x40+0x10)++0x7
|
|
line.word 0x0 "IF2DTA12,IF2 Data A1 Register"
|
|
line.word 0x2 "IF2DTA22,IF2 Data A2 Register"
|
|
line.word 0x4 "IF2DTB12,IF2 Data B1 Register"
|
|
line.word 0x6 "IF2DTB22,IF2 Data B2 Register"
|
|
tree.end
|
|
tree.end
|
|
tree "Message Handler Registers"
|
|
rgroup.word 0x8++0x1 "Interrupt Register"
|
|
line.word 0x0 "INTR2,Interrupt Register (Source of Interrupt)"
|
|
tree "Transmission Request Registers"
|
|
rgroup.word 0x80++0x7
|
|
line.word 0x0 "TREQR12,Transmission Request Register for Message Objects 16-1"
|
|
bitfld.word 0x0 15. " TXRQST[16] ,Transmission Request MO 16" "Not requested,Requested"
|
|
bitfld.word 0x0 14. " [15] ,Transmission Request MO 15" "Not requested,Requested"
|
|
bitfld.word 0x0 13. " [14] ,Transmission Request MO 14" "Not requested,Requested"
|
|
bitfld.word 0x0 12. " [13] ,Transmission Request MO 13" "Not requested,Requested"
|
|
bitfld.word 0x0 11. " [12] ,Transmission Request MO 12" "Not requested,Requested"
|
|
bitfld.word 0x0 10. " [11] ,Transmission Request MO 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [10] ,Transmission Request MO 10" "Not requested,Requested"
|
|
bitfld.word 0x0 8. " [9] ,Transmission Request MO 9" "Not requested,Requested"
|
|
bitfld.word 0x0 7. " [8] ,Transmission Request MO 8" "Not requested,Requested"
|
|
bitfld.word 0x0 6. " [7] ,Transmission Request MO 7" "Not requested,Requested"
|
|
bitfld.word 0x0 5. " [6] ,Transmission Request MO 6" "Not requested,Requested"
|
|
bitfld.word 0x0 4. " [5] ,Transmission Request MO 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [4] ,Transmission Request MO 4" "Not requested,Requested"
|
|
bitfld.word 0x0 2. " [3] ,Transmission Request MO 3" "Not requested,Requested"
|
|
bitfld.word 0x0 1. " [2] ,Transmission Request MO 2" "Not requested,Requested"
|
|
bitfld.word 0x0 0. " [1] ,Transmission Request MO 1" "Not requested,Requested"
|
|
line.word 0x2 "TREQR22,Transmission Request Register for Message Objects 32-17"
|
|
bitfld.word 0x2 15. " TXRQST[32] ,Transmission Request MO 32" "Not requested,Requested"
|
|
bitfld.word 0x2 14. " [31] ,Transmission Request MO 31" "Not requested,Requested"
|
|
bitfld.word 0x2 13. " [30] ,Transmission Request MO 30" "Not requested,Requested"
|
|
bitfld.word 0x2 12. " [29] ,Transmission Request MO 29" "Not requested,Requested"
|
|
bitfld.word 0x2 11. " [28] ,Transmission Request MO 28" "Not requested,Requested"
|
|
bitfld.word 0x2 10. " [27] ,Transmission Request MO 27" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [26] ,Transmission Request MO 26" "Not requested,Requested"
|
|
bitfld.word 0x2 8. " [25] ,Transmission Request MO 25" "Not requested,Requested"
|
|
bitfld.word 0x2 7. " [24] ,Transmission Request MO 24" "Not requested,Requested"
|
|
bitfld.word 0x2 6. " [23] ,Transmission Request MO 23" "Not requested,Requested"
|
|
bitfld.word 0x2 5. " [22] ,Transmission Request MO 22" "Not requested,Requested"
|
|
bitfld.word 0x2 4. " [21] ,Transmission Request MO 21" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [20] ,Transmission Request MO 20" "Not requested,Requested"
|
|
bitfld.word 0x2 2. " [19] ,Transmission Request MO 19" "Not requested,Requested"
|
|
bitfld.word 0x2 1. " [18] ,Transmission Request MO 18" "Not requested,Requested"
|
|
bitfld.word 0x2 0. " [17] ,Transmission Request MO 17" "Not requested,Requested"
|
|
line.word 0x4 "TREQR32,Transmission Request Register for Message Objects 48-33"
|
|
bitfld.word 0x4 15. " TXRQST[48] ,Transmission Request MO 48" "Not requested,Requested"
|
|
bitfld.word 0x4 14. " [47] ,Transmission Request MO 47" "Not requested,Requested"
|
|
bitfld.word 0x4 13. " [46] ,Transmission Request MO 46" "Not requested,Requested"
|
|
bitfld.word 0x4 12. " [45] ,Transmission Request MO 45" "Not requested,Requested"
|
|
bitfld.word 0x4 11. " [44] ,Transmission Request MO 44" "Not requested,Requested"
|
|
bitfld.word 0x4 10. " [43] ,Transmission Request MO 43" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x4 9. " [42] ,Transmission Request MO 42" "Not requested,Requested"
|
|
bitfld.word 0x4 8. " [41] ,Transmission Request MO 41" "Not requested,Requested"
|
|
bitfld.word 0x4 7. " [40] ,Transmission Request MO 40" "Not requested,Requested"
|
|
bitfld.word 0x4 6. " [39] ,Transmission Request MO 39" "Not requested,Requested"
|
|
bitfld.word 0x4 5. " [38] ,Transmission Request MO 38" "Not requested,Requested"
|
|
bitfld.word 0x4 4. " [37] ,Transmission Request MO 37" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x4 3. " [36] ,Transmission Request MO 36" "Not requested,Requested"
|
|
bitfld.word 0x4 2. " [35] ,Transmission Request MO 35" "Not requested,Requested"
|
|
bitfld.word 0x4 1. " [34] ,Transmission Request MO 34" "Not requested,Requested"
|
|
bitfld.word 0x4 0. " [33] ,Transmission Request MO 33" "Not requested,Requested"
|
|
line.word 0x6 "TREQR42,Transmission Request Register for Message Objects 64-49"
|
|
bitfld.word 0x6 15. " TXRQST[64] ,Transmission Request MO 64" "Not requested,Requested"
|
|
bitfld.word 0x6 14. " [63] ,Transmission Request MO 63" "Not requested,Requested"
|
|
bitfld.word 0x6 13. " [62] ,Transmission Request MO 62" "Not requested,Requested"
|
|
bitfld.word 0x6 12. " [61] ,Transmission Request MO 61" "Not requested,Requested"
|
|
bitfld.word 0x6 11. " [60] ,Transmission Request MO 60" "Not requested,Requested"
|
|
bitfld.word 0x6 10. " [59] ,Transmission Request MO 59" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x6 9. " [58] ,Transmission Request MO 58" "Not requested,Requested"
|
|
bitfld.word 0x6 8. " [57] ,Transmission Request MO 57" "Not requested,Requested"
|
|
bitfld.word 0x6 7. " [56] ,Transmission Request MO 56" "Not requested,Requested"
|
|
bitfld.word 0x6 6. " [55] ,Transmission Request MO 55" "Not requested,Requested"
|
|
bitfld.word 0x6 5. " [54] ,Transmission Request MO 54" "Not requested,Requested"
|
|
bitfld.word 0x6 4. " [53] ,Transmission Request MO 53" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x6 3. " [52] ,Transmission Request MO 52" "Not requested,Requested"
|
|
bitfld.word 0x6 2. " [51] ,Transmission Request MO 51" "Not requested,Requested"
|
|
bitfld.word 0x6 1. " [50] ,Transmission Request MO 50" "Not requested,Requested"
|
|
bitfld.word 0x6 0. " [49] ,Transmission Request MO 49" "Not requested,Requested"
|
|
tree.end
|
|
tree "New Data Registers"
|
|
rgroup.word 0x90++0x7
|
|
line.word 0x0 "NEWDT12,New Data Register for Message Objects 16-1"
|
|
bitfld.word 0x0 15. " NEWDAT[16] ,New Data on MO 16" "No new data,New data"
|
|
bitfld.word 0x0 14. " [15] ,New Data on MO 15" "No new data,New data"
|
|
bitfld.word 0x0 13. " [14] ,New Data on MO 14" "No new data,New data"
|
|
bitfld.word 0x0 12. " [13] ,New Data on MO 13" "No new data,New data"
|
|
bitfld.word 0x0 11. " [12] ,New Data on MO 12" "No new data,New data"
|
|
bitfld.word 0x0 10. " [11] ,New Data on MO 11" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [10] ,New Data on MO 10" "No new data,New data"
|
|
bitfld.word 0x0 8. " [9] ,New Data on MO 9" "No new data,New data"
|
|
bitfld.word 0x0 7. " [8] ,New Data on MO 8" "No new data,New data"
|
|
bitfld.word 0x0 6. " [7] ,New Data on MO 7" "No new data,New data"
|
|
bitfld.word 0x0 5. " [6] ,New Data on MO 6" "No new data,New data"
|
|
bitfld.word 0x0 4. " [5] ,New Data on MO 5" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [4] ,New Data on MO 4" "No new data,New data"
|
|
bitfld.word 0x0 2. " [3] ,New Data on MO 3" "No new data,New data"
|
|
bitfld.word 0x0 1. " [2] ,New Data on MO 2" "No new data,New data"
|
|
bitfld.word 0x0 0. " [1] ,New Data on MO 1" "No new data,New data"
|
|
line.word 0x2 "NEWDT22,New Data Register for Message Objects 32-17"
|
|
bitfld.word 0x2 15. " NEWDAT[32] ,New Data on MO 32" "No new data,New data"
|
|
bitfld.word 0x2 14. " [31] ,New Data on MO 31" "No new data,New data"
|
|
bitfld.word 0x2 13. " [30] ,New Data on MO 30" "No new data,New data"
|
|
bitfld.word 0x2 12. " [29] ,New Data on MO 29" "No new data,New data"
|
|
bitfld.word 0x2 11. " [28] ,New Data on MO 28" "No new data,New data"
|
|
bitfld.word 0x2 10. " [27] ,New Data on MO 27" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [26] ,New Data on MO 26" "No new data,New data"
|
|
bitfld.word 0x2 8. " [25] ,New Data on MO 25" "No new data,New data"
|
|
bitfld.word 0x2 7. " [24] ,New Data on MO 24" "No new data,New data"
|
|
bitfld.word 0x2 6. " [23] ,New Data on MO 23" "No new data,New data"
|
|
bitfld.word 0x2 5. " [22] ,New Data on MO 22" "No new data,New data"
|
|
bitfld.word 0x2 4. " [21] ,New Data on MO 21" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [20] ,New Data on MO 20" "No new data,New data"
|
|
bitfld.word 0x2 2. " [19] ,New Data on MO 19" "No new data,New data"
|
|
bitfld.word 0x2 1. " [18] ,New Data on MO 18" "No new data,New data"
|
|
bitfld.word 0x2 0. " [17] ,New Data on MO 17" "No new data,New data"
|
|
line.word 0x4 "NEWDT32,New Data Register for Message Objects 48-33"
|
|
bitfld.word 0x4 15. " NEWDAT[48] ,New Data on MO 48" "No new data,New data"
|
|
bitfld.word 0x4 14. " [47] ,New Data on MO 47" "No new data,New data"
|
|
bitfld.word 0x4 13. " [46] ,New Data on MO 46" "No new data,New data"
|
|
bitfld.word 0x4 12. " [45] ,New Data on MO 45" "No new data,New data"
|
|
bitfld.word 0x4 11. " [44] ,New Data on MO 44" "No new data,New data"
|
|
bitfld.word 0x4 10. " [43] ,New Data on MO 43" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x4 9. " [42] ,New Data on MO 42" "No new data,New data"
|
|
bitfld.word 0x4 8. " [41] ,New Data on MO 41" "No new data,New data"
|
|
bitfld.word 0x4 7. " [40] ,New Data on MO 40" "No new data,New data"
|
|
bitfld.word 0x4 6. " [39] ,New Data on MO 39" "No new data,New data"
|
|
bitfld.word 0x4 5. " [38] ,New Data on MO 38" "No new data,New data"
|
|
bitfld.word 0x4 4. " [37] ,New Data on MO 37" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x4 3. " [36] ,New Data on MO 36" "No new data,New data"
|
|
bitfld.word 0x4 2. " [35] ,New Data on MO 35" "No new data,New data"
|
|
bitfld.word 0x4 1. " [34] ,New Data on MO 34" "No new data,New data"
|
|
bitfld.word 0x4 0. " [33] ,New Data on MO 33" "No new data,New data"
|
|
line.word 0x6 "NEWDT42,New Data Register for Message Objects 64-49"
|
|
bitfld.word 0x6 15. " NEWDAT[64] ,New Data on MO 64" "No new data,New data"
|
|
bitfld.word 0x6 14. " [63] ,New Data on MO 63" "No new data,New data"
|
|
bitfld.word 0x6 13. " [62] ,New Data on MO 62" "No new data,New data"
|
|
bitfld.word 0x6 12. " [61] ,New Data on MO 61" "No new data,New data"
|
|
bitfld.word 0x6 11. " [60] ,New Data on MO 60" "No new data,New data"
|
|
bitfld.word 0x6 10. " [59] ,New Data on MO 59" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x6 9. " [58] ,New Data on MO 58" "No new data,New data"
|
|
bitfld.word 0x6 8. " [57] ,New Data on MO 57" "No new data,New data"
|
|
bitfld.word 0x6 7. " [56] ,New Data on MO 56" "No new data,New data"
|
|
bitfld.word 0x6 6. " [55] ,New Data on MO 55" "No new data,New data"
|
|
bitfld.word 0x6 5. " [54] ,New Data on MO 54" "No new data,New data"
|
|
bitfld.word 0x6 4. " [53] ,New Data on MO 53" "No new data,New data"
|
|
textline " "
|
|
bitfld.word 0x6 3. " [52] ,New Data on MO 52" "No new data,New data"
|
|
bitfld.word 0x6 2. " [51] ,New Data on MO 51" "No new data,New data"
|
|
bitfld.word 0x6 1. " [50] ,New Data on MO 50" "No new data,New data"
|
|
bitfld.word 0x6 0. " [49] ,New Data on MO 49" "No new data,New data"
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
rgroup.word 0xA0++0x7
|
|
line.word 0x0 "INTPND12,Interrupt Pending Register for Message Objects 16-1"
|
|
bitfld.word 0x0 15. " INTPND[16] ,MO 16 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 14. " [15] ,MO 15 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 13. " [14] ,MO 14 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 12. " [13] ,MO 13 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 11. " [12] ,MO 12 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 10. " [11] ,MO 11 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [10] ,MO 10 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 8. " [9] ,MO 9 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 7. " [8] ,MO 8 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 6. " [7] ,MO 7 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 5. " [6] ,MO 6 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 4. " [5] ,MO 5 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [4] ,MO 4 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 2. " [3] ,MO 3 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 1. " [2] ,MO 2 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x0 0. " [1] ,MO 1 Interrupt Pending" "Not pending,Pending"
|
|
line.word 0x2 "INTPND22,Interrupt Pending Register for Message Objects 32-17"
|
|
bitfld.word 0x2 15. " INTPND[32] ,MO 32 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 14. " [31] ,MO 31 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 13. " [30] ,MO 30 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 12. " [29] ,MO 29 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 11. " [28] ,MO 28 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 10. " [27] ,MO 27 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [26] ,MO 26 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 8. " [25] ,MO 25 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 7. " [24] ,MO 24 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 6. " [23] ,MO 23 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 5. " [22] ,MO 22 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 4. " [21] ,MO 21 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [20] ,MO 20 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 2. " [19] ,MO 19 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 1. " [18] ,MO 18 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x2 0. " [17] ,MO 17 Interrupt Pending" "Not pending,Pending"
|
|
line.word 0x4 "INTPND32,Interrupt Pending Register for Message Objects 48-33"
|
|
bitfld.word 0x4 15. " INTPND[48] ,MO 48 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 14. " [47] ,MO 47 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 13. " [46] ,MO 46 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 12. " [45] ,MO 45 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 11. " [44] ,MO 44 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 10. " [43] ,MO 43 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x4 9. " [42] ,MO 42 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 8. " [41] ,MO 41 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 7. " [40] ,MO 40 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 6. " [39] ,MO 39 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 5. " [38] ,MO 38 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 4. " [37] ,MO 37 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x4 3. " [36] ,MO 36 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 2. " [35] ,MO 35 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 1. " [34] ,MO 34 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x4 0. " [33] ,MO 33 Interrupt Pending" "Not pending,Pending"
|
|
line.word 0x6 "INTPND42,Interrupt Pending Register for Message Objects 64-49"
|
|
bitfld.word 0x6 15. " INTPND[64] ,MO 64 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 14. " [63] ,MO 63 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 13. " [62] ,MO 62 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 12. " [61] ,MO 61 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 11. " [60] ,MO 60 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 10. " [59] ,MO 59 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x6 9. " [58] ,MO 58 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 8. " [57] ,MO 57 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 7. " [56] ,MO 56 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 6. " [55] ,MO 55 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 5. " [54] ,MO 54 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 4. " [53] ,MO 53 Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x6 3. " [52] ,MO 52 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 2. " [51] ,MO 51 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 1. " [50] ,MO 50 Interrupt Pending" "Not pending,Pending"
|
|
bitfld.word 0x6 0. " [49] ,MO 49 Interrupt Pending" "Not pending,Pending"
|
|
tree.end
|
|
width 12.
|
|
tree "Message Valid Registers"
|
|
rgroup.word 0xB0++0x7
|
|
line.word 0x0 "MSGVAL12,Message Valid Register for Message Objects 16-1"
|
|
bitfld.word 0x0 15. " MSGVAL[16] ,Validity status of MO 16" "Not valid,Valid"
|
|
bitfld.word 0x0 14. " [15] ,Validity status of MO 15" "Not valid,Valid"
|
|
bitfld.word 0x0 13. " [14] ,Validity status of MO 14" "Not valid,Valid"
|
|
bitfld.word 0x0 12. " [13] ,Validity status of MO 13" "Not valid,Valid"
|
|
bitfld.word 0x0 11. " [12] ,Validity status of MO 12" "Not valid,Valid"
|
|
bitfld.word 0x0 10. " [11] ,Validity status of MO 11" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [10] ,Validity status of MO 10" "Not valid,Valid"
|
|
bitfld.word 0x0 8. " [9] ,Validity status of MO 9" "Not valid,Valid"
|
|
bitfld.word 0x0 7. " [8] ,Validity status of MO 8" "Not valid,Valid"
|
|
bitfld.word 0x0 6. " [7] ,Validity status of MO 7" "Not valid,Valid"
|
|
bitfld.word 0x0 5. " [6] ,Validity status of MO 6" "Not valid,Valid"
|
|
bitfld.word 0x0 4. " [5] ,Validity status of MO 5" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [4] ,Validity status of MO 4" "Not valid,Valid"
|
|
bitfld.word 0x0 2. " [3] ,Validity status of MO 3" "Not valid,Valid"
|
|
bitfld.word 0x0 1. " [2] ,Validity status of MO 2" "Not valid,Valid"
|
|
bitfld.word 0x0 0. " [1] ,Validity status of MO 1" "Not valid,Valid"
|
|
line.word 0x2 "MSGVAL22,Message Valid Register for Message Objects 32-17"
|
|
bitfld.word 0x2 15. " MSGVAL[32] ,Validity status of MO 32" "Not valid,Valid"
|
|
bitfld.word 0x2 14. " [31] ,Validity status of MO 31" "Not valid,Valid"
|
|
bitfld.word 0x2 13. " [30] ,Validity status of MO 30" "Not valid,Valid"
|
|
bitfld.word 0x2 12. " [29] ,Validity status of MO 29" "Not valid,Valid"
|
|
bitfld.word 0x2 11. " [28] ,Validity status of MO 28" "Not valid,Valid"
|
|
bitfld.word 0x2 10. " [27] ,Validity status of MO 27" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [26] ,Validity status of MO 26" "Not valid,Valid"
|
|
bitfld.word 0x2 8. " [25] ,Validity status of MO 25" "Not valid,Valid"
|
|
bitfld.word 0x2 7. " [24] ,Validity status of MO 24" "Not valid,Valid"
|
|
bitfld.word 0x2 6. " [23] ,Validity status of MO 23" "Not valid,Valid"
|
|
bitfld.word 0x2 5. " [22] ,Validity status of MO 22" "Not valid,Valid"
|
|
bitfld.word 0x2 4. " [21] ,Validity status of MO 21" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [20] ,Validity status of MO 20" "Not valid,Valid"
|
|
bitfld.word 0x2 2. " [19] ,Validity status of MO 19" "Not valid,Valid"
|
|
bitfld.word 0x2 1. " [18] ,Validity status of MO 18" "Not valid,Valid"
|
|
bitfld.word 0x2 0. " [17] ,Validity status of MO 17" "Not valid,Valid"
|
|
line.word 0x4 "MSGVAL32,Message Valid Register for Message Objects 48-33"
|
|
bitfld.word 0x4 15. " MSGVAL[48] ,Validity status of MO 48" "Not valid,Valid"
|
|
bitfld.word 0x4 14. " [47] ,Validity status of MO 47" "Not valid,Valid"
|
|
bitfld.word 0x4 13. " [46] ,Validity status of MO 46" "Not valid,Valid"
|
|
bitfld.word 0x4 12. " [45] ,Validity status of MO 45" "Not valid,Valid"
|
|
bitfld.word 0x4 11. " [44] ,Validity status of MO 44" "Not valid,Valid"
|
|
bitfld.word 0x4 10. " [43] ,Validity status of MO 43" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x4 9. " [42] ,Validity status of MO 42" "Not valid,Valid"
|
|
bitfld.word 0x4 8. " [41] ,Validity status of MO 41" "Not valid,Valid"
|
|
bitfld.word 0x4 7. " [40] ,Validity status of MO 40" "Not valid,Valid"
|
|
bitfld.word 0x4 6. " [39] ,Validity status of MO 39" "Not valid,Valid"
|
|
bitfld.word 0x4 5. " [38] ,Validity status of MO 38" "Not valid,Valid"
|
|
bitfld.word 0x4 4. " [37] ,Validity status of MO 37" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x4 3. " [36] ,Validity status of MO 36" "Not valid,Valid"
|
|
bitfld.word 0x4 2. " [35] ,Validity status of MO 35" "Not valid,Valid"
|
|
bitfld.word 0x4 1. " [34] ,Validity status of MO 34" "Not valid,Valid"
|
|
bitfld.word 0x4 0. " [33] ,Validity status of MO 33" "Not valid,Valid"
|
|
line.word 0x6 "MSGVAL42,Message Valid Register for Message Objects 64-49"
|
|
bitfld.word 0x6 15. " MSGVAL[64] ,Validity status of MO 64" "Not valid,Valid"
|
|
bitfld.word 0x6 14. " [63] ,Validity status of MO 63" "Not valid,Valid"
|
|
bitfld.word 0x6 13. " [62] ,Validity status of MO 62" "Not valid,Valid"
|
|
bitfld.word 0x6 12. " [61] ,Validity status of MO 61" "Not valid,Valid"
|
|
bitfld.word 0x6 11. " [60] ,Validity status of MO 60" "Not valid,Valid"
|
|
bitfld.word 0x6 10. " [59] ,Validity status of MO 59" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x6 9. " [58] ,Validity status of MO 58" "Not valid,Valid"
|
|
bitfld.word 0x6 8. " [57] ,Validity status of MO 57" "Not valid,Valid"
|
|
bitfld.word 0x6 7. " [56] ,Validity status of MO 56" "Not valid,Valid"
|
|
bitfld.word 0x6 6. " [55] ,Validity status of MO 55" "Not valid,Valid"
|
|
bitfld.word 0x6 5. " [54] ,Validity status of MO 54" "Not valid,Valid"
|
|
bitfld.word 0x6 4. " [53] ,Validity status of MO 53" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.word 0x6 3. " [52] ,Validity status of MO 52" "Not valid,Valid"
|
|
bitfld.word 0x6 2. " [51] ,Validity status of MO 51" "Not valid,Valid"
|
|
bitfld.word 0x6 1. " [50] ,Validity status of MO 50" "Not valid,Valid"
|
|
bitfld.word 0x6 0. " [49] ,Validity status of MO 49" "Not valid,Valid"
|
|
tree.end
|
|
tree.end
|
|
width 12.
|
|
tree "Debug Register"
|
|
group.word 0xD0++0x1
|
|
line.word 0x0 "DEBUG2,Debug Register"
|
|
bitfld.word 0x0 1. " DBGLB ,Debug Loop Back Mode Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " DBGSL ,Debug Silent Mode Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 12.
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree.open "LIN-USART"
|
|
tree "USART 0"
|
|
base ad:0xb0728000
|
|
width 14.
|
|
if (((d.b(ad:0xb0728000))&0xC0)==0x80)
|
|
group.byte 0x0++0x0 "Mode and Control Registers"
|
|
line.byte 0x0 "USART0_SMR,Serial Mode Register"
|
|
bitfld.byte 0x0 6.--7. " MD[1:0] ,Operation Mode Select" "Asynch normal,Asynch multiprocessor,Synch,Asynchronous LIN"
|
|
bitfld.byte 0x0 5. " OTO ,One-to-One External Clock Selection" "Reload counter,External clock"
|
|
bitfld.byte 0x0 4. " EXT ,External Clock Selection" "Reload counter,External clock"
|
|
bitfld.byte 0x0 3. " REST ,Restart of Transmission Reload Counter" "No effect,Restart"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " UPCL ,LIN-USART Programmable Clear" "No effect,Reset"
|
|
bitfld.byte 0x0 0. " NFEN ,Noise Filter Enable for SIN pin" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0++0x0 "Mode and Control Registers"
|
|
line.byte 0x0 "USART0_SMR,Serial Mode Register"
|
|
bitfld.byte 0x0 6.--7. " MD[1:0] ,Operation Mode Select" "Asynch normal,Asynch multiprocessor,Synch,Asynchronous LIN"
|
|
bitfld.byte 0x0 4. " EXT ,External Clock Selection" "Reload counter,External clock"
|
|
bitfld.byte 0x0 3. " REST ,Restart of Transmission Reload Counter" "No effect,Restart"
|
|
bitfld.byte 0x0 2. " UPCL ,LIN-USART Programmable Clear" "No effect,Reset"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " NFEN ,Noise Filter Enable for SIN pin" "Disabled,Enabled"
|
|
endif
|
|
if (((d.b(ad:0xb0728000))&0xC0)==0x00)
|
|
group.byte 0x1++0x0
|
|
line.byte 0x0 "USART0_SCR,Serial Control Register"
|
|
bitfld.byte 0x0 7. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " P ,Parity Selection" "Even,Odd"
|
|
bitfld.byte 0x0 5. " SBL ,Stop Bit Length Selection" "1,2"
|
|
bitfld.byte 0x0 4. " CL ,Character (Data frame) Length (in bits)" "7,8"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " CRE ,Clear Reception Error Flags" "No effect,Clear"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RXE_set/clr ,Reception Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TXE_set/clr ,Transmission Enable" "Disabled,Enabled"
|
|
elif (((d.b(ad:0xb0728000))&0xC0)==0x40)
|
|
group.byte 0x1++0x0
|
|
line.byte 0x0 "USART0_SCR,Serial Control Register"
|
|
bitfld.byte 0x0 5. " SBL ,Stop Bit Length Selection" "1,2"
|
|
bitfld.byte 0x0 4. " CL ,Character (Data frame) Length (in bits)" "7,8"
|
|
setclrfld.byte 0x0 3. 0x2 3. 0x4 3. " AD_set/clr ,Address or Data Selection" "Data,Address"
|
|
bitfld.byte 0x0 2. " CRE ,Clear Reception Error Flags" "No effect,Clear"
|
|
textline " "
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RXE_set/clr ,Reception Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TXE_set/clr ,Transmission Enable" "Disabled,Enabled"
|
|
elif (((d.b(ad:0xb0728000))&0xC0)==0x80&&((d.b(ad:0xb0728000+0x0c))&0x8)==0x8)
|
|
group.byte 0x1++0x0
|
|
line.byte 0x0 "USART0_SCR,Serial Control Register"
|
|
bitfld.byte 0x0 7. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " P ,Parity Selection" "Even,Odd"
|
|
bitfld.byte 0x0 5. " SBL ,Stop Bit Length Selection" "1,2"
|
|
bitfld.byte 0x0 4. " CL ,Character (Data frame) Length (in bits)" ",8"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " CRE ,Clear Reception Error Flags" "No effect,Clear"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RXE_set/clr ,Reception Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TXE_set/clr ,Transmission Enable" "Disabled,Enabled"
|
|
elif (((d.b(ad:0xb0728000))&0xC0)==0x80&&((d.b(ad:0xb0728000+0x0c))&0x8)==0x0)
|
|
group.byte 0x1++0x0
|
|
line.byte 0x0 "USART0_SCR,Serial Control Register"
|
|
bitfld.byte 0x0 5. " SBL ,Stop Bit Length Selection" "1,"
|
|
bitfld.byte 0x0 4. " CL ,Character (Data frame) Length (in bits)" ",8"
|
|
bitfld.byte 0x0 2. " CRE ,Clear Reception Error Flags" "No effect,Clear"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RXE_set/clr ,Reception Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TXE_set/clr ,Transmission Enable" "Disabled,Enabled"
|
|
elif (((d.b(ad:0xb0728000))&0xC0)==0xC0)
|
|
group.byte 0x1++0x0
|
|
line.byte 0x0 "USART0_SCR,Serial Control Register"
|
|
bitfld.byte 0x0 5. " SBL ,Stop Bit Length Selection" "1,"
|
|
bitfld.byte 0x0 4. " CL ,Character (Data frame) Length (in bits)" ",8"
|
|
bitfld.byte 0x0 2. " CRE ,Clear Reception Error Flags" "No effect,Clear"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RXE_set/clr ,Reception Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TXE_set/clr ,Transmission Enable" "Disabled,Enabled"
|
|
endif
|
|
wgroup.byte 0x2++0x1
|
|
line.byte 0x0 "USART0_SMSR,Serial Mode Set Register"
|
|
bitfld.byte 0x0 3. " RESTS ,USART0_SMR:REST Set" "No effect,Set"
|
|
bitfld.byte 0x0 2. " UPCLS ,USART0_SMR:UPCL Set" "No effect,Set"
|
|
line.byte 0x1 "USART0_SCSR,Serial Control Set Register"
|
|
bitfld.byte 0x1 2. " CRES ,USART0_SCR::CRE Set" "No effect,Set"
|
|
wgroup.byte 0x6++0x0 "Transmission Data Register"
|
|
line.byte 0x0 "USART0_TDR,Transmission Data Register"
|
|
if (((d.b(ad:0xb0728000))&0xC0)==0xC0)
|
|
group.byte 0x7++0x0 "Status Register"
|
|
line.byte 0x0 "USART0_SSR,Serial Status Register"
|
|
rbitfld.byte 0x0 7. " PE ,Parity Error Flag" "No error,Error"
|
|
rbitfld.byte 0x0 6. " ORE ,Overrun Error Flag" "No error,Error"
|
|
rbitfld.byte 0x0 5. " FRE ,Framing Error Flag" "No error,Error"
|
|
rbitfld.byte 0x0 4. " RDRF ,Receive Data Register Full Flag" "Empty,Full"
|
|
textline " "
|
|
rbitfld.byte 0x0 3. " TDRE ,Transmission Data Register Empty" "Full,Empty"
|
|
bitfld.byte 0x0 2. " BDS ,Transfer Direction Selection" "LSB,"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RIE_set/clr ,Receive Interrupt Request Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TIE_set/clr ,Transmission Interrupt Request Enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x7++0x0 "Status Register"
|
|
line.byte 0x0 "USART0_SSR,Serial Status Register"
|
|
rbitfld.byte 0x0 7. " PE ,Parity Error Flag" "No error,Error"
|
|
rbitfld.byte 0x0 6. " ORE ,Overrun Error Flag" "No error,Error"
|
|
rbitfld.byte 0x0 5. " FRE ,Framing Error Flag" "No error,Error"
|
|
rbitfld.byte 0x0 4. " RDRF ,Receive Data Register Full Flag" "Empty,Full"
|
|
textline " "
|
|
rbitfld.byte 0x0 3. " TDRE ,Transmission Data Register Empty" "Full,Empty"
|
|
bitfld.byte 0x0 2. " BDS ,Transfer Direction Selection" "LSB,MSB"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RIE_set/clr ,Receive Interrupt Request Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TIE_set/clr ,Transmission Interrupt Request Enable" "Disabled,Enabled"
|
|
endif
|
|
hgroup.byte 0x8++0x0 "Reception Data Register"
|
|
hide.byte 0x0 "USART0_RDR,Reception Data Register"
|
|
in
|
|
if (((d.b(ad:0xb0728000))&0xC0)==0xC0)
|
|
group.byte 0xC++0x0 "Extended Registers"
|
|
line.byte 0x0 "USART0_ECCR,Extended Communication Control Register"
|
|
bitfld.byte 0x0 7. " INV ,Invert Serial Data" "Not inverted,Inverted"
|
|
bitfld.byte 0x0 6. " LBR ,Generate LIN Sync Break" "No effect,Generated"
|
|
bitfld.byte 0x0 5. " MS ,Master Slave Mode select" "Master,"
|
|
bitfld.byte 0x0 4. " SCDE ,Serial Clock Delay Enable" "Disabled,"
|
|
textline " "
|
|
bitfld.byte 0x0 3. " SSM ,Start_Stop Bit Mode Enable" "Disabled,"
|
|
bitfld.byte 0x0 2. " BIE ,Bus Idle Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " TBI ,Transmission Bus Idle Flag" "Transmission,No transmission"
|
|
elif (((d.b(ad:0xb0728000))&0xC0)==0x00)
|
|
group.byte 0xC++0x0 "Extended Registers"
|
|
line.byte 0x0 "USART0_ECCR,Extended Communication Control Register"
|
|
bitfld.byte 0x0 7. " INV ,Invert Serial Data" "Not inverted,Inverted"
|
|
bitfld.byte 0x0 6. " LBR ,Generate LIN Sync Break" "No effect,Generated"
|
|
bitfld.byte 0x0 5. " MS ,Master Slave Mode select" "Master,"
|
|
bitfld.byte 0x0 4. " SCDE ,Serial Clock Delay Enable" "Disabled,"
|
|
textline " "
|
|
bitfld.byte 0x0 3. " SSM ,Start_Stop Bit Mode Enable" "Disabled,"
|
|
bitfld.byte 0x0 2. " BIE ,Bus Idle Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " RBI ,Reception Bus Idle Flag" "Reception,No reception"
|
|
bitfld.byte 0x0 0. " TBI ,Transmission Bus Idle Flag" "Transmission,No transmission"
|
|
elif (((d.b(ad:0xb0728000))&0xC0)==0x80&&((d.b(ad:0xb0728000+0x0c))&0x8)==0x8)
|
|
group.byte 0xC++0x0 "Extended Registers"
|
|
line.byte 0x0 "USART0_ECCR,Extended Communication Control Register"
|
|
bitfld.byte 0x0 7. " INV ,Invert Serial Data" "Not inverted,Inverted"
|
|
bitfld.byte 0x0 5. " MS ,Master Slave Mode select" "Master,Slave"
|
|
bitfld.byte 0x0 4. " SCDE ,Serial Clock Delay Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 3. " SSM ,Start_Stop Bit Mode Enable" "Disabled,Enabled"
|
|
elif (((d.b(ad:0xb0728000))&0xC0)==0x80&&((d.b(ad:0xb0728000+0x0c))&0x8)==0x0&&((d.b(ad:0xb0728000+0x0d))&0x2)==0x2)
|
|
group.byte 0xC++0x0 "Extended Registers"
|
|
line.byte 0x0 "USART0_ECCR,Extended Communication Control Register"
|
|
bitfld.byte 0x0 7. " INV ,Invert Serial Data" "Not inverted,Inverted"
|
|
bitfld.byte 0x0 5. " MS ,Master Slave Mode select" "Master,Slave"
|
|
bitfld.byte 0x0 4. " SCDE ,Serial Clock Delay Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 3. " SSM ,Start_Stop Bit Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " BIE ,Bus Idle Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " RBI ,Reception Bus Idle Flag" "Reception,No reception"
|
|
bitfld.byte 0x0 0. " TBI ,Transmission Bus Idle Flag" "Transmission,No transmission"
|
|
elif (((d.b(ad:0xb0728000))&0xC0)==0x80&&((d.b(ad:0xb0728000+0x0c))&0x8)==0x0&&((d.b(ad:0xb0728000+0x0d))&0x2)==0x0)
|
|
group.byte 0xC++0x0 "Extended Registers"
|
|
line.byte 0x0 "USART0_ECCR,Extended Communication Control Register"
|
|
bitfld.byte 0x0 7. " INV ,Invert Serial Data" "Not inverted,Inverted"
|
|
bitfld.byte 0x0 5. " MS ,Master Slave Mode select" "Master,Slave"
|
|
bitfld.byte 0x0 4. " SCDE ,Serial Clock Delay Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 3. " SSM ,Start_Stop Bit Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " BIE ,Bus Idle Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " TBI ,Transmission Bus Idle Flag" "Transmission,No transmission"
|
|
else
|
|
group.byte 0xC++0x0 "Extended Registers"
|
|
line.byte 0x0 "USART0_ECCR,Extended Communication Control Register"
|
|
bitfld.byte 0x0 7. " INV ,Invert Serial Data" "Not inverted,Inverted"
|
|
bitfld.byte 0x0 5. " MS ,Master Slave Mode select" "Master,"
|
|
bitfld.byte 0x0 4. " SCDE ,Serial Clock Delay Enable" "Disabled,"
|
|
bitfld.byte 0x0 3. " SSM ,Start_Stop Bit Mode Enable" "Disabled,"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " BIE ,Bus Idle Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " RBI ,Reception Bus Idle Flag" "Reception,No reception"
|
|
bitfld.byte 0x0 0. " TBI ,Transmission Bus Idle Flag" "Transmission,No transmission"
|
|
endif
|
|
if (((d.b(ad:0xb0728000+0x19))&0x1)==0x0&&((d.b(ad:0xb0728000))&0xC0)==0x40)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART0_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "13,14,15,16"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,"
|
|
elif (((d.b(ad:0xb0728000+0x19))&0x1)==0x0&&((d.b(ad:0xb0728000))&0xC0)==0x80)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART0_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "13,14,15,16"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,Falling edge"
|
|
elif (((d.b(ad:0xb0728000+0x19))&0x1)==0x0&&((d.b(ad:0xb0728000))&0xC0)==0xC0)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART0_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " LBD ,Sync Break Detected Flag" "Not detected,Detected"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "13,14,15,16"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,"
|
|
elif (((d.b(ad:0xb0728000+0x19))&0x1)==0x1&&((d.b(ad:0xb0728000))&0xC0)==0x40)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART0_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "17,18,19,20"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,"
|
|
elif (((d.b(ad:0xb0728000+0x19))&0x1)==0x1&&((d.b(ad:0xb0728000))&0xC0)==0x80)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART0_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "17,18,19,20"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,Falling edge"
|
|
elif (((d.b(ad:0xb0728000+0x19))&0x1)==0x1&&((d.b(ad:0xb0728000))&0xC0)==0xC0)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART0_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " LBD ,Sync Break Detected Flag" "Not detected,Detected"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "17,18,19,20"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,"
|
|
elif (((d.b(ad:0xb0728000+0x19))&0x1)==0x0&&((d.b(ad:0xb0728000))&0xC0)==0x00)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART0_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "13,14,15,16"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,"
|
|
elif (((d.b(ad:0xb0728000+0x19))&0x1)==0x1&&((d.b(ad:0xb0728000))&0xC0)==0x00)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART0_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "17,18,19,20"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,"
|
|
endif
|
|
wgroup.byte 0xE++0x0
|
|
line.byte 0x0 "USART0_ECCSR,Extended Communication Control Set Register"
|
|
bitfld.byte 0x0 6. " LBRS ,USART0_ECCR:LBR Set" "No effect,Set"
|
|
bitfld.byte 0x0 2. " BIES ,USART0_ECCR:BIE Set" "No effect,Set"
|
|
wgroup.byte 0x10++0x01
|
|
line.byte 0x0 "USART0_ECCCR,Extended Communication Control Clear Register"
|
|
bitfld.byte 0x0 2. " BIEC ,USARTn_ECCR:BIE Clear" "No effect,Clear"
|
|
line.byte 0x1 "USART0_ESCCR,Extended Status/Control Clear Register"
|
|
bitfld.byte 0x1 6. " LBDC ,USART0_ESCR:LBD Clear" "No effect,Clear"
|
|
group.byte 0x12++0x0
|
|
line.byte 0x0 "USART0_ESIR,Extended Serial Interrupt Register"
|
|
setclrfld.byte 0x0 6. 0x2 6. 0x4 6. " PEIE_set/clr ,Parity Error (in data received) Interrupt Enable bit" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 5. 0x2 5. 0x4 5. " OREIE_set/clr ,Overrun Error Interrupt Enable bit" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 4. 0x2 4. 0x4 4. " FREIE_set/clr ,Framing Error Interrupt Enable bit" "Disabled,Enabled"
|
|
rbitfld.byte 0x0 3. " TDRE ,Transmission Data Register Empty (Sticky Behaviour)" "Full,Empty"
|
|
textline " "
|
|
rbitfld.byte 0x0 2. " RDRF ,Reception Data Register Full (Sticky Behaviour)" "Empty,Full"
|
|
rbitfld.byte 0x0 1. " RBI ,Reception Bus Idle (Sticky Behaviour)" "Reception,No reception"
|
|
bitfld.byte 0x0 0. " AICD ,RAuto Interrupt Clear Disable" "No,Yes"
|
|
if (((d.b(ad:0xb0728000))&0xC0)==0xC0&&((d.b(ad:0xb0728000+0x01))&0x02)==0x02)
|
|
group.byte 0x13++0x0
|
|
line.byte 0x0 "USART0_EIER,Extended Interrupt Enable Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " TXFIE_set/clr ,Transmission FIFO Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 6. 0x2 6. 0x4 6. " RXFIE_set/clr ,Reception FIFO Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " BUSERRIE_set/clr ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " LBSOIE_set/clr ,BLast Bit Shifted Out Interrupt Enable bit" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x13++0x0
|
|
line.byte 0x0 "USART0_EIER,Extended Interrupt Enable Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " TXFIE_set/clr ,Transmission FIFO Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 6. 0x2 6. 0x4 6. " RXFIE_set/clr ,Reception FIFO Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " LBSOIE_set/clr ,BLast Bit Shifted Out Interrupt Enable bit" "Disabled,Enabled"
|
|
endif
|
|
wgroup.byte 0x16++0x0
|
|
line.byte 0x0 "USART0_ESICR,Extended Serial Interrupt Clear Register"
|
|
bitfld.byte 0x0 3. " TDREC ,Transmission Data Register Empty Flag (USARTn_ESIR:TDRE) Clear" "No effect,Clear"
|
|
bitfld.byte 0x0 2. " RDRFC ,Reception Data Register Full Flag (USARTn_ESIR:RDRF) Clear" "No effect,Clear"
|
|
bitfld.byte 0x0 1. " RBIC ,Reception Bus Idle Flag (USARTn_ESIR:RBI) Clear" "No effect,Clear"
|
|
if (((d.b(ad:0xb0728000))&0xC0)==0x80)
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "USART0_EFERL,Extended Feature Enable Register - L"
|
|
bitfld.byte 0x0 6. " OSDE ,Oversampling Disable" "No,Yes"
|
|
bitfld.byte 0x0 5. " DTSTART ,Detect Start bit" "Low level,"
|
|
bitfld.byte 0x0 4. " RSTRFM ,Reset Reception State Machine (when USART0_SCR:CRE is set Resetting is)" "Enabled,Disabled"
|
|
bitfld.byte 0x0 3. " LBEDGE ,LIN Break Edge Sensitive" "Level,Edge"
|
|
else
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "USART0_EFERL,Extended Feature Enable Register - L"
|
|
bitfld.byte 0x0 6. " OSDE ,Oversampling Disable" "No,Yes"
|
|
bitfld.byte 0x0 5. " DTSTART ,Detect Start bit" "Low level,Falling edge"
|
|
bitfld.byte 0x0 4. " RSTRFM ,Reset Reception State Machine (when USART0_SCR:CRE is set Resetting is)" "Enabled,Disabled"
|
|
bitfld.byte 0x0 3. " LBEDGE ,LIN Break Edge Sensitive" "Level,Edge"
|
|
endif
|
|
if (((d.b(ad:0xb0728000))&0xC0)==0xC0)
|
|
group.byte 0x19++0x0
|
|
line.byte 0x0 "USART0_EFERH,Extended Feature Enable Register - H"
|
|
bitfld.byte 0x0 5. " INTLBEN ,Internal Loop Back Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4. " BRGR ,Baud Rate Regiter Read" "Reload Counter Value,Reload Value of CPU/ABR"
|
|
bitfld.byte 0x0 2. " DBE ,Detection of Bus Error Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " LBL2 ,MSB of LIN Break Length" "13-16,17-20"
|
|
else
|
|
group.byte 0x19++0x0
|
|
line.byte 0x0 "USART0_EFERH,Extended Feature Enable Register - H"
|
|
bitfld.byte 0x0 5. " INTLBEN ,Internal Loop Back Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4. " BRGR ,Baud Rate Regiter Read" "Reload Counter Value,Reload Value of CPU/ABR"
|
|
bitfld.byte 0x0 0. " LBL2 ,MSB of LIN Break Length" "13-16,17-20"
|
|
endif
|
|
group.byte 0x1A++0x0
|
|
line.byte 0x0 "USART0_RFCR,Reception FIFO Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " RXFE_set/clr ,Reception FIFO Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " RXFCL ,Reception FIFO Clear" "Not reset,Reset"
|
|
bitfld.byte 0x0 0.--4. " RXFLC[4:0] ,Reception FIFO Level Configuration (in data bytes)" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "USART0_TFCR,Transmission FIFO Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " TXFE_set/clr ,Transmission FIFO Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " TXFCL ,Transmission FIFO Clear" "Not reset,Reset"
|
|
bitfld.byte 0x0 0.--4. " TXFLC[4:0] ,Transmission FIFO Level Configuration (in data bytes)" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
wgroup.byte 0x1E++0x1
|
|
line.byte 0x0 "USART0_RFCCR,Reception FIFO Control Clear Register"
|
|
bitfld.byte 0x0 6. " RXFCLC ,USART0_RFCR:RXFCL Clear" "No effect,Clear"
|
|
line.byte 0x1 "USART0_TFCCR,Transmission FIFO Control Clear Register"
|
|
bitfld.byte 0x1 6. " TXFCLC ,USART0_TFCR:TXFCL Clear" "No effect,Clear"
|
|
group.byte 0x20++0x1
|
|
line.byte 0x0 "USART0_RFSR,Reception FIFO Status Register"
|
|
bitfld.byte 0x0 0.--4. " RXFVD[4:0] ,Reception FIFO Valid Data (in data bytes)" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
line.byte 0x1 "USART0_TFSR,Transmission FIFO Status Register"
|
|
bitfld.byte 0x1 0.--4. " TXFVD[4:0] ,Transmission FIFO Valid Data (in data bytes)" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
group.byte 0x22++0x0 "Checksum Register"
|
|
line.byte 0x0 "USART0_CSCR,Checksum Status and Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " CRCERRIE_set/clr ,Checksum Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " CCRCERR ,CRC Error Flag" "No error,Error"
|
|
bitfld.byte 0x0 5. " CRCTYPE ,Checksum Type" "Classic,Enhanced"
|
|
bitfld.byte 0x0 4. " CRCCHECK ,Checksum Verification Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 3. " CRCGEN ,Checksum Generation Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0.--2. " DL[2:0] ,Data Length in LIN Frame (in bytes)" "1,2,3,4,5,6,7,8"
|
|
wgroup.byte 0x26++0x0
|
|
line.byte 0x0 "USART0_CSCCR,Checksum Status and Control Clear Register"
|
|
bitfld.byte 0x0 6. " CRCERRC ,USART0_CSCR:CRCERR Clear" "No effect,Clear"
|
|
width 14.
|
|
group.byte 0x23++0x0 "Status Register"
|
|
line.byte 0x0 "USART0_ESR,Extended Status Register"
|
|
bitfld.byte 0x0 6. " AD ,AD Status of Received Frame" "Usual data,Address"
|
|
bitfld.byte 0x0 3. " LBSOF ,Last Bit Shift Out Flag" "Not shifted out,Shifted out"
|
|
bitfld.byte 0x0 2. " BUSERR ,Bus Error Flag" "No error,Error"
|
|
wgroup.byte 0x27++0x0
|
|
line.byte 0x0 "USART0_ESCLR,Extended Status Clear Register"
|
|
bitfld.byte 0x00 3. " LBSOFC ,USART0_ESR:LBSOF Clear" "No effect,Clear"
|
|
bitfld.byte 0x00 2. " BUSERRC ,USART0_ESR:BUSERR Clear" "No effect,Clear"
|
|
wgroup.byte 0x28++0x2 "Baud Rate Registers"
|
|
line.byte 0x0 "USART0_BGRLL,Baud Rate Generation Reload Register - L (bits[7:0])"
|
|
line.byte 0x1 "USART0_BGRLM,Baud Rate Generation Reload Register - M (bits[15:8])"
|
|
line.byte 0x2 "USART0_BGRLH,Baud Rate Generation Reload Register - H (bits[18:16])"
|
|
bitfld.byte 0x2 0.--2. " Value[18:16] ,Baud Rate Generation Reload Register - H bits 16..18" "b'000,b'001,b'010,b'011,b'100,b'101,b'110,b'111"
|
|
rgroup.byte 0x2C++0x2
|
|
line.byte 0x0 "USART0_BGRL,Baud Rate Generation Register - L (bits[0:7])"
|
|
line.byte 0x1 "USART0_BGRM,Baud Rate Generation Register - M (bits[8:15])"
|
|
line.byte 0x2 "USART0_BGRH,Baud Rate Generation Register - H (bits[16:18])"
|
|
bitfld.byte 0x2 0.--2. " Value[18:16] ,Baud Rate Generation Register - H bits 16..18" "b'000,b'001,b'010,b'011,b'100,b'101,b'110,b'111"
|
|
group.byte 0x30++0x0 "DMA Configuration Registers"
|
|
line.byte 0x0 "USART0_STXDR,Serial Transmit DMA Configuration Register"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " TXDISDOERR_set/clr ,TX-DMA Request Mask/Disable" "No,Yes"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " TXDRQEN_set/clr ,TX-DMA Request Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TXDDEN_set/clr ,TX-DMA Demand Transfer Enable" "Disabled,Enabled"
|
|
group.byte 0x31++0x0
|
|
line.byte 0x0 "USART0_SRXDR,Serial Receive DMA Configuration Register"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " RXDISDOERR_set/clr ,RX-DMA Request Mask/Disable" "No,Yes"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RXDRQEN_set/clr ,RX-DMA Request Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " RXDDEN_set/clr ,RX-DMA Demand Transfer Enable" "Disabled,Enabled"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9DF125")
|
|
group.byte 0x36++0x2 "Sync Field Timeout Registers"
|
|
line.byte 0x0 "USART0_SFTRL,Sync Field Timeout Register - L (bits[7:0])"
|
|
line.byte 0x1 "USART0_SFTRM,Sync Field Timeout Register - M (bits[15:8])"
|
|
line.byte 0x2 "USART0_SFTRH,Sync Field Timeout Register - H (bits[18:16])"
|
|
bitfld.byte 0x2 0.--2. " Value[18:16] ,Sync Field Timeout Register - H bits 16..18" "b'000,b'001,b'010,b'011,b'100,b'101,b'110,b'111"
|
|
endif
|
|
group.byte 0x3A++0x0 " Frame-ID and Debug Register"
|
|
line.byte 0x0 "USART0_FIDR,Frame-ID Register"
|
|
group.byte 0x3C++0x0
|
|
line.byte 0x0 "USART0_DEBUG,Debug Register"
|
|
bitfld.byte 0x0 0. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "USART 6"
|
|
base ad:0xb0838000
|
|
width 14.
|
|
if (((d.b(ad:0xb0838000))&0xC0)==0x80)
|
|
group.byte 0x0++0x0 "Mode and Control Registers"
|
|
line.byte 0x0 "USART6_SMR,Serial Mode Register"
|
|
bitfld.byte 0x0 6.--7. " MD[1:0] ,Operation Mode Select" "Asynch normal,Asynch multiprocessor,Synch,Asynchronous LIN"
|
|
bitfld.byte 0x0 5. " OTO ,One-to-One External Clock Selection" "Reload counter,External clock"
|
|
bitfld.byte 0x0 4. " EXT ,External Clock Selection" "Reload counter,External clock"
|
|
bitfld.byte 0x0 3. " REST ,Restart of Transmission Reload Counter" "No effect,Restart"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " UPCL ,LIN-USART Programmable Clear" "No effect,Reset"
|
|
bitfld.byte 0x0 0. " NFEN ,Noise Filter Enable for SIN pin" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0++0x0 "Mode and Control Registers"
|
|
line.byte 0x0 "USART6_SMR,Serial Mode Register"
|
|
bitfld.byte 0x0 6.--7. " MD[1:0] ,Operation Mode Select" "Asynch normal,Asynch multiprocessor,Synch,Asynchronous LIN"
|
|
bitfld.byte 0x0 4. " EXT ,External Clock Selection" "Reload counter,External clock"
|
|
bitfld.byte 0x0 3. " REST ,Restart of Transmission Reload Counter" "No effect,Restart"
|
|
bitfld.byte 0x0 2. " UPCL ,LIN-USART Programmable Clear" "No effect,Reset"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " NFEN ,Noise Filter Enable for SIN pin" "Disabled,Enabled"
|
|
endif
|
|
if (((d.b(ad:0xb0838000))&0xC0)==0x00)
|
|
group.byte 0x1++0x0
|
|
line.byte 0x0 "USART6_SCR,Serial Control Register"
|
|
bitfld.byte 0x0 7. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " P ,Parity Selection" "Even,Odd"
|
|
bitfld.byte 0x0 5. " SBL ,Stop Bit Length Selection" "1,2"
|
|
bitfld.byte 0x0 4. " CL ,Character (Data frame) Length (in bits)" "7,8"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " CRE ,Clear Reception Error Flags" "No effect,Clear"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RXE_set/clr ,Reception Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TXE_set/clr ,Transmission Enable" "Disabled,Enabled"
|
|
elif (((d.b(ad:0xb0838000))&0xC0)==0x40)
|
|
group.byte 0x1++0x0
|
|
line.byte 0x0 "USART6_SCR,Serial Control Register"
|
|
bitfld.byte 0x0 5. " SBL ,Stop Bit Length Selection" "1,2"
|
|
bitfld.byte 0x0 4. " CL ,Character (Data frame) Length (in bits)" "7,8"
|
|
setclrfld.byte 0x0 3. 0x2 3. 0x4 3. " AD_set/clr ,Address or Data Selection" "Data,Address"
|
|
bitfld.byte 0x0 2. " CRE ,Clear Reception Error Flags" "No effect,Clear"
|
|
textline " "
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RXE_set/clr ,Reception Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TXE_set/clr ,Transmission Enable" "Disabled,Enabled"
|
|
elif (((d.b(ad:0xb0838000))&0xC0)==0x80&&((d.b(ad:0xb0838000+0x0c))&0x8)==0x8)
|
|
group.byte 0x1++0x0
|
|
line.byte 0x0 "USART6_SCR,Serial Control Register"
|
|
bitfld.byte 0x0 7. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " P ,Parity Selection" "Even,Odd"
|
|
bitfld.byte 0x0 5. " SBL ,Stop Bit Length Selection" "1,2"
|
|
bitfld.byte 0x0 4. " CL ,Character (Data frame) Length (in bits)" ",8"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " CRE ,Clear Reception Error Flags" "No effect,Clear"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RXE_set/clr ,Reception Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TXE_set/clr ,Transmission Enable" "Disabled,Enabled"
|
|
elif (((d.b(ad:0xb0838000))&0xC0)==0x80&&((d.b(ad:0xb0838000+0x0c))&0x8)==0x0)
|
|
group.byte 0x1++0x0
|
|
line.byte 0x0 "USART6_SCR,Serial Control Register"
|
|
bitfld.byte 0x0 5. " SBL ,Stop Bit Length Selection" "1,"
|
|
bitfld.byte 0x0 4. " CL ,Character (Data frame) Length (in bits)" ",8"
|
|
bitfld.byte 0x0 2. " CRE ,Clear Reception Error Flags" "No effect,Clear"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RXE_set/clr ,Reception Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TXE_set/clr ,Transmission Enable" "Disabled,Enabled"
|
|
elif (((d.b(ad:0xb0838000))&0xC0)==0xC0)
|
|
group.byte 0x1++0x0
|
|
line.byte 0x0 "USART6_SCR,Serial Control Register"
|
|
bitfld.byte 0x0 5. " SBL ,Stop Bit Length Selection" "1,"
|
|
bitfld.byte 0x0 4. " CL ,Character (Data frame) Length (in bits)" ",8"
|
|
bitfld.byte 0x0 2. " CRE ,Clear Reception Error Flags" "No effect,Clear"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RXE_set/clr ,Reception Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TXE_set/clr ,Transmission Enable" "Disabled,Enabled"
|
|
endif
|
|
wgroup.byte 0x2++0x1
|
|
line.byte 0x0 "USART6_SMSR,Serial Mode Set Register"
|
|
bitfld.byte 0x0 3. " RESTS ,USART6_SMR:REST Set" "No effect,Set"
|
|
bitfld.byte 0x0 2. " UPCLS ,USART6_SMR:UPCL Set" "No effect,Set"
|
|
line.byte 0x1 "USART6_SCSR,Serial Control Set Register"
|
|
bitfld.byte 0x1 2. " CRES ,USART6_SCR::CRE Set" "No effect,Set"
|
|
wgroup.byte 0x6++0x0 "Transmission Data Register"
|
|
line.byte 0x0 "USART6_TDR,Transmission Data Register"
|
|
if (((d.b(ad:0xb0838000))&0xC0)==0xC0)
|
|
group.byte 0x7++0x0 "Status Register"
|
|
line.byte 0x0 "USART6_SSR,Serial Status Register"
|
|
rbitfld.byte 0x0 7. " PE ,Parity Error Flag" "No error,Error"
|
|
rbitfld.byte 0x0 6. " ORE ,Overrun Error Flag" "No error,Error"
|
|
rbitfld.byte 0x0 5. " FRE ,Framing Error Flag" "No error,Error"
|
|
rbitfld.byte 0x0 4. " RDRF ,Receive Data Register Full Flag" "Empty,Full"
|
|
textline " "
|
|
rbitfld.byte 0x0 3. " TDRE ,Transmission Data Register Empty" "Full,Empty"
|
|
bitfld.byte 0x0 2. " BDS ,Transfer Direction Selection" "LSB,"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RIE_set/clr ,Receive Interrupt Request Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TIE_set/clr ,Transmission Interrupt Request Enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x7++0x0 "Status Register"
|
|
line.byte 0x0 "USART6_SSR,Serial Status Register"
|
|
rbitfld.byte 0x0 7. " PE ,Parity Error Flag" "No error,Error"
|
|
rbitfld.byte 0x0 6. " ORE ,Overrun Error Flag" "No error,Error"
|
|
rbitfld.byte 0x0 5. " FRE ,Framing Error Flag" "No error,Error"
|
|
rbitfld.byte 0x0 4. " RDRF ,Receive Data Register Full Flag" "Empty,Full"
|
|
textline " "
|
|
rbitfld.byte 0x0 3. " TDRE ,Transmission Data Register Empty" "Full,Empty"
|
|
bitfld.byte 0x0 2. " BDS ,Transfer Direction Selection" "LSB,MSB"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RIE_set/clr ,Receive Interrupt Request Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TIE_set/clr ,Transmission Interrupt Request Enable" "Disabled,Enabled"
|
|
endif
|
|
hgroup.byte 0x8++0x0 "Reception Data Register"
|
|
hide.byte 0x0 "USART6_RDR,Reception Data Register"
|
|
in
|
|
if (((d.b(ad:0xb0838000))&0xC0)==0xC0)
|
|
group.byte 0xC++0x0 "Extended Registers"
|
|
line.byte 0x0 "USART6_ECCR,Extended Communication Control Register"
|
|
bitfld.byte 0x0 7. " INV ,Invert Serial Data" "Not inverted,Inverted"
|
|
bitfld.byte 0x0 6. " LBR ,Generate LIN Sync Break" "No effect,Generated"
|
|
bitfld.byte 0x0 5. " MS ,Master Slave Mode select" "Master,"
|
|
bitfld.byte 0x0 4. " SCDE ,Serial Clock Delay Enable" "Disabled,"
|
|
textline " "
|
|
bitfld.byte 0x0 3. " SSM ,Start_Stop Bit Mode Enable" "Disabled,"
|
|
bitfld.byte 0x0 2. " BIE ,Bus Idle Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " TBI ,Transmission Bus Idle Flag" "Transmission,No transmission"
|
|
elif (((d.b(ad:0xb0838000))&0xC0)==0x00)
|
|
group.byte 0xC++0x0 "Extended Registers"
|
|
line.byte 0x0 "USART6_ECCR,Extended Communication Control Register"
|
|
bitfld.byte 0x0 7. " INV ,Invert Serial Data" "Not inverted,Inverted"
|
|
bitfld.byte 0x0 6. " LBR ,Generate LIN Sync Break" "No effect,Generated"
|
|
bitfld.byte 0x0 5. " MS ,Master Slave Mode select" "Master,"
|
|
bitfld.byte 0x0 4. " SCDE ,Serial Clock Delay Enable" "Disabled,"
|
|
textline " "
|
|
bitfld.byte 0x0 3. " SSM ,Start_Stop Bit Mode Enable" "Disabled,"
|
|
bitfld.byte 0x0 2. " BIE ,Bus Idle Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " RBI ,Reception Bus Idle Flag" "Reception,No reception"
|
|
bitfld.byte 0x0 0. " TBI ,Transmission Bus Idle Flag" "Transmission,No transmission"
|
|
elif (((d.b(ad:0xb0838000))&0xC0)==0x80&&((d.b(ad:0xb0838000+0x0c))&0x8)==0x8)
|
|
group.byte 0xC++0x0 "Extended Registers"
|
|
line.byte 0x0 "USART6_ECCR,Extended Communication Control Register"
|
|
bitfld.byte 0x0 7. " INV ,Invert Serial Data" "Not inverted,Inverted"
|
|
bitfld.byte 0x0 5. " MS ,Master Slave Mode select" "Master,Slave"
|
|
bitfld.byte 0x0 4. " SCDE ,Serial Clock Delay Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 3. " SSM ,Start_Stop Bit Mode Enable" "Disabled,Enabled"
|
|
elif (((d.b(ad:0xb0838000))&0xC0)==0x80&&((d.b(ad:0xb0838000+0x0c))&0x8)==0x0&&((d.b(ad:0xb0838000+0x0d))&0x2)==0x2)
|
|
group.byte 0xC++0x0 "Extended Registers"
|
|
line.byte 0x0 "USART6_ECCR,Extended Communication Control Register"
|
|
bitfld.byte 0x0 7. " INV ,Invert Serial Data" "Not inverted,Inverted"
|
|
bitfld.byte 0x0 5. " MS ,Master Slave Mode select" "Master,Slave"
|
|
bitfld.byte 0x0 4. " SCDE ,Serial Clock Delay Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 3. " SSM ,Start_Stop Bit Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " BIE ,Bus Idle Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " RBI ,Reception Bus Idle Flag" "Reception,No reception"
|
|
bitfld.byte 0x0 0. " TBI ,Transmission Bus Idle Flag" "Transmission,No transmission"
|
|
elif (((d.b(ad:0xb0838000))&0xC0)==0x80&&((d.b(ad:0xb0838000+0x0c))&0x8)==0x0&&((d.b(ad:0xb0838000+0x0d))&0x2)==0x0)
|
|
group.byte 0xC++0x0 "Extended Registers"
|
|
line.byte 0x0 "USART6_ECCR,Extended Communication Control Register"
|
|
bitfld.byte 0x0 7. " INV ,Invert Serial Data" "Not inverted,Inverted"
|
|
bitfld.byte 0x0 5. " MS ,Master Slave Mode select" "Master,Slave"
|
|
bitfld.byte 0x0 4. " SCDE ,Serial Clock Delay Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 3. " SSM ,Start_Stop Bit Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " BIE ,Bus Idle Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " TBI ,Transmission Bus Idle Flag" "Transmission,No transmission"
|
|
else
|
|
group.byte 0xC++0x0 "Extended Registers"
|
|
line.byte 0x0 "USART6_ECCR,Extended Communication Control Register"
|
|
bitfld.byte 0x0 7. " INV ,Invert Serial Data" "Not inverted,Inverted"
|
|
bitfld.byte 0x0 5. " MS ,Master Slave Mode select" "Master,"
|
|
bitfld.byte 0x0 4. " SCDE ,Serial Clock Delay Enable" "Disabled,"
|
|
bitfld.byte 0x0 3. " SSM ,Start_Stop Bit Mode Enable" "Disabled,"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " BIE ,Bus Idle Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " RBI ,Reception Bus Idle Flag" "Reception,No reception"
|
|
bitfld.byte 0x0 0. " TBI ,Transmission Bus Idle Flag" "Transmission,No transmission"
|
|
endif
|
|
if (((d.b(ad:0xb0838000+0x19))&0x1)==0x0&&((d.b(ad:0xb0838000))&0xC0)==0x40)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART6_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "13,14,15,16"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,"
|
|
elif (((d.b(ad:0xb0838000+0x19))&0x1)==0x0&&((d.b(ad:0xb0838000))&0xC0)==0x80)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART6_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "13,14,15,16"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,Falling edge"
|
|
elif (((d.b(ad:0xb0838000+0x19))&0x1)==0x0&&((d.b(ad:0xb0838000))&0xC0)==0xC0)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART6_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " LBD ,Sync Break Detected Flag" "Not detected,Detected"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "13,14,15,16"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,"
|
|
elif (((d.b(ad:0xb0838000+0x19))&0x1)==0x1&&((d.b(ad:0xb0838000))&0xC0)==0x40)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART6_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "17,18,19,20"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,"
|
|
elif (((d.b(ad:0xb0838000+0x19))&0x1)==0x1&&((d.b(ad:0xb0838000))&0xC0)==0x80)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART6_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "17,18,19,20"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,Falling edge"
|
|
elif (((d.b(ad:0xb0838000+0x19))&0x1)==0x1&&((d.b(ad:0xb0838000))&0xC0)==0xC0)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART6_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " LBD ,Sync Break Detected Flag" "Not detected,Detected"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "17,18,19,20"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,"
|
|
elif (((d.b(ad:0xb0838000+0x19))&0x1)==0x0&&((d.b(ad:0xb0838000))&0xC0)==0x00)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART6_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "13,14,15,16"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,"
|
|
elif (((d.b(ad:0xb0838000+0x19))&0x1)==0x1&&((d.b(ad:0xb0838000))&0xC0)==0x00)
|
|
group.byte 0xD++0x0
|
|
line.byte 0x0 "USART6_ESCR,Extended Status/Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " LBIE_set/clr ,LIN Sync Break Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4.--5. " LBL[1:0] ,LIN Sync Break Length Selection (in bit times)" "17,18,19,20"
|
|
bitfld.byte 0x0 3. " SOPE ,Serial Output Pin Direct Access Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " SIOP_set/clr ,Serial Input Output Pin Direct Access" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " CCO ,Continuous Clock Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SCES ,Serial Clock Edge Select" "Rising edge,"
|
|
endif
|
|
wgroup.byte 0xE++0x0
|
|
line.byte 0x0 "USART6_ECCSR,Extended Communication Control Set Register"
|
|
bitfld.byte 0x0 6. " LBRS ,USART6_ECCR:LBR Set" "No effect,Set"
|
|
bitfld.byte 0x0 2. " BIES ,USART6_ECCR:BIE Set" "No effect,Set"
|
|
wgroup.byte 0x10++0x01
|
|
line.byte 0x0 "USART6_ECCCR,Extended Communication Control Clear Register"
|
|
bitfld.byte 0x0 2. " BIEC ,USARTn_ECCR:BIE Clear" "No effect,Clear"
|
|
line.byte 0x1 "USART6_ESCCR,Extended Status/Control Clear Register"
|
|
bitfld.byte 0x1 6. " LBDC ,USART6_ESCR:LBD Clear" "No effect,Clear"
|
|
group.byte 0x12++0x0
|
|
line.byte 0x0 "USART6_ESIR,Extended Serial Interrupt Register"
|
|
setclrfld.byte 0x0 6. 0x2 6. 0x4 6. " PEIE_set/clr ,Parity Error (in data received) Interrupt Enable bit" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 5. 0x2 5. 0x4 5. " OREIE_set/clr ,Overrun Error Interrupt Enable bit" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 4. 0x2 4. 0x4 4. " FREIE_set/clr ,Framing Error Interrupt Enable bit" "Disabled,Enabled"
|
|
rbitfld.byte 0x0 3. " TDRE ,Transmission Data Register Empty (Sticky Behaviour)" "Full,Empty"
|
|
textline " "
|
|
rbitfld.byte 0x0 2. " RDRF ,Reception Data Register Full (Sticky Behaviour)" "Empty,Full"
|
|
rbitfld.byte 0x0 1. " RBI ,Reception Bus Idle (Sticky Behaviour)" "Reception,No reception"
|
|
bitfld.byte 0x0 0. " AICD ,RAuto Interrupt Clear Disable" "No,Yes"
|
|
if (((d.b(ad:0xb0838000))&0xC0)==0xC0&&((d.b(ad:0xb0838000+0x01))&0x02)==0x02)
|
|
group.byte 0x13++0x0
|
|
line.byte 0x0 "USART6_EIER,Extended Interrupt Enable Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " TXFIE_set/clr ,Transmission FIFO Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 6. 0x2 6. 0x4 6. " RXFIE_set/clr ,Reception FIFO Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " BUSERRIE_set/clr ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " LBSOIE_set/clr ,BLast Bit Shifted Out Interrupt Enable bit" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x13++0x0
|
|
line.byte 0x0 "USART6_EIER,Extended Interrupt Enable Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " TXFIE_set/clr ,Transmission FIFO Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 6. 0x2 6. 0x4 6. " RXFIE_set/clr ,Reception FIFO Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " LBSOIE_set/clr ,BLast Bit Shifted Out Interrupt Enable bit" "Disabled,Enabled"
|
|
endif
|
|
wgroup.byte 0x16++0x0
|
|
line.byte 0x0 "USART6_ESICR,Extended Serial Interrupt Clear Register"
|
|
bitfld.byte 0x0 3. " TDREC ,Transmission Data Register Empty Flag (USARTn_ESIR:TDRE) Clear" "No effect,Clear"
|
|
bitfld.byte 0x0 2. " RDRFC ,Reception Data Register Full Flag (USARTn_ESIR:RDRF) Clear" "No effect,Clear"
|
|
bitfld.byte 0x0 1. " RBIC ,Reception Bus Idle Flag (USARTn_ESIR:RBI) Clear" "No effect,Clear"
|
|
if (((d.b(ad:0xb0838000))&0xC0)==0x80)
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "USART6_EFERL,Extended Feature Enable Register - L"
|
|
bitfld.byte 0x0 6. " OSDE ,Oversampling Disable" "No,Yes"
|
|
bitfld.byte 0x0 5. " DTSTART ,Detect Start bit" "Low level,"
|
|
bitfld.byte 0x0 4. " RSTRFM ,Reset Reception State Machine (when USART6_SCR:CRE is set Resetting is)" "Enabled,Disabled"
|
|
bitfld.byte 0x0 3. " LBEDGE ,LIN Break Edge Sensitive" "Level,Edge"
|
|
else
|
|
group.byte 0x18++0x0
|
|
line.byte 0x0 "USART6_EFERL,Extended Feature Enable Register - L"
|
|
bitfld.byte 0x0 6. " OSDE ,Oversampling Disable" "No,Yes"
|
|
bitfld.byte 0x0 5. " DTSTART ,Detect Start bit" "Low level,Falling edge"
|
|
bitfld.byte 0x0 4. " RSTRFM ,Reset Reception State Machine (when USART6_SCR:CRE is set Resetting is)" "Enabled,Disabled"
|
|
bitfld.byte 0x0 3. " LBEDGE ,LIN Break Edge Sensitive" "Level,Edge"
|
|
endif
|
|
if (((d.b(ad:0xb0838000))&0xC0)==0xC0)
|
|
group.byte 0x19++0x0
|
|
line.byte 0x0 "USART6_EFERH,Extended Feature Enable Register - H"
|
|
bitfld.byte 0x0 5. " INTLBEN ,Internal Loop Back Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4. " BRGR ,Baud Rate Regiter Read" "Reload Counter Value,Reload Value of CPU/ABR"
|
|
bitfld.byte 0x0 2. " DBE ,Detection of Bus Error Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " LBL2 ,MSB of LIN Break Length" "13-16,17-20"
|
|
else
|
|
group.byte 0x19++0x0
|
|
line.byte 0x0 "USART6_EFERH,Extended Feature Enable Register - H"
|
|
bitfld.byte 0x0 5. " INTLBEN ,Internal Loop Back Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4. " BRGR ,Baud Rate Regiter Read" "Reload Counter Value,Reload Value of CPU/ABR"
|
|
bitfld.byte 0x0 0. " LBL2 ,MSB of LIN Break Length" "13-16,17-20"
|
|
endif
|
|
group.byte 0x1A++0x0
|
|
line.byte 0x0 "USART6_RFCR,Reception FIFO Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " RXFE_set/clr ,Reception FIFO Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " RXFCL ,Reception FIFO Clear" "Not reset,Reset"
|
|
bitfld.byte 0x0 0.--4. " RXFLC[4:0] ,Reception FIFO Level Configuration (in data bytes)" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
group.byte 0x1B++0x0
|
|
line.byte 0x0 "USART6_TFCR,Transmission FIFO Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " TXFE_set/clr ,Transmission FIFO Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " TXFCL ,Transmission FIFO Clear" "Not reset,Reset"
|
|
bitfld.byte 0x0 0.--4. " TXFLC[4:0] ,Transmission FIFO Level Configuration (in data bytes)" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
wgroup.byte 0x1E++0x1
|
|
line.byte 0x0 "USART6_RFCCR,Reception FIFO Control Clear Register"
|
|
bitfld.byte 0x0 6. " RXFCLC ,USART6_RFCR:RXFCL Clear" "No effect,Clear"
|
|
line.byte 0x1 "USART6_TFCCR,Transmission FIFO Control Clear Register"
|
|
bitfld.byte 0x1 6. " TXFCLC ,USART6_TFCR:TXFCL Clear" "No effect,Clear"
|
|
group.byte 0x20++0x1
|
|
line.byte 0x0 "USART6_RFSR,Reception FIFO Status Register"
|
|
bitfld.byte 0x0 0.--4. " RXFVD[4:0] ,Reception FIFO Valid Data (in data bytes)" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
line.byte 0x1 "USART6_TFSR,Transmission FIFO Status Register"
|
|
bitfld.byte 0x1 0.--4. " TXFVD[4:0] ,Transmission FIFO Valid Data (in data bytes)" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
group.byte 0x22++0x0 "Checksum Register"
|
|
line.byte 0x0 "USART6_CSCR,Checksum Status and Control Register"
|
|
setclrfld.byte 0x0 7. 0x2 7. 0x4 7. " CRCERRIE_set/clr ,Checksum Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " CCRCERR ,CRC Error Flag" "No error,Error"
|
|
bitfld.byte 0x0 5. " CRCTYPE ,Checksum Type" "Classic,Enhanced"
|
|
bitfld.byte 0x0 4. " CRCCHECK ,Checksum Verification Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 3. " CRCGEN ,Checksum Generation Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0.--2. " DL[2:0] ,Data Length in LIN Frame (in bytes)" "1,2,3,4,5,6,7,8"
|
|
wgroup.byte 0x26++0x0
|
|
line.byte 0x0 "USART6_CSCCR,Checksum Status and Control Clear Register"
|
|
bitfld.byte 0x0 6. " CRCERRC ,USART6_CSCR:CRCERR Clear" "No effect,Clear"
|
|
width 14.
|
|
group.byte 0x23++0x0 "Status Register"
|
|
line.byte 0x0 "USART6_ESR,Extended Status Register"
|
|
bitfld.byte 0x0 6. " AD ,AD Status of Received Frame" "Usual data,Address"
|
|
bitfld.byte 0x0 3. " LBSOF ,Last Bit Shift Out Flag" "Not shifted out,Shifted out"
|
|
bitfld.byte 0x0 2. " BUSERR ,Bus Error Flag" "No error,Error"
|
|
wgroup.byte 0x27++0x0
|
|
line.byte 0x0 "USART6_ESCLR,Extended Status Clear Register"
|
|
bitfld.byte 0x00 3. " LBSOFC ,USART6_ESR:LBSOF Clear" "No effect,Clear"
|
|
bitfld.byte 0x00 2. " BUSERRC ,USART6_ESR:BUSERR Clear" "No effect,Clear"
|
|
wgroup.byte 0x28++0x2 "Baud Rate Registers"
|
|
line.byte 0x0 "USART6_BGRLL,Baud Rate Generation Reload Register - L (bits[7:0])"
|
|
line.byte 0x1 "USART6_BGRLM,Baud Rate Generation Reload Register - M (bits[15:8])"
|
|
line.byte 0x2 "USART6_BGRLH,Baud Rate Generation Reload Register - H (bits[18:16])"
|
|
bitfld.byte 0x2 0.--2. " Value[18:16] ,Baud Rate Generation Reload Register - H bits 16..18" "b'000,b'001,b'010,b'011,b'100,b'101,b'110,b'111"
|
|
rgroup.byte 0x2C++0x2
|
|
line.byte 0x0 "USART6_BGRL,Baud Rate Generation Register - L (bits[0:7])"
|
|
line.byte 0x1 "USART6_BGRM,Baud Rate Generation Register - M (bits[8:15])"
|
|
line.byte 0x2 "USART6_BGRH,Baud Rate Generation Register - H (bits[16:18])"
|
|
bitfld.byte 0x2 0.--2. " Value[18:16] ,Baud Rate Generation Register - H bits 16..18" "b'000,b'001,b'010,b'011,b'100,b'101,b'110,b'111"
|
|
group.byte 0x30++0x0 "DMA Configuration Registers"
|
|
line.byte 0x0 "USART6_STXDR,Serial Transmit DMA Configuration Register"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " TXDISDOERR_set/clr ,TX-DMA Request Mask/Disable" "No,Yes"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " TXDRQEN_set/clr ,TX-DMA Request Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " TXDDEN_set/clr ,TX-DMA Demand Transfer Enable" "Disabled,Enabled"
|
|
group.byte 0x31++0x0
|
|
line.byte 0x0 "USART6_SRXDR,Serial Receive DMA Configuration Register"
|
|
setclrfld.byte 0x0 2. 0x2 2. 0x4 2. " RXDISDOERR_set/clr ,RX-DMA Request Mask/Disable" "No,Yes"
|
|
setclrfld.byte 0x0 1. 0x2 1. 0x4 1. " RXDRQEN_set/clr ,RX-DMA Request Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x0 0. 0x2 0. 0x4 0. " RXDDEN_set/clr ,RX-DMA Demand Transfer Enable" "Disabled,Enabled"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9DF125")
|
|
group.byte 0x36++0x2 "Sync Field Timeout Registers"
|
|
line.byte 0x0 "USART6_SFTRL,Sync Field Timeout Register - L (bits[7:0])"
|
|
line.byte 0x1 "USART6_SFTRM,Sync Field Timeout Register - M (bits[15:8])"
|
|
line.byte 0x2 "USART6_SFTRH,Sync Field Timeout Register - H (bits[18:16])"
|
|
bitfld.byte 0x2 0.--2. " Value[18:16] ,Sync Field Timeout Register - H bits 16..18" "b'000,b'001,b'010,b'011,b'100,b'101,b'110,b'111"
|
|
endif
|
|
group.byte 0x3A++0x0 " Frame-ID and Debug Register"
|
|
line.byte 0x0 "USART6_FIDR,Frame-ID Register"
|
|
group.byte 0x3C++0x0
|
|
line.byte 0x0 "USART6_DEBUG,Debug Register"
|
|
bitfld.byte 0x0 0. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "I2C Interface"
|
|
base ad:0xb0720000
|
|
width 14.
|
|
textline " "
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "I2C0_IBCSR,Bus Control and Status Register"
|
|
rbitfld.word 0x0 15. " BER ,Bus Error bit" "No error,Error"
|
|
bitfld.word 0x0 14. " BEIE ,Bus Error Interrupt Enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " SCC ,Start Condition Continue bit" "No effect,Start"
|
|
bitfld.word 0x0 12. " MSS ,Master Slave Select bit" "Slave,Master"
|
|
bitfld.word 0x0 11. " ACK ,Acknowledge bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 10. " GCAA ,General Call Address Acknowledge bit" "Disabled,Enabled"
|
|
bitfld.word 0x0 9. " INTE ,Interrupt Enable bit" "Disabled,Enabled"
|
|
rbitfld.word 0x0 8. " INT ,Interrupt Flag bit" "No interrupt,Interrupt"
|
|
rbitfld.word 0x0 7. " BB ,Bus Busy bit" "Idle,Busy"
|
|
rbitfld.word 0x0 6. " RSC ,Repeated Start Condition bit" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.word 0x0 5. " AL ,Arbitration Lost bit" "Not detected,Detected"
|
|
rbitfld.word 0x0 4. " LRB ,Last Received Bit" "Acknowledged,Not acknowledged"
|
|
rbitfld.word 0x0 3. " TRX ,Transferring Data bit" "Not transmitting,Transmitting"
|
|
rbitfld.word 0x0 2. " AAS ,Addressed As Slave bit" "Not addressed,Addressed"
|
|
rbitfld.word 0x0 1. " GCA ,General Call Address bit" "Not received,Received"
|
|
textline " "
|
|
rbitfld.word 0x0 0. " ADT ,Address Data Transfer bit" "Not addressed,Addressed"
|
|
if (((d.w(ad:0xb0720000+0xE))&0x100)==0x100)
|
|
rgroup.word 0x2++0x1
|
|
line.word 0x0 "I2C0_ITBA,Ten Bit Slave Address Register"
|
|
hexmask.word 0x0 0.--9. 1. " TA[9:0] ,Ten Bit Slave Address"
|
|
else
|
|
group.word 0x2++0x1
|
|
line.word 0x0 "I2C0_ITBA,Ten Bit Slave Address Register"
|
|
hexmask.word 0x0 0.--9. 1. " TA[9:0] ,Ten Bit Slave Address"
|
|
endif
|
|
if (((d.w(ad:0xb0720000))&0x4)==0x4&&((d.w(ad:0xb0720000+0xE))&0x100)==0x0)
|
|
group.word 0x4++0x1
|
|
line.word 0x0 "I2C0_ITMK,Ten Bit Slave Address Mask Register"
|
|
bitfld.word 0x0 15. " ENTB ,Enable Ten Bit Slave Address" "Disabled,Enabled"
|
|
rbitfld.word 0x0 14. " RAL ,Received Slave Address Length bit" "7-bit,10-bit"
|
|
textline " "
|
|
bitfld.word 0x0 9. " TM[9:0] ,Mask bit 9" "0,1"
|
|
bitfld.word 0x0 8. ",Mask bit 8" "0,1"
|
|
bitfld.word 0x0 7. ",Mask bit 7" "0,1"
|
|
bitfld.word 0x0 6. ",Mask bit 6" "0,1"
|
|
bitfld.word 0x0 5. ",Mask bit 5" "0,1"
|
|
bitfld.word 0x0 4. ",Mask bit 4" "0,1"
|
|
bitfld.word 0x0 3. ",Mask bit 3" "0,1"
|
|
bitfld.word 0x0 2. ",Mask bit 2" "0,1"
|
|
bitfld.word 0x0 1. ",Mask bit 1" "0,1"
|
|
bitfld.word 0x0 0. ",Mask bit 0" "0,1"
|
|
elif (((d.w(ad:0xb0720000))&0x4)==0x4&&((d.w(ad:0xb0720000+0xE))&0x100)==0x100)
|
|
rgroup.word 0x4++0x1
|
|
line.word 0x0 "I2C0_ITMK,Ten Bit Slave Address Mask Register"
|
|
bitfld.word 0x0 15. " ENTB ,Enable Ten Bit Slave Address" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " RAL ,Received Slave Address Length bit" "7-bit,10-bit"
|
|
textline " "
|
|
bitfld.word 0x0 9. " TM[9:0] ,Mask bit 9" "0,1"
|
|
bitfld.word 0x0 8. ",Mask bit 8" "0,1"
|
|
bitfld.word 0x0 7. ",Mask bit 7" "0,1"
|
|
bitfld.word 0x0 6. ",Mask bit 6" "0,1"
|
|
bitfld.word 0x0 5. ",Mask bit 5" "0,1"
|
|
bitfld.word 0x0 4. ",Mask bit 4" "0,1"
|
|
bitfld.word 0x0 3. ",Mask bit 3" "0,1"
|
|
bitfld.word 0x0 2. ",Mask bit 2" "0,1"
|
|
bitfld.word 0x0 1. ",Mask bit 1" "0,1"
|
|
bitfld.word 0x0 0. ",Mask bit 0" "0,1"
|
|
elif (((d.w(ad:0xb0720000))&0x4)==0x0&&((d.w(ad:0xb0720000+0xE))&0x100)==0x0)
|
|
group.word 0x4++0x1
|
|
line.word 0x0 "I2C0_ITMK,Ten Bit Slave Address Mask Register"
|
|
bitfld.word 0x0 15. " ENTB ,Enable Ten Bit Slave Address" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " TM[9:0] ,Mask bit 9" "0,1"
|
|
bitfld.word 0x0 8. ",Mask bit 8" "0,1"
|
|
bitfld.word 0x0 7. ",Mask bit 7" "0,1"
|
|
bitfld.word 0x0 6. ",Mask bit 6" "0,1"
|
|
bitfld.word 0x0 5. ",Mask bit 5" "0,1"
|
|
bitfld.word 0x0 4. ",Mask bit 4" "0,1"
|
|
bitfld.word 0x0 3. ",Mask bit 3" "0,1"
|
|
bitfld.word 0x0 2. ",Mask bit 2" "0,1"
|
|
bitfld.word 0x0 1. ",Mask bit 1" "0,1"
|
|
bitfld.word 0x0 0. ",Mask bit 0" "0,1"
|
|
else
|
|
rgroup.word 0x4++0x1
|
|
line.word 0x0 "I2C0_ITMK,Ten Bit Slave Address Mask Register"
|
|
bitfld.word 0x0 15. " ENTB ,Enable Ten Bit Slave Address" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " TM[9:0] ,Mask bit 9" "0,1"
|
|
bitfld.word 0x0 8. ",Mask bit 8" "0,1"
|
|
bitfld.word 0x0 7. ",Mask bit 7" "0,1"
|
|
bitfld.word 0x0 6. ",Mask bit 6" "0,1"
|
|
bitfld.word 0x0 5. ",Mask bit 5" "0,1"
|
|
bitfld.word 0x0 4. ",Mask bit 4" "0,1"
|
|
bitfld.word 0x0 3. ",Mask bit 3" "0,1"
|
|
bitfld.word 0x0 2. ",Mask bit 2" "0,1"
|
|
bitfld.word 0x0 1. ",Mask bit 1" "0,1"
|
|
bitfld.word 0x0 0. ",Mask bit 0" "0,1"
|
|
endif
|
|
if (((d.w(ad:0xb0720000+0xE))&0x100)==0x100&&((d.w(ad:0xb0720000))&0x4)==0x4)
|
|
rgroup.word 0x6++0x1
|
|
line.word 0x0 "I2C0_ISBMA,Seven Bit Slave Mask and Address Register"
|
|
bitfld.word 0x0 15. " ENSB ,Enable Seven Bit Slave Address" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 14. " SM[6:0] ,Mask bit 6" "0,1"
|
|
bitfld.word 0x0 13. ",Mask bit 5" "0,1"
|
|
bitfld.word 0x0 12. ",Mask bit 4" "0,1"
|
|
bitfld.word 0x0 11. ",Mask bit 3" "0,1"
|
|
bitfld.word 0x0 10. ",Mask bit 2" "0,1"
|
|
bitfld.word 0x0 9. ",Mask bit 1" "0,1"
|
|
bitfld.word 0x0 8. ",Mask bit 0" "0,1"
|
|
textline " "
|
|
hexmask.word.byte 0x0 0.--6. 1. " SA[6:0] ,Seven Bit Slave Address"
|
|
elif (((d.w(ad:0xb0720000+0xE))&0x100)==0x100&&((d.w(ad:0xb0720000))&0x4)==0x0)
|
|
rgroup.word 0x6++0x1
|
|
line.word 0x0 "I2C0_ISBMA,Seven Bit Slave Mask and Address Register"
|
|
bitfld.word 0x0 15. " ENSB ,Enable Seven Bit Slave Address" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 14. " SM[6:0] ,Mask bit 6" "0,1"
|
|
bitfld.word 0x0 13. ",Mask bit 5" "0,1"
|
|
bitfld.word 0x0 12. ",Mask bit 4" "0,1"
|
|
bitfld.word 0x0 11. ",Mask bit 3" "0,1"
|
|
bitfld.word 0x0 10. ",Mask bit 2" "0,1"
|
|
bitfld.word 0x0 9. ",Mask bit 1" "0,1"
|
|
bitfld.word 0x0 8. ",Mask bit 0" "0,1"
|
|
elif (((d.w(ad:0xb0720000+0xE))&0x100)==0x0&&((d.w(ad:0xb0720000))&0x4)==0x4)
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "I2C0_ISBMA,Seven Bit Slave Mask and Address Register"
|
|
bitfld.word 0x0 15. " ENSB ,Enable Seven Bit Slave Address" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 14. " SM[6:0] ,Mask bit 6" "0,1"
|
|
bitfld.word 0x0 13. ",Mask bit 5" "0,1"
|
|
bitfld.word 0x0 12. ",Mask bit 4" "0,1"
|
|
bitfld.word 0x0 11. ",Mask bit 3" "0,1"
|
|
bitfld.word 0x0 10. ",Mask bit 2" "0,1"
|
|
bitfld.word 0x0 9. ",Mask bit 1" "0,1"
|
|
bitfld.word 0x0 8. ",Mask bit 0" "0,1"
|
|
textline " "
|
|
hexmask.word.byte 0x0 0.--6. 1. " SA[6:0] ,Seven Bit Slave Address"
|
|
else
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "I2C0_ISBMA,Seven Bit Slave Mask and Address Register"
|
|
bitfld.word 0x0 15. " ENSB ,Enable Seven Bit Slave Address" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 14. " SM[6:0] ,Mask bit 6" "0,1"
|
|
bitfld.word 0x0 13. ",Mask bit 5" "0,1"
|
|
bitfld.word 0x0 12. ",Mask bit 4" "0,1"
|
|
bitfld.word 0x0 11. ",Mask bit 3" "0,1"
|
|
bitfld.word 0x0 10. ",Mask bit 2" "0,1"
|
|
bitfld.word 0x0 9. ",Mask bit 1" "0,1"
|
|
bitfld.word 0x0 8. ",Mask bit 0" "0,1"
|
|
endif
|
|
group.byte 0x8++0x0
|
|
line.byte 0x0 "I2C0_IODAR,Output Data Register"
|
|
if (((d.w(ad:0xb0720000+0xE))&0x100)==0x100)
|
|
rgroup.byte 0xA++0x0
|
|
line.byte 0x0 "I2C0_ICCR,Clock Control Register"
|
|
bitfld.byte 0x0 0.--5. " CS[5:0] ,Clock Prescaler bits" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
else
|
|
group.byte 0xA++0x0
|
|
line.byte 0x0 "I2C0_ICCR,Clock Control Register"
|
|
bitfld.byte 0x0 0.--5. " CS[5:0] ,Clock Prescaler bits" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
endif
|
|
if (((d.w(ad:0xb0720000))&0x100)==0x100)
|
|
rgroup.word 0xC++0x1
|
|
line.word 0x0 "I2C0_ICDIDAR,CPU and DMA Input Data Register"
|
|
hexmask.word.byte 0x0 8.--15. 0x1 " ICIDAR[7:0] ,I2C CPU Input Data Register"
|
|
hexmask.word.byte 0x0 0.--7. 0x1 " IDIDAR[7:0] ,I2C DMA Input Data Register"
|
|
else
|
|
hgroup.word 0xc++0x01
|
|
hide.word 0x0 "I2C0_ICDIDAR,CPU and DMA Input Data Register"
|
|
endif
|
|
if (((d.w(ad:0xb0720000+0xE))&0x200)==0x200)
|
|
group.word 0xE++0x1
|
|
line.word 0x0 "I2C0_IEICR,Interface Enable and Interrupt Clear Register"
|
|
bitfld.word 0x0 10.--12. " NSF[2:0] ,IO Pad Noise Filter Configuration bits (max. pulse width of single spikes)" "0.5,1,1.5,2,2.5,3,3.5,4"
|
|
bitfld.word 0x0 9. " NSFEN ,IO Pad Noise Filter Enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " EN ,Interface Enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " ALCLR ,Arbitration Lost Interrupt Flag (I2C0_IBCSR:AL) Clear bit" "No effect,Clear"
|
|
bitfld.word 0x0 1. " BERCLR ,Bus Error Interrupt Flag I2C0_IBCSR:BER)Clear bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x0 0. " INTCLR ,Interrupt Request Flag (I2C0_IBCSR:INT & I2C0_IBCSR:AL)Clear bit" "No effect,Clear"
|
|
else
|
|
group.word 0xE++0x1
|
|
line.word 0x0 "I2C0_IEICR,Interface Enable and Interrupt Clear Register"
|
|
bitfld.word 0x0 9. " NSFEN ,IO Pad Noise Filter Enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " EN ,Interface Enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " ALCLR ,Arbitration Lost Interrupt Flag (I2C0_IBCSR:AL) Clear bit" "No effect,Clear"
|
|
bitfld.word 0x0 1. " BERCLR ,Bus Error Interrupt Flag I2C0_IBCSR:BER)Clear bit" "No effect,Clear"
|
|
bitfld.word 0x0 0. " INTCLR ,Interrupt Request Flag (I2C0_IBCSR:INT & I2C0_IBCSR:AL)Clear bit" "No effect,Clear"
|
|
endif
|
|
group.word 0x10++0x01
|
|
line.word 0x0 "I2C0_DDMACFG,Debug and DMA Configuration Register"
|
|
bitfld.word 0x0 8. " DBGE ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " DMAMODE ,DMA Mode for Data Registers" "Disabled,Enabled"
|
|
bitfld.word 0x0 1. " ENDMAREQTX ,DMA Enable bit for Transmission" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " ENDMAREQRX ,DMA Enable bit for Reception" "Disabled,Enabled"
|
|
sif (cpu()=="MB9EF226")
|
|
group.word 0x12++0x1
|
|
line.word 0x0 "I2C0_IEIER,Error Interrupt Enable Register"
|
|
bitfld.word 0x00 10.--12. " NSF ,Noise Filter Configuration bits" "0.5,1,1.5,2,2.5,3,3.5,4"
|
|
bitfld.word 0x00 9. " NSFEN ,Noise Filter Enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " EN ,I2C interface operation enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " ALCLR ,Arbitration Lost Interrupt Flag (I2C0_IBCSR:AL) Clear bit" "No effect,Clear"
|
|
bitfld.word 0x0 1. " BERCLR ,Bus Error Interrupt Flag I2C0_IBCSR:BER)Clear bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x0 0. " INTCLR ,Interrupt Request Flag (I2C0_IBCSR:INT & I2C0_IBCSR:AL)Clear bit" "No effect,Clear"
|
|
else
|
|
group.byte 0x12++0x0
|
|
line.byte 0x0 "I2C0_IEIER,Error Interrupt Enable Register"
|
|
bitfld.byte 0x0 1. " ALEIE ,Error Interrupt Enable bit for Arbitration Lost" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " BEREIE ,Error Interrupt Enable bit for Bus Error" "Disabled,Enabled"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
tree "SPI (Serial Peripheral Interface)"
|
|
tree "SPI0"
|
|
base ad:0xB0B38000
|
|
width 15.
|
|
textline " "
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "SPI0_MCTRL,SPI Module Control Register"
|
|
rbitfld.long 0x0 4. " MES ,Module Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " CDSS ,Clock Division Source Select" "iHCLK,iPCLK"
|
|
bitfld.long 0x0 2. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " CSEN ,Command Sequencer Enable (Direct mode/Command sequencer)" "Direct mode,"
|
|
bitfld.long 0x0 0. " MEN ,Module Enable" "Disabled,Enabled"
|
|
if (((d.l(ad:0xB0B38000+0x34))&0x1)==0x1)
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "SPI0_PCC0,SPI Peripheral Communication Configuration Register 0"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 0" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS[6:0] ,Clock Division Ratio Select of Peripheral 0"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 0" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD[1:0] ,Slave-Select to Clock Delay of Peripheral 0" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 0 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 0" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 0" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 0" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 0" "Odd,Even"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "SPI0_PCC0,SPI Peripheral Communication Configuration Register 0"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 0" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 0 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 0" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 0" "Odd,Even"
|
|
endif
|
|
if (((d.l(ad:0xB0B38000+0x34))&0x1)==0x1)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "SPI0_PCC1,SPI Peripheral Communication Configuration Register 1"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 1" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS[6:0] ,Clock Division Ratio Select of Peripheral 1"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 1" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD[1:0] ,Slave-Select to Clock Delay of Peripheral 1" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 1 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 1" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 1" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 1" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 1" "Odd,Even"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "SPI0_PCC1,SPI Peripheral Communication Configuration Register 1"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 1" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 1 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 1" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 1" "Odd,Even"
|
|
endif
|
|
if (((d.l(ad:0xB0B38000+0x34))&0x1)==0x1)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "SPI0_PCC2,SPI Peripheral Communication Configuration Register 2"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 2" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS[6:0] ,Clock Division Ratio Select of Peripheral 2"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 2" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD[1:0] ,Slave-Select to Clock Delay of Peripheral 2" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 2 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 2" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 2" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 2" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 2" "Odd,Even"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "SPI0_PCC2,SPI Peripheral Communication Configuration Register 2"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 2" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 2 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 2" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 2" "Odd,Even"
|
|
endif
|
|
if (((d.l(ad:0xB0B38000+0x34))&0x1)==0x1)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI0_PCC3,SPI Peripheral Communication Configuration Register 3"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 3" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS[6:0] ,Clock Division Ratio Select of Peripheral 3"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 3" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD[1:0] ,Slave-Select to Clock Delay of Peripheral 3" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 3 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 3" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 3" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 3" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 3" "Odd,Even"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI0_PCC3,SPI Peripheral Communication Configuration Register 3"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 3" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 3 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 3" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 3" "Odd,Even"
|
|
endif
|
|
rgroup.long 0x14++0x3 "Interrupt Registers"
|
|
line.long 0x0 "HSSPI0_TXF,HSSPI TX Interrupt Flag Register"
|
|
bitfld.long 0x0 6. " TSSRS ,Slave Select Released" "Not released,Released"
|
|
bitfld.long 0x0 5. " TFMTS ,TX-FIFO Fill Level is More Than Threshold" "No,Yes"
|
|
bitfld.long 0x0 4. " TFLETS ,TX-FIFO Fill Level is Less Than or Equal to Threshold" "No,Yes"
|
|
bitfld.long 0x0 3. " TFUS ,TX-FIFO Underrun" "No underrun,Underrun"
|
|
bitfld.long 0x0 2. " TFOS ,TX-FIFO Overrun" "No overrun,Overrun"
|
|
bitfld.long 0x0 1. " TFES ,TX-FIFO and Shift Register is Empty" "Not empty,Empty"
|
|
bitfld.long 0x0 0. " TFFS ,TX-FIFO Full" "Not full,Full"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "SPI0_TXE,SPI TX Interrupt Enable Register"
|
|
bitfld.long 0x0 6. " TSSRE ,Slave Select Released Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " TFMTE ,TX-FIFO Fill Level is More Than Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " TFLETE ,TX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " TFUE ,TX-FIFO Underrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TFOE ,TX-FIFO Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TFEE ,TX-FIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " TFFE ,TX-FIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "SPI0_TXC,SPI TX Interrupt Clear Register"
|
|
bitfld.long 0x0 6. " TSSRC ,Slave Select Released Interrupt (SPI0_TXF:TSSRS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 5. " TFMTC ,TX-FIFO Fill Level is More Than Threshold Interrupt (SPI0_TXF:TFMTS) Clear " "No effect,Clear"
|
|
bitfld.long 0x0 4. " TFLETC ,TX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt (SPI0_TXF:TFLETS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 3. " TFUC ,TX-FIFO Underrun Interrupt (SPI0_TXF:TFUS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 2. " TFOC ,TX-FIFO Overrun Interrupt (SPI0_TXF:TFOS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 1. " TFEC ,TX-FIFO Empty Interrupt (SPI0_TXF:TFES) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 0. " TFFC ,TX-FIFO Full Interrupt (SPI0_TXF:TFFS) Clear" "No effect,Clear"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "HSSPI0_RXF,HSSPI RX Interrupt Flag Register"
|
|
bitfld.long 0x0 6. " RSSRS ,Slave Select Released" "Not released,Released"
|
|
bitfld.long 0x0 5. " RFMTS ,RX-FIFO Fill Level is More Than Threshold" "No,Yes"
|
|
bitfld.long 0x0 4. " RFLETS ,RX-FIFO Fill Level is Less Than or Equal to Threshold" "No,Yes"
|
|
bitfld.long 0x0 3. " RFUS ,TX-RIFO Underrun" "No underrun,Underrun"
|
|
bitfld.long 0x0 2. " RFOS ,RX-FIFO Overrun" "No overrun,Overrun"
|
|
bitfld.long 0x0 1. " RFES ,RX-FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x0 0. " RFFS ,RX-FIFO Full" "Not full,Full"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "SPI0_RXE,SPI RX Interrupt Enable Register"
|
|
bitfld.long 0x0 6. " RSSRE ,Slave Select Released Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " RFMTE ,RX-FIFO Fill Level is More Than Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " RFLETE ,RX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " RFUE ,RX-FIFO Underrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " RFOE ,RX-FIFO Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " RFEE ,RX-FIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " RFFE ,RX-FIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "SPI0_RXC,SPI RX Interrupt Clear Register"
|
|
bitfld.long 0x0 6. " RSSRC ,Slave Select Released Interrupt (SPI0_RXF:RSSRS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 5. " RFMTC ,RX-FIFO Fill Level is More Than Threshold Interrupt (SPI0_RXF:RFMTS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 4. " RFLETC ,RX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt (SPI0_RXF:RFLETS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 3. " RFUC ,RX-FIFO Underrun Interrupt (SPI0_RXF:RFUS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 2. " RFOC ,RX-FIFO Overrun Interrupt (SPI0_RXF:RFOS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 1. " RFEC ,RX-FIFO Empty Interrupt (SPI0_RXF:RFES) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 0. " RFFC ,RX-FIFO Full Interrupt (SPI0_RXF:RFFS) Clear" "No effect,Clear"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "SPI0_FAULTF,SPI Fault Interrupt Flag Register"
|
|
bitfld.long 0x0 4. " DRCBSFS ,DMA Read Channel Block Size Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 3. " DWCBSFS ,DMA Write Channel Block Size Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " PVFS ,Protection Violation Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 1. " WAFS ,Write Access Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " UMAFS ,Unmapped Memory Access Fault" "No interrupt,Interrupt"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "SPI0_FAULTC,SPI Fault Interrupt Clear Register"
|
|
bitfld.long 0x0 4. " DRCBSFC ,DMA Read Channel Block Size Fault Interrupt (HSSPIn_FAULTF:DRCBSFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 3. " DWCBSFC ,DMA Write Channel Block Size Fault Interrupt (HSSPIn_FAULTF:DWCBSFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 2. " PVFC ,Protection Violation Fault Interrupt (HSSPIn_FAULTF:PVFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 1. " WAFC ,Write Access Fault Interrupt (HSSPIn_FAULTF:WAFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 0. " UMAFC ,Unmapped Memory Access Fault Interrupt (HSSPIn_FAULTF:UMAFS) Clear" "No effect,Clear"
|
|
if (((d.b(ad:0xB0B38000+0x34))&0x1)==0x1)
|
|
group.byte 0x34++0x0
|
|
line.byte 0x0 "SPI0_DMCFG,SPI Direct Mode Configuration Register"
|
|
bitfld.byte 0x0 2. " MSTARTEN ,iMSTART Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " SSDC ,Slave Select Deassertion Control" "Software flow control,Byte counter mode"
|
|
bitfld.byte 0x0 0. " MST ,Master Mode" "Slave,Master"
|
|
else
|
|
group.byte 0x34++0x0
|
|
line.byte 0x0 "SPI0_DMCFG,SPI Direct Mode Configuration Register"
|
|
bitfld.byte 0x0 0. " MST ,Master Mode" "Slave,Master"
|
|
endif
|
|
group.byte 0x35++0x0
|
|
line.byte 0x0 "SPI0_DMDMAEN,SPI Direct Mode DMA Enable Register"
|
|
bitfld.byte 0x0 1. " TXDMAEN ,TX DMA Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " RXDMAEN ,RX DMA Enable" "Disabled,Enabled"
|
|
if (((d.b(ad:0xB0B38000+0x34))&0x1)==0x1)
|
|
group.byte 0x38++0x0
|
|
line.byte 0x0 "SPI0_DMSTART,SPI Direct Mode Start Register"
|
|
bitfld.byte 0x0 0. " START ,Start Transfer" "No effect,Start"
|
|
else
|
|
hgroup.byte 0x38++0x0
|
|
hide.byte 0x0 "SPI0_DMSTART,SPI Direct Mode Start Register"
|
|
endif
|
|
if (((d.b(ad:0xB0B38000+0x34))&0x1)==0x1&&((d.b(ad:0xB0B38000+0x34))&0x2)==0x0)
|
|
group.byte 0x39++0x0
|
|
line.byte 0x0 "SPI0_DMSTOP,SPI Direct Mode Stop Register"
|
|
bitfld.byte 0x0 0. " STOP ,Stop bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.byte 0x39++0x0
|
|
hide.byte 0x0 "SPI0_DMSTOP,SPI Direct Mode Stop Register"
|
|
endif
|
|
group.byte 0x3A++0x1
|
|
line.byte 0x0 "SPI0_DMPSEL,SPI Direct Mode Peripheral Slave Select Register"
|
|
bitfld.byte 0x0 0.--1. " PSEL[1:0] ,Peripheral Select" "Slave 0,Slave 1,Slave 2,Slave 3"
|
|
line.byte 0x1 "SPI0_DMTRP,SPI Direct Mode Transfer Protocol Register"
|
|
bitfld.byte 0x1 0.--3. " TRP[3:0] ,Transfer Protocol" "Tx/Rx,,,,Rx,,,,Tx,,,?..."
|
|
if (((d.b(ad:0xB0B38000+0x34))&0x1)==0x1&&((d.b(ad:0xB0B38000+0x34))&0x2)==0x2)
|
|
group.word 0x3C++0x1
|
|
line.word 0x0 "SPI0_DMBCC,SPI Direct Mode Byte Count Control Register"
|
|
rgroup.word 0x3E++0x1
|
|
line.word 0x0 "SPI0_DMBCS,SPI Direct Mode Byte Count Status Register"
|
|
else
|
|
hgroup.word 0x3C++0x3
|
|
hide.word 0x0 "SPI0_DMBCC,SPI Direct Mode Byte Count Control Register"
|
|
hide.word 0x2 "SPI0_DMBCS,SPI Direct Mode Byte Count Status Register"
|
|
endif
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "SPI0_DMSTATUS,SPI Direct Mode Status Register"
|
|
bitfld.long 0x0 16.--20. " TXFLEVEL[4:0] ,Current Fill Level of TX-FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0 8.--12. " RXFLEVEL[4:0] ,Current Fill Level of RX-FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0 1. " TXACTIVE ,Transmission Active" "Not active,Active"
|
|
bitfld.long 0x0 0. " TXACTIVE ,Reception Active" "Not active,Active"
|
|
rgroup.byte 0x44++0x0 "Bit Count Registers"
|
|
line.byte 0x0 "SPI0_TXBITCNT,SPI Transmit Bit Count Register"
|
|
bitfld.byte 0x0 0.--5. " TXBITCNT[5:0] ,Number of pending transmission bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
if ((((d.b((ad:0xB0B38000+0x34))&0x1))==0x0))
|
|
rgroup.byte 0x45++0x0
|
|
line.byte 0x0 "SPI0_RXBITCNT,SPI Transmit Bit Count Register"
|
|
bitfld.byte 0x0 0.--5. " TXBITCNT[5:0] ,Number of valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
rgroup.long 0x48++0x3 "Shift Register"
|
|
line.long 0x0 "SPI0_RXSHIFT,SPI RX Shift Register"
|
|
else
|
|
hgroup.byte 0x45++0x0
|
|
hide.byte 0x0 "SPI0_RXBITCNT,SPI Transmit Bit Count Register"
|
|
hgroup.long 0x48++0x3 "Shift Register"
|
|
hide.long 0x0 "SPI0_RXSHIFT,SPI RX Shift Register"
|
|
endif
|
|
group.long 0x4C++0x3 "Configuration Register"
|
|
line.long 0x0 "SPI0_FIFOCFG,SPI FIFO Configuration Register"
|
|
bitfld.long 0x0 12. " TXFLSH ,TX-FIFO Flush" "No effect,Flush"
|
|
bitfld.long 0x0 11. " RXFLSH ,RX-FIFO Flush" "No effect,Flush"
|
|
bitfld.long 0x0 10. " TXCTRL ,TXCTRL bit to be Written to TX-FIFO" "Low,High"
|
|
bitfld.long 0x0 8.--9. " FWIDTH[1:0] ,TX/RX-FIFO Width" "8-bit,16-bit,24-bit,32-bit"
|
|
bitfld.long 0x0 4.--7. " TXFTH[3:0] ,TX-FIFO Threshold Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 0.--3. " RXFTH[3:0] ,RX-FIFO Threshold Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree "Tx-FIFO Registers"
|
|
group.long 0x50++0x3F
|
|
line.long 0x0 "SPI0_TXFIFO0,SPI TX-FIFO Register 0"
|
|
line.long 0x4 "SPI0_TXFIFO1,SPI TX-FIFO Register 1"
|
|
line.long 0x8 "SPI0_TXFIFO2,SPI TX-FIFO Register 2"
|
|
line.long 0xC "SPI0_TXFIFO3,SPI TX-FIFO Register 3"
|
|
line.long 0x10 "SPI0_TXFIFO4,SPI TX-FIFO Register 4"
|
|
line.long 0x14 "SPI0_TXFIFO5,SPI TX-FIFO Register 5"
|
|
line.long 0x18 "SPI0_TXFIFO6,SPI TX-FIFO Register 6"
|
|
line.long 0x1C "SPI0_TXFIFO7,SPI TX-FIFO Register 7"
|
|
line.long 0x20 "SPI0_TXFIFO8,SPI TX-FIFO Register 8"
|
|
line.long 0x24 "SPI0_TXFIFO9,SPI TX-FIFO Register 9"
|
|
line.long 0x28 "SPI0_TXFIFO10,SPI TX-FIFO Register 10"
|
|
line.long 0x2C "SPI0_TXFIFO11,SPI TX-FIFO Register 11"
|
|
line.long 0x30 "SPI0_TXFIFO12,SPI TX-FIFO Register 12"
|
|
line.long 0x34 "SPI0_TXFIFO13,SPI TX-FIFO Register 13"
|
|
line.long 0x38 "SPI0_TXFIFO14,SPI TX-FIFO Register 14"
|
|
line.long 0x3C "SPI0_TXFIFO15,SPI TX-FIFO Register 15"
|
|
tree.end
|
|
tree "Rx-FIFO Registers"
|
|
hgroup.long 0x90++0x3F
|
|
hide.long 0x0 "SPI0_RXFIFO0,SPI RX-FIFO Register 0"
|
|
in
|
|
hide.long 0x4 "SPI0_RXFIFO1,SPI RX-FIFO Register 1"
|
|
in
|
|
hide.long 0x8 "SPI0_RXFIFO2,SPI RX-FIFO Register 2"
|
|
in
|
|
hide.long 0xC "SPI0_RXFIFO3,SPI RX-FIFO Register 3"
|
|
in
|
|
hide.long 0x10 "SPI0_RXFIFO4,SPI RX-FIFO Register 4"
|
|
in
|
|
hide.long 0x14 "SPI0_RXFIFO5,SPI RX-FIFO Register 5"
|
|
in
|
|
hide.long 0x18 "SPI0_RXFIFO6,SPI RX-FIFO Register 6"
|
|
in
|
|
hide.long 0x1C "SPI0_RXFIFO7,SPI RX-FIFO Register 7"
|
|
in
|
|
hide.long 0x20 "SPI0_RXFIFO8,SPI RX-FIFO Register 8"
|
|
in
|
|
hide.long 0x24 "SPI0_RXFIFO9,SPI RX-FIFO Register 9"
|
|
in
|
|
hide.long 0x28 "SPI0_RXFIFO10,SPI RX-FIFO Register 10"
|
|
in
|
|
hide.long 0x2C "SPI0_RXFIFO11,SPI RX-FIFO Register 11"
|
|
in
|
|
hide.long 0x30 "SPI0_RXFIFO12,SPI RX-FIFO Register 12"
|
|
in
|
|
hide.long 0x34 "SPI0_RXFIFO13,SPI RX-FIFO Register 13"
|
|
in
|
|
hide.long 0x38 "SPI0_RXFIFO14,SPI RX-FIFO Register 14"
|
|
in
|
|
hide.long 0x3C "SPI0_RXFIFO15,SPI RX-FIFO Register 15"
|
|
in
|
|
tree.end
|
|
rgroup.long 0xFC++0x3 "Module ID Register"
|
|
line.long 0x0 "SPI0_MID,SPI Module ID Register"
|
|
width 12.
|
|
tree.end
|
|
tree "SPI1"
|
|
base ad:0xB0B38400
|
|
width 15.
|
|
textline " "
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "SPI1_MCTRL,SPI Module Control Register"
|
|
rbitfld.long 0x0 4. " MES ,Module Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " CDSS ,Clock Division Source Select" "iHCLK,iPCLK"
|
|
bitfld.long 0x0 2. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " CSEN ,Command Sequencer Enable (Direct mode/Command sequencer)" "Direct mode,"
|
|
bitfld.long 0x0 0. " MEN ,Module Enable" "Disabled,Enabled"
|
|
if (((d.l(ad:0xB0B38400+0x34))&0x1)==0x1)
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "SPI1_PCC0,SPI Peripheral Communication Configuration Register 0"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 0" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS[6:0] ,Clock Division Ratio Select of Peripheral 0"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 0" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD[1:0] ,Slave-Select to Clock Delay of Peripheral 0" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 0 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 0" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 0" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 0" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 0" "Odd,Even"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "SPI1_PCC0,SPI Peripheral Communication Configuration Register 0"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 0" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 0 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 0" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 0" "Odd,Even"
|
|
endif
|
|
if (((d.l(ad:0xB0B38400+0x34))&0x1)==0x1)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "SPI1_PCC1,SPI Peripheral Communication Configuration Register 1"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 1" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS[6:0] ,Clock Division Ratio Select of Peripheral 1"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 1" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD[1:0] ,Slave-Select to Clock Delay of Peripheral 1" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 1 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 1" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 1" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 1" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 1" "Odd,Even"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "SPI1_PCC1,SPI Peripheral Communication Configuration Register 1"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 1" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 1 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 1" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 1" "Odd,Even"
|
|
endif
|
|
if (((d.l(ad:0xB0B38400+0x34))&0x1)==0x1)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "SPI1_PCC2,SPI Peripheral Communication Configuration Register 2"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 2" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS[6:0] ,Clock Division Ratio Select of Peripheral 2"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 2" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD[1:0] ,Slave-Select to Clock Delay of Peripheral 2" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 2 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 2" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 2" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 2" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 2" "Odd,Even"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "SPI1_PCC2,SPI Peripheral Communication Configuration Register 2"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 2" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 2 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 2" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 2" "Odd,Even"
|
|
endif
|
|
if (((d.l(ad:0xB0B38400+0x34))&0x1)==0x1)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI1_PCC3,SPI Peripheral Communication Configuration Register 3"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 3" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS[6:0] ,Clock Division Ratio Select of Peripheral 3"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 3" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD[1:0] ,Slave-Select to Clock Delay of Peripheral 3" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 3 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 3" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 3" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 3" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 3" "Odd,Even"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI1_PCC3,SPI Peripheral Communication Configuration Register 3"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 3" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 3 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 3" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 3" "Odd,Even"
|
|
endif
|
|
rgroup.long 0x14++0x3 "Interrupt Registers"
|
|
line.long 0x0 "HSSPI1_TXF,HSSPI TX Interrupt Flag Register"
|
|
bitfld.long 0x0 6. " TSSRS ,Slave Select Released" "Not released,Released"
|
|
bitfld.long 0x0 5. " TFMTS ,TX-FIFO Fill Level is More Than Threshold" "No,Yes"
|
|
bitfld.long 0x0 4. " TFLETS ,TX-FIFO Fill Level is Less Than or Equal to Threshold" "No,Yes"
|
|
bitfld.long 0x0 3. " TFUS ,TX-FIFO Underrun" "No underrun,Underrun"
|
|
bitfld.long 0x0 2. " TFOS ,TX-FIFO Overrun" "No overrun,Overrun"
|
|
bitfld.long 0x0 1. " TFES ,TX-FIFO and Shift Register is Empty" "Not empty,Empty"
|
|
bitfld.long 0x0 0. " TFFS ,TX-FIFO Full" "Not full,Full"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "SPI1_TXE,SPI TX Interrupt Enable Register"
|
|
bitfld.long 0x0 6. " TSSRE ,Slave Select Released Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " TFMTE ,TX-FIFO Fill Level is More Than Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " TFLETE ,TX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " TFUE ,TX-FIFO Underrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TFOE ,TX-FIFO Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TFEE ,TX-FIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " TFFE ,TX-FIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "SPI1_TXC,SPI TX Interrupt Clear Register"
|
|
bitfld.long 0x0 6. " TSSRC ,Slave Select Released Interrupt (SPI1_TXF:TSSRS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 5. " TFMTC ,TX-FIFO Fill Level is More Than Threshold Interrupt (SPI1_TXF:TFMTS) Clear " "No effect,Clear"
|
|
bitfld.long 0x0 4. " TFLETC ,TX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt (SPI1_TXF:TFLETS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 3. " TFUC ,TX-FIFO Underrun Interrupt (SPI1_TXF:TFUS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 2. " TFOC ,TX-FIFO Overrun Interrupt (SPI1_TXF:TFOS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 1. " TFEC ,TX-FIFO Empty Interrupt (SPI1_TXF:TFES) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 0. " TFFC ,TX-FIFO Full Interrupt (SPI1_TXF:TFFS) Clear" "No effect,Clear"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "HSSPI1_RXF,HSSPI RX Interrupt Flag Register"
|
|
bitfld.long 0x0 6. " RSSRS ,Slave Select Released" "Not released,Released"
|
|
bitfld.long 0x0 5. " RFMTS ,RX-FIFO Fill Level is More Than Threshold" "No,Yes"
|
|
bitfld.long 0x0 4. " RFLETS ,RX-FIFO Fill Level is Less Than or Equal to Threshold" "No,Yes"
|
|
bitfld.long 0x0 3. " RFUS ,TX-RIFO Underrun" "No underrun,Underrun"
|
|
bitfld.long 0x0 2. " RFOS ,RX-FIFO Overrun" "No overrun,Overrun"
|
|
bitfld.long 0x0 1. " RFES ,RX-FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x0 0. " RFFS ,RX-FIFO Full" "Not full,Full"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "SPI1_RXE,SPI RX Interrupt Enable Register"
|
|
bitfld.long 0x0 6. " RSSRE ,Slave Select Released Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " RFMTE ,RX-FIFO Fill Level is More Than Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " RFLETE ,RX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " RFUE ,RX-FIFO Underrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " RFOE ,RX-FIFO Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " RFEE ,RX-FIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " RFFE ,RX-FIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "SPI1_RXC,SPI RX Interrupt Clear Register"
|
|
bitfld.long 0x0 6. " RSSRC ,Slave Select Released Interrupt (SPI1_RXF:RSSRS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 5. " RFMTC ,RX-FIFO Fill Level is More Than Threshold Interrupt (SPI1_RXF:RFMTS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 4. " RFLETC ,RX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt (SPI1_RXF:RFLETS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 3. " RFUC ,RX-FIFO Underrun Interrupt (SPI1_RXF:RFUS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 2. " RFOC ,RX-FIFO Overrun Interrupt (SPI1_RXF:RFOS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 1. " RFEC ,RX-FIFO Empty Interrupt (SPI1_RXF:RFES) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 0. " RFFC ,RX-FIFO Full Interrupt (SPI1_RXF:RFFS) Clear" "No effect,Clear"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "SPI1_FAULTF,SPI Fault Interrupt Flag Register"
|
|
bitfld.long 0x0 4. " DRCBSFS ,DMA Read Channel Block Size Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 3. " DWCBSFS ,DMA Write Channel Block Size Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " PVFS ,Protection Violation Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 1. " WAFS ,Write Access Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " UMAFS ,Unmapped Memory Access Fault" "No interrupt,Interrupt"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "SPI1_FAULTC,SPI Fault Interrupt Clear Register"
|
|
bitfld.long 0x0 4. " DRCBSFC ,DMA Read Channel Block Size Fault Interrupt (HSSPIn_FAULTF:DRCBSFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 3. " DWCBSFC ,DMA Write Channel Block Size Fault Interrupt (HSSPIn_FAULTF:DWCBSFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 2. " PVFC ,Protection Violation Fault Interrupt (HSSPIn_FAULTF:PVFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 1. " WAFC ,Write Access Fault Interrupt (HSSPIn_FAULTF:WAFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 0. " UMAFC ,Unmapped Memory Access Fault Interrupt (HSSPIn_FAULTF:UMAFS) Clear" "No effect,Clear"
|
|
if (((d.b(ad:0xB0B38400+0x34))&0x1)==0x1)
|
|
group.byte 0x34++0x0
|
|
line.byte 0x0 "SPI1_DMCFG,SPI Direct Mode Configuration Register"
|
|
bitfld.byte 0x0 2. " MSTARTEN ,iMSTART Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " SSDC ,Slave Select Deassertion Control" "Software flow control,Byte counter mode"
|
|
bitfld.byte 0x0 0. " MST ,Master Mode" "Slave,Master"
|
|
else
|
|
group.byte 0x34++0x0
|
|
line.byte 0x0 "SPI1_DMCFG,SPI Direct Mode Configuration Register"
|
|
bitfld.byte 0x0 0. " MST ,Master Mode" "Slave,Master"
|
|
endif
|
|
group.byte 0x35++0x0
|
|
line.byte 0x0 "SPI1_DMDMAEN,SPI Direct Mode DMA Enable Register"
|
|
bitfld.byte 0x0 1. " TXDMAEN ,TX DMA Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " RXDMAEN ,RX DMA Enable" "Disabled,Enabled"
|
|
if (((d.b(ad:0xB0B38400+0x34))&0x1)==0x1)
|
|
group.byte 0x38++0x0
|
|
line.byte 0x0 "SPI1_DMSTART,SPI Direct Mode Start Register"
|
|
bitfld.byte 0x0 0. " START ,Start Transfer" "No effect,Start"
|
|
else
|
|
hgroup.byte 0x38++0x0
|
|
hide.byte 0x0 "SPI1_DMSTART,SPI Direct Mode Start Register"
|
|
endif
|
|
if (((d.b(ad:0xB0B38400+0x34))&0x1)==0x1&&((d.b(ad:0xB0B38400+0x34))&0x2)==0x0)
|
|
group.byte 0x39++0x0
|
|
line.byte 0x0 "SPI1_DMSTOP,SPI Direct Mode Stop Register"
|
|
bitfld.byte 0x0 0. " STOP ,Stop bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.byte 0x39++0x0
|
|
hide.byte 0x0 "SPI1_DMSTOP,SPI Direct Mode Stop Register"
|
|
endif
|
|
group.byte 0x3A++0x1
|
|
line.byte 0x0 "SPI1_DMPSEL,SPI Direct Mode Peripheral Slave Select Register"
|
|
bitfld.byte 0x0 0.--1. " PSEL[1:0] ,Peripheral Select" "Slave 0,Slave 1,Slave 2,Slave 3"
|
|
line.byte 0x1 "SPI1_DMTRP,SPI Direct Mode Transfer Protocol Register"
|
|
bitfld.byte 0x1 0.--3. " TRP[3:0] ,Transfer Protocol" "Tx/Rx,,,,Rx,,,,Tx,,,?..."
|
|
if (((d.b(ad:0xB0B38400+0x34))&0x1)==0x1&&((d.b(ad:0xB0B38400+0x34))&0x2)==0x2)
|
|
group.word 0x3C++0x1
|
|
line.word 0x0 "SPI1_DMBCC,SPI Direct Mode Byte Count Control Register"
|
|
rgroup.word 0x3E++0x1
|
|
line.word 0x0 "SPI1_DMBCS,SPI Direct Mode Byte Count Status Register"
|
|
else
|
|
hgroup.word 0x3C++0x3
|
|
hide.word 0x0 "SPI1_DMBCC,SPI Direct Mode Byte Count Control Register"
|
|
hide.word 0x2 "SPI1_DMBCS,SPI Direct Mode Byte Count Status Register"
|
|
endif
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "SPI1_DMSTATUS,SPI Direct Mode Status Register"
|
|
bitfld.long 0x0 16.--20. " TXFLEVEL[4:0] ,Current Fill Level of TX-FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0 8.--12. " RXFLEVEL[4:0] ,Current Fill Level of RX-FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0 1. " TXACTIVE ,Transmission Active" "Not active,Active"
|
|
bitfld.long 0x0 0. " TXACTIVE ,Reception Active" "Not active,Active"
|
|
rgroup.byte 0x44++0x0 "Bit Count Registers"
|
|
line.byte 0x0 "SPI1_TXBITCNT,SPI Transmit Bit Count Register"
|
|
bitfld.byte 0x0 0.--5. " TXBITCNT[5:0] ,Number of pending transmission bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
if ((((d.b((ad:0xB0B38400+0x34))&0x1))==0x0))
|
|
rgroup.byte 0x45++0x0
|
|
line.byte 0x0 "SPI1_RXBITCNT,SPI Transmit Bit Count Register"
|
|
bitfld.byte 0x0 0.--5. " TXBITCNT[5:0] ,Number of valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
rgroup.long 0x48++0x3 "Shift Register"
|
|
line.long 0x0 "SPI1_RXSHIFT,SPI RX Shift Register"
|
|
else
|
|
hgroup.byte 0x45++0x0
|
|
hide.byte 0x0 "SPI1_RXBITCNT,SPI Transmit Bit Count Register"
|
|
hgroup.long 0x48++0x3 "Shift Register"
|
|
hide.long 0x0 "SPI1_RXSHIFT,SPI RX Shift Register"
|
|
endif
|
|
group.long 0x4C++0x3 "Configuration Register"
|
|
line.long 0x0 "SPI1_FIFOCFG,SPI FIFO Configuration Register"
|
|
bitfld.long 0x0 12. " TXFLSH ,TX-FIFO Flush" "No effect,Flush"
|
|
bitfld.long 0x0 11. " RXFLSH ,RX-FIFO Flush" "No effect,Flush"
|
|
bitfld.long 0x0 10. " TXCTRL ,TXCTRL bit to be Written to TX-FIFO" "Low,High"
|
|
bitfld.long 0x0 8.--9. " FWIDTH[1:0] ,TX/RX-FIFO Width" "8-bit,16-bit,24-bit,32-bit"
|
|
bitfld.long 0x0 4.--7. " TXFTH[3:0] ,TX-FIFO Threshold Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 0.--3. " RXFTH[3:0] ,RX-FIFO Threshold Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree "Tx-FIFO Registers"
|
|
group.long 0x50++0x3F
|
|
line.long 0x0 "SPI1_TXFIFO0,SPI TX-FIFO Register 0"
|
|
line.long 0x4 "SPI1_TXFIFO1,SPI TX-FIFO Register 1"
|
|
line.long 0x8 "SPI1_TXFIFO2,SPI TX-FIFO Register 2"
|
|
line.long 0xC "SPI1_TXFIFO3,SPI TX-FIFO Register 3"
|
|
line.long 0x10 "SPI1_TXFIFO4,SPI TX-FIFO Register 4"
|
|
line.long 0x14 "SPI1_TXFIFO5,SPI TX-FIFO Register 5"
|
|
line.long 0x18 "SPI1_TXFIFO6,SPI TX-FIFO Register 6"
|
|
line.long 0x1C "SPI1_TXFIFO7,SPI TX-FIFO Register 7"
|
|
line.long 0x20 "SPI1_TXFIFO8,SPI TX-FIFO Register 8"
|
|
line.long 0x24 "SPI1_TXFIFO9,SPI TX-FIFO Register 9"
|
|
line.long 0x28 "SPI1_TXFIFO10,SPI TX-FIFO Register 10"
|
|
line.long 0x2C "SPI1_TXFIFO11,SPI TX-FIFO Register 11"
|
|
line.long 0x30 "SPI1_TXFIFO12,SPI TX-FIFO Register 12"
|
|
line.long 0x34 "SPI1_TXFIFO13,SPI TX-FIFO Register 13"
|
|
line.long 0x38 "SPI1_TXFIFO14,SPI TX-FIFO Register 14"
|
|
line.long 0x3C "SPI1_TXFIFO15,SPI TX-FIFO Register 15"
|
|
tree.end
|
|
tree "Rx-FIFO Registers"
|
|
hgroup.long 0x90++0x3F
|
|
hide.long 0x0 "SPI1_RXFIFO0,SPI RX-FIFO Register 0"
|
|
in
|
|
hide.long 0x4 "SPI1_RXFIFO1,SPI RX-FIFO Register 1"
|
|
in
|
|
hide.long 0x8 "SPI1_RXFIFO2,SPI RX-FIFO Register 2"
|
|
in
|
|
hide.long 0xC "SPI1_RXFIFO3,SPI RX-FIFO Register 3"
|
|
in
|
|
hide.long 0x10 "SPI1_RXFIFO4,SPI RX-FIFO Register 4"
|
|
in
|
|
hide.long 0x14 "SPI1_RXFIFO5,SPI RX-FIFO Register 5"
|
|
in
|
|
hide.long 0x18 "SPI1_RXFIFO6,SPI RX-FIFO Register 6"
|
|
in
|
|
hide.long 0x1C "SPI1_RXFIFO7,SPI RX-FIFO Register 7"
|
|
in
|
|
hide.long 0x20 "SPI1_RXFIFO8,SPI RX-FIFO Register 8"
|
|
in
|
|
hide.long 0x24 "SPI1_RXFIFO9,SPI RX-FIFO Register 9"
|
|
in
|
|
hide.long 0x28 "SPI1_RXFIFO10,SPI RX-FIFO Register 10"
|
|
in
|
|
hide.long 0x2C "SPI1_RXFIFO11,SPI RX-FIFO Register 11"
|
|
in
|
|
hide.long 0x30 "SPI1_RXFIFO12,SPI RX-FIFO Register 12"
|
|
in
|
|
hide.long 0x34 "SPI1_RXFIFO13,SPI RX-FIFO Register 13"
|
|
in
|
|
hide.long 0x38 "SPI1_RXFIFO14,SPI RX-FIFO Register 14"
|
|
in
|
|
hide.long 0x3C "SPI1_RXFIFO15,SPI RX-FIFO Register 15"
|
|
in
|
|
tree.end
|
|
rgroup.long 0xFC++0x3 "Module ID Register"
|
|
line.long 0x0 "SPI1_MID,SPI Module ID Register"
|
|
width 12.
|
|
tree.end
|
|
tree "SPI2"
|
|
base ad:0xB0B38800
|
|
width 15.
|
|
textline " "
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "SPI2_MCTRL,SPI Module Control Register"
|
|
rbitfld.long 0x0 4. " MES ,Module Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " CDSS ,Clock Division Source Select" "iHCLK,iPCLK"
|
|
bitfld.long 0x0 2. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " CSEN ,Command Sequencer Enable (Direct mode/Command sequencer)" "Direct mode,"
|
|
bitfld.long 0x0 0. " MEN ,Module Enable" "Disabled,Enabled"
|
|
if (((d.l(ad:0xB0B38800+0x34))&0x1)==0x1)
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "SPI2_PCC0,SPI Peripheral Communication Configuration Register 0"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 0" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS[6:0] ,Clock Division Ratio Select of Peripheral 0"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 0" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD[1:0] ,Slave-Select to Clock Delay of Peripheral 0" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 0 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 0" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 0" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 0" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 0" "Odd,Even"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "SPI2_PCC0,SPI Peripheral Communication Configuration Register 0"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 0" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 0 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 0" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 0" "Odd,Even"
|
|
endif
|
|
if (((d.l(ad:0xB0B38800+0x34))&0x1)==0x1)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "SPI2_PCC1,SPI Peripheral Communication Configuration Register 1"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 1" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS[6:0] ,Clock Division Ratio Select of Peripheral 1"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 1" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD[1:0] ,Slave-Select to Clock Delay of Peripheral 1" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 1 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 1" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 1" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 1" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 1" "Odd,Even"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "SPI2_PCC1,SPI Peripheral Communication Configuration Register 1"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 1" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 1 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 1" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 1" "Odd,Even"
|
|
endif
|
|
if (((d.l(ad:0xB0B38800+0x34))&0x1)==0x1)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "SPI2_PCC2,SPI Peripheral Communication Configuration Register 2"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 2" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS[6:0] ,Clock Division Ratio Select of Peripheral 2"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 2" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD[1:0] ,Slave-Select to Clock Delay of Peripheral 2" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 2 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 2" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 2" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 2" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 2" "Odd,Even"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "SPI2_PCC2,SPI Peripheral Communication Configuration Register 2"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 2" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 2 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 2" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 2" "Odd,Even"
|
|
endif
|
|
if (((d.l(ad:0xB0B38800+0x34))&0x1)==0x1)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI2_PCC3,SPI Peripheral Communication Configuration Register 3"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 3" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS[6:0] ,Clock Division Ratio Select of Peripheral 3"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 3" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD[1:0] ,Slave-Select to Clock Delay of Peripheral 3" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 3 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 3" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 3" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 3" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 3" "Odd,Even"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI2_PCC3,SPI Peripheral Communication Configuration Register 3"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 3" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 3 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 3" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 3" "Odd,Even"
|
|
endif
|
|
rgroup.long 0x14++0x3 "Interrupt Registers"
|
|
line.long 0x0 "HSSPI2_TXF,HSSPI TX Interrupt Flag Register"
|
|
bitfld.long 0x0 6. " TSSRS ,Slave Select Released" "Not released,Released"
|
|
bitfld.long 0x0 5. " TFMTS ,TX-FIFO Fill Level is More Than Threshold" "No,Yes"
|
|
bitfld.long 0x0 4. " TFLETS ,TX-FIFO Fill Level is Less Than or Equal to Threshold" "No,Yes"
|
|
bitfld.long 0x0 3. " TFUS ,TX-FIFO Underrun" "No underrun,Underrun"
|
|
bitfld.long 0x0 2. " TFOS ,TX-FIFO Overrun" "No overrun,Overrun"
|
|
bitfld.long 0x0 1. " TFES ,TX-FIFO and Shift Register is Empty" "Not empty,Empty"
|
|
bitfld.long 0x0 0. " TFFS ,TX-FIFO Full" "Not full,Full"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "SPI2_TXE,SPI TX Interrupt Enable Register"
|
|
bitfld.long 0x0 6. " TSSRE ,Slave Select Released Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " TFMTE ,TX-FIFO Fill Level is More Than Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " TFLETE ,TX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " TFUE ,TX-FIFO Underrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TFOE ,TX-FIFO Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TFEE ,TX-FIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " TFFE ,TX-FIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "SPI2_TXC,SPI TX Interrupt Clear Register"
|
|
bitfld.long 0x0 6. " TSSRC ,Slave Select Released Interrupt (SPI2_TXF:TSSRS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 5. " TFMTC ,TX-FIFO Fill Level is More Than Threshold Interrupt (SPI2_TXF:TFMTS) Clear " "No effect,Clear"
|
|
bitfld.long 0x0 4. " TFLETC ,TX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt (SPI2_TXF:TFLETS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 3. " TFUC ,TX-FIFO Underrun Interrupt (SPI2_TXF:TFUS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 2. " TFOC ,TX-FIFO Overrun Interrupt (SPI2_TXF:TFOS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 1. " TFEC ,TX-FIFO Empty Interrupt (SPI2_TXF:TFES) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 0. " TFFC ,TX-FIFO Full Interrupt (SPI2_TXF:TFFS) Clear" "No effect,Clear"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "HSSPI2_RXF,HSSPI RX Interrupt Flag Register"
|
|
bitfld.long 0x0 6. " RSSRS ,Slave Select Released" "Not released,Released"
|
|
bitfld.long 0x0 5. " RFMTS ,RX-FIFO Fill Level is More Than Threshold" "No,Yes"
|
|
bitfld.long 0x0 4. " RFLETS ,RX-FIFO Fill Level is Less Than or Equal to Threshold" "No,Yes"
|
|
bitfld.long 0x0 3. " RFUS ,TX-RIFO Underrun" "No underrun,Underrun"
|
|
bitfld.long 0x0 2. " RFOS ,RX-FIFO Overrun" "No overrun,Overrun"
|
|
bitfld.long 0x0 1. " RFES ,RX-FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x0 0. " RFFS ,RX-FIFO Full" "Not full,Full"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "SPI2_RXE,SPI RX Interrupt Enable Register"
|
|
bitfld.long 0x0 6. " RSSRE ,Slave Select Released Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " RFMTE ,RX-FIFO Fill Level is More Than Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " RFLETE ,RX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " RFUE ,RX-FIFO Underrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " RFOE ,RX-FIFO Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " RFEE ,RX-FIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " RFFE ,RX-FIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "SPI2_RXC,SPI RX Interrupt Clear Register"
|
|
bitfld.long 0x0 6. " RSSRC ,Slave Select Released Interrupt (SPI2_RXF:RSSRS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 5. " RFMTC ,RX-FIFO Fill Level is More Than Threshold Interrupt (SPI2_RXF:RFMTS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 4. " RFLETC ,RX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt (SPI2_RXF:RFLETS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 3. " RFUC ,RX-FIFO Underrun Interrupt (SPI2_RXF:RFUS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 2. " RFOC ,RX-FIFO Overrun Interrupt (SPI2_RXF:RFOS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 1. " RFEC ,RX-FIFO Empty Interrupt (SPI2_RXF:RFES) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 0. " RFFC ,RX-FIFO Full Interrupt (SPI2_RXF:RFFS) Clear" "No effect,Clear"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "SPI2_FAULTF,SPI Fault Interrupt Flag Register"
|
|
bitfld.long 0x0 4. " DRCBSFS ,DMA Read Channel Block Size Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 3. " DWCBSFS ,DMA Write Channel Block Size Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " PVFS ,Protection Violation Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 1. " WAFS ,Write Access Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " UMAFS ,Unmapped Memory Access Fault" "No interrupt,Interrupt"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "SPI2_FAULTC,SPI Fault Interrupt Clear Register"
|
|
bitfld.long 0x0 4. " DRCBSFC ,DMA Read Channel Block Size Fault Interrupt (HSSPIn_FAULTF:DRCBSFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 3. " DWCBSFC ,DMA Write Channel Block Size Fault Interrupt (HSSPIn_FAULTF:DWCBSFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 2. " PVFC ,Protection Violation Fault Interrupt (HSSPIn_FAULTF:PVFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 1. " WAFC ,Write Access Fault Interrupt (HSSPIn_FAULTF:WAFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 0. " UMAFC ,Unmapped Memory Access Fault Interrupt (HSSPIn_FAULTF:UMAFS) Clear" "No effect,Clear"
|
|
if (((d.b(ad:0xB0B38800+0x34))&0x1)==0x1)
|
|
group.byte 0x34++0x0
|
|
line.byte 0x0 "SPI2_DMCFG,SPI Direct Mode Configuration Register"
|
|
bitfld.byte 0x0 2. " MSTARTEN ,iMSTART Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " SSDC ,Slave Select Deassertion Control" "Software flow control,Byte counter mode"
|
|
bitfld.byte 0x0 0. " MST ,Master Mode" "Slave,Master"
|
|
else
|
|
group.byte 0x34++0x0
|
|
line.byte 0x0 "SPI2_DMCFG,SPI Direct Mode Configuration Register"
|
|
bitfld.byte 0x0 0. " MST ,Master Mode" "Slave,Master"
|
|
endif
|
|
group.byte 0x35++0x0
|
|
line.byte 0x0 "SPI2_DMDMAEN,SPI Direct Mode DMA Enable Register"
|
|
bitfld.byte 0x0 1. " TXDMAEN ,TX DMA Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " RXDMAEN ,RX DMA Enable" "Disabled,Enabled"
|
|
if (((d.b(ad:0xB0B38800+0x34))&0x1)==0x1)
|
|
group.byte 0x38++0x0
|
|
line.byte 0x0 "SPI2_DMSTART,SPI Direct Mode Start Register"
|
|
bitfld.byte 0x0 0. " START ,Start Transfer" "No effect,Start"
|
|
else
|
|
hgroup.byte 0x38++0x0
|
|
hide.byte 0x0 "SPI2_DMSTART,SPI Direct Mode Start Register"
|
|
endif
|
|
if (((d.b(ad:0xB0B38800+0x34))&0x1)==0x1&&((d.b(ad:0xB0B38800+0x34))&0x2)==0x0)
|
|
group.byte 0x39++0x0
|
|
line.byte 0x0 "SPI2_DMSTOP,SPI Direct Mode Stop Register"
|
|
bitfld.byte 0x0 0. " STOP ,Stop bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.byte 0x39++0x0
|
|
hide.byte 0x0 "SPI2_DMSTOP,SPI Direct Mode Stop Register"
|
|
endif
|
|
group.byte 0x3A++0x1
|
|
line.byte 0x0 "SPI2_DMPSEL,SPI Direct Mode Peripheral Slave Select Register"
|
|
bitfld.byte 0x0 0.--1. " PSEL[1:0] ,Peripheral Select" "Slave 0,Slave 1,Slave 2,Slave 3"
|
|
line.byte 0x1 "SPI2_DMTRP,SPI Direct Mode Transfer Protocol Register"
|
|
bitfld.byte 0x1 0.--3. " TRP[3:0] ,Transfer Protocol" "Tx/Rx,,,,Rx,,,,Tx,,,?..."
|
|
if (((d.b(ad:0xB0B38800+0x34))&0x1)==0x1&&((d.b(ad:0xB0B38800+0x34))&0x2)==0x2)
|
|
group.word 0x3C++0x1
|
|
line.word 0x0 "SPI2_DMBCC,SPI Direct Mode Byte Count Control Register"
|
|
rgroup.word 0x3E++0x1
|
|
line.word 0x0 "SPI2_DMBCS,SPI Direct Mode Byte Count Status Register"
|
|
else
|
|
hgroup.word 0x3C++0x3
|
|
hide.word 0x0 "SPI2_DMBCC,SPI Direct Mode Byte Count Control Register"
|
|
hide.word 0x2 "SPI2_DMBCS,SPI Direct Mode Byte Count Status Register"
|
|
endif
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "SPI2_DMSTATUS,SPI Direct Mode Status Register"
|
|
bitfld.long 0x0 16.--20. " TXFLEVEL[4:0] ,Current Fill Level of TX-FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0 8.--12. " RXFLEVEL[4:0] ,Current Fill Level of RX-FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0 1. " TXACTIVE ,Transmission Active" "Not active,Active"
|
|
bitfld.long 0x0 0. " TXACTIVE ,Reception Active" "Not active,Active"
|
|
rgroup.byte 0x44++0x0 "Bit Count Registers"
|
|
line.byte 0x0 "SPI2_TXBITCNT,SPI Transmit Bit Count Register"
|
|
bitfld.byte 0x0 0.--5. " TXBITCNT[5:0] ,Number of pending transmission bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
if ((((d.b((ad:0xB0B38800+0x34))&0x1))==0x0))
|
|
rgroup.byte 0x45++0x0
|
|
line.byte 0x0 "SPI2_RXBITCNT,SPI Transmit Bit Count Register"
|
|
bitfld.byte 0x0 0.--5. " TXBITCNT[5:0] ,Number of valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
rgroup.long 0x48++0x3 "Shift Register"
|
|
line.long 0x0 "SPI2_RXSHIFT,SPI RX Shift Register"
|
|
else
|
|
hgroup.byte 0x45++0x0
|
|
hide.byte 0x0 "SPI2_RXBITCNT,SPI Transmit Bit Count Register"
|
|
hgroup.long 0x48++0x3 "Shift Register"
|
|
hide.long 0x0 "SPI2_RXSHIFT,SPI RX Shift Register"
|
|
endif
|
|
group.long 0x4C++0x3 "Configuration Register"
|
|
line.long 0x0 "SPI2_FIFOCFG,SPI FIFO Configuration Register"
|
|
bitfld.long 0x0 12. " TXFLSH ,TX-FIFO Flush" "No effect,Flush"
|
|
bitfld.long 0x0 11. " RXFLSH ,RX-FIFO Flush" "No effect,Flush"
|
|
bitfld.long 0x0 10. " TXCTRL ,TXCTRL bit to be Written to TX-FIFO" "Low,High"
|
|
bitfld.long 0x0 8.--9. " FWIDTH[1:0] ,TX/RX-FIFO Width" "8-bit,16-bit,24-bit,32-bit"
|
|
bitfld.long 0x0 4.--7. " TXFTH[3:0] ,TX-FIFO Threshold Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 0.--3. " RXFTH[3:0] ,RX-FIFO Threshold Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree "Tx-FIFO Registers"
|
|
group.long 0x50++0x3F
|
|
line.long 0x0 "SPI2_TXFIFO0,SPI TX-FIFO Register 0"
|
|
line.long 0x4 "SPI2_TXFIFO1,SPI TX-FIFO Register 1"
|
|
line.long 0x8 "SPI2_TXFIFO2,SPI TX-FIFO Register 2"
|
|
line.long 0xC "SPI2_TXFIFO3,SPI TX-FIFO Register 3"
|
|
line.long 0x10 "SPI2_TXFIFO4,SPI TX-FIFO Register 4"
|
|
line.long 0x14 "SPI2_TXFIFO5,SPI TX-FIFO Register 5"
|
|
line.long 0x18 "SPI2_TXFIFO6,SPI TX-FIFO Register 6"
|
|
line.long 0x1C "SPI2_TXFIFO7,SPI TX-FIFO Register 7"
|
|
line.long 0x20 "SPI2_TXFIFO8,SPI TX-FIFO Register 8"
|
|
line.long 0x24 "SPI2_TXFIFO9,SPI TX-FIFO Register 9"
|
|
line.long 0x28 "SPI2_TXFIFO10,SPI TX-FIFO Register 10"
|
|
line.long 0x2C "SPI2_TXFIFO11,SPI TX-FIFO Register 11"
|
|
line.long 0x30 "SPI2_TXFIFO12,SPI TX-FIFO Register 12"
|
|
line.long 0x34 "SPI2_TXFIFO13,SPI TX-FIFO Register 13"
|
|
line.long 0x38 "SPI2_TXFIFO14,SPI TX-FIFO Register 14"
|
|
line.long 0x3C "SPI2_TXFIFO15,SPI TX-FIFO Register 15"
|
|
tree.end
|
|
tree "Rx-FIFO Registers"
|
|
hgroup.long 0x90++0x3F
|
|
hide.long 0x0 "SPI2_RXFIFO0,SPI RX-FIFO Register 0"
|
|
in
|
|
hide.long 0x4 "SPI2_RXFIFO1,SPI RX-FIFO Register 1"
|
|
in
|
|
hide.long 0x8 "SPI2_RXFIFO2,SPI RX-FIFO Register 2"
|
|
in
|
|
hide.long 0xC "SPI2_RXFIFO3,SPI RX-FIFO Register 3"
|
|
in
|
|
hide.long 0x10 "SPI2_RXFIFO4,SPI RX-FIFO Register 4"
|
|
in
|
|
hide.long 0x14 "SPI2_RXFIFO5,SPI RX-FIFO Register 5"
|
|
in
|
|
hide.long 0x18 "SPI2_RXFIFO6,SPI RX-FIFO Register 6"
|
|
in
|
|
hide.long 0x1C "SPI2_RXFIFO7,SPI RX-FIFO Register 7"
|
|
in
|
|
hide.long 0x20 "SPI2_RXFIFO8,SPI RX-FIFO Register 8"
|
|
in
|
|
hide.long 0x24 "SPI2_RXFIFO9,SPI RX-FIFO Register 9"
|
|
in
|
|
hide.long 0x28 "SPI2_RXFIFO10,SPI RX-FIFO Register 10"
|
|
in
|
|
hide.long 0x2C "SPI2_RXFIFO11,SPI RX-FIFO Register 11"
|
|
in
|
|
hide.long 0x30 "SPI2_RXFIFO12,SPI RX-FIFO Register 12"
|
|
in
|
|
hide.long 0x34 "SPI2_RXFIFO13,SPI RX-FIFO Register 13"
|
|
in
|
|
hide.long 0x38 "SPI2_RXFIFO14,SPI RX-FIFO Register 14"
|
|
in
|
|
hide.long 0x3C "SPI2_RXFIFO15,SPI RX-FIFO Register 15"
|
|
in
|
|
tree.end
|
|
rgroup.long 0xFC++0x3 "Module ID Register"
|
|
line.long 0x0 "SPI2_MID,SPI Module ID Register"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "High Speed SPI Interface"
|
|
base ad:0xb0000000
|
|
width 16.
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "HSSPI0_MCTRL,HSSPI Module Control Register"
|
|
rbitfld.long 0x0 4. " MES ,Module Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " CDSS ,Clock Division Source Select" "iHCLK,iPCLK"
|
|
bitfld.long 0x0 2. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " CSEN ,Command Sequencer Enable (Direct mode/Command sequencer)" "Direct mode,Command sequencer"
|
|
bitfld.long 0x0 0. " MEN ,Module Enable" "Disabled,Enabled"
|
|
width 16.
|
|
if (((d.l(ad:0xb0000000+0x34))&0x1)==0x1)
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "HSSPI0_PCC0,HSSPI Peripheral Communication Configuration Register 0"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 0" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS ,Clock Division Ratio Select of Peripheral 0"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 0" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD ,Slave-Select to Clock Delay of Peripheral 0" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 0 (signal is active)" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 0" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 0" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 0" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 0" "Odd,Even"
|
|
else
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "HSSPI0_PCC0,HSSPI Peripheral Communication Configuration Register 0"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 0" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 0 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 0" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 0" "Odd,Even"
|
|
endif
|
|
if (((d.l(ad:0xb0000000+0x34))&0x1)==0x1)
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "HSSPI0_PCC1,HSSPI Peripheral Communication Configuration Register 1"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 1" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS ,Clock Division Ratio Select of Peripheral 1"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 1" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD ,Slave-Select to Clock Delay of Peripheral 1" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 1 (signal is active)" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 1" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 1" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 1" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 1" "Odd,Even"
|
|
else
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "HSSPI0_PCC1,HSSPI Peripheral Communication Configuration Register 1"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 1" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 1 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 1" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 1" "Odd,Even"
|
|
endif
|
|
if (((d.l(ad:0xb0000000+0x34))&0x1)==0x1)
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "HSSPI0_PCC2,HSSPI Peripheral Communication Configuration Register 2"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 2" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS ,Clock Division Ratio Select of Peripheral 2"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 2" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD ,Slave-Select to Clock Delay of Peripheral 2" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 2 (signal is active)" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 2" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 2" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 2" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 2" "Odd,Even"
|
|
else
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "HSSPI0_PCC2,HSSPI Peripheral Communication Configuration Register 2"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 2" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 2 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 2" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 2" "Odd,Even"
|
|
endif
|
|
if (((d.l(ad:0xb0000000+0x34))&0x1)==0x1)
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "HSSPI0_PCC3,HSSPI Peripheral Communication Configuration Register 3"
|
|
bitfld.long 0x00 16. " SAFESYNC ,Safe Synchronisation for Peripheral 3" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 9.--15. 1. " CDRS ,Clock Division Ratio Select of Peripheral 3"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 3" "MSB,LSB"
|
|
bitfld.long 0x00 5.--6. " SS2CD ,Slave-Select to Clock Delay of Peripheral 3" "0,1,2,3"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 3 (signal is active)" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTM ,Use Retimed Clock for Capturing the Data from Peripheral 3" "Not used,Used"
|
|
bitfld.long 0x00 2. " ACES ,Active Clock Edges are Same on Peripheral 3" "Alternate,Same"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 3" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 3" "Odd,Even"
|
|
else
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "HSSPI0_PCC3,HSSPI Peripheral Communication Configuration Register 3"
|
|
bitfld.long 0x00 7. " SDIR ,Shift Direction of Peripheral 3" "MSB,LSB"
|
|
bitfld.long 0x00 4. " SSPOL ,Slave Select Polarity of Peripheral 3 (signal is active)" "Low,High"
|
|
bitfld.long 0x00 1. " CPOL ,Clock Polarity of Peripheral 3" "Low,High"
|
|
bitfld.long 0x00 0. " CPHA ,Clock Phase of Peripheral 3" "Odd,Even"
|
|
endif
|
|
width 16.
|
|
if (((d.l(ad:0xb0000000))&0x2)==0x0)
|
|
rgroup.long 0x14++0x3 "Interrupt Registers"
|
|
line.long 0x0 "HSSPI0_TXF,HSSPI TX Interrupt Flag Register"
|
|
bitfld.long 0x0 6. " TSSRS ,Slave Select Released" "Not released,Released"
|
|
bitfld.long 0x0 5. " TFMTS ,TX-FIFO Fill Level is More Than Threshold" "No,Yes"
|
|
bitfld.long 0x0 4. " TFLETS ,TX-FIFO Fill Level is Less Than or Equal to Threshold" "No,Yes"
|
|
bitfld.long 0x0 3. " TFUS ,TX-FIFO Underrun" "No underrun,Underrun"
|
|
bitfld.long 0x0 2. " TFOS ,TX-FIFO Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x0 1. " TFES ,TX-FIFO and Shift Register is Empty" "Not empty,Empty"
|
|
bitfld.long 0x0 0. " TFFS ,TX-FIFO Full" "Not full,Full"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "HSSPI0_TXE,HSSPI TX Interrupt Enable Register"
|
|
bitfld.long 0x0 6. " TSSRE ,Slave Select Released Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " TFMTE ,TX-FIFO Fill Level is More Than Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " TFLETE ,TX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " TFUE ,TX-FIFO Underrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TFOE ,TX-FIFO Overrun Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " TFEE ,TX-FIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " TFFE ,TX-FIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "HSSPI0_TXC,HSSPI TX Interrupt Clear Register"
|
|
bitfld.long 0x0 6. " TSSRC ,Slave Select Released Interrupt (HSSPI0_TXF:TSSRS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 5. " TFMTC ,TX-FIFO Fill Level is More Than Threshold Interrupt (HSSPI0_TXF:TFMTS) Clear " "No effect,Clear"
|
|
bitfld.long 0x0 4. " TFLETC ,TX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt (HSSPI0_TXF:TFLETS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 3. " TFUC ,TX-FIFO Underrun Interrupt (HSSPI0_TXF:TFUS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 2. " TFOC ,TX-FIFO Overrun Interrupt (HSSPI0_TXF:TFOS) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 1. " TFEC ,TX-FIFO Empty Interrupt (HSSPI0_TXF:TFES) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 0. " TFFC ,TX-FIFO Full Interrupt (HSSPI0_TXF:TFFS) Clear" "No effect,Clear"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "HSSPI0_RXF,HSSPI RX Interrupt Flag Register"
|
|
bitfld.long 0x0 6. " RSSRS ,Slave Select Released" "Not released,Released"
|
|
bitfld.long 0x0 5. " RFMTS ,RX-FIFO Fill Level is More Than Threshold" "No,Yes"
|
|
bitfld.long 0x0 4. " RFLETS ,RX-FIFO Fill Level is Less Than or Equal to Threshold" "No,Yes"
|
|
bitfld.long 0x0 3. " RFUS ,TX-RIFO Underrun" "No underrun,Underrun"
|
|
bitfld.long 0x0 2. " RFOS ,RX-FIFO Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RFES ,RX-FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x0 0. " RFFS ,RX-FIFO Full" "Not full,Full"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "HSSPI0_RXE,HSSPI RX Interrupt Enable Register"
|
|
bitfld.long 0x0 6. " RSSRE ,Slave Select Released Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " RFMTE ,RX-FIFO Fill Level is More Than Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " RFLETE ,RX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " RFUE ,RX-FIFO Underrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " RFOE ,RX-FIFO Overrun Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RFEE ,RX-FIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " RFFE ,RX-FIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "HSSPI0_RXC,HSSPI RX Interrupt Clear Register"
|
|
bitfld.long 0x0 6. " RSSRC ,Slave Select Released Interrupt (HSSPI0_RXF:RSSRS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 5. " RFMTC ,RX-FIFO Fill Level is More Than Threshold Interrupt (HSSPI0_RXF:RFMTS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 4. " RFLETC ,RX-FIFO Fill Level is Less Than or Equal to Threshold Interrupt (HSSPI0_RXF:RFLETS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 3. " RFUC ,RX-FIFO Underrun Interrupt (HSSPI0_RXF:RFUS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 2. " RFOC ,RX-FIFO Overrun Interrupt (HSSPI0_RXF:RFOS) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RFEC ,RX-FIFO Empty Interrupt (HSSPI0_RXF:RFES) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 0. " RFFC ,RX-FIFO Full Interrupt (HSSPI0_RXF:RFFS) Clear" "No effect,Clear"
|
|
else
|
|
hgroup.long 0x14++0x3 "Interrupt Registers"
|
|
hide.long 0x0 "HSSPI0_TXF,HSSPI TX Interrupt Flag Register"
|
|
hgroup.long 0x18++0x3
|
|
hide.long 0x0 "HSSPI0_TXE,HSSPI TX Interrupt Enable Register"
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x0 "HSSPI0_TXC,HSSPI TX Interrupt Clear Register"
|
|
hgroup.long 0x20++0x3
|
|
hide.long 0x0 "HSSPI0_RXF,HSSPI RX Interrupt Flag Register"
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x0 "HSSPI0_RXE,HSSPI RX Interrupt Enable Register"
|
|
hgroup.long 0x28++0x3
|
|
hide.long 0x0 "HSSPI0_RXC,HSSPI RX Interrupt Clear Register"
|
|
endif
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "HSSPI0_FAULTF,HSSPI Fault Interrupt Flag Register"
|
|
bitfld.long 0x0 4. " DRCBSFS ,DMA Read Channel Block Size Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 3. " DWCBSFS ,DMA Write Channel Block Size Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " PVFS ,Protection Violation Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 1. " WAFS ,Write Access Fault" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " UMAFS ,Unmapped Memory Access Fault" "No interrupt,Interrupt"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "HSSPI0_FAULTC,HSSPI Fault Interrupt Clear Register"
|
|
bitfld.long 0x0 4. " DRCBSFC ,DMA Read Channel Block Size Fault Interrupt (HSSPIn_FAULTF:DRCBSFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 3. " DWCBSFC ,DMA Write Channel Block Size Fault Interrupt (HSSPIn_FAULTF:DWCBSFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 2. " PVFC ,Protection Violation Fault Interrupt (HSSPIn_FAULTF:PVFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 1. " WAFC ,Write Access Fault Interrupt (HSSPIn_FAULTF:WAFS) Clear" "No effect,Clear"
|
|
bitfld.long 0x0 0. " UMAFC ,Unmapped Memory Access Fault Interrupt (HSSPIn_FAULTF:UMAFS) Clear" "No effect,Clear"
|
|
width 16.
|
|
if (((d.b(ad:0xb0000000))&0x2)==0x0&&((d.b(ad:0xb0000000+0x34))&0x1)==0x1)
|
|
group.byte 0x34++0x0 "Direct Mode Registers"
|
|
line.byte 0x0 "HSSPI0_DMCFG,HSSPI Direct Mode Configuration Register"
|
|
bitfld.byte 0x0 2. " MSTARTEN ,iMSTART Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " SSDC ,Slave Select Deassertion Control" "Software flow control,Byte counter mode"
|
|
bitfld.byte 0x0 0. " MST ,Master Mode" "Slave,Master"
|
|
elif (((d.b(ad:0xb0000000))&0x2)==0x0&&((d.b(ad:0xb0000000+0x34))&0x1)==0x0)
|
|
group.byte 0x34++0x0 "Direct Mode Registers"
|
|
line.byte 0x0 "HSSPI0_DMCFG,HSSPI Direct Mode Configuration Register"
|
|
bitfld.byte 0x0 0. " MST ,Master Mode" "Slave,Master"
|
|
else
|
|
hgroup.byte 0x34++0x0 "Direct Mode Registers"
|
|
hide.byte 0x0 "HSSPI0_DMCFG,HSSPI Direct Mode Configuration Register"
|
|
endif
|
|
if (((d.b(ad:0xb0000000))&0x2)==0x0)
|
|
group.byte 0x35++0x0
|
|
line.byte 0x0 "HSSPI0_DMDMAEN,HSSPI Direct Mode DMA Enable Register"
|
|
bitfld.byte 0x0 1. " TXDMAEN ,TX DMA Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " RXDMAEN ,RX DMA Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.byte 0x35++0x0
|
|
hide.byte 0x0 "HSSPI0_DMDMAEN,HSSPI Direct Mode DMA Enable Register"
|
|
endif
|
|
if (((d.b(ad:0xb0000000))&0x2)==0x0&&((d.b(ad:0xb0000000+0x34))&0x1)==0x1)
|
|
group.byte 0x38++0x0
|
|
line.byte 0x0 "HSSPI0_DMSTART,HSSPI Direct Mode Start Register"
|
|
bitfld.byte 0x0 0. " START ,Start Transfer" "No effect,Start"
|
|
else
|
|
hgroup.byte 0x38++0x0
|
|
hide.byte 0x0 "HSSPI0_DMSTART,HSSPI Direct Mode Start Register"
|
|
endif
|
|
if (((d.b(ad:0xb0000000))&0x2)==0x0&&((d.b(ad:0xb0000000+0x34))&0x1)==0x1&&((d.b(ad:0xb0000000+0x34))&0x2)==0x0)
|
|
group.byte 0x39++0x0
|
|
line.byte 0x0 "HSSPI0_DMSTOP,HSSPI Direct Mode Stop Register"
|
|
bitfld.byte 0x0 0. " STOP ,Stop bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.byte 0x39++0x0
|
|
hide.byte 0x0 "HSSPI0_DMSTOP,HSSPI Direct Mode Stop Register"
|
|
endif
|
|
if (((d.b(ad:0xb0000000))&0x2)==0x0)
|
|
group.byte 0x3A++0x1
|
|
line.byte 0x0 "HSSPI0_DMPSEL,HSSPI Direct Mode Peripheral Slave Select Register"
|
|
bitfld.byte 0x0 0.--1. " PSEL[1:0] ,Peripheral Select" "Slave 0,Slave 1,Slave 2,Slave 3"
|
|
line.byte 0x1 "HSSPI0_DMTRP,HSSPI Direct Mode Transfer Protocol Register"
|
|
bitfld.byte 0x1 0.--3. " TRP[3:0] ,Transfer Protocol" "Tx/Rx legacy mode,,,,Rx-legacy mode,Rx-dual mode,Rx-quad mode,,Tx-legacy mode,Tx-dual mode,Tx-quad mode,?..."
|
|
else
|
|
hgroup.byte 0x3A++0x1
|
|
hide.byte 0x0 "HSSPI0_DMPSEL,HSSPI Direct Mode Peripheral Slave Select Register"
|
|
hide.byte 0x1 "HSSPI0_DMTRP,HSSPI Direct Mode Transfer Protocol Register"
|
|
endif
|
|
if (((d.b(ad:0xb0000000))&0x2)==0x0&&((d.b(ad:0xb0000000+0x34))&0x1)==0x1&&((d.b(ad:0xb0000000+0x34))&0x2)==0x2)
|
|
group.word 0x3C++0x1
|
|
line.word 0x0 "HSSPI0_DMBCC,HSSPI Direct Mode Byte Count Control Register"
|
|
rgroup.word 0x3E++0x1
|
|
line.word 0x0 "HSSPI0_DMBCS,HSSPI Direct Mode Byte Count Status Register"
|
|
else
|
|
hgroup.word 0x3C++0x3
|
|
hide.word 0x0 "HSSPI0_DMBCC,HSSPI Direct Mode Byte Count Control Register"
|
|
hide.word 0x2 "HSSPI0_DMBCS,HSSPI Direct Mode Byte Count Status Register"
|
|
endif
|
|
if (((d.b(ad:0xb0000000))&0x2)==0x0)
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "HSSPI0_DMSTATUS,HSSPI Direct Mode Status Register"
|
|
bitfld.long 0x0 16.--20. " TXFLEVEL[4:0] ,Current Fill Level of TX-FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0 8.--12. " RXFLEVEL[4:0] ,Current Fill Level of RX-FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0 1. " TXACTIVE ,Transmission Active" "Not active,Active"
|
|
bitfld.long 0x0 0. " RXACTIVE ,Reception Active" "Not active,Active"
|
|
else
|
|
hgroup.long 0x40++0x3
|
|
hide.long 0x0 "HSSPI0_DMSTATUS,HSSPI Direct Mode Status Register"
|
|
endif
|
|
width 16.
|
|
if (((d.b(ad:0xb0000000))&0x2)==0x0)
|
|
rgroup.byte 0x44++0x0 "Bit Count Registers"
|
|
line.byte 0x0 "HSSPI0_TXBITCNT,HSSPI Transmit Bit Count Register"
|
|
bitfld.byte 0x0 0.--5. " TXBITCNT[5:0] ,Number of pending transmission bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
else
|
|
hgroup.byte 0x44++0x0 "Bit Count Registers"
|
|
hide.byte 0x0 "HSSPI0_TXBITCNT,HSSPI Transmit Bit Count Register"
|
|
endif
|
|
if (((d.b(ad:0xb0000000+0x34))&0x1)==0x0)
|
|
rgroup.byte 0x45++0x0
|
|
line.byte 0x0 "HSSPI0_RXBITCNT,HSSPI Transmit Bit Count Register"
|
|
bitfld.byte 0x0 0.--5. " TXBITCNT[5:0] ,Number of valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
rgroup.long 0x48++0x3 "Shift Register"
|
|
line.long 0x0 "HSSPI0_RXSHIFT,HSSPI RX Shift Register"
|
|
else
|
|
hgroup.byte 0x45++0x0
|
|
hide.byte 0x0 "HSSPI0_RXBITCNT,HSSPI Transmit Bit Count Register"
|
|
hgroup.long 0x48++0x3 "Shift Register"
|
|
hide.long 0x0 "HSSPI0_RXSHIFT,HSSPI RX Shift Register"
|
|
endif
|
|
width 16.
|
|
tree "Tx-FIFO Registers"
|
|
group.long 0x50++0x3F
|
|
line.long 0x0 "HSSPI0_TXFIFO0,HSSPI TX-FIFO Register 0"
|
|
line.long 0x4 "HSSPI0_TXFIFO1,HSSPI TX-FIFO Register 1"
|
|
line.long 0x8 "HSSPI0_TXFIFO2,HSSPI TX-FIFO Register 2"
|
|
line.long 0xC "HSSPI0_TXFIFO3,HSSPI TX-FIFO Register 3"
|
|
line.long 0x10 "HSSPI0_TXFIFO4,HSSPI TX-FIFO Register 4"
|
|
line.long 0x14 "HSSPI0_TXFIFO5,HSSPI TX-FIFO Register 5"
|
|
line.long 0x18 "HSSPI0_TXFIFO6,HSSPI TX-FIFO Register 6"
|
|
line.long 0x1C "HSSPI0_TXFIFO7,HSSPI TX-FIFO Register 7"
|
|
line.long 0x20 "HSSPI0_TXFIFO8,HSSPI TX-FIFO Register 8"
|
|
line.long 0x24 "HSSPI0_TXFIFO9,HSSPI TX-FIFO Register 9"
|
|
line.long 0x28 "HSSPI0_TXFIFO10,HSSPI TX-FIFO Register 10"
|
|
line.long 0x2C "HSSPI0_TXFIFO11,HSSPI TX-FIFO Register 11"
|
|
line.long 0x30 "HSSPI0_TXFIFO12,HSSPI TX-FIFO Register 12"
|
|
line.long 0x34 "HSSPI0_TXFIFO13,HSSPI TX-FIFO Register 13"
|
|
line.long 0x38 "HSSPI0_TXFIFO14,HSSPI TX-FIFO Register 14"
|
|
line.long 0x3C "HSSPI0_TXFIFO15,HSSPI TX-FIFO Register 15"
|
|
tree.end
|
|
tree "Rx-FIFO Registers"
|
|
hgroup.long 0x90++0x3F
|
|
hide.long 0x0 "HSSPI0_RXFIFO0,HSSPI RX-FIFO Register 0"
|
|
in
|
|
hide.long 0x4 "HSSPI0_RXFIFO1,HSSPI RX-FIFO Register 1"
|
|
in
|
|
hide.long 0x8 "HSSPI0_RXFIFO2,HSSPI RX-FIFO Register 2"
|
|
in
|
|
hide.long 0xC "HSSPI0_RXFIFO3,HSSPI RX-FIFO Register 3"
|
|
in
|
|
hide.long 0x10 "HSSPI0_RXFIFO4,HSSPI RX-FIFO Register 4"
|
|
in
|
|
hide.long 0x14 "HSSPI0_RXFIFO5,HSSPI RX-FIFO Register 5"
|
|
in
|
|
hide.long 0x18 "HSSPI0_RXFIFO6,HSSPI RX-FIFO Register 6"
|
|
in
|
|
hide.long 0x1C "HSSPI0_RXFIFO7,HSSPI RX-FIFO Register 7"
|
|
in
|
|
hide.long 0x20 "HSSPI0_RXFIFO8,HSSPI RX-FIFO Register 8"
|
|
in
|
|
hide.long 0x24 "HSSPI0_RXFIFO9,HSSPI RX-FIFO Register 9"
|
|
in
|
|
hide.long 0x28 "HSSPI0_RXFIFO10,HSSPI RX-FIFO Register 10"
|
|
in
|
|
hide.long 0x2C "HSSPI0_RXFIFO11,HSSPI RX-FIFO Register 11"
|
|
in
|
|
hide.long 0x30 "HSSPI0_RXFIFO12,HSSPI RX-FIFO Register 12"
|
|
in
|
|
hide.long 0x34 "HSSPI0_RXFIFO13,HSSPI RX-FIFO Register 13"
|
|
in
|
|
hide.long 0x38 "HSSPI0_RXFIFO14,HSSPI RX-FIFO Register 14"
|
|
in
|
|
hide.long 0x3C "HSSPI0_RXFIFO15,HSSPI RX-FIFO Register 15"
|
|
in
|
|
tree.end
|
|
group.long 0x4C++0x3 "Configuration Register"
|
|
line.long 0x0 "HSSPI0_FIFOCFG,HSSPI FIFO Configuration Register"
|
|
bitfld.long 0x0 12. " TXFLSH ,TX-FIFO Flush" "No effect,Flush"
|
|
bitfld.long 0x0 11. " RXFLSH ,RX-FIFO Flush" "No effect,Flush"
|
|
bitfld.long 0x0 10. " TXCTRL ,TXCTRL bit to be Written to TX-FIFO" "0,1"
|
|
bitfld.long 0x0 8.--9. " FWIDTH[1:0] ,TX/RX-FIFO Width" "8-bit,16-bit,24-bit,32-bit"
|
|
bitfld.long 0x0 4.--7. " TXFTH[3:0] ,TX-FIFO Threshold Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x0 0.--3. " RXFTH[3:0] ,RX-FIFO Threshold Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xD0++0x3 "Command Sequencer Register"
|
|
line.long 0x0 "HSSPI0_CSCFG,HSSPI Command Sequencer Configuration Register"
|
|
bitfld.long 0x0 16.--19. " MSEL[3:0] ,Memory Device Selection bits (range of the AHB address space)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 11. " SSEL3EN ,Slave Select 3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 10. " SSEL2EN ,Slave Select 2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " SSEL1EN ,Slave Select 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " SSEL0EN ,Slave Select 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1.--2. " MBM[1:0] ,Multi Bit Mode" "Legacy,Half-duplex dual-bit,Quad bit,"
|
|
bitfld.long 0x0 0. " SRAM ,Serial SRAM or Serial Flash Memory Type Select (Writes disabled/enabled)" "Disabled,Enabled"
|
|
width 16.
|
|
if (((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.long 0xD4++0x7
|
|
line.long 0x0 "HSSPI0_CSITIME,HSSPI Command Sequencer Idle Time Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " ITIME[15:0] ,Idle Time"
|
|
line.long 0x4 "HSSPI0_CSAEXT,HSSPI Command Sequencer Address Extension Register"
|
|
hexmask.long.tbyte 0x4 13.--31. 0x20 " AEXT[18:0] ,Address Extension bits"
|
|
else
|
|
hgroup.long 0xD4++0x3
|
|
hide.long 0x0 "HSSPI0_CSITIME,HSSPI Command Sequencer Idle Time Register"
|
|
hide.long 0x4 "HSSPI0_CSAEXT,HSSPI Command Sequencer Address Extension Register"
|
|
endif
|
|
tree "HSSPI Read Command Sequence Data/Control Registers"
|
|
if (((d.w(ad:0xb0000000+0xDC))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xDC++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC0,HSSPI Read Command Sequence Data/Control Register 0"
|
|
bitfld.word 0x0 8.--10. " RDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xDC))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xDC++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC0,HSSPI Read Command Sequence Data/Control Register 0"
|
|
hexmask.word.byte 0x0 8.--15. 1. " RDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xDC++0x1
|
|
hide.word 0x0 "HSSPI0_RDCSDC0,HSSPI Read Command Sequence Data/Control Register 0"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xDE))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xDE++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC1,HSSPI Read Command Sequence Data/Control Register 1"
|
|
bitfld.word 0x0 8.--10. " RDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xDE))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xDE++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC1,HSSPI Read Command Sequence Data/Control Register 1"
|
|
hexmask.word.byte 0x0 8.--15. 1. " RDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xDE++0x1
|
|
hide.word 0x0 "HSSPI0_RDCSDC1,HSSPI Read Command Sequence Data/Control Register 1"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xE0))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xE0++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC2,HSSPI Read Command Sequence Data/Control Register 2"
|
|
bitfld.word 0x0 8.--10. " RDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xE0))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xE0++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC2,HSSPI Read Command Sequence Data/Control Register 2"
|
|
hexmask.word.byte 0x0 8.--15. 1. " RDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xE0++0x1
|
|
hide.word 0x0 "HSSPI0_RDCSDC2,HSSPI Read Command Sequence Data/Control Register 2"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xE2))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xE2++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC3,HSSPI Read Command Sequence Data/Control Register 3"
|
|
bitfld.word 0x0 8.--10. " RDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xE2))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xE2++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC3,HSSPI Read Command Sequence Data/Control Register 3"
|
|
hexmask.word.byte 0x0 8.--15. 1. " RDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xE2++0x1
|
|
hide.word 0x0 "HSSPI0_RDCSDC3,HSSPI Read Command Sequence Data/Control Register 3"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xE4))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xE4++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC4,HSSPI Read Command Sequence Data/Control Register 4"
|
|
bitfld.word 0x0 8.--10. " RDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xE4))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xE4++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC4,HSSPI Read Command Sequence Data/Control Register 4"
|
|
hexmask.word.byte 0x0 8.--15. 1. " RDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xE4++0x1
|
|
hide.word 0x0 "HSSPI0_RDCSDC4,HSSPI Read Command Sequence Data/Control Register 4"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xE6))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xE6++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC5,HSSPI Read Command Sequence Data/Control Register 5"
|
|
bitfld.word 0x0 8.--10. " RDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xE6))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xE6++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC5,HSSPI Read Command Sequence Data/Control Register 5"
|
|
hexmask.word.byte 0x0 8.--15. 1. " RDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xE6++0x1
|
|
hide.word 0x0 "HSSPI0_RDCSDC5,HSSPI Read Command Sequence Data/Control Register 5"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xE8))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xE8++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC6,HSSPI Read Command Sequence Data/Control Register 6"
|
|
bitfld.word 0x0 8.--10. " RDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xE8))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xE8++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC6,HSSPI Read Command Sequence Data/Control Register 6"
|
|
hexmask.word.byte 0x0 8.--15. 1. " RDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xE8++0x1
|
|
hide.word 0x0 "HSSPI0_RDCSDC6,HSSPI Read Command Sequence Data/Control Register 6"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xEA))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xEA++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC7,HSSPI Read Command Sequence Data/Control Register 7"
|
|
bitfld.word 0x0 8.--10. " RDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xEA))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xEA++0x1
|
|
line.word 0x0 "HSSPI0_RDCSDC7,HSSPI Read Command Sequence Data/Control Register 7"
|
|
hexmask.word.byte 0x0 8.--15. 1. " RDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Read Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit RDCSDATA[7:0],Decode RDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xEA++0x1
|
|
hide.word 0x0 "HSSPI0_RDCSDC7,HSSPI Read Command Sequence Data/Control Register 7"
|
|
endif
|
|
tree.end
|
|
tree "HSSPI Write Command Sequence Data/Control Registers"
|
|
if (((d.w(ad:0xb0000000+0xEC))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xEC++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC0,HSSPI Write Command Sequence Data/Control Register 0"
|
|
bitfld.word 0x0 8.--10. " WDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xEC))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xEC++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC0,HSSPI Write Command Sequence Data/Control Register 0"
|
|
hexmask.word.byte 0x0 8.--15. 1. " WDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xEC++0x1
|
|
hide.word 0x0 "HSSPI0_WRCSDC0,HSSPI Write Command Sequence Data/Control Register 0"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xEE))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xEE++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC1,HSSPI Write Command Sequence Data/Control Register 1"
|
|
bitfld.word 0x0 8.--10. " WDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xEE))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xEE++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC1,HSSPI Write Command Sequence Data/Control Register 1"
|
|
hexmask.word.byte 0x0 8.--15. 1. " WDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xEE++0x1
|
|
hide.word 0x0 "HSSPI0_WRCSDC1,HSSPI Write Command Sequence Data/Control Register 1"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xF0))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xF0++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC2,HSSPI Write Command Sequence Data/Control Register 2"
|
|
bitfld.word 0x0 8.--10. " WDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xF0))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xF0++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC2,HSSPI Write Command Sequence Data/Control Register 2"
|
|
hexmask.word.byte 0x0 8.--15. 1. " WDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xF0++0x1
|
|
hide.word 0x0 "HSSPI0_WRCSDC2,HSSPI Write Command Sequence Data/Control Register 2"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xF2))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xF2++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC3,HSSPI Write Command Sequence Data/Control Register 3"
|
|
bitfld.word 0x0 8.--10. " WDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xF2))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xF2++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC3,HSSPI Write Command Sequence Data/Control Register 3"
|
|
hexmask.word.byte 0x0 8.--15. 1. " WDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xF2++0x1
|
|
hide.word 0x0 "HSSPI0_WRCSDC3,HSSPI Write Command Sequence Data/Control Register 3"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xF4))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xF4++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC4,HSSPI Write Command Sequence Data/Control Register 4"
|
|
bitfld.word 0x0 8.--10. " WDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xF4))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xF4++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC4,HSSPI Write Command Sequence Data/Control Register 4"
|
|
hexmask.word.byte 0x0 8.--15. 1. " WDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xF4++0x1
|
|
hide.word 0x0 "HSSPI0_WRCSDC4,HSSPI Write Command Sequence Data/Control Register 4"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xF6))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xF6++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC5,HSSPI Write Command Sequence Data/Control Register 5"
|
|
bitfld.word 0x0 8.--10. " WDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xF6))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xF6++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC5,HSSPI Write Command Sequence Data/Control Register 5"
|
|
hexmask.word.byte 0x0 8.--15. 1. " WDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xF6++0x1
|
|
hide.word 0x0 "HSSPI0_WRCSDC5,HSSPI Write Command Sequence Data/Control Register 5"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xF8))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xF8++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC6,HSSPI Write Command Sequence Data/Control Register 6"
|
|
bitfld.word 0x0 8.--10. " WDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xF8))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xF8++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC6,HSSPI Write Command Sequence Data/Control Register 6"
|
|
hexmask.word.byte 0x0 8.--15. 1. " WDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xF8++0x1
|
|
hide.word 0x0 "HSSPI0_WRCSDC6,HSSPI Write Command Sequence Data/Control Register 6"
|
|
endif
|
|
if (((d.w(ad:0xb0000000+0xFA))&0x1)==0x1&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xFA++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC7,HSSPI Write Command Sequence Data/Control Register 7"
|
|
bitfld.word 0x0 8.--10. " WDCSDATA[2:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions" "Bits [7:0],Bits [15:8],Bits [23:16],Bits [31:24],High-Z byte,High-Z nibble,,End of list"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
elif (((d.w(ad:0xb0000000+0xFA))&0x1)==0x0&&((d.b(ad:0xb0000000))&0x2)==0x2)
|
|
group.word 0xFA++0x1
|
|
line.word 0x0 "HSSPI0_WRCSDC7,HSSPI Write Command Sequence Data/Control Register 7"
|
|
hexmask.word.byte 0x0 8.--15. 1. " WDCSDATA[7:0] ,Command Sequencer Data or Control byte for Memory-Write Transactions"
|
|
bitfld.word 0x0 0. " DEC ,Decode" "Transmit WDCSDATA[7:0],Decode WDCSDATA[2:0]"
|
|
else
|
|
hgroup.word 0xFA++0x1
|
|
hide.word 0x0 "HSSPI0_WRCSDC7,HSSPI Write Command Sequence Data/Control Register 7"
|
|
endif
|
|
tree.end
|
|
width 16.
|
|
rgroup.long 0xFC++0x3 "Module ID Register"
|
|
line.long 0x0 "HSSPI0_MID,HSSPI Module ID Register"
|
|
width 12.
|
|
tree.end
|
|
tree.open "Inter IC Sound"
|
|
tree "I2S 0"
|
|
base ad:0xb0b20000
|
|
width 14.
|
|
textline " "
|
|
tree "Reception FIFO Data Registers"
|
|
hgroup.long 0x0++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT0,Reception FIFO Data Register 0"
|
|
in
|
|
hgroup.long 0x4++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT1,Reception FIFO Data Register 1"
|
|
in
|
|
hgroup.long 0x8++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT2,Reception FIFO Data Register 2"
|
|
in
|
|
hgroup.long 0xC++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT3,Reception FIFO Data Register 3"
|
|
in
|
|
hgroup.long 0x10++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT4,Reception FIFO Data Register 4"
|
|
in
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT5,Reception FIFO Data Register 5"
|
|
in
|
|
hgroup.long 0x18++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT6,Reception FIFO Data Register 6"
|
|
in
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT7,Reception FIFO Data Register 7"
|
|
in
|
|
hgroup.long 0x20++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT8,Reception FIFO Data Register 8"
|
|
in
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT9,Reception FIFO Data Register 9"
|
|
in
|
|
hgroup.long 0x28++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT10,Reception FIFO Data Register 10"
|
|
in
|
|
hgroup.long 0x2C++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT11,Reception FIFO Data Register 11"
|
|
in
|
|
hgroup.long 0x30++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT12,Reception FIFO Data Register 12"
|
|
in
|
|
hgroup.long 0x34++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT13,Reception FIFO Data Register 13"
|
|
in
|
|
hgroup.long 0x38++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT14,Reception FIFO Data Register 14"
|
|
in
|
|
hgroup.long 0x3C++0x3
|
|
hide.long 0x00 "I2S0_RXFDAT15,Reception FIFO Data Register 15"
|
|
in
|
|
tree.end
|
|
tree "Transmission FIFO Data Registers"
|
|
wgroup.long 0x40++0x3F
|
|
line.long 0x0 "I2S0_TXFDAT0,Transmission FIFO Data Register 0"
|
|
line.long 0x4 "I2S0_TXFDAT1,Transmission FIFO Data Register 1"
|
|
line.long 0x8 "I2S0_TXFDAT2,Transmission FIFO Data Register 2"
|
|
line.long 0xC "I2S0_TXFDAT3,Transmission FIFO Data Register 3"
|
|
line.long 0x10 "I2S0_TXFDAT4,Transmission FIFO Data Register 4"
|
|
line.long 0x14 "I2S0_TXFDAT5,Transmission FIFO Data Register 5"
|
|
line.long 0x18 "I2S0_TXFDAT6,Transmission FIFO Data Register 6"
|
|
line.long 0x1C "I2S0_TXFDAT7,Transmission FIFO Data Register 7"
|
|
line.long 0x20 "I2S0_TXFDAT8,Transmission FIFO Data Register 8"
|
|
line.long 0x24 "I2S0_TXFDAT9,Transmission FIFO Data Register 9"
|
|
line.long 0x28 "I2S0_TXFDAT10,Transmission FIFO Data Register 10"
|
|
line.long 0x2C "I2S0_TXFDAT11,Transmission FIFO Data Register 11"
|
|
line.long 0x30 "I2S0_TXFDAT12,Transmission FIFO Data Register 12"
|
|
line.long 0x34 "I2S0_TXFDAT13,Transmission FIFO Data Register 13"
|
|
line.long 0x38 "I2S0_TXFDAT14,Transmission FIFO Data Register 14"
|
|
line.long 0x3C "I2S0_TXFDAT15,Transmission FIFO Data Register 15"
|
|
tree.end
|
|
if (((d.l(ad:0xb0b20000+0x84))&0x7C00)==0x0&&((d.l(ad:0xb0b20000+0x80))&0x1000)==0x0)
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "I2S0_CNTREG,Control Register"
|
|
bitfld.long 0x0 26.--31. " CKRT[5:0] ,Clock Divider" "Not divided,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,66,68,70,72,74,76,78,80,82,84,86,88,90,92,94,96,98,100,102,104,106,108,110,112,114,116,118,120,122,124,126"
|
|
hexmask.long.word 0x0 16.--25. 0x1 " OVHD[9:0] ,Frame Rate Control (number of insertion bits)"
|
|
bitfld.long 0x0 14. " MSKB ,Serial Output Data in case of Invalid/Empty Frame Transmission" "Low,High"
|
|
bitfld.long 0x0 13. " MSMD ,Master and Slave Mode Select" "Slave,Master"
|
|
bitfld.long 0x0 12. " SBFN ,Sub Frame Construction (number of sub frame)" "1,2"
|
|
bitfld.long 0x0 11. " RHLL ,Word Construction" "1x32-bits,2x16-bits"
|
|
textline " "
|
|
bitfld.long 0x0 10. " ECKM ,Clock Selector" "Internal,External"
|
|
bitfld.long 0x0 9. " BEXT ,Bit Extension" "By '0',By sign bit"
|
|
bitfld.long 0x0 8. " FRUN ,Output Mode of Frame Synchronous Signal" "Burst,Free-running"
|
|
bitfld.long 0x0 7. " MSLB ,Shifting Order" "MSB,LSB"
|
|
bitfld.long 0x0 6. " TXDIS ,Transmitter Disable" "No,Yes"
|
|
bitfld.long 0x0 5. " RXDIS ,Receiver Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SMPL ,Sampling Point" "Center,End"
|
|
bitfld.long 0x0 3. " CPOL ,Clock Polarity drive/sample" "Rising/Falling,Falling/Rising"
|
|
bitfld.long 0x0 2. " FSPH ,Frame Sync Phase (when WS0 becoms valid)" "1 before frame,Same as frame"
|
|
bitfld.long 0x0 1. " FSLN ,Frame Sync Pulse Width" "1-bit,"
|
|
bitfld.long 0x0 0. " FSPL ,Frame Sync Polarity (Frame synchronous signal becomes valid with WSn is:)" "1,0"
|
|
else
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "I2S0_CNTREG,Control Register"
|
|
bitfld.long 0x0 26.--31. " CKRT[5:0] ,Clock Divider" "Not divided,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,66,68,70,72,74,76,78,80,82,84,86,88,90,92,94,96,98,100,102,104,106,108,110,112,114,116,118,120,122,124,126"
|
|
hexmask.long.word 0x0 16.--25. 0x1 " OVHD[9:0] ,Frame Rate Control (number of insertion bits)"
|
|
bitfld.long 0x0 14. " MSKB ,Serial Output Data in case of Invalid/Empty Frame Transmission" "Low,High"
|
|
bitfld.long 0x0 13. " MSMD ,Master and Slave Mode Select" "Slave,Master"
|
|
bitfld.long 0x0 12. " SBFN ,Sub Frame Construction (number of sub frame)" "1,2"
|
|
bitfld.long 0x0 11. " RHLL ,Word Construction" "1x32-bits,2x16-bits"
|
|
textline " "
|
|
bitfld.long 0x0 10. " ECKM ,Clock Selector" "Internal,External"
|
|
bitfld.long 0x0 9. " BEXT ,Bit Extension" "By '0',By sign bit"
|
|
bitfld.long 0x0 8. " FRUN ,Output Mode of Frame Synchronous Signal" "Burst,Free-running"
|
|
bitfld.long 0x0 7. " MSLB ,Shifting Order" "MSB,LSB"
|
|
bitfld.long 0x0 6. " TXDIS ,Transmitter Disable" "No,Yes"
|
|
bitfld.long 0x0 5. " RXDIS ,Receiver Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SMPL ,Sampling Point" "Center,End"
|
|
bitfld.long 0x0 3. " CPOL ,Clock Polarity drive/sample" "Rising/Falling,Falling/Rising"
|
|
bitfld.long 0x0 2. " FSPH ,Frame Sync Phase (when WS0 becoms valid)" "1 before frame,Same as frame"
|
|
bitfld.long 0x0 1. " FSLN ,Frame Sync Pulse Width" "1-bit,1 channel"
|
|
bitfld.long 0x0 0. " FSPL ,Frame Sync Polarity (Frame synchronous signal becomes valid with WSn is:)" "1,0"
|
|
endif
|
|
if (((d.l(ad:0xb0b20000+0x80)&0x1800))==0x1000)
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "I2S0_MCR0REG,Channel Control Register 0"
|
|
bitfld.long 0x0 26.--30. " S1CHN[4:0] ,Sub Frame 1 Channel Numbers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 21.--25. " S1CHL[4:0] ,Sub Frame 1 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 16.--20. " S1WDL[4:0] ,Sub Frame 1 Word Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 10.--14. " S0CHN[4:0] ,Sub Frame 0 Channel Numbers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 5.--9. " S0CHL[4:0] ,Sub Frame 0 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 0.--4. " S0WDL[4:0] ,Sub Frame 0 Word Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
elif (((d.l(ad:0xb0b20000+0x80)&0x1800))==0x1800)
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "I2S0_MCR0REG,Channel Control Register 0"
|
|
bitfld.long 0x0 26.--30. " S1CHN[4:0] ,Sub Frame 1 Channel Numbers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 21.--25. " S1CHL[4:0] ,Sub Frame 1 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 16.--20. " S1WDL[4:0] ,Sub Frame 1 Word Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x0 10.--14. " S0CHN[4:0] ,Sub Frame 0 Channel Numbers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 5.--9. " S0CHL[4:0] ,Sub Frame 0 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 0.--4. " S0WDL[4:0] ,Sub Frame 0 Word Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,?..."
|
|
elif (((d.l(ad:0xb0b20000+0x80)&0x1800))==0x0)
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "I2S0_MCR0REG,Channel Control Register 0"
|
|
bitfld.long 0x0 21.--25. " S1CHL[4:0] ,Sub Frame 1 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 10.--14. " S0CHN[4:0] ,Sub Frame 0 Channel Numbers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 5.--9. " S0CHL[4:0] ,Sub Frame 0 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 0.--4. " S0WDL[4:0] ,Sub Frame 0 Word Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
elif (((d.l(ad:0xb0b20000+0x80)&0x1800))==0x800)
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "I2S0_MCR0REG,Channel Control Register 0"
|
|
bitfld.long 0x0 21.--25. " S1CHL[4:0] ,Sub Frame 1 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 10.--14. " S0CHN[4:0] ,Sub Frame 0 Channel Numbers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 5.--9. " S0CHL[4:0] ,Sub Frame 0 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 0.--4. " S0WDL[4:0] ,Sub Frame 0 Word Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,?..."
|
|
endif
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "I2S0_MCR1REG,Channel Control Register 1"
|
|
bitfld.long 0x00 31. " S0CH[31] ,Sub Frame 0 Channel 31 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " S0CH[30] ,Sub Frame 0 Channel 30 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " S0CH[29] ,Sub Frame 0 Channel 29 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " S0CH[28] ,Sub Frame 0 Channel 28 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " S0CH[27] ,Sub Frame 0 Channel 27 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " S0CH[26] ,Sub Frame 0 Channel 26 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S0CH[25] ,Sub Frame 0 Channel 25 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " S0CH[24] ,Sub Frame 0 Channel 24 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " S0CH[23] ,Sub Frame 0 Channel 23 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " S0CH[22] ,Sub Frame 0 Channel 22 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " S0CH[21] ,Sub Frame 0 Channel 21 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " S0CH[20] ,Sub Frame 0 Channel 20 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S0CH[19] ,Sub Frame 0 Channel 19 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " S0CH[18] ,Sub Frame 0 Channel 18 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " S0CH[17] ,Sub Frame 0 Channel 17 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " S0CH[16] ,Sub Frame 0 Channel 16 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " S0CH[15] ,Sub Frame 0 Channel 15 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " S0CH[14] ,Sub Frame 0 Channel 14 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S0CH[13] ,Sub Frame 0 Channel 13 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " S0CH[12] ,Sub Frame 0 Channel 12 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " S0CH[11] ,Sub Frame 0 Channel 11 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " S0CH[10] ,Sub Frame 0 Channel 10 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " S0CH[9] ,Sub Frame 0 Channel 9 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " S0CH[8] ,Sub Frame 0 Channel 8 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S0CH[7] ,Sub Frame 0 Channel 7 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " S0CH[6] ,Sub Frame 0 Channel 6 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " S0CH[5] ,Sub Frame 0 Channel 5 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " S0CH[4] ,Sub Frame 0 Channel 4 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " S0CH[3] ,Sub Frame 0 Channel 3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " S0CH[2] ,Sub Frame 0 Channel 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S0CH[1] ,Sub Frame 0 Channel 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " S0CH[0] ,Sub Frame 0 Channel 0 Enable" "Disabled,Enabled"
|
|
if (((d.l(ad:0xb0b20000+0x80))&0x1000)==0x1000)
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "I2S0_MCR2REG,Channel Control Register 2"
|
|
bitfld.long 0x00 31. " S1CH[31] ,Sub Frame 1 Channel 31 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " S1CH[30] ,Sub Frame 1 Channel 30 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " S1CH[29] ,Sub Frame 1 Channel 29 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " S1CH[28] ,Sub Frame 1 Channel 28 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " S1CH[27] ,Sub Frame 1 Channel 27 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " S1CH[26] ,Sub Frame 1 Channel 26 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S1CH[25] ,Sub Frame 1 Channel 25 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " S1CH[24] ,Sub Frame 1 Channel 24 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " S1CH[23] ,Sub Frame 1 Channel 23 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " S1CH[22] ,Sub Frame 1 Channel 22 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " S1CH[21] ,Sub Frame 1 Channel 21 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " S1CH[20] ,Sub Frame 1 Channel 20 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S1CH[19] ,Sub Frame 1 Channel 19 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " S1CH[18] ,Sub Frame 1 Channel 18 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " S1CH[17] ,Sub Frame 1 Channel 17 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " S1CH[16] ,Sub Frame 1 Channel 16 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " S1CH[15] ,Sub Frame 1 Channel 15 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " S1CH[14] ,Sub Frame 1 Channel 14 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S1CH[13] ,Sub Frame 1 Channel 13 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " S1CH[12] ,Sub Frame 1 Channel 12 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " S1CH[11] ,Sub Frame 1 Channel 11 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " S1CH[10] ,Sub Frame 1 Channel 10 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " S1CH[9] ,Sub Frame 1 Channel 9 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " S1CH[8] ,Sub Frame 1 Channel 8 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S1CH[7] ,Sub Frame 1 Channel 7 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " S1CH[6] ,Sub Frame 1 Channel 6 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " S1CH[5] ,Sub Frame 1 Channel 5 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " S1CH[4] ,Sub Frame 1 Channel 4 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " S1CH[3] ,Sub Frame 1 Channel 3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " S1CH[2] ,Sub Frame 1 Channel 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1CH[1] ,Sub Frame 1 Channel 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " S1CH[0] ,Sub Frame 1 Channel 0 Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x8C++0x03
|
|
hide.long 0x00 "I2S0_MCR2REG,Channel Control Register 2"
|
|
endif
|
|
group.long 0x90++0x17
|
|
line.long 0x00 "I2S0_OPRREG,Operation Control Register"
|
|
bitfld.long 0x00 24. " RXENB ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " TXENB ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " START ,I2S Enable" "Disabled,Enabled"
|
|
line.long 0x04 "I2S0_SRST,Software Reset Register"
|
|
bitfld.long 0x04 0. " SRST ,Software Reset" "No reset,Reset"
|
|
line.long 0x08 "I2S0_INTCNT,Interrupt Control Register"
|
|
bitfld.long 0x08 30. " TXUD1M ,Tx FIFO Underflow Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 29. " TBERM ,Tx Block Size Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 28. " FERRM ,Frame Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 27. " TXUD0M ,Tx FIFO Underflow Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 26. " TXOVM ,Tx FIFO Overflow Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 25. " TXFDM ,Tx DMA Mask " "Requested,Not requested"
|
|
textline " "
|
|
bitfld.long 0x08 24. " TXFIM ,Tx FIFO Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 21. " RBERM ,Rx Block Size Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 20. " RXUDM ,Rx FIFO Underflow Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 19. " RXOVM ,Rx FIFO Overflow Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 18. " EOPM ,EOPI Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 17. " RXFDM ,Rx FIFO DMA Mask" "Requested,Not requested"
|
|
textline " "
|
|
bitfld.long 0x08 16. " RXFIM ,Rx FIFO Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 8.--11. " TFTH[3:0] ,Tx FIFO Threshold Value" "0,1,2,3,4,5,6,7,%d..."
|
|
bitfld.long 0x08 4.--5. " RPTMR[1:0] ,Rx Completion Timer" "0,54000,108000,216000"
|
|
bitfld.long 0x08 0.--3. " RFTH[3:0] ,Rx FIFO Threshold Value" "0,1,2,3,4,5,6,7,%d..."
|
|
line.long 0x0c "I2S0_STATUS,Status Register"
|
|
rbitfld.long 0x0c 31. " TBERR ,Tx Block Size Error" "No error,Error"
|
|
rbitfld.long 0x0c 30. " RBERR ,TRx Block Size Error" "No error,Error"
|
|
bitfld.long 0x0c 29. " FERR ,Frame Error" "No error,Error"
|
|
bitfld.long 0x0c 28. " TXUDR1 ,Tx FIFO Underflow Error" "No error,Error"
|
|
bitfld.long 0x0c 27. " TXUDR0 ,Tx FIFO Underflow Error" "No error,Error"
|
|
bitfld.long 0x0c 26. " TXOVR ,Tx FIFO Overflow Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " RXUDR ,Rx FIFO Underflow Error" "No error,Error"
|
|
bitfld.long 0x0c 24. " RXOVR ,Rx FIFO Overflow Error" "No error,Error"
|
|
bitfld.long 0x0c 19. " EOPI ,Interrupt Flag for Rx Timer" "No interrupt,Interrupt"
|
|
rbitfld.long 0x0c 18. " BSY ,Serial Tx Busy" "Idle,Busy"
|
|
rbitfld.long 0x0c 17. " TXFI ,Tx FIFO Empty" "Empty spaces<Threshold,Empty spaces>Threshold"
|
|
rbitfld.long 0x0c 16. " RXFI ,Rx FIFO Full" "Receptions<Threshold,Receptions>Threshold"
|
|
textline " "
|
|
hexmask.long.byte 0x0c 8.--15. 0x1 " TXNUM[7:0] ,Number of Tx FIFO Data"
|
|
hexmask.long.byte 0x0c 0.--7. 0x1 " RXNUM[7:0] ,Number of Rx FIFO Data"
|
|
line.long 0x10 "I2S0_DMAACT,DMA Activate Register"
|
|
bitfld.long 0x10 16. " TDMACT ,Tx DMA Control (Transmission channel is activated)" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " RDMACT ,Rx DMA Control (Reception channel is activated)" "Disabled,Enabled"
|
|
line.long 0x14 "I2S0_DEBUG,Debug Register"
|
|
bitfld.long 0x14 0. " DBGE ,Debug Enable" "Disabled,Enabled"
|
|
rgroup.long 0xA8++0x3
|
|
line.long 0x0 "I2S0_MIDREG,Module ID Register"
|
|
width 12.
|
|
tree.end
|
|
tree "I2S 1"
|
|
base ad:0xb0b20400
|
|
width 14.
|
|
textline " "
|
|
tree "Reception FIFO Data Registers"
|
|
hgroup.long 0x0++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT0,Reception FIFO Data Register 0"
|
|
in
|
|
hgroup.long 0x4++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT1,Reception FIFO Data Register 1"
|
|
in
|
|
hgroup.long 0x8++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT2,Reception FIFO Data Register 2"
|
|
in
|
|
hgroup.long 0xC++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT3,Reception FIFO Data Register 3"
|
|
in
|
|
hgroup.long 0x10++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT4,Reception FIFO Data Register 4"
|
|
in
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT5,Reception FIFO Data Register 5"
|
|
in
|
|
hgroup.long 0x18++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT6,Reception FIFO Data Register 6"
|
|
in
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT7,Reception FIFO Data Register 7"
|
|
in
|
|
hgroup.long 0x20++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT8,Reception FIFO Data Register 8"
|
|
in
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT9,Reception FIFO Data Register 9"
|
|
in
|
|
hgroup.long 0x28++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT10,Reception FIFO Data Register 10"
|
|
in
|
|
hgroup.long 0x2C++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT11,Reception FIFO Data Register 11"
|
|
in
|
|
hgroup.long 0x30++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT12,Reception FIFO Data Register 12"
|
|
in
|
|
hgroup.long 0x34++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT13,Reception FIFO Data Register 13"
|
|
in
|
|
hgroup.long 0x38++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT14,Reception FIFO Data Register 14"
|
|
in
|
|
hgroup.long 0x3C++0x3
|
|
hide.long 0x00 "I2S1_RXFDAT15,Reception FIFO Data Register 15"
|
|
in
|
|
tree.end
|
|
tree "Transmission FIFO Data Registers"
|
|
wgroup.long 0x40++0x3F
|
|
line.long 0x0 "I2S1_TXFDAT0,Transmission FIFO Data Register 0"
|
|
line.long 0x4 "I2S1_TXFDAT1,Transmission FIFO Data Register 1"
|
|
line.long 0x8 "I2S1_TXFDAT2,Transmission FIFO Data Register 2"
|
|
line.long 0xC "I2S1_TXFDAT3,Transmission FIFO Data Register 3"
|
|
line.long 0x10 "I2S1_TXFDAT4,Transmission FIFO Data Register 4"
|
|
line.long 0x14 "I2S1_TXFDAT5,Transmission FIFO Data Register 5"
|
|
line.long 0x18 "I2S1_TXFDAT6,Transmission FIFO Data Register 6"
|
|
line.long 0x1C "I2S1_TXFDAT7,Transmission FIFO Data Register 7"
|
|
line.long 0x20 "I2S1_TXFDAT8,Transmission FIFO Data Register 8"
|
|
line.long 0x24 "I2S1_TXFDAT9,Transmission FIFO Data Register 9"
|
|
line.long 0x28 "I2S1_TXFDAT10,Transmission FIFO Data Register 10"
|
|
line.long 0x2C "I2S1_TXFDAT11,Transmission FIFO Data Register 11"
|
|
line.long 0x30 "I2S1_TXFDAT12,Transmission FIFO Data Register 12"
|
|
line.long 0x34 "I2S1_TXFDAT13,Transmission FIFO Data Register 13"
|
|
line.long 0x38 "I2S1_TXFDAT14,Transmission FIFO Data Register 14"
|
|
line.long 0x3C "I2S1_TXFDAT15,Transmission FIFO Data Register 15"
|
|
tree.end
|
|
if (((d.l(ad:0xb0b20400+0x84))&0x7C00)==0x0&&((d.l(ad:0xb0b20400+0x80))&0x1000)==0x0)
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "I2S1_CNTREG,Control Register"
|
|
bitfld.long 0x0 26.--31. " CKRT[5:0] ,Clock Divider" "Not divided,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,66,68,70,72,74,76,78,80,82,84,86,88,90,92,94,96,98,100,102,104,106,108,110,112,114,116,118,120,122,124,126"
|
|
hexmask.long.word 0x0 16.--25. 0x1 " OVHD[9:0] ,Frame Rate Control (number of insertion bits)"
|
|
bitfld.long 0x0 14. " MSKB ,Serial Output Data in case of Invalid/Empty Frame Transmission" "Low,High"
|
|
bitfld.long 0x0 13. " MSMD ,Master and Slave Mode Select" "Slave,Master"
|
|
bitfld.long 0x0 12. " SBFN ,Sub Frame Construction (number of sub frame)" "1,2"
|
|
bitfld.long 0x0 11. " RHLL ,Word Construction" "1x32-bits,2x16-bits"
|
|
textline " "
|
|
bitfld.long 0x0 10. " ECKM ,Clock Selector" "Internal,External"
|
|
bitfld.long 0x0 9. " BEXT ,Bit Extension" "By '0',By sign bit"
|
|
bitfld.long 0x0 8. " FRUN ,Output Mode of Frame Synchronous Signal" "Burst,Free-running"
|
|
bitfld.long 0x0 7. " MSLB ,Shifting Order" "MSB,LSB"
|
|
bitfld.long 0x0 6. " TXDIS ,Transmitter Disable" "No,Yes"
|
|
bitfld.long 0x0 5. " RXDIS ,Receiver Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SMPL ,Sampling Point" "Center,End"
|
|
bitfld.long 0x0 3. " CPOL ,Clock Polarity drive/sample" "Rising/Falling,Falling/Rising"
|
|
bitfld.long 0x0 2. " FSPH ,Frame Sync Phase (when WS1 becoms valid)" "1 before frame,Same as frame"
|
|
bitfld.long 0x0 1. " FSLN ,Frame Sync Pulse Width" "1-bit,"
|
|
bitfld.long 0x0 0. " FSPL ,Frame Sync Polarity (Frame synchronous signal becomes valid with WSn is:)" "1,0"
|
|
else
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "I2S1_CNTREG,Control Register"
|
|
bitfld.long 0x0 26.--31. " CKRT[5:0] ,Clock Divider" "Not divided,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,66,68,70,72,74,76,78,80,82,84,86,88,90,92,94,96,98,100,102,104,106,108,110,112,114,116,118,120,122,124,126"
|
|
hexmask.long.word 0x0 16.--25. 0x1 " OVHD[9:0] ,Frame Rate Control (number of insertion bits)"
|
|
bitfld.long 0x0 14. " MSKB ,Serial Output Data in case of Invalid/Empty Frame Transmission" "Low,High"
|
|
bitfld.long 0x0 13. " MSMD ,Master and Slave Mode Select" "Slave,Master"
|
|
bitfld.long 0x0 12. " SBFN ,Sub Frame Construction (number of sub frame)" "1,2"
|
|
bitfld.long 0x0 11. " RHLL ,Word Construction" "1x32-bits,2x16-bits"
|
|
textline " "
|
|
bitfld.long 0x0 10. " ECKM ,Clock Selector" "Internal,External"
|
|
bitfld.long 0x0 9. " BEXT ,Bit Extension" "By '0',By sign bit"
|
|
bitfld.long 0x0 8. " FRUN ,Output Mode of Frame Synchronous Signal" "Burst,Free-running"
|
|
bitfld.long 0x0 7. " MSLB ,Shifting Order" "MSB,LSB"
|
|
bitfld.long 0x0 6. " TXDIS ,Transmitter Disable" "No,Yes"
|
|
bitfld.long 0x0 5. " RXDIS ,Receiver Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SMPL ,Sampling Point" "Center,End"
|
|
bitfld.long 0x0 3. " CPOL ,Clock Polarity drive/sample" "Rising/Falling,Falling/Rising"
|
|
bitfld.long 0x0 2. " FSPH ,Frame Sync Phase (when WS1 becoms valid)" "1 before frame,Same as frame"
|
|
bitfld.long 0x0 1. " FSLN ,Frame Sync Pulse Width" "1-bit,1 channel"
|
|
bitfld.long 0x0 0. " FSPL ,Frame Sync Polarity (Frame synchronous signal becomes valid with WSn is:)" "1,0"
|
|
endif
|
|
if (((d.l(ad:0xb0b20400+0x80)&0x1800))==0x1000)
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "I2S1_MCR0REG,Channel Control Register 1"
|
|
bitfld.long 0x0 26.--30. " S1CHN[4:0] ,Sub Frame 1 Channel Numbers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 21.--25. " S1CHL[4:0] ,Sub Frame 1 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 16.--20. " S1WDL[4:0] ,Sub Frame 1 Word Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 10.--14. " S0CHN[4:0] ,Sub Frame 0 Channel Numbers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 5.--9. " S0CHL[4:0] ,Sub Frame 0 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 0.--4. " S0WDL[4:0] ,Sub Frame 0 Word Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
elif (((d.l(ad:0xb0b20400+0x80)&0x1800))==0x1800)
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "I2S1_MCR0REG,Channel Control Register 1"
|
|
bitfld.long 0x0 26.--30. " S1CHN[4:0] ,Sub Frame 1 Channel Numbers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 21.--25. " S1CHL[4:0] ,Sub Frame 1 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 16.--20. " S1WDL[4:0] ,Sub Frame 1 Word Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x0 10.--14. " S0CHN[4:0] ,Sub Frame 0 Channel Numbers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 5.--9. " S0CHL[4:0] ,Sub Frame 0 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 0.--4. " S0WDL[4:0] ,Sub Frame 0 Word Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,?..."
|
|
elif (((d.l(ad:0xb0b20400+0x80)&0x1800))==0x0)
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "I2S1_MCR0REG,Channel Control Register 1"
|
|
bitfld.long 0x0 21.--25. " S1CHL[4:0] ,Sub Frame 1 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 10.--14. " S0CHN[4:0] ,Sub Frame 0 Channel Numbers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 5.--9. " S0CHL[4:0] ,Sub Frame 0 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 0.--4. " S0WDL[4:0] ,Sub Frame 0 Word Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
elif (((d.l(ad:0xb0b20400+0x80)&0x1800))==0x800)
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "I2S1_MCR0REG,Channel Control Register 1"
|
|
bitfld.long 0x0 21.--25. " S1CHL[4:0] ,Sub Frame 1 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 10.--14. " S0CHN[4:0] ,Sub Frame 0 Channel Numbers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 5.--9. " S0CHL[4:0] ,Sub Frame 0 Channel Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 0.--4. " S0WDL[4:0] ,Sub Frame 0 Word Length (in bits)" ",,,,,,7,8,9,10,11,12,13,14,15,16,?..."
|
|
endif
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "I2S1_MCR1REG,Channel Control Register 1"
|
|
bitfld.long 0x00 31. " S0CH[31] ,Sub Frame 0 Channel 31 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " S0CH[30] ,Sub Frame 0 Channel 30 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " S0CH[29] ,Sub Frame 0 Channel 29 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " S0CH[28] ,Sub Frame 0 Channel 28 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " S0CH[27] ,Sub Frame 0 Channel 27 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " S0CH[26] ,Sub Frame 0 Channel 26 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S0CH[25] ,Sub Frame 0 Channel 25 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " S0CH[24] ,Sub Frame 0 Channel 24 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " S0CH[23] ,Sub Frame 0 Channel 23 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " S0CH[22] ,Sub Frame 0 Channel 22 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " S0CH[21] ,Sub Frame 0 Channel 21 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " S0CH[20] ,Sub Frame 0 Channel 20 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S0CH[19] ,Sub Frame 0 Channel 19 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " S0CH[18] ,Sub Frame 0 Channel 18 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " S0CH[17] ,Sub Frame 0 Channel 17 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " S0CH[16] ,Sub Frame 0 Channel 16 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " S0CH[15] ,Sub Frame 0 Channel 15 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " S0CH[14] ,Sub Frame 0 Channel 14 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S0CH[13] ,Sub Frame 0 Channel 13 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " S0CH[12] ,Sub Frame 0 Channel 12 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " S0CH[11] ,Sub Frame 0 Channel 11 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " S0CH[10] ,Sub Frame 0 Channel 10 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " S0CH[9] ,Sub Frame 0 Channel 9 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " S0CH[8] ,Sub Frame 0 Channel 8 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S0CH[7] ,Sub Frame 0 Channel 7 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " S0CH[6] ,Sub Frame 0 Channel 6 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " S0CH[5] ,Sub Frame 0 Channel 5 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " S0CH[4] ,Sub Frame 0 Channel 4 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " S0CH[3] ,Sub Frame 0 Channel 3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " S0CH[2] ,Sub Frame 0 Channel 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S0CH[1] ,Sub Frame 0 Channel 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " S0CH[0] ,Sub Frame 0 Channel 0 Enable" "Disabled,Enabled"
|
|
if (((d.l(ad:0xb0b20400+0x80))&0x1000)==0x1000)
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "I2S1_MCR2REG,Channel Control Register 2"
|
|
bitfld.long 0x00 31. " S1CH[31] ,Sub Frame 1 Channel 31 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " S1CH[30] ,Sub Frame 1 Channel 30 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " S1CH[29] ,Sub Frame 1 Channel 29 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " S1CH[28] ,Sub Frame 1 Channel 28 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " S1CH[27] ,Sub Frame 1 Channel 27 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " S1CH[26] ,Sub Frame 1 Channel 26 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S1CH[25] ,Sub Frame 1 Channel 25 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " S1CH[24] ,Sub Frame 1 Channel 24 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " S1CH[23] ,Sub Frame 1 Channel 23 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " S1CH[22] ,Sub Frame 1 Channel 22 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " S1CH[21] ,Sub Frame 1 Channel 21 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " S1CH[20] ,Sub Frame 1 Channel 20 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S1CH[19] ,Sub Frame 1 Channel 19 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " S1CH[18] ,Sub Frame 1 Channel 18 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " S1CH[17] ,Sub Frame 1 Channel 17 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " S1CH[16] ,Sub Frame 1 Channel 16 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " S1CH[15] ,Sub Frame 1 Channel 15 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " S1CH[14] ,Sub Frame 1 Channel 14 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S1CH[13] ,Sub Frame 1 Channel 13 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " S1CH[12] ,Sub Frame 1 Channel 12 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " S1CH[11] ,Sub Frame 1 Channel 11 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " S1CH[10] ,Sub Frame 1 Channel 10 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " S1CH[9] ,Sub Frame 1 Channel 9 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " S1CH[8] ,Sub Frame 1 Channel 8 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S1CH[7] ,Sub Frame 1 Channel 7 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " S1CH[6] ,Sub Frame 1 Channel 6 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " S1CH[5] ,Sub Frame 1 Channel 5 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " S1CH[4] ,Sub Frame 1 Channel 4 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " S1CH[3] ,Sub Frame 1 Channel 3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " S1CH[2] ,Sub Frame 1 Channel 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1CH[1] ,Sub Frame 1 Channel 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " S1CH[0] ,Sub Frame 1 Channel 0 Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x8C++0x03
|
|
hide.long 0x00 "I2S1_MCR2REG,Channel Control Register 2"
|
|
endif
|
|
group.long 0x90++0x17
|
|
line.long 0x00 "I2S1_OPRREG,Operation Control Register"
|
|
bitfld.long 0x00 24. " RXENB ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " TXENB ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " START ,I2S Enable" "Disabled,Enabled"
|
|
line.long 0x04 "I2S1_SRST,Software Reset Register"
|
|
bitfld.long 0x04 0. " SRST ,Software Reset" "No reset,Reset"
|
|
line.long 0x08 "I2S1_INTCNT,Interrupt Control Register"
|
|
bitfld.long 0x08 30. " TXUD1M ,Tx FIFO Underflow Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 29. " TBERM ,Tx Block Size Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 28. " FERRM ,Frame Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 27. " TXUD0M ,Tx FIFO Underflow Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 26. " TXOVM ,Tx FIFO Overflow Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 25. " TXFDM ,Tx DMA Mask " "Requested,Not requested"
|
|
textline " "
|
|
bitfld.long 0x08 24. " TXFIM ,Tx FIFO Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 21. " RBERM ,Rx Block Size Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 20. " RXUDM ,Rx FIFO Underflow Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 19. " RXOVM ,Rx FIFO Overflow Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 18. " EOPM ,EOPI Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 17. " RXFDM ,Rx FIFO DMA Mask" "Requested,Not requested"
|
|
textline " "
|
|
bitfld.long 0x08 16. " RXFIM ,Rx FIFO Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 8.--11. " TFTH[3:0] ,Tx FIFO Threshold Value" "0,1,2,3,4,5,6,7,%d..."
|
|
bitfld.long 0x08 4.--5. " RPTMR[1:0] ,Rx Completion Timer" "0,54000,108000,216000"
|
|
bitfld.long 0x08 0.--3. " RFTH[3:0] ,Rx FIFO Threshold Value" "0,1,2,3,4,5,6,7,%d..."
|
|
line.long 0x0c "I2S1_STATUS,Status Register"
|
|
rbitfld.long 0x0c 31. " TBERR ,Tx Block Size Error" "No error,Error"
|
|
rbitfld.long 0x0c 30. " RBERR ,TRx Block Size Error" "No error,Error"
|
|
bitfld.long 0x0c 29. " FERR ,Frame Error" "No error,Error"
|
|
bitfld.long 0x0c 28. " TXUDR1 ,Tx FIFO Underflow Error" "No error,Error"
|
|
bitfld.long 0x0c 27. " TXUDR0 ,Tx FIFO Underflow Error" "No error,Error"
|
|
bitfld.long 0x0c 26. " TXOVR ,Tx FIFO Overflow Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " RXUDR ,Rx FIFO Underflow Error" "No error,Error"
|
|
bitfld.long 0x0c 24. " RXOVR ,Rx FIFO Overflow Error" "No error,Error"
|
|
bitfld.long 0x0c 19. " EOPI ,Interrupt Flag for Rx Timer" "No interrupt,Interrupt"
|
|
rbitfld.long 0x0c 18. " BSY ,Serial Tx Busy" "Idle,Busy"
|
|
rbitfld.long 0x0c 17. " TXFI ,Tx FIFO Empty" "Empty spaces<Threshold,Empty spaces>Threshold"
|
|
rbitfld.long 0x0c 16. " RXFI ,Rx FIFO Full" "Receptions<Threshold,Receptions>Threshold"
|
|
textline " "
|
|
hexmask.long.byte 0x0c 8.--15. 0x1 " TXNUM[7:0] ,Number of Tx FIFO Data"
|
|
hexmask.long.byte 0x0c 0.--7. 0x1 " RXNUM[7:0] ,Number of Rx FIFO Data"
|
|
line.long 0x10 "I2S1_DMAACT,DMA Activate Register"
|
|
bitfld.long 0x10 16. " TDMACT ,Tx DMA Control (Transmission channel is activated)" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " RDMACT ,Rx DMA Control (Reception channel is activated)" "Disabled,Enabled"
|
|
line.long 0x14 "I2S1_DEBUG,Debug Register"
|
|
bitfld.long 0x14 0. " DBGE ,Debug Enable" "Disabled,Enabled"
|
|
rgroup.long 0xA8++0x3
|
|
line.long 0x0 "I2S1_MIDREG,Module ID Register"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "GPIO"
|
|
base ad:0xB0A08000
|
|
width 13.
|
|
tree "Data Direction Registers"
|
|
group.quad 0x208++0x7
|
|
line.quad 0x00 "GPIO_DDR0,Data Direction Register for Channel 0"
|
|
setclrfld.quad 0x00 63. -0x1F8 63. -0x1F0 63. " DD63 ,Data Direction Port 0 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x1F8 62. -0x1F0 62. " DD62 ,Data Direction Port 0 Pin 62" "Input,Output"
|
|
sif cpu()!="MB9EF226"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
sif cpu()!="MB9EF126"
|
|
setclrfld.quad 0x00 61. -0x1F8 61. -0x1F0 61. " DD61 ,Data Direction Port 0 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x1F8 60. -0x1F0 60. " DD60 ,Data Direction Port 0 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x1F8 59. -0x1F0 59. " DD59 ,Data Direction Port 0 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x1F8 58. -0x1F0 58. " DD58 ,Data Direction Port 0 Pin 58" "Input,Output"
|
|
setclrfld.quad 0x00 57. -0x1F8 57. -0x1F0 57. " DD57 ,Data Direction Port 0 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x1F8 56. -0x1F0 56. " DD56 ,Data Direction Port 0 Pin 56" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 55. -0x1F8 55. -0x1F0 55. " DD55 ,Data Direction Port 0 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x1F8 54. -0x1F0 54. " DD54 ,Data Direction Port 0 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x1F8 53. -0x1F0 53. " DD53 ,Data Direction Port 0 Pin 53" "Input,Output"
|
|
endif
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x1F8 52. -0x1F0 52. " DD52 ,Data Direction Port 0 Pin 52" "Input,Output"
|
|
endif
|
|
setclrfld.quad 0x00 51. -0x1F8 51. -0x1F0 51. " DD51 ,Data Direction Port 0 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x1F8 50. -0x1F0 50. " DD50 ,Data Direction Port 0 Pin 50" "Input,Output"
|
|
endif
|
|
setclrfld.quad 0x00 49. -0x1F8 49. -0x1F0 49. " DD49 ,Data Direction Port 0 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x1F8 48. -0x1F0 48. " DD48 ,Data Direction Port 0 Pin 48" "Input,Output"
|
|
setclrfld.quad 0x00 47. -0x1F8 47. -0x1F0 47. " DD47 ,Data Direction Port 0 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x1F8 46. -0x1F0 46. " DD46 ,Data Direction Port 0 Pin 46" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 45. -0x1F8 45. -0x1F0 45. " DD45 ,Data Direction Port 0 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x1F8 44. -0x1F0 44. " DD44 ,Data Direction Port 0 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x1F8 43. -0x1F0 43. " DD43 ,Data Direction Port 0 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x1F8 42. -0x1F0 42. " DD42 ,Data Direction Port 0 Pin 42" "Input,Output"
|
|
setclrfld.quad 0x00 41. -0x1F8 41. -0x1F0 41. " DD41 ,Data Direction Port 0 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x1F8 40. -0x1F0 40. " DD40 ,Data Direction Port 0 Pin 40" "Input,Output"
|
|
textline " "
|
|
sif cpu()!="MB9DF126"
|
|
sif cpu()!="MB9EF226"
|
|
sif cpu()!="MB9DF125"
|
|
setclrfld.quad 0x00 39. -0x1F8 39. -0x1F0 39. " DD39 ,Data Direction Port 0 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x1F8 38. -0x1F0 38. " DD38 ,Data Direction Port 0 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x1F8 37. -0x1F0 37. " DD37 ,Data Direction Port 0 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x1F8 36. -0x1F0 36. " DD36 ,Data Direction Port 0 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x1F8 35. -0x1F0 35. " DD35 ,Data Direction Port 0 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x1F8 34. -0x1F0 34. " DD34 ,Data Direction Port 0 Pin 34" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 33. -0x1F8 33. -0x1F0 33. " DD33 ,Data Direction Port 0 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x1F8 32. -0x1F0 32. " DD32 ,Data Direction Port 0 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x1F8 31. -0x1F0 31. " DD31 ,Data Direction Port 0 Pin 31" "Input,Output"
|
|
setclrfld.quad 0x00 30. -0x1F8 30. -0x1F0 30. " DD30 ,Data Direction Port 0 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x1F8 29. -0x1F0 29. " DD29 ,Data Direction Port 0 Pin 29" "Input,Output"
|
|
endif
|
|
setclrfld.quad 0x00 28. -0x1F8 28. -0x1F0 28. " DD28 ,Data Direction Port 0 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x1F8 27. -0x1F0 27. " DD27 ,Data Direction Port 0 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x1F8 26. -0x1F0 26. " DD26 ,Data Direction Port 0 Pin 26" "Input,Output"
|
|
endif
|
|
sif cpu()!="MB9DF125"
|
|
setclrfld.quad 0x00 25. -0x1F8 25. -0x1F0 25. " DD25 ,Data Direction Port 0 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x1F8 24. -0x1F0 24. " DD24 ,Data Direction Port 0 Pin 24" "Input,Output"
|
|
endif
|
|
sif cpu()!="MB9EF226"
|
|
sif cpu()!="MB9DF125"
|
|
setclrfld.quad 0x00 23. -0x1F8 23. -0x1F0 23. " DD23 ,Data Direction Port 0 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x1F8 22. -0x1F0 22. " DD22 ,Data Direction Port 0 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x1F8 21. -0x1F0 21. " DD21 ,Data Direction Port 0 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x1F8 20. -0x1F0 20. " DD20 ,Data Direction Port 0 Pin 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x1F8 19. -0x1F0 19. " DD19 ,Data Direction Port 0 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x1F8 18. -0x1F0 18. " DD18 ,Data Direction Port 0 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x1F8 17. -0x1F0 17. " DD17 ,Data Direction Port 0 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x1F8 16. -0x1F0 16. " DD16 ,Data Direction Port 0 Pin 16" "Input,Output"
|
|
endif
|
|
setclrfld.quad 0x00 15. -0x1F8 15. -0x1F0 15. " DD15 ,Data Direction Port 0 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x1F8 14. -0x1F0 14. " DD14 ,Data Direction Port 0 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x1F8 13. -0x1F0 13. " DD13 ,Data Direction Port 0 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x1F8 12. -0x1F0 12. " DD12 ,Data Direction Port 0 Pin 12" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 11. -0x1F8 11. -0x1F0 11. " DD11 ,Data Direction Port 0 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x1F8 10. -0x1F0 10. " DD10 ,Data Direction Port 0 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x1F8 9. -0x1F0 9. " DD9 ,Data Direction Port 0 Pin 9" "Input,Output"
|
|
setclrfld.quad 0x00 8. -0x1F8 8. -0x1F0 8. " DD8 ,Data Direction Port 0 Pin 8" "Input,Output"
|
|
sif cpu()!="MB9DF125"
|
|
setclrfld.quad 0x00 7. -0x1F8 7. -0x1F0 7. " DD7 ,Data Direction Port 0 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x1F8 6. -0x1F0 6. " DD6 ,Data Direction Port 0 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x1F8 5. -0x1F0 5. " DD5 ,Data Direction Port 0 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x1F8 4. -0x1F0 4. " DD4 ,Data Direction Port 0 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x1F8 3. -0x1F0 3. " DD3 ,Data Direction Port 0 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x1F8 2. -0x1F0 2. " DD2 ,Data Direction Port 0 Pin 2" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 1. -0x1F8 1. -0x1F0 1. " DD1 ,Data Direction Port 0 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x1F8 0. -0x1F0 0. " DD0 ,Data Direction Port 0 Pin 0" "Input,Output"
|
|
endif
|
|
endif
|
|
endif
|
|
group.quad 0x218++0x7
|
|
line.quad 0x00 "GPIO_DDR1,Data Direction Register for Channel 1"
|
|
sif cpu()!="MB9DF125"
|
|
sif cpu()!="MB9EF126"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.quad 0x00 63. -0x1E8 63. -0x1E0 63. " DD63 ,Data Direction Port 1 Pin 63" "Input,Output"
|
|
endif
|
|
setclrfld.quad 0x00 62. -0x1E8 62. -0x1E0 62. " DD62 ,Data Direction Port 1 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x1E8 61. -0x1E0 61. " DD61 ,Data Direction Port 1 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x1E8 60. -0x1E0 60. " DD60 ,Data Direction Port 1 Pin 60" "Input,Output"
|
|
endif
|
|
setclrfld.quad 0x00 59. -0x1E8 59. -0x1E0 59. " DD59 ,Data Direction Port 1 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x1E8 58. -0x1E0 58. " DD58 ,Data Direction Port 1 Pin 58" "Input,Output"
|
|
setclrfld.quad 0x00 57. -0x1E8 57. -0x1E0 57. " DD57 ,Data Direction Port 1 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x1E8 56. -0x1E0 56. " DD56 ,Data Direction Port 1 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x1E8 55. -0x1E0 55. " DD55 ,Data Direction Port 1 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x1E8 54. -0x1E0 54. " DD54 ,Data Direction Port 1 Pin 54" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 53. -0x1E8 53. -0x1E0 53. " DD53 ,Data Direction Port 1 Pin 53" "Input,Output"
|
|
setclrfld.quad 0x00 52. -0x1E8 52. -0x1E0 52. " DD52 ,Data Direction Port 1 Pin 52" "Input,Output"
|
|
setclrfld.quad 0x00 51. -0x1E8 51. -0x1E0 51. " DD51 ,Data Direction Port 1 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x1E8 50. -0x1E0 50. " DD50 ,Data Direction Port 1 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x1E8 49. -0x1E0 49. " DD49 ,Data Direction Port 1 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x1E8 48. -0x1E0 48. " DD48 ,Data Direction Port 1 Pin 48" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 47. -0x1E8 47. -0x1E0 47. " DD47 ,Data Direction Port 1 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x1E8 46. -0x1E0 46. " DD46 ,Data Direction Port 1 Pin 46" "Input,Output"
|
|
setclrfld.quad 0x00 45. -0x1E8 45. -0x1E0 45. " DD45 ,Data Direction Port 1 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x1E8 44. -0x1E0 44. " DD44 ,Data Direction Port 1 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x1E8 43. -0x1E0 43. " DD43 ,Data Direction Port 1 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x1E8 42. -0x1E0 42. " DD42 ,Data Direction Port 1 Pin 42" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x1E8 41. -0x1E0 41. " DD41 ,Data Direction Port 1 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x1E8 40. -0x1E0 40. " DD40 ,Data Direction Port 1 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x1E8 39. -0x1E0 39. " DD39 ,Data Direction Port 1 Pin 39" "Input,Output"
|
|
endif
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.quad 0x00 38. -0x1E8 38. -0x1E0 38. " DD38 ,Data Direction Port 1 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x1E8 37. -0x1E0 37. " DD37 ,Data Direction Port 1 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x1E8 36. -0x1E0 36. " DD36 ,Data Direction Port 1 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x1E8 35. -0x1E0 35. " DD35 ,Data Direction Port 1 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x1E8 34. -0x1E0 34. " DD34 ,Data Direction Port 1 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x1E8 33. -0x1E0 33. " DD33 ,Data Direction Port 1 Pin 33" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 32. -0x1E8 32. -0x1E0 32. " DD32 ,Data Direction Port 1 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x1E8 31. -0x1E0 31. " DD31 ,Data Direction Port 1 Pin 31" "Input,Output"
|
|
setclrfld.quad 0x00 30. -0x1E8 30. -0x1E0 30. " DD30 ,Data Direction Port 1 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x1E8 29. -0x1E0 29. " DD29 ,Data Direction Port 1 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x1E8 28. -0x1E0 28. " DD28 ,Data Direction Port 1 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x1E8 27. -0x1E0 27. " DD27 ,Data Direction Port 1 Pin 27" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 26. -0x1E8 26. -0x1E0 26. " DD26 ,Data Direction Port 1 Pin 26" "Input,Output"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.quad 0x00 25. -0x1E8 25. -0x1E0 25. " DD25 ,Data Direction Port 1 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x1E8 24. -0x1E0 24. " DD24 ,Data Direction Port 1 Pin 24" "Input,Output"
|
|
endif
|
|
setclrfld.quad 0x00 23. -0x1E8 23. -0x1E0 23. " DD23 ,Data Direction Port 1 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x1E8 22. -0x1E0 22. " DD22 ,Data Direction Port 1 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x1E8 21. -0x1E0 21. " DD21 ,Data Direction Port 1 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x1E8 20. -0x1E0 20. " DD20 ,Data Direction Port 1 Pin 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x1E8 19. -0x1E0 19. " DD19 ,Data Direction Port 1 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x1E8 18. -0x1E0 18. " DD18 ,Data Direction Port 1 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x1E8 17. -0x1E0 17. " DD17 ,Data Direction Port 1 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x1E8 16. -0x1E0 16. " DD16 ,Data Direction Port 1 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x1E8 15. -0x1E0 15. " DD15 ,Data Direction Port 1 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x1E8 14. -0x1E0 14. " DD14 ,Data Direction Port 1 Pin 14" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 13. -0x1E8 13. -0x1E0 13. " DD13 ,Data Direction Port 1 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x1E8 12. -0x1E0 12. " DD12 ,Data Direction Port 1 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x1E8 11. -0x1E0 11. " DD11 ,Data Direction Port 1 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x1E8 10. -0x1E0 10. " DD10 ,Data Direction Port 1 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x1E8 9. -0x1E0 9. " DD9 ,Data Direction Port 1 Pin 9" "Input,Output"
|
|
setclrfld.quad 0x00 8. -0x1E8 8. -0x1E0 8. " DD8 ,Data Direction Port 1 Pin 8" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 7. -0x1E8 7. -0x1E0 7. " DD7 ,Data Direction Port 1 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x1E8 6. -0x1E0 6. " DD6 ,Data Direction Port 1 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x1E8 5. -0x1E0 5. " DD5 ,Data Direction Port 1 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x1E8 4. -0x1E0 4. " DD4 ,Data Direction Port 1 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x1E8 3. -0x1E0 3. " DD3 ,Data Direction Port 1 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x1E8 2. -0x1E0 2. " DD2 ,Data Direction Port 1 Pin 2" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 1. -0x1E8 1. -0x1E0 1. " DD1 ,Data Direction Port 1 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x1E8 0. -0x1E0 0. " DD0 ,Data Direction Port 1 Pin 0" "Input,Output"
|
|
endif
|
|
group.quad 0x228++0x7
|
|
line.quad 0x00 "GPIO_DDR2,Data Direction Register for Channel 2"
|
|
sif cpu()!="MB9EF126"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.quad 0x00 63. -0x1D8 63. -0x1D0 63. " DD63 ,Data Direction Port 2 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x1D8 62. -0x1D0 62. " DD62 ,Data Direction Port 2 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x1D8 61. -0x1D0 61. " DD61 ,Data Direction Port 2 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x1D8 60. -0x1D0 60. " DD60 ,Data Direction Port 2 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x1D8 59. -0x1D0 59. " DD59 ,Data Direction Port 2 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x1D8 58. -0x1D0 58. " DD58 ,Data Direction Port 2 Pin 58" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 57. -0x1D8 57. -0x1D0 57. " DD57 ,Data Direction Port 2 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x1D8 56. -0x1D0 56. " DD56 ,Data Direction Port 2 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x1D8 55. -0x1D0 55. " DD55 ,Data Direction Port 2 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x1D8 54. -0x1D0 54. " DD54 ,Data Direction Port 2 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x1D8 53. -0x1D0 53. " DD53 ,Data Direction Port 2 Pin 53" "Input,Output"
|
|
setclrfld.quad 0x00 52. -0x1D8 52. -0x1D0 52. " DD52 ,Data Direction Port 2 Pin 52" "Input,Output"
|
|
textline " "
|
|
endif
|
|
setclrfld.quad 0x00 51. -0x1D8 51. -0x1D0 51. " DD51 ,Data Direction Port 2 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x1D8 50. -0x1D0 50. " DD50 ,Data Direction Port 2 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x1D8 49. -0x1D0 49. " DD49 ,Data Direction Port 2 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x1D8 48. -0x1D0 48. " DD48 ,Data Direction Port 2 Pin 48" "Input,Output"
|
|
textline " "
|
|
endif
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.quad 0x00 47. -0x1D8 47. -0x1D0 47. " DD47 ,Data Direction Port 2 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x1D8 46. -0x1D0 46. " DD46 ,Data Direction Port 2 Pin 46" "Input,Output"
|
|
setclrfld.quad 0x00 45. -0x1D8 45. -0x1D0 45. " DD45 ,Data Direction Port 2 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x1D8 44. -0x1D0 44. " DD44 ,Data Direction Port 2 Pin 44" "Input,Output"
|
|
textline " "
|
|
endif
|
|
setclrfld.quad 0x00 43. -0x1D8 43. -0x1D0 43. " DD43 ,Data Direction Port 2 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x1D8 42. -0x1D0 42. " DD42 ,Data Direction Port 2 Pin 42" "Input,Output"
|
|
setclrfld.quad 0x00 41. -0x1D8 41. -0x1D0 41. " DD41 ,Data Direction Port 2 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x1D8 40. -0x1D0 40. " DD40 ,Data Direction Port 2 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x1D8 39. -0x1D0 39. " DD39 ,Data Direction Port 2 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x1D8 38. -0x1D0 38. " DD38 ,Data Direction Port 2 Pin 38" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 37. -0x1D8 37. -0x1D0 37. " DD37 ,Data Direction Port 2 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x1D8 36. -0x1D0 36. " DD36 ,Data Direction Port 2 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x1D8 35. -0x1D0 35. " DD35 ,Data Direction Port 2 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x1D8 34. -0x1D0 34. " DD34 ,Data Direction Port 2 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x1D8 33. -0x1D0 33. " DD33 ,Data Direction Port 2 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x1D8 32. -0x1D0 32. " DD32 ,Data Direction Port 2 Pin 32" "Input,Output"
|
|
textline " "
|
|
sif cpu()!="MB9DF125"
|
|
sif cpu()!="MB9DF126"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.quad 0x00 31. -0x1D8 31. -0x1D0 31. " DD31 ,Data Direction Port 2 Pin 31" "Input,Output"
|
|
setclrfld.quad 0x00 30. -0x1D8 30. -0x1D0 30. " DD30 ,Data Direction Port 2 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x1D8 29. -0x1D0 29. " DD29 ,Data Direction Port 2 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x1D8 28. -0x1D0 28. " DD28 ,Data Direction Port 2 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x1D8 27. -0x1D0 27. " DD27 ,Data Direction Port 2 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x1D8 26. -0x1D0 26. " DD26 ,Data Direction Port 2 Pin 26" "Input,Output"
|
|
textline " "
|
|
endif
|
|
endif
|
|
setclrfld.quad 0x00 25. -0x1D8 25. -0x1D0 25. " DD25 ,Data Direction Port 2 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x1D8 24. -0x1D0 24. " DD24 ,Data Direction Port 2 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x1D8 23. -0x1D0 23. " DD23 ,Data Direction Port 2 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x1D8 22. -0x1D0 22. " DD22 ,Data Direction Port 2 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x1D8 21. -0x1D0 21. " DD21 ,Data Direction Port 2 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x1D8 20. -0x1D0 20. " DD20 ,Data Direction Port 2 Pin 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x1D8 19. -0x1D0 19. " DD19 ,Data Direction Port 2 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x1D8 18. -0x1D0 18. " DD18 ,Data Direction Port 2 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x1D8 17. -0x1D0 17. " DD17 ,Data Direction Port 2 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x1D8 16. -0x1D0 16. " DD16 ,Data Direction Port 2 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x1D8 15. -0x1D0 15. " DD15 ,Data Direction Port 2 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x1D8 14. -0x1D0 14. " DD14 ,Data Direction Port 2 Pin 14" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 13. -0x1D8 13. -0x1D0 13. " DD13 ,Data Direction Port 2 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x1D8 12. -0x1D0 12. " DD12 ,Data Direction Port 2 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x1D8 11. -0x1D0 11. " DD11 ,Data Direction Port 2 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x1D8 10. -0x1D0 10. " DD10 ,Data Direction Port 2 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x1D8 9. -0x1D0 9. " DD9 ,Data Direction Port 2 Pin 9" "Input,Output"
|
|
setclrfld.quad 0x00 8. -0x1D8 8. -0x1D0 8. " DD8 ,Data Direction Port 2 Pin 8" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 7. -0x1D8 7. -0x1D0 7. " DD7 ,Data Direction Port 2 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x1D8 6. -0x1D0 6. " DD6 ,Data Direction Port 2 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x1D8 5. -0x1D0 5. " DD5 ,Data Direction Port 2 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x1D8 4. -0x1D0 4. " DD4 ,Data Direction Port 2 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x1D8 3. -0x1D0 3. " DD3 ,Data Direction Port 2 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x1D8 2. -0x1D0 2. " DD2 ,Data Direction Port 2 Pin 2" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 1. -0x1D8 1. -0x1D0 1. " DD1 ,Data Direction Port 2 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x1D8 0. -0x1D0 0. " DD0 ,Data Direction Port 2 Pin 0" "Input,Output"
|
|
endif
|
|
endif
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126")
|
|
group.quad 0x238++0x7
|
|
line.quad 0x00 "GPIO_DDR3,Data Direction Register for Channel 3"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.quad 0x00 63. -0x1C8 63. -0x1C0 63. " DD63 ,Data Direction Port 3 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x1C8 62. -0x1C0 62. " DD62 ,Data Direction Port 3 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x1C8 61. -0x1C0 61. " DD61 ,Data Direction Port 3 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x1C8 60. -0x1C0 60. " DD60 ,Data Direction Port 3 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x1C8 59. -0x1C0 59. " DD59 ,Data Direction Port 3 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x1C8 58. -0x1C0 58. " DD58 ,Data Direction Port 3 Pin 58" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 57. -0x1C8 57. -0x1C0 57. " DD57 ,Data Direction Port 3 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x1C8 56. -0x1C0 56. " DD56 ,Data Direction Port 3 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x1C8 55. -0x1C0 55. " DD55 ,Data Direction Port 3 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x1C8 54. -0x1C0 54. " DD54 ,Data Direction Port 3 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x1C8 53. -0x1C0 53. " DD53 ,Data Direction Port 3 Pin 53" "Input,Output"
|
|
setclrfld.quad 0x00 52. -0x1C8 52. -0x1C0 52. " DD52 ,Data Direction Port 3 Pin 52" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 51. -0x1C8 51. -0x1C0 51. " DD51 ,Data Direction Port 3 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x1C8 50. -0x1C0 50. " DD50 ,Data Direction Port 3 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x1C8 49. -0x1C0 49. " DD49 ,Data Direction Port 3 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x1C8 48. -0x1C0 48. " DD48 ,Data Direction Port 3 Pin 48" "Input,Output"
|
|
setclrfld.quad 0x00 47. -0x1C8 47. -0x1C0 47. " DD47 ,Data Direction Port 3 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x1C8 46. -0x1C0 46. " DD46 ,Data Direction Port 3 Pin 46" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 45. -0x1C8 45. -0x1C0 45. " DD45 ,Data Direction Port 3 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x1C8 44. -0x1C0 44. " DD44 ,Data Direction Port 3 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x1C8 43. -0x1C0 43. " DD43 ,Data Direction Port 3 Pin 43" "Input,Output"
|
|
endif
|
|
setclrfld.quad 0x00 42. -0x1C8 42. -0x1C0 42. " DD42 ,Data Direction Port 3 Pin 42" "Input,Output"
|
|
setclrfld.quad 0x00 41. -0x1C8 41. -0x1C0 41. " DD41 ,Data Direction Port 3 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x1C8 40. -0x1C0 40. " DD40 ,Data Direction Port 3 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x1C8 39. -0x1C0 39. " DD39 ,Data Direction Port 3 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x1C8 38. -0x1C0 38. " DD38 ,Data Direction Port 3 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x1C8 37. -0x1C0 37. " DD37 ,Data Direction Port 3 Pin 37" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 36. -0x1C8 36. -0x1C0 36. " DD36 ,Data Direction Port 3 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x1C8 35. -0x1C0 35. " DD35 ,Data Direction Port 3 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x1C8 34. -0x1C0 34. " DD34 ,Data Direction Port 3 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x1C8 33. -0x1C0 33. " DD33 ,Data Direction Port 3 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x1C8 32. -0x1C0 32. " DD32 ,Data Direction Port 3 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x1C8 31. -0x1C0 31. " DD31 ,Data Direction Port 3 Pin 31" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x1C8 30. -0x1C0 30. " DD30 ,Data Direction Port 3 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x1C8 29. -0x1C0 29. " DD29 ,Data Direction Port 3 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x1C8 28. -0x1C0 28. " DD28 ,Data Direction Port 3 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x1C8 27. -0x1C0 27. " DD27 ,Data Direction Port 3 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x1C8 26. -0x1C0 26. " DD26 ,Data Direction Port 3 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x1C8 25. -0x1C0 25. " DD25 ,Data Direction Port 3 Pin 25" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 24. -0x1C8 24. -0x1C0 24. " DD24 ,Data Direction Port 3 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x1C8 23. -0x1C0 23. " DD23 ,Data Direction Port 3 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x1C8 22. -0x1C0 22. " DD22 ,Data Direction Port 3 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x1C8 21. -0x1C0 21. " DD21 ,Data Direction Port 3 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x1C8 20. -0x1C0 20. " DD20 ,Data Direction Port 3 Pin 20" "Input,Output"
|
|
setclrfld.quad 0x00 19. -0x1C8 19. -0x1C0 19. " DD19 ,Data Direction Port 3 Pin 19" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 18. -0x1C8 18. -0x1C0 18. " DD18 ,Data Direction Port 3 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x1C8 17. -0x1C0 17. " DD17 ,Data Direction Port 3 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x1C8 16. -0x1C0 16. " DD16 ,Data Direction Port 3 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x1C8 15. -0x1C0 15. " DD15 ,Data Direction Port 3 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x1C8 14. -0x1C0 14. " DD14 ,Data Direction Port 3 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x1C8 13. -0x1C0 13. " DD13 ,Data Direction Port 3 Pin 13" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 12. -0x1C8 12. -0x1C0 12. " DD12 ,Data Direction Port 3 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x1C8 11. -0x1C0 11. " DD11 ,Data Direction Port 3 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x1C8 10. -0x1C0 10. " DD10 ,Data Direction Port 3 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x1C8 9. -0x1C0 9. " DD9 ,Data Direction Port 3 Pin 9" "Input,Output"
|
|
setclrfld.quad 0x00 8. -0x1C8 8. -0x1C0 8. " DD8 ,Data Direction Port 3 Pin 8" "Input,Output"
|
|
setclrfld.quad 0x00 7. -0x1C8 7. -0x1C0 7. " DD7 ,Data Direction Port 3 Pin 7" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 6. -0x1C8 6. -0x1C0 6. " DD6 ,Data Direction Port 3 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x1C8 5. -0x1C0 5. " DD5 ,Data Direction Port 3 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x1C8 4. -0x1C0 4. " DD4 ,Data Direction Port 3 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x1C8 3. -0x1C0 3. " DD3 ,Data Direction Port 3 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x1C8 2. -0x1C0 2. " DD2 ,Data Direction Port 3 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x1C8 1. -0x1C0 1. " DD1 ,Data Direction Port 3 Pin 1" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 0. -0x1C8 0. -0x1C0 0. " DD0 ,Data Direction Port 3 Pin 0" "Input,Output"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
group.quad 0x248++0x7
|
|
line.quad 0x00 "GPIO_DDR4,Data Direction Register for Channel 4"
|
|
setclrfld.quad 0x00 63. -0x1B8 63. -0x1B0 63. " DD63 ,Data Direction Port 4 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x1B8 62. -0x1B0 62. " DD62 ,Data Direction Port 4 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x1B8 61. -0x1B0 61. " DD61 ,Data Direction Port 4 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x1B8 60. -0x1B0 60. " DD60 ,Data Direction Port 4 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x1B8 59. -0x1B0 59. " DD59 ,Data Direction Port 4 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x1B8 58. -0x1B0 58. " DD58 ,Data Direction Port 4 Pin 58" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 57. -0x1B8 57. -0x1B0 57. " DD57 ,Data Direction Port 4 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x1B8 56. -0x1B0 56. " DD56 ,Data Direction Port 4 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x1B8 55. -0x1B0 55. " DD55 ,Data Direction Port 4 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x1B8 54. -0x1B0 54. " DD54 ,Data Direction Port 4 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x1B8 53. -0x1B0 53. " DD53 ,Data Direction Port 4 Pin 53" "Input,Output"
|
|
setclrfld.quad 0x00 52. -0x1B8 52. -0x1B0 52. " DD52 ,Data Direction Port 4 Pin 52" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 51. -0x1B8 51. -0x1B0 51. " DD51 ,Data Direction Port 4 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x1B8 50. -0x1B0 50. " DD50 ,Data Direction Port 4 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x1B8 49. -0x1B0 49. " DD49 ,Data Direction Port 4 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x1B8 48. -0x1B0 48. " DD48 ,Data Direction Port 4 Pin 48" "Input,Output"
|
|
setclrfld.quad 0x00 47. -0x1B8 47. -0x1B0 47. " DD47 ,Data Direction Port 4 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x1B8 46. -0x1B0 46. " DD46 ,Data Direction Port 4 Pin 46" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 45. -0x1B8 45. -0x1B0 45. " DD45 ,Data Direction Port 4 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x1B8 44. -0x1B0 44. " DD44 ,Data Direction Port 4 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x1B8 43. -0x1B0 43. " DD43 ,Data Direction Port 4 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x1B8 42. -0x1B0 42. " DD42 ,Data Direction Port 4 Pin 42" "Input,Output"
|
|
setclrfld.quad 0x00 41. -0x1B8 41. -0x1B0 41. " DD41 ,Data Direction Port 4 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x1B8 40. -0x1B0 40. " DD40 ,Data Direction Port 4 Pin 40" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 39. -0x1B8 39. -0x1B0 39. " DD39 ,Data Direction Port 4 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x1B8 38. -0x1B0 38. " DD38 ,Data Direction Port 4 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x1B8 37. -0x1B0 37. " DD37 ,Data Direction Port 4 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x1B8 36. -0x1B0 36. " DD36 ,Data Direction Port 4 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x1B8 35. -0x1B0 35. " DD35 ,Data Direction Port 4 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x1B8 34. -0x1B0 34. " DD34 ,Data Direction Port 4 Pin 34" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 33. -0x1B8 33. -0x1B0 33. " DD33 ,Data Direction Port 4 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x1B8 32. -0x1B0 32. " DD32 ,Data Direction Port 4 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x1B8 31. -0x1B0 31. " DD31 ,Data Direction Port 4 Pin 31" "Input,Output"
|
|
setclrfld.quad 0x00 30. -0x1B8 30. -0x1B0 30. " DD30 ,Data Direction Port 4 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x1B8 29. -0x1B0 29. " DD29 ,Data Direction Port 4 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x1B8 28. -0x1B0 28. " DD28 ,Data Direction Port 4 Pin 28" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 27. -0x1B8 27. -0x1B0 27. " DD27 ,Data Direction Port 4 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x1B8 26. -0x1B0 26. " DD26 ,Data Direction Port 4 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x1B8 25. -0x1B0 25. " DD25 ,Data Direction Port 4 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x1B8 24. -0x1B0 24. " DD24 ,Data Direction Port 4 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x1B8 23. -0x1B0 23. " DD23 ,Data Direction Port 4 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x1B8 22. -0x1B0 22. " DD22 ,Data Direction Port 4 Pin 22" "Input,Output"
|
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textline " "
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setclrfld.quad 0x00 21. -0x1B8 21. -0x1B0 21. " DD21 ,Data Direction Port 4 Pin 21" "Input,Output"
|
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setclrfld.quad 0x00 20. -0x1B8 20. -0x1B0 20. " DD20 ,Data Direction Port 4 Pin 20" "Input,Output"
|
|
setclrfld.quad 0x00 19. -0x1B8 19. -0x1B0 19. " DD19 ,Data Direction Port 4 Pin 19" "Input,Output"
|
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setclrfld.quad 0x00 18. -0x1B8 18. -0x1B0 18. " DD18 ,Data Direction Port 4 Pin 18" "Input,Output"
|
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setclrfld.quad 0x00 17. -0x1B8 17. -0x1B0 17. " DD17 ,Data Direction Port 4 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x1B8 16. -0x1B0 16. " DD16 ,Data Direction Port 4 Pin 16" "Input,Output"
|
|
textline " "
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setclrfld.quad 0x00 15. -0x1B8 15. -0x1B0 15. " DD15 ,Data Direction Port 4 Pin 15" "Input,Output"
|
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setclrfld.quad 0x00 14. -0x1B8 14. -0x1B0 14. " DD14 ,Data Direction Port 4 Pin 14" "Input,Output"
|
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setclrfld.quad 0x00 13. -0x1B8 13. -0x1B0 13. " DD13 ,Data Direction Port 4 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x1B8 12. -0x1B0 12. " DD12 ,Data Direction Port 4 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x1B8 11. -0x1B0 11. " DD11 ,Data Direction Port 4 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x1B8 10. -0x1B0 10. " DD10 ,Data Direction Port 4 Pin 10" "Input,Output"
|
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textline " "
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setclrfld.quad 0x00 9. -0x1B8 9. -0x1B0 9. " DD9 ,Data Direction Port 4 Pin 9" "Input,Output"
|
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setclrfld.quad 0x00 8. -0x1B8 8. -0x1B0 8. " DD8 ,Data Direction Port 4 Pin 8" "Input,Output"
|
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setclrfld.quad 0x00 7. -0x1B8 7. -0x1B0 7. " DD7 ,Data Direction Port 4 Pin 7" "Input,Output"
|
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setclrfld.quad 0x00 6. -0x1B8 6. -0x1B0 6. " DD6 ,Data Direction Port 4 Pin 6" "Input,Output"
|
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setclrfld.quad 0x00 5. -0x1B8 5. -0x1B0 5. " DD5 ,Data Direction Port 4 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x1B8 4. -0x1B0 4. " DD4 ,Data Direction Port 4 Pin 4" "Input,Output"
|
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textline " "
|
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setclrfld.quad 0x00 3. -0x1B8 3. -0x1B0 3. " DD3 ,Data Direction Port 4 Pin 3" "Input,Output"
|
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setclrfld.quad 0x00 2. -0x1B8 2. -0x1B0 2. " DD2 ,Data Direction Port 4 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x1B8 1. -0x1B0 1. " DD1 ,Data Direction Port 4 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x1B8 0. -0x1B0 0. " DD0 ,Data Direction Port 4 Pin 0" "Input,Output"
|
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group.quad 0x258++0x7
|
|
line.quad 0x00 "GPIO_DDR5,Data Direction Register for Channel 5"
|
|
setclrfld.quad 0x00 63. -0x1A8 63. -0x1A0 63. " DD63 ,Data Direction Port 5 Pin 63" "Input,Output"
|
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setclrfld.quad 0x00 62. -0x1A8 62. -0x1A0 62. " DD62 ,Data Direction Port 5 Pin 62" "Input,Output"
|
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setclrfld.quad 0x00 61. -0x1A8 61. -0x1A0 61. " DD61 ,Data Direction Port 5 Pin 61" "Input,Output"
|
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setclrfld.quad 0x00 60. -0x1A8 60. -0x1A0 60. " DD60 ,Data Direction Port 5 Pin 60" "Input,Output"
|
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setclrfld.quad 0x00 59. -0x1A8 59. -0x1A0 59. " DD59 ,Data Direction Port 5 Pin 59" "Input,Output"
|
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setclrfld.quad 0x00 58. -0x1A8 58. -0x1A0 58. " DD58 ,Data Direction Port 5 Pin 58" "Input,Output"
|
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setclrfld.quad 0x00 57. -0x1A8 57. -0x1A0 57. " DD57 ,Data Direction Port 5 Pin 57" "Input,Output"
|
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setclrfld.quad 0x00 56. -0x1A8 56. -0x1A0 56. " DD56 ,Data Direction Port 5 Pin 56" "Input,Output"
|
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setclrfld.quad 0x00 55. -0x1A8 55. -0x1A0 55. " DD55 ,Data Direction Port 5 Pin 55" "Input,Output"
|
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setclrfld.quad 0x00 54. -0x1A8 54. -0x1A0 54. " DD54 ,Data Direction Port 5 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x1A8 53. -0x1A0 53. " DD53 ,Data Direction Port 5 Pin 53" "Input,Output"
|
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textline " "
|
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setclrfld.quad 0x00 52. -0x1A8 52. -0x1A0 52. " DD52 ,Data Direction Port 5 Pin 52" "Input,Output"
|
|
setclrfld.quad 0x00 51. -0x1A8 51. -0x1A0 51. " DD51 ,Data Direction Port 5 Pin 51" "Input,Output"
|
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setclrfld.quad 0x00 50. -0x1A8 50. -0x1A0 50. " DD50 ,Data Direction Port 5 Pin 50" "Input,Output"
|
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setclrfld.quad 0x00 49. -0x1A8 49. -0x1A0 49. " DD49 ,Data Direction Port 5 Pin 49" "Input,Output"
|
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setclrfld.quad 0x00 48. -0x1A8 48. -0x1A0 48. " DD48 ,Data Direction Port 5 Pin 48" "Input,Output"
|
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setclrfld.quad 0x00 47. -0x1A8 47. -0x1A0 47. " DD47 ,Data Direction Port 5 Pin 47" "Input,Output"
|
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setclrfld.quad 0x00 46. -0x1A8 46. -0x1A0 46. " DD46 ,Data Direction Port 5 Pin 46" "Input,Output"
|
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setclrfld.quad 0x00 45. -0x1A8 45. -0x1A0 45. " DD45 ,Data Direction Port 5 Pin 45" "Input,Output"
|
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setclrfld.quad 0x00 44. -0x1A8 44. -0x1A0 44. " DD44 ,Data Direction Port 5 Pin 44" "Input,Output"
|
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setclrfld.quad 0x00 43. -0x1A8 43. -0x1A0 43. " DD43 ,Data Direction Port 5 Pin 43" "Input,Output"
|
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setclrfld.quad 0x00 42. -0x1A8 42. -0x1A0 42. " DD42 ,Data Direction Port 5 Pin 42" "Input,Output"
|
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textline " "
|
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setclrfld.quad 0x00 41. -0x1A8 41. -0x1A0 41. " DD41 ,Data Direction Port 5 Pin 41" "Input,Output"
|
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setclrfld.quad 0x00 40. -0x1A8 40. -0x1A0 40. " DD40 ,Data Direction Port 5 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x1A8 39. -0x1A0 39. " DD39 ,Data Direction Port 5 Pin 39" "Input,Output"
|
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setclrfld.quad 0x00 38. -0x1A8 38. -0x1A0 38. " DD38 ,Data Direction Port 5 Pin 38" "Input,Output"
|
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setclrfld.quad 0x00 37. -0x1A8 37. -0x1A0 37. " DD37 ,Data Direction Port 5 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x1A8 36. -0x1A0 36. " DD36 ,Data Direction Port 5 Pin 36" "Input,Output"
|
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setclrfld.quad 0x00 35. -0x1A8 35. -0x1A0 35. " DD35 ,Data Direction Port 5 Pin 35" "Input,Output"
|
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setclrfld.quad 0x00 34. -0x1A8 34. -0x1A0 34. " DD34 ,Data Direction Port 5 Pin 34" "Input,Output"
|
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setclrfld.quad 0x00 33. -0x1A8 33. -0x1A0 33. " DD33 ,Data Direction Port 5 Pin 33" "Input,Output"
|
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setclrfld.quad 0x00 32. -0x1A8 32. -0x1A0 32. " DD32 ,Data Direction Port 5 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x1A8 31. -0x1A0 31. " DD31 ,Data Direction Port 5 Pin 31" "Input,Output"
|
|
textline " "
|
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setclrfld.quad 0x00 30. -0x1A8 30. -0x1A0 30. " DD30 ,Data Direction Port 5 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x1A8 29. -0x1A0 29. " DD29 ,Data Direction Port 5 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x1A8 28. -0x1A0 28. " DD28 ,Data Direction Port 5 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x1A8 27. -0x1A0 27. " DD27 ,Data Direction Port 5 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x1A8 26. -0x1A0 26. " DD26 ,Data Direction Port 5 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x1A8 25. -0x1A0 25. " DD25 ,Data Direction Port 5 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x1A8 24. -0x1A0 24. " DD24 ,Data Direction Port 5 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x1A8 23. -0x1A0 23. " DD23 ,Data Direction Port 5 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x1A8 22. -0x1A0 22. " DD22 ,Data Direction Port 5 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x1A8 21. -0x1A0 21. " DD21 ,Data Direction Port 5 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x1A8 20. -0x1A0 20. " DD20 ,Data Direction Port 5 Pin 20" "Input,Output"
|
|
textline " "
|
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setclrfld.quad 0x00 19. -0x1A8 19. -0x1A0 19. " DD19 ,Data Direction Port 5 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x1A8 18. -0x1A0 18. " DD18 ,Data Direction Port 5 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x1A8 17. -0x1A0 17. " DD17 ,Data Direction Port 5 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x1A8 16. -0x1A0 16. " DD16 ,Data Direction Port 5 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x1A8 15. -0x1A0 15. " DD15 ,Data Direction Port 5 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x1A8 14. -0x1A0 14. " DD14 ,Data Direction Port 5 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x1A8 13. -0x1A0 13. " DD13 ,Data Direction Port 5 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x1A8 12. -0x1A0 12. " DD12 ,Data Direction Port 5 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x1A8 11. -0x1A0 11. " DD11 ,Data Direction Port 5 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x1A8 10. -0x1A0 10. " DD10 ,Data Direction Port 5 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x1A8 9. -0x1A0 9. " DD9 ,Data Direction Port 5 Pin 9" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x1A8 8. -0x1A0 8. " DD8 ,Data Direction Port 5 Pin 8" "Input,Output"
|
|
setclrfld.quad 0x00 7. -0x1A8 7. -0x1A0 7. " DD7 ,Data Direction Port 5 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x1A8 6. -0x1A0 6. " DD6 ,Data Direction Port 5 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x1A8 5. -0x1A0 5. " DD5 ,Data Direction Port 5 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x1A8 4. -0x1A0 4. " DD4 ,Data Direction Port 5 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x1A8 3. -0x1A0 3. " DD3 ,Data Direction Port 5 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x1A8 2. -0x1A0 2. " DD2 ,Data Direction Port 5 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x1A8 1. -0x1A0 1. " DD1 ,Data Direction Port 5 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x1A8 0. -0x1A0 0. " DD0 ,Data Direction Port 5 Pin 0" "Input,Output"
|
|
group.quad 0x268++0x7
|
|
line.quad 0x00 "GPIO_DDR6,Data Direction Register for Channel 6"
|
|
setclrfld.quad 0x00 63. -0x198 63. -0x190 63. " DD63 ,Data Direction Port 6 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x198 62. -0x190 62. " DD62 ,Data Direction Port 6 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x198 61. -0x190 61. " DD61 ,Data Direction Port 6 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x198 60. -0x190 60. " DD60 ,Data Direction Port 6 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x198 59. -0x190 59. " DD59 ,Data Direction Port 6 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x198 58. -0x190 58. " DD58 ,Data Direction Port 6 Pin 58" "Input,Output"
|
|
setclrfld.quad 0x00 57. -0x198 57. -0x190 57. " DD57 ,Data Direction Port 6 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x198 56. -0x190 56. " DD56 ,Data Direction Port 6 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x198 55. -0x190 55. " DD55 ,Data Direction Port 6 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x198 54. -0x190 54. " DD54 ,Data Direction Port 6 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x198 53. -0x190 53. " DD53 ,Data Direction Port 6 Pin 53" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x198 52. -0x190 52. " DD52 ,Data Direction Port 6 Pin 52" "Input,Output"
|
|
setclrfld.quad 0x00 51. -0x198 51. -0x190 51. " DD51 ,Data Direction Port 6 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x198 50. -0x190 50. " DD50 ,Data Direction Port 6 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x198 49. -0x190 49. " DD49 ,Data Direction Port 6 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x198 48. -0x190 48. " DD48 ,Data Direction Port 6 Pin 48" "Input,Output"
|
|
setclrfld.quad 0x00 47. -0x198 47. -0x190 47. " DD47 ,Data Direction Port 6 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x198 46. -0x190 46. " DD46 ,Data Direction Port 6 Pin 46" "Input,Output"
|
|
setclrfld.quad 0x00 45. -0x198 45. -0x190 45. " DD45 ,Data Direction Port 6 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x198 44. -0x190 44. " DD44 ,Data Direction Port 6 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x198 43. -0x190 43. " DD43 ,Data Direction Port 6 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x198 42. -0x190 42. " DD42 ,Data Direction Port 6 Pin 42" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x198 41. -0x190 41. " DD41 ,Data Direction Port 6 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x198 40. -0x190 40. " DD40 ,Data Direction Port 6 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x198 39. -0x190 39. " DD39 ,Data Direction Port 6 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x198 38. -0x190 38. " DD38 ,Data Direction Port 6 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x198 37. -0x190 37. " DD37 ,Data Direction Port 6 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x198 36. -0x190 36. " DD36 ,Data Direction Port 6 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x198 35. -0x190 35. " DD35 ,Data Direction Port 6 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x198 34. -0x190 34. " DD34 ,Data Direction Port 6 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x198 33. -0x190 33. " DD33 ,Data Direction Port 6 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x198 32. -0x190 32. " DD32 ,Data Direction Port 6 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x198 31. -0x190 31. " DD31 ,Data Direction Port 6 Pin 31" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x198 30. -0x190 30. " DD30 ,Data Direction Port 6 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x198 29. -0x190 29. " DD29 ,Data Direction Port 6 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x198 28. -0x190 28. " DD28 ,Data Direction Port 6 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x198 27. -0x190 27. " DD27 ,Data Direction Port 6 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x198 26. -0x190 26. " DD26 ,Data Direction Port 6 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x198 25. -0x190 25. " DD25 ,Data Direction Port 6 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x198 24. -0x190 24. " DD24 ,Data Direction Port 6 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x198 23. -0x190 23. " DD23 ,Data Direction Port 6 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x198 22. -0x190 22. " DD22 ,Data Direction Port 6 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x198 21. -0x190 21. " DD21 ,Data Direction Port 6 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x198 20. -0x190 20. " DD20 ,Data Direction Port 6 Pin 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x198 19. -0x190 19. " DD19 ,Data Direction Port 6 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x198 18. -0x190 18. " DD18 ,Data Direction Port 6 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x198 17. -0x190 17. " DD17 ,Data Direction Port 6 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x198 16. -0x190 16. " DD16 ,Data Direction Port 6 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x198 15. -0x190 15. " DD15 ,Data Direction Port 6 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x198 14. -0x190 14. " DD14 ,Data Direction Port 6 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x198 13. -0x190 13. " DD13 ,Data Direction Port 6 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x198 12. -0x190 12. " DD12 ,Data Direction Port 6 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x198 11. -0x190 11. " DD11 ,Data Direction Port 6 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x198 10. -0x190 10. " DD10 ,Data Direction Port 6 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x198 9. -0x190 9. " DD9 ,Data Direction Port 6 Pin 9" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x198 8. -0x190 8. " DD8 ,Data Direction Port 6 Pin 8" "Input,Output"
|
|
setclrfld.quad 0x00 7. -0x198 7. -0x190 7. " DD7 ,Data Direction Port 6 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x198 6. -0x190 6. " DD6 ,Data Direction Port 6 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x198 5. -0x190 5. " DD5 ,Data Direction Port 6 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x198 4. -0x190 4. " DD4 ,Data Direction Port 6 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x198 3. -0x190 3. " DD3 ,Data Direction Port 6 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x198 2. -0x190 2. " DD2 ,Data Direction Port 6 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x198 1. -0x190 1. " DD1 ,Data Direction Port 6 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x198 0. -0x190 0. " DD0 ,Data Direction Port 6 Pin 0" "Input,Output"
|
|
group.quad 0x278++0x7
|
|
line.quad 0x00 "GPIO_DDR7,Data Direction Register for Channel 7"
|
|
setclrfld.quad 0x00 63. -0x188 63. -0x180 63. " DD63 ,Data Direction Port 7 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x188 62. -0x180 62. " DD62 ,Data Direction Port 7 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x188 61. -0x180 61. " DD61 ,Data Direction Port 7 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x188 60. -0x180 60. " DD60 ,Data Direction Port 7 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x188 59. -0x180 59. " DD59 ,Data Direction Port 7 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x188 58. -0x180 58. " DD58 ,Data Direction Port 7 Pin 58" "Input,Output"
|
|
setclrfld.quad 0x00 57. -0x188 57. -0x180 57. " DD57 ,Data Direction Port 7 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x188 56. -0x180 56. " DD56 ,Data Direction Port 7 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x188 55. -0x180 55. " DD55 ,Data Direction Port 7 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x188 54. -0x180 54. " DD54 ,Data Direction Port 7 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x188 53. -0x180 53. " DD53 ,Data Direction Port 7 Pin 53" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x188 52. -0x180 52. " DD52 ,Data Direction Port 7 Pin 52" "Input,Output"
|
|
setclrfld.quad 0x00 51. -0x188 51. -0x180 51. " DD51 ,Data Direction Port 7 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x188 50. -0x180 50. " DD50 ,Data Direction Port 7 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x188 49. -0x180 49. " DD49 ,Data Direction Port 7 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x188 48. -0x180 48. " DD48 ,Data Direction Port 7 Pin 48" "Input,Output"
|
|
setclrfld.quad 0x00 47. -0x188 47. -0x180 47. " DD47 ,Data Direction Port 7 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x188 46. -0x180 46. " DD46 ,Data Direction Port 7 Pin 46" "Input,Output"
|
|
setclrfld.quad 0x00 45. -0x188 45. -0x180 45. " DD45 ,Data Direction Port 7 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x188 44. -0x180 44. " DD44 ,Data Direction Port 7 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x188 43. -0x180 43. " DD43 ,Data Direction Port 7 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x188 42. -0x180 42. " DD42 ,Data Direction Port 7 Pin 42" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x188 41. -0x180 41. " DD41 ,Data Direction Port 7 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x188 40. -0x180 40. " DD40 ,Data Direction Port 7 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x188 39. -0x180 39. " DD39 ,Data Direction Port 7 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x188 38. -0x180 38. " DD38 ,Data Direction Port 7 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x188 37. -0x180 37. " DD37 ,Data Direction Port 7 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x188 36. -0x180 36. " DD36 ,Data Direction Port 7 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x188 35. -0x180 35. " DD35 ,Data Direction Port 7 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x188 34. -0x180 34. " DD34 ,Data Direction Port 7 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x188 33. -0x180 33. " DD33 ,Data Direction Port 7 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x188 32. -0x180 32. " DD32 ,Data Direction Port 7 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x188 31. -0x180 31. " DD31 ,Data Direction Port 7 Pin 31" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x188 30. -0x180 30. " DD30 ,Data Direction Port 7 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x188 29. -0x180 29. " DD29 ,Data Direction Port 7 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x188 28. -0x180 28. " DD28 ,Data Direction Port 7 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x188 27. -0x180 27. " DD27 ,Data Direction Port 7 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x188 26. -0x180 26. " DD26 ,Data Direction Port 7 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x188 25. -0x180 25. " DD25 ,Data Direction Port 7 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x188 24. -0x180 24. " DD24 ,Data Direction Port 7 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x188 23. -0x180 23. " DD23 ,Data Direction Port 7 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x188 22. -0x180 22. " DD22 ,Data Direction Port 7 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x188 21. -0x180 21. " DD21 ,Data Direction Port 7 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x188 20. -0x180 20. " DD20 ,Data Direction Port 7 Pin 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x188 19. -0x180 19. " DD19 ,Data Direction Port 7 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x188 18. -0x180 18. " DD18 ,Data Direction Port 7 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x188 17. -0x180 17. " DD17 ,Data Direction Port 7 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x188 16. -0x180 16. " DD16 ,Data Direction Port 7 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x188 15. -0x180 15. " DD15 ,Data Direction Port 7 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x188 14. -0x180 14. " DD14 ,Data Direction Port 7 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x188 13. -0x180 13. " DD13 ,Data Direction Port 7 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x188 12. -0x180 12. " DD12 ,Data Direction Port 7 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x188 11. -0x180 11. " DD11 ,Data Direction Port 7 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x188 10. -0x180 10. " DD10 ,Data Direction Port 7 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x188 9. -0x180 9. " DD9 ,Data Direction Port 7 Pin 9" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x188 8. -0x180 8. " DD8 ,Data Direction Port 7 Pin 8" "Input,Output"
|
|
setclrfld.quad 0x00 7. -0x188 7. -0x180 7. " DD7 ,Data Direction Port 7 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x188 6. -0x180 6. " DD6 ,Data Direction Port 7 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x188 5. -0x180 5. " DD5 ,Data Direction Port 7 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x188 4. -0x180 4. " DD4 ,Data Direction Port 7 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x188 3. -0x180 3. " DD3 ,Data Direction Port 7 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x188 2. -0x180 2. " DD2 ,Data Direction Port 7 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x188 1. -0x180 1. " DD1 ,Data Direction Port 7 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x188 0. -0x180 0. " DD0 ,Data Direction Port 7 Pin 0" "Input,Output"
|
|
group.quad 0x288++0x7
|
|
line.quad 0x00 "GPIO_DDR8,Data Direction Register for Channel 8"
|
|
setclrfld.quad 0x00 63. -0x178 63. -0x170 63. " DD63 ,Data Direction Port 8 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x178 62. -0x170 62. " DD62 ,Data Direction Port 8 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x178 61. -0x170 61. " DD61 ,Data Direction Port 8 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x178 60. -0x170 60. " DD60 ,Data Direction Port 8 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x178 59. -0x170 59. " DD59 ,Data Direction Port 8 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x178 58. -0x170 58. " DD58 ,Data Direction Port 8 Pin 58" "Input,Output"
|
|
setclrfld.quad 0x00 57. -0x178 57. -0x170 57. " DD57 ,Data Direction Port 8 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x178 56. -0x170 56. " DD56 ,Data Direction Port 8 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x178 55. -0x170 55. " DD55 ,Data Direction Port 8 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x178 54. -0x170 54. " DD54 ,Data Direction Port 8 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x178 53. -0x170 53. " DD53 ,Data Direction Port 8 Pin 53" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x178 52. -0x170 52. " DD52 ,Data Direction Port 8 Pin 52" "Input,Output"
|
|
setclrfld.quad 0x00 51. -0x178 51. -0x170 51. " DD51 ,Data Direction Port 8 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x178 50. -0x170 50. " DD50 ,Data Direction Port 8 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x178 49. -0x170 49. " DD49 ,Data Direction Port 8 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x178 48. -0x170 48. " DD48 ,Data Direction Port 8 Pin 48" "Input,Output"
|
|
setclrfld.quad 0x00 47. -0x178 47. -0x170 47. " DD47 ,Data Direction Port 8 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x178 46. -0x170 46. " DD46 ,Data Direction Port 8 Pin 46" "Input,Output"
|
|
setclrfld.quad 0x00 45. -0x178 45. -0x170 45. " DD45 ,Data Direction Port 8 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x178 44. -0x170 44. " DD44 ,Data Direction Port 8 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x178 43. -0x170 43. " DD43 ,Data Direction Port 8 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x178 42. -0x170 42. " DD42 ,Data Direction Port 8 Pin 42" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x178 41. -0x170 41. " DD41 ,Data Direction Port 8 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x178 40. -0x170 40. " DD40 ,Data Direction Port 8 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x178 39. -0x170 39. " DD39 ,Data Direction Port 8 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x178 38. -0x170 38. " DD38 ,Data Direction Port 8 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x178 37. -0x170 37. " DD37 ,Data Direction Port 8 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x178 36. -0x170 36. " DD36 ,Data Direction Port 8 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x178 35. -0x170 35. " DD35 ,Data Direction Port 8 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x178 34. -0x170 34. " DD34 ,Data Direction Port 8 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x178 33. -0x170 33. " DD33 ,Data Direction Port 8 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x178 32. -0x170 32. " DD32 ,Data Direction Port 8 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x178 31. -0x170 31. " DD31 ,Data Direction Port 8 Pin 31" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x178 30. -0x170 30. " DD30 ,Data Direction Port 8 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x178 29. -0x170 29. " DD29 ,Data Direction Port 8 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x178 28. -0x170 28. " DD28 ,Data Direction Port 8 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x178 27. -0x170 27. " DD27 ,Data Direction Port 8 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x178 26. -0x170 26. " DD26 ,Data Direction Port 8 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x178 25. -0x170 25. " DD25 ,Data Direction Port 8 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x178 24. -0x170 24. " DD24 ,Data Direction Port 8 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x178 23. -0x170 23. " DD23 ,Data Direction Port 8 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x178 22. -0x170 22. " DD22 ,Data Direction Port 8 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x178 21. -0x170 21. " DD21 ,Data Direction Port 8 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x178 20. -0x170 20. " DD20 ,Data Direction Port 8 Pin 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x178 19. -0x170 19. " DD19 ,Data Direction Port 8 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x178 18. -0x170 18. " DD18 ,Data Direction Port 8 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x178 17. -0x170 17. " DD17 ,Data Direction Port 8 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x178 16. -0x170 16. " DD16 ,Data Direction Port 8 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x178 15. -0x170 15. " DD15 ,Data Direction Port 8 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x178 14. -0x170 14. " DD14 ,Data Direction Port 8 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x178 13. -0x170 13. " DD13 ,Data Direction Port 8 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x178 12. -0x170 12. " DD12 ,Data Direction Port 8 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x178 11. -0x170 11. " DD11 ,Data Direction Port 8 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x178 10. -0x170 10. " DD10 ,Data Direction Port 8 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x178 9. -0x170 9. " DD9 ,Data Direction Port 8 Pin 9" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x178 8. -0x170 8. " DD8 ,Data Direction Port 8 Pin 8" "Input,Output"
|
|
setclrfld.quad 0x00 7. -0x178 7. -0x170 7. " DD7 ,Data Direction Port 8 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x178 6. -0x170 6. " DD6 ,Data Direction Port 8 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x178 5. -0x170 5. " DD5 ,Data Direction Port 8 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x178 4. -0x170 4. " DD4 ,Data Direction Port 8 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x178 3. -0x170 3. " DD3 ,Data Direction Port 8 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x178 2. -0x170 2. " DD2 ,Data Direction Port 8 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x178 1. -0x170 1. " DD1 ,Data Direction Port 8 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x178 0. -0x170 0. " DD0 ,Data Direction Port 8 Pin 0" "Input,Output"
|
|
group.quad 0x298++0x7
|
|
line.quad 0x00 "GPIO_DDR9,Data Direction Register for Channel 9"
|
|
setclrfld.quad 0x00 63. -0x168 63. -0x160 63. " DD63 ,Data Direction Port 9 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x168 62. -0x160 62. " DD62 ,Data Direction Port 9 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x168 61. -0x160 61. " DD61 ,Data Direction Port 9 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x168 60. -0x160 60. " DD60 ,Data Direction Port 9 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x168 59. -0x160 59. " DD59 ,Data Direction Port 9 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x168 58. -0x160 58. " DD58 ,Data Direction Port 9 Pin 58" "Input,Output"
|
|
setclrfld.quad 0x00 57. -0x168 57. -0x160 57. " DD57 ,Data Direction Port 9 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x168 56. -0x160 56. " DD56 ,Data Direction Port 9 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x168 55. -0x160 55. " DD55 ,Data Direction Port 9 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x168 54. -0x160 54. " DD54 ,Data Direction Port 9 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x168 53. -0x160 53. " DD53 ,Data Direction Port 9 Pin 53" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x168 52. -0x160 52. " DD52 ,Data Direction Port 9 Pin 52" "Input,Output"
|
|
setclrfld.quad 0x00 51. -0x168 51. -0x160 51. " DD51 ,Data Direction Port 9 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x168 50. -0x160 50. " DD50 ,Data Direction Port 9 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x168 49. -0x160 49. " DD49 ,Data Direction Port 9 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x168 48. -0x160 48. " DD48 ,Data Direction Port 9 Pin 48" "Input,Output"
|
|
setclrfld.quad 0x00 47. -0x168 47. -0x160 47. " DD47 ,Data Direction Port 9 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x168 46. -0x160 46. " DD46 ,Data Direction Port 9 Pin 46" "Input,Output"
|
|
setclrfld.quad 0x00 45. -0x168 45. -0x160 45. " DD45 ,Data Direction Port 9 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x168 44. -0x160 44. " DD44 ,Data Direction Port 9 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x168 43. -0x160 43. " DD43 ,Data Direction Port 9 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x168 42. -0x160 42. " DD42 ,Data Direction Port 9 Pin 42" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x168 41. -0x160 41. " DD41 ,Data Direction Port 9 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x168 40. -0x160 40. " DD40 ,Data Direction Port 9 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x168 39. -0x160 39. " DD39 ,Data Direction Port 9 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x168 38. -0x160 38. " DD38 ,Data Direction Port 9 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x168 37. -0x160 37. " DD37 ,Data Direction Port 9 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x168 36. -0x160 36. " DD36 ,Data Direction Port 9 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x168 35. -0x160 35. " DD35 ,Data Direction Port 9 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x168 34. -0x160 34. " DD34 ,Data Direction Port 9 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x168 33. -0x160 33. " DD33 ,Data Direction Port 9 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x168 32. -0x160 32. " DD32 ,Data Direction Port 9 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x168 31. -0x160 31. " DD31 ,Data Direction Port 9 Pin 31" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x168 30. -0x160 30. " DD30 ,Data Direction Port 9 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x168 29. -0x160 29. " DD29 ,Data Direction Port 9 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x168 28. -0x160 28. " DD28 ,Data Direction Port 9 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x168 27. -0x160 27. " DD27 ,Data Direction Port 9 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x168 26. -0x160 26. " DD26 ,Data Direction Port 9 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x168 25. -0x160 25. " DD25 ,Data Direction Port 9 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x168 24. -0x160 24. " DD24 ,Data Direction Port 9 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x168 23. -0x160 23. " DD23 ,Data Direction Port 9 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x168 22. -0x160 22. " DD22 ,Data Direction Port 9 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x168 21. -0x160 21. " DD21 ,Data Direction Port 9 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x168 20. -0x160 20. " DD20 ,Data Direction Port 9 Pin 20" "Input,Output"
|
|
textline " "
|
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setclrfld.quad 0x00 19. -0x168 19. -0x160 19. " DD19 ,Data Direction Port 9 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x168 18. -0x160 18. " DD18 ,Data Direction Port 9 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x168 17. -0x160 17. " DD17 ,Data Direction Port 9 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x168 16. -0x160 16. " DD16 ,Data Direction Port 9 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x168 15. -0x160 15. " DD15 ,Data Direction Port 9 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x168 14. -0x160 14. " DD14 ,Data Direction Port 9 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x168 13. -0x160 13. " DD13 ,Data Direction Port 9 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x168 12. -0x160 12. " DD12 ,Data Direction Port 9 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x168 11. -0x160 11. " DD11 ,Data Direction Port 9 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x168 10. -0x160 10. " DD10 ,Data Direction Port 9 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x168 9. -0x160 9. " DD9 ,Data Direction Port 9 Pin 9" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x168 8. -0x160 8. " DD8 ,Data Direction Port 9 Pin 8" "Input,Output"
|
|
setclrfld.quad 0x00 7. -0x168 7. -0x160 7. " DD7 ,Data Direction Port 9 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x168 6. -0x160 6. " DD6 ,Data Direction Port 9 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x168 5. -0x160 5. " DD5 ,Data Direction Port 9 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x168 4. -0x160 4. " DD4 ,Data Direction Port 9 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x168 3. -0x160 3. " DD3 ,Data Direction Port 9 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x168 2. -0x160 2. " DD2 ,Data Direction Port 9 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x168 1. -0x160 1. " DD1 ,Data Direction Port 9 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x168 0. -0x160 0. " DD0 ,Data Direction Port 9 Pin 0" "Input,Output"
|
|
group.quad 0x2a8++0x7
|
|
line.quad 0x00 "GPIO_DDR10,Data Direction Register for Channel 10"
|
|
setclrfld.quad 0x00 63. -0x158 63. -0x150 63. " DD63 ,Data Direction Port 10 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x158 62. -0x150 62. " DD62 ,Data Direction Port 10 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x158 61. -0x150 61. " DD61 ,Data Direction Port 10 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x158 60. -0x150 60. " DD60 ,Data Direction Port 10 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x158 59. -0x150 59. " DD59 ,Data Direction Port 10 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x158 58. -0x150 58. " DD58 ,Data Direction Port 10 Pin 58" "Input,Output"
|
|
setclrfld.quad 0x00 57. -0x158 57. -0x150 57. " DD57 ,Data Direction Port 10 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x158 56. -0x150 56. " DD56 ,Data Direction Port 10 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x158 55. -0x150 55. " DD55 ,Data Direction Port 10 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x158 54. -0x150 54. " DD54 ,Data Direction Port 10 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x158 53. -0x150 53. " DD53 ,Data Direction Port 10 Pin 53" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x158 52. -0x150 52. " DD52 ,Data Direction Port 10 Pin 52" "Input,Output"
|
|
setclrfld.quad 0x00 51. -0x158 51. -0x150 51. " DD51 ,Data Direction Port 10 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x158 50. -0x150 50. " DD50 ,Data Direction Port 10 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x158 49. -0x150 49. " DD49 ,Data Direction Port 10 Pin 49" "Input,Output"
|
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setclrfld.quad 0x00 48. -0x158 48. -0x150 48. " DD48 ,Data Direction Port 10 Pin 48" "Input,Output"
|
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setclrfld.quad 0x00 47. -0x158 47. -0x150 47. " DD47 ,Data Direction Port 10 Pin 47" "Input,Output"
|
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setclrfld.quad 0x00 46. -0x158 46. -0x150 46. " DD46 ,Data Direction Port 10 Pin 46" "Input,Output"
|
|
setclrfld.quad 0x00 45. -0x158 45. -0x150 45. " DD45 ,Data Direction Port 10 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x158 44. -0x150 44. " DD44 ,Data Direction Port 10 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x158 43. -0x150 43. " DD43 ,Data Direction Port 10 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x158 42. -0x150 42. " DD42 ,Data Direction Port 10 Pin 42" "Input,Output"
|
|
textline " "
|
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setclrfld.quad 0x00 41. -0x158 41. -0x150 41. " DD41 ,Data Direction Port 10 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x158 40. -0x150 40. " DD40 ,Data Direction Port 10 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x158 39. -0x150 39. " DD39 ,Data Direction Port 10 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x158 38. -0x150 38. " DD38 ,Data Direction Port 10 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x158 37. -0x150 37. " DD37 ,Data Direction Port 10 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x158 36. -0x150 36. " DD36 ,Data Direction Port 10 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x158 35. -0x150 35. " DD35 ,Data Direction Port 10 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x158 34. -0x150 34. " DD34 ,Data Direction Port 10 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x158 33. -0x150 33. " DD33 ,Data Direction Port 10 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x158 32. -0x150 32. " DD32 ,Data Direction Port 10 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x158 31. -0x150 31. " DD31 ,Data Direction Port 10 Pin 31" "Input,Output"
|
|
textline " "
|
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setclrfld.quad 0x00 30. -0x158 30. -0x150 30. " DD30 ,Data Direction Port 10 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x158 29. -0x150 29. " DD29 ,Data Direction Port 10 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x158 28. -0x150 28. " DD28 ,Data Direction Port 10 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x158 27. -0x150 27. " DD27 ,Data Direction Port 10 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x158 26. -0x150 26. " DD26 ,Data Direction Port 10 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x158 25. -0x150 25. " DD25 ,Data Direction Port 10 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x158 24. -0x150 24. " DD24 ,Data Direction Port 10 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x158 23. -0x150 23. " DD23 ,Data Direction Port 10 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x158 22. -0x150 22. " DD22 ,Data Direction Port 10 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x158 21. -0x150 21. " DD21 ,Data Direction Port 10 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x158 20. -0x150 20. " DD20 ,Data Direction Port 10 Pin 20" "Input,Output"
|
|
textline " "
|
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setclrfld.quad 0x00 19. -0x158 19. -0x150 19. " DD19 ,Data Direction Port 10 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x158 18. -0x150 18. " DD18 ,Data Direction Port 10 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x158 17. -0x150 17. " DD17 ,Data Direction Port 10 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x158 16. -0x150 16. " DD16 ,Data Direction Port 10 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x158 15. -0x150 15. " DD15 ,Data Direction Port 10 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x158 14. -0x150 14. " DD14 ,Data Direction Port 10 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x158 13. -0x150 13. " DD13 ,Data Direction Port 10 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x158 12. -0x150 12. " DD12 ,Data Direction Port 10 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x158 11. -0x150 11. " DD11 ,Data Direction Port 10 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x158 10. -0x150 10. " DD10 ,Data Direction Port 10 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x158 9. -0x150 9. " DD9 ,Data Direction Port 10 Pin 9" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x158 8. -0x150 8. " DD8 ,Data Direction Port 10 Pin 8" "Input,Output"
|
|
setclrfld.quad 0x00 7. -0x158 7. -0x150 7. " DD7 ,Data Direction Port 10 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x158 6. -0x150 6. " DD6 ,Data Direction Port 10 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x158 5. -0x150 5. " DD5 ,Data Direction Port 10 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x158 4. -0x150 4. " DD4 ,Data Direction Port 10 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x158 3. -0x150 3. " DD3 ,Data Direction Port 10 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x158 2. -0x150 2. " DD2 ,Data Direction Port 10 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x158 1. -0x150 1. " DD1 ,Data Direction Port 10 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x158 0. -0x150 0. " DD0 ,Data Direction Port 10 Pin 0" "Input,Output"
|
|
group.quad 0x2b8++0x7
|
|
line.quad 0x00 "GPIO_DDR11,Data Direction Register for Channel 11"
|
|
setclrfld.quad 0x00 63. -0x148 63. -0x140 63. " DD63 ,Data Direction Port 11 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x148 62. -0x140 62. " DD62 ,Data Direction Port 11 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x148 61. -0x140 61. " DD61 ,Data Direction Port 11 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x148 60. -0x140 60. " DD60 ,Data Direction Port 11 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x148 59. -0x140 59. " DD59 ,Data Direction Port 11 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x148 58. -0x140 58. " DD58 ,Data Direction Port 11 Pin 58" "Input,Output"
|
|
setclrfld.quad 0x00 57. -0x148 57. -0x140 57. " DD57 ,Data Direction Port 11 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x148 56. -0x140 56. " DD56 ,Data Direction Port 11 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x148 55. -0x140 55. " DD55 ,Data Direction Port 11 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x148 54. -0x140 54. " DD54 ,Data Direction Port 11 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x148 53. -0x140 53. " DD53 ,Data Direction Port 11 Pin 53" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x148 52. -0x140 52. " DD52 ,Data Direction Port 11 Pin 52" "Input,Output"
|
|
setclrfld.quad 0x00 51. -0x148 51. -0x140 51. " DD51 ,Data Direction Port 11 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x148 50. -0x140 50. " DD50 ,Data Direction Port 11 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x148 49. -0x140 49. " DD49 ,Data Direction Port 11 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x148 48. -0x140 48. " DD48 ,Data Direction Port 11 Pin 48" "Input,Output"
|
|
setclrfld.quad 0x00 47. -0x148 47. -0x140 47. " DD47 ,Data Direction Port 11 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x148 46. -0x140 46. " DD46 ,Data Direction Port 11 Pin 46" "Input,Output"
|
|
setclrfld.quad 0x00 45. -0x148 45. -0x140 45. " DD45 ,Data Direction Port 11 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x148 44. -0x140 44. " DD44 ,Data Direction Port 11 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x148 43. -0x140 43. " DD43 ,Data Direction Port 11 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x148 42. -0x140 42. " DD42 ,Data Direction Port 11 Pin 42" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x148 41. -0x140 41. " DD41 ,Data Direction Port 11 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x148 40. -0x140 40. " DD40 ,Data Direction Port 11 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x148 39. -0x140 39. " DD39 ,Data Direction Port 11 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x148 38. -0x140 38. " DD38 ,Data Direction Port 11 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x148 37. -0x140 37. " DD37 ,Data Direction Port 11 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x148 36. -0x140 36. " DD36 ,Data Direction Port 11 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x148 35. -0x140 35. " DD35 ,Data Direction Port 11 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x148 34. -0x140 34. " DD34 ,Data Direction Port 11 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x148 33. -0x140 33. " DD33 ,Data Direction Port 11 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x148 32. -0x140 32. " DD32 ,Data Direction Port 11 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x148 31. -0x140 31. " DD31 ,Data Direction Port 11 Pin 31" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x148 30. -0x140 30. " DD30 ,Data Direction Port 11 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x148 29. -0x140 29. " DD29 ,Data Direction Port 11 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x148 28. -0x140 28. " DD28 ,Data Direction Port 11 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x148 27. -0x140 27. " DD27 ,Data Direction Port 11 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x148 26. -0x140 26. " DD26 ,Data Direction Port 11 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x148 25. -0x140 25. " DD25 ,Data Direction Port 11 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x148 24. -0x140 24. " DD24 ,Data Direction Port 11 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x148 23. -0x140 23. " DD23 ,Data Direction Port 11 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x148 22. -0x140 22. " DD22 ,Data Direction Port 11 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x148 21. -0x140 21. " DD21 ,Data Direction Port 11 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x148 20. -0x140 20. " DD20 ,Data Direction Port 11 Pin 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x148 19. -0x140 19. " DD19 ,Data Direction Port 11 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x148 18. -0x140 18. " DD18 ,Data Direction Port 11 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x148 17. -0x140 17. " DD17 ,Data Direction Port 11 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x148 16. -0x140 16. " DD16 ,Data Direction Port 11 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x148 15. -0x140 15. " DD15 ,Data Direction Port 11 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x148 14. -0x140 14. " DD14 ,Data Direction Port 11 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x148 13. -0x140 13. " DD13 ,Data Direction Port 11 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x148 12. -0x140 12. " DD12 ,Data Direction Port 11 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x148 11. -0x140 11. " DD11 ,Data Direction Port 11 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x148 10. -0x140 10. " DD10 ,Data Direction Port 11 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x148 9. -0x140 9. " DD9 ,Data Direction Port 11 Pin 9" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x148 8. -0x140 8. " DD8 ,Data Direction Port 11 Pin 8" "Input,Output"
|
|
setclrfld.quad 0x00 7. -0x148 7. -0x140 7. " DD7 ,Data Direction Port 11 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x148 6. -0x140 6. " DD6 ,Data Direction Port 11 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x148 5. -0x140 5. " DD5 ,Data Direction Port 11 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x148 4. -0x140 4. " DD4 ,Data Direction Port 11 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x148 3. -0x140 3. " DD3 ,Data Direction Port 11 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x148 2. -0x140 2. " DD2 ,Data Direction Port 11 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x148 1. -0x140 1. " DD1 ,Data Direction Port 11 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x148 0. -0x140 0. " DD0 ,Data Direction Port 11 Pin 0" "Input,Output"
|
|
group.quad 0x2c8++0x7
|
|
line.quad 0x00 "GPIO_DDR12,Data Direction Register for Channel 12"
|
|
setclrfld.quad 0x00 63. -0x138 63. -0x130 63. " DD63 ,Data Direction Port 12 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x138 62. -0x130 62. " DD62 ,Data Direction Port 12 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x138 61. -0x130 61. " DD61 ,Data Direction Port 12 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x138 60. -0x130 60. " DD60 ,Data Direction Port 12 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x138 59. -0x130 59. " DD59 ,Data Direction Port 12 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x138 58. -0x130 58. " DD58 ,Data Direction Port 12 Pin 58" "Input,Output"
|
|
setclrfld.quad 0x00 57. -0x138 57. -0x130 57. " DD57 ,Data Direction Port 12 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x138 56. -0x130 56. " DD56 ,Data Direction Port 12 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x138 55. -0x130 55. " DD55 ,Data Direction Port 12 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x138 54. -0x130 54. " DD54 ,Data Direction Port 12 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x138 53. -0x130 53. " DD53 ,Data Direction Port 12 Pin 53" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x138 52. -0x130 52. " DD52 ,Data Direction Port 12 Pin 52" "Input,Output"
|
|
setclrfld.quad 0x00 51. -0x138 51. -0x130 51. " DD51 ,Data Direction Port 12 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x138 50. -0x130 50. " DD50 ,Data Direction Port 12 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x138 49. -0x130 49. " DD49 ,Data Direction Port 12 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x138 48. -0x130 48. " DD48 ,Data Direction Port 12 Pin 48" "Input,Output"
|
|
setclrfld.quad 0x00 47. -0x138 47. -0x130 47. " DD47 ,Data Direction Port 12 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x138 46. -0x130 46. " DD46 ,Data Direction Port 12 Pin 46" "Input,Output"
|
|
setclrfld.quad 0x00 45. -0x138 45. -0x130 45. " DD45 ,Data Direction Port 12 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x138 44. -0x130 44. " DD44 ,Data Direction Port 12 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x138 43. -0x130 43. " DD43 ,Data Direction Port 12 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x138 42. -0x130 42. " DD42 ,Data Direction Port 12 Pin 42" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x138 41. -0x130 41. " DD41 ,Data Direction Port 12 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x138 40. -0x130 40. " DD40 ,Data Direction Port 12 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x138 39. -0x130 39. " DD39 ,Data Direction Port 12 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x138 38. -0x130 38. " DD38 ,Data Direction Port 12 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x138 37. -0x130 37. " DD37 ,Data Direction Port 12 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x138 36. -0x130 36. " DD36 ,Data Direction Port 12 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x138 35. -0x130 35. " DD35 ,Data Direction Port 12 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x138 34. -0x130 34. " DD34 ,Data Direction Port 12 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x138 33. -0x130 33. " DD33 ,Data Direction Port 12 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x138 32. -0x130 32. " DD32 ,Data Direction Port 12 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x138 31. -0x130 31. " DD31 ,Data Direction Port 12 Pin 31" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x138 30. -0x130 30. " DD30 ,Data Direction Port 12 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x138 29. -0x130 29. " DD29 ,Data Direction Port 12 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x138 28. -0x130 28. " DD28 ,Data Direction Port 12 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x138 27. -0x130 27. " DD27 ,Data Direction Port 12 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x138 26. -0x130 26. " DD26 ,Data Direction Port 12 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x138 25. -0x130 25. " DD25 ,Data Direction Port 12 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x138 24. -0x130 24. " DD24 ,Data Direction Port 12 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x138 23. -0x130 23. " DD23 ,Data Direction Port 12 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x138 22. -0x130 22. " DD22 ,Data Direction Port 12 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x138 21. -0x130 21. " DD21 ,Data Direction Port 12 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x138 20. -0x130 20. " DD20 ,Data Direction Port 12 Pin 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x138 19. -0x130 19. " DD19 ,Data Direction Port 12 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x138 18. -0x130 18. " DD18 ,Data Direction Port 12 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x138 17. -0x130 17. " DD17 ,Data Direction Port 12 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x138 16. -0x130 16. " DD16 ,Data Direction Port 12 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x138 15. -0x130 15. " DD15 ,Data Direction Port 12 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x138 14. -0x130 14. " DD14 ,Data Direction Port 12 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x138 13. -0x130 13. " DD13 ,Data Direction Port 12 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x138 12. -0x130 12. " DD12 ,Data Direction Port 12 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x138 11. -0x130 11. " DD11 ,Data Direction Port 12 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x138 10. -0x130 10. " DD10 ,Data Direction Port 12 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x138 9. -0x130 9. " DD9 ,Data Direction Port 12 Pin 9" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x138 8. -0x130 8. " DD8 ,Data Direction Port 12 Pin 8" "Input,Output"
|
|
setclrfld.quad 0x00 7. -0x138 7. -0x130 7. " DD7 ,Data Direction Port 12 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x138 6. -0x130 6. " DD6 ,Data Direction Port 12 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x138 5. -0x130 5. " DD5 ,Data Direction Port 12 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x138 4. -0x130 4. " DD4 ,Data Direction Port 12 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x138 3. -0x130 3. " DD3 ,Data Direction Port 12 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x138 2. -0x130 2. " DD2 ,Data Direction Port 12 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x138 1. -0x130 1. " DD1 ,Data Direction Port 12 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x138 0. -0x130 0. " DD0 ,Data Direction Port 12 Pin 0" "Input,Output"
|
|
group.quad 0x2d8++0x7
|
|
line.quad 0x00 "GPIO_DDR13,Data Direction Register for Channel 13"
|
|
setclrfld.quad 0x00 63. -0x128 63. -0x120 63. " DD63 ,Data Direction Port 13 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x128 62. -0x120 62. " DD62 ,Data Direction Port 13 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x128 61. -0x120 61. " DD61 ,Data Direction Port 13 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x128 60. -0x120 60. " DD60 ,Data Direction Port 13 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x128 59. -0x120 59. " DD59 ,Data Direction Port 13 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x128 58. -0x120 58. " DD58 ,Data Direction Port 13 Pin 58" "Input,Output"
|
|
setclrfld.quad 0x00 57. -0x128 57. -0x120 57. " DD57 ,Data Direction Port 13 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x128 56. -0x120 56. " DD56 ,Data Direction Port 13 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x128 55. -0x120 55. " DD55 ,Data Direction Port 13 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x128 54. -0x120 54. " DD54 ,Data Direction Port 13 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x128 53. -0x120 53. " DD53 ,Data Direction Port 13 Pin 53" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x128 52. -0x120 52. " DD52 ,Data Direction Port 13 Pin 52" "Input,Output"
|
|
setclrfld.quad 0x00 51. -0x128 51. -0x120 51. " DD51 ,Data Direction Port 13 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x128 50. -0x120 50. " DD50 ,Data Direction Port 13 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x128 49. -0x120 49. " DD49 ,Data Direction Port 13 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x128 48. -0x120 48. " DD48 ,Data Direction Port 13 Pin 48" "Input,Output"
|
|
setclrfld.quad 0x00 47. -0x128 47. -0x120 47. " DD47 ,Data Direction Port 13 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x128 46. -0x120 46. " DD46 ,Data Direction Port 13 Pin 46" "Input,Output"
|
|
setclrfld.quad 0x00 45. -0x128 45. -0x120 45. " DD45 ,Data Direction Port 13 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x128 44. -0x120 44. " DD44 ,Data Direction Port 13 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x128 43. -0x120 43. " DD43 ,Data Direction Port 13 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x128 42. -0x120 42. " DD42 ,Data Direction Port 13 Pin 42" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x128 41. -0x120 41. " DD41 ,Data Direction Port 13 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x128 40. -0x120 40. " DD40 ,Data Direction Port 13 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x128 39. -0x120 39. " DD39 ,Data Direction Port 13 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x128 38. -0x120 38. " DD38 ,Data Direction Port 13 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x128 37. -0x120 37. " DD37 ,Data Direction Port 13 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x128 36. -0x120 36. " DD36 ,Data Direction Port 13 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x128 35. -0x120 35. " DD35 ,Data Direction Port 13 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x128 34. -0x120 34. " DD34 ,Data Direction Port 13 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x128 33. -0x120 33. " DD33 ,Data Direction Port 13 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x128 32. -0x120 32. " DD32 ,Data Direction Port 13 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x128 31. -0x120 31. " DD31 ,Data Direction Port 13 Pin 31" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x128 30. -0x120 30. " DD30 ,Data Direction Port 13 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x128 29. -0x120 29. " DD29 ,Data Direction Port 13 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x128 28. -0x120 28. " DD28 ,Data Direction Port 13 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x128 27. -0x120 27. " DD27 ,Data Direction Port 13 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x128 26. -0x120 26. " DD26 ,Data Direction Port 13 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x128 25. -0x120 25. " DD25 ,Data Direction Port 13 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x128 24. -0x120 24. " DD24 ,Data Direction Port 13 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x128 23. -0x120 23. " DD23 ,Data Direction Port 13 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x128 22. -0x120 22. " DD22 ,Data Direction Port 13 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x128 21. -0x120 21. " DD21 ,Data Direction Port 13 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x128 20. -0x120 20. " DD20 ,Data Direction Port 13 Pin 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x128 19. -0x120 19. " DD19 ,Data Direction Port 13 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x128 18. -0x120 18. " DD18 ,Data Direction Port 13 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x128 17. -0x120 17. " DD17 ,Data Direction Port 13 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x128 16. -0x120 16. " DD16 ,Data Direction Port 13 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x128 15. -0x120 15. " DD15 ,Data Direction Port 13 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x128 14. -0x120 14. " DD14 ,Data Direction Port 13 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x128 13. -0x120 13. " DD13 ,Data Direction Port 13 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x128 12. -0x120 12. " DD12 ,Data Direction Port 13 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x128 11. -0x120 11. " DD11 ,Data Direction Port 13 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x128 10. -0x120 10. " DD10 ,Data Direction Port 13 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x128 9. -0x120 9. " DD9 ,Data Direction Port 13 Pin 9" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x128 8. -0x120 8. " DD8 ,Data Direction Port 13 Pin 8" "Input,Output"
|
|
setclrfld.quad 0x00 7. -0x128 7. -0x120 7. " DD7 ,Data Direction Port 13 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x128 6. -0x120 6. " DD6 ,Data Direction Port 13 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x128 5. -0x120 5. " DD5 ,Data Direction Port 13 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x128 4. -0x120 4. " DD4 ,Data Direction Port 13 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x128 3. -0x120 3. " DD3 ,Data Direction Port 13 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x128 2. -0x120 2. " DD2 ,Data Direction Port 13 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x128 1. -0x120 1. " DD1 ,Data Direction Port 13 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x128 0. -0x120 0. " DD0 ,Data Direction Port 13 Pin 0" "Input,Output"
|
|
group.quad 0x2e8++0x7
|
|
line.quad 0x00 "GPIO_DDR14,Data Direction Register for Channel 14"
|
|
setclrfld.quad 0x00 63. -0x118 63. -0x110 63. " DD63 ,Data Direction Port 14 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x118 62. -0x110 62. " DD62 ,Data Direction Port 14 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x118 61. -0x110 61. " DD61 ,Data Direction Port 14 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x118 60. -0x110 60. " DD60 ,Data Direction Port 14 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x118 59. -0x110 59. " DD59 ,Data Direction Port 14 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x118 58. -0x110 58. " DD58 ,Data Direction Port 14 Pin 58" "Input,Output"
|
|
setclrfld.quad 0x00 57. -0x118 57. -0x110 57. " DD57 ,Data Direction Port 14 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x118 56. -0x110 56. " DD56 ,Data Direction Port 14 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x118 55. -0x110 55. " DD55 ,Data Direction Port 14 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x118 54. -0x110 54. " DD54 ,Data Direction Port 14 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x118 53. -0x110 53. " DD53 ,Data Direction Port 14 Pin 53" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x118 52. -0x110 52. " DD52 ,Data Direction Port 14 Pin 52" "Input,Output"
|
|
setclrfld.quad 0x00 51. -0x118 51. -0x110 51. " DD51 ,Data Direction Port 14 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x118 50. -0x110 50. " DD50 ,Data Direction Port 14 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x118 49. -0x110 49. " DD49 ,Data Direction Port 14 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x118 48. -0x110 48. " DD48 ,Data Direction Port 14 Pin 48" "Input,Output"
|
|
setclrfld.quad 0x00 47. -0x118 47. -0x110 47. " DD47 ,Data Direction Port 14 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x118 46. -0x110 46. " DD46 ,Data Direction Port 14 Pin 46" "Input,Output"
|
|
setclrfld.quad 0x00 45. -0x118 45. -0x110 45. " DD45 ,Data Direction Port 14 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x118 44. -0x110 44. " DD44 ,Data Direction Port 14 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x118 43. -0x110 43. " DD43 ,Data Direction Port 14 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x118 42. -0x110 42. " DD42 ,Data Direction Port 14 Pin 42" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x118 41. -0x110 41. " DD41 ,Data Direction Port 14 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x118 40. -0x110 40. " DD40 ,Data Direction Port 14 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x118 39. -0x110 39. " DD39 ,Data Direction Port 14 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x118 38. -0x110 38. " DD38 ,Data Direction Port 14 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x118 37. -0x110 37. " DD37 ,Data Direction Port 14 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x118 36. -0x110 36. " DD36 ,Data Direction Port 14 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x118 35. -0x110 35. " DD35 ,Data Direction Port 14 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x118 34. -0x110 34. " DD34 ,Data Direction Port 14 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x118 33. -0x110 33. " DD33 ,Data Direction Port 14 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x118 32. -0x110 32. " DD32 ,Data Direction Port 14 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x118 31. -0x110 31. " DD31 ,Data Direction Port 14 Pin 31" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x118 30. -0x110 30. " DD30 ,Data Direction Port 14 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x118 29. -0x110 29. " DD29 ,Data Direction Port 14 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x118 28. -0x110 28. " DD28 ,Data Direction Port 14 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x118 27. -0x110 27. " DD27 ,Data Direction Port 14 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x118 26. -0x110 26. " DD26 ,Data Direction Port 14 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x118 25. -0x110 25. " DD25 ,Data Direction Port 14 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x118 24. -0x110 24. " DD24 ,Data Direction Port 14 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x118 23. -0x110 23. " DD23 ,Data Direction Port 14 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x118 22. -0x110 22. " DD22 ,Data Direction Port 14 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x118 21. -0x110 21. " DD21 ,Data Direction Port 14 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x118 20. -0x110 20. " DD20 ,Data Direction Port 14 Pin 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x118 19. -0x110 19. " DD19 ,Data Direction Port 14 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x118 18. -0x110 18. " DD18 ,Data Direction Port 14 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x118 17. -0x110 17. " DD17 ,Data Direction Port 14 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x118 16. -0x110 16. " DD16 ,Data Direction Port 14 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x118 15. -0x110 15. " DD15 ,Data Direction Port 14 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x118 14. -0x110 14. " DD14 ,Data Direction Port 14 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x118 13. -0x110 13. " DD13 ,Data Direction Port 14 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x118 12. -0x110 12. " DD12 ,Data Direction Port 14 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x118 11. -0x110 11. " DD11 ,Data Direction Port 14 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x118 10. -0x110 10. " DD10 ,Data Direction Port 14 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x118 9. -0x110 9. " DD9 ,Data Direction Port 14 Pin 9" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x118 8. -0x110 8. " DD8 ,Data Direction Port 14 Pin 8" "Input,Output"
|
|
setclrfld.quad 0x00 7. -0x118 7. -0x110 7. " DD7 ,Data Direction Port 14 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x118 6. -0x110 6. " DD6 ,Data Direction Port 14 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x118 5. -0x110 5. " DD5 ,Data Direction Port 14 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x118 4. -0x110 4. " DD4 ,Data Direction Port 14 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x118 3. -0x110 3. " DD3 ,Data Direction Port 14 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x118 2. -0x110 2. " DD2 ,Data Direction Port 14 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x118 1. -0x110 1. " DD1 ,Data Direction Port 14 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x118 0. -0x110 0. " DD0 ,Data Direction Port 14 Pin 0" "Input,Output"
|
|
group.quad 0x2f8++0x7
|
|
line.quad 0x00 "GPIO_DDR15,Data Direction Register for Channel 15"
|
|
setclrfld.quad 0x00 63. -0x108 63. -0x100 63. " DD63 ,Data Direction Port 15 Pin 63" "Input,Output"
|
|
setclrfld.quad 0x00 62. -0x108 62. -0x100 62. " DD62 ,Data Direction Port 15 Pin 62" "Input,Output"
|
|
setclrfld.quad 0x00 61. -0x108 61. -0x100 61. " DD61 ,Data Direction Port 15 Pin 61" "Input,Output"
|
|
setclrfld.quad 0x00 60. -0x108 60. -0x100 60. " DD60 ,Data Direction Port 15 Pin 60" "Input,Output"
|
|
setclrfld.quad 0x00 59. -0x108 59. -0x100 59. " DD59 ,Data Direction Port 15 Pin 59" "Input,Output"
|
|
setclrfld.quad 0x00 58. -0x108 58. -0x100 58. " DD58 ,Data Direction Port 15 Pin 58" "Input,Output"
|
|
setclrfld.quad 0x00 57. -0x108 57. -0x100 57. " DD57 ,Data Direction Port 15 Pin 57" "Input,Output"
|
|
setclrfld.quad 0x00 56. -0x108 56. -0x100 56. " DD56 ,Data Direction Port 15 Pin 56" "Input,Output"
|
|
setclrfld.quad 0x00 55. -0x108 55. -0x100 55. " DD55 ,Data Direction Port 15 Pin 55" "Input,Output"
|
|
setclrfld.quad 0x00 54. -0x108 54. -0x100 54. " DD54 ,Data Direction Port 15 Pin 54" "Input,Output"
|
|
setclrfld.quad 0x00 53. -0x108 53. -0x100 53. " DD53 ,Data Direction Port 15 Pin 53" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x108 52. -0x100 52. " DD52 ,Data Direction Port 15 Pin 52" "Input,Output"
|
|
setclrfld.quad 0x00 51. -0x108 51. -0x100 51. " DD51 ,Data Direction Port 15 Pin 51" "Input,Output"
|
|
setclrfld.quad 0x00 50. -0x108 50. -0x100 50. " DD50 ,Data Direction Port 15 Pin 50" "Input,Output"
|
|
setclrfld.quad 0x00 49. -0x108 49. -0x100 49. " DD49 ,Data Direction Port 15 Pin 49" "Input,Output"
|
|
setclrfld.quad 0x00 48. -0x108 48. -0x100 48. " DD48 ,Data Direction Port 15 Pin 48" "Input,Output"
|
|
setclrfld.quad 0x00 47. -0x108 47. -0x100 47. " DD47 ,Data Direction Port 15 Pin 47" "Input,Output"
|
|
setclrfld.quad 0x00 46. -0x108 46. -0x100 46. " DD46 ,Data Direction Port 15 Pin 46" "Input,Output"
|
|
setclrfld.quad 0x00 45. -0x108 45. -0x100 45. " DD45 ,Data Direction Port 15 Pin 45" "Input,Output"
|
|
setclrfld.quad 0x00 44. -0x108 44. -0x100 44. " DD44 ,Data Direction Port 15 Pin 44" "Input,Output"
|
|
setclrfld.quad 0x00 43. -0x108 43. -0x100 43. " DD43 ,Data Direction Port 15 Pin 43" "Input,Output"
|
|
setclrfld.quad 0x00 42. -0x108 42. -0x100 42. " DD42 ,Data Direction Port 15 Pin 42" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x108 41. -0x100 41. " DD41 ,Data Direction Port 15 Pin 41" "Input,Output"
|
|
setclrfld.quad 0x00 40. -0x108 40. -0x100 40. " DD40 ,Data Direction Port 15 Pin 40" "Input,Output"
|
|
setclrfld.quad 0x00 39. -0x108 39. -0x100 39. " DD39 ,Data Direction Port 15 Pin 39" "Input,Output"
|
|
setclrfld.quad 0x00 38. -0x108 38. -0x100 38. " DD38 ,Data Direction Port 15 Pin 38" "Input,Output"
|
|
setclrfld.quad 0x00 37. -0x108 37. -0x100 37. " DD37 ,Data Direction Port 15 Pin 37" "Input,Output"
|
|
setclrfld.quad 0x00 36. -0x108 36. -0x100 36. " DD36 ,Data Direction Port 15 Pin 36" "Input,Output"
|
|
setclrfld.quad 0x00 35. -0x108 35. -0x100 35. " DD35 ,Data Direction Port 15 Pin 35" "Input,Output"
|
|
setclrfld.quad 0x00 34. -0x108 34. -0x100 34. " DD34 ,Data Direction Port 15 Pin 34" "Input,Output"
|
|
setclrfld.quad 0x00 33. -0x108 33. -0x100 33. " DD33 ,Data Direction Port 15 Pin 33" "Input,Output"
|
|
setclrfld.quad 0x00 32. -0x108 32. -0x100 32. " DD32 ,Data Direction Port 15 Pin 32" "Input,Output"
|
|
setclrfld.quad 0x00 31. -0x108 31. -0x100 31. " DD31 ,Data Direction Port 15 Pin 31" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x108 30. -0x100 30. " DD30 ,Data Direction Port 15 Pin 30" "Input,Output"
|
|
setclrfld.quad 0x00 29. -0x108 29. -0x100 29. " DD29 ,Data Direction Port 15 Pin 29" "Input,Output"
|
|
setclrfld.quad 0x00 28. -0x108 28. -0x100 28. " DD28 ,Data Direction Port 15 Pin 28" "Input,Output"
|
|
setclrfld.quad 0x00 27. -0x108 27. -0x100 27. " DD27 ,Data Direction Port 15 Pin 27" "Input,Output"
|
|
setclrfld.quad 0x00 26. -0x108 26. -0x100 26. " DD26 ,Data Direction Port 15 Pin 26" "Input,Output"
|
|
setclrfld.quad 0x00 25. -0x108 25. -0x100 25. " DD25 ,Data Direction Port 15 Pin 25" "Input,Output"
|
|
setclrfld.quad 0x00 24. -0x108 24. -0x100 24. " DD24 ,Data Direction Port 15 Pin 24" "Input,Output"
|
|
setclrfld.quad 0x00 23. -0x108 23. -0x100 23. " DD23 ,Data Direction Port 15 Pin 23" "Input,Output"
|
|
setclrfld.quad 0x00 22. -0x108 22. -0x100 22. " DD22 ,Data Direction Port 15 Pin 22" "Input,Output"
|
|
setclrfld.quad 0x00 21. -0x108 21. -0x100 21. " DD21 ,Data Direction Port 15 Pin 21" "Input,Output"
|
|
setclrfld.quad 0x00 20. -0x108 20. -0x100 20. " DD20 ,Data Direction Port 15 Pin 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x108 19. -0x100 19. " DD19 ,Data Direction Port 15 Pin 19" "Input,Output"
|
|
setclrfld.quad 0x00 18. -0x108 18. -0x100 18. " DD18 ,Data Direction Port 15 Pin 18" "Input,Output"
|
|
setclrfld.quad 0x00 17. -0x108 17. -0x100 17. " DD17 ,Data Direction Port 15 Pin 17" "Input,Output"
|
|
setclrfld.quad 0x00 16. -0x108 16. -0x100 16. " DD16 ,Data Direction Port 15 Pin 16" "Input,Output"
|
|
setclrfld.quad 0x00 15. -0x108 15. -0x100 15. " DD15 ,Data Direction Port 15 Pin 15" "Input,Output"
|
|
setclrfld.quad 0x00 14. -0x108 14. -0x100 14. " DD14 ,Data Direction Port 15 Pin 14" "Input,Output"
|
|
setclrfld.quad 0x00 13. -0x108 13. -0x100 13. " DD13 ,Data Direction Port 15 Pin 13" "Input,Output"
|
|
setclrfld.quad 0x00 12. -0x108 12. -0x100 12. " DD12 ,Data Direction Port 15 Pin 12" "Input,Output"
|
|
setclrfld.quad 0x00 11. -0x108 11. -0x100 11. " DD11 ,Data Direction Port 15 Pin 11" "Input,Output"
|
|
setclrfld.quad 0x00 10. -0x108 10. -0x100 10. " DD10 ,Data Direction Port 15 Pin 10" "Input,Output"
|
|
setclrfld.quad 0x00 9. -0x108 9. -0x100 9. " DD9 ,Data Direction Port 15 Pin 9" "Input,Output"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x108 8. -0x100 8. " DD8 ,Data Direction Port 15 Pin 8" "Input,Output"
|
|
setclrfld.quad 0x00 7. -0x108 7. -0x100 7. " DD7 ,Data Direction Port 15 Pin 7" "Input,Output"
|
|
setclrfld.quad 0x00 6. -0x108 6. -0x100 6. " DD6 ,Data Direction Port 15 Pin 6" "Input,Output"
|
|
setclrfld.quad 0x00 5. -0x108 5. -0x100 5. " DD5 ,Data Direction Port 15 Pin 5" "Input,Output"
|
|
setclrfld.quad 0x00 4. -0x108 4. -0x100 4. " DD4 ,Data Direction Port 15 Pin 4" "Input,Output"
|
|
setclrfld.quad 0x00 3. -0x108 3. -0x100 3. " DD3 ,Data Direction Port 15 Pin 3" "Input,Output"
|
|
setclrfld.quad 0x00 2. -0x108 2. -0x100 2. " DD2 ,Data Direction Port 15 Pin 2" "Input,Output"
|
|
setclrfld.quad 0x00 1. -0x108 1. -0x100 1. " DD1 ,Data Direction Port 15 Pin 1" "Input,Output"
|
|
setclrfld.quad 0x00 0. -0x108 0. -0x100 0. " DD0 ,Data Direction Port 15 Pin 0" "Input,Output"
|
|
endif
|
|
endif
|
|
tree.end
|
|
tree "Port Data Output Registers"
|
|
group.quad 0x200++0x07
|
|
line.quad 0x00 "GPIO_PODR0,Port Output Data Register for Channel 0"
|
|
setclrfld.quad 0x00 63. -0x200 63. -0x1F8 63. " POD63 ,Port Output Data 0 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x200 62. -0x1F8 62. " POD62 ,Port Output Data 0 Pin 62" "Low,High"
|
|
textline " "
|
|
sif cpu()!="MB9EF226"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
sif cpu()!="MB9EF126"
|
|
setclrfld.quad 0x00 61. -0x200 61. -0x1F8 61. " POD61 ,Port Output Data 0 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x200 60. -0x1F8 60. " POD60 ,Port Output Data 0 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x200 59. -0x1F8 59. " POD59 ,Port Output Data 0 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x200 58. -0x1F8 58. " POD58 ,Port Output Data 0 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x200 57. -0x1F8 57. " POD57 ,Port Output Data 0 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x200 56. -0x1F8 56. " POD56 ,Port Output Data 0 Pin 56" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 55. -0x200 55. -0x1F8 55. " POD55 ,Port Output Data 0 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x200 54. -0x1F8 54. " POD54 ,Port Output Data 0 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x200 53. -0x1F8 53. " POD53 ,Port Output Data 0 Pin 53" "Low,High"
|
|
textline " "
|
|
endif
|
|
setclrfld.quad 0x00 52. -0x200 52. -0x1F8 52. " POD52 ,Port Output Data 0 Pin 52" "Low,High"
|
|
endif
|
|
setclrfld.quad 0x00 51. -0x200 51. -0x1F8 51. " POD51 ,Port Output Data 0 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x200 50. -0x1F8 50. " POD50 ,Port Output Data 0 Pin 50" "Low,High"
|
|
textline " "
|
|
endif
|
|
setclrfld.quad 0x00 49. -0x200 49. -0x1F8 49. " POD49 ,Port Output Data 0 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x200 48. -0x1F8 48. " POD48 ,Port Output Data 0 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x200 47. -0x1F8 47. " POD47 ,Port Output Data 0 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x200 46. -0x1F8 46. " POD46 ,Port Output Data 0 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x200 45. -0x1F8 45. " POD45 ,Port Output Data 0 Pin 45" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 44. -0x200 44. -0x1F8 44. " POD44 ,Port Output Data 0 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x200 43. -0x1F8 43. " POD43 ,Port Output Data 0 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x200 42. -0x1F8 42. " POD42 ,Port Output Data 0 Pin 42" "Low,High"
|
|
setclrfld.quad 0x00 41. -0x200 41. -0x1F8 41. " POD41 ,Port Output Data 0 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x200 40. -0x1F8 40. " POD40 ,Port Output Data 0 Pin 40" "Low,High"
|
|
textline " "
|
|
sif cpu()!="MB9DF126"
|
|
sif cpu()!="MB9EF226"
|
|
sif cpu()!="MB9DF125"
|
|
setclrfld.quad 0x00 39. -0x200 39. -0x1F8 39. " POD39 ,Port Output Data 0 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x200 38. -0x1F8 38. " POD38 ,Port Output Data 0 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x200 37. -0x1F8 37. " POD37 ,Port Output Data 0 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x200 36. -0x1F8 36. " POD36 ,Port Output Data 0 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x200 35. -0x1F8 35. " POD35 ,Port Output Data 0 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x200 34. -0x1F8 34. " POD34 ,Port Output Data 0 Pin 34" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 33. -0x200 33. -0x1F8 33. " POD33 ,Port Output Data 0 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x200 32. -0x1F8 32. " POD32 ,Port Output Data 0 Pin 32" "Low,High"
|
|
setclrfld.quad 0x00 31. -0x200 31. -0x1F8 31. " POD31 ,Port Output Data 0 Pin 31" "Low,High"
|
|
setclrfld.quad 0x00 30. -0x200 30. -0x1F8 30. " POD30 ,Port Output Data 0 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x200 29. -0x1F8 29. " POD29 ,Port Output Data 0 Pin 29" "Low,High"
|
|
textline " "
|
|
endif
|
|
setclrfld.quad 0x00 28. -0x200 28. -0x1F8 28. " POD28 ,Port Output Data 0 Pin 28" "Low,High"
|
|
setclrfld.quad 0x00 27. -0x200 27. -0x1F8 27. " POD27 ,Port Output Data 0 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x200 26. -0x1F8 26. " POD26 ,Port Output Data 0 Pin 26" "Low,High"
|
|
textline " "
|
|
endif
|
|
setclrfld.quad 0x00 25. -0x200 25. -0x1F8 25. " POD25 ,Port Output Data 0 Pin 25" "Low,High"
|
|
setclrfld.quad 0x00 24. -0x200 24. -0x1F8 24. " POD24 ,Port Output Data 0 Pin 24" "Low,High"
|
|
textline " "
|
|
endif
|
|
sif cpu()!="MB9EF226"
|
|
sif cpu()!="MB9DF125"
|
|
setclrfld.quad 0x00 23. -0x200 23. -0x1F8 23. " POD23 ,Port Output Data 0 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x200 22. -0x1F8 22. " POD22 ,Port Output Data 0 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x200 21. -0x1F8 21. " POD21 ,Port Output Data 0 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x200 20. -0x1F8 20. " POD20 ,Port Output Data 0 Pin 20" "Low,High"
|
|
setclrfld.quad 0x00 19. -0x200 19. -0x1F8 19. " POD19 ,Port Output Data 0 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x200 18. -0x1F8 18. " POD18 ,Port Output Data 0 Pin 18" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 17. -0x200 17. -0x1F8 17. " POD17 ,Port Output Data 0 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x200 16. -0x1F8 16. " POD16 ,Port Output Data 0 Pin 16" "Low,High"
|
|
endif
|
|
setclrfld.quad 0x00 15. -0x200 15. -0x1F8 15. " POD15 ,Port Output Data 0 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x200 14. -0x1F8 14. " POD14 ,Port Output Data 0 Pin 14" "Low,High"
|
|
setclrfld.quad 0x00 13. -0x200 13. -0x1F8 13. " POD13 ,Port Output Data 0 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x200 12. -0x1F8 12. " POD12 ,Port Output Data 0 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x200 11. -0x1F8 11. " POD11 ,Port Output Data 0 Pin 11" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 10. -0x200 10. -0x1F8 10. " POD10 ,Port Output Data 0 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x200 9. -0x1F8 9. " POD9 ,Port Output Data 0 Pin 9" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x200 8. -0x1F8 8. " POD8 ,Port Output Data 0 Pin 8" "Low,High"
|
|
sif cpu()!="MB9DF125"
|
|
setclrfld.quad 0x00 7. -0x200 7. -0x1F8 7. " POD7 ,Port Output Data 0 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x200 6. -0x1F8 6. " POD6 ,Port Output Data 0 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x200 5. -0x1F8 5. " POD5 ,Port Output Data 0 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x200 4. -0x1F8 4. " POD4 ,Port Output Data 0 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x200 3. -0x1F8 3. " POD3 ,Port Output Data 0 Pin 3" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 2. -0x200 2. -0x1F8 2. " POD2 ,Port Output Data 0 Pin 2" "Low,High"
|
|
setclrfld.quad 0x00 1. -0x200 1. -0x1F8 1. " POD1 ,Port Output Data 0 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x200 0. -0x1F8 0. " POD0 ,Port Output Data 0 Pin 0" "Low,High"
|
|
endif
|
|
endif
|
|
group.quad 0x210++0x7
|
|
line.quad 0x00 "GPIO_PODR1,Port Output Data Register for Channel 1"
|
|
sif cpu()!="MB9DF125"
|
|
sif cpu()!="MB9EF126"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.quad 0x00 63. -0x1F0 63. -0x1E8 63. " POD63 ,Port Output Data 1 Pin 63" "Low,High"
|
|
endif
|
|
setclrfld.quad 0x00 62. -0x1F0 62. -0x1E8 62. " POD62 ,Port Output Data 1 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x1F0 61. -0x1E8 61. " POD61 ,Port Output Data 1 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x1F0 60. -0x1E8 60. " POD60 ,Port Output Data 1 Pin 60" "Low,High"
|
|
textline " "
|
|
endif
|
|
setclrfld.quad 0x00 59. -0x1F0 59. -0x1E8 59. " POD59 ,Port Output Data 1 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x1F0 58. -0x1E8 58. " POD58 ,Port Output Data 1 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x1F0 57. -0x1E8 57. " POD57 ,Port Output Data 1 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x1F0 56. -0x1E8 56. " POD56 ,Port Output Data 1 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x1F0 55. -0x1E8 55. " POD55 ,Port Output Data 1 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x1F0 54. -0x1E8 54. " POD54 ,Port Output Data 1 Pin 54" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 53. -0x1F0 53. -0x1E8 53. " POD53 ,Port Output Data 1 Pin 53" "Low,High"
|
|
setclrfld.quad 0x00 52. -0x1F0 52. -0x1E8 52. " POD52 ,Port Output Data 1 Pin 52" "Low,High"
|
|
setclrfld.quad 0x00 51. -0x1F0 51. -0x1E8 51. " POD51 ,Port Output Data 1 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x1F0 50. -0x1E8 50. " POD50 ,Port Output Data 1 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x1F0 49. -0x1E8 49. " POD49 ,Port Output Data 1 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x1F0 48. -0x1E8 48. " POD48 ,Port Output Data 1 Pin 48" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 47. -0x1F0 47. -0x1E8 47. " POD47 ,Port Output Data 1 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x1F0 46. -0x1E8 46. " POD46 ,Port Output Data 1 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x1F0 45. -0x1E8 45. " POD45 ,Port Output Data 1 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x1F0 44. -0x1E8 44. " POD44 ,Port Output Data 1 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x1F0 43. -0x1E8 43. " POD43 ,Port Output Data 1 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x1F0 42. -0x1E8 42. " POD42 ,Port Output Data 1 Pin 42" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x1F0 41. -0x1E8 41. " POD41 ,Port Output Data 1 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x1F0 40. -0x1E8 40. " POD40 ,Port Output Data 1 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x1F0 39. -0x1E8 39. " POD39 ,Port Output Data 1 Pin 39" "Low,High"
|
|
textline " "
|
|
endif
|
|
sif cpu()!="MB9DF126"
|
|
setclrfld.quad 0x00 38. -0x1F0 38. -0x1E8 38. " POD38 ,Port Output Data 1 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x1F0 37. -0x1E8 37. " POD37 ,Port Output Data 1 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x1F0 36. -0x1E8 36. " POD36 ,Port Output Data 1 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x1F0 35. -0x1E8 35. " POD35 ,Port Output Data 1 Pin 35 " "Low,High"
|
|
setclrfld.quad 0x00 34. -0x1F0 34. -0x1E8 34. " POD34 ,Port Output Data 1 Pin 34 " "Low,High"
|
|
setclrfld.quad 0x00 33. -0x1F0 33. -0x1E8 33. " POD33 ,Port Output Data 1 Pin 33 " "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 32. -0x1F0 32. -0x1E8 32. " POD32 ,Port Output Data 1 Pin 32 " "Low,High"
|
|
setclrfld.quad 0x00 31. -0x1F0 31. -0x1E8 31. " POD31 ,Port Output Data 1 Pin 31 " "Low,High"
|
|
setclrfld.quad 0x00 30. -0x1F0 30. -0x1E8 30. " POD30 ,Port Output Data 1 Pin 30 " "Low,High"
|
|
setclrfld.quad 0x00 29. -0x1F0 29. -0x1E8 29. " POD29 ,Port Output Data 1 Pin 29 " "Low,High"
|
|
setclrfld.quad 0x00 28. -0x1F0 28. -0x1E8 28. " POD28 ,Port Output Data 1 Pin 28 " "Low,High"
|
|
setclrfld.quad 0x00 27. -0x1F0 27. -0x1E8 27. " POD27 ,Port Output Data 1 Pin 27 " "Low,High"
|
|
setclrfld.quad 0x00 26. -0x1F0 26. -0x1E8 26. " POD26 ,Port Output Data 1 Pin 26 " "Low,High"
|
|
textline " "
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.quad 0x00 25. -0x1F0 25. -0x1E8 25. " POD25 ,Port Output Data 1 Pin 25 " "Low,High"
|
|
setclrfld.quad 0x00 24. -0x1F0 24. -0x1E8 24. " POD24 ,Port Output Data 1 Pin 24 " "Low,High"
|
|
endif
|
|
setclrfld.quad 0x00 23. -0x1F0 23. -0x1E8 23. " POD23 ,Port Output Data 1 Pin 23 " "Low,High"
|
|
setclrfld.quad 0x00 22. -0x1F0 22. -0x1E8 22. " POD22 ,Port Output Data 1 Pin 22 " "Low,High"
|
|
setclrfld.quad 0x00 21. -0x1F0 21. -0x1E8 21. " POD21 ,Port Output Data 1 Pin 21 " "Low,High"
|
|
setclrfld.quad 0x00 20. -0x1F0 20. -0x1E8 20. " POD20 ,Port Output Data 1 Pin 20 " "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x1F0 19. -0x1E8 19. " POD19 ,Port Output Data 1 Pin 19 " "Low,High"
|
|
setclrfld.quad 0x00 18. -0x1F0 18. -0x1E8 18. " POD18 ,Port Output Data 1 Pin 18 " "Low,High"
|
|
setclrfld.quad 0x00 17. -0x1F0 17. -0x1E8 17. " POD17 ,Port Output Data 1 Pin 17 " "Low,High"
|
|
setclrfld.quad 0x00 16. -0x1F0 16. -0x1E8 16. " POD16 ,Port Output Data 1 Pin 16 " "Low,High"
|
|
setclrfld.quad 0x00 15. -0x1F0 15. -0x1E8 15. " POD15 ,Port Output Data 1 Pin 15 " "Low,High"
|
|
setclrfld.quad 0x00 14. -0x1F0 14. -0x1E8 14. " POD14 ,Port Output Data 1 Pin 14 " "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 13. -0x1F0 13. -0x1E8 13. " POD13 ,Port Output Data 1 Pin 13 " "Low,High"
|
|
setclrfld.quad 0x00 12. -0x1F0 12. -0x1E8 12. " POD12 ,Port Output Data 1 Pin 12 " "Low,High"
|
|
setclrfld.quad 0x00 11. -0x1F0 11. -0x1E8 11. " POD11 ,Port Output Data 1 Pin 11 " "Low,High"
|
|
setclrfld.quad 0x00 10. -0x1F0 10. -0x1E8 10. " POD10 ,Port Output Data 1 Pin 10 " "Low,High"
|
|
setclrfld.quad 0x00 9. -0x1F0 9. -0x1E8 9. " POD9 ,Port Output Data 1 Pin 9" "Low,High"
|
|
setclrfld.quad 0x00 8. -0x1F0 8. -0x1E8 8. " POD8 ,Port Output Data 1 Pin 8" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 7. -0x1F0 7. -0x1E8 7. " POD7 ,Port Output Data 1 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x1F0 6. -0x1E8 6. " POD6 ,Port Output Data 1 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x1F0 5. -0x1E8 5. " POD5 ,Port Output Data 1 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x1F0 4. -0x1E8 4. " POD4 ,Port Output Data 1 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x1F0 3. -0x1E8 3. " POD3 ,Port Output Data 1 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x1F0 2. -0x1E8 2. " POD2 ,Port Output Data 1 Pin 2" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 1. -0x1F0 1. -0x1E8 1. " POD1 ,Port Output Data 1 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x1F0 0. -0x1E8 0. " POD0 ,Port Output Data 1 Pin 0" "Low,High"
|
|
endif
|
|
group.quad 0x220++0x7
|
|
line.quad 0x00 "GPIO_PODR2,Port Output Data Register for Channel 2"
|
|
sif cpu()!="MB9EF126"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.quad 0x00 63. -0x1E0 63. -0x1D8 63. " POD63 ,Port Output Data 2 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x1E0 62. -0x1D8 62. " POD62 ,Port Output Data 2 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x1E0 61. -0x1D8 61. " POD61 ,Port Output Data 2 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x1E0 60. -0x1D8 60. " POD60 ,Port Output Data 2 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x1E0 59. -0x1D8 59. " POD59 ,Port Output Data 2 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x1E0 58. -0x1D8 58. " POD58 ,Port Output Data 2 Pin 58" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 50. -0x140 57. -0x1D8 57. " POD57 ,Port Output Data 2 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x1E0 56. -0x1D8 56. " POD56 ,Port Output Data 2 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x1E0 55. -0x1D8 55. " POD55 ,Port Output Data 2 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x1E0 54. -0x1D8 54. " POD54 ,Port Output Data 2 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x1E0 53. -0x1D8 53. " POD53 ,Port Output Data 2 Pin 53" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x1E0 52. -0x1D8 52. " POD52 ,Port Output Data 2 Pin 52" "Low,High"
|
|
endif
|
|
setclrfld.quad 0x00 51. -0x1E0 51. -0x1D8 51. " POD51 ,Port Output Data 2 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x1E0 50. -0x1D8 50. " POD50 ,Port Output Data 2 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x1E0 49. -0x1D8 49. " POD49 ,Port Output Data 2 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x1E0 48. -0x1D8 48. " POD48 ,Port Output Data 2 Pin 48" "Low,High"
|
|
textline " "
|
|
endif
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.quad 0x00 47. -0x1E0 47. -0x1D8 47. " POD47 ,Port Output Data 2 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x1E0 46. -0x1D8 46. " POD46 ,Port Output Data 2 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x1E0 45. -0x1D8 45. " POD45 ,Port Output Data 2 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x1E0 44. -0x1D8 44. " POD44 ,Port Output Data 2 Pin 44" "Low,High"
|
|
textline " "
|
|
endif
|
|
setclrfld.quad 0x00 43. -0x1E0 43. -0x1D8 43. " POD43 ,Port Output Data 2 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x1E0 42. -0x1D8 42. " POD42 ,Port Output Data 2 Pin 42" "Low,High"
|
|
setclrfld.quad 0x00 41. -0x1E0 41. -0x1D8 41. " POD41 ,Port Output Data 2 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x1E0 40. -0x1D8 40. " POD40 ,Port Output Data 2 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x1E0 39. -0x1D8 39. " POD39 ,Port Output Data 2 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x1E0 38. -0x1D8 38. " POD38 ,Port Output Data 2 Pin 38" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 37. -0x1E0 37. -0x1D8 37. " POD37 ,Port Output Data 2 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x1E0 36. -0x1D8 36. " POD36 ,Port Output Data 2 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x1E0 35. -0x1D8 35. " POD35 ,Port Output Data 2 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x1E0 34. -0x1D8 34. " POD34 ,Port Output Data 2 Pin 34" "Low,High"
|
|
setclrfld.quad 0x00 33. -0x1E0 33. -0x1D8 33. " POD33 ,Port Output Data 2 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x1E0 32. -0x1D8 32. " POD32 ,Port Output Data 2 Pin 32" "Low,High"
|
|
textline " "
|
|
sif cpu()!="MB9DF125"
|
|
sif cpu()!="MB9DF126"
|
|
sif cpu()!="MB9EF226"
|
|
setclrfld.quad 0x00 31. -0x1E0 31. -0x1D8 31. " POD31 ,Port Output Data 2 Pin 31" "Low,High"
|
|
setclrfld.quad 0x00 30. -0x1E0 30. -0x1D8 30. " POD30 ,Port Output Data 2 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x1E0 29. -0x1D8 29. " POD29 ,Port Output Data 2 Pin 29" "Low,High"
|
|
setclrfld.quad 0x00 28. -0x1E0 28. -0x1D8 28. " POD28 ,Port Output Data 2 Pin 28" "Low,High"
|
|
setclrfld.quad 0x00 27. -0x1E0 27. -0x1D8 27. " POD27 ,Port Output Data 2 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x1E0 26. -0x1D8 26. " POD26 ,Port Output Data 2 Pin 26" "Low,High"
|
|
textline " "
|
|
endif
|
|
endif
|
|
setclrfld.quad 0x00 25. -0x1E0 25. -0x1D8 25. " POD25 ,Port Output Data 2 Pin 25" "Low,High"
|
|
setclrfld.quad 0x00 24. -0x1E0 24. -0x1D8 24. " POD24 ,Port Output Data 2 Pin 24" "Low,High"
|
|
setclrfld.quad 0x00 23. -0x1E0 23. -0x1D8 23. " POD23 ,Port Output Data 2 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x1E0 22. -0x1D8 22. " POD22 ,Port Output Data 2 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x1E0 21. -0x1D8 21. " POD21 ,Port Output Data 2 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x1E0 20. -0x1D8 20. " POD20 ,Port Output Data 2 Pin 20" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x1E0 19. -0x1D8 19. " POD19 ,Port Output Data 2 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x1E0 18. -0x1D8 18. " POD18 ,Port Output Data 2 Pin 18" "Low,High"
|
|
setclrfld.quad 0x00 17. -0x1E0 17. -0x1D8 17. " POD17 ,Port Output Data 2 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x1E0 16. -0x1D8 16. " POD16 ,Port Output Data 2 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x1E0 15. -0x1D8 15. " POD15 ,Port Output Data 2 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x1E0 14. -0x1D8 14. " POD14 ,Port Output Data 2 Pin 14" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 13. -0x1E0 13. -0x1D8 13. " POD13 ,Port Output Data 2 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x1E0 12. -0x1D8 12. " POD12 ,Port Output Data 2 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x1E0 11. -0x1D8 11. " POD11 ,Port Output Data 2 Pin 11" "Low,High"
|
|
setclrfld.quad 0x00 10. -0x1E0 10. -0x1D8 10. " POD10 ,Port Output Data 2 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x1E0 9. -0x1D8 9. " POD9 ,Port Output Data 2 Pin 9" "Low,High"
|
|
setclrfld.quad 0x00 8. -0x1E0 8. -0x1D8 8. " POD8 ,Port Output Data 2 Pin 8" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 7. -0x1E0 7. -0x1D8 7. " POD7 ,Port Output Data 2 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x1E0 6. -0x1D8 6. " POD6 ,Port Output Data 2 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x1E0 5. -0x1D8 5. " POD5 ,Port Output Data 2 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x1E0 4. -0x1D8 4. " POD4 ,Port Output Data 2 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x1E0 3. -0x1D8 3. " POD3 ,Port Output Data 2 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x1E0 2. -0x1D8 2. " POD2 ,Port Output Data 2 Pin 2" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 1. -0x1E0 1. -0x1D8 1. " POD1 ,Port Output Data 2 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x1E0 0. -0x1D8 0. " POD0 ,Port Output Data 2 Pin 0" "Low,High"
|
|
endif
|
|
endif
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126")
|
|
group.quad 0x230++0x7
|
|
line.quad 0x00 "GPIO_PODR3,Port Output Data Register for Channel 3"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
setclrfld.quad 0x00 63. -0x1D0 63. -0x1C8 63. " POD63 ,Port Output Data 3 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x1D0 62. -0x1C8 62. " POD62 ,Port Output Data 3 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x1D0 61. -0x1C8 61. " POD61 ,Port Output Data 3 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x1D0 60. -0x1C8 60. " POD60 ,Port Output Data 3 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x1D0 59. -0x1C8 59. " POD59 ,Port Output Data 3 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x1D0 58. -0x1C8 58. " POD58 ,Port Output Data 3 Pin 58" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 57. -0x1D0 57. -0x1C8 57. " POD57 ,Port Output Data 3 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x1D0 56. -0x1C8 56. " POD56 ,Port Output Data 3 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x1D0 55. -0x1C8 55. " POD55 ,Port Output Data 3 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x1D0 54. -0x1C8 54. " POD54 ,Port Output Data 3 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x1D0 53. -0x1C8 53. " POD53 ,Port Output Data 3 Pin 53" "Low,High"
|
|
setclrfld.quad 0x00 52. -0x1D0 52. -0x1C8 52. " POD52 ,Port Output Data 3 Pin 52" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 51. -0x1D0 51. -0x1C8 51. " POD51 ,Port Output Data 3 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x1D0 50. -0x1C8 50. " POD50 ,Port Output Data 3 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x1D0 49. -0x1C8 49. " POD49 ,Port Output Data 3 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x1D0 48. -0x1C8 48. " POD48 ,Port Output Data 3 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x1D0 47. -0x1C8 47. " POD47 ,Port Output Data 3 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x1D0 46. -0x1C8 46. " POD46 ,Port Output Data 3 Pin 46" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 45. -0x1D0 45. -0x1C8 45. " POD45 ,Port Output Data 3 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x1D0 44. -0x1C8 44. " POD44 ,Port Output Data 3 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x1D0 43. -0x1C8 43. " POD43 ,Port Output Data 3 Pin 43" "Low,High"
|
|
textline " "
|
|
endif
|
|
setclrfld.quad 0x00 42. -0x1D0 42. -0x1C8 42. " POD42 ,Port Output Data 3 Pin 42" "Low,High"
|
|
setclrfld.quad 0x00 41. -0x1D0 41. -0x1C8 41. " POD41 ,Port Output Data 3 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x1D0 40. -0x1C8 40. " POD40 ,Port Output Data 3 Pin 40" "Low,High"
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setclrfld.quad 0x00 39. -0x1D0 39. -0x1C8 39. " POD39 ,Port Output Data 3 Pin 39" "Low,High"
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setclrfld.quad 0x00 38. -0x1D0 38. -0x1C8 38. " POD38 ,Port Output Data 3 Pin 38" "Low,High"
|
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setclrfld.quad 0x00 37. -0x1D0 37. -0x1C8 37. " POD37 ,Port Output Data 3 Pin 37" "Low,High"
|
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textline " "
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setclrfld.quad 0x00 36. -0x1D0 36. -0x1C8 36. " POD36 ,Port Output Data 3 Pin 36" "Low,High"
|
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setclrfld.quad 0x00 35. -0x1D0 35. -0x1C8 35. " POD35 ,Port Output Data 3 Pin 35" "Low,High"
|
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setclrfld.quad 0x00 34. -0x1D0 34. -0x1C8 34. " POD34 ,Port Output Data 3 Pin 34" "Low,High"
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setclrfld.quad 0x00 33. -0x1D0 33. -0x1C8 33. " POD33 ,Port Output Data 3 Pin 33" "Low,High"
|
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setclrfld.quad 0x00 32. -0x1D0 32. -0x1C8 32. " POD32 ,Port Output Data 3 Pin 32" "Low,High"
|
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setclrfld.quad 0x00 31. -0x1D0 31. -0x1C8 31. " POD31 ,Port Output Data 3 Pin 31" "Low,High"
|
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textline " "
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setclrfld.quad 0x00 30. -0x1D0 30. -0x1C8 30. " POD30 ,Port Output Data 3 Pin 30" "Low,High"
|
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setclrfld.quad 0x00 29. -0x1D0 29. -0x1C8 29. " POD29 ,Port Output Data 3 Pin 29" "Low,High"
|
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setclrfld.quad 0x00 28. -0x1D0 28. -0x1C8 28. " POD28 ,Port Output Data 3 Pin 28" "Low,High"
|
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setclrfld.quad 0x00 27. -0x1D0 27. -0x1C8 27. " POD27 ,Port Output Data 3 Pin 27" "Low,High"
|
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setclrfld.quad 0x00 26. -0x1D0 26. -0x1C8 26. " POD26 ,Port Output Data 3 Pin 26" "Low,High"
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setclrfld.quad 0x00 25. -0x1D0 25. -0x1C8 25. " POD25 ,Port Output Data 3 Pin 25" "Low,High"
|
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textline " "
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setclrfld.quad 0x00 24. -0x1D0 24. -0x1C8 24. " POD24 ,Port Output Data 3 Pin 24" "Low,High"
|
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setclrfld.quad 0x00 23. -0x1D0 23. -0x1C8 23. " POD23 ,Port Output Data 3 Pin 23" "Low,High"
|
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setclrfld.quad 0x00 22. -0x1D0 22. -0x1C8 22. " POD22 ,Port Output Data 3 Pin 22" "Low,High"
|
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setclrfld.quad 0x00 21. -0x1D0 21. -0x1C8 21. " POD21 ,Port Output Data 3 Pin 21" "Low,High"
|
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setclrfld.quad 0x00 20. -0x1D0 20. -0x1C8 20. " POD20 ,Port Output Data 3 Pin 20" "Low,High"
|
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setclrfld.quad 0x00 19. -0x1D0 19. -0x1C8 19. " POD19 ,Port Output Data 3 Pin 19" "Low,High"
|
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textline " "
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setclrfld.quad 0x00 18. -0x1D0 18. -0x1C8 18. " POD18 ,Port Output Data 3 Pin 18" "Low,High"
|
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setclrfld.quad 0x00 17. -0x1D0 17. -0x1C8 17. " POD17 ,Port Output Data 3 Pin 17" "Low,High"
|
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setclrfld.quad 0x00 16. -0x1D0 16. -0x1C8 16. " POD16 ,Port Output Data 3 Pin 16" "Low,High"
|
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setclrfld.quad 0x00 15. -0x1D0 15. -0x1C8 15. " POD15 ,Port Output Data 3 Pin 15" "Low,High"
|
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setclrfld.quad 0x00 14. -0x1D0 14. -0x1C8 14. " POD14 ,Port Output Data 3 Pin 14" "Low,High"
|
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setclrfld.quad 0x00 13. -0x1D0 13. -0x1C8 13. " POD13 ,Port Output Data 3 Pin 13" "Low,High"
|
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textline " "
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setclrfld.quad 0x00 12. -0x1D0 12. -0x1C8 12. " POD12 ,Port Output Data 3 Pin 12" "Low,High"
|
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setclrfld.quad 0x00 11. -0x1D0 11. -0x1C8 11. " POD11 ,Port Output Data 3 Pin 11" "Low,High"
|
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setclrfld.quad 0x00 10. -0x1D0 10. -0x1C8 10. " POD10 ,Port Output Data 3 Pin 10" "Low,High"
|
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setclrfld.quad 0x00 9. -0x1D0 9. -0x1C8 9. " POD9 ,Port Output Data 3 Pin 9" "Low,High"
|
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setclrfld.quad 0x00 8. -0x1D0 8. -0x1C8 8. " POD8 ,Port Output Data 3 Pin 8" "Low,High"
|
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setclrfld.quad 0x00 7. -0x1D0 7. -0x1C8 7. " POD7 ,Port Output Data 3 Pin 7" "Low,High"
|
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textline " "
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setclrfld.quad 0x00 6. -0x1D0 6. -0x1C8 6. " POD6 ,Port Output Data 3 Pin 6" "Low,High"
|
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setclrfld.quad 0x00 5. -0x1D0 5. -0x1C8 5. " POD5 ,Port Output Data 3 Pin 5" "Low,High"
|
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setclrfld.quad 0x00 4. -0x1D0 4. -0x1C8 4. " POD4 ,Port Output Data 3 Pin 4" "Low,High"
|
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setclrfld.quad 0x00 3. -0x1D0 3. -0x1C8 3. " POD3 ,Port Output Data 3 Pin 3" "Low,High"
|
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setclrfld.quad 0x00 2. -0x1D0 2. -0x1C8 2. " POD2 ,Port Output Data 3 Pin 2" "Low,High"
|
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setclrfld.quad 0x00 1. -0x1D0 1. -0x1C8 1. " POD1 ,Port Output Data 3 Pin 1" "Low,High"
|
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setclrfld.quad 0x00 0. -0x1D0 0. -0x1C8 0. " POD0 ,Port Output Data 3 Pin 0" "Low,High"
|
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sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
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group.quad 0x240++0x7
|
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line.quad 0x00 "GPIO_PODR4,Port Output Data Register for Channel 4"
|
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setclrfld.quad 0x00 63. -0x1C0 63. -0x1B8 63. " POD63 ,Port Output Data 4 Pin 63" "Low,High"
|
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setclrfld.quad 0x00 62. -0x1C0 62. -0x1B8 62. " POD62 ,Port Output Data 4 Pin 62" "Low,High"
|
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setclrfld.quad 0x00 61. -0x1C0 61. -0x1B8 61. " POD61 ,Port Output Data 4 Pin 61" "Low,High"
|
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setclrfld.quad 0x00 60. -0x1C0 60. -0x1B8 60. " POD60 ,Port Output Data 4 Pin 60" "Low,High"
|
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setclrfld.quad 0x00 59. -0x1C0 59. -0x1B8 59. " POD59 ,Port Output Data 4 Pin 59" "Low,High"
|
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setclrfld.quad 0x00 58. -0x1C0 58. -0x1B8 58. " POD58 ,Port Output Data 4 Pin 58" "Low,High"
|
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setclrfld.quad 0x00 57. -0x1C0 57. -0x1B8 57. " POD57 ,Port Output Data 4 Pin 57" "Low,High"
|
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textline " "
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setclrfld.quad 0x00 56. -0x1C0 56. -0x1B8 56. " POD56 ,Port Output Data 4 Pin 56" "Low,High"
|
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setclrfld.quad 0x00 55. -0x1C0 55. -0x1B8 55. " POD55 ,Port Output Data 4 Pin 55" "Low,High"
|
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setclrfld.quad 0x00 54. -0x1C0 54. -0x1B8 54. " POD54 ,Port Output Data 4 Pin 54" "Low,High"
|
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setclrfld.quad 0x00 53. -0x1C0 53. -0x1B8 53. " POD53 ,Port Output Data 4 Pin 53" "Low,High"
|
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setclrfld.quad 0x00 52. -0x1C0 52. -0x1B8 52. " POD52 ,Port Output Data 4 Pin 52" "Low,High"
|
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setclrfld.quad 0x00 51. -0x1C0 51. -0x1B8 51. " POD51 ,Port Output Data 4 Pin 51" "Low,High"
|
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textline " "
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setclrfld.quad 0x00 50. -0x1C0 50. -0x1B8 50. " POD50 ,Port Output Data 4 Pin 50" "Low,High"
|
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setclrfld.quad 0x00 49. -0x1C0 49. -0x1B8 49. " POD49 ,Port Output Data 4 Pin 49" "Low,High"
|
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setclrfld.quad 0x00 48. -0x1C0 48. -0x1B8 48. " POD48 ,Port Output Data 4 Pin 48" "Low,High"
|
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setclrfld.quad 0x00 47. -0x1C0 47. -0x1B8 47. " POD47 ,Port Output Data 4 Pin 47" "Low,High"
|
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setclrfld.quad 0x00 46. -0x1C0 46. -0x1B8 46. " POD46 ,Port Output Data 4 Pin 46" "Low,High"
|
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setclrfld.quad 0x00 45. -0x1C0 45. -0x1B8 45. " POD45 ,Port Output Data 4 Pin 45" "Low,High"
|
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textline " "
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setclrfld.quad 0x00 44. -0x1C0 44. -0x1B8 44. " POD44 ,Port Output Data 4 Pin 44" "Low,High"
|
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setclrfld.quad 0x00 43. -0x1C0 43. -0x1B8 43. " POD43 ,Port Output Data 4 Pin 43" "Low,High"
|
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setclrfld.quad 0x00 42. -0x1C0 42. -0x1B8 42. " POD42 ,Port Output Data 4 Pin 42" "Low,High"
|
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setclrfld.quad 0x00 41. -0x1C0 41. -0x1B8 41. " POD41 ,Port Output Data 4 Pin 41" "Low,High"
|
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setclrfld.quad 0x00 40. -0x1C0 40. -0x1B8 40. " POD40 ,Port Output Data 4 Pin 40" "Low,High"
|
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setclrfld.quad 0x00 39. -0x1C0 39. -0x1B8 39. " POD39 ,Port Output Data 4 Pin 39" "Low,High"
|
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textline " "
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setclrfld.quad 0x00 38. -0x1C0 38. -0x1B8 38. " POD38 ,Port Output Data 4 Pin 38" "Low,High"
|
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setclrfld.quad 0x00 37. -0x1C0 37. -0x1B8 37. " POD37 ,Port Output Data 4 Pin 37" "Low,High"
|
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setclrfld.quad 0x00 36. -0x1C0 36. -0x1B8 36. " POD36 ,Port Output Data 4 Pin 36" "Low,High"
|
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setclrfld.quad 0x00 35. -0x1C0 35. -0x1B8 35. " POD35 ,Port Output Data 4 Pin 35" "Low,High"
|
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setclrfld.quad 0x00 34. -0x1C0 34. -0x1B8 34. " POD34 ,Port Output Data 4 Pin 34" "Low,High"
|
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setclrfld.quad 0x00 33. -0x1C0 33. -0x1B8 33. " POD33 ,Port Output Data 4 Pin 33" "Low,High"
|
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textline " "
|
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setclrfld.quad 0x00 32. -0x1C0 32. -0x1B8 32. " POD32 ,Port Output Data 4 Pin 32" "Low,High"
|
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setclrfld.quad 0x00 31. -0x1C0 31. -0x1B8 31. " POD31 ,Port Output Data 4 Pin 31" "Low,High"
|
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setclrfld.quad 0x00 30. -0x1C0 30. -0x1B8 30. " POD30 ,Port Output Data 4 Pin 30" "Low,High"
|
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setclrfld.quad 0x00 29. -0x1C0 29. -0x1B8 29. " POD29 ,Port Output Data 4 Pin 29" "Low,High"
|
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setclrfld.quad 0x00 28. -0x1C0 28. -0x1B8 28. " POD28 ,Port Output Data 4 Pin 28" "Low,High"
|
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setclrfld.quad 0x00 27. -0x1C0 27. -0x1B8 27. " POD27 ,Port Output Data 4 Pin 27" "Low,High"
|
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textline " "
|
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setclrfld.quad 0x00 26. -0x1C0 26. -0x1B8 26. " POD26 ,Port Output Data 4 Pin 26" "Low,High"
|
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setclrfld.quad 0x00 25. -0x1C0 25. -0x1B8 25. " POD25 ,Port Output Data 4 Pin 25" "Low,High"
|
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setclrfld.quad 0x00 24. -0x1C0 24. -0x1B8 24. " POD24 ,Port Output Data 4 Pin 24" "Low,High"
|
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setclrfld.quad 0x00 23. -0x1C0 23. -0x1B8 23. " POD23 ,Port Output Data 4 Pin 23" "Low,High"
|
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setclrfld.quad 0x00 22. -0x1C0 22. -0x1B8 22. " POD22 ,Port Output Data 4 Pin 22" "Low,High"
|
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setclrfld.quad 0x00 21. -0x1C0 21. -0x1B8 21. " POD21 ,Port Output Data 4 Pin 21" "Low,High"
|
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textline " "
|
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setclrfld.quad 0x00 20. -0x1C0 20. -0x1B8 20. " POD20 ,Port Output Data 4 Pin 20" "Low,High"
|
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setclrfld.quad 0x00 19. -0x1C0 19. -0x1B8 19. " POD19 ,Port Output Data 4 Pin 19" "Low,High"
|
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setclrfld.quad 0x00 18. -0x1C0 18. -0x1B8 18. " POD18 ,Port Output Data 4 Pin 18" "Low,High"
|
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setclrfld.quad 0x00 17. -0x1C0 17. -0x1B8 17. " POD17 ,Port Output Data 4 Pin 17" "Low,High"
|
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setclrfld.quad 0x00 16. -0x1C0 16. -0x1B8 16. " POD16 ,Port Output Data 4 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x1C0 15. -0x1B8 15. " POD15 ,Port Output Data 4 Pin 15" "Low,High"
|
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textline " "
|
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setclrfld.quad 0x00 14. -0x1C0 14. -0x1B8 14. " POD14 ,Port Output Data 4 Pin 14" "Low,High"
|
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setclrfld.quad 0x00 13. -0x1C0 13. -0x1B8 13. " POD13 ,Port Output Data 4 Pin 13" "Low,High"
|
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setclrfld.quad 0x00 12. -0x1C0 12. -0x1B8 12. " POD12 ,Port Output Data 4 Pin 12" "Low,High"
|
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setclrfld.quad 0x00 11. -0x1C0 11. -0x1B8 11. " POD11 ,Port Output Data 4 Pin 11" "Low,High"
|
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setclrfld.quad 0x00 10. -0x1C0 10. -0x1B8 10. " POD10 ,Port Output Data 4 Pin 10" "Low,High"
|
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setclrfld.quad 0x00 9. -0x1C0 9. -0x1B8 9. " POD9 ,Port Output Data 4 Pin 9" "Low,High"
|
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textline " "
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setclrfld.quad 0x00 8. -0x1C0 8. -0x1B8 8. " POD8 ,Port Output Data 4 Pin 8" "Low,High"
|
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setclrfld.quad 0x00 7. -0x1C0 7. -0x1B8 7. " POD7 ,Port Output Data 4 Pin 7" "Low,High"
|
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setclrfld.quad 0x00 6. -0x1C0 6. -0x1B8 6. " POD6 ,Port Output Data 4 Pin 6" "Low,High"
|
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setclrfld.quad 0x00 5. -0x1C0 5. -0x1B8 5. " POD5 ,Port Output Data 4 Pin 5" "Low,High"
|
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setclrfld.quad 0x00 4. -0x1C0 4. -0x1B8 4. " POD4 ,Port Output Data 4 Pin 4" "Low,High"
|
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setclrfld.quad 0x00 3. -0x1C0 3. -0x1B8 3. " POD3 ,Port Output Data 4 Pin 3" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 2. -0x1C0 2. -0x1B8 2. " POD2 ,Port Output Data 4 Pin 2" "Low,High"
|
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setclrfld.quad 0x00 1. -0x1C0 1. -0x1B8 1. " POD1 ,Port Output Data 4 Pin 1" "Low,High"
|
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setclrfld.quad 0x00 0. -0x1C0 0. -0x1B8 0. " POD0 ,Port Output Data 4 Pin 0" "Low,High"
|
|
group.quad 0x250++0x7
|
|
line.quad 0x00 "GPIO_PODR5,Port Output Data Register for Channel 5"
|
|
setclrfld.quad 0x00 63. -0x1B0 63. -0x1A8 63. " POD63 ,Port Output Data 5 Pin 63" "Low,High"
|
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setclrfld.quad 0x00 62. -0x1B0 62. -0x1A8 62. " POD62 ,Port Output Data 5 Pin 62" "Low,High"
|
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setclrfld.quad 0x00 61. -0x1B0 61. -0x1A8 61. " POD61 ,Port Output Data 5 Pin 61" "Low,High"
|
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setclrfld.quad 0x00 60. -0x1B0 60. -0x1A8 60. " POD60 ,Port Output Data 5 Pin 60" "Low,High"
|
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setclrfld.quad 0x00 59. -0x1B0 59. -0x1A8 59. " POD59 ,Port Output Data 5 Pin 59" "Low,High"
|
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setclrfld.quad 0x00 58. -0x1B0 58. -0x1A8 58. " POD58 ,Port Output Data 5 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x1B0 57. -0x1A8 57. " POD57 ,Port Output Data 5 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x1B0 56. -0x1A8 56. " POD56 ,Port Output Data 5 Pin 56" "Low,High"
|
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setclrfld.quad 0x00 55. -0x1B0 55. -0x1A8 55. " POD55 ,Port Output Data 5 Pin 55" "Low,High"
|
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setclrfld.quad 0x00 54. -0x1B0 54. -0x1A8 54. " POD54 ,Port Output Data 5 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x1B0 53. -0x1A8 53. " POD53 ,Port Output Data 5 Pin 53" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 52. -0x1B0 52. -0x1A8 52. " POD52 ,Port Output Data 5 Pin 52" "Low,High"
|
|
setclrfld.quad 0x00 51. -0x1B0 51. -0x1A8 51. " POD51 ,Port Output Data 5 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x1B0 50. -0x1A8 50. " POD50 ,Port Output Data 5 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x1B0 49. -0x1A8 49. " POD49 ,Port Output Data 5 Pin 49" "Low,High"
|
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setclrfld.quad 0x00 48. -0x1B0 48. -0x1A8 48. " POD48 ,Port Output Data 5 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x1B0 47. -0x1A8 47. " POD47 ,Port Output Data 5 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x1B0 46. -0x1A8 46. " POD46 ,Port Output Data 5 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x1B0 45. -0x1A8 45. " POD45 ,Port Output Data 5 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x1B0 44. -0x1A8 44. " POD44 ,Port Output Data 5 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x1B0 43. -0x1A8 43. " POD43 ,Port Output Data 5 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x1B0 42. -0x1A8 42. " POD42 ,Port Output Data 5 Pin 42" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 41. -0x1B0 41. -0x1A8 41. " POD41 ,Port Output Data 5 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x1B0 40. -0x1A8 40. " POD40 ,Port Output Data 5 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x1B0 39. -0x1A8 39. " POD39 ,Port Output Data 5 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x1B0 38. -0x1A8 38. " POD38 ,Port Output Data 5 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x1B0 37. -0x1A8 37. " POD37 ,Port Output Data 5 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x1B0 36. -0x1A8 36. " POD36 ,Port Output Data 5 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x1B0 35. -0x1A8 35. " POD35 ,Port Output Data 5 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x1B0 34. -0x1A8 34. " POD34 ,Port Output Data 5 Pin 34" "Low,High"
|
|
setclrfld.quad 0x00 33. -0x1B0 33. -0x1A8 33. " POD33 ,Port Output Data 5 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x1B0 32. -0x1A8 32. " POD32 ,Port Output Data 5 Pin 32" "Low,High"
|
|
setclrfld.quad 0x00 31. -0x1B0 31. -0x1A8 31. " POD31 ,Port Output Data 5 Pin 31" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 30. -0x1B0 30. -0x1A8 30. " POD30 ,Port Output Data 5 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x1B0 29. -0x1A8 29. " POD29 ,Port Output Data 5 Pin 29" "Low,High"
|
|
setclrfld.quad 0x00 28. -0x1B0 28. -0x1A8 28. " POD28 ,Port Output Data 5 Pin 28" "Low,High"
|
|
setclrfld.quad 0x00 27. -0x1B0 27. -0x1A8 27. " POD27 ,Port Output Data 5 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x1B0 26. -0x1A8 26. " POD26 ,Port Output Data 5 Pin 26" "Low,High"
|
|
setclrfld.quad 0x00 25. -0x1B0 25. -0x1A8 25. " POD25 ,Port Output Data 5 Pin 25" "Low,High"
|
|
setclrfld.quad 0x00 24. -0x1B0 24. -0x1A8 24. " POD24 ,Port Output Data 5 Pin 24" "Low,High"
|
|
setclrfld.quad 0x00 23. -0x1B0 23. -0x1A8 23. " POD23 ,Port Output Data 5 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x1B0 22. -0x1A8 22. " POD22 ,Port Output Data 5 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x1B0 21. -0x1A8 21. " POD21 ,Port Output Data 5 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x1B0 20. -0x1A8 20. " POD20 ,Port Output Data 5 Pin 20" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x1B0 19. -0x1A8 19. " POD19 ,Port Output Data 5 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x1B0 18. -0x1A8 18. " POD18 ,Port Output Data 5 Pin 18" "Low,High"
|
|
setclrfld.quad 0x00 17. -0x1B0 17. -0x1A8 17. " POD17 ,Port Output Data 5 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x1B0 16. -0x1A8 16. " POD16 ,Port Output Data 5 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x1B0 15. -0x1A8 15. " POD15 ,Port Output Data 5 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x1B0 14. -0x1A8 14. " POD14 ,Port Output Data 5 Pin 14" "Low,High"
|
|
setclrfld.quad 0x00 13. -0x1B0 13. -0x1A8 13. " POD13 ,Port Output Data 5 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x1B0 12. -0x1A8 12. " POD12 ,Port Output Data 5 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x1B0 11. -0x1A8 11. " POD11 ,Port Output Data 5 Pin 11" "Low,High"
|
|
setclrfld.quad 0x00 10. -0x1B0 10. -0x1A8 10. " POD10 ,Port Output Data 5 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x1B0 9. -0x1A8 9. " POD9 ,Port Output Data 5 Pin 9" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 8. -0x1B0 8. -0x1A8 8. " POD8 ,Port Output Data 5 Pin 8" "Low,High"
|
|
setclrfld.quad 0x00 7. -0x1B0 7. -0x1A8 7. " POD7 ,Port Output Data 5 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x1B0 6. -0x1A8 6. " POD6 ,Port Output Data 5 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x1B0 5. -0x1A8 5. " POD5 ,Port Output Data 5 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x1B0 4. -0x1A8 4. " POD4 ,Port Output Data 5 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x1B0 3. -0x1A8 3. " POD3 ,Port Output Data 5 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x1B0 2. -0x1A8 2. " POD2 ,Port Output Data 5 Pin 2" "Low,High"
|
|
setclrfld.quad 0x00 1. -0x1B0 1. -0x1A8 1. " POD1 ,Port Output Data 5 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x1B0 0. -0x1A8 0. " POD0 ,Port Output Data 5 Pin 0" "Low,High"
|
|
group.quad 0x260++0x7
|
|
line.quad 0x00 "GPIO_PODR6,Port Output Data Register for Channel 6"
|
|
setclrfld.quad 0x00 63. -0x1A0 63. -0x198 63. " POD63 ,Port Output Data 6 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x1A0 62. -0x198 62. " POD62 ,Port Output Data 6 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x1A0 61. -0x198 61. " POD61 ,Port Output Data 6 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x1A0 60. -0x198 60. " POD60 ,Port Output Data 6 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x1A0 59. -0x198 59. " POD59 ,Port Output Data 6 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x1A0 58. -0x198 58. " POD58 ,Port Output Data 6 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x1A0 57. -0x198 57. " POD57 ,Port Output Data 6 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x1A0 56. -0x198 56. " POD56 ,Port Output Data 6 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x1A0 55. -0x198 55. " POD55 ,Port Output Data 6 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x1A0 54. -0x198 54. " POD54 ,Port Output Data 6 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x1A0 53. -0x198 53. " POD53 ,Port Output Data 6 Pin 53" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x1A0 52. -0x198 52. " POD52 ,Port Output Data 6 Pin 52" "Low,High"
|
|
setclrfld.quad 0x00 51. -0x1A0 51. -0x198 51. " POD51 ,Port Output Data 6 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x1A0 50. -0x198 50. " POD50 ,Port Output Data 6 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x1A0 49. -0x198 49. " POD49 ,Port Output Data 6 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x1A0 48. -0x198 48. " POD48 ,Port Output Data 6 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x1A0 47. -0x198 47. " POD47 ,Port Output Data 6 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x1A0 46. -0x198 46. " POD46 ,Port Output Data 6 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x1A0 45. -0x198 45. " POD45 ,Port Output Data 6 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x1A0 44. -0x198 44. " POD44 ,Port Output Data 6 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x1A0 43. -0x198 43. " POD43 ,Port Output Data 6 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x1A0 42. -0x198 42. " POD42 ,Port Output Data 6 Pin 42" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x1A0 41. -0x198 41. " POD41 ,Port Output Data 6 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x1A0 40. -0x198 40. " POD40 ,Port Output Data 6 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x1A0 39. -0x198 39. " POD39 ,Port Output Data 6 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x1A0 38. -0x198 38. " POD38 ,Port Output Data 6 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x1A0 37. -0x198 37. " POD37 ,Port Output Data 6 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x1A0 36. -0x198 36. " POD36 ,Port Output Data 6 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x1A0 35. -0x198 35. " POD35 ,Port Output Data 6 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x1A0 34. -0x198 34. " POD34 ,Port Output Data 6 Pin 34" "Low,High"
|
|
setclrfld.quad 0x00 33. -0x1A0 33. -0x198 33. " POD33 ,Port Output Data 6 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x1A0 32. -0x198 32. " POD32 ,Port Output Data 6 Pin 32" "Low,High"
|
|
setclrfld.quad 0x00 31. -0x1A0 31. -0x198 31. " POD31 ,Port Output Data 6 Pin 31" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x1A0 30. -0x198 30. " POD30 ,Port Output Data 6 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x1A0 29. -0x198 29. " POD29 ,Port Output Data 6 Pin 29" "Low,High"
|
|
setclrfld.quad 0x00 28. -0x1A0 28. -0x198 28. " POD28 ,Port Output Data 6 Pin 28" "Low,High"
|
|
setclrfld.quad 0x00 27. -0x1A0 27. -0x198 27. " POD27 ,Port Output Data 6 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x1A0 26. -0x198 26. " POD26 ,Port Output Data 6 Pin 26" "Low,High"
|
|
setclrfld.quad 0x00 25. -0x1A0 25. -0x198 25. " POD25 ,Port Output Data 6 Pin 25" "Low,High"
|
|
setclrfld.quad 0x00 24. -0x1A0 24. -0x198 24. " POD24 ,Port Output Data 6 Pin 24" "Low,High"
|
|
setclrfld.quad 0x00 23. -0x1A0 23. -0x198 23. " POD23 ,Port Output Data 6 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x1A0 22. -0x198 22. " POD22 ,Port Output Data 6 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x1A0 21. -0x198 21. " POD21 ,Port Output Data 6 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x1A0 20. -0x198 20. " POD20 ,Port Output Data 6 Pin 20" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x1A0 19. -0x198 19. " POD19 ,Port Output Data 6 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x1A0 18. -0x198 18. " POD18 ,Port Output Data 6 Pin 18" "Low,High"
|
|
setclrfld.quad 0x00 17. -0x1A0 17. -0x198 17. " POD17 ,Port Output Data 6 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x1A0 16. -0x198 16. " POD16 ,Port Output Data 6 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x1A0 15. -0x198 15. " POD15 ,Port Output Data 6 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x1A0 14. -0x198 14. " POD14 ,Port Output Data 6 Pin 14" "Low,High"
|
|
setclrfld.quad 0x00 13. -0x1A0 13. -0x198 13. " POD13 ,Port Output Data 6 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x1A0 12. -0x198 12. " POD12 ,Port Output Data 6 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x1A0 11. -0x198 11. " POD11 ,Port Output Data 6 Pin 11" "Low,High"
|
|
setclrfld.quad 0x00 10. -0x1A0 10. -0x198 10. " POD10 ,Port Output Data 6 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x1A0 9. -0x198 9. " POD9 ,Port Output Data 6 Pin 9" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x1A0 8. -0x198 8. " POD8 ,Port Output Data 6 Pin 8" "Low,High"
|
|
setclrfld.quad 0x00 7. -0x1A0 7. -0x198 7. " POD7 ,Port Output Data 6 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x1A0 6. -0x198 6. " POD6 ,Port Output Data 6 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x1A0 5. -0x198 5. " POD5 ,Port Output Data 6 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x1A0 4. -0x198 4. " POD4 ,Port Output Data 6 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x1A0 3. -0x198 3. " POD3 ,Port Output Data 6 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x1A0 2. -0x198 2. " POD2 ,Port Output Data 6 Pin 2" "Low,High"
|
|
setclrfld.quad 0x00 1. -0x1A0 1. -0x198 1. " POD1 ,Port Output Data 6 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x1A0 0. -0x198 0. " POD0 ,Port Output Data 6 Pin 0" "Low,High"
|
|
group.quad 0x270++0x7
|
|
line.quad 0x00 "GPIO_PODR7,Port Output Data Register for Channel 7"
|
|
setclrfld.quad 0x00 63. -0x190 63. -0x188 63. " POD63 ,Port Output Data 7 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x190 62. -0x188 62. " POD62 ,Port Output Data 7 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x190 61. -0x188 61. " POD61 ,Port Output Data 7 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x190 60. -0x188 60. " POD60 ,Port Output Data 7 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x190 59. -0x188 59. " POD59 ,Port Output Data 7 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x190 58. -0x188 58. " POD58 ,Port Output Data 7 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x190 57. -0x188 57. " POD57 ,Port Output Data 7 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x190 56. -0x188 56. " POD56 ,Port Output Data 7 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x190 55. -0x188 55. " POD55 ,Port Output Data 7 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x190 54. -0x188 54. " POD54 ,Port Output Data 7 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x190 53. -0x188 53. " POD53 ,Port Output Data 7 Pin 53" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x190 52. -0x188 52. " POD52 ,Port Output Data 7 Pin 52" "Low,High"
|
|
setclrfld.quad 0x00 51. -0x190 51. -0x188 51. " POD51 ,Port Output Data 7 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x190 50. -0x188 50. " POD50 ,Port Output Data 7 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x190 49. -0x188 49. " POD49 ,Port Output Data 7 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x190 48. -0x188 48. " POD48 ,Port Output Data 7 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x190 47. -0x188 47. " POD47 ,Port Output Data 7 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x190 46. -0x188 46. " POD46 ,Port Output Data 7 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x190 45. -0x188 45. " POD45 ,Port Output Data 7 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x190 44. -0x188 44. " POD44 ,Port Output Data 7 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x190 43. -0x188 43. " POD43 ,Port Output Data 7 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x190 42. -0x188 42. " POD42 ,Port Output Data 7 Pin 42" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x190 41. -0x188 41. " POD41 ,Port Output Data 7 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x190 40. -0x188 40. " POD40 ,Port Output Data 7 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x190 39. -0x188 39. " POD39 ,Port Output Data 7 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x190 38. -0x188 38. " POD38 ,Port Output Data 7 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x190 37. -0x188 37. " POD37 ,Port Output Data 7 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x190 36. -0x188 36. " POD36 ,Port Output Data 7 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x190 35. -0x188 35. " POD35 ,Port Output Data 7 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x190 34. -0x188 34. " POD34 ,Port Output Data 7 Pin 34" "Low,High"
|
|
setclrfld.quad 0x00 33. -0x190 33. -0x188 33. " POD33 ,Port Output Data 7 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x190 32. -0x188 32. " POD32 ,Port Output Data 7 Pin 32" "Low,High"
|
|
setclrfld.quad 0x00 31. -0x190 31. -0x188 31. " POD31 ,Port Output Data 7 Pin 31" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x190 30. -0x188 30. " POD30 ,Port Output Data 7 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x190 29. -0x188 29. " POD29 ,Port Output Data 7 Pin 29" "Low,High"
|
|
setclrfld.quad 0x00 28. -0x190 28. -0x188 28. " POD28 ,Port Output Data 7 Pin 28" "Low,High"
|
|
setclrfld.quad 0x00 27. -0x190 27. -0x188 27. " POD27 ,Port Output Data 7 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x190 26. -0x188 26. " POD26 ,Port Output Data 7 Pin 26" "Low,High"
|
|
setclrfld.quad 0x00 25. -0x190 25. -0x188 25. " POD25 ,Port Output Data 7 Pin 25" "Low,High"
|
|
setclrfld.quad 0x00 24. -0x190 24. -0x188 24. " POD24 ,Port Output Data 7 Pin 24" "Low,High"
|
|
setclrfld.quad 0x00 23. -0x190 23. -0x188 23. " POD23 ,Port Output Data 7 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x190 22. -0x188 22. " POD22 ,Port Output Data 7 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x190 21. -0x188 21. " POD21 ,Port Output Data 7 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x190 20. -0x188 20. " POD20 ,Port Output Data 7 Pin 20" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x190 19. -0x188 19. " POD19 ,Port Output Data 7 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x190 18. -0x188 18. " POD18 ,Port Output Data 7 Pin 18" "Low,High"
|
|
setclrfld.quad 0x00 17. -0x190 17. -0x188 17. " POD17 ,Port Output Data 7 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x190 16. -0x188 16. " POD16 ,Port Output Data 7 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x190 15. -0x188 15. " POD15 ,Port Output Data 7 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x190 14. -0x188 14. " POD14 ,Port Output Data 7 Pin 14" "Low,High"
|
|
setclrfld.quad 0x00 13. -0x190 13. -0x188 13. " POD13 ,Port Output Data 7 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x190 12. -0x188 12. " POD12 ,Port Output Data 7 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x190 11. -0x188 11. " POD11 ,Port Output Data 7 Pin 11" "Low,High"
|
|
setclrfld.quad 0x00 10. -0x190 10. -0x188 10. " POD10 ,Port Output Data 7 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x190 9. -0x188 9. " POD9 ,Port Output Data 7 Pin 9" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x190 8. -0x188 8. " POD8 ,Port Output Data 7 Pin 8" "Low,High"
|
|
setclrfld.quad 0x00 7. -0x190 7. -0x188 7. " POD7 ,Port Output Data 7 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x190 6. -0x188 6. " POD6 ,Port Output Data 7 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x190 5. -0x188 5. " POD5 ,Port Output Data 7 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x190 4. -0x188 4. " POD4 ,Port Output Data 7 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x190 3. -0x188 3. " POD3 ,Port Output Data 7 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x190 2. -0x188 2. " POD2 ,Port Output Data 7 Pin 2" "Low,High"
|
|
setclrfld.quad 0x00 1. -0x190 1. -0x188 1. " POD1 ,Port Output Data 7 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x190 0. -0x188 0. " POD0 ,Port Output Data 7 Pin 0" "Low,High"
|
|
group.quad 0x280++0x7
|
|
line.quad 0x00 "GPIO_PODR8,Port Output Data Register for Channel 8"
|
|
setclrfld.quad 0x00 63. -0x180 63. -0x178 63. " POD63 ,Port Output Data 8 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x180 62. -0x178 62. " POD62 ,Port Output Data 8 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x180 61. -0x178 61. " POD61 ,Port Output Data 8 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x180 60. -0x178 60. " POD60 ,Port Output Data 8 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x180 59. -0x178 59. " POD59 ,Port Output Data 8 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x180 58. -0x178 58. " POD58 ,Port Output Data 8 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x180 57. -0x178 57. " POD57 ,Port Output Data 8 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x180 56. -0x178 56. " POD56 ,Port Output Data 8 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x180 55. -0x178 55. " POD55 ,Port Output Data 8 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x180 54. -0x178 54. " POD54 ,Port Output Data 8 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x180 53. -0x178 53. " POD53 ,Port Output Data 8 Pin 53" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x180 52. -0x178 52. " POD52 ,Port Output Data 8 Pin 52" "Low,High"
|
|
setclrfld.quad 0x00 51. -0x180 51. -0x178 51. " POD51 ,Port Output Data 8 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x180 50. -0x178 50. " POD50 ,Port Output Data 8 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x180 49. -0x178 49. " POD49 ,Port Output Data 8 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x180 48. -0x178 48. " POD48 ,Port Output Data 8 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x180 47. -0x178 47. " POD47 ,Port Output Data 8 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x180 46. -0x178 46. " POD46 ,Port Output Data 8 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x180 45. -0x178 45. " POD45 ,Port Output Data 8 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x180 44. -0x178 44. " POD44 ,Port Output Data 8 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x180 43. -0x178 43. " POD43 ,Port Output Data 8 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x180 42. -0x178 42. " POD42 ,Port Output Data 8 Pin 42" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x180 41. -0x178 41. " POD41 ,Port Output Data 8 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x180 40. -0x178 40. " POD40 ,Port Output Data 8 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x180 39. -0x178 39. " POD39 ,Port Output Data 8 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x180 38. -0x178 38. " POD38 ,Port Output Data 8 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x180 37. -0x178 37. " POD37 ,Port Output Data 8 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x180 36. -0x178 36. " POD36 ,Port Output Data 8 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x180 35. -0x178 35. " POD35 ,Port Output Data 8 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x180 34. -0x178 34. " POD34 ,Port Output Data 8 Pin 34" "Low,High"
|
|
setclrfld.quad 0x00 33. -0x180 33. -0x178 33. " POD33 ,Port Output Data 8 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x180 32. -0x178 32. " POD32 ,Port Output Data 8 Pin 32" "Low,High"
|
|
setclrfld.quad 0x00 31. -0x180 31. -0x178 31. " POD31 ,Port Output Data 8 Pin 31" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x180 30. -0x178 30. " POD30 ,Port Output Data 8 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x180 29. -0x178 29. " POD29 ,Port Output Data 8 Pin 29" "Low,High"
|
|
setclrfld.quad 0x00 28. -0x180 28. -0x178 28. " POD28 ,Port Output Data 8 Pin 28" "Low,High"
|
|
setclrfld.quad 0x00 27. -0x180 27. -0x178 27. " POD27 ,Port Output Data 8 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x180 26. -0x178 26. " POD26 ,Port Output Data 8 Pin 26" "Low,High"
|
|
setclrfld.quad 0x00 25. -0x180 25. -0x178 25. " POD25 ,Port Output Data 8 Pin 25" "Low,High"
|
|
setclrfld.quad 0x00 24. -0x180 24. -0x178 24. " POD24 ,Port Output Data 8 Pin 24" "Low,High"
|
|
setclrfld.quad 0x00 23. -0x180 23. -0x178 23. " POD23 ,Port Output Data 8 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x180 22. -0x178 22. " POD22 ,Port Output Data 8 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x180 21. -0x178 21. " POD21 ,Port Output Data 8 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x180 20. -0x178 20. " POD20 ,Port Output Data 8 Pin 20" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x180 19. -0x178 19. " POD19 ,Port Output Data 8 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x180 18. -0x178 18. " POD18 ,Port Output Data 8 Pin 18" "Low,High"
|
|
setclrfld.quad 0x00 17. -0x180 17. -0x178 17. " POD17 ,Port Output Data 8 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x180 16. -0x178 16. " POD16 ,Port Output Data 8 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x180 15. -0x178 15. " POD15 ,Port Output Data 8 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x180 14. -0x178 14. " POD14 ,Port Output Data 8 Pin 14" "Low,High"
|
|
setclrfld.quad 0x00 13. -0x180 13. -0x178 13. " POD13 ,Port Output Data 8 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x180 12. -0x178 12. " POD12 ,Port Output Data 8 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x180 11. -0x178 11. " POD11 ,Port Output Data 8 Pin 11" "Low,High"
|
|
setclrfld.quad 0x00 10. -0x180 10. -0x178 10. " POD10 ,Port Output Data 8 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x180 9. -0x178 9. " POD9 ,Port Output Data 8 Pin 9" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x180 8. -0x178 8. " POD8 ,Port Output Data 8 Pin 8" "Low,High"
|
|
setclrfld.quad 0x00 7. -0x180 7. -0x178 7. " POD7 ,Port Output Data 8 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x180 6. -0x178 6. " POD6 ,Port Output Data 8 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x180 5. -0x178 5. " POD5 ,Port Output Data 8 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x180 4. -0x178 4. " POD4 ,Port Output Data 8 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x180 3. -0x178 3. " POD3 ,Port Output Data 8 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x180 2. -0x178 2. " POD2 ,Port Output Data 8 Pin 2" "Low,High"
|
|
setclrfld.quad 0x00 1. -0x180 1. -0x178 1. " POD1 ,Port Output Data 8 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x180 0. -0x178 0. " POD0 ,Port Output Data 8 Pin 0" "Low,High"
|
|
group.quad 0x290++0x7
|
|
line.quad 0x00 "GPIO_PODR9,Port Output Data Register for Channel 9"
|
|
setclrfld.quad 0x00 63. -0x170 63. -0x168 63. " POD63 ,Port Output Data 9 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x170 62. -0x168 62. " POD62 ,Port Output Data 9 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x170 61. -0x168 61. " POD61 ,Port Output Data 9 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x170 60. -0x168 60. " POD60 ,Port Output Data 9 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x170 59. -0x168 59. " POD59 ,Port Output Data 9 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x170 58. -0x168 58. " POD58 ,Port Output Data 9 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x170 57. -0x168 57. " POD57 ,Port Output Data 9 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x170 56. -0x168 56. " POD56 ,Port Output Data 9 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x170 55. -0x168 55. " POD55 ,Port Output Data 9 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x170 54. -0x168 54. " POD54 ,Port Output Data 9 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x170 53. -0x168 53. " POD53 ,Port Output Data 9 Pin 53" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x170 52. -0x168 52. " POD52 ,Port Output Data 9 Pin 52" "Low,High"
|
|
setclrfld.quad 0x00 51. -0x170 51. -0x168 51. " POD51 ,Port Output Data 9 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x170 50. -0x168 50. " POD50 ,Port Output Data 9 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x170 49. -0x168 49. " POD49 ,Port Output Data 9 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x170 48. -0x168 48. " POD48 ,Port Output Data 9 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x170 47. -0x168 47. " POD47 ,Port Output Data 9 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x170 46. -0x168 46. " POD46 ,Port Output Data 9 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x170 45. -0x168 45. " POD45 ,Port Output Data 9 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x170 44. -0x168 44. " POD44 ,Port Output Data 9 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x170 43. -0x168 43. " POD43 ,Port Output Data 9 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x170 42. -0x168 42. " POD42 ,Port Output Data 9 Pin 42" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x170 41. -0x168 41. " POD41 ,Port Output Data 9 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x170 40. -0x168 40. " POD40 ,Port Output Data 9 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x170 39. -0x168 39. " POD39 ,Port Output Data 9 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x170 38. -0x168 38. " POD38 ,Port Output Data 9 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x170 37. -0x168 37. " POD37 ,Port Output Data 9 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x170 36. -0x168 36. " POD36 ,Port Output Data 9 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x170 35. -0x168 35. " POD35 ,Port Output Data 9 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x170 34. -0x168 34. " POD34 ,Port Output Data 9 Pin 34" "Low,High"
|
|
setclrfld.quad 0x00 33. -0x170 33. -0x168 33. " POD33 ,Port Output Data 9 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x170 32. -0x168 32. " POD32 ,Port Output Data 9 Pin 32" "Low,High"
|
|
setclrfld.quad 0x00 31. -0x170 31. -0x168 31. " POD31 ,Port Output Data 9 Pin 31" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x170 30. -0x168 30. " POD30 ,Port Output Data 9 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x170 29. -0x168 29. " POD29 ,Port Output Data 9 Pin 29" "Low,High"
|
|
setclrfld.quad 0x00 28. -0x170 28. -0x168 28. " POD28 ,Port Output Data 9 Pin 28" "Low,High"
|
|
setclrfld.quad 0x00 27. -0x170 27. -0x168 27. " POD27 ,Port Output Data 9 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x170 26. -0x168 26. " POD26 ,Port Output Data 9 Pin 26" "Low,High"
|
|
setclrfld.quad 0x00 25. -0x170 25. -0x168 25. " POD25 ,Port Output Data 9 Pin 25" "Low,High"
|
|
setclrfld.quad 0x00 24. -0x170 24. -0x168 24. " POD24 ,Port Output Data 9 Pin 24" "Low,High"
|
|
setclrfld.quad 0x00 23. -0x170 23. -0x168 23. " POD23 ,Port Output Data 9 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x170 22. -0x168 22. " POD22 ,Port Output Data 9 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x170 21. -0x168 21. " POD21 ,Port Output Data 9 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x170 20. -0x168 20. " POD20 ,Port Output Data 9 Pin 20" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x170 19. -0x168 19. " POD19 ,Port Output Data 9 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x170 18. -0x168 18. " POD18 ,Port Output Data 9 Pin 18" "Low,High"
|
|
setclrfld.quad 0x00 17. -0x170 17. -0x168 17. " POD17 ,Port Output Data 9 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x170 16. -0x168 16. " POD16 ,Port Output Data 9 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x170 15. -0x168 15. " POD15 ,Port Output Data 9 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x170 14. -0x168 14. " POD14 ,Port Output Data 9 Pin 14" "Low,High"
|
|
setclrfld.quad 0x00 13. -0x170 13. -0x168 13. " POD13 ,Port Output Data 9 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x170 12. -0x168 12. " POD12 ,Port Output Data 9 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x170 11. -0x168 11. " POD11 ,Port Output Data 9 Pin 11" "Low,High"
|
|
setclrfld.quad 0x00 10. -0x170 10. -0x168 10. " POD10 ,Port Output Data 9 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x170 9. -0x168 9. " POD9 ,Port Output Data 9 Pin 9" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x170 8. -0x168 8. " POD8 ,Port Output Data 9 Pin 8" "Low,High"
|
|
setclrfld.quad 0x00 7. -0x170 7. -0x168 7. " POD7 ,Port Output Data 9 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x170 6. -0x168 6. " POD6 ,Port Output Data 9 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x170 5. -0x168 5. " POD5 ,Port Output Data 9 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x170 4. -0x168 4. " POD4 ,Port Output Data 9 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x170 3. -0x168 3. " POD3 ,Port Output Data 9 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x170 2. -0x168 2. " POD2 ,Port Output Data 9 Pin 2" "Low,High"
|
|
setclrfld.quad 0x00 1. -0x170 1. -0x168 1. " POD1 ,Port Output Data 9 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x170 0. -0x168 0. " POD0 ,Port Output Data 9 Pin 0" "Low,High"
|
|
group.quad 0x2a0++0x7
|
|
line.quad 0x00 "GPIO_PODR10,Port Output Data Register for Channel 10"
|
|
setclrfld.quad 0x00 63. -0x160 63. -0x158 63. " POD63 ,Port Output Data 10 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x160 62. -0x158 62. " POD62 ,Port Output Data 10 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x160 61. -0x158 61. " POD61 ,Port Output Data 10 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x160 60. -0x158 60. " POD60 ,Port Output Data 10 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x160 59. -0x158 59. " POD59 ,Port Output Data 10 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x160 58. -0x158 58. " POD58 ,Port Output Data 10 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x160 57. -0x158 57. " POD57 ,Port Output Data 10 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x160 56. -0x158 56. " POD56 ,Port Output Data 10 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x160 55. -0x158 55. " POD55 ,Port Output Data 10 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x160 54. -0x158 54. " POD54 ,Port Output Data 10 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x160 53. -0x158 53. " POD53 ,Port Output Data 10 Pin 53" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x160 52. -0x158 52. " POD52 ,Port Output Data 10 Pin 52" "Low,High"
|
|
setclrfld.quad 0x00 51. -0x160 51. -0x158 51. " POD51 ,Port Output Data 10 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x160 50. -0x158 50. " POD50 ,Port Output Data 10 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x160 49. -0x158 49. " POD49 ,Port Output Data 10 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x160 48. -0x158 48. " POD48 ,Port Output Data 10 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x160 47. -0x158 47. " POD47 ,Port Output Data 10 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x160 46. -0x158 46. " POD46 ,Port Output Data 10 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x160 45. -0x158 45. " POD45 ,Port Output Data 10 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x160 44. -0x158 44. " POD44 ,Port Output Data 10 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x160 43. -0x158 43. " POD43 ,Port Output Data 10 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x160 42. -0x158 42. " POD42 ,Port Output Data 10 Pin 42" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x160 41. -0x158 41. " POD41 ,Port Output Data 10 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x160 40. -0x158 40. " POD40 ,Port Output Data 10 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x160 39. -0x158 39. " POD39 ,Port Output Data 10 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x160 38. -0x158 38. " POD38 ,Port Output Data 10 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x160 37. -0x158 37. " POD37 ,Port Output Data 10 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x160 36. -0x158 36. " POD36 ,Port Output Data 10 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x160 35. -0x158 35. " POD35 ,Port Output Data 10 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x160 34. -0x158 34. " POD34 ,Port Output Data 10 Pin 34" "Low,High"
|
|
setclrfld.quad 0x00 33. -0x160 33. -0x158 33. " POD33 ,Port Output Data 10 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x160 32. -0x158 32. " POD32 ,Port Output Data 10 Pin 32" "Low,High"
|
|
setclrfld.quad 0x00 31. -0x160 31. -0x158 31. " POD31 ,Port Output Data 10 Pin 31" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x160 30. -0x158 30. " POD30 ,Port Output Data 10 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x160 29. -0x158 29. " POD29 ,Port Output Data 10 Pin 29" "Low,High"
|
|
setclrfld.quad 0x00 28. -0x160 28. -0x158 28. " POD28 ,Port Output Data 10 Pin 28" "Low,High"
|
|
setclrfld.quad 0x00 27. -0x160 27. -0x158 27. " POD27 ,Port Output Data 10 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x160 26. -0x158 26. " POD26 ,Port Output Data 10 Pin 26" "Low,High"
|
|
setclrfld.quad 0x00 25. -0x160 25. -0x158 25. " POD25 ,Port Output Data 10 Pin 25" "Low,High"
|
|
setclrfld.quad 0x00 24. -0x160 24. -0x158 24. " POD24 ,Port Output Data 10 Pin 24" "Low,High"
|
|
setclrfld.quad 0x00 23. -0x160 23. -0x158 23. " POD23 ,Port Output Data 10 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x160 22. -0x158 22. " POD22 ,Port Output Data 10 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x160 21. -0x158 21. " POD21 ,Port Output Data 10 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x160 20. -0x158 20. " POD20 ,Port Output Data 10 Pin 20" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x160 19. -0x158 19. " POD19 ,Port Output Data 10 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x160 18. -0x158 18. " POD18 ,Port Output Data 10 Pin 18" "Low,High"
|
|
setclrfld.quad 0x00 17. -0x160 17. -0x158 17. " POD17 ,Port Output Data 10 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x160 16. -0x158 16. " POD16 ,Port Output Data 10 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x160 15. -0x158 15. " POD15 ,Port Output Data 10 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x160 14. -0x158 14. " POD14 ,Port Output Data 10 Pin 14" "Low,High"
|
|
setclrfld.quad 0x00 13. -0x160 13. -0x158 13. " POD13 ,Port Output Data 10 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x160 12. -0x158 12. " POD12 ,Port Output Data 10 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x160 11. -0x158 11. " POD11 ,Port Output Data 10 Pin 11" "Low,High"
|
|
setclrfld.quad 0x00 10. -0x160 10. -0x158 10. " POD10 ,Port Output Data 10 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x160 9. -0x158 9. " POD9 ,Port Output Data 10 Pin 9" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 8. -0x160 8. -0x158 8. " POD8 ,Port Output Data 10 Pin 8" "Low,High"
|
|
setclrfld.quad 0x00 7. -0x160 7. -0x158 7. " POD7 ,Port Output Data 10 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x160 6. -0x158 6. " POD6 ,Port Output Data 10 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x160 5. -0x158 5. " POD5 ,Port Output Data 10 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x160 4. -0x158 4. " POD4 ,Port Output Data 10 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x160 3. -0x158 3. " POD3 ,Port Output Data 10 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x160 2. -0x158 2. " POD2 ,Port Output Data 10 Pin 2" "Low,High"
|
|
setclrfld.quad 0x00 1. -0x160 1. -0x158 1. " POD1 ,Port Output Data 10 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x160 0. -0x158 0. " POD0 ,Port Output Data 10 Pin 0" "Low,High"
|
|
group.quad 0x2b0++0x7
|
|
line.quad 0x00 "GPIO_PODR11,Port Output Data Register for Channel 11"
|
|
setclrfld.quad 0x00 63. -0x150 63. -0x148 63. " POD63 ,Port Output Data 11 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x150 62. -0x148 62. " POD62 ,Port Output Data 11 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x150 61. -0x148 61. " POD61 ,Port Output Data 11 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x150 60. -0x148 60. " POD60 ,Port Output Data 11 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x150 59. -0x148 59. " POD59 ,Port Output Data 11 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x150 58. -0x148 58. " POD58 ,Port Output Data 11 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x150 57. -0x148 57. " POD57 ,Port Output Data 11 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x150 56. -0x148 56. " POD56 ,Port Output Data 11 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x150 55. -0x148 55. " POD55 ,Port Output Data 11 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x150 54. -0x148 54. " POD54 ,Port Output Data 11 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x150 53. -0x148 53. " POD53 ,Port Output Data 11 Pin 53" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 52. -0x150 52. -0x148 52. " POD52 ,Port Output Data 11 Pin 52" "Low,High"
|
|
setclrfld.quad 0x00 51. -0x150 51. -0x148 51. " POD51 ,Port Output Data 11 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x150 50. -0x148 50. " POD50 ,Port Output Data 11 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x150 49. -0x148 49. " POD49 ,Port Output Data 11 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x150 48. -0x148 48. " POD48 ,Port Output Data 11 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x150 47. -0x148 47. " POD47 ,Port Output Data 11 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x150 46. -0x148 46. " POD46 ,Port Output Data 11 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x150 45. -0x148 45. " POD45 ,Port Output Data 11 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x150 44. -0x148 44. " POD44 ,Port Output Data 11 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x150 43. -0x148 43. " POD43 ,Port Output Data 11 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x150 42. -0x148 42. " POD42 ,Port Output Data 11 Pin 42" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 41. -0x150 41. -0x148 41. " POD41 ,Port Output Data 11 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x150 40. -0x148 40. " POD40 ,Port Output Data 11 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x150 39. -0x148 39. " POD39 ,Port Output Data 11 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x150 38. -0x148 38. " POD38 ,Port Output Data 11 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x150 37. -0x148 37. " POD37 ,Port Output Data 11 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x150 36. -0x148 36. " POD36 ,Port Output Data 11 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x150 35. -0x148 35. " POD35 ,Port Output Data 11 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x150 34. -0x148 34. " POD34 ,Port Output Data 11 Pin 34" "Low,High"
|
|
setclrfld.quad 0x00 33. -0x150 33. -0x148 33. " POD33 ,Port Output Data 11 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x150 32. -0x148 32. " POD32 ,Port Output Data 11 Pin 32" "Low,High"
|
|
setclrfld.quad 0x00 31. -0x150 31. -0x148 31. " POD31 ,Port Output Data 11 Pin 31" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 30. -0x150 30. -0x148 30. " POD30 ,Port Output Data 11 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x150 29. -0x148 29. " POD29 ,Port Output Data 11 Pin 29" "Low,High"
|
|
setclrfld.quad 0x00 28. -0x150 28. -0x148 28. " POD28 ,Port Output Data 11 Pin 28" "Low,High"
|
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setclrfld.quad 0x00 27. -0x150 27. -0x148 27. " POD27 ,Port Output Data 11 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x150 26. -0x148 26. " POD26 ,Port Output Data 11 Pin 26" "Low,High"
|
|
setclrfld.quad 0x00 25. -0x150 25. -0x148 25. " POD25 ,Port Output Data 11 Pin 25" "Low,High"
|
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setclrfld.quad 0x00 24. -0x150 24. -0x148 24. " POD24 ,Port Output Data 11 Pin 24" "Low,High"
|
|
setclrfld.quad 0x00 23. -0x150 23. -0x148 23. " POD23 ,Port Output Data 11 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x150 22. -0x148 22. " POD22 ,Port Output Data 11 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x150 21. -0x148 21. " POD21 ,Port Output Data 11 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x150 20. -0x148 20. " POD20 ,Port Output Data 11 Pin 20" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 19. -0x150 19. -0x148 19. " POD19 ,Port Output Data 11 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x150 18. -0x148 18. " POD18 ,Port Output Data 11 Pin 18" "Low,High"
|
|
setclrfld.quad 0x00 17. -0x150 17. -0x148 17. " POD17 ,Port Output Data 11 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x150 16. -0x148 16. " POD16 ,Port Output Data 11 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x150 15. -0x148 15. " POD15 ,Port Output Data 11 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x150 14. -0x148 14. " POD14 ,Port Output Data 11 Pin 14" "Low,High"
|
|
setclrfld.quad 0x00 13. -0x150 13. -0x148 13. " POD13 ,Port Output Data 11 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x150 12. -0x148 12. " POD12 ,Port Output Data 11 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x150 11. -0x148 11. " POD11 ,Port Output Data 11 Pin 11" "Low,High"
|
|
setclrfld.quad 0x00 10. -0x150 10. -0x148 10. " POD10 ,Port Output Data 11 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x150 9. -0x148 9. " POD9 ,Port Output Data 11 Pin 9" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 8. -0x150 8. -0x148 8. " POD8 ,Port Output Data 11 Pin 8" "Low,High"
|
|
setclrfld.quad 0x00 7. -0x150 7. -0x148 7. " POD7 ,Port Output Data 11 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x150 6. -0x148 6. " POD6 ,Port Output Data 11 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x150 5. -0x148 5. " POD5 ,Port Output Data 11 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x150 4. -0x148 4. " POD4 ,Port Output Data 11 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x150 3. -0x148 3. " POD3 ,Port Output Data 11 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x150 2. -0x148 2. " POD2 ,Port Output Data 11 Pin 2" "Low,High"
|
|
setclrfld.quad 0x00 1. -0x150 1. -0x148 1. " POD1 ,Port Output Data 11 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x150 0. -0x148 0. " POD0 ,Port Output Data 11 Pin 0" "Low,High"
|
|
group.quad 0x2c0++0x7
|
|
line.quad 0x00 "GPIO_PODR12,Port Output Data Register for Channel 12"
|
|
setclrfld.quad 0x00 63. -0x140 63. -0x138 63. " POD63 ,Port Output Data 12 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x140 62. -0x138 62. " POD62 ,Port Output Data 12 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x140 61. -0x138 61. " POD61 ,Port Output Data 12 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x140 60. -0x138 60. " POD60 ,Port Output Data 12 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x140 59. -0x138 59. " POD59 ,Port Output Data 12 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x140 58. -0x138 58. " POD58 ,Port Output Data 12 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x140 57. -0x138 57. " POD57 ,Port Output Data 12 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x140 56. -0x138 56. " POD56 ,Port Output Data 12 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x140 55. -0x138 55. " POD55 ,Port Output Data 12 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x140 54. -0x138 54. " POD54 ,Port Output Data 12 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x140 53. -0x138 53. " POD53 ,Port Output Data 12 Pin 53" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x140 52. -0x138 52. " POD52 ,Port Output Data 12 Pin 52" "Low,High"
|
|
setclrfld.quad 0x00 51. -0x140 51. -0x138 51. " POD51 ,Port Output Data 12 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x140 50. -0x138 50. " POD50 ,Port Output Data 12 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x140 49. -0x138 49. " POD49 ,Port Output Data 12 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x140 48. -0x138 48. " POD48 ,Port Output Data 12 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x140 47. -0x138 47. " POD47 ,Port Output Data 12 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x140 46. -0x138 46. " POD46 ,Port Output Data 12 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x140 45. -0x138 45. " POD45 ,Port Output Data 12 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x140 44. -0x138 44. " POD44 ,Port Output Data 12 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x140 43. -0x138 43. " POD43 ,Port Output Data 12 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x140 42. -0x138 42. " POD42 ,Port Output Data 12 Pin 42" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x140 41. -0x138 41. " POD41 ,Port Output Data 12 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x140 40. -0x138 40. " POD40 ,Port Output Data 12 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x140 39. -0x138 39. " POD39 ,Port Output Data 12 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x140 38. -0x138 38. " POD38 ,Port Output Data 12 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x140 37. -0x138 37. " POD37 ,Port Output Data 12 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x140 36. -0x138 36. " POD36 ,Port Output Data 12 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x140 35. -0x138 35. " POD35 ,Port Output Data 12 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x140 34. -0x138 34. " POD34 ,Port Output Data 12 Pin 34" "Low,High"
|
|
setclrfld.quad 0x00 33. -0x140 33. -0x138 33. " POD33 ,Port Output Data 12 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x140 32. -0x138 32. " POD32 ,Port Output Data 12 Pin 32" "Low,High"
|
|
setclrfld.quad 0x00 31. -0x140 31. -0x138 31. " POD31 ,Port Output Data 12 Pin 31" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x140 30. -0x138 30. " POD30 ,Port Output Data 12 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x140 29. -0x138 29. " POD29 ,Port Output Data 12 Pin 29" "Low,High"
|
|
setclrfld.quad 0x00 28. -0x140 28. -0x138 28. " POD28 ,Port Output Data 12 Pin 28" "Low,High"
|
|
setclrfld.quad 0x00 27. -0x140 27. -0x138 27. " POD27 ,Port Output Data 12 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x140 26. -0x138 26. " POD26 ,Port Output Data 12 Pin 26" "Low,High"
|
|
setclrfld.quad 0x00 25. -0x140 25. -0x138 25. " POD25 ,Port Output Data 12 Pin 25" "Low,High"
|
|
setclrfld.quad 0x00 24. -0x140 24. -0x138 24. " POD24 ,Port Output Data 12 Pin 24" "Low,High"
|
|
setclrfld.quad 0x00 23. -0x140 23. -0x138 23. " POD23 ,Port Output Data 12 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x140 22. -0x138 22. " POD22 ,Port Output Data 12 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x140 21. -0x138 21. " POD21 ,Port Output Data 12 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x140 20. -0x138 20. " POD20 ,Port Output Data 12 Pin 20" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x140 19. -0x138 19. " POD19 ,Port Output Data 12 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x140 18. -0x138 18. " POD18 ,Port Output Data 12 Pin 18" "Low,High"
|
|
setclrfld.quad 0x00 17. -0x140 17. -0x138 17. " POD17 ,Port Output Data 12 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x140 16. -0x138 16. " POD16 ,Port Output Data 12 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x140 15. -0x138 15. " POD15 ,Port Output Data 12 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x140 14. -0x138 14. " POD14 ,Port Output Data 12 Pin 14" "Low,High"
|
|
setclrfld.quad 0x00 13. -0x140 13. -0x138 13. " POD13 ,Port Output Data 12 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x140 12. -0x138 12. " POD12 ,Port Output Data 12 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x140 11. -0x138 11. " POD11 ,Port Output Data 12 Pin 11" "Low,High"
|
|
setclrfld.quad 0x00 10. -0x140 10. -0x138 10. " POD10 ,Port Output Data 12 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x140 9. -0x138 9. " POD9 ,Port Output Data 12 Pin 9" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x140 8. -0x138 8. " POD8 ,Port Output Data 12 Pin 8" "Low,High"
|
|
setclrfld.quad 0x00 7. -0x140 7. -0x138 7. " POD7 ,Port Output Data 12 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x140 6. -0x138 6. " POD6 ,Port Output Data 12 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x140 5. -0x138 5. " POD5 ,Port Output Data 12 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x140 4. -0x138 4. " POD4 ,Port Output Data 12 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x140 3. -0x138 3. " POD3 ,Port Output Data 12 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x140 2. -0x138 2. " POD2 ,Port Output Data 12 Pin 2" "Low,High"
|
|
setclrfld.quad 0x00 1. -0x140 1. -0x138 1. " POD1 ,Port Output Data 12 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x140 0. -0x138 0. " POD0 ,Port Output Data 12 Pin 0" "Low,High"
|
|
group.quad 0x2d0++0x7
|
|
line.quad 0x00 "GPIO_PODR13,Port Output Data Register for Channel 13"
|
|
setclrfld.quad 0x00 63. -0x130 63. -0x128 63. " POD63 ,Port Output Data 13 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x130 62. -0x128 62. " POD62 ,Port Output Data 13 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x130 61. -0x128 61. " POD61 ,Port Output Data 13 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x130 60. -0x128 60. " POD60 ,Port Output Data 13 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x130 59. -0x128 59. " POD59 ,Port Output Data 13 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x130 58. -0x128 58. " POD58 ,Port Output Data 13 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x130 57. -0x128 57. " POD57 ,Port Output Data 13 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x130 56. -0x128 56. " POD56 ,Port Output Data 13 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x130 55. -0x128 55. " POD55 ,Port Output Data 13 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x130 54. -0x128 54. " POD54 ,Port Output Data 13 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x130 53. -0x128 53. " POD53 ,Port Output Data 13 Pin 53" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x130 52. -0x128 52. " POD52 ,Port Output Data 13 Pin 52" "Low,High"
|
|
setclrfld.quad 0x00 51. -0x130 51. -0x128 51. " POD51 ,Port Output Data 13 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x130 50. -0x128 50. " POD50 ,Port Output Data 13 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x130 49. -0x128 49. " POD49 ,Port Output Data 13 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x130 48. -0x128 48. " POD48 ,Port Output Data 13 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x130 47. -0x128 47. " POD47 ,Port Output Data 13 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x130 46. -0x128 46. " POD46 ,Port Output Data 13 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x130 45. -0x128 45. " POD45 ,Port Output Data 13 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x130 44. -0x128 44. " POD44 ,Port Output Data 13 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x130 43. -0x128 43. " POD43 ,Port Output Data 13 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x130 42. -0x128 42. " POD42 ,Port Output Data 13 Pin 42" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x130 41. -0x128 41. " POD41 ,Port Output Data 13 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x130 40. -0x128 40. " POD40 ,Port Output Data 13 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x130 39. -0x128 39. " POD39 ,Port Output Data 13 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x130 38. -0x128 38. " POD38 ,Port Output Data 13 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x130 37. -0x128 37. " POD37 ,Port Output Data 13 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x130 36. -0x128 36. " POD36 ,Port Output Data 13 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x130 35. -0x128 35. " POD35 ,Port Output Data 13 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x130 34. -0x128 34. " POD34 ,Port Output Data 13 Pin 34" "Low,High"
|
|
setclrfld.quad 0x00 33. -0x130 33. -0x128 33. " POD33 ,Port Output Data 13 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x130 32. -0x128 32. " POD32 ,Port Output Data 13 Pin 32" "Low,High"
|
|
setclrfld.quad 0x00 31. -0x130 31. -0x128 31. " POD31 ,Port Output Data 13 Pin 31" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x130 30. -0x128 30. " POD30 ,Port Output Data 13 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x130 29. -0x128 29. " POD29 ,Port Output Data 13 Pin 29" "Low,High"
|
|
setclrfld.quad 0x00 28. -0x130 28. -0x128 28. " POD28 ,Port Output Data 13 Pin 28" "Low,High"
|
|
setclrfld.quad 0x00 27. -0x130 27. -0x128 27. " POD27 ,Port Output Data 13 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x130 26. -0x128 26. " POD26 ,Port Output Data 13 Pin 26" "Low,High"
|
|
setclrfld.quad 0x00 25. -0x130 25. -0x128 25. " POD25 ,Port Output Data 13 Pin 25" "Low,High"
|
|
setclrfld.quad 0x00 24. -0x130 24. -0x128 24. " POD24 ,Port Output Data 13 Pin 24" "Low,High"
|
|
setclrfld.quad 0x00 23. -0x130 23. -0x128 23. " POD23 ,Port Output Data 13 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x130 22. -0x128 22. " POD22 ,Port Output Data 13 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x130 21. -0x128 21. " POD21 ,Port Output Data 13 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x130 20. -0x128 20. " POD20 ,Port Output Data 13 Pin 20" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x130 19. -0x128 19. " POD19 ,Port Output Data 13 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x130 18. -0x128 18. " POD18 ,Port Output Data 13 Pin 18" "Low,High"
|
|
setclrfld.quad 0x00 17. -0x130 17. -0x128 17. " POD17 ,Port Output Data 13 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x130 16. -0x128 16. " POD16 ,Port Output Data 13 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x130 15. -0x128 15. " POD15 ,Port Output Data 13 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x130 14. -0x128 14. " POD14 ,Port Output Data 13 Pin 14" "Low,High"
|
|
setclrfld.quad 0x00 13. -0x130 13. -0x128 13. " POD13 ,Port Output Data 13 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x130 12. -0x128 12. " POD12 ,Port Output Data 13 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x130 11. -0x128 11. " POD11 ,Port Output Data 13 Pin 11" "Low,High"
|
|
setclrfld.quad 0x00 10. -0x130 10. -0x128 10. " POD10 ,Port Output Data 13 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x130 9. -0x128 9. " POD9 ,Port Output Data 13 Pin 9" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 8. -0x130 8. -0x128 8. " POD8 ,Port Output Data 13 Pin 8" "Low,High"
|
|
setclrfld.quad 0x00 7. -0x130 7. -0x128 7. " POD7 ,Port Output Data 13 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x130 6. -0x128 6. " POD6 ,Port Output Data 13 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x130 5. -0x128 5. " POD5 ,Port Output Data 13 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x130 4. -0x128 4. " POD4 ,Port Output Data 13 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x130 3. -0x128 3. " POD3 ,Port Output Data 13 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x130 2. -0x128 2. " POD2 ,Port Output Data 13 Pin 2" "Low,High"
|
|
setclrfld.quad 0x00 1. -0x130 1. -0x128 1. " POD1 ,Port Output Data 13 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x130 0. -0x128 0. " POD0 ,Port Output Data 13 Pin 0" "Low,High"
|
|
group.quad 0x2e0++0x7
|
|
line.quad 0x00 "GPIO_PODR14,Port Output Data Register for Channel 14"
|
|
setclrfld.quad 0x00 63. -0x120 63. -0x118 63. " POD63 ,Port Output Data 14 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x120 62. -0x118 62. " POD62 ,Port Output Data 14 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x120 61. -0x118 61. " POD61 ,Port Output Data 14 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x120 60. -0x118 60. " POD60 ,Port Output Data 14 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x120 59. -0x118 59. " POD59 ,Port Output Data 14 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x120 58. -0x118 58. " POD58 ,Port Output Data 14 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x120 57. -0x118 57. " POD57 ,Port Output Data 14 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x120 56. -0x118 56. " POD56 ,Port Output Data 14 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x120 55. -0x118 55. " POD55 ,Port Output Data 14 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x120 54. -0x118 54. " POD54 ,Port Output Data 14 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x120 53. -0x118 53. " POD53 ,Port Output Data 14 Pin 53" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 52. -0x120 52. -0x118 52. " POD52 ,Port Output Data 14 Pin 52" "Low,High"
|
|
setclrfld.quad 0x00 51. -0x120 51. -0x118 51. " POD51 ,Port Output Data 14 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x120 50. -0x118 50. " POD50 ,Port Output Data 14 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x120 49. -0x118 49. " POD49 ,Port Output Data 14 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x120 48. -0x118 48. " POD48 ,Port Output Data 14 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x120 47. -0x118 47. " POD47 ,Port Output Data 14 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x120 46. -0x118 46. " POD46 ,Port Output Data 14 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x120 45. -0x118 45. " POD45 ,Port Output Data 14 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x120 44. -0x118 44. " POD44 ,Port Output Data 14 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x120 43. -0x118 43. " POD43 ,Port Output Data 14 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x120 42. -0x118 42. " POD42 ,Port Output Data 14 Pin 42" "Low,High"
|
|
textline " "
|
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setclrfld.quad 0x00 41. -0x120 41. -0x118 41. " POD41 ,Port Output Data 14 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x120 40. -0x118 40. " POD40 ,Port Output Data 14 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x120 39. -0x118 39. " POD39 ,Port Output Data 14 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x120 38. -0x118 38. " POD38 ,Port Output Data 14 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x120 37. -0x118 37. " POD37 ,Port Output Data 14 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x120 36. -0x118 36. " POD36 ,Port Output Data 14 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x120 35. -0x118 35. " POD35 ,Port Output Data 14 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x120 34. -0x118 34. " POD34 ,Port Output Data 14 Pin 34" "Low,High"
|
|
setclrfld.quad 0x00 33. -0x120 33. -0x118 33. " POD33 ,Port Output Data 14 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x120 32. -0x118 32. " POD32 ,Port Output Data 14 Pin 32" "Low,High"
|
|
setclrfld.quad 0x00 31. -0x120 31. -0x118 31. " POD31 ,Port Output Data 14 Pin 31" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x120 30. -0x118 30. " POD30 ,Port Output Data 14 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x120 29. -0x118 29. " POD29 ,Port Output Data 14 Pin 29" "Low,High"
|
|
setclrfld.quad 0x00 28. -0x120 28. -0x118 28. " POD28 ,Port Output Data 14 Pin 28" "Low,High"
|
|
setclrfld.quad 0x00 27. -0x120 27. -0x118 27. " POD27 ,Port Output Data 14 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x120 26. -0x118 26. " POD26 ,Port Output Data 14 Pin 26" "Low,High"
|
|
setclrfld.quad 0x00 25. -0x120 25. -0x118 25. " POD25 ,Port Output Data 14 Pin 25" "Low,High"
|
|
setclrfld.quad 0x00 24. -0x120 24. -0x118 24. " POD24 ,Port Output Data 14 Pin 24" "Low,High"
|
|
setclrfld.quad 0x00 23. -0x120 23. -0x118 23. " POD23 ,Port Output Data 14 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x120 22. -0x118 22. " POD22 ,Port Output Data 14 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x120 21. -0x118 21. " POD21 ,Port Output Data 14 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x120 20. -0x118 20. " POD20 ,Port Output Data 14 Pin 20" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x120 19. -0x118 19. " POD19 ,Port Output Data 14 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x120 18. -0x118 18. " POD18 ,Port Output Data 14 Pin 18" "Low,High"
|
|
setclrfld.quad 0x00 17. -0x120 17. -0x118 17. " POD17 ,Port Output Data 14 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x120 16. -0x118 16. " POD16 ,Port Output Data 14 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x120 15. -0x118 15. " POD15 ,Port Output Data 14 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x120 14. -0x118 14. " POD14 ,Port Output Data 14 Pin 14" "Low,High"
|
|
setclrfld.quad 0x00 13. -0x120 13. -0x118 13. " POD13 ,Port Output Data 14 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x120 12. -0x118 12. " POD12 ,Port Output Data 14 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x120 11. -0x118 11. " POD11 ,Port Output Data 14 Pin 11" "Low,High"
|
|
setclrfld.quad 0x00 10. -0x120 10. -0x118 10. " POD10 ,Port Output Data 14 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x120 9. -0x118 9. " POD9 ,Port Output Data 14 Pin 9" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x120 8. -0x118 8. " POD8 ,Port Output Data 14 Pin 8" "Low,High"
|
|
setclrfld.quad 0x00 7. -0x120 7. -0x118 7. " POD7 ,Port Output Data 14 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x120 6. -0x118 6. " POD6 ,Port Output Data 14 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x120 5. -0x118 5. " POD5 ,Port Output Data 14 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x120 4. -0x118 4. " POD4 ,Port Output Data 14 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x120 3. -0x118 3. " POD3 ,Port Output Data 14 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x120 2. -0x118 2. " POD2 ,Port Output Data 14 Pin 2" "Low,High"
|
|
setclrfld.quad 0x00 1. -0x120 1. -0x118 1. " POD1 ,Port Output Data 14 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x120 0. -0x118 0. " POD0 ,Port Output Data 14 Pin 0" "Low,High"
|
|
group.quad 0x2f0++0x7
|
|
line.quad 0x00 "GPIO_PODR15,Port Output Data Register for Channel 15"
|
|
setclrfld.quad 0x00 63. -0x110 63. -0x108 63. " POD63 ,Port Output Data 15 Pin 63" "Low,High"
|
|
setclrfld.quad 0x00 62. -0x110 62. -0x108 62. " POD62 ,Port Output Data 15 Pin 62" "Low,High"
|
|
setclrfld.quad 0x00 61. -0x110 61. -0x108 61. " POD61 ,Port Output Data 15 Pin 61" "Low,High"
|
|
setclrfld.quad 0x00 60. -0x110 60. -0x108 60. " POD60 ,Port Output Data 15 Pin 60" "Low,High"
|
|
setclrfld.quad 0x00 59. -0x110 59. -0x108 59. " POD59 ,Port Output Data 15 Pin 59" "Low,High"
|
|
setclrfld.quad 0x00 58. -0x110 58. -0x108 58. " POD58 ,Port Output Data 15 Pin 58" "Low,High"
|
|
setclrfld.quad 0x00 57. -0x110 57. -0x108 57. " POD57 ,Port Output Data 15 Pin 57" "Low,High"
|
|
setclrfld.quad 0x00 56. -0x110 56. -0x108 56. " POD56 ,Port Output Data 15 Pin 56" "Low,High"
|
|
setclrfld.quad 0x00 55. -0x110 55. -0x108 55. " POD55 ,Port Output Data 15 Pin 55" "Low,High"
|
|
setclrfld.quad 0x00 54. -0x110 54. -0x108 54. " POD54 ,Port Output Data 15 Pin 54" "Low,High"
|
|
setclrfld.quad 0x00 53. -0x110 53. -0x108 53. " POD53 ,Port Output Data 15 Pin 53" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 52. -0x110 52. -0x108 52. " POD52 ,Port Output Data 15 Pin 52" "Low,High"
|
|
setclrfld.quad 0x00 51. -0x110 51. -0x108 51. " POD51 ,Port Output Data 15 Pin 51" "Low,High"
|
|
setclrfld.quad 0x00 50. -0x110 50. -0x108 50. " POD50 ,Port Output Data 15 Pin 50" "Low,High"
|
|
setclrfld.quad 0x00 49. -0x110 49. -0x108 49. " POD49 ,Port Output Data 15 Pin 49" "Low,High"
|
|
setclrfld.quad 0x00 48. -0x110 48. -0x108 48. " POD48 ,Port Output Data 15 Pin 48" "Low,High"
|
|
setclrfld.quad 0x00 47. -0x110 47. -0x108 47. " POD47 ,Port Output Data 15 Pin 47" "Low,High"
|
|
setclrfld.quad 0x00 46. -0x110 46. -0x108 46. " POD46 ,Port Output Data 15 Pin 46" "Low,High"
|
|
setclrfld.quad 0x00 45. -0x110 45. -0x108 45. " POD45 ,Port Output Data 15 Pin 45" "Low,High"
|
|
setclrfld.quad 0x00 44. -0x110 44. -0x108 44. " POD44 ,Port Output Data 15 Pin 44" "Low,High"
|
|
setclrfld.quad 0x00 43. -0x110 43. -0x108 43. " POD43 ,Port Output Data 15 Pin 43" "Low,High"
|
|
setclrfld.quad 0x00 42. -0x110 42. -0x108 42. " POD42 ,Port Output Data 15 Pin 42" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 41. -0x110 41. -0x108 41. " POD41 ,Port Output Data 15 Pin 41" "Low,High"
|
|
setclrfld.quad 0x00 40. -0x110 40. -0x108 40. " POD40 ,Port Output Data 15 Pin 40" "Low,High"
|
|
setclrfld.quad 0x00 39. -0x110 39. -0x108 39. " POD39 ,Port Output Data 15 Pin 39" "Low,High"
|
|
setclrfld.quad 0x00 38. -0x110 38. -0x108 38. " POD38 ,Port Output Data 15 Pin 38" "Low,High"
|
|
setclrfld.quad 0x00 37. -0x110 37. -0x108 37. " POD37 ,Port Output Data 15 Pin 37" "Low,High"
|
|
setclrfld.quad 0x00 36. -0x110 36. -0x108 36. " POD36 ,Port Output Data 15 Pin 36" "Low,High"
|
|
setclrfld.quad 0x00 35. -0x110 35. -0x108 35. " POD35 ,Port Output Data 15 Pin 35" "Low,High"
|
|
setclrfld.quad 0x00 34. -0x110 34. -0x108 34. " POD34 ,Port Output Data 15 Pin 34" "Low,High"
|
|
setclrfld.quad 0x00 33. -0x110 33. -0x108 33. " POD33 ,Port Output Data 15 Pin 33" "Low,High"
|
|
setclrfld.quad 0x00 32. -0x110 32. -0x108 32. " POD32 ,Port Output Data 15 Pin 32" "Low,High"
|
|
setclrfld.quad 0x00 31. -0x110 31. -0x108 31. " POD31 ,Port Output Data 15 Pin 31" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 30. -0x110 30. -0x108 30. " POD30 ,Port Output Data 15 Pin 30" "Low,High"
|
|
setclrfld.quad 0x00 29. -0x110 29. -0x108 29. " POD29 ,Port Output Data 15 Pin 29" "Low,High"
|
|
setclrfld.quad 0x00 28. -0x110 28. -0x108 28. " POD28 ,Port Output Data 15 Pin 28" "Low,High"
|
|
setclrfld.quad 0x00 27. -0x110 27. -0x108 27. " POD27 ,Port Output Data 15 Pin 27" "Low,High"
|
|
setclrfld.quad 0x00 26. -0x110 26. -0x108 26. " POD26 ,Port Output Data 15 Pin 26" "Low,High"
|
|
setclrfld.quad 0x00 25. -0x110 25. -0x108 25. " POD25 ,Port Output Data 15 Pin 25" "Low,High"
|
|
setclrfld.quad 0x00 24. -0x110 24. -0x108 24. " POD24 ,Port Output Data 15 Pin 24" "Low,High"
|
|
setclrfld.quad 0x00 23. -0x110 23. -0x108 23. " POD23 ,Port Output Data 15 Pin 23" "Low,High"
|
|
setclrfld.quad 0x00 22. -0x110 22. -0x108 22. " POD22 ,Port Output Data 15 Pin 22" "Low,High"
|
|
setclrfld.quad 0x00 21. -0x110 21. -0x108 21. " POD21 ,Port Output Data 15 Pin 21" "Low,High"
|
|
setclrfld.quad 0x00 20. -0x110 20. -0x108 20. " POD20 ,Port Output Data 15 Pin 20" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 19. -0x110 19. -0x108 19. " POD19 ,Port Output Data 15 Pin 19" "Low,High"
|
|
setclrfld.quad 0x00 18. -0x110 18. -0x108 18. " POD18 ,Port Output Data 15 Pin 18" "Low,High"
|
|
setclrfld.quad 0x00 17. -0x110 17. -0x108 17. " POD17 ,Port Output Data 15 Pin 17" "Low,High"
|
|
setclrfld.quad 0x00 16. -0x110 16. -0x108 16. " POD16 ,Port Output Data 15 Pin 16" "Low,High"
|
|
setclrfld.quad 0x00 15. -0x110 15. -0x108 15. " POD15 ,Port Output Data 15 Pin 15" "Low,High"
|
|
setclrfld.quad 0x00 14. -0x110 14. -0x108 14. " POD14 ,Port Output Data 15 Pin 14" "Low,High"
|
|
setclrfld.quad 0x00 13. -0x110 13. -0x108 13. " POD13 ,Port Output Data 15 Pin 13" "Low,High"
|
|
setclrfld.quad 0x00 12. -0x110 12. -0x108 12. " POD12 ,Port Output Data 15 Pin 12" "Low,High"
|
|
setclrfld.quad 0x00 11. -0x110 11. -0x108 11. " POD11 ,Port Output Data 15 Pin 11" "Low,High"
|
|
setclrfld.quad 0x00 10. -0x110 10. -0x108 10. " POD10 ,Port Output Data 15 Pin 10" "Low,High"
|
|
setclrfld.quad 0x00 9. -0x110 9. -0x108 9. " POD9 ,Port Output Data 15 Pin 9" "Low,High"
|
|
textline " "
|
|
setclrfld.quad 0x00 8. -0x110 8. -0x108 8. " POD8 ,Port Output Data 15 Pin 8" "Low,High"
|
|
setclrfld.quad 0x00 7. -0x110 7. -0x108 7. " POD7 ,Port Output Data 15 Pin 7" "Low,High"
|
|
setclrfld.quad 0x00 6. -0x110 6. -0x108 6. " POD6 ,Port Output Data 15 Pin 6" "Low,High"
|
|
setclrfld.quad 0x00 5. -0x110 5. -0x108 5. " POD5 ,Port Output Data 15 Pin 5" "Low,High"
|
|
setclrfld.quad 0x00 4. -0x110 4. -0x108 4. " POD4 ,Port Output Data 15 Pin 4" "Low,High"
|
|
setclrfld.quad 0x00 3. -0x110 3. -0x108 3. " POD3 ,Port Output Data 15 Pin 3" "Low,High"
|
|
setclrfld.quad 0x00 2. -0x110 2. -0x108 2. " POD2 ,Port Output Data 15 Pin 2" "Low,High"
|
|
setclrfld.quad 0x00 1. -0x110 1. -0x108 1. " POD1 ,Port Output Data 15 Pin 1" "Low,High"
|
|
setclrfld.quad 0x00 0. -0x110 0. -0x108 0. " POD0 ,Port Output Data 15 Pin 0" "Low,High"
|
|
endif
|
|
endif
|
|
tree.end
|
|
tree "Port Input Data Registers"
|
|
sif (cpu()=="MB9EF226"&&cpu()=="MB9EF126")
|
|
rgroup.quad 0x300++0x17
|
|
elif (cpu()=="MB9DF126"&&cpu()=="MB9DF125")
|
|
rgroup.quad 0x300++0x1f
|
|
else
|
|
rgroup.quad 0x300++0x7F
|
|
endif
|
|
line.quad 0x00 "GPIO_PIDR0,Port Input Data Register for Channel 0"
|
|
bitfld.quad 0x00 63. " PID63 ,Port Input Data Channel 0 Pin 63" "Low,High"
|
|
bitfld.quad 0x00 62. " PID62 ,Port Input Data Channel 0 Pin 62" "Low,High"
|
|
textline " "
|
|
sif cpu()!="MB9EF226"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
sif cpu()!="MB9EF126"
|
|
bitfld.quad 0x00 61. " PID61 ,Port Input Data Channel 0 Pin 61" "Low,High"
|
|
bitfld.quad 0x00 60. " PID60 ,Port Input Data Channel 0 Pin 60" "Low,High"
|
|
bitfld.quad 0x00 59. " PID59 ,Port Input Data Channel 0 Pin 59" "Low,High"
|
|
bitfld.quad 0x00 58. " PID58 ,Port Input Data Channel 0 Pin 58" "Low,High"
|
|
bitfld.quad 0x00 57. " PID57 ,Port Input Data Channel 0 Pin 57" "Low,High"
|
|
bitfld.quad 0x00 56. " PID56 ,Port Input Data Channel 0 Pin 56" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x00 55. " PID55 ,Port Input Data Channel 0 Pin 55" "Low,High"
|
|
bitfld.quad 0x00 54. " PID54 ,Port Input Data Channel 0 Pin 54" "Low,High"
|
|
bitfld.quad 0x00 53. " PID53 ,Port Input Data Channel 0 Pin 53" "Low,High"
|
|
textline " "
|
|
endif
|
|
textline " "
|
|
bitfld.quad 0x00 52. " PID52 ,Port Input Data Channel 0 Pin 52" "Low,High"
|
|
endif
|
|
bitfld.quad 0x00 51. " PID51 ,Port Input Data Channel 0 Pin 51" "Low,High"
|
|
bitfld.quad 0x00 50. " PID50 ,Port Input Data Channel 0 Pin 50" "Low,High"
|
|
endif
|
|
bitfld.quad 0x00 49. " PID49 ,Port Input Data Channel 0 Pin 49" "Low,High"
|
|
bitfld.quad 0x00 48. " PID48 ,Port Input Data Channel 0 Pin 48" "Low,High"
|
|
bitfld.quad 0x00 47. " PID47 ,Port Input Data Channel 0 Pin 47" "Low,High"
|
|
bitfld.quad 0x00 46. " PID46 ,Port Input Data Channel 0 Pin 46" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x00 45. " PID45 ,Port Input Data Channel 0 Pin 45" "Low,High"
|
|
bitfld.quad 0x00 44. " PID44 ,Port Input Data Channel 0 Pin 44" "Low,High"
|
|
bitfld.quad 0x00 43. " PID43 ,Port Input Data Channel 0 Pin 43" "Low,High"
|
|
bitfld.quad 0x00 42. " PID42 ,Port Input Data Channel 0 Pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x00 41. " PID41 ,Port Input Data Channel 0 Pin 41" "Low,High"
|
|
bitfld.quad 0x00 40. " PID40 ,Port Input Data Channel 0 Pin 40" "Low,High"
|
|
sif cpu()!="MB9DF126"
|
|
sif cpu()!="MB9EF226"
|
|
sif cpu()!="MB9DF125"
|
|
bitfld.quad 0x00 39. " PID39 ,Port Input Data Channel 0 Pin 39" "Low,High"
|
|
bitfld.quad 0x00 38. " PID38 ,Port Input Data Channel 0 Pin 38" "Low,High"
|
|
bitfld.quad 0x00 37. " PID37 ,Port Input Data Channel 0 Pin 37" "Low,High"
|
|
bitfld.quad 0x00 36. " PID36 ,Port Input Data Channel 0 Pin 36" "Low,High"
|
|
bitfld.quad 0x00 35. " PID35 ,Port Input Data Channel 0 Pin 35" "Low,High"
|
|
bitfld.quad 0x00 34. " PID34 ,Port Input Data Channel 0 Pin 34" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x00 33. " PID33 ,Port Input Data Channel 0 Pin 33" "Low,High"
|
|
bitfld.quad 0x00 32. " PID32 ,Port Input Data Channel 0 Pin 32" "Low,High"
|
|
bitfld.quad 0x00 31. " PID31 ,Port Input Data Channel 0 Pin 31" "Low,High"
|
|
bitfld.quad 0x00 30. " PID30 ,Port Input Data Channel 0 Pin 30" "Low,High"
|
|
bitfld.quad 0x00 29. " PID29 ,Port Input Data Channel 0 Pin 29" "Low,High"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x00 28. " PID28 ,Port Input Data Channel 0 Pin 28" "Low,High"
|
|
bitfld.quad 0x00 27. " PID27 ,Port Input Data Channel 0 Pin 27" "Low,High"
|
|
bitfld.quad 0x00 26. " PID26 ,Port Input Data Channel 0 Pin 26" "Low,High"
|
|
textline " "
|
|
endif
|
|
sif cpu()!="MB9DF125"
|
|
bitfld.quad 0x00 25. " PID25 ,Port Input Data Channel 0 Pin 25" "Low,High"
|
|
bitfld.quad 0x00 24. " PID24 ,Port Input Data Channel 0 Pin 24" "Low,High"
|
|
textline " "
|
|
endif
|
|
sif cpu()!="MB9EF226"
|
|
sif cpu()!="MB9DF125"
|
|
bitfld.quad 0x00 23. " PID23 ,Port Input Data Channel 0 Pin 23" "Low,High"
|
|
bitfld.quad 0x00 22. " PID22 ,Port Input Data Channel 0 Pin 22" "Low,High"
|
|
bitfld.quad 0x00 21. " PID21 ,Port Input Data Channel 0 Pin 21" "Low,High"
|
|
bitfld.quad 0x00 20. " PID20 ,Port Input Data Channel 0 Pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x00 19. " PID19 ,Port Input Data Channel 0 Pin 19" "Low,High"
|
|
bitfld.quad 0x00 18. " PID18 ,Port Input Data Channel 0 Pin 18" "Low,High"
|
|
bitfld.quad 0x00 17. " PID17 ,Port Input Data Channel 0 Pin 17" "Low,High"
|
|
bitfld.quad 0x00 16. " PID16 ,Port Input Data Channel 0 Pin 16" "Low,High"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x00 15. " PID15 ,Port Input Data Channel 0 Pin 15" "Low,High"
|
|
bitfld.quad 0x00 14. " PID14 ,Port Input Data Channel 0 Pin 14" "Low,High"
|
|
bitfld.quad 0x00 13. " PID13 ,Port Input Data Channel 0 Pin 13" "Low,High"
|
|
bitfld.quad 0x00 12. " PID12 ,Port Input Data Channel 0 Pin 12" "Low,High"
|
|
bitfld.quad 0x00 11. " PID11 ,Port Input Data Channel 0 Pin 11" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x00 10. " PID10 ,Port Input Data Channel 0 Pin 10" "Low,High"
|
|
bitfld.quad 0x00 9. " PID9 ,Port Input Data Channel 0 Pin 9" "Low,High"
|
|
bitfld.quad 0x00 8. " PID8 ,Port Input Data Channel 0 Pin 8" "Low,High"
|
|
textline " "
|
|
sif cpu()!="MB9DF125"
|
|
bitfld.quad 0x00 7. " PID7 ,Port Input Data Channel 0 Pin 7" "Low,High"
|
|
bitfld.quad 0x00 6. " PID6 ,Port Input Data Channel 0 Pin 6" "Low,High"
|
|
bitfld.quad 0x00 5. " PID5 ,Port Input Data Channel 0 Pin 5" "Low,High"
|
|
bitfld.quad 0x00 4. " PID4 ,Port Input Data Channel 0 Pin 4" "Low,High"
|
|
bitfld.quad 0x00 3. " PID3 ,Port Input Data Channel 0 Pin 3" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x00 2. " PID2 ,Port Input Data Channel 0 Pin 2" "Low,High"
|
|
bitfld.quad 0x00 1. " PID1 ,Port Input Data Channel 0 Pin 1" "Low,High"
|
|
bitfld.quad 0x00 0. " PID0 ,Port Input Data Channel 0 Pin 0" "Low,High"
|
|
endif
|
|
endif
|
|
endif
|
|
line.quad 0x08 "GPIO_PIDR1,Port Input Data Register for Channel 1"
|
|
sif cpu()!="MB9DF125"
|
|
sif cpu()!="MB9EF126"
|
|
sif cpu()!="MB9EF226"
|
|
bitfld.quad 0x08 63. " PID63 ,Port Input Data Channel 1 Pin 63" "Low,High"
|
|
endif
|
|
bitfld.quad 0x08 62. " PID62 ,Port Input Data Channel 1 Pin 62" "Low,High"
|
|
bitfld.quad 0x08 61. " PID61 ,Port Input Data Channel 1 Pin 61" "Low,High"
|
|
bitfld.quad 0x08 60. " PID60 ,Port Input Data Channel 1 Pin 60" "Low,High"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x08 59. " PID59 ,Port Input Data Channel 1 Pin 59" "Low,High"
|
|
bitfld.quad 0x08 58. " PID58 ,Port Input Data Channel 1 Pin 58" "Low,High"
|
|
bitfld.quad 0x08 57. " PID57 ,Port Input Data Channel 1 Pin 57" "Low,High"
|
|
bitfld.quad 0x08 56. " PID56 ,Port Input Data Channel 1 Pin 56" "Low,High"
|
|
bitfld.quad 0x08 55. " PID55 ,Port Input Data Channel 1 Pin 55" "Low,High"
|
|
bitfld.quad 0x08 54. " PID54 ,Port Input Data Channel 1 Pin 54" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x08 53. " PID53 ,Port Input Data Channel 1 Pin 53" "Low,High"
|
|
bitfld.quad 0x08 52. " PID52 ,Port Input Data Channel 1 Pin 52" "Low,High"
|
|
bitfld.quad 0x08 51. " PID51 ,Port Input Data Channel 1 Pin 51" "Low,High"
|
|
bitfld.quad 0x08 50. " PID50 ,Port Input Data Channel 1 Pin 50" "Low,High"
|
|
bitfld.quad 0x08 49. " PID49 ,Port Input Data Channel 1 Pin 49" "Low,High"
|
|
bitfld.quad 0x08 48. " PID48 ,Port Input Data Channel 1 Pin 48" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x08 47. " PID47 ,Port Input Data Channel 1 Pin 47" "Low,High"
|
|
bitfld.quad 0x08 46. " PID46 ,Port Input Data Channel 1 Pin 46" "Low,High"
|
|
bitfld.quad 0x08 45. " PID45 ,Port Input Data Channel 1 Pin 45" "Low,High"
|
|
bitfld.quad 0x08 44. " PID44 ,Port Input Data Channel 1 Pin 44" "Low,High"
|
|
bitfld.quad 0x08 43. " PID43 ,Port Input Data Channel 1 Pin 43" "Low,High"
|
|
bitfld.quad 0x08 42. " PID42 ,Port Input Data Channel 1 Pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x08 41. " PID41 ,Port Input Data Channel 1 Pin 41" "Low,High"
|
|
bitfld.quad 0x08 40. " PID40 ,Port Input Data Channel 1 Pin 40" "Low,High"
|
|
bitfld.quad 0x08 39. " PID39 ,Port Input Data Channel 1 Pin 39" "Low,High"
|
|
textline " "
|
|
endif
|
|
sif cpu()!="MB9DF126"
|
|
bitfld.quad 0x08 38. " PID38 ,Port Input Data Channel 1 Pin 38" "Low,High"
|
|
bitfld.quad 0x08 37. " PID37 ,Port Input Data Channel 1 Pin 37" "Low,High"
|
|
bitfld.quad 0x08 36. " PID36 ,Port Input Data Channel 1 Pin 36" "Low,High"
|
|
bitfld.quad 0x08 35. " PID35 ,Port Input Data Channel 1 Pin 35" "Low,High"
|
|
bitfld.quad 0x08 34. " PID34 ,Port Input Data Channel 1 Pin 34" "Low,High"
|
|
bitfld.quad 0x08 33. " PID33 ,Port Input Data Channel 1 Pin 33" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x08 32. " PID32 ,Port Input Data Channel 1 Pin 32" "Low,High"
|
|
bitfld.quad 0x08 31. " PID31 ,Port Input Data Channel 1 Pin 31" "Low,High"
|
|
bitfld.quad 0x08 30. " PID30 ,Port Input Data Channel 1 Pin 30" "Low,High"
|
|
bitfld.quad 0x08 29. " PID29 ,Port Input Data Channel 1 Pin 29" "Low,High"
|
|
bitfld.quad 0x08 28. " PID28 ,Port Input Data Channel 1 Pin 28" "Low,High"
|
|
bitfld.quad 0x08 27. " PID27 ,Port Input Data Channel 1 Pin 27" "Low,High"
|
|
bitfld.quad 0x08 26. " PID26 ,Port Input Data Channel 1 Pin 26" "Low,High"
|
|
textline " "
|
|
sif cpu()!="MB9EF226"
|
|
bitfld.quad 0x08 25. " PID25 ,Port Input Data Channel 1 Pin 25" "Low,High"
|
|
bitfld.quad 0x08 24. " PID24 ,Port Input Data Channel 1 Pin 24" "Low,High"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x08 23. " PID23 ,Port Input Data Channel 1 Pin 23" "Low,High"
|
|
bitfld.quad 0x08 22. " PID22 ,Port Input Data Channel 1 Pin 22" "Low,High"
|
|
bitfld.quad 0x08 21. " PID21 ,Port Input Data Channel 1 Pin 21" "Low,High"
|
|
bitfld.quad 0x08 20. " PID20 ,Port Input Data Channel 1 Pin 20" "Low,High"
|
|
bitfld.quad 0x08 19. " PID19 ,Port Input Data Channel 1 Pin 19" "Low,High"
|
|
bitfld.quad 0x08 18. " PID18 ,Port Input Data Channel 1 Pin 18" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x08 17. " PID17 ,Port Input Data Channel 1 Pin 17" "Low,High"
|
|
bitfld.quad 0x08 16. " PID16 ,Port Input Data Channel 1 Pin 16" "Low,High"
|
|
bitfld.quad 0x08 15. " PID15 ,Port Input Data Channel 1 Pin 15" "Low,High"
|
|
bitfld.quad 0x08 14. " PID14 ,Port Input Data Channel 1 Pin 14" "Low,High"
|
|
bitfld.quad 0x08 13. " PID13 ,Port Input Data Channel 1 Pin 13" "Low,High"
|
|
bitfld.quad 0x08 12. " PID12 ,Port Input Data Channel 1 Pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x08 11. " PID11 ,Port Input Data Channel 1 Pin 11" "Low,High"
|
|
bitfld.quad 0x08 10. " PID10 ,Port Input Data Channel 1 Pin 10" "Low,High"
|
|
bitfld.quad 0x08 9. " PID9 ,Port Input Data Channel 1 Pin 9" "Low,High"
|
|
bitfld.quad 0x08 8. " PID8 ,Port Input Data Channel 1 Pin 8" "Low,High"
|
|
bitfld.quad 0x08 7. " PID7 ,Port Input Data Channel 1 Pin 7" "Low,High"
|
|
bitfld.quad 0x08 6. " PID6 ,Port Input Data Channel 1 Pin 6" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x08 5. " PID5 ,Port Input Data Channel 1 Pin 5" "Low,High"
|
|
bitfld.quad 0x08 4. " PID4 ,Port Input Data Channel 1 Pin 4" "Low,High"
|
|
bitfld.quad 0x08 3. " PID3 ,Port Input Data Channel 1 Pin 3" "Low,High"
|
|
bitfld.quad 0x08 2. " PID2 ,Port Input Data Channel 1 Pin 2" "Low,High"
|
|
bitfld.quad 0x08 1. " PID1 ,Port Input Data Channel 1 Pin 1" "Low,High"
|
|
bitfld.quad 0x08 0. " PID0 ,Port Input Data Channel 1 Pin 0" "Low,High"
|
|
endif
|
|
line.quad 0x10 "GPIO_PIDR2,Port Input Data Register for Channel 2"
|
|
sif cpu()!="MB9EF126"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
sif cpu()!="MB9EF226"
|
|
bitfld.quad 0x10 63. " PID63 ,Port Input Data Channel 2 Pin 63" "Low,High"
|
|
bitfld.quad 0x10 62. " PID62 ,Port Input Data Channel 2 Pin 62" "Low,High"
|
|
bitfld.quad 0x10 61. " PID61 ,Port Input Data Channel 2 Pin 61" "Low,High"
|
|
bitfld.quad 0x10 60. " PID60 ,Port Input Data Channel 2 Pin 60" "Low,High"
|
|
bitfld.quad 0x10 59. " PID59 ,Port Input Data Channel 2 Pin 59" "Low,High"
|
|
bitfld.quad 0x10 58. " PID58 ,Port Input Data Channel 2 Pin 58" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x10 57. " PID57 ,Port Input Data Channel 2 Pin 57" "Low,High"
|
|
bitfld.quad 0x10 56. " PID56 ,Port Input Data Channel 2 Pin 56" "Low,High"
|
|
bitfld.quad 0x10 55. " PID55 ,Port Input Data Channel 2 Pin 55" "Low,High"
|
|
bitfld.quad 0x10 54. " PID54 ,Port Input Data Channel 2 Pin 54" "Low,High"
|
|
bitfld.quad 0x10 53. " PID53 ,Port Input Data Channel 2 Pin 53" "Low,High"
|
|
bitfld.quad 0x10 52. " PID52 ,Port Input Data Channel 2 Pin 52" "Low,High"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x10 51. " PID51 ,Port Input Data Channel 2 Pin 51" "Low,High"
|
|
bitfld.quad 0x10 50. " PID50 ,Port Input Data Channel 2 Pin 50" "Low,High"
|
|
bitfld.quad 0x10 49. " PID49 ,Port Input Data Channel 2 Pin 49" "Low,High"
|
|
bitfld.quad 0x10 48. " PID48 ,Port Input Data Channel 2 Pin 48" "Low,High"
|
|
textline " "
|
|
endif
|
|
sif cpu()!="MB9EF226"
|
|
bitfld.quad 0x10 47. " PID47 ,Port Input Data Channel 2 Pin 47" "Low,High"
|
|
bitfld.quad 0x10 46. " PID46 ,Port Input Data Channel 2 Pin 46" "Low,High"
|
|
bitfld.quad 0x10 45. " PID45 ,Port Input Data Channel 2 Pin 45" "Low,High"
|
|
bitfld.quad 0x10 44. " PID44 ,Port Input Data Channel 2 Pin 44" "Low,High"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x10 43. " PID43 ,Port Input Data Channel 2 Pin 43" "Low,High"
|
|
bitfld.quad 0x10 42. " PID42 ,Port Input Data Channel 2 Pin 42" "Low,High"
|
|
bitfld.quad 0x10 41. " PID41 ,Port Input Data Channel 2 Pin 41" "Low,High"
|
|
bitfld.quad 0x10 40. " PID40 ,Port Input Data Channel 2 Pin 40" "Low,High"
|
|
bitfld.quad 0x10 39. " PID39 ,Port Input Data Channel 2 Pin 39" "Low,High"
|
|
bitfld.quad 0x10 38. " PID38 ,Port Input Data Channel 2 Pin 38" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x10 37. " PID37 ,Port Input Data Channel 2 Pin 37" "Low,High"
|
|
bitfld.quad 0x10 36. " PID36 ,Port Input Data Channel 2 Pin 36" "Low,High"
|
|
bitfld.quad 0x10 35. " PID35 ,Port Input Data Channel 2 Pin 35" "Low,High"
|
|
bitfld.quad 0x10 34. " PID34 ,Port Input Data Channel 2 Pin 34" "Low,High"
|
|
bitfld.quad 0x10 33. " PID33 ,Port Input Data Channel 2 Pin 33" "Low,High"
|
|
bitfld.quad 0x10 32. " PID32 ,Port Input Data Channel 2 Pin 32" "Low,High"
|
|
textline " "
|
|
sif cpu()!="MB9DF125"
|
|
sif cpu()!="MB9DF126"
|
|
sif cpu()!="MB9EF226"
|
|
bitfld.quad 0x10 31. " PID31 ,Port Input Data Channel 2 Pin 31" "Low,High"
|
|
bitfld.quad 0x10 30. " PID30 ,Port Input Data Channel 2 Pin 30" "Low,High"
|
|
bitfld.quad 0x10 29. " PID29 ,Port Input Data Channel 2 Pin 29" "Low,High"
|
|
bitfld.quad 0x10 28. " PID28 ,Port Input Data Channel 2 Pin 28" "Low,High"
|
|
bitfld.quad 0x10 27. " PID27 ,Port Input Data Channel 2 Pin 27" "Low,High"
|
|
bitfld.quad 0x10 26. " PID26 ,Port Input Data Channel 2 Pin 26" "Low,High"
|
|
textline " "
|
|
endif
|
|
endif
|
|
bitfld.quad 0x10 25. " PID25 ,Port Input Data Channel 2 Pin 25" "Low,High"
|
|
bitfld.quad 0x10 24. " PID24 ,Port Input Data Channel 2 Pin 24" "Low,High"
|
|
bitfld.quad 0x10 23. " PID23 ,Port Input Data Channel 2 Pin 23" "Low,High"
|
|
bitfld.quad 0x10 22. " PID22 ,Port Input Data Channel 2 Pin 22" "Low,High"
|
|
bitfld.quad 0x10 21. " PID21 ,Port Input Data Channel 2 Pin 21" "Low,High"
|
|
bitfld.quad 0x10 20. " PID20 ,Port Input Data Channel 2 Pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x10 19. " PID19 ,Port Input Data Channel 2 Pin 19" "Low,High"
|
|
bitfld.quad 0x10 18. " PID18 ,Port Input Data Channel 2 Pin 18" "Low,High"
|
|
bitfld.quad 0x10 17. " PID17 ,Port Input Data Channel 2 Pin 17" "Low,High"
|
|
bitfld.quad 0x10 16. " PID16 ,Port Input Data Channel 2 Pin 16" "Low,High"
|
|
bitfld.quad 0x10 15. " PID15 ,Port Input Data Channel 2 Pin 15" "Low,High"
|
|
bitfld.quad 0x10 14. " PID14 ,Port Input Data Channel 2 Pin 14" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x10 13. " PID13 ,Port Input Data Channel 2 Pin 13" "Low,High"
|
|
bitfld.quad 0x10 12. " PID12 ,Port Input Data Channel 2 Pin 12" "Low,High"
|
|
bitfld.quad 0x10 11. " PID11 ,Port Input Data Channel 2 Pin 11" "Low,High"
|
|
bitfld.quad 0x10 10. " PID10 ,Port Input Data Channel 2 Pin 10" "Low,High"
|
|
bitfld.quad 0x10 9. " PID9 ,Port Input Data Channel 2 Pin 9" "Low,High"
|
|
bitfld.quad 0x10 8. " PID8 ,Port Input Data Channel 2 Pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x10 7. " PID7 ,Port Input Data Channel 2 Pin 7" "Low,High"
|
|
bitfld.quad 0x10 6. " PID6 ,Port Input Data Channel 2 Pin 6" "Low,High"
|
|
bitfld.quad 0x10 5. " PID5 ,Port Input Data Channel 2 Pin 5" "Low,High"
|
|
bitfld.quad 0x10 4. " PID4 ,Port Input Data Channel 2 Pin 4" "Low,High"
|
|
bitfld.quad 0x10 3. " PID3 ,Port Input Data Channel 2 Pin 3" "Low,High"
|
|
bitfld.quad 0x10 2. " PID2 ,Port Input Data Channel 2 Pin 2" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x10 1. " PID1 ,Port Input Data Channel 2 Pin 1" "Low,High"
|
|
bitfld.quad 0x10 0. " PID0 ,Port Input Data Channel 2 Pin 0" "Low,High"
|
|
endif
|
|
endif
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126")
|
|
line.quad 0x18 "GPIO_PIDR3,Port Input Data Register for Channel 3"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
bitfld.quad 0x18 63. " PID63 ,Port Input Data Channel 3 Pin 63" "Low,High"
|
|
bitfld.quad 0x18 62. " PID62 ,Port Input Data Channel 3 Pin 62" "Low,High"
|
|
bitfld.quad 0x18 61. " PID61 ,Port Input Data Channel 3 Pin 61" "Low,High"
|
|
bitfld.quad 0x18 60. " PID60 ,Port Input Data Channel 3 Pin 60" "Low,High"
|
|
bitfld.quad 0x18 59. " PID59 ,Port Input Data Channel 3 Pin 59" "Low,High"
|
|
bitfld.quad 0x18 58. " PID58 ,Port Input Data Channel 3 Pin 58" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x18 57. " PID57 ,Port Input Data Channel 3 Pin 57" "Low,High"
|
|
bitfld.quad 0x18 56. " PID56 ,Port Input Data Channel 3 Pin 56" "Low,High"
|
|
bitfld.quad 0x18 55. " PID55 ,Port Input Data Channel 3 Pin 55" "Low,High"
|
|
bitfld.quad 0x18 54. " PID54 ,Port Input Data Channel 3 Pin 54" "Low,High"
|
|
bitfld.quad 0x18 53. " PID53 ,Port Input Data Channel 3 Pin 53" "Low,High"
|
|
bitfld.quad 0x18 52. " PID52 ,Port Input Data Channel 3 Pin 52" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x18 51. " PID51 ,Port Input Data Channel 3 Pin 51" "Low,High"
|
|
bitfld.quad 0x18 50. " PID50 ,Port Input Data Channel 3 Pin 50" "Low,High"
|
|
bitfld.quad 0x18 49. " PID49 ,Port Input Data Channel 3 Pin 49" "Low,High"
|
|
bitfld.quad 0x18 48. " PID48 ,Port Input Data Channel 3 Pin 48" "Low,High"
|
|
bitfld.quad 0x18 47. " PID47 ,Port Input Data Channel 3 Pin 47" "Low,High"
|
|
bitfld.quad 0x18 46. " PID46 ,Port Input Data Channel 3 Pin 46" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x18 45. " PID45 ,Port Input Data Channel 3 Pin 45" "Low,High"
|
|
bitfld.quad 0x18 44. " PID44 ,Port Input Data Channel 3 Pin 44" "Low,High"
|
|
bitfld.quad 0x18 43. " PID43 ,Port Input Data Channel 3 Pin 43" "Low,High"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x18 42. " PID42 ,Port Input Data Channel 3 Pin 42" "Low,High"
|
|
bitfld.quad 0x18 41. " PID41 ,Port Input Data Channel 3 Pin 41" "Low,High"
|
|
bitfld.quad 0x18 40. " PID40 ,Port Input Data Channel 3 Pin 40" "Low,High"
|
|
bitfld.quad 0x18 39. " PID39 ,Port Input Data Channel 3 Pin 39" "Low,High"
|
|
bitfld.quad 0x18 38. " PID38 ,Port Input Data Channel 3 Pin 38" "Low,High"
|
|
bitfld.quad 0x18 37. " PID37 ,Port Input Data Channel 3 Pin 37" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x18 36. " PID36 ,Port Input Data Channel 3 Pin 36" "Low,High"
|
|
bitfld.quad 0x18 35. " PID35 ,Port Input Data Channel 3 Pin 35" "Low,High"
|
|
bitfld.quad 0x18 34. " PID34 ,Port Input Data Channel 3 Pin 34" "Low,High"
|
|
bitfld.quad 0x18 33. " PID33 ,Port Input Data Channel 3 Pin 33" "Low,High"
|
|
bitfld.quad 0x18 32. " PID32 ,Port Input Data Channel 3 Pin 32" "Low,High"
|
|
bitfld.quad 0x18 31. " PID31 ,Port Input Data Channel 3 Pin 31" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x18 30. " PID30 ,Port Input Data Channel 3 Pin 30" "Low,High"
|
|
bitfld.quad 0x18 29. " PID29 ,Port Input Data Channel 3 Pin 29" "Low,High"
|
|
bitfld.quad 0x18 28. " PID28 ,Port Input Data Channel 3 Pin 28" "Low,High"
|
|
bitfld.quad 0x18 27. " PID27 ,Port Input Data Channel 3 Pin 27" "Low,High"
|
|
bitfld.quad 0x18 26. " PID26 ,Port Input Data Channel 3 Pin 26" "Low,High"
|
|
bitfld.quad 0x18 25. " PID25 ,Port Input Data Channel 3 Pin 25" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x18 24. " PID24 ,Port Input Data Channel 3 Pin 24" "Low,High"
|
|
bitfld.quad 0x18 23. " PID23 ,Port Input Data Channel 3 Pin 23" "Low,High"
|
|
bitfld.quad 0x18 22. " PID22 ,Port Input Data Channel 3 Pin 22" "Low,High"
|
|
bitfld.quad 0x18 21. " PID21 ,Port Input Data Channel 3 Pin 21" "Low,High"
|
|
bitfld.quad 0x18 20. " PID20 ,Port Input Data Channel 3 Pin 20" "Low,High"
|
|
bitfld.quad 0x18 19. " PID19 ,Port Input Data Channel 3 Pin 19" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x18 18. " PID18 ,Port Input Data Channel 3 Pin 18" "Low,High"
|
|
bitfld.quad 0x18 17. " PID17 ,Port Input Data Channel 3 Pin 17" "Low,High"
|
|
bitfld.quad 0x18 16. " PID16 ,Port Input Data Channel 3 Pin 16" "Low,High"
|
|
bitfld.quad 0x18 15. " PID15 ,Port Input Data Channel 3 Pin 15" "Low,High"
|
|
bitfld.quad 0x18 14. " PID14 ,Port Input Data Channel 3 Pin 14" "Low,High"
|
|
bitfld.quad 0x18 13. " PID13 ,Port Input Data Channel 3 Pin 13" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x18 12. " PID12 ,Port Input Data Channel 3 Pin 12" "Low,High"
|
|
bitfld.quad 0x18 11. " PID11 ,Port Input Data Channel 3 Pin 11" "Low,High"
|
|
bitfld.quad 0x18 10. " PID10 ,Port Input Data Channel 3 Pin 10" "Low,High"
|
|
bitfld.quad 0x18 9. " PID9 ,Port Input Data Channel 3 Pin 9" "Low,High"
|
|
bitfld.quad 0x18 8. " PID8 ,Port Input Data Channel 3 Pin 8" "Low,High"
|
|
bitfld.quad 0x18 7. " PID7 ,Port Input Data Channel 3 Pin 7" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x18 6. " PID6 ,Port Input Data Channel 3 Pin 6" "Low,High"
|
|
bitfld.quad 0x18 5. " PID5 ,Port Input Data Channel 3 Pin 5" "Low,High"
|
|
bitfld.quad 0x18 4. " PID4 ,Port Input Data Channel 3 Pin 4" "Low,High"
|
|
bitfld.quad 0x18 3. " PID3 ,Port Input Data Channel 3 Pin 3" "Low,High"
|
|
bitfld.quad 0x18 2. " PID2 ,Port Input Data Channel 3 Pin 2" "Low,High"
|
|
bitfld.quad 0x18 1. " PID1 ,Port Input Data Channel 3 Pin 1" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x18 0. " PID0 ,Port Input Data Channel 3 Pin 0" "Low,High"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
line.quad 0x20 "GPIO_PIDR4,Port Input Data Register for Channel 4"
|
|
bitfld.quad 0x20 63. " PID63 ,Port Input Data Channel 4 Pin 63" "Low,High"
|
|
bitfld.quad 0x20 62. " PID62 ,Port Input Data Channel 4 Pin 62" "Low,High"
|
|
bitfld.quad 0x20 61. " PID61 ,Port Input Data Channel 4 Pin 61" "Low,High"
|
|
bitfld.quad 0x20 60. " PID60 ,Port Input Data Channel 4 Pin 60" "Low,High"
|
|
bitfld.quad 0x20 59. " PID59 ,Port Input Data Channel 4 Pin 59" "Low,High"
|
|
bitfld.quad 0x20 58. " PID58 ,Port Input Data Channel 4 Pin 58" "Low,High"
|
|
bitfld.quad 0x20 57. " PID57 ,Port Input Data Channel 4 Pin 57" "Low,High"
|
|
bitfld.quad 0x20 56. " PID56 ,Port Input Data Channel 4 Pin 56" "Low,High"
|
|
bitfld.quad 0x20 55. " PID55 ,Port Input Data Channel 4 Pin 55" "Low,High"
|
|
bitfld.quad 0x20 54. " PID54 ,Port Input Data Channel 4 Pin 54" "Low,High"
|
|
bitfld.quad 0x20 53. " PID53 ,Port Input Data Channel 4 Pin 53" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x20 52. " PID52 ,Port Input Data Channel 4 Pin 52" "Low,High"
|
|
bitfld.quad 0x20 51. " PID51 ,Port Input Data Channel 4 Pin 51" "Low,High"
|
|
bitfld.quad 0x20 50. " PID50 ,Port Input Data Channel 4 Pin 50" "Low,High"
|
|
bitfld.quad 0x20 49. " PID49 ,Port Input Data Channel 4 Pin 49" "Low,High"
|
|
bitfld.quad 0x20 48. " PID48 ,Port Input Data Channel 4 Pin 48" "Low,High"
|
|
bitfld.quad 0x20 47. " PID47 ,Port Input Data Channel 4 Pin 47" "Low,High"
|
|
bitfld.quad 0x20 46. " PID46 ,Port Input Data Channel 4 Pin 46" "Low,High"
|
|
bitfld.quad 0x20 45. " PID45 ,Port Input Data Channel 4 Pin 45" "Low,High"
|
|
bitfld.quad 0x20 44. " PID44 ,Port Input Data Channel 4 Pin 44" "Low,High"
|
|
bitfld.quad 0x20 43. " PID43 ,Port Input Data Channel 4 Pin 43" "Low,High"
|
|
bitfld.quad 0x20 42. " PID42 ,Port Input Data Channel 4 Pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x20 41. " PID41 ,Port Input Data Channel 4 Pin 41" "Low,High"
|
|
bitfld.quad 0x20 40. " PID40 ,Port Input Data Channel 4 Pin 40" "Low,High"
|
|
bitfld.quad 0x20 39. " PID39 ,Port Input Data Channel 4 Pin 39" "Low,High"
|
|
bitfld.quad 0x20 38. " PID38 ,Port Input Data Channel 4 Pin 38" "Low,High"
|
|
bitfld.quad 0x20 37. " PID37 ,Port Input Data Channel 4 Pin 37" "Low,High"
|
|
bitfld.quad 0x20 36. " PID36 ,Port Input Data Channel 4 Pin 36" "Low,High"
|
|
bitfld.quad 0x20 35. " PID35 ,Port Input Data Channel 4 Pin 35" "Low,High"
|
|
bitfld.quad 0x20 34. " PID34 ,Port Input Data Channel 4 Pin 34" "Low,High"
|
|
bitfld.quad 0x20 33. " PID33 ,Port Input Data Channel 4 Pin 33" "Low,High"
|
|
bitfld.quad 0x20 32. " PID32 ,Port Input Data Channel 4 Pin 32" "Low,High"
|
|
bitfld.quad 0x20 31. " PID31 ,Port Input Data Channel 4 Pin 31" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x20 30. " PID30 ,Port Input Data Channel 4 Pin 30" "Low,High"
|
|
bitfld.quad 0x20 29. " PID29 ,Port Input Data Channel 4 Pin 29" "Low,High"
|
|
bitfld.quad 0x20 28. " PID28 ,Port Input Data Channel 4 Pin 28" "Low,High"
|
|
bitfld.quad 0x20 27. " PID27 ,Port Input Data Channel 4 Pin 27" "Low,High"
|
|
bitfld.quad 0x20 26. " PID26 ,Port Input Data Channel 4 Pin 26" "Low,High"
|
|
bitfld.quad 0x20 25. " PID25 ,Port Input Data Channel 4 Pin 25" "Low,High"
|
|
bitfld.quad 0x20 24. " PID24 ,Port Input Data Channel 4 Pin 24" "Low,High"
|
|
bitfld.quad 0x20 23. " PID23 ,Port Input Data Channel 4 Pin 23" "Low,High"
|
|
bitfld.quad 0x20 22. " PID22 ,Port Input Data Channel 4 Pin 22" "Low,High"
|
|
bitfld.quad 0x20 21. " PID21 ,Port Input Data Channel 4 Pin 21" "Low,High"
|
|
bitfld.quad 0x20 20. " PID20 ,Port Input Data Channel 4 Pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x20 19. " PID19 ,Port Input Data Channel 4 Pin 19" "Low,High"
|
|
bitfld.quad 0x20 18. " PID18 ,Port Input Data Channel 4 Pin 18" "Low,High"
|
|
bitfld.quad 0x20 17. " PID17 ,Port Input Data Channel 4 Pin 17" "Low,High"
|
|
bitfld.quad 0x20 16. " PID16 ,Port Input Data Channel 4 Pin 16" "Low,High"
|
|
bitfld.quad 0x20 15. " PID15 ,Port Input Data Channel 4 Pin 15" "Low,High"
|
|
bitfld.quad 0x20 14. " PID14 ,Port Input Data Channel 4 Pin 14" "Low,High"
|
|
bitfld.quad 0x20 13. " PID13 ,Port Input Data Channel 4 Pin 13" "Low,High"
|
|
bitfld.quad 0x20 12. " PID12 ,Port Input Data Channel 4 Pin 12" "Low,High"
|
|
bitfld.quad 0x20 11. " PID11 ,Port Input Data Channel 4 Pin 11" "Low,High"
|
|
bitfld.quad 0x20 10. " PID10 ,Port Input Data Channel 4 Pin 10" "Low,High"
|
|
bitfld.quad 0x20 9. " PID9 ,Port Input Data Channel 4 Pin 9" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x20 8. " PID8 ,Port Input Data Channel 4 Pin 8" "Low,High"
|
|
bitfld.quad 0x20 7. " PID7 ,Port Input Data Channel 4 Pin 7" "Low,High"
|
|
bitfld.quad 0x20 6. " PID6 ,Port Input Data Channel 4 Pin 6" "Low,High"
|
|
bitfld.quad 0x20 5. " PID5 ,Port Input Data Channel 4 Pin 5" "Low,High"
|
|
bitfld.quad 0x20 4. " PID4 ,Port Input Data Channel 4 Pin 4" "Low,High"
|
|
bitfld.quad 0x20 3. " PID3 ,Port Input Data Channel 4 Pin 3" "Low,High"
|
|
bitfld.quad 0x20 2. " PID2 ,Port Input Data Channel 4 Pin 2" "Low,High"
|
|
bitfld.quad 0x20 1. " PID1 ,Port Input Data Channel 4 Pin 1" "Low,High"
|
|
bitfld.quad 0x20 0. " PID0 ,Port Input Data Channel 4 Pin 0" "Low,High"
|
|
line.quad 0x28 "GPIO_PIDR5,Port Input Data Register for Channel 5"
|
|
bitfld.quad 0x28 63. " PID63 ,Port Input Data Channel 5 Pin 63" "Low,High"
|
|
bitfld.quad 0x28 62. " PID62 ,Port Input Data Channel 5 Pin 62" "Low,High"
|
|
bitfld.quad 0x28 61. " PID61 ,Port Input Data Channel 5 Pin 61" "Low,High"
|
|
bitfld.quad 0x28 60. " PID60 ,Port Input Data Channel 5 Pin 60" "Low,High"
|
|
bitfld.quad 0x28 59. " PID59 ,Port Input Data Channel 5 Pin 59" "Low,High"
|
|
bitfld.quad 0x28 58. " PID58 ,Port Input Data Channel 5 Pin 58" "Low,High"
|
|
bitfld.quad 0x28 57. " PID57 ,Port Input Data Channel 5 Pin 57" "Low,High"
|
|
bitfld.quad 0x28 56. " PID56 ,Port Input Data Channel 5 Pin 56" "Low,High"
|
|
bitfld.quad 0x28 55. " PID55 ,Port Input Data Channel 5 Pin 55" "Low,High"
|
|
bitfld.quad 0x28 54. " PID54 ,Port Input Data Channel 5 Pin 54" "Low,High"
|
|
bitfld.quad 0x28 53. " PID53 ,Port Input Data Channel 5 Pin 53" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x28 52. " PID52 ,Port Input Data Channel 5 Pin 52" "Low,High"
|
|
bitfld.quad 0x28 51. " PID51 ,Port Input Data Channel 5 Pin 51" "Low,High"
|
|
bitfld.quad 0x28 50. " PID50 ,Port Input Data Channel 5 Pin 50" "Low,High"
|
|
bitfld.quad 0x28 49. " PID49 ,Port Input Data Channel 5 Pin 49" "Low,High"
|
|
bitfld.quad 0x28 48. " PID48 ,Port Input Data Channel 5 Pin 48" "Low,High"
|
|
bitfld.quad 0x28 47. " PID47 ,Port Input Data Channel 5 Pin 47" "Low,High"
|
|
bitfld.quad 0x28 46. " PID46 ,Port Input Data Channel 5 Pin 46" "Low,High"
|
|
bitfld.quad 0x28 45. " PID45 ,Port Input Data Channel 5 Pin 45" "Low,High"
|
|
bitfld.quad 0x28 44. " PID44 ,Port Input Data Channel 5 Pin 44" "Low,High"
|
|
bitfld.quad 0x28 43. " PID43 ,Port Input Data Channel 5 Pin 43" "Low,High"
|
|
bitfld.quad 0x28 42. " PID42 ,Port Input Data Channel 5 Pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x28 41. " PID41 ,Port Input Data Channel 5 Pin 41" "Low,High"
|
|
bitfld.quad 0x28 40. " PID40 ,Port Input Data Channel 5 Pin 40" "Low,High"
|
|
bitfld.quad 0x28 39. " PID39 ,Port Input Data Channel 5 Pin 39" "Low,High"
|
|
bitfld.quad 0x28 38. " PID38 ,Port Input Data Channel 5 Pin 38" "Low,High"
|
|
bitfld.quad 0x28 37. " PID37 ,Port Input Data Channel 5 Pin 37" "Low,High"
|
|
bitfld.quad 0x28 36. " PID36 ,Port Input Data Channel 5 Pin 36" "Low,High"
|
|
bitfld.quad 0x28 35. " PID35 ,Port Input Data Channel 5 Pin 35" "Low,High"
|
|
bitfld.quad 0x28 34. " PID34 ,Port Input Data Channel 5 Pin 34" "Low,High"
|
|
bitfld.quad 0x28 33. " PID33 ,Port Input Data Channel 5 Pin 33" "Low,High"
|
|
bitfld.quad 0x28 32. " PID32 ,Port Input Data Channel 5 Pin 32" "Low,High"
|
|
bitfld.quad 0x28 31. " PID31 ,Port Input Data Channel 5 Pin 31" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x28 30. " PID30 ,Port Input Data Channel 5 Pin 30" "Low,High"
|
|
bitfld.quad 0x28 29. " PID29 ,Port Input Data Channel 5 Pin 29" "Low,High"
|
|
bitfld.quad 0x28 28. " PID28 ,Port Input Data Channel 5 Pin 28" "Low,High"
|
|
bitfld.quad 0x28 27. " PID27 ,Port Input Data Channel 5 Pin 27" "Low,High"
|
|
bitfld.quad 0x28 26. " PID26 ,Port Input Data Channel 5 Pin 26" "Low,High"
|
|
bitfld.quad 0x28 25. " PID25 ,Port Input Data Channel 5 Pin 25" "Low,High"
|
|
bitfld.quad 0x28 24. " PID24 ,Port Input Data Channel 5 Pin 24" "Low,High"
|
|
bitfld.quad 0x28 23. " PID23 ,Port Input Data Channel 5 Pin 23" "Low,High"
|
|
bitfld.quad 0x28 22. " PID22 ,Port Input Data Channel 5 Pin 22" "Low,High"
|
|
bitfld.quad 0x28 21. " PID21 ,Port Input Data Channel 5 Pin 21" "Low,High"
|
|
bitfld.quad 0x28 20. " PID20 ,Port Input Data Channel 5 Pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x28 19. " PID19 ,Port Input Data Channel 5 Pin 19" "Low,High"
|
|
bitfld.quad 0x28 18. " PID18 ,Port Input Data Channel 5 Pin 18" "Low,High"
|
|
bitfld.quad 0x28 17. " PID17 ,Port Input Data Channel 5 Pin 17" "Low,High"
|
|
bitfld.quad 0x28 16. " PID16 ,Port Input Data Channel 5 Pin 16" "Low,High"
|
|
bitfld.quad 0x28 15. " PID15 ,Port Input Data Channel 5 Pin 15" "Low,High"
|
|
bitfld.quad 0x28 14. " PID14 ,Port Input Data Channel 5 Pin 14" "Low,High"
|
|
bitfld.quad 0x28 13. " PID13 ,Port Input Data Channel 5 Pin 13" "Low,High"
|
|
bitfld.quad 0x28 12. " PID12 ,Port Input Data Channel 5 Pin 12" "Low,High"
|
|
bitfld.quad 0x28 11. " PID11 ,Port Input Data Channel 5 Pin 11" "Low,High"
|
|
bitfld.quad 0x28 10. " PID10 ,Port Input Data Channel 5 Pin 10" "Low,High"
|
|
bitfld.quad 0x28 9. " PID9 ,Port Input Data Channel 5 Pin 9" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x28 8. " PID8 ,Port Input Data Channel 5 Pin 8" "Low,High"
|
|
bitfld.quad 0x28 7. " PID7 ,Port Input Data Channel 5 Pin 7" "Low,High"
|
|
bitfld.quad 0x28 6. " PID6 ,Port Input Data Channel 5 Pin 6" "Low,High"
|
|
bitfld.quad 0x28 5. " PID5 ,Port Input Data Channel 5 Pin 5" "Low,High"
|
|
bitfld.quad 0x28 4. " PID4 ,Port Input Data Channel 5 Pin 4" "Low,High"
|
|
bitfld.quad 0x28 3. " PID3 ,Port Input Data Channel 5 Pin 3" "Low,High"
|
|
bitfld.quad 0x28 2. " PID2 ,Port Input Data Channel 5 Pin 2" "Low,High"
|
|
bitfld.quad 0x28 1. " PID1 ,Port Input Data Channel 5 Pin 1" "Low,High"
|
|
bitfld.quad 0x28 0. " PID0 ,Port Input Data Channel 5 Pin 0" "Low,High"
|
|
line.quad 0x30 "GPIO_PIDR6,Port Input Data Register for Channel 6"
|
|
bitfld.quad 0x30 63. " PID63 ,Port Input Data Channel 6 Pin 63" "Low,High"
|
|
bitfld.quad 0x30 62. " PID62 ,Port Input Data Channel 6 Pin 62" "Low,High"
|
|
bitfld.quad 0x30 61. " PID61 ,Port Input Data Channel 6 Pin 61" "Low,High"
|
|
bitfld.quad 0x30 60. " PID60 ,Port Input Data Channel 6 Pin 60" "Low,High"
|
|
bitfld.quad 0x30 59. " PID59 ,Port Input Data Channel 6 Pin 59" "Low,High"
|
|
bitfld.quad 0x30 58. " PID58 ,Port Input Data Channel 6 Pin 58" "Low,High"
|
|
bitfld.quad 0x30 57. " PID57 ,Port Input Data Channel 6 Pin 57" "Low,High"
|
|
bitfld.quad 0x30 56. " PID56 ,Port Input Data Channel 6 Pin 56" "Low,High"
|
|
bitfld.quad 0x30 55. " PID55 ,Port Input Data Channel 6 Pin 55" "Low,High"
|
|
bitfld.quad 0x30 54. " PID54 ,Port Input Data Channel 6 Pin 54" "Low,High"
|
|
bitfld.quad 0x30 53. " PID53 ,Port Input Data Channel 6 Pin 53" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x30 52. " PID52 ,Port Input Data Channel 6 Pin 52" "Low,High"
|
|
bitfld.quad 0x30 51. " PID51 ,Port Input Data Channel 6 Pin 51" "Low,High"
|
|
bitfld.quad 0x30 50. " PID50 ,Port Input Data Channel 6 Pin 50" "Low,High"
|
|
bitfld.quad 0x30 49. " PID49 ,Port Input Data Channel 6 Pin 49" "Low,High"
|
|
bitfld.quad 0x30 48. " PID48 ,Port Input Data Channel 6 Pin 48" "Low,High"
|
|
bitfld.quad 0x30 47. " PID47 ,Port Input Data Channel 6 Pin 47" "Low,High"
|
|
bitfld.quad 0x30 46. " PID46 ,Port Input Data Channel 6 Pin 46" "Low,High"
|
|
bitfld.quad 0x30 45. " PID45 ,Port Input Data Channel 6 Pin 45" "Low,High"
|
|
bitfld.quad 0x30 44. " PID44 ,Port Input Data Channel 6 Pin 44" "Low,High"
|
|
bitfld.quad 0x30 43. " PID43 ,Port Input Data Channel 6 Pin 43" "Low,High"
|
|
bitfld.quad 0x30 42. " PID42 ,Port Input Data Channel 6 Pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x30 41. " PID41 ,Port Input Data Channel 6 Pin 41" "Low,High"
|
|
bitfld.quad 0x30 40. " PID40 ,Port Input Data Channel 6 Pin 40" "Low,High"
|
|
bitfld.quad 0x30 39. " PID39 ,Port Input Data Channel 6 Pin 39" "Low,High"
|
|
bitfld.quad 0x30 38. " PID38 ,Port Input Data Channel 6 Pin 38" "Low,High"
|
|
bitfld.quad 0x30 37. " PID37 ,Port Input Data Channel 6 Pin 37" "Low,High"
|
|
bitfld.quad 0x30 36. " PID36 ,Port Input Data Channel 6 Pin 36" "Low,High"
|
|
bitfld.quad 0x30 35. " PID35 ,Port Input Data Channel 6 Pin 35" "Low,High"
|
|
bitfld.quad 0x30 34. " PID34 ,Port Input Data Channel 6 Pin 34" "Low,High"
|
|
bitfld.quad 0x30 33. " PID33 ,Port Input Data Channel 6 Pin 33" "Low,High"
|
|
bitfld.quad 0x30 32. " PID32 ,Port Input Data Channel 6 Pin 32" "Low,High"
|
|
bitfld.quad 0x30 31. " PID31 ,Port Input Data Channel 6 Pin 31" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x30 30. " PID30 ,Port Input Data Channel 6 Pin 30" "Low,High"
|
|
bitfld.quad 0x30 29. " PID29 ,Port Input Data Channel 6 Pin 29" "Low,High"
|
|
bitfld.quad 0x30 28. " PID28 ,Port Input Data Channel 6 Pin 28" "Low,High"
|
|
bitfld.quad 0x30 27. " PID27 ,Port Input Data Channel 6 Pin 27" "Low,High"
|
|
bitfld.quad 0x30 26. " PID26 ,Port Input Data Channel 6 Pin 26" "Low,High"
|
|
bitfld.quad 0x30 25. " PID25 ,Port Input Data Channel 6 Pin 25" "Low,High"
|
|
bitfld.quad 0x30 24. " PID24 ,Port Input Data Channel 6 Pin 24" "Low,High"
|
|
bitfld.quad 0x30 23. " PID23 ,Port Input Data Channel 6 Pin 23" "Low,High"
|
|
bitfld.quad 0x30 22. " PID22 ,Port Input Data Channel 6 Pin 22" "Low,High"
|
|
bitfld.quad 0x30 21. " PID21 ,Port Input Data Channel 6 Pin 21" "Low,High"
|
|
bitfld.quad 0x30 20. " PID20 ,Port Input Data Channel 6 Pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x30 19. " PID19 ,Port Input Data Channel 6 Pin 19" "Low,High"
|
|
bitfld.quad 0x30 18. " PID18 ,Port Input Data Channel 6 Pin 18" "Low,High"
|
|
bitfld.quad 0x30 17. " PID17 ,Port Input Data Channel 6 Pin 17" "Low,High"
|
|
bitfld.quad 0x30 16. " PID16 ,Port Input Data Channel 6 Pin 16" "Low,High"
|
|
bitfld.quad 0x30 15. " PID15 ,Port Input Data Channel 6 Pin 15" "Low,High"
|
|
bitfld.quad 0x30 14. " PID14 ,Port Input Data Channel 6 Pin 14" "Low,High"
|
|
bitfld.quad 0x30 13. " PID13 ,Port Input Data Channel 6 Pin 13" "Low,High"
|
|
bitfld.quad 0x30 12. " PID12 ,Port Input Data Channel 6 Pin 12" "Low,High"
|
|
bitfld.quad 0x30 11. " PID11 ,Port Input Data Channel 6 Pin 11" "Low,High"
|
|
bitfld.quad 0x30 10. " PID10 ,Port Input Data Channel 6 Pin 10" "Low,High"
|
|
bitfld.quad 0x30 9. " PID9 ,Port Input Data Channel 6 Pin 9" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x30 8. " PID8 ,Port Input Data Channel 6 Pin 8" "Low,High"
|
|
bitfld.quad 0x30 7. " PID7 ,Port Input Data Channel 6 Pin 7" "Low,High"
|
|
bitfld.quad 0x30 6. " PID6 ,Port Input Data Channel 6 Pin 6" "Low,High"
|
|
bitfld.quad 0x30 5. " PID5 ,Port Input Data Channel 6 Pin 5" "Low,High"
|
|
bitfld.quad 0x30 4. " PID4 ,Port Input Data Channel 6 Pin 4" "Low,High"
|
|
bitfld.quad 0x30 3. " PID3 ,Port Input Data Channel 6 Pin 3" "Low,High"
|
|
bitfld.quad 0x30 2. " PID2 ,Port Input Data Channel 6 Pin 2" "Low,High"
|
|
bitfld.quad 0x30 1. " PID1 ,Port Input Data Channel 6 Pin 1" "Low,High"
|
|
bitfld.quad 0x30 0. " PID0 ,Port Input Data Channel 6 Pin 0" "Low,High"
|
|
line.quad 0x38 "GPIO_PIDR7,Port Input Data Register for Channel 7"
|
|
bitfld.quad 0x38 63. " PID63 ,Port Input Data Channel 7 Pin 63" "Low,High"
|
|
bitfld.quad 0x38 62. " PID62 ,Port Input Data Channel 7 Pin 62" "Low,High"
|
|
bitfld.quad 0x38 61. " PID61 ,Port Input Data Channel 7 Pin 61" "Low,High"
|
|
bitfld.quad 0x38 60. " PID60 ,Port Input Data Channel 7 Pin 60" "Low,High"
|
|
bitfld.quad 0x38 59. " PID59 ,Port Input Data Channel 7 Pin 59" "Low,High"
|
|
bitfld.quad 0x38 58. " PID58 ,Port Input Data Channel 7 Pin 58" "Low,High"
|
|
bitfld.quad 0x38 57. " PID57 ,Port Input Data Channel 7 Pin 57" "Low,High"
|
|
bitfld.quad 0x38 56. " PID56 ,Port Input Data Channel 7 Pin 56" "Low,High"
|
|
bitfld.quad 0x38 55. " PID55 ,Port Input Data Channel 7 Pin 55" "Low,High"
|
|
bitfld.quad 0x38 54. " PID54 ,Port Input Data Channel 7 Pin 54" "Low,High"
|
|
bitfld.quad 0x38 53. " PID53 ,Port Input Data Channel 7 Pin 53" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x38 52. " PID52 ,Port Input Data Channel 7 Pin 52" "Low,High"
|
|
bitfld.quad 0x38 51. " PID51 ,Port Input Data Channel 7 Pin 51" "Low,High"
|
|
bitfld.quad 0x38 50. " PID50 ,Port Input Data Channel 7 Pin 50" "Low,High"
|
|
bitfld.quad 0x38 49. " PID49 ,Port Input Data Channel 7 Pin 49" "Low,High"
|
|
bitfld.quad 0x38 48. " PID48 ,Port Input Data Channel 7 Pin 48" "Low,High"
|
|
bitfld.quad 0x38 47. " PID47 ,Port Input Data Channel 7 Pin 47" "Low,High"
|
|
bitfld.quad 0x38 46. " PID46 ,Port Input Data Channel 7 Pin 46" "Low,High"
|
|
bitfld.quad 0x38 45. " PID45 ,Port Input Data Channel 7 Pin 45" "Low,High"
|
|
bitfld.quad 0x38 44. " PID44 ,Port Input Data Channel 7 Pin 44" "Low,High"
|
|
bitfld.quad 0x38 43. " PID43 ,Port Input Data Channel 7 Pin 43" "Low,High"
|
|
bitfld.quad 0x38 42. " PID42 ,Port Input Data Channel 7 Pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x38 41. " PID41 ,Port Input Data Channel 7 Pin 41" "Low,High"
|
|
bitfld.quad 0x38 40. " PID40 ,Port Input Data Channel 7 Pin 40" "Low,High"
|
|
bitfld.quad 0x38 39. " PID39 ,Port Input Data Channel 7 Pin 39" "Low,High"
|
|
bitfld.quad 0x38 38. " PID38 ,Port Input Data Channel 7 Pin 38" "Low,High"
|
|
bitfld.quad 0x38 37. " PID37 ,Port Input Data Channel 7 Pin 37" "Low,High"
|
|
bitfld.quad 0x38 36. " PID36 ,Port Input Data Channel 7 Pin 36" "Low,High"
|
|
bitfld.quad 0x38 35. " PID35 ,Port Input Data Channel 7 Pin 35" "Low,High"
|
|
bitfld.quad 0x38 34. " PID34 ,Port Input Data Channel 7 Pin 34" "Low,High"
|
|
bitfld.quad 0x38 33. " PID33 ,Port Input Data Channel 7 Pin 33" "Low,High"
|
|
bitfld.quad 0x38 32. " PID32 ,Port Input Data Channel 7 Pin 32" "Low,High"
|
|
bitfld.quad 0x38 31. " PID31 ,Port Input Data Channel 7 Pin 31" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x38 30. " PID30 ,Port Input Data Channel 7 Pin 30" "Low,High"
|
|
bitfld.quad 0x38 29. " PID29 ,Port Input Data Channel 7 Pin 29" "Low,High"
|
|
bitfld.quad 0x38 28. " PID28 ,Port Input Data Channel 7 Pin 28" "Low,High"
|
|
bitfld.quad 0x38 27. " PID27 ,Port Input Data Channel 7 Pin 27" "Low,High"
|
|
bitfld.quad 0x38 26. " PID26 ,Port Input Data Channel 7 Pin 26" "Low,High"
|
|
bitfld.quad 0x38 25. " PID25 ,Port Input Data Channel 7 Pin 25" "Low,High"
|
|
bitfld.quad 0x38 24. " PID24 ,Port Input Data Channel 7 Pin 24" "Low,High"
|
|
bitfld.quad 0x38 23. " PID23 ,Port Input Data Channel 7 Pin 23" "Low,High"
|
|
bitfld.quad 0x38 22. " PID22 ,Port Input Data Channel 7 Pin 22" "Low,High"
|
|
bitfld.quad 0x38 21. " PID21 ,Port Input Data Channel 7 Pin 21" "Low,High"
|
|
bitfld.quad 0x38 20. " PID20 ,Port Input Data Channel 7 Pin 20" "Low,High"
|
|
textline " "
|
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bitfld.quad 0x38 19. " PID19 ,Port Input Data Channel 7 Pin 19" "Low,High"
|
|
bitfld.quad 0x38 18. " PID18 ,Port Input Data Channel 7 Pin 18" "Low,High"
|
|
bitfld.quad 0x38 17. " PID17 ,Port Input Data Channel 7 Pin 17" "Low,High"
|
|
bitfld.quad 0x38 16. " PID16 ,Port Input Data Channel 7 Pin 16" "Low,High"
|
|
bitfld.quad 0x38 15. " PID15 ,Port Input Data Channel 7 Pin 15" "Low,High"
|
|
bitfld.quad 0x38 14. " PID14 ,Port Input Data Channel 7 Pin 14" "Low,High"
|
|
bitfld.quad 0x38 13. " PID13 ,Port Input Data Channel 7 Pin 13" "Low,High"
|
|
bitfld.quad 0x38 12. " PID12 ,Port Input Data Channel 7 Pin 12" "Low,High"
|
|
bitfld.quad 0x38 11. " PID11 ,Port Input Data Channel 7 Pin 11" "Low,High"
|
|
bitfld.quad 0x38 10. " PID10 ,Port Input Data Channel 7 Pin 10" "Low,High"
|
|
bitfld.quad 0x38 9. " PID9 ,Port Input Data Channel 7 Pin 9" "Low,High"
|
|
textline " "
|
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bitfld.quad 0x38 8. " PID8 ,Port Input Data Channel 7 Pin 8" "Low,High"
|
|
bitfld.quad 0x38 7. " PID7 ,Port Input Data Channel 7 Pin 7" "Low,High"
|
|
bitfld.quad 0x38 6. " PID6 ,Port Input Data Channel 7 Pin 6" "Low,High"
|
|
bitfld.quad 0x38 5. " PID5 ,Port Input Data Channel 7 Pin 5" "Low,High"
|
|
bitfld.quad 0x38 4. " PID4 ,Port Input Data Channel 7 Pin 4" "Low,High"
|
|
bitfld.quad 0x38 3. " PID3 ,Port Input Data Channel 7 Pin 3" "Low,High"
|
|
bitfld.quad 0x38 2. " PID2 ,Port Input Data Channel 7 Pin 2" "Low,High"
|
|
bitfld.quad 0x38 1. " PID1 ,Port Input Data Channel 7 Pin 1" "Low,High"
|
|
bitfld.quad 0x38 0. " PID0 ,Port Input Data Channel 7 Pin 0" "Low,High"
|
|
line.quad 0x40 "GPIO_PIDR8,Port Input Data Register for Channel 8"
|
|
bitfld.quad 0x40 63. " PID63 ,Port Input Data Channel 8 Pin 63" "Low,High"
|
|
bitfld.quad 0x40 62. " PID62 ,Port Input Data Channel 8 Pin 62" "Low,High"
|
|
bitfld.quad 0x40 61. " PID61 ,Port Input Data Channel 8 Pin 61" "Low,High"
|
|
bitfld.quad 0x40 60. " PID60 ,Port Input Data Channel 8 Pin 60" "Low,High"
|
|
bitfld.quad 0x40 59. " PID59 ,Port Input Data Channel 8 Pin 59" "Low,High"
|
|
bitfld.quad 0x40 58. " PID58 ,Port Input Data Channel 8 Pin 58" "Low,High"
|
|
bitfld.quad 0x40 57. " PID57 ,Port Input Data Channel 8 Pin 57" "Low,High"
|
|
bitfld.quad 0x40 56. " PID56 ,Port Input Data Channel 8 Pin 56" "Low,High"
|
|
bitfld.quad 0x40 55. " PID55 ,Port Input Data Channel 8 Pin 55" "Low,High"
|
|
bitfld.quad 0x40 54. " PID54 ,Port Input Data Channel 8 Pin 54" "Low,High"
|
|
bitfld.quad 0x40 53. " PID53 ,Port Input Data Channel 8 Pin 53" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x40 52. " PID52 ,Port Input Data Channel 8 Pin 52" "Low,High"
|
|
bitfld.quad 0x40 51. " PID51 ,Port Input Data Channel 8 Pin 51" "Low,High"
|
|
bitfld.quad 0x40 50. " PID50 ,Port Input Data Channel 8 Pin 50" "Low,High"
|
|
bitfld.quad 0x40 49. " PID49 ,Port Input Data Channel 8 Pin 49" "Low,High"
|
|
bitfld.quad 0x40 48. " PID48 ,Port Input Data Channel 8 Pin 48" "Low,High"
|
|
bitfld.quad 0x40 47. " PID47 ,Port Input Data Channel 8 Pin 47" "Low,High"
|
|
bitfld.quad 0x40 46. " PID46 ,Port Input Data Channel 8 Pin 46" "Low,High"
|
|
bitfld.quad 0x40 45. " PID45 ,Port Input Data Channel 8 Pin 45" "Low,High"
|
|
bitfld.quad 0x40 44. " PID44 ,Port Input Data Channel 8 Pin 44" "Low,High"
|
|
bitfld.quad 0x40 43. " PID43 ,Port Input Data Channel 8 Pin 43" "Low,High"
|
|
bitfld.quad 0x40 42. " PID42 ,Port Input Data Channel 8 Pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x40 41. " PID41 ,Port Input Data Channel 8 Pin 41" "Low,High"
|
|
bitfld.quad 0x40 40. " PID40 ,Port Input Data Channel 8 Pin 40" "Low,High"
|
|
bitfld.quad 0x40 39. " PID39 ,Port Input Data Channel 8 Pin 39" "Low,High"
|
|
bitfld.quad 0x40 38. " PID38 ,Port Input Data Channel 8 Pin 38" "Low,High"
|
|
bitfld.quad 0x40 37. " PID37 ,Port Input Data Channel 8 Pin 37" "Low,High"
|
|
bitfld.quad 0x40 36. " PID36 ,Port Input Data Channel 8 Pin 36" "Low,High"
|
|
bitfld.quad 0x40 35. " PID35 ,Port Input Data Channel 8 Pin 35" "Low,High"
|
|
bitfld.quad 0x40 34. " PID34 ,Port Input Data Channel 8 Pin 34" "Low,High"
|
|
bitfld.quad 0x40 33. " PID33 ,Port Input Data Channel 8 Pin 33" "Low,High"
|
|
bitfld.quad 0x40 32. " PID32 ,Port Input Data Channel 8 Pin 32" "Low,High"
|
|
bitfld.quad 0x40 31. " PID31 ,Port Input Data Channel 8 Pin 31" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x40 30. " PID30 ,Port Input Data Channel 8 Pin 30" "Low,High"
|
|
bitfld.quad 0x40 29. " PID29 ,Port Input Data Channel 8 Pin 29" "Low,High"
|
|
bitfld.quad 0x40 28. " PID28 ,Port Input Data Channel 8 Pin 28" "Low,High"
|
|
bitfld.quad 0x40 27. " PID27 ,Port Input Data Channel 8 Pin 27" "Low,High"
|
|
bitfld.quad 0x40 26. " PID26 ,Port Input Data Channel 8 Pin 26" "Low,High"
|
|
bitfld.quad 0x40 25. " PID25 ,Port Input Data Channel 8 Pin 25" "Low,High"
|
|
bitfld.quad 0x40 24. " PID24 ,Port Input Data Channel 8 Pin 24" "Low,High"
|
|
bitfld.quad 0x40 23. " PID23 ,Port Input Data Channel 8 Pin 23" "Low,High"
|
|
bitfld.quad 0x40 22. " PID22 ,Port Input Data Channel 8 Pin 22" "Low,High"
|
|
bitfld.quad 0x40 21. " PID21 ,Port Input Data Channel 8 Pin 21" "Low,High"
|
|
bitfld.quad 0x40 20. " PID20 ,Port Input Data Channel 8 Pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x40 19. " PID19 ,Port Input Data Channel 8 Pin 19" "Low,High"
|
|
bitfld.quad 0x40 18. " PID18 ,Port Input Data Channel 8 Pin 18" "Low,High"
|
|
bitfld.quad 0x40 17. " PID17 ,Port Input Data Channel 8 Pin 17" "Low,High"
|
|
bitfld.quad 0x40 16. " PID16 ,Port Input Data Channel 8 Pin 16" "Low,High"
|
|
bitfld.quad 0x40 15. " PID15 ,Port Input Data Channel 8 Pin 15" "Low,High"
|
|
bitfld.quad 0x40 14. " PID14 ,Port Input Data Channel 8 Pin 14" "Low,High"
|
|
bitfld.quad 0x40 13. " PID13 ,Port Input Data Channel 8 Pin 13" "Low,High"
|
|
bitfld.quad 0x40 12. " PID12 ,Port Input Data Channel 8 Pin 12" "Low,High"
|
|
bitfld.quad 0x40 11. " PID11 ,Port Input Data Channel 8 Pin 11" "Low,High"
|
|
bitfld.quad 0x40 10. " PID10 ,Port Input Data Channel 8 Pin 10" "Low,High"
|
|
bitfld.quad 0x40 9. " PID9 ,Port Input Data Channel 8 Pin 9" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x40 8. " PID8 ,Port Input Data Channel 8 Pin 8" "Low,High"
|
|
bitfld.quad 0x40 7. " PID7 ,Port Input Data Channel 8 Pin 7" "Low,High"
|
|
bitfld.quad 0x40 6. " PID6 ,Port Input Data Channel 8 Pin 6" "Low,High"
|
|
bitfld.quad 0x40 5. " PID5 ,Port Input Data Channel 8 Pin 5" "Low,High"
|
|
bitfld.quad 0x40 4. " PID4 ,Port Input Data Channel 8 Pin 4" "Low,High"
|
|
bitfld.quad 0x40 3. " PID3 ,Port Input Data Channel 8 Pin 3" "Low,High"
|
|
bitfld.quad 0x40 2. " PID2 ,Port Input Data Channel 8 Pin 2" "Low,High"
|
|
bitfld.quad 0x40 1. " PID1 ,Port Input Data Channel 8 Pin 1" "Low,High"
|
|
bitfld.quad 0x40 0. " PID0 ,Port Input Data Channel 8 Pin 0" "Low,High"
|
|
line.quad 0x48 "GPIO_PIDR9,Port Input Data Register for Channel 9"
|
|
bitfld.quad 0x48 63. " PID63 ,Port Input Data Channel 9 Pin 63" "Low,High"
|
|
bitfld.quad 0x48 62. " PID62 ,Port Input Data Channel 9 Pin 62" "Low,High"
|
|
bitfld.quad 0x48 61. " PID61 ,Port Input Data Channel 9 Pin 61" "Low,High"
|
|
bitfld.quad 0x48 60. " PID60 ,Port Input Data Channel 9 Pin 60" "Low,High"
|
|
bitfld.quad 0x48 59. " PID59 ,Port Input Data Channel 9 Pin 59" "Low,High"
|
|
bitfld.quad 0x48 58. " PID58 ,Port Input Data Channel 9 Pin 58" "Low,High"
|
|
bitfld.quad 0x48 57. " PID57 ,Port Input Data Channel 9 Pin 57" "Low,High"
|
|
bitfld.quad 0x48 56. " PID56 ,Port Input Data Channel 9 Pin 56" "Low,High"
|
|
bitfld.quad 0x48 55. " PID55 ,Port Input Data Channel 9 Pin 55" "Low,High"
|
|
bitfld.quad 0x48 54. " PID54 ,Port Input Data Channel 9 Pin 54" "Low,High"
|
|
bitfld.quad 0x48 53. " PID53 ,Port Input Data Channel 9 Pin 53" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x48 52. " PID52 ,Port Input Data Channel 9 Pin 52" "Low,High"
|
|
bitfld.quad 0x48 51. " PID51 ,Port Input Data Channel 9 Pin 51" "Low,High"
|
|
bitfld.quad 0x48 50. " PID50 ,Port Input Data Channel 9 Pin 50" "Low,High"
|
|
bitfld.quad 0x48 49. " PID49 ,Port Input Data Channel 9 Pin 49" "Low,High"
|
|
bitfld.quad 0x48 48. " PID48 ,Port Input Data Channel 9 Pin 48" "Low,High"
|
|
bitfld.quad 0x48 47. " PID47 ,Port Input Data Channel 9 Pin 47" "Low,High"
|
|
bitfld.quad 0x48 46. " PID46 ,Port Input Data Channel 9 Pin 46" "Low,High"
|
|
bitfld.quad 0x48 45. " PID45 ,Port Input Data Channel 9 Pin 45" "Low,High"
|
|
bitfld.quad 0x48 44. " PID44 ,Port Input Data Channel 9 Pin 44" "Low,High"
|
|
bitfld.quad 0x48 43. " PID43 ,Port Input Data Channel 9 Pin 43" "Low,High"
|
|
bitfld.quad 0x48 42. " PID42 ,Port Input Data Channel 9 Pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x48 41. " PID41 ,Port Input Data Channel 9 Pin 41" "Low,High"
|
|
bitfld.quad 0x48 40. " PID40 ,Port Input Data Channel 9 Pin 40" "Low,High"
|
|
bitfld.quad 0x48 39. " PID39 ,Port Input Data Channel 9 Pin 39" "Low,High"
|
|
bitfld.quad 0x48 38. " PID38 ,Port Input Data Channel 9 Pin 38" "Low,High"
|
|
bitfld.quad 0x48 37. " PID37 ,Port Input Data Channel 9 Pin 37" "Low,High"
|
|
bitfld.quad 0x48 36. " PID36 ,Port Input Data Channel 9 Pin 36" "Low,High"
|
|
bitfld.quad 0x48 35. " PID35 ,Port Input Data Channel 9 Pin 35" "Low,High"
|
|
bitfld.quad 0x48 34. " PID34 ,Port Input Data Channel 9 Pin 34" "Low,High"
|
|
bitfld.quad 0x48 33. " PID33 ,Port Input Data Channel 9 Pin 33" "Low,High"
|
|
bitfld.quad 0x48 32. " PID32 ,Port Input Data Channel 9 Pin 32" "Low,High"
|
|
bitfld.quad 0x48 31. " PID31 ,Port Input Data Channel 9 Pin 31" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x48 30. " PID30 ,Port Input Data Channel 9 Pin 30" "Low,High"
|
|
bitfld.quad 0x48 29. " PID29 ,Port Input Data Channel 9 Pin 29" "Low,High"
|
|
bitfld.quad 0x48 28. " PID28 ,Port Input Data Channel 9 Pin 28" "Low,High"
|
|
bitfld.quad 0x48 27. " PID27 ,Port Input Data Channel 9 Pin 27" "Low,High"
|
|
bitfld.quad 0x48 26. " PID26 ,Port Input Data Channel 9 Pin 26" "Low,High"
|
|
bitfld.quad 0x48 25. " PID25 ,Port Input Data Channel 9 Pin 25" "Low,High"
|
|
bitfld.quad 0x48 24. " PID24 ,Port Input Data Channel 9 Pin 24" "Low,High"
|
|
bitfld.quad 0x48 23. " PID23 ,Port Input Data Channel 9 Pin 23" "Low,High"
|
|
bitfld.quad 0x48 22. " PID22 ,Port Input Data Channel 9 Pin 22" "Low,High"
|
|
bitfld.quad 0x48 21. " PID21 ,Port Input Data Channel 9 Pin 21" "Low,High"
|
|
bitfld.quad 0x48 20. " PID20 ,Port Input Data Channel 9 Pin 20" "Low,High"
|
|
textline " "
|
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bitfld.quad 0x48 19. " PID19 ,Port Input Data Channel 9 Pin 19" "Low,High"
|
|
bitfld.quad 0x48 18. " PID18 ,Port Input Data Channel 9 Pin 18" "Low,High"
|
|
bitfld.quad 0x48 17. " PID17 ,Port Input Data Channel 9 Pin 17" "Low,High"
|
|
bitfld.quad 0x48 16. " PID16 ,Port Input Data Channel 9 Pin 16" "Low,High"
|
|
bitfld.quad 0x48 15. " PID15 ,Port Input Data Channel 9 Pin 15" "Low,High"
|
|
bitfld.quad 0x48 14. " PID14 ,Port Input Data Channel 9 Pin 14" "Low,High"
|
|
bitfld.quad 0x48 13. " PID13 ,Port Input Data Channel 9 Pin 13" "Low,High"
|
|
bitfld.quad 0x48 12. " PID12 ,Port Input Data Channel 9 Pin 12" "Low,High"
|
|
bitfld.quad 0x48 11. " PID11 ,Port Input Data Channel 9 Pin 11" "Low,High"
|
|
bitfld.quad 0x48 10. " PID10 ,Port Input Data Channel 9 Pin 10" "Low,High"
|
|
bitfld.quad 0x48 9. " PID9 ,Port Input Data Channel 9 Pin 9" "Low,High"
|
|
textline " "
|
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bitfld.quad 0x48 8. " PID8 ,Port Input Data Channel 9 Pin 8" "Low,High"
|
|
bitfld.quad 0x48 7. " PID7 ,Port Input Data Channel 9 Pin 7" "Low,High"
|
|
bitfld.quad 0x48 6. " PID6 ,Port Input Data Channel 9 Pin 6" "Low,High"
|
|
bitfld.quad 0x48 5. " PID5 ,Port Input Data Channel 9 Pin 5" "Low,High"
|
|
bitfld.quad 0x48 4. " PID4 ,Port Input Data Channel 9 Pin 4" "Low,High"
|
|
bitfld.quad 0x48 3. " PID3 ,Port Input Data Channel 9 Pin 3" "Low,High"
|
|
bitfld.quad 0x48 2. " PID2 ,Port Input Data Channel 9 Pin 2" "Low,High"
|
|
bitfld.quad 0x48 1. " PID1 ,Port Input Data Channel 9 Pin 1" "Low,High"
|
|
bitfld.quad 0x48 0. " PID0 ,Port Input Data Channel 9 Pin 0" "Low,High"
|
|
line.quad 0x50 "GPIO_PIDR10,Port Input Data Register for Channel 10"
|
|
bitfld.quad 0x50 63. " PID63 ,Port Input Data Channel 10 Pin 63" "Low,High"
|
|
bitfld.quad 0x50 62. " PID62 ,Port Input Data Channel 10 Pin 62" "Low,High"
|
|
bitfld.quad 0x50 61. " PID61 ,Port Input Data Channel 10 Pin 61" "Low,High"
|
|
bitfld.quad 0x50 60. " PID60 ,Port Input Data Channel 10 Pin 60" "Low,High"
|
|
bitfld.quad 0x50 59. " PID59 ,Port Input Data Channel 10 Pin 59" "Low,High"
|
|
bitfld.quad 0x50 58. " PID58 ,Port Input Data Channel 10 Pin 58" "Low,High"
|
|
bitfld.quad 0x50 57. " PID57 ,Port Input Data Channel 10 Pin 57" "Low,High"
|
|
bitfld.quad 0x50 56. " PID56 ,Port Input Data Channel 10 Pin 56" "Low,High"
|
|
bitfld.quad 0x50 55. " PID55 ,Port Input Data Channel 10 Pin 55" "Low,High"
|
|
bitfld.quad 0x50 54. " PID54 ,Port Input Data Channel 10 Pin 54" "Low,High"
|
|
bitfld.quad 0x50 53. " PID53 ,Port Input Data Channel 10 Pin 53" "Low,High"
|
|
textline " "
|
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bitfld.quad 0x50 52. " PID52 ,Port Input Data Channel 10 Pin 52" "Low,High"
|
|
bitfld.quad 0x50 51. " PID51 ,Port Input Data Channel 10 Pin 51" "Low,High"
|
|
bitfld.quad 0x50 50. " PID50 ,Port Input Data Channel 10 Pin 50" "Low,High"
|
|
bitfld.quad 0x50 49. " PID49 ,Port Input Data Channel 10 Pin 49" "Low,High"
|
|
bitfld.quad 0x50 48. " PID48 ,Port Input Data Channel 10 Pin 48" "Low,High"
|
|
bitfld.quad 0x50 47. " PID47 ,Port Input Data Channel 10 Pin 47" "Low,High"
|
|
bitfld.quad 0x50 46. " PID46 ,Port Input Data Channel 10 Pin 46" "Low,High"
|
|
bitfld.quad 0x50 45. " PID45 ,Port Input Data Channel 10 Pin 45" "Low,High"
|
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bitfld.quad 0x50 44. " PID44 ,Port Input Data Channel 10 Pin 44" "Low,High"
|
|
bitfld.quad 0x50 43. " PID43 ,Port Input Data Channel 10 Pin 43" "Low,High"
|
|
bitfld.quad 0x50 42. " PID42 ,Port Input Data Channel 10 Pin 42" "Low,High"
|
|
textline " "
|
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bitfld.quad 0x50 41. " PID41 ,Port Input Data Channel 10 Pin 41" "Low,High"
|
|
bitfld.quad 0x50 40. " PID40 ,Port Input Data Channel 10 Pin 40" "Low,High"
|
|
bitfld.quad 0x50 39. " PID39 ,Port Input Data Channel 10 Pin 39" "Low,High"
|
|
bitfld.quad 0x50 38. " PID38 ,Port Input Data Channel 10 Pin 38" "Low,High"
|
|
bitfld.quad 0x50 37. " PID37 ,Port Input Data Channel 10 Pin 37" "Low,High"
|
|
bitfld.quad 0x50 36. " PID36 ,Port Input Data Channel 10 Pin 36" "Low,High"
|
|
bitfld.quad 0x50 35. " PID35 ,Port Input Data Channel 10 Pin 35" "Low,High"
|
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bitfld.quad 0x50 34. " PID34 ,Port Input Data Channel 10 Pin 34" "Low,High"
|
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bitfld.quad 0x50 33. " PID33 ,Port Input Data Channel 10 Pin 33" "Low,High"
|
|
bitfld.quad 0x50 32. " PID32 ,Port Input Data Channel 10 Pin 32" "Low,High"
|
|
bitfld.quad 0x50 31. " PID31 ,Port Input Data Channel 10 Pin 31" "Low,High"
|
|
textline " "
|
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bitfld.quad 0x50 30. " PID30 ,Port Input Data Channel 10 Pin 30" "Low,High"
|
|
bitfld.quad 0x50 29. " PID29 ,Port Input Data Channel 10 Pin 29" "Low,High"
|
|
bitfld.quad 0x50 28. " PID28 ,Port Input Data Channel 10 Pin 28" "Low,High"
|
|
bitfld.quad 0x50 27. " PID27 ,Port Input Data Channel 10 Pin 27" "Low,High"
|
|
bitfld.quad 0x50 26. " PID26 ,Port Input Data Channel 10 Pin 26" "Low,High"
|
|
bitfld.quad 0x50 25. " PID25 ,Port Input Data Channel 10 Pin 25" "Low,High"
|
|
bitfld.quad 0x50 24. " PID24 ,Port Input Data Channel 10 Pin 24" "Low,High"
|
|
bitfld.quad 0x50 23. " PID23 ,Port Input Data Channel 10 Pin 23" "Low,High"
|
|
bitfld.quad 0x50 22. " PID22 ,Port Input Data Channel 10 Pin 22" "Low,High"
|
|
bitfld.quad 0x50 21. " PID21 ,Port Input Data Channel 10 Pin 21" "Low,High"
|
|
bitfld.quad 0x50 20. " PID20 ,Port Input Data Channel 10 Pin 20" "Low,High"
|
|
textline " "
|
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bitfld.quad 0x50 19. " PID19 ,Port Input Data Channel 10 Pin 19" "Low,High"
|
|
bitfld.quad 0x50 18. " PID18 ,Port Input Data Channel 10 Pin 18" "Low,High"
|
|
bitfld.quad 0x50 17. " PID17 ,Port Input Data Channel 10 Pin 17" "Low,High"
|
|
bitfld.quad 0x50 16. " PID16 ,Port Input Data Channel 10 Pin 16" "Low,High"
|
|
bitfld.quad 0x50 15. " PID15 ,Port Input Data Channel 10 Pin 15" "Low,High"
|
|
bitfld.quad 0x50 14. " PID14 ,Port Input Data Channel 10 Pin 14" "Low,High"
|
|
bitfld.quad 0x50 13. " PID13 ,Port Input Data Channel 10 Pin 13" "Low,High"
|
|
bitfld.quad 0x50 12. " PID12 ,Port Input Data Channel 10 Pin 12" "Low,High"
|
|
bitfld.quad 0x50 11. " PID11 ,Port Input Data Channel 10 Pin 11" "Low,High"
|
|
bitfld.quad 0x50 10. " PID10 ,Port Input Data Channel 10 Pin 10" "Low,High"
|
|
bitfld.quad 0x50 9. " PID9 ,Port Input Data Channel 10 Pin 9" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x50 8. " PID8 ,Port Input Data Channel 10 Pin 8" "Low,High"
|
|
bitfld.quad 0x50 7. " PID7 ,Port Input Data Channel 10 Pin 7" "Low,High"
|
|
bitfld.quad 0x50 6. " PID6 ,Port Input Data Channel 10 Pin 6" "Low,High"
|
|
bitfld.quad 0x50 5. " PID5 ,Port Input Data Channel 10 Pin 5" "Low,High"
|
|
bitfld.quad 0x50 4. " PID4 ,Port Input Data Channel 10 Pin 4" "Low,High"
|
|
bitfld.quad 0x50 3. " PID3 ,Port Input Data Channel 10 Pin 3" "Low,High"
|
|
bitfld.quad 0x50 2. " PID2 ,Port Input Data Channel 10 Pin 2" "Low,High"
|
|
bitfld.quad 0x50 1. " PID1 ,Port Input Data Channel 10 Pin 1" "Low,High"
|
|
bitfld.quad 0x50 0. " PID0 ,Port Input Data Channel 10 Pin 0" "Low,High"
|
|
line.quad 0x58 "GPIO_PIDR11,Port Input Data Register for Channel 11"
|
|
bitfld.quad 0x58 63. " PID63 ,Port Input Data Channel 11 Pin 63" "Low,High"
|
|
bitfld.quad 0x58 62. " PID62 ,Port Input Data Channel 11 Pin 62" "Low,High"
|
|
bitfld.quad 0x58 61. " PID61 ,Port Input Data Channel 11 Pin 61" "Low,High"
|
|
bitfld.quad 0x58 60. " PID60 ,Port Input Data Channel 11 Pin 60" "Low,High"
|
|
bitfld.quad 0x58 59. " PID59 ,Port Input Data Channel 11 Pin 59" "Low,High"
|
|
bitfld.quad 0x58 58. " PID58 ,Port Input Data Channel 11 Pin 58" "Low,High"
|
|
bitfld.quad 0x58 57. " PID57 ,Port Input Data Channel 11 Pin 57" "Low,High"
|
|
bitfld.quad 0x58 56. " PID56 ,Port Input Data Channel 11 Pin 56" "Low,High"
|
|
bitfld.quad 0x58 55. " PID55 ,Port Input Data Channel 11 Pin 55" "Low,High"
|
|
bitfld.quad 0x58 54. " PID54 ,Port Input Data Channel 11 Pin 54" "Low,High"
|
|
bitfld.quad 0x58 53. " PID53 ,Port Input Data Channel 11 Pin 53" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x58 52. " PID52 ,Port Input Data Channel 11 Pin 52" "Low,High"
|
|
bitfld.quad 0x58 51. " PID51 ,Port Input Data Channel 11 Pin 51" "Low,High"
|
|
bitfld.quad 0x58 50. " PID50 ,Port Input Data Channel 11 Pin 50" "Low,High"
|
|
bitfld.quad 0x58 49. " PID49 ,Port Input Data Channel 11 Pin 49" "Low,High"
|
|
bitfld.quad 0x58 48. " PID48 ,Port Input Data Channel 11 Pin 48" "Low,High"
|
|
bitfld.quad 0x58 47. " PID47 ,Port Input Data Channel 11 Pin 47" "Low,High"
|
|
bitfld.quad 0x58 46. " PID46 ,Port Input Data Channel 11 Pin 46" "Low,High"
|
|
bitfld.quad 0x58 45. " PID45 ,Port Input Data Channel 11 Pin 45" "Low,High"
|
|
bitfld.quad 0x58 44. " PID44 ,Port Input Data Channel 11 Pin 44" "Low,High"
|
|
bitfld.quad 0x58 43. " PID43 ,Port Input Data Channel 11 Pin 43" "Low,High"
|
|
bitfld.quad 0x58 42. " PID42 ,Port Input Data Channel 11 Pin 42" "Low,High"
|
|
textline " "
|
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bitfld.quad 0x58 41. " PID41 ,Port Input Data Channel 11 Pin 41" "Low,High"
|
|
bitfld.quad 0x58 40. " PID40 ,Port Input Data Channel 11 Pin 40" "Low,High"
|
|
bitfld.quad 0x58 39. " PID39 ,Port Input Data Channel 11 Pin 39" "Low,High"
|
|
bitfld.quad 0x58 38. " PID38 ,Port Input Data Channel 11 Pin 38" "Low,High"
|
|
bitfld.quad 0x58 37. " PID37 ,Port Input Data Channel 11 Pin 37" "Low,High"
|
|
bitfld.quad 0x58 36. " PID36 ,Port Input Data Channel 11 Pin 36" "Low,High"
|
|
bitfld.quad 0x58 35. " PID35 ,Port Input Data Channel 11 Pin 35" "Low,High"
|
|
bitfld.quad 0x58 34. " PID34 ,Port Input Data Channel 11 Pin 34" "Low,High"
|
|
bitfld.quad 0x58 33. " PID33 ,Port Input Data Channel 11 Pin 33" "Low,High"
|
|
bitfld.quad 0x58 32. " PID32 ,Port Input Data Channel 11 Pin 32" "Low,High"
|
|
bitfld.quad 0x58 31. " PID31 ,Port Input Data Channel 11 Pin 31" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x58 30. " PID30 ,Port Input Data Channel 11 Pin 30" "Low,High"
|
|
bitfld.quad 0x58 29. " PID29 ,Port Input Data Channel 11 Pin 29" "Low,High"
|
|
bitfld.quad 0x58 28. " PID28 ,Port Input Data Channel 11 Pin 28" "Low,High"
|
|
bitfld.quad 0x58 27. " PID27 ,Port Input Data Channel 11 Pin 27" "Low,High"
|
|
bitfld.quad 0x58 26. " PID26 ,Port Input Data Channel 11 Pin 26" "Low,High"
|
|
bitfld.quad 0x58 25. " PID25 ,Port Input Data Channel 11 Pin 25" "Low,High"
|
|
bitfld.quad 0x58 24. " PID24 ,Port Input Data Channel 11 Pin 24" "Low,High"
|
|
bitfld.quad 0x58 23. " PID23 ,Port Input Data Channel 11 Pin 23" "Low,High"
|
|
bitfld.quad 0x58 22. " PID22 ,Port Input Data Channel 11 Pin 22" "Low,High"
|
|
bitfld.quad 0x58 21. " PID21 ,Port Input Data Channel 11 Pin 21" "Low,High"
|
|
bitfld.quad 0x58 20. " PID20 ,Port Input Data Channel 11 Pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x58 19. " PID19 ,Port Input Data Channel 11 Pin 19" "Low,High"
|
|
bitfld.quad 0x58 18. " PID18 ,Port Input Data Channel 11 Pin 18" "Low,High"
|
|
bitfld.quad 0x58 17. " PID17 ,Port Input Data Channel 11 Pin 17" "Low,High"
|
|
bitfld.quad 0x58 16. " PID16 ,Port Input Data Channel 11 Pin 16" "Low,High"
|
|
bitfld.quad 0x58 15. " PID15 ,Port Input Data Channel 11 Pin 15" "Low,High"
|
|
bitfld.quad 0x58 14. " PID14 ,Port Input Data Channel 11 Pin 14" "Low,High"
|
|
bitfld.quad 0x58 13. " PID13 ,Port Input Data Channel 11 Pin 13" "Low,High"
|
|
bitfld.quad 0x58 12. " PID12 ,Port Input Data Channel 11 Pin 12" "Low,High"
|
|
bitfld.quad 0x58 11. " PID11 ,Port Input Data Channel 11 Pin 11" "Low,High"
|
|
bitfld.quad 0x58 10. " PID10 ,Port Input Data Channel 11 Pin 10" "Low,High"
|
|
bitfld.quad 0x58 9. " PID9 ,Port Input Data Channel 11 Pin 9" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x58 8. " PID8 ,Port Input Data Channel 11 Pin 8" "Low,High"
|
|
bitfld.quad 0x58 7. " PID7 ,Port Input Data Channel 11 Pin 7" "Low,High"
|
|
bitfld.quad 0x58 6. " PID6 ,Port Input Data Channel 11 Pin 6" "Low,High"
|
|
bitfld.quad 0x58 5. " PID5 ,Port Input Data Channel 11 Pin 5" "Low,High"
|
|
bitfld.quad 0x58 4. " PID4 ,Port Input Data Channel 11 Pin 4" "Low,High"
|
|
bitfld.quad 0x58 3. " PID3 ,Port Input Data Channel 11 Pin 3" "Low,High"
|
|
bitfld.quad 0x58 2. " PID2 ,Port Input Data Channel 11 Pin 2" "Low,High"
|
|
bitfld.quad 0x58 1. " PID1 ,Port Input Data Channel 11 Pin 1" "Low,High"
|
|
bitfld.quad 0x58 0. " PID0 ,Port Input Data Channel 11 Pin 0" "Low,High"
|
|
line.quad 0x60 "GPIO_PIDR12,Port Input Data Register for Channel 12"
|
|
bitfld.quad 0x60 63. " PID63 ,Port Input Data Channel 12 Pin 63" "Low,High"
|
|
bitfld.quad 0x60 62. " PID62 ,Port Input Data Channel 12 Pin 62" "Low,High"
|
|
bitfld.quad 0x60 61. " PID61 ,Port Input Data Channel 12 Pin 61" "Low,High"
|
|
bitfld.quad 0x60 60. " PID60 ,Port Input Data Channel 12 Pin 60" "Low,High"
|
|
bitfld.quad 0x60 59. " PID59 ,Port Input Data Channel 12 Pin 59" "Low,High"
|
|
bitfld.quad 0x60 58. " PID58 ,Port Input Data Channel 12 Pin 58" "Low,High"
|
|
bitfld.quad 0x60 57. " PID57 ,Port Input Data Channel 12 Pin 57" "Low,High"
|
|
bitfld.quad 0x60 56. " PID56 ,Port Input Data Channel 12 Pin 56" "Low,High"
|
|
bitfld.quad 0x60 55. " PID55 ,Port Input Data Channel 12 Pin 55" "Low,High"
|
|
bitfld.quad 0x60 54. " PID54 ,Port Input Data Channel 12 Pin 54" "Low,High"
|
|
bitfld.quad 0x60 53. " PID53 ,Port Input Data Channel 12 Pin 53" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x60 52. " PID52 ,Port Input Data Channel 12 Pin 52" "Low,High"
|
|
bitfld.quad 0x60 51. " PID51 ,Port Input Data Channel 12 Pin 51" "Low,High"
|
|
bitfld.quad 0x60 50. " PID50 ,Port Input Data Channel 12 Pin 50" "Low,High"
|
|
bitfld.quad 0x60 49. " PID49 ,Port Input Data Channel 12 Pin 49" "Low,High"
|
|
bitfld.quad 0x60 48. " PID48 ,Port Input Data Channel 12 Pin 48" "Low,High"
|
|
bitfld.quad 0x60 47. " PID47 ,Port Input Data Channel 12 Pin 47" "Low,High"
|
|
bitfld.quad 0x60 46. " PID46 ,Port Input Data Channel 12 Pin 46" "Low,High"
|
|
bitfld.quad 0x60 45. " PID45 ,Port Input Data Channel 12 Pin 45" "Low,High"
|
|
bitfld.quad 0x60 44. " PID44 ,Port Input Data Channel 12 Pin 44" "Low,High"
|
|
bitfld.quad 0x60 43. " PID43 ,Port Input Data Channel 12 Pin 43" "Low,High"
|
|
bitfld.quad 0x60 42. " PID42 ,Port Input Data Channel 12 Pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x60 41. " PID41 ,Port Input Data Channel 12 Pin 41" "Low,High"
|
|
bitfld.quad 0x60 40. " PID40 ,Port Input Data Channel 12 Pin 40" "Low,High"
|
|
bitfld.quad 0x60 39. " PID39 ,Port Input Data Channel 12 Pin 39" "Low,High"
|
|
bitfld.quad 0x60 38. " PID38 ,Port Input Data Channel 12 Pin 38" "Low,High"
|
|
bitfld.quad 0x60 37. " PID37 ,Port Input Data Channel 12 Pin 37" "Low,High"
|
|
bitfld.quad 0x60 36. " PID36 ,Port Input Data Channel 12 Pin 36" "Low,High"
|
|
bitfld.quad 0x60 35. " PID35 ,Port Input Data Channel 12 Pin 35" "Low,High"
|
|
bitfld.quad 0x60 34. " PID34 ,Port Input Data Channel 12 Pin 34" "Low,High"
|
|
bitfld.quad 0x60 33. " PID33 ,Port Input Data Channel 12 Pin 33" "Low,High"
|
|
bitfld.quad 0x60 32. " PID32 ,Port Input Data Channel 12 Pin 32" "Low,High"
|
|
bitfld.quad 0x60 31. " PID31 ,Port Input Data Channel 12 Pin 31" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x60 30. " PID30 ,Port Input Data Channel 12 Pin 30" "Low,High"
|
|
bitfld.quad 0x60 29. " PID29 ,Port Input Data Channel 12 Pin 29" "Low,High"
|
|
bitfld.quad 0x60 28. " PID28 ,Port Input Data Channel 12 Pin 28" "Low,High"
|
|
bitfld.quad 0x60 27. " PID27 ,Port Input Data Channel 12 Pin 27" "Low,High"
|
|
bitfld.quad 0x60 26. " PID26 ,Port Input Data Channel 12 Pin 26" "Low,High"
|
|
bitfld.quad 0x60 25. " PID25 ,Port Input Data Channel 12 Pin 25" "Low,High"
|
|
bitfld.quad 0x60 24. " PID24 ,Port Input Data Channel 12 Pin 24" "Low,High"
|
|
bitfld.quad 0x60 23. " PID23 ,Port Input Data Channel 12 Pin 23" "Low,High"
|
|
bitfld.quad 0x60 22. " PID22 ,Port Input Data Channel 12 Pin 22" "Low,High"
|
|
bitfld.quad 0x60 21. " PID21 ,Port Input Data Channel 12 Pin 21" "Low,High"
|
|
bitfld.quad 0x60 20. " PID20 ,Port Input Data Channel 12 Pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x60 19. " PID19 ,Port Input Data Channel 12 Pin 19" "Low,High"
|
|
bitfld.quad 0x60 18. " PID18 ,Port Input Data Channel 12 Pin 18" "Low,High"
|
|
bitfld.quad 0x60 17. " PID17 ,Port Input Data Channel 12 Pin 17" "Low,High"
|
|
bitfld.quad 0x60 16. " PID16 ,Port Input Data Channel 12 Pin 16" "Low,High"
|
|
bitfld.quad 0x60 15. " PID15 ,Port Input Data Channel 12 Pin 15" "Low,High"
|
|
bitfld.quad 0x60 14. " PID14 ,Port Input Data Channel 12 Pin 14" "Low,High"
|
|
bitfld.quad 0x60 13. " PID13 ,Port Input Data Channel 12 Pin 13" "Low,High"
|
|
bitfld.quad 0x60 12. " PID12 ,Port Input Data Channel 12 Pin 12" "Low,High"
|
|
bitfld.quad 0x60 11. " PID11 ,Port Input Data Channel 12 Pin 11" "Low,High"
|
|
bitfld.quad 0x60 10. " PID10 ,Port Input Data Channel 12 Pin 10" "Low,High"
|
|
bitfld.quad 0x60 9. " PID9 ,Port Input Data Channel 12 Pin 9" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x60 8. " PID8 ,Port Input Data Channel 12 Pin 8" "Low,High"
|
|
bitfld.quad 0x60 7. " PID7 ,Port Input Data Channel 12 Pin 7" "Low,High"
|
|
bitfld.quad 0x60 6. " PID6 ,Port Input Data Channel 12 Pin 6" "Low,High"
|
|
bitfld.quad 0x60 5. " PID5 ,Port Input Data Channel 12 Pin 5" "Low,High"
|
|
bitfld.quad 0x60 4. " PID4 ,Port Input Data Channel 12 Pin 4" "Low,High"
|
|
bitfld.quad 0x60 3. " PID3 ,Port Input Data Channel 12 Pin 3" "Low,High"
|
|
bitfld.quad 0x60 2. " PID2 ,Port Input Data Channel 12 Pin 2" "Low,High"
|
|
bitfld.quad 0x60 1. " PID1 ,Port Input Data Channel 12 Pin 1" "Low,High"
|
|
bitfld.quad 0x60 0. " PID0 ,Port Input Data Channel 12 Pin 0" "Low,High"
|
|
line.quad 0x68 "GPIO_PIDR13,Port Input Data Register for Channel 13"
|
|
bitfld.quad 0x68 63. " PID63 ,Port Input Data Channel 13 Pin 63" "Low,High"
|
|
bitfld.quad 0x68 62. " PID62 ,Port Input Data Channel 13 Pin 62" "Low,High"
|
|
bitfld.quad 0x68 61. " PID61 ,Port Input Data Channel 13 Pin 61" "Low,High"
|
|
bitfld.quad 0x68 60. " PID60 ,Port Input Data Channel 13 Pin 60" "Low,High"
|
|
bitfld.quad 0x68 59. " PID59 ,Port Input Data Channel 13 Pin 59" "Low,High"
|
|
bitfld.quad 0x68 58. " PID58 ,Port Input Data Channel 13 Pin 58" "Low,High"
|
|
bitfld.quad 0x68 57. " PID57 ,Port Input Data Channel 13 Pin 57" "Low,High"
|
|
bitfld.quad 0x68 56. " PID56 ,Port Input Data Channel 13 Pin 56" "Low,High"
|
|
bitfld.quad 0x68 55. " PID55 ,Port Input Data Channel 13 Pin 55" "Low,High"
|
|
bitfld.quad 0x68 54. " PID54 ,Port Input Data Channel 13 Pin 54" "Low,High"
|
|
bitfld.quad 0x68 53. " PID53 ,Port Input Data Channel 13 Pin 53" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x68 52. " PID52 ,Port Input Data Channel 13 Pin 52" "Low,High"
|
|
bitfld.quad 0x68 51. " PID51 ,Port Input Data Channel 13 Pin 51" "Low,High"
|
|
bitfld.quad 0x68 50. " PID50 ,Port Input Data Channel 13 Pin 50" "Low,High"
|
|
bitfld.quad 0x68 49. " PID49 ,Port Input Data Channel 13 Pin 49" "Low,High"
|
|
bitfld.quad 0x68 48. " PID48 ,Port Input Data Channel 13 Pin 48" "Low,High"
|
|
bitfld.quad 0x68 47. " PID47 ,Port Input Data Channel 13 Pin 47" "Low,High"
|
|
bitfld.quad 0x68 46. " PID46 ,Port Input Data Channel 13 Pin 46" "Low,High"
|
|
bitfld.quad 0x68 45. " PID45 ,Port Input Data Channel 13 Pin 45" "Low,High"
|
|
bitfld.quad 0x68 44. " PID44 ,Port Input Data Channel 13 Pin 44" "Low,High"
|
|
bitfld.quad 0x68 43. " PID43 ,Port Input Data Channel 13 Pin 43" "Low,High"
|
|
bitfld.quad 0x68 42. " PID42 ,Port Input Data Channel 13 Pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x68 41. " PID41 ,Port Input Data Channel 13 Pin 41" "Low,High"
|
|
bitfld.quad 0x68 40. " PID40 ,Port Input Data Channel 13 Pin 40" "Low,High"
|
|
bitfld.quad 0x68 39. " PID39 ,Port Input Data Channel 13 Pin 39" "Low,High"
|
|
bitfld.quad 0x68 38. " PID38 ,Port Input Data Channel 13 Pin 38" "Low,High"
|
|
bitfld.quad 0x68 37. " PID37 ,Port Input Data Channel 13 Pin 37" "Low,High"
|
|
bitfld.quad 0x68 36. " PID36 ,Port Input Data Channel 13 Pin 36" "Low,High"
|
|
bitfld.quad 0x68 35. " PID35 ,Port Input Data Channel 13 Pin 35" "Low,High"
|
|
bitfld.quad 0x68 34. " PID34 ,Port Input Data Channel 13 Pin 34" "Low,High"
|
|
bitfld.quad 0x68 33. " PID33 ,Port Input Data Channel 13 Pin 33" "Low,High"
|
|
bitfld.quad 0x68 32. " PID32 ,Port Input Data Channel 13 Pin 32" "Low,High"
|
|
bitfld.quad 0x68 31. " PID31 ,Port Input Data Channel 13 Pin 31" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x68 30. " PID30 ,Port Input Data Channel 13 Pin 30" "Low,High"
|
|
bitfld.quad 0x68 29. " PID29 ,Port Input Data Channel 13 Pin 29" "Low,High"
|
|
bitfld.quad 0x68 28. " PID28 ,Port Input Data Channel 13 Pin 28" "Low,High"
|
|
bitfld.quad 0x68 27. " PID27 ,Port Input Data Channel 13 Pin 27" "Low,High"
|
|
bitfld.quad 0x68 26. " PID26 ,Port Input Data Channel 13 Pin 26" "Low,High"
|
|
bitfld.quad 0x68 25. " PID25 ,Port Input Data Channel 13 Pin 25" "Low,High"
|
|
bitfld.quad 0x68 24. " PID24 ,Port Input Data Channel 13 Pin 24" "Low,High"
|
|
bitfld.quad 0x68 23. " PID23 ,Port Input Data Channel 13 Pin 23" "Low,High"
|
|
bitfld.quad 0x68 22. " PID22 ,Port Input Data Channel 13 Pin 22" "Low,High"
|
|
bitfld.quad 0x68 21. " PID21 ,Port Input Data Channel 13 Pin 21" "Low,High"
|
|
bitfld.quad 0x68 20. " PID20 ,Port Input Data Channel 13 Pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x68 19. " PID19 ,Port Input Data Channel 13 Pin 19" "Low,High"
|
|
bitfld.quad 0x68 18. " PID18 ,Port Input Data Channel 13 Pin 18" "Low,High"
|
|
bitfld.quad 0x68 17. " PID17 ,Port Input Data Channel 13 Pin 17" "Low,High"
|
|
bitfld.quad 0x68 16. " PID16 ,Port Input Data Channel 13 Pin 16" "Low,High"
|
|
bitfld.quad 0x68 15. " PID15 ,Port Input Data Channel 13 Pin 15" "Low,High"
|
|
bitfld.quad 0x68 14. " PID14 ,Port Input Data Channel 13 Pin 14" "Low,High"
|
|
bitfld.quad 0x68 13. " PID13 ,Port Input Data Channel 13 Pin 13" "Low,High"
|
|
bitfld.quad 0x68 12. " PID12 ,Port Input Data Channel 13 Pin 12" "Low,High"
|
|
bitfld.quad 0x68 11. " PID11 ,Port Input Data Channel 13 Pin 11" "Low,High"
|
|
bitfld.quad 0x68 10. " PID10 ,Port Input Data Channel 13 Pin 10" "Low,High"
|
|
bitfld.quad 0x68 9. " PID9 ,Port Input Data Channel 13 Pin 9" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x68 8. " PID8 ,Port Input Data Channel 13 Pin 8" "Low,High"
|
|
bitfld.quad 0x68 7. " PID7 ,Port Input Data Channel 13 Pin 7" "Low,High"
|
|
bitfld.quad 0x68 6. " PID6 ,Port Input Data Channel 13 Pin 6" "Low,High"
|
|
bitfld.quad 0x68 5. " PID5 ,Port Input Data Channel 13 Pin 5" "Low,High"
|
|
bitfld.quad 0x68 4. " PID4 ,Port Input Data Channel 13 Pin 4" "Low,High"
|
|
bitfld.quad 0x68 3. " PID3 ,Port Input Data Channel 13 Pin 3" "Low,High"
|
|
bitfld.quad 0x68 2. " PID2 ,Port Input Data Channel 13 Pin 2" "Low,High"
|
|
bitfld.quad 0x68 1. " PID1 ,Port Input Data Channel 13 Pin 1" "Low,High"
|
|
bitfld.quad 0x68 0. " PID0 ,Port Input Data Channel 13 Pin 0" "Low,High"
|
|
line.quad 0x70 "GPIO_PIDR14,Port Input Data Register for Channel 14"
|
|
bitfld.quad 0x70 63. " PID63 ,Port Input Data Channel 14 Pin 63" "Low,High"
|
|
bitfld.quad 0x70 62. " PID62 ,Port Input Data Channel 14 Pin 62" "Low,High"
|
|
bitfld.quad 0x70 61. " PID61 ,Port Input Data Channel 14 Pin 61" "Low,High"
|
|
bitfld.quad 0x70 60. " PID60 ,Port Input Data Channel 14 Pin 60" "Low,High"
|
|
bitfld.quad 0x70 59. " PID59 ,Port Input Data Channel 14 Pin 59" "Low,High"
|
|
bitfld.quad 0x70 58. " PID58 ,Port Input Data Channel 14 Pin 58" "Low,High"
|
|
bitfld.quad 0x70 57. " PID57 ,Port Input Data Channel 14 Pin 57" "Low,High"
|
|
bitfld.quad 0x70 56. " PID56 ,Port Input Data Channel 14 Pin 56" "Low,High"
|
|
bitfld.quad 0x70 55. " PID55 ,Port Input Data Channel 14 Pin 55" "Low,High"
|
|
bitfld.quad 0x70 54. " PID54 ,Port Input Data Channel 14 Pin 54" "Low,High"
|
|
bitfld.quad 0x70 53. " PID53 ,Port Input Data Channel 14 Pin 53" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x70 52. " PID52 ,Port Input Data Channel 14 Pin 52" "Low,High"
|
|
bitfld.quad 0x70 51. " PID51 ,Port Input Data Channel 14 Pin 51" "Low,High"
|
|
bitfld.quad 0x70 50. " PID50 ,Port Input Data Channel 14 Pin 50" "Low,High"
|
|
bitfld.quad 0x70 49. " PID49 ,Port Input Data Channel 14 Pin 49" "Low,High"
|
|
bitfld.quad 0x70 48. " PID48 ,Port Input Data Channel 14 Pin 48" "Low,High"
|
|
bitfld.quad 0x70 47. " PID47 ,Port Input Data Channel 14 Pin 47" "Low,High"
|
|
bitfld.quad 0x70 46. " PID46 ,Port Input Data Channel 14 Pin 46" "Low,High"
|
|
bitfld.quad 0x70 45. " PID45 ,Port Input Data Channel 14 Pin 45" "Low,High"
|
|
bitfld.quad 0x70 44. " PID44 ,Port Input Data Channel 14 Pin 44" "Low,High"
|
|
bitfld.quad 0x70 43. " PID43 ,Port Input Data Channel 14 Pin 43" "Low,High"
|
|
bitfld.quad 0x70 42. " PID42 ,Port Input Data Channel 14 Pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x70 41. " PID41 ,Port Input Data Channel 14 Pin 41" "Low,High"
|
|
bitfld.quad 0x70 40. " PID40 ,Port Input Data Channel 14 Pin 40" "Low,High"
|
|
bitfld.quad 0x70 39. " PID39 ,Port Input Data Channel 14 Pin 39" "Low,High"
|
|
bitfld.quad 0x70 38. " PID38 ,Port Input Data Channel 14 Pin 38" "Low,High"
|
|
bitfld.quad 0x70 37. " PID37 ,Port Input Data Channel 14 Pin 37" "Low,High"
|
|
bitfld.quad 0x70 36. " PID36 ,Port Input Data Channel 14 Pin 36" "Low,High"
|
|
bitfld.quad 0x70 35. " PID35 ,Port Input Data Channel 14 Pin 35" "Low,High"
|
|
bitfld.quad 0x70 34. " PID34 ,Port Input Data Channel 14 Pin 34" "Low,High"
|
|
bitfld.quad 0x70 33. " PID33 ,Port Input Data Channel 14 Pin 33" "Low,High"
|
|
bitfld.quad 0x70 32. " PID32 ,Port Input Data Channel 14 Pin 32" "Low,High"
|
|
bitfld.quad 0x70 31. " PID31 ,Port Input Data Channel 14 Pin 31" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x70 30. " PID30 ,Port Input Data Channel 14 Pin 30" "Low,High"
|
|
bitfld.quad 0x70 29. " PID29 ,Port Input Data Channel 14 Pin 29" "Low,High"
|
|
bitfld.quad 0x70 28. " PID28 ,Port Input Data Channel 14 Pin 28" "Low,High"
|
|
bitfld.quad 0x70 27. " PID27 ,Port Input Data Channel 14 Pin 27" "Low,High"
|
|
bitfld.quad 0x70 26. " PID26 ,Port Input Data Channel 14 Pin 26" "Low,High"
|
|
bitfld.quad 0x70 25. " PID25 ,Port Input Data Channel 14 Pin 25" "Low,High"
|
|
bitfld.quad 0x70 24. " PID24 ,Port Input Data Channel 14 Pin 24" "Low,High"
|
|
bitfld.quad 0x70 23. " PID23 ,Port Input Data Channel 14 Pin 23" "Low,High"
|
|
bitfld.quad 0x70 22. " PID22 ,Port Input Data Channel 14 Pin 22" "Low,High"
|
|
bitfld.quad 0x70 21. " PID21 ,Port Input Data Channel 14 Pin 21" "Low,High"
|
|
bitfld.quad 0x70 20. " PID20 ,Port Input Data Channel 14 Pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x70 19. " PID19 ,Port Input Data Channel 14 Pin 19" "Low,High"
|
|
bitfld.quad 0x70 18. " PID18 ,Port Input Data Channel 14 Pin 18" "Low,High"
|
|
bitfld.quad 0x70 17. " PID17 ,Port Input Data Channel 14 Pin 17" "Low,High"
|
|
bitfld.quad 0x70 16. " PID16 ,Port Input Data Channel 14 Pin 16" "Low,High"
|
|
bitfld.quad 0x70 15. " PID15 ,Port Input Data Channel 14 Pin 15" "Low,High"
|
|
bitfld.quad 0x70 14. " PID14 ,Port Input Data Channel 14 Pin 14" "Low,High"
|
|
bitfld.quad 0x70 13. " PID13 ,Port Input Data Channel 14 Pin 13" "Low,High"
|
|
bitfld.quad 0x70 12. " PID12 ,Port Input Data Channel 14 Pin 12" "Low,High"
|
|
bitfld.quad 0x70 11. " PID11 ,Port Input Data Channel 14 Pin 11" "Low,High"
|
|
bitfld.quad 0x70 10. " PID10 ,Port Input Data Channel 14 Pin 10" "Low,High"
|
|
bitfld.quad 0x70 9. " PID9 ,Port Input Data Channel 14 Pin 9" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x70 8. " PID8 ,Port Input Data Channel 14 Pin 8" "Low,High"
|
|
bitfld.quad 0x70 7. " PID7 ,Port Input Data Channel 14 Pin 7" "Low,High"
|
|
bitfld.quad 0x70 6. " PID6 ,Port Input Data Channel 14 Pin 6" "Low,High"
|
|
bitfld.quad 0x70 5. " PID5 ,Port Input Data Channel 14 Pin 5" "Low,High"
|
|
bitfld.quad 0x70 4. " PID4 ,Port Input Data Channel 14 Pin 4" "Low,High"
|
|
bitfld.quad 0x70 3. " PID3 ,Port Input Data Channel 14 Pin 3" "Low,High"
|
|
bitfld.quad 0x70 2. " PID2 ,Port Input Data Channel 14 Pin 2" "Low,High"
|
|
bitfld.quad 0x70 1. " PID1 ,Port Input Data Channel 14 Pin 1" "Low,High"
|
|
bitfld.quad 0x70 0. " PID0 ,Port Input Data Channel 14 Pin 0" "Low,High"
|
|
line.quad 0x78 "GPIO_PIDR15,Port Input Data Register for Channel 15"
|
|
bitfld.quad 0x78 63. " PID63 ,Port Input Data Channel 15 Pin 63" "Low,High"
|
|
bitfld.quad 0x78 62. " PID62 ,Port Input Data Channel 15 Pin 62" "Low,High"
|
|
bitfld.quad 0x78 61. " PID61 ,Port Input Data Channel 15 Pin 61" "Low,High"
|
|
bitfld.quad 0x78 60. " PID60 ,Port Input Data Channel 15 Pin 60" "Low,High"
|
|
bitfld.quad 0x78 59. " PID59 ,Port Input Data Channel 15 Pin 59" "Low,High"
|
|
bitfld.quad 0x78 58. " PID58 ,Port Input Data Channel 15 Pin 58" "Low,High"
|
|
bitfld.quad 0x78 57. " PID57 ,Port Input Data Channel 15 Pin 57" "Low,High"
|
|
bitfld.quad 0x78 56. " PID56 ,Port Input Data Channel 15 Pin 56" "Low,High"
|
|
bitfld.quad 0x78 55. " PID55 ,Port Input Data Channel 15 Pin 55" "Low,High"
|
|
bitfld.quad 0x78 54. " PID54 ,Port Input Data Channel 15 Pin 54" "Low,High"
|
|
bitfld.quad 0x78 53. " PID53 ,Port Input Data Channel 15 Pin 53" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x78 52. " PID52 ,Port Input Data Channel 15 Pin 52" "Low,High"
|
|
bitfld.quad 0x78 51. " PID51 ,Port Input Data Channel 15 Pin 51" "Low,High"
|
|
bitfld.quad 0x78 50. " PID50 ,Port Input Data Channel 15 Pin 50" "Low,High"
|
|
bitfld.quad 0x78 49. " PID49 ,Port Input Data Channel 15 Pin 49" "Low,High"
|
|
bitfld.quad 0x78 48. " PID48 ,Port Input Data Channel 15 Pin 48" "Low,High"
|
|
bitfld.quad 0x78 47. " PID47 ,Port Input Data Channel 15 Pin 47" "Low,High"
|
|
bitfld.quad 0x78 46. " PID46 ,Port Input Data Channel 15 Pin 46" "Low,High"
|
|
bitfld.quad 0x78 45. " PID45 ,Port Input Data Channel 15 Pin 45" "Low,High"
|
|
bitfld.quad 0x78 44. " PID44 ,Port Input Data Channel 15 Pin 44" "Low,High"
|
|
bitfld.quad 0x78 43. " PID43 ,Port Input Data Channel 15 Pin 43" "Low,High"
|
|
bitfld.quad 0x78 42. " PID42 ,Port Input Data Channel 15 Pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x78 41. " PID41 ,Port Input Data Channel 15 Pin 41" "Low,High"
|
|
bitfld.quad 0x78 40. " PID40 ,Port Input Data Channel 15 Pin 40" "Low,High"
|
|
bitfld.quad 0x78 39. " PID39 ,Port Input Data Channel 15 Pin 39" "Low,High"
|
|
bitfld.quad 0x78 38. " PID38 ,Port Input Data Channel 15 Pin 38" "Low,High"
|
|
bitfld.quad 0x78 37. " PID37 ,Port Input Data Channel 15 Pin 37" "Low,High"
|
|
bitfld.quad 0x78 36. " PID36 ,Port Input Data Channel 15 Pin 36" "Low,High"
|
|
bitfld.quad 0x78 35. " PID35 ,Port Input Data Channel 15 Pin 35" "Low,High"
|
|
bitfld.quad 0x78 34. " PID34 ,Port Input Data Channel 15 Pin 34" "Low,High"
|
|
bitfld.quad 0x78 33. " PID33 ,Port Input Data Channel 15 Pin 33" "Low,High"
|
|
bitfld.quad 0x78 32. " PID32 ,Port Input Data Channel 15 Pin 32" "Low,High"
|
|
bitfld.quad 0x78 31. " PID31 ,Port Input Data Channel 15 Pin 31" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x78 30. " PID30 ,Port Input Data Channel 15 Pin 30" "Low,High"
|
|
bitfld.quad 0x78 29. " PID29 ,Port Input Data Channel 15 Pin 29" "Low,High"
|
|
bitfld.quad 0x78 28. " PID28 ,Port Input Data Channel 15 Pin 28" "Low,High"
|
|
bitfld.quad 0x78 27. " PID27 ,Port Input Data Channel 15 Pin 27" "Low,High"
|
|
bitfld.quad 0x78 26. " PID26 ,Port Input Data Channel 15 Pin 26" "Low,High"
|
|
bitfld.quad 0x78 25. " PID25 ,Port Input Data Channel 15 Pin 25" "Low,High"
|
|
bitfld.quad 0x78 24. " PID24 ,Port Input Data Channel 15 Pin 24" "Low,High"
|
|
bitfld.quad 0x78 23. " PID23 ,Port Input Data Channel 15 Pin 23" "Low,High"
|
|
bitfld.quad 0x78 22. " PID22 ,Port Input Data Channel 15 Pin 22" "Low,High"
|
|
bitfld.quad 0x78 21. " PID21 ,Port Input Data Channel 15 Pin 21" "Low,High"
|
|
bitfld.quad 0x78 20. " PID20 ,Port Input Data Channel 15 Pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x78 19. " PID19 ,Port Input Data Channel 15 Pin 19" "Low,High"
|
|
bitfld.quad 0x78 18. " PID18 ,Port Input Data Channel 15 Pin 18" "Low,High"
|
|
bitfld.quad 0x78 17. " PID17 ,Port Input Data Channel 15 Pin 17" "Low,High"
|
|
bitfld.quad 0x78 16. " PID16 ,Port Input Data Channel 15 Pin 16" "Low,High"
|
|
bitfld.quad 0x78 15. " PID15 ,Port Input Data Channel 15 Pin 15" "Low,High"
|
|
bitfld.quad 0x78 14. " PID14 ,Port Input Data Channel 15 Pin 14" "Low,High"
|
|
bitfld.quad 0x78 13. " PID13 ,Port Input Data Channel 15 Pin 13" "Low,High"
|
|
bitfld.quad 0x78 12. " PID12 ,Port Input Data Channel 15 Pin 12" "Low,High"
|
|
bitfld.quad 0x78 11. " PID11 ,Port Input Data Channel 15 Pin 11" "Low,High"
|
|
bitfld.quad 0x78 10. " PID10 ,Port Input Data Channel 15 Pin 10" "Low,High"
|
|
bitfld.quad 0x78 9. " PID9 ,Port Input Data Channel 15 Pin 9" "Low,High"
|
|
textline " "
|
|
bitfld.quad 0x78 8. " PID8 ,Port Input Data Channel 15 Pin 8" "Low,High"
|
|
bitfld.quad 0x78 7. " PID7 ,Port Input Data Channel 15 Pin 7" "Low,High"
|
|
bitfld.quad 0x78 6. " PID6 ,Port Input Data Channel 15 Pin 6" "Low,High"
|
|
bitfld.quad 0x78 5. " PID5 ,Port Input Data Channel 15 Pin 5" "Low,High"
|
|
bitfld.quad 0x78 4. " PID4 ,Port Input Data Channel 15 Pin 4" "Low,High"
|
|
bitfld.quad 0x78 3. " PID3 ,Port Input Data Channel 15 Pin 3" "Low,High"
|
|
bitfld.quad 0x78 2. " PID2 ,Port Input Data Channel 15 Pin 2" "Low,High"
|
|
bitfld.quad 0x78 1. " PID1 ,Port Input Data Channel 15 Pin 1" "Low,High"
|
|
bitfld.quad 0x78 0. " PID0 ,Port Input Data Channel 15 Pin 0" "Low,High"
|
|
endif
|
|
endif
|
|
tree.end
|
|
tree "Port PPU Enable registers"
|
|
sif (cpu()=="MB9EF226"&&cpu()=="MB9EF126")
|
|
group.quad 0x380++0x17
|
|
elif (cpu()=="MB9DF126"&&cpu()=="MB9DF125")
|
|
group.quad 0x380++0x1f
|
|
else
|
|
group.quad 0x380++0x7F
|
|
endif
|
|
line.quad 0x00 "GPIO_PPER0,Port PPU Enable Register for Channel 0"
|
|
bitfld.quad 0x00 63. " PPE63 ,Port PPU Enable Channel 0 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x00 62. " PPE62 ,Port PPU Enable Channel 0 Pin 62" "Disabled,Enabled"
|
|
textline " "
|
|
sif cpu()!="MB9EF226"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
sif cpu()!="MB9EF126"
|
|
bitfld.quad 0x00 61. " PPE61 ,Port PPU Enable Channel 0 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x00 60. " PPE60 ,Port PPU Enable Channel 0 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x00 59. " PPE59 ,Port PPU Enable Channel 0 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x00 58. " PPE58 ,Port PPU Enable Channel 0 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x00 57. " PPE57 ,Port PPU Enable Channel 0 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x00 56. " PPE56 ,Port PPU Enable Channel 0 Pin 56" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x00 55. " PPE55 ,Port PPU Enable Channel 0 Pin 55" "Disabled,Enabled"
|
|
bitfld.quad 0x00 54. " PPE54 ,Port PPU Enable Channel 0 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x00 53. " PPE53 ,Port PPU Enable Channel 0 Pin 53" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x00 52. " PPE52 ,Port PPU Enable Channel 0 Pin 52" "Disabled,Enabled"
|
|
endif
|
|
bitfld.quad 0x00 51. " PPE51 ,Port PPU Enable Channel 0 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x00 50. " PPE50 ,Port PPU Enable Channel 0 Pin 50" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x00 49. " PPE49 ,Port PPU Enable Channel 0 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x00 48. " PPE48 ,Port PPU Enable Channel 0 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x00 47. " PPE47 ,Port PPU Enable Channel 0 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x00 46. " PPE46 ,Port PPU Enable Channel 0 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x00 45. " PPE45 ,Port PPU Enable Channel 0 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x00 44. " PPE44 ,Port PPU Enable Channel 0 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x00 43. " PPE43 ,Port PPU Enable Channel 0 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x00 42. " PPE42 ,Port PPU Enable Channel 0 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x00 41. " PPE41 ,Port PPU Enable Channel 0 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x00 40. " PPE40 ,Port PPU Enable Channel 0 Pin 40" "Disabled,Enabled"
|
|
textline " "
|
|
sif cpu()!="MB9DF126"
|
|
sif cpu()!="MB9EF226"
|
|
sif cpu()!="MB9DF125"
|
|
bitfld.quad 0x00 39. " PPE39 ,Port PPU Enable Channel 0 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x00 38. " PPE38 ,Port PPU Enable Channel 0 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x00 37. " PPE37 ,Port PPU Enable Channel 0 Pin 37" "Disabled,Enabled"
|
|
bitfld.quad 0x00 36. " PPE36 ,Port PPU Enable Channel 0 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x00 35. " PPE35 ,Port PPU Enable Channel 0 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x00 34. " PPE34 ,Port PPU Enable Channel 0 Pin 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x00 33. " PPE33 ,Port PPU Enable Channel 0 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x00 32. " PPE32 ,Port PPU Enable Channel 0 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x00 31. " PPE31 ,Port PPU Enable Channel 0 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x00 30. " PPE30 ,Port PPU Enable Channel 0 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x00 29. " PPE29 ,Port PPU Enable Channel 0 Pin 29" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x00 28. " PPE28 ,Port PPU Enable Channel 0 Pin 28" "Disabled,Enabled"
|
|
bitfld.quad 0x00 27. " PPE27 ,Port PPU Enable Channel 0 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x00 26. " PPE26 ,Port PPU Enable Channel 0 Pin 26" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif cpu()!="MB9DF125"
|
|
bitfld.quad 0x00 25. " PPE25 ,Port PPU Enable Channel 0 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x00 24. " PPE24 ,Port PPU Enable Channel 0 Pin 24" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif cpu()!="MB9EF226"
|
|
sif cpu()!="MB9DF125"
|
|
bitfld.quad 0x00 23. " PPE23 ,Port PPU Enable Channel 0 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x00 22. " PPE22 ,Port PPU Enable Channel 0 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x00 21. " PPE21 ,Port PPU Enable Channel 0 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x00 20. " PPE20 ,Port PPU Enable Channel 0 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x00 19. " PPE19 ,Port PPU Enable Channel 0 Pin 19" "Disabled,Enabled"
|
|
bitfld.quad 0x00 18. " PPE18 ,Port PPU Enable Channel 0 Pin 18" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x00 17. " PPE17 ,Port PPU Enable Channel 0 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x00 16. " PPE16 ,Port PPU Enable Channel 0 Pin 16" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x00 15. " PPE15 ,Port PPU Enable Channel 0 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x00 14. " PPE14 ,Port PPU Enable Channel 0 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x00 13. " PPE13 ,Port PPU Enable Channel 0 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x00 12. " PPE12 ,Port PPU Enable Channel 0 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x00 11. " PPE11 ,Port PPU Enable Channel 0 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x00 10. " PPE10 ,Port PPU Enable Channel 0 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x00 9. " PPE9 ,Port PPU Enable Channel 0 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x00 8. " PPE8 ,Port PPU Enable Channel 0 Pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
sif cpu()!="MB9DF125"
|
|
bitfld.quad 0x00 7. " PPE7 ,Port PPU Enable Channel 0 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x00 6. " PPE6 ,Port PPU Enable Channel 0 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x00 5. " PPE5 ,Port PPU Enable Channel 0 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x00 4. " PPE4 ,Port PPU Enable Channel 0 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x00 3. " PPE3 ,Port PPU Enable Channel 0 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x00 2. " PPE2 ,Port PPU Enable Channel 0 Pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x00 1. " PPE1 ,Port PPU Enable Channel 0 Pin 1" "Disabled,Enabled"
|
|
bitfld.quad 0x00 0. " PPE0 ,Port PPU Enable Channel 0 Pin 0" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
endif
|
|
line.quad 0x08 "GPIO_PPER1,Port PPU Enable Register for Channel 1"
|
|
sif cpu()!="MB9DF125"
|
|
sif cpu()!="MB9EF126"
|
|
sif cpu()!="MB9EF226"
|
|
bitfld.quad 0x08 63. " PPE63 ,Port PPU Enable Channel 1 Pin 63" "Disabled,Enabled"
|
|
endif
|
|
bitfld.quad 0x08 62. " PPE62 ,Port PPU Enable Channel 1 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x08 61. " PPE61 ,Port PPU Enable Channel 1 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x08 60. " PPE60 ,Port PPU Enable Channel 1 Pin 60" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x08 59. " PPE59 ,Port PPU Enable Channel 1 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x08 58. " PPE58 ,Port PPU Enable Channel 1 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x08 57. " PPE57 ,Port PPU Enable Channel 1 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x08 56. " PPE56 ,Port PPU Enable Channel 1 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x08 55. " PPE55 ,Port PPU Enable Channel 1 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x08 54. " PPE54 ,Port PPU Enable Channel 1 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x08 53. " PPE53 ,Port PPU Enable Channel 1 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x08 52. " PPE52 ,Port PPU Enable Channel 1 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x08 51. " PPE51 ,Port PPU Enable Channel 1 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x08 50. " PPE50 ,Port PPU Enable Channel 1 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x08 49. " PPE49 ,Port PPU Enable Channel 1 Pin 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x08 48. " PPE48 ,Port PPU Enable Channel 1 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x08 47. " PPE47 ,Port PPU Enable Channel 1 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x08 46. " PPE46 ,Port PPU Enable Channel 1 Pin 46" "Disabled,Enabled"
|
|
bitfld.quad 0x08 45. " PPE45 ,Port PPU Enable Channel 1 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x08 44. " PPE44 ,Port PPU Enable Channel 1 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x08 43. " PPE43 ,Port PPU Enable Channel 1 Pin 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x08 42. " PPE42 ,Port PPU Enable Channel 1 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x08 41. " PPE41 ,Port PPU Enable Channel 1 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x08 40. " PPE40 ,Port PPU Enable Channel 1 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x08 39. " PPE39 ,Port PPU Enable Channel 1 Pin 39" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif cpu()!="MB9DF126"
|
|
bitfld.quad 0x08 38. " PPE38 ,Port PPU Enable Channel 1 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x08 37. " PPE37 ,Port PPU Enable Channel 1 Pin 37" "Disabled,Enabled"
|
|
bitfld.quad 0x08 36. " PPE36 ,Port PPU Enable Channel 1 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x08 35. " PPE35 ,Port PPU Enable Channel 1 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x08 34. " PPE34 ,Port PPU Enable Channel 1 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x08 33. " PPE33 ,Port PPU Enable Channel 1 Pin 33" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x08 32. " PPE32 ,Port PPU Enable Channel 1 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x08 31. " PPE31 ,Port PPU Enable Channel 1 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x08 30. " PPE30 ,Port PPU Enable Channel 1 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x08 29. " PPE29 ,Port PPU Enable Channel 1 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x08 28. " PPE28 ,Port PPU Enable Channel 1 Pin 28" "Disabled,Enabled"
|
|
bitfld.quad 0x08 27. " PPE27 ,Port PPU Enable Channel 1 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x08 26. " PPE26 ,Port PPU Enable Channel 1 Pin 26" "Disabled,Enabled"
|
|
textline " "
|
|
sif cpu()!="MB9EF226"
|
|
bitfld.quad 0x08 25. " PPE25 ,Port PPU Enable Channel 1 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x08 24. " PPE24 ,Port PPU Enable Channel 1 Pin 24" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x08 23. " PPE23 ,Port PPU Enable Channel 1 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x08 22. " PPE22 ,Port PPU Enable Channel 1 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x08 21. " PPE21 ,Port PPU Enable Channel 1 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x08 20. " PPE20 ,Port PPU Enable Channel 1 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x08 19. " PPE19 ,Port PPU Enable Channel 1 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x08 18. " PPE18 ,Port PPU Enable Channel 1 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x08 17. " PPE17 ,Port PPU Enable Channel 1 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x08 16. " PPE16 ,Port PPU Enable Channel 1 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x08 15. " PPE15 ,Port PPU Enable Channel 1 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x08 14. " PPE14 ,Port PPU Enable Channel 1 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x08 13. " PPE13 ,Port PPU Enable Channel 1 Pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x08 12. " PPE12 ,Port PPU Enable Channel 1 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x08 11. " PPE11 ,Port PPU Enable Channel 1 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x08 10. " PPE10 ,Port PPU Enable Channel 1 Pin 10" "Disabled,Enabled"
|
|
bitfld.quad 0x08 9. " PPE9 ,Port PPU Enable Channel 1 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x08 8. " PPE8 ,Port PPU Enable Channel 1 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x08 7. " PPE7 ,Port PPU Enable Channel 1 Pin 7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x08 6. " PPE6 ,Port PPU Enable Channel 1 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x08 5. " PPE5 ,Port PPU Enable Channel 1 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x08 4. " PPE4 ,Port PPU Enable Channel 1 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x08 3. " PPE3 ,Port PPU Enable Channel 1 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x08 2. " PPE2 ,Port PPU Enable Channel 1 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x08 1. " PPE1 ,Port PPU Enable Channel 1 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x08 0. " PPE0 ,Port PPU Enable Channel 1 Pin 0" "Disabled,Enabled"
|
|
endif
|
|
line.quad 0x10 "GPIO_PPER2,Port PPU Enable Register for Channel 2"
|
|
sif cpu()!="MB9EF126"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
sif cpu()!="MB9EF226"
|
|
bitfld.quad 0x10 63. " PPE63 ,Port PPU Enable Channel 2 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x10 62. " PPE62 ,Port PPU Enable Channel 2 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x10 61. " PPE61 ,Port PPU Enable Channel 2 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x10 60. " PPE60 ,Port PPU Enable Channel 2 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x10 59. " PPE59 ,Port PPU Enable Channel 2 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x10 58. " PPE58 ,Port PPU Enable Channel 2 Pin 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x10 57. " PPE57 ,Port PPU Enable Channel 2 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x10 56. " PPE56 ,Port PPU Enable Channel 2 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x10 55. " PPE55 ,Port PPU Enable Channel 2 Pin 55" "Disabled,Enabled"
|
|
bitfld.quad 0x10 54. " PPE54 ,Port PPU Enable Channel 2 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x10 53. " PPE53 ,Port PPU Enable Channel 2 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x10 52. " PPE52 ,Port PPU Enable Channel 2 Pin 52" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x10 51. " PPE51 ,Port PPU Enable Channel 2 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x10 50. " PPE50 ,Port PPU Enable Channel 2 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x10 49. " PPE49 ,Port PPU Enable Channel 2 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x10 48. " PPE48 ,Port PPU Enable Channel 2 Pin 48" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif cpu()!="MB9EF226"
|
|
bitfld.quad 0x10 47. " PPE47 ,Port PPU Enable Channel 2 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x10 46. " PPE46 ,Port PPU Enable Channel 2 Pin 46" "Disabled,Enabled"
|
|
bitfld.quad 0x10 45. " PPE45 ,Port PPU Enable Channel 2 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x10 44. " PPE44 ,Port PPU Enable Channel 2 Pin 44" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x10 43. " PPE43 ,Port PPU Enable Channel 2 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x10 42. " PPE42 ,Port PPU Enable Channel 2 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x10 41. " PPE41 ,Port PPU Enable Channel 2 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x10 40. " PPE40 ,Port PPU Enable Channel 2 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x10 39. " PPE39 ,Port PPU Enable Channel 2 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x10 38. " PPE38 ,Port PPU Enable Channel 2 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x10 37. " PPE37 ,Port PPU Enable Channel 2 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x10 36. " PPE36 ,Port PPU Enable Channel 2 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x10 35. " PPE35 ,Port PPU Enable Channel 2 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x10 34. " PPE34 ,Port PPU Enable Channel 2 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x10 33. " PPE33 ,Port PPU Enable Channel 2 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x10 32. " PPE32 ,Port PPU Enable Channel 2 Pin 32" "Disabled,Enabled"
|
|
textline " "
|
|
sif cpu()!="MB9DF125"
|
|
sif cpu()!="MB9DF126"
|
|
sif cpu()!="MB9EF226"
|
|
bitfld.quad 0x10 31. " PPE31 ,Port PPU Enable Channel 2 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x10 30. " PPE30 ,Port PPU Enable Channel 2 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x10 29. " PPE29 ,Port PPU Enable Channel 2 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x10 28. " PPE28 ,Port PPU Enable Channel 2 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x10 27. " PPE27 ,Port PPU Enable Channel 2 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x10 26. " PPE26 ,Port PPU Enable Channel 2 Pin 26" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
bitfld.quad 0x10 25. " PPE25 ,Port PPU Enable Channel 2 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x10 24. " PPE24 ,Port PPU Enable Channel 2 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x10 23. " PPE23 ,Port PPU Enable Channel 2 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x10 22. " PPE22 ,Port PPU Enable Channel 2 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x10 21. " PPE21 ,Port PPU Enable Channel 2 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x10 20. " PPE20 ,Port PPU Enable Channel 2 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x10 19. " PPE19 ,Port PPU Enable Channel 2 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x10 18. " PPE18 ,Port PPU Enable Channel 2 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x10 17. " PPE17 ,Port PPU Enable Channel 2 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x10 16. " PPE16 ,Port PPU Enable Channel 2 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x10 15. " PPE15 ,Port PPU Enable Channel 2 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x10 14. " PPE14 ,Port PPU Enable Channel 2 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x10 13. " PPE13 ,Port PPU Enable Channel 2 Pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x10 12. " PPE12 ,Port PPU Enable Channel 2 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x10 11. " PPE11 ,Port PPU Enable Channel 2 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x10 10. " PPE10 ,Port PPU Enable Channel 2 Pin 10" "Disabled,Enabled"
|
|
bitfld.quad 0x10 9. " PPE9 ,Port PPU Enable Channel 2 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x10 8. " PPE8 ,Port PPU Enable Channel 2 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x10 7. " PPE7 ,Port PPU Enable Channel 2 Pin 7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x10 6. " PPE6 ,Port PPU Enable Channel 2 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x10 5. " PPE5 ,Port PPU Enable Channel 2 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x10 4. " PPE4 ,Port PPU Enable Channel 2 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x10 3. " PPE3 ,Port PPU Enable Channel 2 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x10 2. " PPE2 ,Port PPU Enable Channel 2 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x10 1. " PPE1 ,Port PPU Enable Channel 2 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x10 0. " PPE0 ,Port PPU Enable Channel 2 Pin 0" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126")
|
|
line.quad 0x18 "GPIO_PPER3,Port PPU Enable Register for Channel 3"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
bitfld.quad 0x18 63. " PPE63 ,Port PPU Enable Channel 3 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x18 62. " PPE62 ,Port PPU Enable Channel 3 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x18 61. " PPE61 ,Port PPU Enable Channel 3 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x18 60. " PPE60 ,Port PPU Enable Channel 3 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x18 59. " PPE59 ,Port PPU Enable Channel 3 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x18 58. " PPE58 ,Port PPU Enable Channel 3 Pin 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x18 57. " PPE57 ,Port PPU Enable Channel 3 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x18 56. " PPE56 ,Port PPU Enable Channel 3 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x18 55. " PPE55 ,Port PPU Enable Channel 3 Pin 55" "Disabled,Enabled"
|
|
bitfld.quad 0x18 54. " PPE54 ,Port PPU Enable Channel 3 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x18 53. " PPE53 ,Port PPU Enable Channel 3 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x18 52. " PPE52 ,Port PPU Enable Channel 3 Pin 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x18 51. " PPE51 ,Port PPU Enable Channel 3 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x18 50. " PPE50 ,Port PPU Enable Channel 3 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x18 49. " PPE49 ,Port PPU Enable Channel 3 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x18 48. " PPE48 ,Port PPU Enable Channel 3 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x18 47. " PPE47 ,Port PPU Enable Channel 3 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x18 46. " PPE46 ,Port PPU Enable Channel 3 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x18 45. " PPE45 ,Port PPU Enable Channel 3 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x18 44. " PPE44 ,Port PPU Enable Channel 3 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x18 43. " PPE43 ,Port PPU Enable Channel 3 Pin 43" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.quad 0x18 42. " PPE42 ,Port PPU Enable Channel 3 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x18 41. " PPE41 ,Port PPU Enable Channel 3 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x18 40. " PPE40 ,Port PPU Enable Channel 3 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x18 39. " PPE39 ,Port PPU Enable Channel 3 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x18 38. " PPE38 ,Port PPU Enable Channel 3 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x18 37. " PPE37 ,Port PPU Enable Channel 3 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x18 36. " PPE36 ,Port PPU Enable Channel 3 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x18 35. " PPE35 ,Port PPU Enable Channel 3 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x18 34. " PPE34 ,Port PPU Enable Channel 3 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x18 33. " PPE33 ,Port PPU Enable Channel 3 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x18 32. " PPE32 ,Port PPU Enable Channel 3 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x18 31. " PPE31 ,Port PPU Enable Channel 3 Pin 31" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x18 30. " PPE30 ,Port PPU Enable Channel 3 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x18 29. " PPE29 ,Port PPU Enable Channel 3 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x18 28. " PPE28 ,Port PPU Enable Channel 3 Pin 28" "Disabled,Enabled"
|
|
bitfld.quad 0x18 27. " PPE27 ,Port PPU Enable Channel 3 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x18 26. " PPE26 ,Port PPU Enable Channel 3 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x18 25. " PPE25 ,Port PPU Enable Channel 3 Pin 25" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x18 24. " PPE24 ,Port PPU Enable Channel 3 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x18 23. " PPE23 ,Port PPU Enable Channel 3 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x18 22. " PPE22 ,Port PPU Enable Channel 3 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x18 21. " PPE21 ,Port PPU Enable Channel 3 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x18 20. " PPE20 ,Port PPU Enable Channel 3 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x18 19. " PPE19 ,Port PPU Enable Channel 3 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x18 18. " PPE18 ,Port PPU Enable Channel 3 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x18 17. " PPE17 ,Port PPU Enable Channel 3 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x18 16. " PPE16 ,Port PPU Enable Channel 3 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x18 15. " PPE15 ,Port PPU Enable Channel 3 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x18 14. " PPE14 ,Port PPU Enable Channel 3 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x18 13. " PPE13 ,Port PPU Enable Channel 3 Pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x18 12. " PPE12 ,Port PPU Enable Channel 3 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x18 11. " PPE11 ,Port PPU Enable Channel 3 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x18 10. " PPE10 ,Port PPU Enable Channel 3 Pin 10" "Disabled,Enabled"
|
|
bitfld.quad 0x18 9. " PPE9 ,Port PPU Enable Channel 3 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x18 8. " PPE8 ,Port PPU Enable Channel 3 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x18 7. " PPE7 ,Port PPU Enable Channel 3 Pin 7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x18 6. " PPE6 ,Port PPU Enable Channel 3 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x18 5. " PPE5 ,Port PPU Enable Channel 3 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x18 4. " PPE4 ,Port PPU Enable Channel 3 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x18 3. " PPE3 ,Port PPU Enable Channel 3 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x18 2. " PPE2 ,Port PPU Enable Channel 3 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x18 1. " PPE1 ,Port PPU Enable Channel 3 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x18 0. " PPE0 ,Port PPU Enable Channel 3 Pin 0" "Disabled,Enabled"
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
line.quad 0x20 "GPIO_PPER4,Port PPU Enable Register for Channel 4"
|
|
bitfld.quad 0x20 63. " PPE63 ,Port PPU Enable Channel 4 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x20 62. " PPE62 ,Port PPU Enable Channel 4 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x20 61. " PPE61 ,Port PPU Enable Channel 4 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x20 60. " PPE60 ,Port PPU Enable Channel 4 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x20 59. " PPE59 ,Port PPU Enable Channel 4 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x20 58. " PPE58 ,Port PPU Enable Channel 4 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x20 57. " PPE57 ,Port PPU Enable Channel 4 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x20 56. " PPE56 ,Port PPU Enable Channel 4 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x20 55. " PPE55 ,Port PPU Enable Channel 4 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x20 54. " PPE54 ,Port PPU Enable Channel 4 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x20 53. " PPE53 ,Port PPU Enable Channel 4 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x20 52. " PPE52 ,Port PPU Enable Channel 4 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x20 51. " PPE51 ,Port PPU Enable Channel 4 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x20 50. " PPE50 ,Port PPU Enable Channel 4 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x20 49. " PPE49 ,Port PPU Enable Channel 4 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x20 48. " PPE48 ,Port PPU Enable Channel 4 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x20 47. " PPE47 ,Port PPU Enable Channel 4 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x20 46. " PPE46 ,Port PPU Enable Channel 4 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x20 45. " PPE45 ,Port PPU Enable Channel 4 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x20 44. " PPE44 ,Port PPU Enable Channel 4 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x20 43. " PPE43 ,Port PPU Enable Channel 4 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x20 42. " PPE42 ,Port PPU Enable Channel 4 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x20 41. " PPE41 ,Port PPU Enable Channel 4 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x20 40. " PPE40 ,Port PPU Enable Channel 4 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x20 39. " PPE39 ,Port PPU Enable Channel 4 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x20 38. " PPE38 ,Port PPU Enable Channel 4 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x20 37. " PPE37 ,Port PPU Enable Channel 4 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x20 36. " PPE36 ,Port PPU Enable Channel 4 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x20 35. " PPE35 ,Port PPU Enable Channel 4 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x20 34. " PPE34 ,Port PPU Enable Channel 4 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x20 33. " PPE33 ,Port PPU Enable Channel 4 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x20 32. " PPE32 ,Port PPU Enable Channel 4 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x20 31. " PPE31 ,Port PPU Enable Channel 4 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x20 30. " PPE30 ,Port PPU Enable Channel 4 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x20 29. " PPE29 ,Port PPU Enable Channel 4 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x20 28. " PPE28 ,Port PPU Enable Channel 4 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x20 27. " PPE27 ,Port PPU Enable Channel 4 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x20 26. " PPE26 ,Port PPU Enable Channel 4 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x20 25. " PPE25 ,Port PPU Enable Channel 4 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x20 24. " PPE24 ,Port PPU Enable Channel 4 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x20 23. " PPE23 ,Port PPU Enable Channel 4 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x20 22. " PPE22 ,Port PPU Enable Channel 4 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x20 21. " PPE21 ,Port PPU Enable Channel 4 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x20 20. " PPE20 ,Port PPU Enable Channel 4 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x20 19. " PPE19 ,Port PPU Enable Channel 4 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x20 18. " PPE18 ,Port PPU Enable Channel 4 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x20 17. " PPE17 ,Port PPU Enable Channel 4 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x20 16. " PPE16 ,Port PPU Enable Channel 4 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x20 15. " PPE15 ,Port PPU Enable Channel 4 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x20 14. " PPE14 ,Port PPU Enable Channel 4 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x20 13. " PPE13 ,Port PPU Enable Channel 4 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x20 12. " PPE12 ,Port PPU Enable Channel 4 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x20 11. " PPE11 ,Port PPU Enable Channel 4 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x20 10. " PPE10 ,Port PPU Enable Channel 4 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x20 9. " PPE9 ,Port PPU Enable Channel 4 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x20 8. " PPE8 ,Port PPU Enable Channel 4 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x20 7. " PPE7 ,Port PPU Enable Channel 4 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x20 6. " PPE6 ,Port PPU Enable Channel 4 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x20 5. " PPE5 ,Port PPU Enable Channel 4 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x20 4. " PPE4 ,Port PPU Enable Channel 4 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x20 3. " PPE3 ,Port PPU Enable Channel 4 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x20 2. " PPE2 ,Port PPU Enable Channel 4 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x20 1. " PPE1 ,Port PPU Enable Channel 4 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x20 0. " PPE0 ,Port PPU Enable Channel 4 Pin 0" "Disabled,Enabled"
|
|
line.quad 0x28 "GPIO_PPER5,Port PPU Enable Register for Channel 5"
|
|
bitfld.quad 0x28 63. " PPE63 ,Port PPU Enable Channel 5 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x28 62. " PPE62 ,Port PPU Enable Channel 5 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x28 61. " PPE61 ,Port PPU Enable Channel 5 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x28 60. " PPE60 ,Port PPU Enable Channel 5 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x28 59. " PPE59 ,Port PPU Enable Channel 5 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x28 58. " PPE58 ,Port PPU Enable Channel 5 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x28 57. " PPE57 ,Port PPU Enable Channel 5 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x28 56. " PPE56 ,Port PPU Enable Channel 5 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x28 55. " PPE55 ,Port PPU Enable Channel 5 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x28 54. " PPE54 ,Port PPU Enable Channel 5 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x28 53. " PPE53 ,Port PPU Enable Channel 5 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x28 52. " PPE52 ,Port PPU Enable Channel 5 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x28 51. " PPE51 ,Port PPU Enable Channel 5 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x28 50. " PPE50 ,Port PPU Enable Channel 5 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x28 49. " PPE49 ,Port PPU Enable Channel 5 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x28 48. " PPE48 ,Port PPU Enable Channel 5 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x28 47. " PPE47 ,Port PPU Enable Channel 5 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x28 46. " PPE46 ,Port PPU Enable Channel 5 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x28 45. " PPE45 ,Port PPU Enable Channel 5 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x28 44. " PPE44 ,Port PPU Enable Channel 5 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x28 43. " PPE43 ,Port PPU Enable Channel 5 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x28 42. " PPE42 ,Port PPU Enable Channel 5 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x28 41. " PPE41 ,Port PPU Enable Channel 5 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x28 40. " PPE40 ,Port PPU Enable Channel 5 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x28 39. " PPE39 ,Port PPU Enable Channel 5 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x28 38. " PPE38 ,Port PPU Enable Channel 5 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x28 37. " PPE37 ,Port PPU Enable Channel 5 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x28 36. " PPE36 ,Port PPU Enable Channel 5 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x28 35. " PPE35 ,Port PPU Enable Channel 5 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x28 34. " PPE34 ,Port PPU Enable Channel 5 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x28 33. " PPE33 ,Port PPU Enable Channel 5 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x28 32. " PPE32 ,Port PPU Enable Channel 5 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x28 31. " PPE31 ,Port PPU Enable Channel 5 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x28 30. " PPE30 ,Port PPU Enable Channel 5 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x28 29. " PPE29 ,Port PPU Enable Channel 5 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x28 28. " PPE28 ,Port PPU Enable Channel 5 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x28 27. " PPE27 ,Port PPU Enable Channel 5 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x28 26. " PPE26 ,Port PPU Enable Channel 5 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x28 25. " PPE25 ,Port PPU Enable Channel 5 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x28 24. " PPE24 ,Port PPU Enable Channel 5 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x28 23. " PPE23 ,Port PPU Enable Channel 5 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x28 22. " PPE22 ,Port PPU Enable Channel 5 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x28 21. " PPE21 ,Port PPU Enable Channel 5 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x28 20. " PPE20 ,Port PPU Enable Channel 5 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x28 19. " PPE19 ,Port PPU Enable Channel 5 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x28 18. " PPE18 ,Port PPU Enable Channel 5 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x28 17. " PPE17 ,Port PPU Enable Channel 5 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x28 16. " PPE16 ,Port PPU Enable Channel 5 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x28 15. " PPE15 ,Port PPU Enable Channel 5 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x28 14. " PPE14 ,Port PPU Enable Channel 5 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x28 13. " PPE13 ,Port PPU Enable Channel 5 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x28 12. " PPE12 ,Port PPU Enable Channel 5 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x28 11. " PPE11 ,Port PPU Enable Channel 5 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x28 10. " PPE10 ,Port PPU Enable Channel 5 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x28 9. " PPE9 ,Port PPU Enable Channel 5 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x28 8. " PPE8 ,Port PPU Enable Channel 5 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x28 7. " PPE7 ,Port PPU Enable Channel 5 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x28 6. " PPE6 ,Port PPU Enable Channel 5 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x28 5. " PPE5 ,Port PPU Enable Channel 5 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x28 4. " PPE4 ,Port PPU Enable Channel 5 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x28 3. " PPE3 ,Port PPU Enable Channel 5 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x28 2. " PPE2 ,Port PPU Enable Channel 5 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x28 1. " PPE1 ,Port PPU Enable Channel 5 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x28 0. " PPE0 ,Port PPU Enable Channel 5 Pin 0" "Disabled,Enabled"
|
|
line.quad 0x30 "GPIO_PPER6,Port PPU Enable Register for Channel 6"
|
|
bitfld.quad 0x30 63. " PPE63 ,Port PPU Enable Channel 6 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x30 62. " PPE62 ,Port PPU Enable Channel 6 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x30 61. " PPE61 ,Port PPU Enable Channel 6 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x30 60. " PPE60 ,Port PPU Enable Channel 6 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x30 59. " PPE59 ,Port PPU Enable Channel 6 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x30 58. " PPE58 ,Port PPU Enable Channel 6 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x30 57. " PPE57 ,Port PPU Enable Channel 6 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x30 56. " PPE56 ,Port PPU Enable Channel 6 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x30 55. " PPE55 ,Port PPU Enable Channel 6 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x30 54. " PPE54 ,Port PPU Enable Channel 6 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x30 53. " PPE53 ,Port PPU Enable Channel 6 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x30 52. " PPE52 ,Port PPU Enable Channel 6 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x30 51. " PPE51 ,Port PPU Enable Channel 6 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x30 50. " PPE50 ,Port PPU Enable Channel 6 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x30 49. " PPE49 ,Port PPU Enable Channel 6 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x30 48. " PPE48 ,Port PPU Enable Channel 6 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x30 47. " PPE47 ,Port PPU Enable Channel 6 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x30 46. " PPE46 ,Port PPU Enable Channel 6 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x30 45. " PPE45 ,Port PPU Enable Channel 6 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x30 44. " PPE44 ,Port PPU Enable Channel 6 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x30 43. " PPE43 ,Port PPU Enable Channel 6 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x30 42. " PPE42 ,Port PPU Enable Channel 6 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x30 41. " PPE41 ,Port PPU Enable Channel 6 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x30 40. " PPE40 ,Port PPU Enable Channel 6 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x30 39. " PPE39 ,Port PPU Enable Channel 6 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x30 38. " PPE38 ,Port PPU Enable Channel 6 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x30 37. " PPE37 ,Port PPU Enable Channel 6 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x30 36. " PPE36 ,Port PPU Enable Channel 6 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x30 35. " PPE35 ,Port PPU Enable Channel 6 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x30 34. " PPE34 ,Port PPU Enable Channel 6 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x30 33. " PPE33 ,Port PPU Enable Channel 6 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x30 32. " PPE32 ,Port PPU Enable Channel 6 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x30 31. " PPE31 ,Port PPU Enable Channel 6 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x30 30. " PPE30 ,Port PPU Enable Channel 6 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x30 29. " PPE29 ,Port PPU Enable Channel 6 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x30 28. " PPE28 ,Port PPU Enable Channel 6 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x30 27. " PPE27 ,Port PPU Enable Channel 6 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x30 26. " PPE26 ,Port PPU Enable Channel 6 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x30 25. " PPE25 ,Port PPU Enable Channel 6 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x30 24. " PPE24 ,Port PPU Enable Channel 6 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x30 23. " PPE23 ,Port PPU Enable Channel 6 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x30 22. " PPE22 ,Port PPU Enable Channel 6 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x30 21. " PPE21 ,Port PPU Enable Channel 6 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x30 20. " PPE20 ,Port PPU Enable Channel 6 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x30 19. " PPE19 ,Port PPU Enable Channel 6 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x30 18. " PPE18 ,Port PPU Enable Channel 6 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x30 17. " PPE17 ,Port PPU Enable Channel 6 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x30 16. " PPE16 ,Port PPU Enable Channel 6 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x30 15. " PPE15 ,Port PPU Enable Channel 6 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x30 14. " PPE14 ,Port PPU Enable Channel 6 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x30 13. " PPE13 ,Port PPU Enable Channel 6 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x30 12. " PPE12 ,Port PPU Enable Channel 6 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x30 11. " PPE11 ,Port PPU Enable Channel 6 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x30 10. " PPE10 ,Port PPU Enable Channel 6 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x30 9. " PPE9 ,Port PPU Enable Channel 6 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x30 8. " PPE8 ,Port PPU Enable Channel 6 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x30 7. " PPE7 ,Port PPU Enable Channel 6 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x30 6. " PPE6 ,Port PPU Enable Channel 6 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x30 5. " PPE5 ,Port PPU Enable Channel 6 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x30 4. " PPE4 ,Port PPU Enable Channel 6 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x30 3. " PPE3 ,Port PPU Enable Channel 6 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x30 2. " PPE2 ,Port PPU Enable Channel 6 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x30 1. " PPE1 ,Port PPU Enable Channel 6 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x30 0. " PPE0 ,Port PPU Enable Channel 6 Pin 0" "Disabled,Enabled"
|
|
line.quad 0x38 "GPIO_PPER7,Port PPU Enable Register for Channel 7"
|
|
bitfld.quad 0x38 63. " PPE63 ,Port PPU Enable Channel 7 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x38 62. " PPE62 ,Port PPU Enable Channel 7 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x38 61. " PPE61 ,Port PPU Enable Channel 7 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x38 60. " PPE60 ,Port PPU Enable Channel 7 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x38 59. " PPE59 ,Port PPU Enable Channel 7 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x38 58. " PPE58 ,Port PPU Enable Channel 7 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x38 57. " PPE57 ,Port PPU Enable Channel 7 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x38 56. " PPE56 ,Port PPU Enable Channel 7 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x38 55. " PPE55 ,Port PPU Enable Channel 7 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x38 54. " PPE54 ,Port PPU Enable Channel 7 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x38 53. " PPE53 ,Port PPU Enable Channel 7 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x38 52. " PPE52 ,Port PPU Enable Channel 7 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x38 51. " PPE51 ,Port PPU Enable Channel 7 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x38 50. " PPE50 ,Port PPU Enable Channel 7 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x38 49. " PPE49 ,Port PPU Enable Channel 7 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x38 48. " PPE48 ,Port PPU Enable Channel 7 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x38 47. " PPE47 ,Port PPU Enable Channel 7 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x38 46. " PPE46 ,Port PPU Enable Channel 7 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x38 45. " PPE45 ,Port PPU Enable Channel 7 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x38 44. " PPE44 ,Port PPU Enable Channel 7 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x38 43. " PPE43 ,Port PPU Enable Channel 7 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x38 42. " PPE42 ,Port PPU Enable Channel 7 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x38 41. " PPE41 ,Port PPU Enable Channel 7 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x38 40. " PPE40 ,Port PPU Enable Channel 7 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x38 39. " PPE39 ,Port PPU Enable Channel 7 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x38 38. " PPE38 ,Port PPU Enable Channel 7 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x38 37. " PPE37 ,Port PPU Enable Channel 7 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x38 36. " PPE36 ,Port PPU Enable Channel 7 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x38 35. " PPE35 ,Port PPU Enable Channel 7 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x38 34. " PPE34 ,Port PPU Enable Channel 7 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x38 33. " PPE33 ,Port PPU Enable Channel 7 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x38 32. " PPE32 ,Port PPU Enable Channel 7 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x38 31. " PPE31 ,Port PPU Enable Channel 7 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x38 30. " PPE30 ,Port PPU Enable Channel 7 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x38 29. " PPE29 ,Port PPU Enable Channel 7 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x38 28. " PPE28 ,Port PPU Enable Channel 7 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x38 27. " PPE27 ,Port PPU Enable Channel 7 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x38 26. " PPE26 ,Port PPU Enable Channel 7 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x38 25. " PPE25 ,Port PPU Enable Channel 7 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x38 24. " PPE24 ,Port PPU Enable Channel 7 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x38 23. " PPE23 ,Port PPU Enable Channel 7 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x38 22. " PPE22 ,Port PPU Enable Channel 7 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x38 21. " PPE21 ,Port PPU Enable Channel 7 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x38 20. " PPE20 ,Port PPU Enable Channel 7 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x38 19. " PPE19 ,Port PPU Enable Channel 7 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x38 18. " PPE18 ,Port PPU Enable Channel 7 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x38 17. " PPE17 ,Port PPU Enable Channel 7 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x38 16. " PPE16 ,Port PPU Enable Channel 7 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x38 15. " PPE15 ,Port PPU Enable Channel 7 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x38 14. " PPE14 ,Port PPU Enable Channel 7 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x38 13. " PPE13 ,Port PPU Enable Channel 7 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x38 12. " PPE12 ,Port PPU Enable Channel 7 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x38 11. " PPE11 ,Port PPU Enable Channel 7 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x38 10. " PPE10 ,Port PPU Enable Channel 7 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x38 9. " PPE9 ,Port PPU Enable Channel 7 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x38 8. " PPE8 ,Port PPU Enable Channel 7 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x38 7. " PPE7 ,Port PPU Enable Channel 7 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x38 6. " PPE6 ,Port PPU Enable Channel 7 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x38 5. " PPE5 ,Port PPU Enable Channel 7 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x38 4. " PPE4 ,Port PPU Enable Channel 7 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x38 3. " PPE3 ,Port PPU Enable Channel 7 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x38 2. " PPE2 ,Port PPU Enable Channel 7 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x38 1. " PPE1 ,Port PPU Enable Channel 7 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x38 0. " PPE0 ,Port PPU Enable Channel 7 Pin 0" "Disabled,Enabled"
|
|
line.quad 0x40 "GPIO_PPER8,Port PPU Enable Register for Channel 8"
|
|
bitfld.quad 0x40 63. " PPE63 ,Port PPU Enable Channel 8 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x40 62. " PPE62 ,Port PPU Enable Channel 8 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x40 61. " PPE61 ,Port PPU Enable Channel 8 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x40 60. " PPE60 ,Port PPU Enable Channel 8 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x40 59. " PPE59 ,Port PPU Enable Channel 8 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x40 58. " PPE58 ,Port PPU Enable Channel 8 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x40 57. " PPE57 ,Port PPU Enable Channel 8 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x40 56. " PPE56 ,Port PPU Enable Channel 8 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x40 55. " PPE55 ,Port PPU Enable Channel 8 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x40 54. " PPE54 ,Port PPU Enable Channel 8 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x40 53. " PPE53 ,Port PPU Enable Channel 8 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x40 52. " PPE52 ,Port PPU Enable Channel 8 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x40 51. " PPE51 ,Port PPU Enable Channel 8 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x40 50. " PPE50 ,Port PPU Enable Channel 8 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x40 49. " PPE49 ,Port PPU Enable Channel 8 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x40 48. " PPE48 ,Port PPU Enable Channel 8 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x40 47. " PPE47 ,Port PPU Enable Channel 8 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x40 46. " PPE46 ,Port PPU Enable Channel 8 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x40 45. " PPE45 ,Port PPU Enable Channel 8 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x40 44. " PPE44 ,Port PPU Enable Channel 8 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x40 43. " PPE43 ,Port PPU Enable Channel 8 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x40 42. " PPE42 ,Port PPU Enable Channel 8 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x40 41. " PPE41 ,Port PPU Enable Channel 8 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x40 40. " PPE40 ,Port PPU Enable Channel 8 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x40 39. " PPE39 ,Port PPU Enable Channel 8 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x40 38. " PPE38 ,Port PPU Enable Channel 8 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x40 37. " PPE37 ,Port PPU Enable Channel 8 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x40 36. " PPE36 ,Port PPU Enable Channel 8 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x40 35. " PPE35 ,Port PPU Enable Channel 8 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x40 34. " PPE34 ,Port PPU Enable Channel 8 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x40 33. " PPE33 ,Port PPU Enable Channel 8 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x40 32. " PPE32 ,Port PPU Enable Channel 8 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x40 31. " PPE31 ,Port PPU Enable Channel 8 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x40 30. " PPE30 ,Port PPU Enable Channel 8 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x40 29. " PPE29 ,Port PPU Enable Channel 8 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x40 28. " PPE28 ,Port PPU Enable Channel 8 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x40 27. " PPE27 ,Port PPU Enable Channel 8 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x40 26. " PPE26 ,Port PPU Enable Channel 8 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x40 25. " PPE25 ,Port PPU Enable Channel 8 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x40 24. " PPE24 ,Port PPU Enable Channel 8 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x40 23. " PPE23 ,Port PPU Enable Channel 8 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x40 22. " PPE22 ,Port PPU Enable Channel 8 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x40 21. " PPE21 ,Port PPU Enable Channel 8 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x40 20. " PPE20 ,Port PPU Enable Channel 8 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x40 19. " PPE19 ,Port PPU Enable Channel 8 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x40 18. " PPE18 ,Port PPU Enable Channel 8 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x40 17. " PPE17 ,Port PPU Enable Channel 8 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x40 16. " PPE16 ,Port PPU Enable Channel 8 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x40 15. " PPE15 ,Port PPU Enable Channel 8 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x40 14. " PPE14 ,Port PPU Enable Channel 8 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x40 13. " PPE13 ,Port PPU Enable Channel 8 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x40 12. " PPE12 ,Port PPU Enable Channel 8 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x40 11. " PPE11 ,Port PPU Enable Channel 8 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x40 10. " PPE10 ,Port PPU Enable Channel 8 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x40 9. " PPE9 ,Port PPU Enable Channel 8 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x40 8. " PPE8 ,Port PPU Enable Channel 8 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x40 7. " PPE7 ,Port PPU Enable Channel 8 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x40 6. " PPE6 ,Port PPU Enable Channel 8 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x40 5. " PPE5 ,Port PPU Enable Channel 8 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x40 4. " PPE4 ,Port PPU Enable Channel 8 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x40 3. " PPE3 ,Port PPU Enable Channel 8 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x40 2. " PPE2 ,Port PPU Enable Channel 8 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x40 1. " PPE1 ,Port PPU Enable Channel 8 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x40 0. " PPE0 ,Port PPU Enable Channel 8 Pin 0" "Disabled,Enabled"
|
|
line.quad 0x48 "GPIO_PPER9,Port PPU Enable Register for Channel 9"
|
|
bitfld.quad 0x48 63. " PPE63 ,Port PPU Enable Channel 9 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x48 62. " PPE62 ,Port PPU Enable Channel 9 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x48 61. " PPE61 ,Port PPU Enable Channel 9 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x48 60. " PPE60 ,Port PPU Enable Channel 9 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x48 59. " PPE59 ,Port PPU Enable Channel 9 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x48 58. " PPE58 ,Port PPU Enable Channel 9 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x48 57. " PPE57 ,Port PPU Enable Channel 9 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x48 56. " PPE56 ,Port PPU Enable Channel 9 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x48 55. " PPE55 ,Port PPU Enable Channel 9 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x48 54. " PPE54 ,Port PPU Enable Channel 9 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x48 53. " PPE53 ,Port PPU Enable Channel 9 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x48 52. " PPE52 ,Port PPU Enable Channel 9 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x48 51. " PPE51 ,Port PPU Enable Channel 9 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x48 50. " PPE50 ,Port PPU Enable Channel 9 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x48 49. " PPE49 ,Port PPU Enable Channel 9 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x48 48. " PPE48 ,Port PPU Enable Channel 9 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x48 47. " PPE47 ,Port PPU Enable Channel 9 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x48 46. " PPE46 ,Port PPU Enable Channel 9 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x48 45. " PPE45 ,Port PPU Enable Channel 9 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x48 44. " PPE44 ,Port PPU Enable Channel 9 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x48 43. " PPE43 ,Port PPU Enable Channel 9 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x48 42. " PPE42 ,Port PPU Enable Channel 9 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x48 41. " PPE41 ,Port PPU Enable Channel 9 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x48 40. " PPE40 ,Port PPU Enable Channel 9 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x48 39. " PPE39 ,Port PPU Enable Channel 9 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x48 38. " PPE38 ,Port PPU Enable Channel 9 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x48 37. " PPE37 ,Port PPU Enable Channel 9 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x48 36. " PPE36 ,Port PPU Enable Channel 9 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x48 35. " PPE35 ,Port PPU Enable Channel 9 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x48 34. " PPE34 ,Port PPU Enable Channel 9 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x48 33. " PPE33 ,Port PPU Enable Channel 9 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x48 32. " PPE32 ,Port PPU Enable Channel 9 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x48 31. " PPE31 ,Port PPU Enable Channel 9 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x48 30. " PPE30 ,Port PPU Enable Channel 9 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x48 29. " PPE29 ,Port PPU Enable Channel 9 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x48 28. " PPE28 ,Port PPU Enable Channel 9 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x48 27. " PPE27 ,Port PPU Enable Channel 9 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x48 26. " PPE26 ,Port PPU Enable Channel 9 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x48 25. " PPE25 ,Port PPU Enable Channel 9 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x48 24. " PPE24 ,Port PPU Enable Channel 9 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x48 23. " PPE23 ,Port PPU Enable Channel 9 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x48 22. " PPE22 ,Port PPU Enable Channel 9 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x48 21. " PPE21 ,Port PPU Enable Channel 9 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x48 20. " PPE20 ,Port PPU Enable Channel 9 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x48 19. " PPE19 ,Port PPU Enable Channel 9 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x48 18. " PPE18 ,Port PPU Enable Channel 9 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x48 17. " PPE17 ,Port PPU Enable Channel 9 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x48 16. " PPE16 ,Port PPU Enable Channel 9 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x48 15. " PPE15 ,Port PPU Enable Channel 9 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x48 14. " PPE14 ,Port PPU Enable Channel 9 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x48 13. " PPE13 ,Port PPU Enable Channel 9 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x48 12. " PPE12 ,Port PPU Enable Channel 9 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x48 11. " PPE11 ,Port PPU Enable Channel 9 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x48 10. " PPE10 ,Port PPU Enable Channel 9 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x48 9. " PPE9 ,Port PPU Enable Channel 9 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x48 8. " PPE8 ,Port PPU Enable Channel 9 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x48 7. " PPE7 ,Port PPU Enable Channel 9 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x48 6. " PPE6 ,Port PPU Enable Channel 9 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x48 5. " PPE5 ,Port PPU Enable Channel 9 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x48 4. " PPE4 ,Port PPU Enable Channel 9 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x48 3. " PPE3 ,Port PPU Enable Channel 9 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x48 2. " PPE2 ,Port PPU Enable Channel 9 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x48 1. " PPE1 ,Port PPU Enable Channel 9 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x48 0. " PPE0 ,Port PPU Enable Channel 9 Pin 0" "Disabled,Enabled"
|
|
line.quad 0x50 "GPIO_PPER10,Port PPU Enable Register for Channel 10"
|
|
bitfld.quad 0x50 63. " PPE63 ,Port PPU Enable Channel 10 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x50 62. " PPE62 ,Port PPU Enable Channel 10 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x50 61. " PPE61 ,Port PPU Enable Channel 10 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x50 60. " PPE60 ,Port PPU Enable Channel 10 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x50 59. " PPE59 ,Port PPU Enable Channel 10 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x50 58. " PPE58 ,Port PPU Enable Channel 10 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x50 57. " PPE57 ,Port PPU Enable Channel 10 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x50 56. " PPE56 ,Port PPU Enable Channel 10 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x50 55. " PPE55 ,Port PPU Enable Channel 10 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x50 54. " PPE54 ,Port PPU Enable Channel 10 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x50 53. " PPE53 ,Port PPU Enable Channel 10 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x50 52. " PPE52 ,Port PPU Enable Channel 10 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x50 51. " PPE51 ,Port PPU Enable Channel 10 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x50 50. " PPE50 ,Port PPU Enable Channel 10 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x50 49. " PPE49 ,Port PPU Enable Channel 10 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x50 48. " PPE48 ,Port PPU Enable Channel 10 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x50 47. " PPE47 ,Port PPU Enable Channel 10 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x50 46. " PPE46 ,Port PPU Enable Channel 10 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x50 45. " PPE45 ,Port PPU Enable Channel 10 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x50 44. " PPE44 ,Port PPU Enable Channel 10 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x50 43. " PPE43 ,Port PPU Enable Channel 10 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x50 42. " PPE42 ,Port PPU Enable Channel 10 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x50 41. " PPE41 ,Port PPU Enable Channel 10 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x50 40. " PPE40 ,Port PPU Enable Channel 10 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x50 39. " PPE39 ,Port PPU Enable Channel 10 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x50 38. " PPE38 ,Port PPU Enable Channel 10 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x50 37. " PPE37 ,Port PPU Enable Channel 10 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x50 36. " PPE36 ,Port PPU Enable Channel 10 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x50 35. " PPE35 ,Port PPU Enable Channel 10 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x50 34. " PPE34 ,Port PPU Enable Channel 10 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x50 33. " PPE33 ,Port PPU Enable Channel 10 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x50 32. " PPE32 ,Port PPU Enable Channel 10 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x50 31. " PPE31 ,Port PPU Enable Channel 10 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x50 30. " PPE30 ,Port PPU Enable Channel 10 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x50 29. " PPE29 ,Port PPU Enable Channel 10 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x50 28. " PPE28 ,Port PPU Enable Channel 10 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x50 27. " PPE27 ,Port PPU Enable Channel 10 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x50 26. " PPE26 ,Port PPU Enable Channel 10 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x50 25. " PPE25 ,Port PPU Enable Channel 10 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x50 24. " PPE24 ,Port PPU Enable Channel 10 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x50 23. " PPE23 ,Port PPU Enable Channel 10 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x50 22. " PPE22 ,Port PPU Enable Channel 10 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x50 21. " PPE21 ,Port PPU Enable Channel 10 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x50 20. " PPE20 ,Port PPU Enable Channel 10 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x50 19. " PPE19 ,Port PPU Enable Channel 10 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x50 18. " PPE18 ,Port PPU Enable Channel 10 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x50 17. " PPE17 ,Port PPU Enable Channel 10 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x50 16. " PPE16 ,Port PPU Enable Channel 10 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x50 15. " PPE15 ,Port PPU Enable Channel 10 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x50 14. " PPE14 ,Port PPU Enable Channel 10 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x50 13. " PPE13 ,Port PPU Enable Channel 10 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x50 12. " PPE12 ,Port PPU Enable Channel 10 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x50 11. " PPE11 ,Port PPU Enable Channel 10 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x50 10. " PPE10 ,Port PPU Enable Channel 10 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x50 9. " PPE9 ,Port PPU Enable Channel 10 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x50 8. " PPE8 ,Port PPU Enable Channel 10 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x50 7. " PPE7 ,Port PPU Enable Channel 10 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x50 6. " PPE6 ,Port PPU Enable Channel 10 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x50 5. " PPE5 ,Port PPU Enable Channel 10 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x50 4. " PPE4 ,Port PPU Enable Channel 10 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x50 3. " PPE3 ,Port PPU Enable Channel 10 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x50 2. " PPE2 ,Port PPU Enable Channel 10 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x50 1. " PPE1 ,Port PPU Enable Channel 10 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x50 0. " PPE0 ,Port PPU Enable Channel 10 Pin 0" "Disabled,Enabled"
|
|
line.quad 0x58 "GPIO_PPER11,Port PPU Enable Register for Channel 11"
|
|
bitfld.quad 0x58 63. " PPE63 ,Port PPU Enable Channel 11 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x58 62. " PPE62 ,Port PPU Enable Channel 11 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x58 61. " PPE61 ,Port PPU Enable Channel 11 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x58 60. " PPE60 ,Port PPU Enable Channel 11 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x58 59. " PPE59 ,Port PPU Enable Channel 11 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x58 58. " PPE58 ,Port PPU Enable Channel 11 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x58 57. " PPE57 ,Port PPU Enable Channel 11 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x58 56. " PPE56 ,Port PPU Enable Channel 11 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x58 55. " PPE55 ,Port PPU Enable Channel 11 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x58 54. " PPE54 ,Port PPU Enable Channel 11 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x58 53. " PPE53 ,Port PPU Enable Channel 11 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x58 52. " PPE52 ,Port PPU Enable Channel 11 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x58 51. " PPE51 ,Port PPU Enable Channel 11 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x58 50. " PPE50 ,Port PPU Enable Channel 11 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x58 49. " PPE49 ,Port PPU Enable Channel 11 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x58 48. " PPE48 ,Port PPU Enable Channel 11 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x58 47. " PPE47 ,Port PPU Enable Channel 11 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x58 46. " PPE46 ,Port PPU Enable Channel 11 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x58 45. " PPE45 ,Port PPU Enable Channel 11 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x58 44. " PPE44 ,Port PPU Enable Channel 11 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x58 43. " PPE43 ,Port PPU Enable Channel 11 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x58 42. " PPE42 ,Port PPU Enable Channel 11 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x58 41. " PPE41 ,Port PPU Enable Channel 11 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x58 40. " PPE40 ,Port PPU Enable Channel 11 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x58 39. " PPE39 ,Port PPU Enable Channel 11 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x58 38. " PPE38 ,Port PPU Enable Channel 11 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x58 37. " PPE37 ,Port PPU Enable Channel 11 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x58 36. " PPE36 ,Port PPU Enable Channel 11 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x58 35. " PPE35 ,Port PPU Enable Channel 11 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x58 34. " PPE34 ,Port PPU Enable Channel 11 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x58 33. " PPE33 ,Port PPU Enable Channel 11 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x58 32. " PPE32 ,Port PPU Enable Channel 11 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x58 31. " PPE31 ,Port PPU Enable Channel 11 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x58 30. " PPE30 ,Port PPU Enable Channel 11 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x58 29. " PPE29 ,Port PPU Enable Channel 11 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x58 28. " PPE28 ,Port PPU Enable Channel 11 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x58 27. " PPE27 ,Port PPU Enable Channel 11 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x58 26. " PPE26 ,Port PPU Enable Channel 11 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x58 25. " PPE25 ,Port PPU Enable Channel 11 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x58 24. " PPE24 ,Port PPU Enable Channel 11 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x58 23. " PPE23 ,Port PPU Enable Channel 11 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x58 22. " PPE22 ,Port PPU Enable Channel 11 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x58 21. " PPE21 ,Port PPU Enable Channel 11 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x58 20. " PPE20 ,Port PPU Enable Channel 11 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x58 19. " PPE19 ,Port PPU Enable Channel 11 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x58 18. " PPE18 ,Port PPU Enable Channel 11 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x58 17. " PPE17 ,Port PPU Enable Channel 11 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x58 16. " PPE16 ,Port PPU Enable Channel 11 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x58 15. " PPE15 ,Port PPU Enable Channel 11 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x58 14. " PPE14 ,Port PPU Enable Channel 11 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x58 13. " PPE13 ,Port PPU Enable Channel 11 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x58 12. " PPE12 ,Port PPU Enable Channel 11 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x58 11. " PPE11 ,Port PPU Enable Channel 11 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x58 10. " PPE10 ,Port PPU Enable Channel 11 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x58 9. " PPE9 ,Port PPU Enable Channel 11 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x58 8. " PPE8 ,Port PPU Enable Channel 11 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x58 7. " PPE7 ,Port PPU Enable Channel 11 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x58 6. " PPE6 ,Port PPU Enable Channel 11 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x58 5. " PPE5 ,Port PPU Enable Channel 11 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x58 4. " PPE4 ,Port PPU Enable Channel 11 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x58 3. " PPE3 ,Port PPU Enable Channel 11 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x58 2. " PPE2 ,Port PPU Enable Channel 11 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x58 1. " PPE1 ,Port PPU Enable Channel 11 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x58 0. " PPE0 ,Port PPU Enable Channel 11 Pin 0" "Disabled,Enabled"
|
|
line.quad 0x60 "GPIO_PPER12,Port PPU Enable Register for Channel 12"
|
|
bitfld.quad 0x60 63. " PPE63 ,Port PPU Enable Channel 12 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x60 62. " PPE62 ,Port PPU Enable Channel 12 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x60 61. " PPE61 ,Port PPU Enable Channel 12 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x60 60. " PPE60 ,Port PPU Enable Channel 12 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x60 59. " PPE59 ,Port PPU Enable Channel 12 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x60 58. " PPE58 ,Port PPU Enable Channel 12 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x60 57. " PPE57 ,Port PPU Enable Channel 12 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x60 56. " PPE56 ,Port PPU Enable Channel 12 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x60 55. " PPE55 ,Port PPU Enable Channel 12 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x60 54. " PPE54 ,Port PPU Enable Channel 12 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x60 53. " PPE53 ,Port PPU Enable Channel 12 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x60 52. " PPE52 ,Port PPU Enable Channel 12 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x60 51. " PPE51 ,Port PPU Enable Channel 12 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x60 50. " PPE50 ,Port PPU Enable Channel 12 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x60 49. " PPE49 ,Port PPU Enable Channel 12 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x60 48. " PPE48 ,Port PPU Enable Channel 12 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x60 47. " PPE47 ,Port PPU Enable Channel 12 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x60 46. " PPE46 ,Port PPU Enable Channel 12 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x60 45. " PPE45 ,Port PPU Enable Channel 12 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x60 44. " PPE44 ,Port PPU Enable Channel 12 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x60 43. " PPE43 ,Port PPU Enable Channel 12 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x60 42. " PPE42 ,Port PPU Enable Channel 12 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x60 41. " PPE41 ,Port PPU Enable Channel 12 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x60 40. " PPE40 ,Port PPU Enable Channel 12 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x60 39. " PPE39 ,Port PPU Enable Channel 12 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x60 38. " PPE38 ,Port PPU Enable Channel 12 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x60 37. " PPE37 ,Port PPU Enable Channel 12 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x60 36. " PPE36 ,Port PPU Enable Channel 12 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x60 35. " PPE35 ,Port PPU Enable Channel 12 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x60 34. " PPE34 ,Port PPU Enable Channel 12 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x60 33. " PPE33 ,Port PPU Enable Channel 12 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x60 32. " PPE32 ,Port PPU Enable Channel 12 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x60 31. " PPE31 ,Port PPU Enable Channel 12 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x60 30. " PPE30 ,Port PPU Enable Channel 12 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x60 29. " PPE29 ,Port PPU Enable Channel 12 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x60 28. " PPE28 ,Port PPU Enable Channel 12 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x60 27. " PPE27 ,Port PPU Enable Channel 12 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x60 26. " PPE26 ,Port PPU Enable Channel 12 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x60 25. " PPE25 ,Port PPU Enable Channel 12 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x60 24. " PPE24 ,Port PPU Enable Channel 12 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x60 23. " PPE23 ,Port PPU Enable Channel 12 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x60 22. " PPE22 ,Port PPU Enable Channel 12 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x60 21. " PPE21 ,Port PPU Enable Channel 12 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x60 20. " PPE20 ,Port PPU Enable Channel 12 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x60 19. " PPE19 ,Port PPU Enable Channel 12 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x60 18. " PPE18 ,Port PPU Enable Channel 12 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x60 17. " PPE17 ,Port PPU Enable Channel 12 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x60 16. " PPE16 ,Port PPU Enable Channel 12 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x60 15. " PPE15 ,Port PPU Enable Channel 12 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x60 14. " PPE14 ,Port PPU Enable Channel 12 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x60 13. " PPE13 ,Port PPU Enable Channel 12 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x60 12. " PPE12 ,Port PPU Enable Channel 12 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x60 11. " PPE11 ,Port PPU Enable Channel 12 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x60 10. " PPE10 ,Port PPU Enable Channel 12 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x60 9. " PPE9 ,Port PPU Enable Channel 12 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x60 8. " PPE8 ,Port PPU Enable Channel 12 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x60 7. " PPE7 ,Port PPU Enable Channel 12 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x60 6. " PPE6 ,Port PPU Enable Channel 12 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x60 5. " PPE5 ,Port PPU Enable Channel 12 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x60 4. " PPE4 ,Port PPU Enable Channel 12 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x60 3. " PPE3 ,Port PPU Enable Channel 12 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x60 2. " PPE2 ,Port PPU Enable Channel 12 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x60 1. " PPE1 ,Port PPU Enable Channel 12 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x60 0. " PPE0 ,Port PPU Enable Channel 12 Pin 0" "Disabled,Enabled"
|
|
line.quad 0x68 "GPIO_PPER13,Port PPU Enable Register for Channel 13"
|
|
bitfld.quad 0x68 63. " PPE63 ,Port PPU Enable Channel 13 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x68 62. " PPE62 ,Port PPU Enable Channel 13 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x68 61. " PPE61 ,Port PPU Enable Channel 13 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x68 60. " PPE60 ,Port PPU Enable Channel 13 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x68 59. " PPE59 ,Port PPU Enable Channel 13 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x68 58. " PPE58 ,Port PPU Enable Channel 13 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x68 57. " PPE57 ,Port PPU Enable Channel 13 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x68 56. " PPE56 ,Port PPU Enable Channel 13 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x68 55. " PPE55 ,Port PPU Enable Channel 13 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x68 54. " PPE54 ,Port PPU Enable Channel 13 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x68 53. " PPE53 ,Port PPU Enable Channel 13 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x68 52. " PPE52 ,Port PPU Enable Channel 13 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x68 51. " PPE51 ,Port PPU Enable Channel 13 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x68 50. " PPE50 ,Port PPU Enable Channel 13 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x68 49. " PPE49 ,Port PPU Enable Channel 13 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x68 48. " PPE48 ,Port PPU Enable Channel 13 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x68 47. " PPE47 ,Port PPU Enable Channel 13 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x68 46. " PPE46 ,Port PPU Enable Channel 13 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x68 45. " PPE45 ,Port PPU Enable Channel 13 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x68 44. " PPE44 ,Port PPU Enable Channel 13 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x68 43. " PPE43 ,Port PPU Enable Channel 13 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x68 42. " PPE42 ,Port PPU Enable Channel 13 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x68 41. " PPE41 ,Port PPU Enable Channel 13 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x68 40. " PPE40 ,Port PPU Enable Channel 13 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x68 39. " PPE39 ,Port PPU Enable Channel 13 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x68 38. " PPE38 ,Port PPU Enable Channel 13 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x68 37. " PPE37 ,Port PPU Enable Channel 13 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x68 36. " PPE36 ,Port PPU Enable Channel 13 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x68 35. " PPE35 ,Port PPU Enable Channel 13 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x68 34. " PPE34 ,Port PPU Enable Channel 13 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x68 33. " PPE33 ,Port PPU Enable Channel 13 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x68 32. " PPE32 ,Port PPU Enable Channel 13 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x68 31. " PPE31 ,Port PPU Enable Channel 13 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x68 30. " PPE30 ,Port PPU Enable Channel 13 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x68 29. " PPE29 ,Port PPU Enable Channel 13 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x68 28. " PPE28 ,Port PPU Enable Channel 13 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x68 27. " PPE27 ,Port PPU Enable Channel 13 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x68 26. " PPE26 ,Port PPU Enable Channel 13 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x68 25. " PPE25 ,Port PPU Enable Channel 13 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x68 24. " PPE24 ,Port PPU Enable Channel 13 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x68 23. " PPE23 ,Port PPU Enable Channel 13 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x68 22. " PPE22 ,Port PPU Enable Channel 13 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x68 21. " PPE21 ,Port PPU Enable Channel 13 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x68 20. " PPE20 ,Port PPU Enable Channel 13 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x68 19. " PPE19 ,Port PPU Enable Channel 13 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x68 18. " PPE18 ,Port PPU Enable Channel 13 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x68 17. " PPE17 ,Port PPU Enable Channel 13 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x68 16. " PPE16 ,Port PPU Enable Channel 13 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x68 15. " PPE15 ,Port PPU Enable Channel 13 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x68 14. " PPE14 ,Port PPU Enable Channel 13 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x68 13. " PPE13 ,Port PPU Enable Channel 13 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x68 12. " PPE12 ,Port PPU Enable Channel 13 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x68 11. " PPE11 ,Port PPU Enable Channel 13 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x68 10. " PPE10 ,Port PPU Enable Channel 13 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x68 9. " PPE9 ,Port PPU Enable Channel 13 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x68 8. " PPE8 ,Port PPU Enable Channel 13 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x68 7. " PPE7 ,Port PPU Enable Channel 13 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x68 6. " PPE6 ,Port PPU Enable Channel 13 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x68 5. " PPE5 ,Port PPU Enable Channel 13 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x68 4. " PPE4 ,Port PPU Enable Channel 13 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x68 3. " PPE3 ,Port PPU Enable Channel 13 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x68 2. " PPE2 ,Port PPU Enable Channel 13 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x68 1. " PPE1 ,Port PPU Enable Channel 13 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x68 0. " PPE0 ,Port PPU Enable Channel 13 Pin 0" "Disabled,Enabled"
|
|
line.quad 0x70 "GPIO_PPER14,Port PPU Enable Register for Channel 14"
|
|
bitfld.quad 0x70 63. " PPE63 ,Port PPU Enable Channel 14 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x70 62. " PPE62 ,Port PPU Enable Channel 14 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x70 61. " PPE61 ,Port PPU Enable Channel 14 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x70 60. " PPE60 ,Port PPU Enable Channel 14 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x70 59. " PPE59 ,Port PPU Enable Channel 14 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x70 58. " PPE58 ,Port PPU Enable Channel 14 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x70 57. " PPE57 ,Port PPU Enable Channel 14 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x70 56. " PPE56 ,Port PPU Enable Channel 14 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x70 55. " PPE55 ,Port PPU Enable Channel 14 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x70 54. " PPE54 ,Port PPU Enable Channel 14 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x70 53. " PPE53 ,Port PPU Enable Channel 14 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x70 52. " PPE52 ,Port PPU Enable Channel 14 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x70 51. " PPE51 ,Port PPU Enable Channel 14 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x70 50. " PPE50 ,Port PPU Enable Channel 14 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x70 49. " PPE49 ,Port PPU Enable Channel 14 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x70 48. " PPE48 ,Port PPU Enable Channel 14 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x70 47. " PPE47 ,Port PPU Enable Channel 14 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x70 46. " PPE46 ,Port PPU Enable Channel 14 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x70 45. " PPE45 ,Port PPU Enable Channel 14 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x70 44. " PPE44 ,Port PPU Enable Channel 14 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x70 43. " PPE43 ,Port PPU Enable Channel 14 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x70 42. " PPE42 ,Port PPU Enable Channel 14 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x70 41. " PPE41 ,Port PPU Enable Channel 14 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x70 40. " PPE40 ,Port PPU Enable Channel 14 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x70 39. " PPE39 ,Port PPU Enable Channel 14 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x70 38. " PPE38 ,Port PPU Enable Channel 14 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x70 37. " PPE37 ,Port PPU Enable Channel 14 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x70 36. " PPE36 ,Port PPU Enable Channel 14 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x70 35. " PPE35 ,Port PPU Enable Channel 14 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x70 34. " PPE34 ,Port PPU Enable Channel 14 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x70 33. " PPE33 ,Port PPU Enable Channel 14 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x70 32. " PPE32 ,Port PPU Enable Channel 14 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x70 31. " PPE31 ,Port PPU Enable Channel 14 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x70 30. " PPE30 ,Port PPU Enable Channel 14 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x70 29. " PPE29 ,Port PPU Enable Channel 14 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x70 28. " PPE28 ,Port PPU Enable Channel 14 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x70 27. " PPE27 ,Port PPU Enable Channel 14 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x70 26. " PPE26 ,Port PPU Enable Channel 14 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x70 25. " PPE25 ,Port PPU Enable Channel 14 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x70 24. " PPE24 ,Port PPU Enable Channel 14 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x70 23. " PPE23 ,Port PPU Enable Channel 14 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x70 22. " PPE22 ,Port PPU Enable Channel 14 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x70 21. " PPE21 ,Port PPU Enable Channel 14 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x70 20. " PPE20 ,Port PPU Enable Channel 14 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x70 19. " PPE19 ,Port PPU Enable Channel 14 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x70 18. " PPE18 ,Port PPU Enable Channel 14 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x70 17. " PPE17 ,Port PPU Enable Channel 14 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x70 16. " PPE16 ,Port PPU Enable Channel 14 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x70 15. " PPE15 ,Port PPU Enable Channel 14 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x70 14. " PPE14 ,Port PPU Enable Channel 14 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x70 13. " PPE13 ,Port PPU Enable Channel 14 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x70 12. " PPE12 ,Port PPU Enable Channel 14 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x70 11. " PPE11 ,Port PPU Enable Channel 14 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x70 10. " PPE10 ,Port PPU Enable Channel 14 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x70 9. " PPE9 ,Port PPU Enable Channel 14 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x70 8. " PPE8 ,Port PPU Enable Channel 14 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x70 7. " PPE7 ,Port PPU Enable Channel 14 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x70 6. " PPE6 ,Port PPU Enable Channel 14 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x70 5. " PPE5 ,Port PPU Enable Channel 14 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x70 4. " PPE4 ,Port PPU Enable Channel 14 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x70 3. " PPE3 ,Port PPU Enable Channel 14 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x70 2. " PPE2 ,Port PPU Enable Channel 14 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x70 1. " PPE1 ,Port PPU Enable Channel 14 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x70 0. " PPE0 ,Port PPU Enable Channel 14 Pin 0" "Disabled,Enabled"
|
|
line.quad 0x78 "GPIO_PPER15,Port PPU Enable Register for Channel 15"
|
|
bitfld.quad 0x78 63. " PPE63 ,Port PPU Enable Channel 15 Pin 63" "Disabled,Enabled"
|
|
bitfld.quad 0x78 62. " PPE62 ,Port PPU Enable Channel 15 Pin 62" "Disabled,Enabled"
|
|
bitfld.quad 0x78 61. " PPE61 ,Port PPU Enable Channel 15 Pin 61" "Disabled,Enabled"
|
|
bitfld.quad 0x78 60. " PPE60 ,Port PPU Enable Channel 15 Pin 60" "Disabled,Enabled"
|
|
bitfld.quad 0x78 59. " PPE59 ,Port PPU Enable Channel 15 Pin 59" "Disabled,Enabled"
|
|
bitfld.quad 0x78 58. " PPE58 ,Port PPU Enable Channel 15 Pin 58" "Disabled,Enabled"
|
|
bitfld.quad 0x78 57. " PPE57 ,Port PPU Enable Channel 15 Pin 57" "Disabled,Enabled"
|
|
bitfld.quad 0x78 56. " PPE56 ,Port PPU Enable Channel 15 Pin 56" "Disabled,Enabled"
|
|
bitfld.quad 0x78 55. " PPE55 ,Port PPU Enable Channel 15 Pin 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x78 54. " PPE54 ,Port PPU Enable Channel 15 Pin 54" "Disabled,Enabled"
|
|
bitfld.quad 0x78 53. " PPE53 ,Port PPU Enable Channel 15 Pin 53" "Disabled,Enabled"
|
|
bitfld.quad 0x78 52. " PPE52 ,Port PPU Enable Channel 15 Pin 52" "Disabled,Enabled"
|
|
bitfld.quad 0x78 51. " PPE51 ,Port PPU Enable Channel 15 Pin 51" "Disabled,Enabled"
|
|
bitfld.quad 0x78 50. " PPE50 ,Port PPU Enable Channel 15 Pin 50" "Disabled,Enabled"
|
|
bitfld.quad 0x78 49. " PPE49 ,Port PPU Enable Channel 15 Pin 49" "Disabled,Enabled"
|
|
bitfld.quad 0x78 48. " PPE48 ,Port PPU Enable Channel 15 Pin 48" "Disabled,Enabled"
|
|
bitfld.quad 0x78 47. " PPE47 ,Port PPU Enable Channel 15 Pin 47" "Disabled,Enabled"
|
|
bitfld.quad 0x78 46. " PPE46 ,Port PPU Enable Channel 15 Pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x78 45. " PPE45 ,Port PPU Enable Channel 15 Pin 45" "Disabled,Enabled"
|
|
bitfld.quad 0x78 44. " PPE44 ,Port PPU Enable Channel 15 Pin 44" "Disabled,Enabled"
|
|
bitfld.quad 0x78 43. " PPE43 ,Port PPU Enable Channel 15 Pin 43" "Disabled,Enabled"
|
|
bitfld.quad 0x78 42. " PPE42 ,Port PPU Enable Channel 15 Pin 42" "Disabled,Enabled"
|
|
bitfld.quad 0x78 41. " PPE41 ,Port PPU Enable Channel 15 Pin 41" "Disabled,Enabled"
|
|
bitfld.quad 0x78 40. " PPE40 ,Port PPU Enable Channel 15 Pin 40" "Disabled,Enabled"
|
|
bitfld.quad 0x78 39. " PPE39 ,Port PPU Enable Channel 15 Pin 39" "Disabled,Enabled"
|
|
bitfld.quad 0x78 38. " PPE38 ,Port PPU Enable Channel 15 Pin 38" "Disabled,Enabled"
|
|
bitfld.quad 0x78 37. " PPE37 ,Port PPU Enable Channel 15 Pin 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x78 36. " PPE36 ,Port PPU Enable Channel 15 Pin 36" "Disabled,Enabled"
|
|
bitfld.quad 0x78 35. " PPE35 ,Port PPU Enable Channel 15 Pin 35" "Disabled,Enabled"
|
|
bitfld.quad 0x78 34. " PPE34 ,Port PPU Enable Channel 15 Pin 34" "Disabled,Enabled"
|
|
bitfld.quad 0x78 33. " PPE33 ,Port PPU Enable Channel 15 Pin 33" "Disabled,Enabled"
|
|
bitfld.quad 0x78 32. " PPE32 ,Port PPU Enable Channel 15 Pin 32" "Disabled,Enabled"
|
|
bitfld.quad 0x78 31. " PPE31 ,Port PPU Enable Channel 15 Pin 31" "Disabled,Enabled"
|
|
bitfld.quad 0x78 30. " PPE30 ,Port PPU Enable Channel 15 Pin 30" "Disabled,Enabled"
|
|
bitfld.quad 0x78 29. " PPE29 ,Port PPU Enable Channel 15 Pin 29" "Disabled,Enabled"
|
|
bitfld.quad 0x78 28. " PPE28 ,Port PPU Enable Channel 15 Pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x78 27. " PPE27 ,Port PPU Enable Channel 15 Pin 27" "Disabled,Enabled"
|
|
bitfld.quad 0x78 26. " PPE26 ,Port PPU Enable Channel 15 Pin 26" "Disabled,Enabled"
|
|
bitfld.quad 0x78 25. " PPE25 ,Port PPU Enable Channel 15 Pin 25" "Disabled,Enabled"
|
|
bitfld.quad 0x78 24. " PPE24 ,Port PPU Enable Channel 15 Pin 24" "Disabled,Enabled"
|
|
bitfld.quad 0x78 23. " PPE23 ,Port PPU Enable Channel 15 Pin 23" "Disabled,Enabled"
|
|
bitfld.quad 0x78 22. " PPE22 ,Port PPU Enable Channel 15 Pin 22" "Disabled,Enabled"
|
|
bitfld.quad 0x78 21. " PPE21 ,Port PPU Enable Channel 15 Pin 21" "Disabled,Enabled"
|
|
bitfld.quad 0x78 20. " PPE20 ,Port PPU Enable Channel 15 Pin 20" "Disabled,Enabled"
|
|
bitfld.quad 0x78 19. " PPE19 ,Port PPU Enable Channel 15 Pin 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x78 18. " PPE18 ,Port PPU Enable Channel 15 Pin 18" "Disabled,Enabled"
|
|
bitfld.quad 0x78 17. " PPE17 ,Port PPU Enable Channel 15 Pin 17" "Disabled,Enabled"
|
|
bitfld.quad 0x78 16. " PPE16 ,Port PPU Enable Channel 15 Pin 16" "Disabled,Enabled"
|
|
bitfld.quad 0x78 15. " PPE15 ,Port PPU Enable Channel 15 Pin 15" "Disabled,Enabled"
|
|
bitfld.quad 0x78 14. " PPE14 ,Port PPU Enable Channel 15 Pin 14" "Disabled,Enabled"
|
|
bitfld.quad 0x78 13. " PPE13 ,Port PPU Enable Channel 15 Pin 13" "Disabled,Enabled"
|
|
bitfld.quad 0x78 12. " PPE12 ,Port PPU Enable Channel 15 Pin 12" "Disabled,Enabled"
|
|
bitfld.quad 0x78 11. " PPE11 ,Port PPU Enable Channel 15 Pin 11" "Disabled,Enabled"
|
|
bitfld.quad 0x78 10. " PPE10 ,Port PPU Enable Channel 15 Pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x78 9. " PPE9 ,Port PPU Enable Channel 15 Pin 9" "Disabled,Enabled"
|
|
bitfld.quad 0x78 8. " PPE8 ,Port PPU Enable Channel 15 Pin 8" "Disabled,Enabled"
|
|
bitfld.quad 0x78 7. " PPE7 ,Port PPU Enable Channel 15 Pin 7" "Disabled,Enabled"
|
|
bitfld.quad 0x78 6. " PPE6 ,Port PPU Enable Channel 15 Pin 6" "Disabled,Enabled"
|
|
bitfld.quad 0x78 5. " PPE5 ,Port PPU Enable Channel 15 Pin 5" "Disabled,Enabled"
|
|
bitfld.quad 0x78 4. " PPE4 ,Port PPU Enable Channel 15 Pin 4" "Disabled,Enabled"
|
|
bitfld.quad 0x78 3. " PPE3 ,Port PPU Enable Channel 15 Pin 3" "Disabled,Enabled"
|
|
bitfld.quad 0x78 2. " PPE2 ,Port PPU Enable Channel 15 Pin 2" "Disabled,Enabled"
|
|
bitfld.quad 0x78 1. " PPE1 ,Port PPU Enable Channel 15 Pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x78 0. " PPE0 ,Port PPU Enable Channel 15 Pin 0" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree.end
|
|
tree "A/D Converter"
|
|
tree "ADC0"
|
|
base ad:0xb0700000
|
|
width 16.
|
|
group.word 0x00++0x03 "Input enable Register"
|
|
line.word 0x00 "ADC0_ER32,A/D Input Enable Registers"
|
|
bitfld.word 0x00 15. " ADE[0] ,A/D Input Enable 0" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " [1] ,A/D Input Enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " [2] ,A/D Input Enable 2" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " [3] ,A/D Input Enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " [4] ,A/D Input Enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " [5] ,A/D Input Enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " [6] ,A/D Input Enable 6" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " [7] ,A/D Input Enable 7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " [8] ,A/D Input Enable 8" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " [9] ,A/D Input Enable 9" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " [10] ,A/D Input Enable 10" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " [11] ,A/D Input Enable 11" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " [12] ,A/D Input Enable 12" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " [13] ,A/D Input Enable 13" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " [14] ,A/D Input Enable 14" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " [15] ,A/D Input Enable 15" "Disabled,Enabled"
|
|
line.word 0x02 "ADC0_ER10,A/D Input Enable Registers"
|
|
bitfld.word 0x02 15. " ADE[16] ,A/D Input Enable 16" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " [17] ,A/D Input Enable 17" "Disabled,Enabled"
|
|
bitfld.word 0x02 13. " [18] ,A/D Input Enable 18" "Disabled,Enabled"
|
|
bitfld.word 0x02 12. " [19] ,A/D Input Enable 19" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " [20] ,A/D Input Enable 20" "Disabled,Enabled"
|
|
bitfld.word 0x02 10. " [21] ,A/D Input Enable 21" "Disabled,Enabled"
|
|
bitfld.word 0x02 9. " [22] ,A/D Input Enable 22" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " [23] ,A/D Input Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 7. " [24] ,A/D Input Enable 24" "Disabled,Enabled"
|
|
bitfld.word 0x02 6. " [25] ,A/D Input Enable 25" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " [26] ,A/D Input Enable 26" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " [27] ,A/D Input Enable 27" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " [28] ,A/D Input Enable 28" "Disabled,Enabled"
|
|
bitfld.word 0x02 2. " [29] ,A/D Input Enable 29" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " [30] ,A/D Input Enable 30" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " [31] ,A/D Input Enable 31" "Disabled,Enabled"
|
|
group.byte 0x04++0x03 "Control Status Registers"
|
|
line.byte 0x00 "ADC0_CS0,A/D Control Status Register 0"
|
|
bitfld.byte 0x00 6.--7. " MD[1:0] ,A/D Converter Mode Set" "Single Mode 1,Single Mode 2,Continous Mode,Stop Mode"
|
|
bitfld.byte 0x00 5. " S10 ,Resolution of A/D Convertion" "10-bit,8-bit"
|
|
rbitfld.byte 0x00 0.--4. " ACH[4:0] ,Analog Convert Selected Channel" "AN0,AN1,AN2,AN3,AN4,AN5,AN6,AN7,AN8,AN9,AN10,AN11,AN12,AN13,AN14,AN15,AN16,AN17,AN18,AN19,AN20,AN21,AN22,AN23,AN24,AN25,AN26,AN27,AN28,AN29,AN30,AN31"
|
|
line.byte 0x01 "ADC0_CS1,A/D Control Status Register 1"
|
|
rbitfld.byte 0x01 7. " BUSY ,Busy Flag and Stop (A/D Convertion)" "Completed,Activated"
|
|
rbitfld.byte 0x01 6. " INT ,End of Conversion Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.byte 0x01 5. 0x04 5. 0x06 5. " INTE_set/clr ,End of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x01 4. " PAUS ,A/D Converter Pause" "Not paused,Paused"
|
|
bitfld.byte 0x01 2.--3. " STS[1:0] ,Start Source Select (select activation source)" "Software,External trigger/Software,Timer/Software,Ext. trigger/Timer/Software"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " STRT ,Start A/D conversion" "No effect,Start"
|
|
bitfld.byte 0x01 0. " ACHMD ,ACH (in ADC0_CS0) Register Reading Mode" "Direct,Latched"
|
|
line.byte 0x02 "ADC0_CS2,A/D Control Status Register 2"
|
|
bitfld.byte 0x02 1. " DPDIS ,Data Protection Disable" "No,Yes"
|
|
bitfld.byte 0x02 0. " DBGE ,Debug Enable" "Disabled,Enabled"
|
|
line.byte 0x03 "ADC0_CS3,A/D Control Status Register 3"
|
|
rbitfld.byte 0x03 7. " BUSY ,Mirror of BUSY bit in ADC0_CS1" "Low,High"
|
|
rbitfld.byte 0x03 6. " INT ,Mirror of INT bit in ADC0_CS1" "Low,High"
|
|
rbitfld.byte 0x03 5. " INTE ,Mirror of INTE bit in ADC0_CS1" "Low,High"
|
|
rbitfld.byte 0x03 4. " PAUS ,Mirror of PAUS bit in ADC0_CS1" "Low,High"
|
|
rbitfld.byte 0x03 1. " INT2 ,End of Scan Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x03 0. " INTE2 ,Enable End of Scan Interrupt" "Disabled,Enabled"
|
|
wgroup.byte 0x09++0x00
|
|
line.byte 0x00 "ADC0_CSS1,A/D Control Status Register 1 Set Register"
|
|
bitfld.byte 0x00 1. " STRTS ,Start (ADC0_CS1:STRT) Set" "No effect,Set"
|
|
wgroup.byte 0x0B++0x00
|
|
line.byte 0x00 "ADC0_CSC1,A/D Control Status Register 1 Clear Register"
|
|
bitfld.byte 0x00 7. " BUSYC ,BUSY (ADC0_CS1:BUSY) Clear bit" "No effect,Clear"
|
|
bitfld.byte 0x00 6. " INTC ,End of Conversion Interrupt (ADC0_CS1:INT) Clear" "No effect,Clear"
|
|
bitfld.byte 0x00 4. " PAUSC ,PAUS (DC0_CS1:PAUS) Clear bit" "No effect,Clear"
|
|
wgroup.byte 0x0d++0x00
|
|
line.byte 0x00 "ADC0_CSS3,A/D Control Status Register 3 Set Register"
|
|
bitfld.byte 0x00 0. " INTE2S ,Enable End of Scan Interrupt Set bit" "No effect,Set"
|
|
wgroup.byte 0x0F++0x00
|
|
line.byte 0x00 "ADC0_CSC3,A/D Control Status Register 3 Clear Register"
|
|
bitfld.byte 0x00 1. " INT2C ,End of Scan Interrupt (ADCn_CS3:INT2) Clear bit" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " INTE2C ,Enable End of Scan Interrupt (ADCn_CS3:INT2) Clear bit" "No effect,Clear"
|
|
tree "Data Register"
|
|
if (((d.b(ad:0xb0700004))&0x20)==0x0)
|
|
sif !CPUIS("MB9EF226")
|
|
if (((d.b(ad:0xb0700004+0x02))&0x2)==0x0&&((d.b(ad:0xb0700060))&0x10)==0x1)
|
|
hgroup.word 0x10++0x01
|
|
hide.word 0x00 "ADC0_CR,Common Data Register (Conversion Result)"
|
|
in
|
|
else
|
|
rgroup.word 0x10++0x01
|
|
line.word 0x00 "ADC0_CR,Common Data Register (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Common Data"
|
|
endif
|
|
else
|
|
if (((d.b(ad:0xb0700004+0x02))&0x2)==0x0&&((d.b(ad:0xb0700060+0x02))&0x10)==0x1)
|
|
hgroup.word 0x10++0x01
|
|
hide.word 0x00 "ADC0_CR,Common Data Register (Conversion Result)"
|
|
in
|
|
else
|
|
rgroup.word 0x10++0x01
|
|
line.word 0x00 "ADC0_CR,Common Data Register (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Common Data"
|
|
endif
|
|
endif
|
|
rgroup.word 0x18++0x1
|
|
line.word 0x00 "ADC0_CD0,Dedicated A/D Channel Data Register 0 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x1A++0x1
|
|
line.word 0x00 "ADC0_CD1,Dedicated A/D Channel Data Register 1 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x1C++0x1
|
|
line.word 0x00 "ADC0_CD2,Dedicated A/D Channel Data Register 2 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x1E++0x1
|
|
line.word 0x00 "ADC0_CD3,Dedicated A/D Channel Data Register 3 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x20++0x1
|
|
line.word 0x00 "ADC0_CD4,Dedicated A/D Channel Data Register 4 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x22++0x1
|
|
line.word 0x00 "ADC0_CD5,Dedicated A/D Channel Data Register 5 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x24++0x1
|
|
line.word 0x00 "ADC0_CD6,Dedicated A/D Channel Data Register 6 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x26++0x1
|
|
line.word 0x00 "ADC0_CD7,Dedicated A/D Channel Data Register 7 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x28++0x1
|
|
line.word 0x00 "ADC0_CD8,Dedicated A/D Channel Data Register 8 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x2A++0x1
|
|
line.word 0x00 "ADC0_CD9,Dedicated A/D Channel Data Register 9 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x2C++0x1
|
|
line.word 0x00 "ADC0_CD10,Dedicated A/D Channel Data Register 10 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x2E++0x1
|
|
line.word 0x00 "ADC0_CD11,Dedicated A/D Channel Data Register 11 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x30++0x1
|
|
line.word 0x00 "ADC0_CD12,Dedicated A/D Channel Data Register 12 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x32++0x1
|
|
line.word 0x00 "ADC0_CD13,Dedicated A/D Channel Data Register 13 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x34++0x1
|
|
line.word 0x00 "ADC0_CD14,Dedicated A/D Channel Data Register 14 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x36++0x1
|
|
line.word 0x00 "ADC0_CD15,Dedicated A/D Channel Data Register 15 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x38++0x1
|
|
line.word 0x00 "ADC0_CD16,Dedicated A/D Channel Data Register 16 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x3A++0x1
|
|
line.word 0x00 "ADC0_CD17,Dedicated A/D Channel Data Register 17 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x3C++0x1
|
|
line.word 0x00 "ADC0_CD18,Dedicated A/D Channel Data Register 18 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x3E++0x1
|
|
line.word 0x00 "ADC0_CD19,Dedicated A/D Channel Data Register 19 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x40++0x1
|
|
line.word 0x00 "ADC0_CD20,Dedicated A/D Channel Data Register 20 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x42++0x1
|
|
line.word 0x00 "ADC0_CD21,Dedicated A/D Channel Data Register 21 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x44++0x1
|
|
line.word 0x00 "ADC0_CD22,Dedicated A/D Channel Data Register 22 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x46++0x1
|
|
line.word 0x00 "ADC0_CD23,Dedicated A/D Channel Data Register 23 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x48++0x1
|
|
line.word 0x00 "ADC0_CD24,Dedicated A/D Channel Data Register 24 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x4A++0x1
|
|
line.word 0x00 "ADC0_CD25,Dedicated A/D Channel Data Register 25 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x4C++0x1
|
|
line.word 0x00 "ADC0_CD26,Dedicated A/D Channel Data Register 26 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x4E++0x1
|
|
line.word 0x00 "ADC0_CD27,Dedicated A/D Channel Data Register 27 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x50++0x1
|
|
line.word 0x00 "ADC0_CD28,Dedicated A/D Channel Data Register 28 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x52++0x1
|
|
line.word 0x00 "ADC0_CD29,Dedicated A/D Channel Data Register 29 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x54++0x1
|
|
line.word 0x00 "ADC0_CD30,Dedicated A/D Channel Data Register 30 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x56++0x1
|
|
line.word 0x00 "ADC0_CD31,Dedicated A/D Channel Data Register 31 (Conversion Result)"
|
|
hexmask.word 0x0 0.--9. 1. " D[9:0] ,Dedicated A/D Channel Data"
|
|
else
|
|
sif !CPUIS("MB9EF226")
|
|
if (((d.b(ad:0xb0700004+0x02))&0x2)==0x0&&((d.b(ad:0xb0700060))&0x10)==0x1)
|
|
hgroup.word 0x10++0x01
|
|
hide.word 0x00 "ADC0_CR,Common Data Register (Conversion Result)"
|
|
in
|
|
else
|
|
rgroup.word 0x10++0x01
|
|
line.word 0x00 "ADC0_CR,Common Data Register (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Common Data"
|
|
endif
|
|
else
|
|
if (((d.b(ad:0xb0700004+0x02))&0x2)==0x0&&((d.b(ad:0xb0700060+0x02))&0x10)==0x1)
|
|
hgroup.word 0x10++0x01
|
|
hide.word 0x00 "ADC0_CR,Common Data Register (Conversion Result)"
|
|
in
|
|
else
|
|
rgroup.word 0x10++0x01
|
|
line.word 0x00 "ADC0_CR,Common Data Register (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Common Data"
|
|
endif
|
|
endif
|
|
rgroup.word 0x18++0x3F
|
|
line.word 0x00 "ADC0_CD0,Dedicated A/D Channel Data Register 0 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x1A++0x3F
|
|
line.word 0x00 "ADC0_CD1,Dedicated A/D Channel Data Register 1 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x1C++0x3F
|
|
line.word 0x00 "ADC0_CD2,Dedicated A/D Channel Data Register 2 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x1E++0x3F
|
|
line.word 0x00 "ADC0_CD3,Dedicated A/D Channel Data Register 3 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x20++0x3F
|
|
line.word 0x00 "ADC0_CD4,Dedicated A/D Channel Data Register 4 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x22++0x3F
|
|
line.word 0x00 "ADC0_CD5,Dedicated A/D Channel Data Register 5 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x24++0x3F
|
|
line.word 0x00 "ADC0_CD6,Dedicated A/D Channel Data Register 6 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x26++0x3F
|
|
line.word 0x00 "ADC0_CD7,Dedicated A/D Channel Data Register 7 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x28++0x3F
|
|
line.word 0x00 "ADC0_CD8,Dedicated A/D Channel Data Register 8 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x2A++0x3F
|
|
line.word 0x00 "ADC0_CD9,Dedicated A/D Channel Data Register 9 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x2C++0x3F
|
|
line.word 0x00 "ADC0_CD10,Dedicated A/D Channel Data Register 10 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x2E++0x3F
|
|
line.word 0x00 "ADC0_CD11,Dedicated A/D Channel Data Register 11 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x30++0x3F
|
|
line.word 0x00 "ADC0_CD12,Dedicated A/D Channel Data Register 12 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x32++0x3F
|
|
line.word 0x00 "ADC0_CD13,Dedicated A/D Channel Data Register 13 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x34++0x3F
|
|
line.word 0x00 "ADC0_CD14,Dedicated A/D Channel Data Register 14 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x36++0x3F
|
|
line.word 0x00 "ADC0_CD15,Dedicated A/D Channel Data Register 15 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x38++0x3F
|
|
line.word 0x00 "ADC0_CD16,Dedicated A/D Channel Data Register 16 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x3A++0x3F
|
|
line.word 0x00 "ADC0_CD17,Dedicated A/D Channel Data Register 17 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x3C++0x3F
|
|
line.word 0x00 "ADC0_CD18,Dedicated A/D Channel Data Register 18 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x3E++0x3F
|
|
line.word 0x00 "ADC0_CD19,Dedicated A/D Channel Data Register 19 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x40++0x3F
|
|
line.word 0x00 "ADC0_CD20,Dedicated A/D Channel Data Register 20 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x42++0x3F
|
|
line.word 0x00 "ADC0_CD21,Dedicated A/D Channel Data Register 21 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x44++0x3F
|
|
line.word 0x00 "ADC0_CD22,Dedicated A/D Channel Data Register 22 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x46++0x3F
|
|
line.word 0x00 "ADC0_CD23,Dedicated A/D Channel Data Register 23 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x48++0x3F
|
|
line.word 0x00 "ADC0_CD24,Dedicated A/D Channel Data Register 24 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x4A++0x3F
|
|
line.word 0x00 "ADC0_CD25,Dedicated A/D Channel Data Register 25 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x4C++0x3F
|
|
line.word 0x00 "ADC0_CD26,Dedicated A/D Channel Data Register 26 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x4E++0x3F
|
|
line.word 0x00 "ADC0_CD27,Dedicated A/D Channel Data Register 27 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x50++0x3F
|
|
line.word 0x00 "ADC0_CD28,Dedicated A/D Channel Data Register 28 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x52++0x3F
|
|
line.word 0x00 "ADC0_CD29,Dedicated A/D Channel Data Register 29 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x54++0x3F
|
|
line.word 0x00 "ADC0_CD30,Dedicated A/D Channel Data Register 30 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
rgroup.word 0x56++0x3F
|
|
line.word 0x00 "ADC0_CD31,Dedicated A/D Channel Data Register 31 (Conversion Result)"
|
|
hexmask.word 0x0 0.--7. 1. " D[7:0] ,Dedicated A/D Channel Data"
|
|
endif
|
|
tree.end
|
|
sif !CPUIS("MB9EF226")
|
|
group.word 0x5E++0x01 "Time Setting Register"
|
|
else
|
|
group.word 0x5C++0x01 "Time Setting Register"
|
|
endif
|
|
line.word 0x00 "ADC0_CT,ADC Conversion Time Setting Register"
|
|
hexmask.word.byte 0x00 10.--15. 0x1 " CT[5:0] ,A/D Comparison Time Set"
|
|
hexmask.word 0x00 0.--9. 0x1 " ST[9:0] ,Analog Input Sampling Time Set"
|
|
sif !CPUIS("MB9EF226")
|
|
group.byte 0x60++0x01 "Channel Setting Registers"
|
|
else
|
|
group.byte 0x5E++0x01 "Channel Setting Registers"
|
|
endif
|
|
line.byte 0x00 "ADC0_SCH,A/D Start Channel Setting Register"
|
|
bitfld.byte 0x00 0.--4. " ANS[4:0] ,Analog Start Channel Set" "AN0,AN1,AN2,AN3,AN4,AN5,AN6,AN7,AN8,AN9,AN10,AN11,AN12,AN13,AN14,AN15,AN16,AN17,AN18,AN19,AN20,AN21,AN22,AN23,AN24,AN25,AN26,AN27,AN28,AN29,AN30,AN31"
|
|
line.byte 0x01 "ADC0_ECH,A/D End Channel Setting Register"
|
|
bitfld.byte 0x01 0.--4. " ANE[4:0] ,Analog End Channel Set" "AN0,AN1,AN2,AN3,AN4,AN5,AN6,AN7,AN8,AN9,AN10,AN11,AN12,AN13,AN14,AN15,AN16,AN17,AN18,AN19,AN20,AN21,AN22,AN23,AN24,AN25,AN26,AN27,AN28,AN29,AN30,AN31"
|
|
width 16.
|
|
sif !CPUIS("MB9EF226")
|
|
group.byte 0x62++0x00 "DMA Configuration Registers"
|
|
else
|
|
group.byte 0x60++0x00 "DMA Configuration Registers"
|
|
endif
|
|
line.byte 0x00 "ADC0_MAR,A/D Converter DMA Configuration Register"
|
|
setclrfld.byte 0x00 1. 0x6 1. 0x2 1. " DRQEN2_set/clr ,DMA Request Enable for INT2 (end of scan)" "Disabled,Enabled"
|
|
setclrfld.byte 0x00 0. 0x6 1. 0x2 1. " DRQEN_set/clr ,DMA Request Enable for INT (end of conversion)" "Disabled,Enabled"
|
|
width 16.
|
|
tree "Range Comparator Threshold Registers"
|
|
sif !CPUIS("MB9EF226")
|
|
group.byte 0x68++0x07
|
|
else
|
|
group.byte 0x6A++0x07
|
|
endif
|
|
line.byte 0x0+0x01 "ADC0_RCOH0,Range Comparator Upper Threshold Register 0"
|
|
line.byte 0x0 "ADC0_RCOL0,Range Comparator Lower Threshold Register 0"
|
|
line.byte 0x2+0x01 "ADC0_RCOH1,Range Comparator Upper Threshold Register 1"
|
|
line.byte 0x2 "ADC0_RCOL1,Range Comparator Lower Threshold Register 1"
|
|
line.byte 0x4+0x01 "ADC0_RCOH2,Range Comparator Upper Threshold Register 2"
|
|
line.byte 0x4 "ADC0_RCOL2,Range Comparator Lower Threshold Register 2"
|
|
line.byte 0x6+0x01 "ADC0_RCOH3,Range Comparator Upper Threshold Register 3"
|
|
line.byte 0x6 "ADC0_RCOL3,Range Comparator Lower Threshold Register 3"
|
|
tree.end
|
|
width 16.
|
|
tree "Channel Control Registers"
|
|
sif !CPUIS("MB9EF226")
|
|
group.byte 0x70++0x0F
|
|
else
|
|
group.byte 0x72++0x0F
|
|
endif
|
|
line.byte 0x0 "ADC0_CC0,A/D Converter Channel Control Register 0"
|
|
bitfld.byte 0x0 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0x0 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x0 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0x1 "ADC0_CC1,A/D Converter Channel Control Register 1"
|
|
bitfld.byte 0x1 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x1 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x1 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0x1 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x1 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x1 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0x2 "ADC0_CC2,A/D Converter Channel Control Register 2"
|
|
bitfld.byte 0x2 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x2 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x2 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0x2 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x2 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x2 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0x3 "ADC0_CC3,A/D Converter Channel Control Register 3"
|
|
bitfld.byte 0x3 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x3 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x3 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0x3 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x3 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x3 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0x4 "ADC0_CC4,A/D Converter Channel Control Register 4"
|
|
bitfld.byte 0x4 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x4 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x4 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0x4 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x4 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x4 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0x5 "ADC0_CC5,A/D Converter Channel Control Register 5"
|
|
bitfld.byte 0x5 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x5 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x5 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0x5 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x5 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x5 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0x6 "ADC0_CC6,A/D Converter Channel Control Register 6"
|
|
bitfld.byte 0x6 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x6 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x6 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0x6 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x6 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x6 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0x7 "ADC0_CC7,A/D Converter Channel Control Register 7"
|
|
bitfld.byte 0x7 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x7 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x7 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0x7 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x7 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x7 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0x8 "ADC0_CC8,A/D Converter Channel Control Register 8"
|
|
bitfld.byte 0x8 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x8 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x8 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0x8 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x8 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x8 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0x9 "ADC0_CC9,A/D Converter Channel Control Register 9"
|
|
bitfld.byte 0x9 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x9 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x9 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0x9 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0x9 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x9 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0xA "ADC0_CC10,A/D Converter Channel Control Register 10"
|
|
bitfld.byte 0xA 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xA 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xA 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0xA 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xA 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0xA 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0xB "ADC0_CC11,A/D Converter Channel Control Register 11"
|
|
bitfld.byte 0xB 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xB 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xB 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0xB 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xB 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0xB 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0xC "ADC0_CC12,A/D Converter Channel Control Register 12"
|
|
bitfld.byte 0xC 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xC 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xC 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0xC 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xC 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0xC 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0xD "ADC0_CC13,A/D Converter Channel Control Register 13"
|
|
bitfld.byte 0xD 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xD 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xD 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0xD 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xD 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0xD 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0xE "ADC0_CC14,A/D Converter Channel Control Register 14"
|
|
bitfld.byte 0xE 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xE 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xE 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0xE 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xE 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0xE 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
line.byte 0xF "ADC0_CC15,A/D Converter Channel Control Register 15"
|
|
bitfld.byte 0xF 7. " RCOIE1 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xF 6. " RCOE1 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xF 4.--5. " RCOS1[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
bitfld.byte 0xF 3. " RCOIE0 ,Enable the Range Comparator Interrupt for the Odd ADC Channel" "Disabled,Enabled"
|
|
bitfld.byte 0xF 2. " RCOE0 ,Enable of Range Comparator for the Odd ADC Channel" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0xF 0.--1. " RCOS0[1:0] ,Range Comparator Selection for Odd ADC Channels" "0,1,2,3"
|
|
tree.end
|
|
width 16.
|
|
tree "Inverted Range Selection Registers"
|
|
sif !CPUIS("MB9EF226")
|
|
group.word 0x80++0x0B
|
|
else
|
|
group.word 0x82++0x03
|
|
endif
|
|
line.word 0x0 "ADC0_RCOIRS32,Inverted Range Selection Register"
|
|
bitfld.word 0x0 15. " RCOIRS[0] ,Inverted Range Selection for ADC Channel 31" "Outside,Inside"
|
|
bitfld.word 0x0 14. " [1] ,Inverted Range Selection for ADC Channel 30" "Outside,Inside"
|
|
bitfld.word 0x0 13. " [2] ,Inverted Range Selection for ADC Channel 29" "Outside,Inside"
|
|
bitfld.word 0x0 12. " [3] ,Inverted Range Selection for ADC Channel 28" "Outside,Inside"
|
|
bitfld.word 0x0 11. " [4] ,Inverted Range Selection for ADC Channel 27" "Outside,Inside"
|
|
bitfld.word 0x0 10. " [5] ,Inverted Range Selection for ADC Channel 26" "Outside,Inside"
|
|
textline " "
|
|
bitfld.word 0x0 9. " [6] ,Inverted Range Selection for ADC Channel 25" "Outside,Inside"
|
|
bitfld.word 0x0 8. " [7] ,Inverted Range Selection for ADC Channel 24" "Outside,Inside"
|
|
bitfld.word 0x0 7. " [8] ,Inverted Range Selection for ADC Channel 23" "Outside,Inside"
|
|
bitfld.word 0x0 6. " [9] ,Inverted Range Selection for ADC Channel 22" "Outside,Inside"
|
|
bitfld.word 0x0 5. " [10] ,Inverted Range Selection for ADC Channel 21" "Outside,Inside"
|
|
bitfld.word 0x0 4. " [11] ,Inverted Range Selection for ADC Channel 20" "Outside,Inside"
|
|
textline " "
|
|
bitfld.word 0x0 3. " [12] ,Inverted Range Selection for ADC Channel 19" "Outside,Inside"
|
|
bitfld.word 0x0 2. " [13] ,Inverted Range Selection for ADC Channel 18" "Outside,Inside"
|
|
bitfld.word 0x0 1. " [14] ,Inverted Range Selection for ADC Channel 17" "Outside,Inside"
|
|
bitfld.word 0x0 0. " [15] ,Inverted Range Selection for ADC Channel 16" "Outside,Inside"
|
|
line.word 0x2 "ADC0_RCOIRS10,Inverted Range Selection Register"
|
|
bitfld.word 0x2 15. " RCOIRS[16] ,Inverted Range Selection for ADC Channel 15" "Outside,Inside"
|
|
bitfld.word 0x2 14. " [17] ,Inverted Range Selection for ADC Channel 14" "Outside,Inside"
|
|
bitfld.word 0x2 13. " [18] ,Inverted Range Selection for ADC Channel 13" "Outside,Inside"
|
|
bitfld.word 0x2 12. " [19] ,Inverted Range Selection for ADC Channel 12" "Outside,Inside"
|
|
bitfld.word 0x2 11. " [20] ,Inverted Range Selection for ADC Channel 11" "Outside,Inside"
|
|
bitfld.word 0x2 10. " [21] ,Inverted Range Selection for ADC Channel 10" "Outside,Inside"
|
|
textline " "
|
|
bitfld.word 0x2 9. " [22] ,Inverted Range Selection for ADC Channel 9" "Outside,Inside"
|
|
bitfld.word 0x2 8. " [23] ,Inverted Range Selection for ADC Channel 8" "Outside,Inside"
|
|
bitfld.word 0x2 7. " [24] ,Inverted Range Selection for ADC Channel 7" "Outside,Inside"
|
|
bitfld.word 0x2 6. " [25] ,Inverted Range Selection for ADC Channel 6" "Outside,Inside"
|
|
bitfld.word 0x2 5. " [26] ,Inverted Range Selection for ADC Channel 5" "Outside,Inside"
|
|
bitfld.word 0x2 4. " [27] ,Inverted Range Selection for ADC Channel 4" "Outside,Inside"
|
|
textline " "
|
|
bitfld.word 0x2 3. " [28] ,Inverted Range Selection for ADC Channel 3" "Outside,Inside"
|
|
bitfld.word 0x2 2. " [29] ,Inverted Range Selection for ADC Channel 2" "Outside,Inside"
|
|
bitfld.word 0x2 1. " [30] ,Inverted Range Selection for ADC Channel 1" "Outside,Inside"
|
|
bitfld.word 0x2 0. " [31] ,Inverted Range Selection for ADC Channel 0" "Outside,Inside"
|
|
sif !CPUIS("MB9EF226")
|
|
rgroup.word 0x88++0x03
|
|
else
|
|
rgroup.word 0x8A++0x03
|
|
endif
|
|
line.word 0x00 "ADC0_RCOINT32,Range Comparator Interrupt Flag"
|
|
bitfld.word 0x00 15. " RCOINT[0] ,Outside/Inside Range Condition found on Channel 0" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 14. " [1] ,Outside/Inside Range Condition found on Channel 1" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 13. " [2] ,Outside/Inside Range Condition found on Channel 2" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 12. " [3] ,Outside/Inside Range Condition found on Channel 3" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 11. " [4] ,Outside/Inside Range Condition found on Channel 4" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 10. " [5] ,Outside/Inside Range Condition found on Channel 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 9. " [6] ,Outside/Inside Range Condition found on Channel 6" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 8. " [7] ,Outside/Inside Range Condition found on Channel 7" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 7. " [8] ,Outside/Inside Range Condition found on Channel 8" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 6. " [9] ,Outside/Inside Range Condition found on Channel 9" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 5. " [10] ,Outside/Inside Range Condition found on Channel 10" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 4. " [11] ,Outside/Inside Range Condition found on Channel 11" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 3. " [12] ,Outside/Inside Range Condition found on Channel 12" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 2. " [13] ,Outside/Inside Range Condition found on Channel 13" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 1. " [14] ,Outside/Inside Range Condition found on Channel 14" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 0. " [15] ,Outside/Inside Range Condition found on Channel 15" "No interrupt,Interrupt"
|
|
line.word 0x02 "ADC0_RCOINT10,Range Comparator Interrupt Flag"
|
|
bitfld.word 0x02 15. " RCOINT[16] ,Outside/Inside Range Condition found on Channel 16" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 14. " [17] ,Outside/Inside Range Condition found on Channel 17" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 13. " [18] ,Outside/Inside Range Condition found on Channel 18" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 12. " [19] ,Outside/Inside Range Condition found on Channel 19" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 11. " [20] ,Outside/Inside Range Condition found on Channel 20" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 10. " [21] ,Outside/Inside Range Condition found on Channel 21" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x02 9. " [22] ,Outside/Inside Range Condition found on Channel 22" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 8. " [23] ,Outside/Inside Range Condition found on Channel 23" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 7. " [24] ,Outside/Inside Range Condition found on Channel 24" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 6. " [25] ,Outside/Inside Range Condition found on Channel 25" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 5. " [26] ,Outside/Inside Range Condition found on Channel 26" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 4. " [27] ,Outside/Inside Range Condition found on Channel 27" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x02 3. " [28] ,Outside/Inside Range Condition found on Channel 28" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 2. " [29] ,Outside/Inside Range Condition found on Channel 29" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 1. " [30] ,Outside/Inside Range Condition found on Channel 30" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " [31] ,Outside/Inside Range Condition found on Channel 31" "No interrupt,Interrupt"
|
|
sif !CPUIS("MB9EF226")
|
|
rgroup.word 0x84++0x03
|
|
else
|
|
rgroup.word 0x86++0x03
|
|
endif
|
|
line.word 0x00 "ADC0_RCOOF32, Range Comparator Over Threshold Flag"
|
|
bitfld.word 0x00 15. " RCOOF[0] ,Channel 0 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 14. " [1] ,Channel 1 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 13. " [2] ,Channel 2 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 12. " [3] ,Channel 3 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 11. " [4] ,Channel 4 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 10. " [5] ,Channel 5 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
textline " "
|
|
bitfld.word 0x00 9. " [6] ,Channel 6 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 8. " [7] ,Channel 7 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 7. " [8] ,Channel 8 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 6. " [9] ,Channel 9 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 5. " [10] ,Channel 10 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 4. " [11] ,Channel 11 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
textline " "
|
|
bitfld.word 0x00 3. " [12] ,Channel 12 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 2. " [13] ,Channel 13 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 1. " [14] ,Channel 14 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x00 0. " [15] ,Channel 15 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
line.word 0x02 "ADC0_RCOOF10, Range Comparator Over Threshold Flag"
|
|
bitfld.word 0x02 15. " RCOOF[16] ,Channel 16 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 14. " [17] ,Channel 17 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 13. " [18] ,Channel 18 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 12. " [19] ,Channel 19 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 11. " [20] ,Channel 20 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 10. " [21] ,Channel 21 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
textline " "
|
|
bitfld.word 0x02 9. " [22] ,Channel 22 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 8. " [23] ,Channel 23 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 7. " [24] ,Channel 24 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 6. " [25] ,Channel 25 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 5. " [26] ,Channel 26 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 4. " [27] ,Channel 27 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
textline " "
|
|
bitfld.word 0x02 3. " [28] ,Channel 28 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 2. " [29] ,Channel 29 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 1. " [30] ,Channel 30 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
bitfld.word 0x02 0. " [31] ,Channel 31 Over Threshold Flag (Below Lower / Above Upper Threshold)" "Below,Above"
|
|
sif !CPUIS("MB9EF226")
|
|
wgroup.word 0x8C++0x03
|
|
else
|
|
wgroup.word 0x8E++0x03
|
|
endif
|
|
line.word 0x00 "ADC0_RCOINTC32,Range Comparator Interrupt Clear Register"
|
|
bitfld.word 0x00 15. " RCOINTC[0] ,ADC0_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 14. " [1] ,ADC1_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 13. " [2] ,ADC2_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 12. " [3] ,ADC3_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 11. " [4] ,ADC4_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 10. " [5] ,ADC5_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 9. " [6] ,ADC6_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 8. " [7] ,ADC7_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 7. " [8] ,ADC8_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 6. " [9] ,ADC9_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 5. " [10] ,ADC10_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 4. " [11] ,ADC11_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 3. " [12] ,ADC12_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 2. " [13] ,ADC13_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 1. " [14] ,ADC14_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x00 0. " [15] ,ADC15_RCOINT32:RCOINT Clear bit" "No effect,Clear"
|
|
line.word 0x02 "ADC0_RCOINTC10,Range Comparator Interrupt Clear Register"
|
|
bitfld.word 0x02 15. " RCOINTC[16] ,ADC16_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 14. " [17] ,ADC17_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 13. " [18] ,ADC18_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 12. " [19] ,ADC19_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 11. " [20] ,ADC20_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 10. " [21] ,ADC21_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 9. " [22] ,ADC22_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 8. " [23] ,ADC23_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 7. " [24] ,ADC24_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 6. " [25] ,ADC25_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 5. " [26] ,ADC26_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 4. " [27] ,ADC27_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x02 3. " [28] ,ADC28_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 2. " [29] ,ADC29_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 1. " [30] ,ADC30_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
bitfld.word 0x02 0. " [31] ,ADC31_RCOINT10:RCOINT Clear bit" "No effect,Clear"
|
|
tree.end
|
|
width 16.
|
|
tree "Pulse Counter Reload Registers"
|
|
sif !CPUIS("MB9EF226")
|
|
group.byte (0x90+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL0,ADC Pulse Negative Counter Reload Register 0 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x90++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL0,ADC Pulse Positive Counter Reload Register 0 (Start Value)"
|
|
group.byte (0x94+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL1,ADC Pulse Negative Counter Reload Register 1 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x94++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL1,ADC Pulse Positive Counter Reload Register 1 (Start Value)"
|
|
group.byte (0x98+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL2,ADC Pulse Negative Counter Reload Register 2 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x98++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL2,ADC Pulse Positive Counter Reload Register 2 (Start Value)"
|
|
group.byte (0x9C+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL3,ADC Pulse Negative Counter Reload Register 3 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x9C++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL3,ADC Pulse Positive Counter Reload Register 3 (Start Value)"
|
|
group.byte (0xA0+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL4,ADC Pulse Negative Counter Reload Register 4 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xA0++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL4,ADC Pulse Positive Counter Reload Register 4 (Start Value)"
|
|
group.byte (0xA4+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL5,ADC Pulse Negative Counter Reload Register 5 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xA4++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL5,ADC Pulse Positive Counter Reload Register 5 (Start Value)"
|
|
group.byte (0xA8+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL6,ADC Pulse Negative Counter Reload Register 6 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xA8++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL6,ADC Pulse Positive Counter Reload Register 6 (Start Value)"
|
|
group.byte (0xAC+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL7,ADC Pulse Negative Counter Reload Register 7 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xAC++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL7,ADC Pulse Positive Counter Reload Register 7 (Start Value)"
|
|
group.byte (0xB0+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL8,ADC Pulse Negative Counter Reload Register 8 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xB0++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL8,ADC Pulse Positive Counter Reload Register 8 (Start Value)"
|
|
group.byte (0xB4+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL9,ADC Pulse Negative Counter Reload Register 9 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xB4++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL9,ADC Pulse Positive Counter Reload Register 9 (Start Value)"
|
|
group.byte (0xB8+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL10,ADC Pulse Negative Counter Reload Register 10 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xB8++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL10,ADC Pulse Positive Counter Reload Register 10 (Start Value)"
|
|
group.byte (0xBC+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL11,ADC Pulse Negative Counter Reload Register 11 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xBC++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL11,ADC Pulse Positive Counter Reload Register 11 (Start Value)"
|
|
group.byte (0xC0+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL12,ADC Pulse Negative Counter Reload Register 12 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xC0++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL12,ADC Pulse Positive Counter Reload Register 12 (Start Value)"
|
|
group.byte (0xC4+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL13,ADC Pulse Negative Counter Reload Register 13 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xC4++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL13,ADC Pulse Positive Counter Reload Register 13 (Start Value)"
|
|
group.byte (0xC8+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL14,ADC Pulse Negative Counter Reload Register 14 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xC8++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL14,ADC Pulse Positive Counter Reload Register 14 (Start Value)"
|
|
group.byte (0xCC+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL15,ADC Pulse Negative Counter Reload Register 15 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xCC++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL15,ADC Pulse Positive Counter Reload Register 15 (Start Value)"
|
|
group.byte (0xD0+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL16,ADC Pulse Negative Counter Reload Register 16 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xD0++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL16,ADC Pulse Positive Counter Reload Register 16 (Start Value)"
|
|
group.byte (0xD4+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL17,ADC Pulse Negative Counter Reload Register 17 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xD4++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL17,ADC Pulse Positive Counter Reload Register 17 (Start Value)"
|
|
group.byte (0xD8+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL18,ADC Pulse Negative Counter Reload Register 18 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xD8++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL18,ADC Pulse Positive Counter Reload Register 18 (Start Value)"
|
|
group.byte (0xDC+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL19,ADC Pulse Negative Counter Reload Register 19 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xDC++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL19,ADC Pulse Positive Counter Reload Register 19 (Start Value)"
|
|
group.byte (0xE0+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL20,ADC Pulse Negative Counter Reload Register 20 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xE0++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL20,ADC Pulse Positive Counter Reload Register 20 (Start Value)"
|
|
group.byte (0xE4+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL21,ADC Pulse Negative Counter Reload Register 21 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xE4++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL21,ADC Pulse Positive Counter Reload Register 21 (Start Value)"
|
|
group.byte (0xE8+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL22,ADC Pulse Negative Counter Reload Register 22 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xE8++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL22,ADC Pulse Positive Counter Reload Register 22 (Start Value)"
|
|
group.byte (0xEC+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL23,ADC Pulse Negative Counter Reload Register 23 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xEC++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL23,ADC Pulse Positive Counter Reload Register 23 (Start Value)"
|
|
group.byte (0xF0+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL24,ADC Pulse Negative Counter Reload Register 24 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xF0++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL24,ADC Pulse Positive Counter Reload Register 24 (Start Value)"
|
|
group.byte (0xF4+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL25,ADC Pulse Negative Counter Reload Register 25 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xF4++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL25,ADC Pulse Positive Counter Reload Register 25 (Start Value)"
|
|
group.byte (0xF8+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL26,ADC Pulse Negative Counter Reload Register 26 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xF8++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL26,ADC Pulse Positive Counter Reload Register 26 (Start Value)"
|
|
group.byte (0xFC+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL27,ADC Pulse Negative Counter Reload Register 27 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xFC++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL27,ADC Pulse Positive Counter Reload Register 27 (Start Value)"
|
|
group.byte (0x100+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL28,ADC Pulse Negative Counter Reload Register 28 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x100++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL28,ADC Pulse Positive Counter Reload Register 28 (Start Value)"
|
|
group.byte (0x104+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL29,ADC Pulse Negative Counter Reload Register 29 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x104++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL29,ADC Pulse Positive Counter Reload Register 29 (Start Value)"
|
|
group.byte (0x108+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL30,ADC Pulse Negative Counter Reload Register 30 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x108++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL30,ADC Pulse Positive Counter Reload Register 30 (Start Value)"
|
|
group.byte (0x10C+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL31,ADC Pulse Negative Counter Reload Register 31 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x10C++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL31,ADC Pulse Positive Counter Reload Register 31 (Start Value)"
|
|
else
|
|
group.byte (0x92+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL0,ADC Pulse Negative Counter Reload Register 0 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x92++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL0,ADC Pulse Positive Counter Reload Register 0 (Start Value)"
|
|
group.byte (0x96+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL1,ADC Pulse Negative Counter Reload Register 1 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x96++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL1,ADC Pulse Positive Counter Reload Register 1 (Start Value)"
|
|
group.byte (0x9A+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL2,ADC Pulse Negative Counter Reload Register 2 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x9A++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL2,ADC Pulse Positive Counter Reload Register 2 (Start Value)"
|
|
group.byte (0x9E+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL3,ADC Pulse Negative Counter Reload Register 3 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x9E++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL3,ADC Pulse Positive Counter Reload Register 3 (Start Value)"
|
|
group.byte (0xA2+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL4,ADC Pulse Negative Counter Reload Register 4 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xA2++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL4,ADC Pulse Positive Counter Reload Register 4 (Start Value)"
|
|
group.byte (0xA6+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL5,ADC Pulse Negative Counter Reload Register 5 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xA6++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL5,ADC Pulse Positive Counter Reload Register 5 (Start Value)"
|
|
group.byte (0xAA+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL6,ADC Pulse Negative Counter Reload Register 6 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xAA++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL6,ADC Pulse Positive Counter Reload Register 6 (Start Value)"
|
|
group.byte (0xAE+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL7,ADC Pulse Negative Counter Reload Register 7 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xAE++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL7,ADC Pulse Positive Counter Reload Register 7 (Start Value)"
|
|
group.byte (0xB2+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL8,ADC Pulse Negative Counter Reload Register 8 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xB2++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL8,ADC Pulse Positive Counter Reload Register 8 (Start Value)"
|
|
group.byte (0xB6+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL9,ADC Pulse Negative Counter Reload Register 9 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xB6++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL9,ADC Pulse Positive Counter Reload Register 9 (Start Value)"
|
|
group.byte (0xBA+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL10,ADC Pulse Negative Counter Reload Register 10 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xBA++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL10,ADC Pulse Positive Counter Reload Register 10 (Start Value)"
|
|
group.byte (0xBE+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL11,ADC Pulse Negative Counter Reload Register 11 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xBE++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL11,ADC Pulse Positive Counter Reload Register 11 (Start Value)"
|
|
group.byte (0xC2+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL12,ADC Pulse Negative Counter Reload Register 12 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xC2++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL12,ADC Pulse Positive Counter Reload Register 12 (Start Value)"
|
|
group.byte (0xC6+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL13,ADC Pulse Negative Counter Reload Register 13 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xC6++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL13,ADC Pulse Positive Counter Reload Register 13 (Start Value)"
|
|
group.byte (0xCA+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL14,ADC Pulse Negative Counter Reload Register 14 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xCA++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL14,ADC Pulse Positive Counter Reload Register 14 (Start Value)"
|
|
group.byte (0xCE+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL15,ADC Pulse Negative Counter Reload Register 15 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xCE++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL15,ADC Pulse Positive Counter Reload Register 15 (Start Value)"
|
|
group.byte (0xD2+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL16,ADC Pulse Negative Counter Reload Register 16 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xD2++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL16,ADC Pulse Positive Counter Reload Register 16 (Start Value)"
|
|
group.byte (0xD6+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL17,ADC Pulse Negative Counter Reload Register 17 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xD6++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL17,ADC Pulse Positive Counter Reload Register 17 (Start Value)"
|
|
group.byte (0xDA+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL18,ADC Pulse Negative Counter Reload Register 18 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xDA++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL18,ADC Pulse Positive Counter Reload Register 18 (Start Value)"
|
|
group.byte (0xDE+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL19,ADC Pulse Negative Counter Reload Register 19 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xDE++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL19,ADC Pulse Positive Counter Reload Register 19 (Start Value)"
|
|
group.byte (0xE2+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL20,ADC Pulse Negative Counter Reload Register 20 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xE2++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL20,ADC Pulse Positive Counter Reload Register 20 (Start Value)"
|
|
group.byte (0xE6+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL21,ADC Pulse Negative Counter Reload Register 21 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xE6++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL21,ADC Pulse Positive Counter Reload Register 21 (Start Value)"
|
|
group.byte (0xEA+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL22,ADC Pulse Negative Counter Reload Register 22 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xEA++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL22,ADC Pulse Positive Counter Reload Register 22 (Start Value)"
|
|
group.byte (0xEE+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL23,ADC Pulse Negative Counter Reload Register 23 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xEE++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL23,ADC Pulse Positive Counter Reload Register 23 (Start Value)"
|
|
group.byte (0xF2+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL24,ADC Pulse Negative Counter Reload Register 24 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xF2++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL24,ADC Pulse Positive Counter Reload Register 24 (Start Value)"
|
|
group.byte (0xF6+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL25,ADC Pulse Negative Counter Reload Register 25 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xF6++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL25,ADC Pulse Positive Counter Reload Register 25 (Start Value)"
|
|
group.byte (0xFA+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL26,ADC Pulse Negative Counter Reload Register 26 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xFA++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL26,ADC Pulse Positive Counter Reload Register 26 (Start Value)"
|
|
group.byte (0xFE+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL27,ADC Pulse Negative Counter Reload Register 27 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0xFE++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL27,ADC Pulse Positive Counter Reload Register 27 (Start Value)"
|
|
group.byte (0x102+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL28,ADC Pulse Negative Counter Reload Register 28 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x102++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL28,ADC Pulse Positive Counter Reload Register 28 (Start Value)"
|
|
group.byte (0x106+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL29,ADC Pulse Negative Counter Reload Register 29 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x106++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL29,ADC Pulse Positive Counter Reload Register 29 (Start Value)"
|
|
group.byte (0x10A+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL30,ADC Pulse Negative Counter Reload Register 30 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x10A++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL30,ADC Pulse Positive Counter Reload Register 30 (Start Value)"
|
|
group.byte (0x10E+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNRL31,ADC Pulse Negative Counter Reload Register 31 (Start Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Reload Register"
|
|
group.byte 0x10E++0x00
|
|
line.byte 0x00 "ADC0_PCTPRL31,ADC Pulse Positive Counter Reload Register 31 (Start Value)"
|
|
endif
|
|
tree.end
|
|
tree "Pulse Counters"
|
|
sif !CPUIS("MB9EF226")
|
|
rgroup.byte (0x92+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT0,ADC Pulse Negative Counter 0 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x92++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT0,ADC Pulse Positive Counter 0 (Counters Value)"
|
|
rgroup.byte (0x96+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT1,ADC Pulse Negative Counter 1 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x96++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT1,ADC Pulse Positive Counter 1 (Counters Value)"
|
|
rgroup.byte (0x9A+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT2,ADC Pulse Negative Counter 2 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x9A++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT2,ADC Pulse Positive Counter 2 (Counters Value)"
|
|
rgroup.byte (0x9E+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT3,ADC Pulse Negative Counter 3 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x9E++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT3,ADC Pulse Positive Counter 3 (Counters Value)"
|
|
rgroup.byte (0xA2+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT4,ADC Pulse Negative Counter 4 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xA2++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT4,ADC Pulse Positive Counter 4 (Counters Value)"
|
|
rgroup.byte (0xA6+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT5,ADC Pulse Negative Counter 5 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xA6++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT5,ADC Pulse Positive Counter 5 (Counters Value)"
|
|
rgroup.byte (0xAA+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT6,ADC Pulse Negative Counter 6 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xAA++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT6,ADC Pulse Positive Counter 6 (Counters Value)"
|
|
rgroup.byte (0xAE+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT7,ADC Pulse Negative Counter 7 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xAE++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT7,ADC Pulse Positive Counter 7 (Counters Value)"
|
|
rgroup.byte (0xB2+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT8,ADC Pulse Negative Counter 8 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xB2++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT8,ADC Pulse Positive Counter 8 (Counters Value)"
|
|
rgroup.byte (0xB6+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT9,ADC Pulse Negative Counter 9 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xB6++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT9,ADC Pulse Positive Counter 9 (Counters Value)"
|
|
rgroup.byte (0xBA+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT10,ADC Pulse Negative Counter 10 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xBA++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT10,ADC Pulse Positive Counter 10 (Counters Value)"
|
|
rgroup.byte (0xBE+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT11,ADC Pulse Negative Counter 11 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xBE++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT11,ADC Pulse Positive Counter 11 (Counters Value)"
|
|
rgroup.byte (0xC2+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT12,ADC Pulse Negative Counter 12 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xC2++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT12,ADC Pulse Positive Counter 12 (Counters Value)"
|
|
rgroup.byte (0xC6+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT13,ADC Pulse Negative Counter 13 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xC6++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT13,ADC Pulse Positive Counter 13 (Counters Value)"
|
|
rgroup.byte (0xCA+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT14,ADC Pulse Negative Counter 14 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xCA++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT14,ADC Pulse Positive Counter 14 (Counters Value)"
|
|
rgroup.byte (0xCE+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT15,ADC Pulse Negative Counter 15 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xCE++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT15,ADC Pulse Positive Counter 15 (Counters Value)"
|
|
rgroup.byte (0xD2+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT16,ADC Pulse Negative Counter 16 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xD2++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT16,ADC Pulse Positive Counter 16 (Counters Value)"
|
|
rgroup.byte (0xD6+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT17,ADC Pulse Negative Counter 17 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xD6++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT17,ADC Pulse Positive Counter 17 (Counters Value)"
|
|
rgroup.byte (0xDA+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT18,ADC Pulse Negative Counter 18 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xDA++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT18,ADC Pulse Positive Counter 18 (Counters Value)"
|
|
rgroup.byte (0xDE+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT19,ADC Pulse Negative Counter 19 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xDE++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT19,ADC Pulse Positive Counter 19 (Counters Value)"
|
|
rgroup.byte (0xE2+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT20,ADC Pulse Negative Counter 20 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xE2++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT20,ADC Pulse Positive Counter 20 (Counters Value)"
|
|
rgroup.byte (0xE6+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT21,ADC Pulse Negative Counter 21 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xE6++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT21,ADC Pulse Positive Counter 21 (Counters Value)"
|
|
rgroup.byte (0xEA+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT22,ADC Pulse Negative Counter 22 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xEA++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT22,ADC Pulse Positive Counter 22 (Counters Value)"
|
|
rgroup.byte (0xEE+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT23,ADC Pulse Negative Counter 23 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xEE++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT23,ADC Pulse Positive Counter 23 (Counters Value)"
|
|
rgroup.byte (0xF2+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT24,ADC Pulse Negative Counter 24 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xF2++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT24,ADC Pulse Positive Counter 24 (Counters Value)"
|
|
rgroup.byte (0xF6+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT25,ADC Pulse Negative Counter 25 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xF6++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT25,ADC Pulse Positive Counter 25 (Counters Value)"
|
|
rgroup.byte (0xFA+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT26,ADC Pulse Negative Counter 26 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xFA++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT26,ADC Pulse Positive Counter 26 (Counters Value)"
|
|
rgroup.byte (0xFE+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT27,ADC Pulse Negative Counter 27 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xFE++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT27,ADC Pulse Positive Counter 27 (Counters Value)"
|
|
rgroup.byte (0x102+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT28,ADC Pulse Negative Counter 28 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x102++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT28,ADC Pulse Positive Counter 28 (Counters Value)"
|
|
rgroup.byte (0x106+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT29,ADC Pulse Negative Counter 29 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x106++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT29,ADC Pulse Positive Counter 29 (Counters Value)"
|
|
rgroup.byte (0x10A+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT30,ADC Pulse Negative Counter 30 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x10A++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT30,ADC Pulse Positive Counter 30 (Counters Value)"
|
|
rgroup.byte (0x10E+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT31,ADC Pulse Negative Counter 31 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x10E++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT31,ADC Pulse Positive Counter 31 (Counters Value)"
|
|
else
|
|
rgroup.byte (0x94+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT0,ADC Pulse Negative Counter 0 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x94++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT0,ADC Pulse Positive Counter 0 (Counters Value)"
|
|
rgroup.byte (0x98+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT1,ADC Pulse Negative Counter 1 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x98++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT1,ADC Pulse Positive Counter 1 (Counters Value)"
|
|
rgroup.byte (0x9C+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT2,ADC Pulse Negative Counter 2 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x9C++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT2,ADC Pulse Positive Counter 2 (Counters Value)"
|
|
rgroup.byte (0xA0+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT3,ADC Pulse Negative Counter 3 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xA0++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT3,ADC Pulse Positive Counter 3 (Counters Value)"
|
|
rgroup.byte (0xA4+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT4,ADC Pulse Negative Counter 4 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xA4++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT4,ADC Pulse Positive Counter 4 (Counters Value)"
|
|
rgroup.byte (0xA8+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT5,ADC Pulse Negative Counter 5 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xA8++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT5,ADC Pulse Positive Counter 5 (Counters Value)"
|
|
rgroup.byte (0xAC+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT6,ADC Pulse Negative Counter 6 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xAC++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT6,ADC Pulse Positive Counter 6 (Counters Value)"
|
|
rgroup.byte (0xB0+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT7,ADC Pulse Negative Counter 7 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xB0++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT7,ADC Pulse Positive Counter 7 (Counters Value)"
|
|
rgroup.byte (0xB4+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT8,ADC Pulse Negative Counter 8 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xB4++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT8,ADC Pulse Positive Counter 8 (Counters Value)"
|
|
rgroup.byte (0xB8+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT9,ADC Pulse Negative Counter 9 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xB8++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT9,ADC Pulse Positive Counter 9 (Counters Value)"
|
|
rgroup.byte (0xBC+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT10,ADC Pulse Negative Counter 10 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xBC++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT10,ADC Pulse Positive Counter 10 (Counters Value)"
|
|
rgroup.byte (0xC0+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT11,ADC Pulse Negative Counter 11 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xC0++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT11,ADC Pulse Positive Counter 11 (Counters Value)"
|
|
rgroup.byte (0xC4+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT12,ADC Pulse Negative Counter 12 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xC4++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT12,ADC Pulse Positive Counter 12 (Counters Value)"
|
|
rgroup.byte (0xC8+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT13,ADC Pulse Negative Counter 13 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xC8++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT13,ADC Pulse Positive Counter 13 (Counters Value)"
|
|
rgroup.byte (0xCC+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT14,ADC Pulse Negative Counter 14 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xCC++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT14,ADC Pulse Positive Counter 14 (Counters Value)"
|
|
rgroup.byte (0xD0+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT15,ADC Pulse Negative Counter 15 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xD0++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT15,ADC Pulse Positive Counter 15 (Counters Value)"
|
|
rgroup.byte (0xD4+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT16,ADC Pulse Negative Counter 16 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xD4++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT16,ADC Pulse Positive Counter 16 (Counters Value)"
|
|
rgroup.byte (0xD8+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT17,ADC Pulse Negative Counter 17 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xD8++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT17,ADC Pulse Positive Counter 17 (Counters Value)"
|
|
rgroup.byte (0xDC+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT18,ADC Pulse Negative Counter 18 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xDC++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT18,ADC Pulse Positive Counter 18 (Counters Value)"
|
|
rgroup.byte (0xE0+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT19,ADC Pulse Negative Counter 19 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xE0++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT19,ADC Pulse Positive Counter 19 (Counters Value)"
|
|
rgroup.byte (0xE4+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT20,ADC Pulse Negative Counter 20 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xE4++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT20,ADC Pulse Positive Counter 20 (Counters Value)"
|
|
rgroup.byte (0xE8+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT21,ADC Pulse Negative Counter 21 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xE8++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT21,ADC Pulse Positive Counter 21 (Counters Value)"
|
|
rgroup.byte (0xEC+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT22,ADC Pulse Negative Counter 22 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xEC++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT22,ADC Pulse Positive Counter 22 (Counters Value)"
|
|
rgroup.byte (0xF0+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT23,ADC Pulse Negative Counter 23 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xF0++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT23,ADC Pulse Positive Counter 23 (Counters Value)"
|
|
rgroup.byte (0xF4+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT24,ADC Pulse Negative Counter 24 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xF4++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT24,ADC Pulse Positive Counter 24 (Counters Value)"
|
|
rgroup.byte (0xF8+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT25,ADC Pulse Negative Counter 25 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xF8++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT25,ADC Pulse Positive Counter 25 (Counters Value)"
|
|
rgroup.byte (0xFC+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT26,ADC Pulse Negative Counter 26 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0xFC++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT26,ADC Pulse Positive Counter 26 (Counters Value)"
|
|
rgroup.byte (0x100+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT27,ADC Pulse Negative Counter 27 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x100++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT27,ADC Pulse Positive Counter 27 (Counters Value)"
|
|
rgroup.byte (0x104+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT28,ADC Pulse Negative Counter 28 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x104++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT28,ADC Pulse Positive Counter 28 (Counters Value)"
|
|
rgroup.byte (0x108+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT29,ADC Pulse Negative Counter 29 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x108++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT29,ADC Pulse Positive Counter 29 (Counters Value)"
|
|
rgroup.byte (0x10C+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT30,ADC Pulse Negative Counter 30 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x10C++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT30,ADC Pulse Positive Counter 30 (Counters Value)"
|
|
rgroup.byte (0x110+0x01)++0x00
|
|
line.byte 0x00 "ADC0_PCTNCT31,ADC Pulse Negative Counter 31 (Counters Value)"
|
|
hexmask.byte 0x00 0.--4. 1. " D[4:0] ,ADC Pulse Negative Counter Register"
|
|
rgroup.byte 0x110++0x00
|
|
line.byte 0x00 "ADC0_PCTPCT31,ADC Pulse Positive Counter 31 (Counters Value)"
|
|
endif
|
|
tree.end
|
|
tree "Pulse Counter Registers"
|
|
sif !CPUIS("MB9EF226")
|
|
rgroup.word 0x112++0x01
|
|
else
|
|
rgroup.word 0x114++0x01
|
|
endif
|
|
line.word 0x00 "ADC0_PCZF32,ADC Pulse Counter Zero Flag Register"
|
|
bitfld.word 0x00 15. " CTPZF[0] ,Positive Counter 0 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " [1] ,Positive Counter 1 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " [2] ,Positive Counter 2 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 12. " [3] ,Positive Counter 3 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " [4] ,Positive Counter 4 Zero Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 10. " [5] ,Positive Counter 5 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 9. " [6] ,Positive Counter 6 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 8. " [7] ,Positive Counter 7 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 7. " [8] ,Positive Counter 8 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 6. " [9] ,Positive Counter 9 Zero Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 5. " [10] ,Positive Counter 10 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 4. " [11] ,Positive Counter 11 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 3. " [12] ,Positive Counter 12 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 2. " [13] ,Positive Counter 13 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " [14] ,Positive Counter 14 Zero Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " [15] ,Positive Counter 15 Zero Flag" "Not occurred,Occurred"
|
|
sif !CPUIS("MB9EF226")
|
|
rgroup.word 0x110++0x01
|
|
else
|
|
rgroup.word 0x112++0x01
|
|
endif
|
|
line.word 0x00 "ADC0_PCZF10,ADC Pulse Counter Zero Flag Register"
|
|
bitfld.word 0x00 15. " CTPZF[16] ,Positive Counter 16 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " [17] ,Positive Counter 17 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " [18] ,Positive Counter 18 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 12. " [19] ,Positive Counter 19 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " [20] ,Positive Counter 20 Zero Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 10. " [21] ,Positive Counter 21 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 9. " [22] ,Positive Counter 22 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 8. " [23] ,Positive Counter 23 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 7. " [24] ,Positive Counter 24 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 6. " [25] ,Positive Counter 25 Zero Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 5. " [26] ,Positive Counter 26 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 4. " [27] ,Positive Counter 27 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 3. " [28] ,Positive Counter 28 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 2. " [29] ,Positive Counter 29 Zero Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " [30] ,Positive Counter 30 Zero Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " [31] ,Positive Counter 31 Zero Flag" "Not occurred,Occurred"
|
|
sif !CPUIS("MB9EF226")
|
|
wgroup.word 0x116++0x01
|
|
else
|
|
wgroup.word 0x118++0x01
|
|
endif
|
|
line.word 0x00 "ADC0_PCZFC32,ADC Pulse Counter Zero Flag Clear Register"
|
|
bitfld.word 0x00 15. " CTZFC[0] ,Positive Counter 0 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 14. " [1] ,Positive Counter 1 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 13. " [2] ,Positive Counter 2 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 12. " [3] ,Positive Counter 3 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 11. " [4] ,Positive Counter 4 Zero Flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 10. " [5] ,Positive Counter 5 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 9. " [6] ,Positive Counter 6 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " [7] ,Positive Counter 7 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 7. " [8] ,Positive Counter 8 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 6. " [9] ,Positive Counter 9 Zero Flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 5. " [10] ,Positive Counter 10 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 4. " [11] ,Positive Counter 11 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 3. " [12] ,Positive Counter 12 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 2. " [13] ,Positive Counter 13 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 1. " [14] ,Positive Counter 14 Zero Flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 0. " [15] ,Positive Counter 15 Zero Flag Clear" "No effect,Clear"
|
|
sif !CPUIS("MB9EF226")
|
|
wgroup.word 0x114++0x01
|
|
else
|
|
wgroup.word 0x116++0x01
|
|
endif
|
|
line.word 0x00 "ADC0_PCZFC10,ADC Pulse Counter Zero Flag Clear Register"
|
|
bitfld.word 0x00 15. " CTZFC[16] ,Positive Counter 16 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 14. " [17] ,Positive Counter 17 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 13. " [18] ,Positive Counter 18 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 12. " [19] ,Positive Counter 19 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 11. " [20] ,Positive Counter 20 Zero Flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 10. " [21] ,Positive Counter 21 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 9. " [22] ,Positive Counter 22 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " [23] ,Positive Counter 23 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 7. " [24] ,Positive Counter 24 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 6. " [25] ,Positive Counter 25 Zero Flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 5. " [26] ,Positive Counter 26 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 4. " [27] ,Positive Counter 27 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 3. " [28] ,Positive Counter 28 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 2. " [29] ,Positive Counter 29 Zero Flag Clear" "No effect,Clear"
|
|
bitfld.word 0x00 1. " [30] ,Positive Counter 30 Zero Flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 0. " [31] ,Positive Counter 31 Zero Flag Clear" "No effect,Clear"
|
|
sif !CPUIS("MB9EF226")
|
|
group.word 0x11A++0x01
|
|
else
|
|
group.word 0x11C++0x01
|
|
endif
|
|
line.word 0x00 "ADC0_PCIE32,ADC Pulse Counter Interrupt Enable Register"
|
|
setclrfld.word 0x00 15. 0x04 15. 0x08 15. " CTPIE[0]_set/clr ,Counter 0 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 14. 0x04 14. 0x08 14. " [1]_set/clr ,Counter 1 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 13. 0x04 13. 0x08 13. " [2]_set/clr ,Counter 2 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 12. 0x04 12. 0x08 12. " [3]_set/clr ,Counter 3 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 11. 0x04 11. 0x08 11. " [4]_set/clr ,Counter 4 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.word 0x00 10. 0x04 10. 0x08 10. " [5]_set/clr ,Counter 5 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 9. 0x04 9. 0x08 9. " [6]_set/clr ,Counter 6 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 8. 0x04 8. 0x08 8. " [7]_set/clr ,Counter 7 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 7. 0x04 7. 0x08 7. " [8]_set/clr ,Counter 8 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 6. 0x04 6. 0x08 6. " [9]_set/clr ,Counter 9 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.word 0x00 5. 0x04 5. 0x08 5. " [10]_set/clr ,Counter 10 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 4. 0x04 4. 0x08 4. " [11]_set/clr ,Counter 11 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 3. 0x04 3. 0x08 3. " [12]_set/clr ,Counter 12 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 2. 0x04 2. 0x08 2. " [13]_set/clr ,Counter 13 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 1. 0x04 1. 0x08 1. " [14]_set/clr ,Counter 14 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.word 0x00 0. 0x04 0. 0x08 0. " [15]_set/clr ,Counter 15 Interrupt Enable" "Disabled,Enabled"
|
|
sif !CPUIS("MB9EF226")
|
|
group.word 0x118++0x01
|
|
else
|
|
group.word 0x11A++0x01
|
|
endif
|
|
line.word 0x00 "ADC0_PCIE10,ADC Pulse Counter Interrupt Enable Register"
|
|
setclrfld.word 0x00 15. 0x04 15. 0x08 15. " CTPIE[16]_set/clr ,Counter 16 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 14. 0x04 14. 0x08 14. " [17]_set/clr ,Counter 17 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 13. 0x04 13. 0x08 13. " [18]_set/clr ,Counter 18 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 12. 0x04 12. 0x08 12. " [19]_set/clr ,Counter 19 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 11. 0x04 11. 0x08 11. " [20]_set/clr ,Counter 20 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.word 0x00 10. 0x04 10. 0x08 10. " [21]_set/clr ,Counter 21 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 9. 0x04 9. 0x08 9. " [22]_set/clr ,Counter 22 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 8. 0x04 8. 0x08 8. " [23]_set/clr ,Counter 23 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 7. 0x04 7. 0x08 7. " [24]_set/clr ,Counter 24 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 6. 0x04 6. 0x08 6. " [25]_set/clr ,Counter 25 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.word 0x00 5. 0x04 5. 0x08 5. " [26]_set/clr ,Counter 26 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 4. 0x04 4. 0x08 4. " [27]_set/clr ,Counter 27 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 3. 0x04 3. 0x08 3. " [28]_set/clr ,Counter 28 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 2. 0x04 2. 0x08 2. " [29]_set/clr ,Counter 29 Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.word 0x00 1. 0x04 1. 0x08 1. " [30]_set/clr ,Counter 30 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.word 0x00 0. 0x04 0. 0x08 0. " [31]_set/clr ,Counter 31 Interrupt Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree.open "Bus Support Unit"
|
|
tree "BSU 0"
|
|
base ad:0xb07ffc00
|
|
width 13.
|
|
group.word 0x04++0x03
|
|
line.word 0x00 "BSU0_BTSTL,Bus Test Low Register"
|
|
line.word 0x02 "BSU0_BTSTH,Bus Test High Register"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "BSU0_PEN0L,Peripheral Enable 0 Low Register"
|
|
bitfld.word 0x00 0. " ENADC0 ,Peripheral Enable bit for ADC 0" "Not available,Available"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "BSU0_PEN1L,Peripheral Enable 1 Low Register"
|
|
bitfld.word 0x00 3. " ENFRT3 ,Peripheral Enable bit for FRT 3" "Not available,Available"
|
|
bitfld.word 0x00 2. " ENFRT2 ,Peripheral Enable bit for FRT 2" "Not available,Available"
|
|
bitfld.word 0x00 1. " ENFRT1 ,Peripheral Enable bit for FRT 1" "Not available,Available"
|
|
bitfld.word 0x00 0. " ENFRT0 ,Peripheral Enable bit for FRT 0" "Not available,Available"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "BSU0_PEN2L,Peripheral Enable 2 Low Register"
|
|
bitfld.word 0x00 3. " ENICU3 ,Peripheral Enable bit for ICU 3" "Not available,Available"
|
|
bitfld.word 0x00 2. " ENICU2 ,Peripheral Enable bit for ICU 2" "Not available,Available"
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "BSU0_PEN3L,Peripheral Enable 3 Low Register"
|
|
bitfld.word 0x00 1. " ENOCU1 ,Peripheral Enable bit for OCU 1" "Not available,Available"
|
|
bitfld.word 0x00 0. " ENOCU0 ,Peripheral Enable bit for OCU 0" "Not available,Available"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "BSU0_PEN4L,Peripheral Enable 4 Low Register"
|
|
bitfld.word 0x00 0. " ENI2C0 ,Peripheral Enable bit for I2C 0" "Not available,Available"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "BSU0_PEN5L,Peripheral Enable 5 Low Register"
|
|
bitfld.word 0x00 0. " ENUSART0 ,Peripheral Enable bit for USART 0" "Not available,Available"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "BSU0_PEN6L,Peripheral Enable 6 Low Register"
|
|
bitfld.word 0x00 6. " ENSMCTG0 ,Peripheral Enable bit for SMC Trigger 0" "Not available,Available"
|
|
bitfld.word 0x00 5. " ENSMC5 ,Peripheral Enable bit for SMC 5" "Not available,Available"
|
|
bitfld.word 0x00 4. " ENSMC4 ,Peripheral Enable bit for SMC 4" "Not available,Available"
|
|
bitfld.word 0x00 3. " ENSMC3 ,Peripheral Enable bit for SMC 3" "Not available,Available"
|
|
bitfld.word 0x00 2. " ENSMC2 ,Peripheral Enable bit for SMC 2" "Not available,Available"
|
|
bitfld.word 0x00 1. " ENSMC1 ,Peripheral Enable bit for SMC 1" "Not available,Available"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENSMC0 ,Peripheral Enable bit for SMC 0" "Not available,Available"
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "BSU0_PEN7L,Peripheral Enable 7 Low Register"
|
|
bitfld.word 0x00 15. " ENPPG15 ,Peripheral Enable bit for PPG 15" "Not available,Available"
|
|
bitfld.word 0x00 14. " ENPPG14 ,Peripheral Enable bit for PPG 14" "Not available,Available"
|
|
bitfld.word 0x00 13. " ENPPG13 ,Peripheral Enable bit for PPG 13" "Not available,Available"
|
|
bitfld.word 0x00 12. " ENPPG12 ,Peripheral Enable bit for PPG 12" "Not available,Available"
|
|
bitfld.word 0x00 11. " ENPPG11 ,Peripheral Enable bit for PPG 11" "Not available,Available"
|
|
bitfld.word 0x00 10. " ENPPG10 ,Peripheral Enable bit for PPG 10" "Not available,Available"
|
|
textline " "
|
|
bitfld.word 0x00 9. " ENPPG9 ,Peripheral Enable bit for PPG 9" "Not available,Available"
|
|
bitfld.word 0x00 8. " ENPPG8 ,Peripheral Enable bit for PPG 8" "Not available,Available"
|
|
bitfld.word 0x00 7. " ENPPG7 ,Peripheral Enable bit for PPG 7" "Not available,Available"
|
|
bitfld.word 0x00 6. " ENPPG6 ,Peripheral Enable bit for PPG 6" "Not available,Available"
|
|
bitfld.word 0x00 5. " ENPPG5 ,Peripheral Enable bit for PPG 5" "Not available,Available"
|
|
bitfld.word 0x00 4. " ENPPG4 ,Peripheral Enable bit for PPG 4" "Not available,Available"
|
|
textline " "
|
|
bitfld.word 0x00 3. " ENPPG3 ,Peripheral Enable bit for PPG 3" "Not available,Available"
|
|
bitfld.word 0x00 2. " ENPPG2 ,Peripheral Enable bit for PPG 2" "Not available,Available"
|
|
bitfld.word 0x00 1. " ENPPG1 ,Peripheral Enable bit for PPG 1" "Not available,Available"
|
|
bitfld.word 0x00 0. " ENPPG0 ,Peripheral Enable bit for PPG 0" "Not available,Available"
|
|
hgroup.word 0x2E++0x01
|
|
hide.word 0x00 "BSU0_PEN7H,Peripheral Enable 7 High Register"
|
|
hgroup.word 0x30++0x01
|
|
hide.word 0x00 "BSU0_PEN8L,Peripheral Enable 8 Low Register"
|
|
hgroup.word 0x32++0x01
|
|
hide.word 0x00 "BSU0_PEN8H,Peripheral Enable 8 High Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "BSU0_PEN9L,Peripheral Enable 9 Low Register"
|
|
bitfld.word 0x00 3. " ENPPGGRP3 ,Peripheral Enable bit for PPG Group Control 3" "Not available,Available"
|
|
bitfld.word 0x00 2. " ENPPGGRP2 ,Peripheral Enable bit for PPG Group Control 2" "Not available,Available"
|
|
bitfld.word 0x00 1. " ENPPGGRP1 ,Peripheral Enable bit for PPG Group Control 1" "Not available,Available"
|
|
bitfld.word 0x00 0. " ENPPGGRP0 ,Peripheral Enable bit for PPG Group Control 0" "Not available,Available"
|
|
group.word 0x36++0x01
|
|
line.word 0x00 "BSU0_PEN9H,Peripheral Enable 9 High Register"
|
|
bitfld.word 0x00 0. " ENPPGGLC0 ,Peripheral Enable bit for PPG Global Control" "Not available,Available"
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF126"&&cpu()!="MB9DF125")
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "BSU0_PEN11L,Peripheral Enable 11 Low Register"
|
|
bitfld.word 0x00 3. " ENBMC3 ,Peripheral Enable bit for BMC 3" "Not available,Available"
|
|
bitfld.word 0x00 2. " ENBMC2 ,Peripheral Enable bit for BMC 2" "Not available,Available"
|
|
bitfld.word 0x00 1. " ENBMC1 ,Peripheral Enable bit for BMC 1" "Not available,Available"
|
|
bitfld.word 0x00 0. " ENBMC0 ,Peripheral Enable bit for BMC 0" "Not available,Available"
|
|
else
|
|
hgroup.word 0x3C++0x01
|
|
hide.word 0x00 "BSU0_PEN11L,Peripheral Enable 11 Low Register"
|
|
endif
|
|
width 0x0b
|
|
tree.end
|
|
tree "BSU 1"
|
|
base ad:0xb08ffc00
|
|
width 13.
|
|
group.word 0x04++0x03
|
|
line.word 0x00 "BSU1_BTSTL,Bus Test Low Register"
|
|
line.word 0x02 "BSU1_BTSTH,Bus Test High Register"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "BSU1_PEN0L,Peripheral Enable 0 Low Register"
|
|
bitfld.word 0x00 0. " ENSG0 ,Peripheral Enable bit for Sound Generator 0" "Not available,Available"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "BSU1_PEN1L,Peripheral Enable 1 Low Register"
|
|
sif (cpu()!="MB9DF125"&&cpu()!="MB9EF226")
|
|
bitfld.word 0x00 2. " ENCAN2 ,Peripheral Enable bit for CAN 2" "Not available,Available"
|
|
endif
|
|
bitfld.word 0x00 1. " ENCAN1 ,Peripheral Enable bit for CAN 1" "Not available,Available"
|
|
bitfld.word 0x00 0. " ENCAN0 ,Peripheral Enable bit for CAN 0" "Not available,Available"
|
|
hgroup.word 0x18++0x01
|
|
hide.long 0x00 "BSU1_PEN2L,Peripheral Enable 2 Low Register"
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "BSU1_PEN3L,Peripheral Enable 3 Low Register"
|
|
bitfld.word 0x00 3. " ENFRT19 ,Peripheral Enable bit for FRT 19" "Not available,Available"
|
|
bitfld.word 0x00 2. " ENFRT18 ,Peripheral Enable bit for FRT 18" "Not available,Available"
|
|
bitfld.word 0x00 1. " ENFRT17 ,Peripheral Enable bit for FRT 17" "Not available,Available"
|
|
bitfld.word 0x00 0. " ENFRT16 ,Peripheral Enable bit for FRT 16" "Not available,Available"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "BSU1_PEN4L,Peripheral Enable 4 Low Register"
|
|
bitfld.word 0x00 3. " ENICU19 ,Peripheral Enable bit for ICU 19" "Not available,Available"
|
|
bitfld.word 0x00 2. " ENICU18 ,Peripheral Enable bit for ICU 18" "Not available,Available"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "BSU1_PEN5L,Peripheral Enable 5 Low Register"
|
|
bitfld.word 0x00 1. " ENOCU17 ,Peripheral Enable bit for OCU 17" "Not available,Available"
|
|
bitfld.word 0x00 0. " ENOCU16 ,Peripheral Enable bit for OCU 16" "Not available,Available"
|
|
hgroup.word 0x28++0x01
|
|
hide.word 0x00 "BSU1_PEN6L,Peripheral Enable 6 Low Register"
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "BSU1_PEN7L,Peripheral Enable 7 Low Register"
|
|
bitfld.word 0x00 0. " ENUSART6 ,Peripheral Enable bit for USART 6" "Not available,Available"
|
|
hgroup.word 0x30++0x01
|
|
hide.word 0x00 "BSU1_PEN8L,Peripheral Enable 8 Low Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "BSU1_PEN9L,Peripheral Enable 9 Low Register"
|
|
bitfld.word 0x00 7. " ENPPG71 ,Peripheral Enable bit for PPG 71" "Not available,Available"
|
|
bitfld.word 0x00 6. " ENPPG70 ,Peripheral Enable bit for PPG 70" "Not available,Available"
|
|
bitfld.word 0x00 5. " ENPPG69 ,Peripheral Enable bit for PPG 69" "Not available,Available"
|
|
bitfld.word 0x00 4. " ENPPG68 ,Peripheral Enable bit for PPG 68" "Not available,Available"
|
|
bitfld.word 0x00 3. " ENPPG67 ,Peripheral Enable bit for PPG 67" "Not available,Available"
|
|
bitfld.word 0x00 2. " ENPPG66 ,Peripheral Enable bit for PPG 66" "Not available,Available"
|
|
textline " "
|
|
bitfld.word 0x00 1. " ENPPG65 ,Peripheral Enable bit for PPG 65" "Not available,Available"
|
|
bitfld.word 0x00 0. " ENPPG64 ,Peripheral Enable bit for PPG 64" "Not available,Available"
|
|
hgroup.word 0x36++0x01
|
|
hide.word 0x00 "BSU1_PEN9H,Peripheral Enable 9 High Register"
|
|
hgroup.word 0x38++0x01
|
|
hide.word 0x00 "BSU1_PEN10L,Peripheral Enable 10 Low Register"
|
|
hgroup.word 0x3a++0x01
|
|
hide.word 0x00 "BSU1_PEN10H,Peripheral Enable 10 High Register"
|
|
group.word 0x3c++0x01
|
|
line.word 0x00 "BSU1_PEN11L,Peripheral Enable 11 Low Register"
|
|
bitfld.word 0x00 1. " ENPPGGRP17 ,Peripheral Enable bit for PPG Group Control 17" "Not available,Available"
|
|
bitfld.word 0x00 0. " ENPPGGRP16 ,Peripheral Enable bit for PPG Group Control 16" "Not available,Available"
|
|
group.word 0x3E++0x01
|
|
line.word 0x00 "BSU1_PEN11H,Peripheral Enable 11 High Register"
|
|
bitfld.word 0x00 0. " ENPPGGLC1 ,Peripheral Enable bit for PPG Global Control 1" "Not available,Available"
|
|
width 12.
|
|
tree.end
|
|
tree "BSU 3"
|
|
base ad:0xb0affc00
|
|
width 11.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BSU3_BTST,Bus Test Register"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "BSU3_PEN2,Peripheral Enable 2 Register"
|
|
bitfld.long 0x00 9. " ENRLT9 ,Peripheral Enable bit for RLT 9" "Not available,Available"
|
|
bitfld.long 0x00 8. " ENRLT8 ,Peripheral Enable bit for RLT 8" "Not available,Available"
|
|
bitfld.long 0x00 7. " ENRLT7 ,Peripheral Enable bit for RLT 7" "Not available,Available"
|
|
bitfld.long 0x00 6. " ENRLT6 ,Peripheral Enable bit for RLT 6" "Not available,Available"
|
|
bitfld.long 0x00 5. " ENRLT5 ,Peripheral Enable bit for RLT 5" "Not available,Available"
|
|
bitfld.long 0x00 4. " ENRLT4 ,Peripheral Enable bit for RLT 4" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ENRLT3 ,Peripheral Enable bit for RLT 3" "Not available,Available"
|
|
bitfld.long 0x00 2. " ENRLT2 ,Peripheral Enable bit for RLT 2" "Not available,Available"
|
|
bitfld.long 0x00 1. " ENRLT1 ,Peripheral Enable bit for RLT 1" "Not available,Available"
|
|
bitfld.long 0x00 0. " ENRLT0 ,Peripheral Enable bit for RLT 0" "Not available,Available"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "BSU3_PEN4,Peripheral Enable 4 Register"
|
|
bitfld.long 0x00 0. " ENUDC0 ,Peripheral Enable bit for UDC 0" "Not available,Available"
|
|
width 0x0b
|
|
tree.end
|
|
tree "BSU 4"
|
|
base ad:0xb0bffc00
|
|
width 11.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BSU4_BTST,Bus Test Register"
|
|
sif (cpu()!="MB9DF125"&&cpu()!="MB9DF126")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "BSU4_PEN1,Peripheral Enable 1 Register"
|
|
bitfld.long 0x00 0. " ENETH0 ,Peripheral Enable bit for ETH 0" "Not available,Available"
|
|
endif
|
|
sif cpu()=="MB9EF226"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "BSU4_PEN2,Peripheral Enable 2 Register"
|
|
bitfld.long 0x00 0. " ENMLB0 ,Peripheral Enable bit for MLB 0" "Not available,Available"
|
|
endif
|
|
hgroup.long 0x1c++0x03
|
|
hide.long 0x00 "BSU4_PEN3,Peripheral Enable 3 Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "BSU4_PEN4,Peripheral Enable 4 Register"
|
|
bitfld.long 0x00 1. " ENI2S1 ,Peripheral Enable bit for I2S 1" "Not available,Available"
|
|
bitfld.long 0x00 0. " ENI2S0 ,Peripheral Enable bit for I2S 0" "Not available,Available"
|
|
hgroup.long 0x24++0x03
|
|
hide.long 0x00 "BSU4_PEN5,Peripheral Enable 5 Register"
|
|
group.long 0x28++0x0b
|
|
line.long 0x00 "BSU4_PEN6,Peripheral Enable 6 Register"
|
|
bitfld.long 0x00 0. " ENCRC0 ,Peripheral Enable bit for CRC 0" "Not available,Available"
|
|
line.long 0x04 "BSU4_PEN7,Peripheral Enable 7 Register"
|
|
bitfld.long 0x04 2. " ENSPI2 ,Peripheral Enable bit for SPI 2" "Not available,Available"
|
|
bitfld.long 0x04 1. " ENSPI1 ,Peripheral Enable bit for SPI 1" "Not available,Available"
|
|
bitfld.long 0x04 0. " ENSPI0 ,Peripheral Enable bit for SPI 0" "Not available,Available"
|
|
line.long 0x08 "BSU4_PEN8,Peripheral Enable 8 Register"
|
|
bitfld.long 0x08 0. " ENARH ,Peripheral Enable bit for ARH 0" "Not available,Available"
|
|
width 12.
|
|
tree.end
|
|
tree "BSU 5"
|
|
sif !CPUIS("MB9EF226")
|
|
base ad:0xb0cffc00
|
|
else
|
|
base ad:0xB0D00BC4
|
|
endif
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BSU5_BTST,Bus Test Register"
|
|
width 12.
|
|
tree.end
|
|
tree "BSU 6"
|
|
base ad:0xb0418000
|
|
width 12.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BSU6_BTST,Bus Test Register"
|
|
group.long 0x018++0x03
|
|
line.long 0x00 "BSU6_PEN2,Peripheral Enable 2 Register"
|
|
bitfld.long 0x00 8. " ENEEFCFG ,Peripheral Enable bit for EEFCFG in MEMCFG" "Not available,Available"
|
|
group.long 0x020++0x03
|
|
line.long 0x00 "BSU6_PEN4,Peripheral Enable 4 Register"
|
|
bitfld.long 0x00 0. " ENEEFLASHMIR0 ,Peripheral Enable bit for EEFLASH Mirror Area 0 in MEMCFG" "Not available,Available"
|
|
group.long 0x040++0x03
|
|
line.long 0x00 "BSU6_PEN12,Peripheral Enable 12 Register"
|
|
bitfld.long 0x00 0. " ENEEFLASHMIR1 ,Peripheral Enable bit for EEFLASH Mirror Area 1 in MEMCFG" "Not available,Available"
|
|
group.long 0x060++0x03
|
|
line.long 0x00 "BSU6_PEN20,Peripheral Enable 20 Register"
|
|
bitfld.long 0x00 0. " ENEEFLASHMIR2 ,Peripheral Enable bit for EEFLASH Mirror Area 2 in MEMCFG" "Not available,Available"
|
|
width 12.
|
|
tree.end
|
|
tree "BSU 7"
|
|
base ad:0xb06ffc00
|
|
width 11.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BSU7_BTST,Bus Test Register"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "BSU7_PEN3,Peripheral Enable 3 Register"
|
|
bitfld.long 0x00 0. " ENRTC ,Peripheral Enable bit for RTC in MCUCFG" "Not available,Available"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "BSU7_PEN5,Peripheral Enable 5 Register"
|
|
bitfld.long 0x00 0. " ENEICU0 ,Peripheral Enable bit for EICU 0 in MCUCFG" "Not available,Available"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "BSU7_PEN7,Peripheral Enable 7 Register"
|
|
bitfld.long 0x00 12. " ENRETRAMBANK3 ,Peripheral Enable bit for RETRAMBANK 3 in MCUCFG" "Not available,Available"
|
|
bitfld.long 0x00 8. " ENRETRAMBANK2 ,Peripheral Enable bit for RETRAMBANK 2 in MCUCFG" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ENRETRAMBANK1 ,Peripheral Enable bit for RETRAMBANK 1 in MCUCFG" "Not available,Available"
|
|
bitfld.long 0x00 0. " ENRETRAMBANK0 ,Peripheral Enable bit for RETRAMBANK 0 in MCUCFG" "Not available,Available"
|
|
hgroup.long 0x30++0x03
|
|
hide.long 0x00 "BSU7_PEN8,Peripheral Enable 8 Register"
|
|
width 12.
|
|
tree.end
|
|
tree "BSU 8"
|
|
base ad:0xB007FC00
|
|
width 11.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BSU8_BTST,Bus Test Register"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "BSU8_PEN0,Peripheral Enable 0 Register"
|
|
bitfld.long 0x00 0. " ENHSSPI0 ,Peripheral Enable bit for HSSPI0" "Not available,Available"
|
|
width 0x0b
|
|
tree.end
|
|
tree.end
|
|
sif (cpu()!="MB9DF126"&&cpu()!="MB9DF125"&&cpu()!="MB9EF226")
|
|
tree.open "Ethernet"
|
|
tree "FastMAC"
|
|
base ad:0xb0b08000
|
|
width 16.
|
|
tree "Output and Mode Registers"
|
|
group.byte 0x00++0x01
|
|
line.byte 0x00 "ETH0_OEN,FastMAC0 Output Enable Register"
|
|
bitfld.byte 0x00 1. " MIIOE ,MII Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " MDIOOE ,MDIO Output Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "ETH0_WOL,FastMAC0 Wake On LAN Register"
|
|
bitfld.byte 0x01 0. " MPM ,Magic Packet Mode (MPM)" "Disabled,Enabled"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ETH0_EMODE,FastMAC0 Mode Register"
|
|
bitfld.long 0x00 16. " JUMBO ,Jumbo Frame Reception" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " MPSUP ,Suppress Preamble Transmission on MDIO" "Transmit,Suppress"
|
|
bitfld.long 0x00 14. " TXBRDY ,Buffer Descriptor is Ready in TX-BDT" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RTRY ,No Collision-Retry Limit" "Limited,Not limited"
|
|
bitfld.long 0x00 12. " SWPREQ ,Software Request for Pause Frame Transmission" "No request,Request"
|
|
bitfld.long 0x00 11. " PD ,Pause Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 10. " APT ,Automatic Pause Transmission" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PADTX ,FCS and Pad Transmission Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " BDAF ,Broadcast Destination Address Filter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MDAF ,Multicast Destination Address Filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " UDAF ,Unicast Destination Address Filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PRO ,Promiscuous Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DUPLEX ,Duplex Mode" "Half-duplex,Full duplex"
|
|
bitfld.long 0x00 3. " FAST ,Fast-Ethernet Mode" "10 Mbps,100 Mbps"
|
|
bitfld.long 0x00 2. " RXGD ,Receiver (RXGD) Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXGD ,Transmitter (TXGD) Disable" "No,Yes"
|
|
bitfld.long 0x00 0. " SRST ,Soft Reset" "No reset,Reset"
|
|
width 16.
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "ETH0_PMODE,FastMAC0 PTP Mode Register"
|
|
hexmask.word.byte 0x00 8.--15. 0x1 " PTPDOMAINNUMBER ,PTP Domain Number"
|
|
bitfld.word 0x00 2. " PTPTXBRDY ,Request for Transmission of PTP Frame" "Not requested,Requested"
|
|
bitfld.word 0x00 1. " PTPRDA ,Accept PTP Frames if PTP is Disabled" "Discarded,Handled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " PTPEN ,PTP Enable" "Disabled,Enabled"
|
|
width 16.
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "ETH0_FMODE,FastMAC0 Flexi Filter Mode Register"
|
|
bitfld.word 0x0 15. " CE7 ,Channel 7 Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " CE6 ,Channel 6 Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " CE5 ,Channel 5 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " CE4 ,Channel 4 Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " CE3 ,Channel 3 Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " CE2 ,Channel 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " CE1 ,Channel 1 Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " CE0 ,Channel 0 Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 7. " UACCEN ,Virtual Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " FFIE ,Global Flexi-Filter Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " FFEN ,Flexi-Filter Enable" "Disabled,Enabled"
|
|
width 16.
|
|
tree.end
|
|
tree "Interrupt Registers"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "ETH0_EIE,FastMAC0 Interrupt Enable Register"
|
|
bitfld.long 0x00 18. " EARLYE ,EARLY Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RTRYFE ,RTRYF Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " LERRE ,LERR Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FCSE ,FCS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ALNE ,ALN Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " LNGE ,LNG Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PHYE ,PHY Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " MDONEE ,MDONE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " LUPE ,LUP Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LFE ,LF Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MDEE ,MDE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " RXSE ,RXS Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXSE ,TXS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RXPE ,RXP Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SWPACKE ,SWPACK Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RXBHOE ,RXBHO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXBHOE ,TXBHO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RXDE ,RXD Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TXDE ,TXD Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "ETH0_PIE,FastMAC0 PTP Interrupt Enable Register"
|
|
bitfld.long 0x04 29. " MGMTRXE ,MGMTRX Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " SIGNRXE ,SIGNRX Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " ANNRXE ,ANNRX Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 26. " PDRPFUPRXE ,PDRPFUPRX Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 25. " DRPRXE ,DRPRX Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " FUPRXE ,FUPRX Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PDRPRXE ,PDRPRX Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " PDRQRXE ,PDRQRX Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " DRQRXE ,DRQRX Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SYNCRXE ,SYNCRX Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " PTPTXACKE ,PTPTXACK Interrupt Enable" "Disabled,Enabled"
|
|
group.byte 0x18++0x1
|
|
line.byte 0x00 "ETH0_FMIE,FastMAC0 Flexi Filter Interrupt on Match Enable Register"
|
|
bitfld.byte 0x00 7. " IE7 ,Channel 7 Interrupt on Match Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " IE6 ,Channel 6 Interrupt on Match Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " IE5 ,Channel 5 Interrupt on Match Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " IE4 ,Channel 4 Interrupt on Match Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " IE3 ,Channel 3 Interrupt on Match Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " IE2 ,Channel 2 Interrupt on Match Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IE1 ,Channel 1 Interrupt on Match Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " IE0 ,Channel 0 Interrupt on Match Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "ETH0_ARIE,FastMAC0 Flexi Filter Interrupt On Reply Enable Register"
|
|
bitfld.byte 0x01 7. " IE7 ,Channel 7 Interrupt on Reply Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " IE6 ,Channel 6 Interrupt on Reply Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5. " IE5 ,Channel 5 Interrupt on Reply Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 4. " IE4 ,Channel 4 Interrupt on Reply Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 3. " IE3 ,Channel 3 Interrupt on Reply Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 2. " IE2 ,Channel 2 Interrupt on Reply Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " IE1 ,Channel 1 Interrupt on Reply Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " IE0 ,Channel 0 Interrupt on Reply Enable" "Disabled,Enabled"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "ETH0_EIR,FastMAC0 Interrupt Request Register"
|
|
bitfld.long 0x00 18. " EARLY ,EARLY Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " RTRYF ,RTRYF Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " LERR ,LERR Interrupt Request" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FCS ,FCS Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " ALN ,ALN Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x00 13. " LNG ,LNG Interrupt Request" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PHY ,PHY Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " MDONE ,MDONE Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " LUP ,LUP Interrupt Request" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LF ,LF Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " MDE ,MDE Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " RXS ,RXS Interrupt Request" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXS ,TXS Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " RXP ,RXP Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " SWPACK ,SWPACK Interrupt Request" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RXBHO ,RXBHO Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " TXBHO ,TXBHO Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x00 1. " RXD ,RXD Interrupt Request" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TXD ,TXD Interrupt Request" "Not pending,Pending"
|
|
line.long 0x04 "ETH0_PIR,FastMAC0 PTP Interrupt Request Register"
|
|
bitfld.long 0x04 29. " MGMTRX ,MGMTRX Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x04 28. " SIGNRX ,SIGNRX Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x04 27. " ANNRX ,ANNRX Interrupt Request" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 26. " PDRPFUPRX ,PDRPFUPRX Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x04 25. " DRPRX ,DRPRX Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " FUPRX ,FUPRX Interrupt Request" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PDRPRX ,PDRPRX Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x04 10. " PDRQRX ,PDRQRX Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x04 9. " DRQRX ,DRQRX Interrupt Request" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 8. " SYNCRX ,SYNCRX Interrupt Request" "Not pending,Pending"
|
|
bitfld.long 0x04 0. " PTPTXACK ,PTPTXACK Interrupt Request" "Not pending,Pending"
|
|
rgroup.byte 0x24++0x03
|
|
line.byte 0x00 "ETH0_FMIR,FastMAC0 Flexi Filter Interrupt on Match Request Register"
|
|
bitfld.byte 0x00 7. " IR7 ,Channel 7 Interrupt on Match Request" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 6. " IR6 ,Channel 6 Interrupt on Match Request" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 5. " IR5 ,Channel 5 Interrupt on Match Request" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " IR4 ,Channel 4 Interrupt on Match Request" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 3. " IR3 ,Channel 3 Interrupt on Match Request" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 2. " IR2 ,Channel 2 Interrupt on Match Request" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IR1 ,Channel 1 Interrupt on Match Request" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " IR0 ,Channel 0 Interrupt on Match Request" "Not occurred,Occurred"
|
|
line.byte 0x01 "ETH0_FMIO,FastMAC0 Flexi Filter Interrupt Overrun Request Register"
|
|
bitfld.byte 0x01 7. " IO7 ,Channel 7 Match Interrupt Overrun" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 6. " IO6 ,Channel 6 Match Interrupt Overrun" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 5. " IO5 ,Channel 5 Match Interrupt Overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 4. " IO4 ,Channel 4 Match Interrupt Overrun" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 3. " IO3 ,Channel 3 Match Interrupt Overrun" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 2. " IO2 ,Channel 2 Match Interrupt Overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " IO1 ,Channel 1 Match Interrupt Overrun" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 0. " IO0 ,Channel 0 Match Interrupt Overrun" "Not occurred,Occurred"
|
|
line.byte 0x02 "ETH0_ARIR,FastMAC0 Flexi Filter Interrupt on Reply Request Register"
|
|
bitfld.byte 0x02 7. " IR7 ,Channel 7 Auto Reply Interrupt Request" "Not pending,Pending"
|
|
bitfld.byte 0x02 6. " IR6 ,Channel 6 Auto Reply Interrupt Request" "Not pending,Pending"
|
|
bitfld.byte 0x02 5. " IR5 ,Channel 5 Auto Reply Interrupt Request" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.byte 0x02 4. " IR4 ,Channel 4 Auto Reply Interrupt Request" "Not pending,Pending"
|
|
bitfld.byte 0x02 3. " IR3 ,Channel 3 Auto Reply Interrupt Request" "Not pending,Pending"
|
|
bitfld.byte 0x02 2. " IR2 ,Channel 2 Auto Reply Interrupt Request" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.byte 0x02 1. " IR1 ,Channel 1 Auto Reply Interrupt Request" "Not pending,Pending"
|
|
bitfld.byte 0x02 0. " IR0 ,Channel 0 Auto Reply Interrupt Request" "Not pending,Pending"
|
|
line.byte 0x03 "ETH0_ARIO,FastMAC0 Flexi Filter Reply Interrupt Overrun Register"
|
|
bitfld.byte 0x03 7. " IO7 ,Channel 7 Reply Interrupt Overrun" "Not occurred,Occurred"
|
|
bitfld.byte 0x03 6. " IO6 ,Channel 6 Reply Interrupt Overrun" "Not occurred,Occurred"
|
|
bitfld.byte 0x03 5. " IO5 ,Channel 5 Reply Interrupt Overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x03 4. " IO4 ,Channel 4 Reply Interrupt Overrun" "Not occurred,Occurred"
|
|
bitfld.byte 0x03 3. " IO3 ,Channel 3 Reply Interrupt Overrun" "Not occurred,Occurred"
|
|
bitfld.byte 0x03 2. " IO2 ,Channel 2 Reply Interrupt Overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x03 1. " IO1 ,Channel 1 Reply Interrupt Overrun" "Not occurred,Occurred"
|
|
bitfld.byte 0x03 0. " IO0 ,Channel 0 Reply Interrupt Overrun" "Not occurred,Occurred"
|
|
wgroup.long 0x28++0x07
|
|
line.long 0x00 "ETH0_EIC,FastMAC0 Interrupt Clear Register"
|
|
bitfld.long 0x00 18. " EARLYC ,EARLY Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " RTRYFC ,RTRYF Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " LERRC ,LERR Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FCSC ,FCS Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " ALNC ,ALN Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 13. " LNGC ,LNG Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PHYC ,PHY Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " MDONEC ,MDONE Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " LUPC ,LUP Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LFC ,LF Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " MDEC ,MDE Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 7. " RXSC ,RXS Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXSC ,TXS Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " RXPC ,RXP Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " SWPACKC ,SWPACK Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RXBHOC ,RXBHO Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " TXBHOC ,TXBHO Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " RXDC ,RXD Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TXDC ,TXD Interrupt Clear" "No effect,Clear"
|
|
line.long 0x04 "ETH0_PIC,FastMAC0 PTP Interrupt Clear Register"
|
|
bitfld.long 0x04 29. " MGMTRXC ,MGMTRX Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x04 28. " SIGNRC ,SIGNRX Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x04 27. " ANNRXC ,ANNRX Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 26. " PDRPFUPRXC ,PDRPFUPRX Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x04 25. " DRPRXC ,DRPRX Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x04 24. " FUPRXC ,FUPRX Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PDRPRXC ,PDRPRX Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x04 18. " PDRQRXC ,PDRQRX Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x04 17. " DRQRXC ,DRQRX Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SYNCRXC ,SYNCRX Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x04 0. " PTPTXACKC ,PTPTXACK Interrupt Clear" "No effect,Clear"
|
|
wgroup.byte 0x30++0x03
|
|
line.byte 0x00 "ETH0_FMIC,FastMAC0 Flexi Filter Interrupt on Match Clear Register"
|
|
bitfld.byte 0x00 7. " IC7 ,Channel 7 Interrupt on Match Clear" "No effect,Clear"
|
|
bitfld.byte 0x00 6. " IC6 ,Channel 6 Interrupt on Match Clear" "No effect,Clear"
|
|
bitfld.byte 0x00 5. " IC5 ,Channel 5 Interrupt on Match Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " IC4 ,Channel 4 Interrupt on Match Clear" "No effect,Clear"
|
|
bitfld.byte 0x00 3. " IC3 ,Channel 3 Interrupt on Match Clear" "No effect,Clear"
|
|
bitfld.byte 0x00 2. " IC2 ,Channel 2 Interrupt on Match Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IC1 ,Channel 1 Interrupt on Match Clear" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " IC0 ,Channel 0 Interrupt on Match Clear" "No effect,Clear"
|
|
line.byte 0x01 "ETH0_FMOC,FastMAC0 Flexi Filter Interrupt Overrun Clear Register"
|
|
bitfld.byte 0x01 7. " OC7 ,Channel 7 Match Interrupt Overrun" "No effect,Clear"
|
|
bitfld.byte 0x01 6. " OC6 ,Channel 6 Match Interrupt Overrun" "No effect,Clear"
|
|
bitfld.byte 0x01 5. " OC5 ,Channel 5 Match Interrupt Overrun" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x01 4. " OC4 ,Channel 4 Match Interrupt Overrun" "No effect,Clear"
|
|
bitfld.byte 0x01 3. " OC3 ,Channel 3 Match Interrupt Overrun" "No effect,Clear"
|
|
bitfld.byte 0x01 2. " OC2 ,Channel 2 Match Interrupt Overrun" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " OC1 ,Channel 1 Match Interrupt Overrun" "No effect,Clear"
|
|
bitfld.byte 0x01 0. " OC0 ,Channel 0 Match Interrupt Overrun" "No effect,Clear"
|
|
line.byte 0x02 "ETH0_ARIC,FastMAC0 Flexi Filter Interrupt on Reply Clear Register"
|
|
bitfld.byte 0x02 7. " IC7 ,Channel 7 Interrupt on Reply Clear" "No effect,Clear"
|
|
bitfld.byte 0x02 6. " IC6 ,Channel 6 Interrupt on Reply Clear" "No effect,Clear"
|
|
bitfld.byte 0x02 5. " IC5 ,Channel 5 Interrupt on Reply Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x02 4. " IC4 ,Channel 4 Interrupt on Reply Clear" "No effect,Clear"
|
|
bitfld.byte 0x02 3. " IC3 ,Channel 3 Interrupt on Reply Clear" "No effect,Clear"
|
|
bitfld.byte 0x02 2. " IC2 ,Channel 2 Interrupt on Reply Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x02 1. " IC1 ,Channel 1 Interrupt on Reply Clear" "No effect,Clear"
|
|
bitfld.byte 0x02 0. " IC0 ,Channel 0 Interrupt on Reply Clear" "No effect,Clear"
|
|
line.byte 0x03 "ETH0_AROC,FastMAC0 Flexi Filter Reply Interrupt Overrun Clear Register"
|
|
bitfld.byte 0x03 7. " OC7 ,Channel 7 Reply Interrupt Overrun Clear" "No effect,Clear"
|
|
bitfld.byte 0x03 6. " OC6 ,Channel 6 Reply Interrupt Overrun Clear" "No effect,Clear"
|
|
bitfld.byte 0x03 5. " OC5 ,Channel 5 Reply Interrupt Overrun Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x03 4. " OC4 ,Channel 4 Reply Interrupt Overrun Clear" "No effect,Clear"
|
|
bitfld.byte 0x03 3. " OC3 ,Channel 3 Reply Interrupt Overrun Clear" "No effect,Clear"
|
|
bitfld.byte 0x03 2. " OC2 ,Channel 2 Reply Interrupt Overrun Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x03 1. " OC1 ,Channel 1 Reply Interrupt Overrun Clear" "No effect,Clear"
|
|
bitfld.byte 0x03 0. " OC0 ,Channel 0 Reply Interrupt Overrun Clear" "No effect,Clear"
|
|
group.byte 0x34++0x0
|
|
line.byte 0x00 "ETH0_HIE,FastMAC0 High Priority Frame Interrupt Enable Register"
|
|
bitfld.byte 0x00 0. " HPBHOE ,HPBHO Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.byte 0x35++0x00
|
|
line.byte 0x00 "ETH0_HIR,FastMAC0 High Priority Frame Interrupt Request Register"
|
|
bitfld.byte 0x00 0. " HPBHO ,HPBHO Interrupt Request" "Not pending,Pending"
|
|
wgroup.byte 0x36++0x00
|
|
line.byte 0x00 "ETH0_HIC,FastMAC0 High Priority Frame Interrupt Clear Register"
|
|
bitfld.byte 0x00 0. " HPBHOC ,HPBHO Interrupt Clear" "No effect,Clear"
|
|
tree.end
|
|
tree "Pause Time Registers"
|
|
group.word 0x38++0x03
|
|
line.word 0x00 "ETH0_TXPTIM,FastMAC0 TX Pause Time Register (TX Pause Timer Value)"
|
|
line.word 0x02 "ETH0_RXPTIM,FastMAC0 RX Pause Time Register (RX Pause Timer Value)"
|
|
tree.end
|
|
tree "MAC Station Address Registers"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "ETH0_MACAD0,FastMAC0 MAC Station Address Register 0"
|
|
group.word 0x40++0x01
|
|
line.word 0x00 "ETH0_MACAD1,FastMAC0 MAC Station Address Register 1"
|
|
tree.end
|
|
tree "Inter frame Sapcing Register"
|
|
group.byte 0x42++0x00
|
|
line.byte 0x00 "ETH0_IFS,FastMAC0 InterFrameSpacingPart2 Register"
|
|
bitfld.byte 0x00 0.--2. " IFS[2:0] ,Non-Back-to-Back InterFrameSpacingPart2" "0,1,2,3,4,5,6,7"
|
|
width 16.
|
|
tree.end
|
|
tree "MDC and MDIO Registers"
|
|
group.word 0x44++0x03
|
|
line.word 0x00 "ETH0_MDCCKDIV,FastMAC0 MDC Clock Division Factor Register"
|
|
hexmask.word.byte 0x00 0.--7. 0x1 " MDCKDIV[7:0] ,MDC Clock Division Factor"
|
|
line.word 0x02 "ETH0_MDLPTIM,FastMAC0 MDIO Linkpoll Timer Register"
|
|
if (((d.w(ad:0xb0b08000+0x4))&0x20)==0x0)
|
|
group.word 0x48++0x1
|
|
line.word 0x0 "ETH0_MDCTRL,FastMACn MDIO Control Register"
|
|
hexmask.word.byte 0x0 8.--12. 0x1 " REGAD[4:0] ,Register Adress"
|
|
hexmask.word.byte 0x0 3.--7. 0x8 " PHYAD[4:0] ,Physical Layer Adress"
|
|
textline " "
|
|
bitfld.word 0x0 2. " TRIG ,MDIO Operation Trigger" "Ready,Busy"
|
|
bitfld.word 0x0 1. " RDNWR ,MDIO Register Read or Write Operation" "Read,Write"
|
|
bitfld.word 0x0 0. " POLLEN ,Link Status Polling Enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x48++0x1
|
|
line.word 0x0 "ETH0_MDCTRL,FastMACn MDIO Control Register"
|
|
hexmask.word.byte 0x0 8.--12. 0x1 " REGAD[4:0] ,Register Adress"
|
|
textline " "
|
|
bitfld.word 0x0 2. " TRIG ,MDIO Operation Trigger" "Ready,Busy"
|
|
bitfld.word 0x0 1. " RDNWR ,MDIO Register Read or Write Operation" "Read,Write"
|
|
bitfld.word 0x0 0. " POLLEN ,Link Status Polling Enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x4C++0x1
|
|
line.byte 0x00 "ETH0_MDDAT,FastMAC0 MDIO Data Register"
|
|
tree.end
|
|
tree "Base Adress Registers"
|
|
group.long 0x50++0x1F
|
|
line.long 0x00 "ETH0_TXBDTBA,FastMAC0 TX BDT Base Address Register"
|
|
line.long 0x04 "ETH0_RXBDTBA,FastMAC0 RX BDT Base Address Register"
|
|
line.long 0x08 "ETH0_PTPTXBDTBA,FastMAC0 PTP TX BDT Base Address Register"
|
|
line.long 0x0C "ETH0_PTPRXBDTBA,FastMAC0 PTP RX BDT Base Address Register"
|
|
line.long 0x10 "ETH0_ARBDTBA,FastMAC0 AR BDT Base Address Register"
|
|
line.long 0x14 "ETH0_HPBDTBA,FastMAC0 HP BDT Base Address Register"
|
|
line.long 0x18 "ETH0_TXBDTPTR,FastMAC0 Current TX BDT Pointer Register"
|
|
line.long 0x1C "ETH0_RXBDTPTR,FastMAC0 Current RX BDT Pointer Register"
|
|
group.word 0x70++0x01 "BDT Polling Interval Register"
|
|
line.word 0x00 "ETH0_BDTPOLINT,FastMAC0 BDT Polling Interval Register"
|
|
rgroup.long 0x74++0x1B "Counter Registers"
|
|
line.long 0x00 "ETH0_MACID,FastMAC0 MAC Identification Register (MACID Attribute)"
|
|
line.long 0x04 "ETH0_TXOKCNT,FastMAC0 TX OK Counter Register (FrameTransmittedOK Atribute)"
|
|
line.long 0x08 "ETH0_SCOLCNT,FastMAC0 Single Collision Counter Register (SingleCollisionFrames Atribute)"
|
|
line.long 0x0C "ETH0_MCOLCNT,FastMAC0 Multiple Collision Counter Register (MultipleCollisionFrames Atribute)"
|
|
line.long 0x10 "ETH0_RXOKCNT,FastMAC0 Frames Received OK Counter Register (FramesRecievedOK Atribute)"
|
|
line.long 0x14 "ETH0_FCSERCNT,FastMAC0 Frame Check Sequence Errors Counter Register (FrameCheckSequenceErrors Atribute)"
|
|
line.long 0x18 "ETH0_ALNERCNT,FastMAC0 Alignment Errors Counter Register (AlignmentErrors Atribute)"
|
|
tree.end
|
|
tree "Flexi Filter Registers"
|
|
group.long 0x90++0x1F
|
|
line.long 0x0 "ETH0_FFSPTR0,FastMAC0 Flexi Filter Channel 0 String Pointer Registers"
|
|
line.long 0x4 "ETH0_FFSPTR1,FastMAC0 Flexi Filter Channel 1 String Pointer Registers"
|
|
line.long 0x8 "ETH0_FFSPTR2,FastMAC0 Flexi Filter Channel 2 String Pointer Registers"
|
|
line.long 0xC "ETH0_FFSPTR3,FastMAC0 Flexi Filter Channel 3 String Pointer Registers"
|
|
line.long 0x10 "ETH0_FFSPTR4,FastMAC0 Flexi Filter Channel 4 String Pointer Registers"
|
|
line.long 0x14 "ETH0_FFSPTR5,FastMAC0 Flexi Filter Channel 5 String Pointer Registers"
|
|
line.long 0x18 "ETH0_FFSPTR6,FastMAC0 Flexi Filter Channel 6 String Pointer Registers"
|
|
line.long 0x1C "ETH0_FFSPTR7,FastMAC0 Flexi Filter Channel 7 String Pointer Registers"
|
|
group.word 0xB0++0x0F
|
|
line.word 0x0 "ETH0_FFSLEN0,FastMAC0 Flexi Filter Channel 0 String Length Register"
|
|
hexmask.word 0x0 0.--10. 0x1 " FMFFSLEN0[10:0] ,String Length for Flexi Filter Channel 0"
|
|
line.word 0x2 "ETH0_FFSLEN1,FastMAC0 Flexi Filter Channel 1 String Length Register"
|
|
hexmask.word 0x2 0.--10. 0x1 " FMFFSLEN0[10:0] ,String Length for Flexi Filter Channel 1"
|
|
line.word 0x4 "ETH0_FFSLEN2,FastMAC0 Flexi Filter Channel 2 String Length Register"
|
|
hexmask.word 0x4 0.--10. 0x1 " FMFFSLEN0[10:0] ,String Length for Flexi Filter Channel 2"
|
|
line.word 0x6 "ETH0_FFSLEN3,FastMAC0 Flexi Filter Channel 3 String Length Register"
|
|
hexmask.word 0x6 0.--10. 0x1 " FMFFSLEN0[10:0] ,String Length for Flexi Filter Channel 3"
|
|
line.word 0x8 "ETH0_FFSLEN4,FastMAC0 Flexi Filter Channel 4 String Length Register"
|
|
hexmask.word 0x8 0.--10. 0x1 " FMFFSLEN0[10:0] ,String Length for Flexi Filter Channel 4"
|
|
line.word 0xA "ETH0_FFSLEN5,FastMAC0 Flexi Filter Channel 5 String Length Register"
|
|
hexmask.word 0xA 0.--10. 0x1 " FMFFSLEN0[10:0] ,String Length for Flexi Filter Channel 5"
|
|
line.word 0xC "ETH0_FFSLEN6,FastMAC0 Flexi Filter Channel 6 String Length Register"
|
|
hexmask.word 0xC 0.--10. 0x1 " FMFFSLEN0[10:0] ,String Length for Flexi Filter Channel 6"
|
|
line.word 0xE "ETH0_FFSLEN7,FastMAC0 Flexi Filter Channel 7 String Length Register"
|
|
hexmask.word 0xE 0.--10. 0x1 " FMFFSLEN0[10:0] ,String Length for Flexi Filter Channel 7"
|
|
group.byte 0xC0++0x07
|
|
line.byte 0x0 "ETH0_FCCR0,FastMAC0 Flexi Filter Channel 0 Configuration Register"
|
|
bitfld.byte 0x0 4.--6. " MASKPTR[2:0] ,Mask Pointer (Channel Number)" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x0 3. " MASKEN ,Mask Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0.--2. " CFG[2:0] ,Channel Configuration" "Mask,,,,Compare for H-P frames,Compare/AcceptOnMatch/NoAutoReply,Compare/CancelOnMatch/NoAutoReply,Compare/AcceptOnMatch/AutoReply"
|
|
line.byte 0x1 "ETH0_FCCR1,FastMAC0 Flexi Filter Channel 1 Configuration Register"
|
|
bitfld.byte 0x1 4.--6. " MASKPTR[2:0] ,Mask Pointer (Channel Number)" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x1 3. " MASKEN ,Mask Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x1 0.--2. " CFG[2:0] ,Channel Configuration" "Mask,,,,Compare for H-P frames,Compare/AcceptOnMatch/NoAutoReply,Compare/CancelOnMatch/NoAutoReply,Compare/AcceptOnMatch/AutoReply"
|
|
line.byte 0x2 "ETH0_FCCR2,FastMAC0 Flexi Filter Channel 2 Configuration Register"
|
|
bitfld.byte 0x2 4.--6. " MASKPTR[2:0] ,Mask Pointer (Channel Number)" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x2 3. " MASKEN ,Mask Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x2 0.--2. " CFG[2:0] ,Channel Configuration" "Mask,,,,Compare for H-P frames,Compare/AcceptOnMatch/NoAutoReply,Compare/CancelOnMatch/NoAutoReply,Compare/AcceptOnMatch/AutoReply"
|
|
line.byte 0x3 "ETH0_FCCR3,FastMAC0 Flexi Filter Channel 3 Configuration Register"
|
|
bitfld.byte 0x3 4.--6. " MASKPTR[2:0] ,Mask Pointer (Channel Number)" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x3 3. " MASKEN ,Mask Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x3 0.--2. " CFG[2:0] ,Channel Configuration" "Mask,,,,Compare for H-P frames,Compare/AcceptOnMatch/NoAutoReply,Compare/CancelOnMatch/NoAutoReply,Compare/AcceptOnMatch/AutoReply"
|
|
line.byte 0x4 "ETH0_FCCR4,FastMAC0 Flexi Filter Channel 4 Configuration Register"
|
|
bitfld.byte 0x4 4.--6. " MASKPTR[2:0] ,Mask Pointer (Channel Number)" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x4 3. " MASKEN ,Mask Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x4 0.--2. " CFG[2:0] ,Channel Configuration" "Mask,,,,Compare for H-P frames,Compare/AcceptOnMatch/NoAutoReply,Compare/CancelOnMatch/NoAutoReply,Compare/AcceptOnMatch/AutoReply"
|
|
line.byte 0x5 "ETH0_FCCR5,FastMAC0 Flexi Filter Channel 5 Configuration Register"
|
|
bitfld.byte 0x5 4.--6. " MASKPTR[2:0] ,Mask Pointer (Channel Number)" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x5 3. " MASKEN ,Mask Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x5 0.--2. " CFG[2:0] ,Channel Configuration" "Mask,,,,Compare for H-P frames,Compare/AcceptOnMatch/NoAutoReply,Compare/CancelOnMatch/NoAutoReply,Compare/AcceptOnMatch/AutoReply"
|
|
line.byte 0x6 "ETH0_FCCR6,FastMAC0 Flexi Filter Channel 6 Configuration Register"
|
|
bitfld.byte 0x6 4.--6. " MASKPTR[2:0] ,Mask Pointer (Channel Number)" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x6 3. " MASKEN ,Mask Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x6 0.--2. " CFG[2:0] ,Channel Configuration" "Mask,,,,Compare for H-P frames,Compare/AcceptOnMatch/NoAutoReply,Compare/CancelOnMatch/NoAutoReply,Compare/AcceptOnMatch/AutoReply"
|
|
line.byte 0x7 "ETH0_FCCR7,FastMAC0 Flexi Filter Channel 7 Configuration Register"
|
|
bitfld.byte 0x7 4.--6. " MASKPTR[2:0] ,Mask Pointer (Channel Number)" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x7 3. " MASKEN ,Mask Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x7 0.--2. " CFG[2:0] ,Channel Configuration" "Mask,,,,Compare for H-P frames,Compare/AcceptOnMatch/NoAutoReply,Compare/CancelOnMatch/NoAutoReply,Compare/AcceptOnMatch/AutoReply"
|
|
tree.end
|
|
width 16.
|
|
tree "AHB Error Registers"
|
|
rgroup.long 0xC8++0x07
|
|
line.long 0x00 "ETH0_AHBERAD,FastMAC0 AHB Error Address Register"
|
|
line.long 0x04 "ETH0_AHBERDAT,FastMAC0 AHB Error Data Register"
|
|
rgroup.byte 0xD0++0x00
|
|
line.byte 0x00 "ETH0_AHBERCTR,FastMAC0 AHB Error Control Register"
|
|
bitfld.byte 0x00 0. " WR ,The Erroneous AHB Transfer was a WRITE Transfer" "Read,Write"
|
|
tree.end
|
|
tree "NMI Register"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "ETH0_NMI,FastMAC0 NMI Register"
|
|
bitfld.long 0x00 9. " WAKEUPC ,WAKEUP Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " AHBERRC ,FastMAC AHB Error NMI Clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " WAKEUP ,WAKEUP Interrupt Request" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 0. " AHBERRF ,FastMAC AHB Error NMI Flag" "Not pending,Pending"
|
|
tree.end
|
|
width 16.
|
|
width 12.
|
|
tree.end
|
|
tree "ETHERNETRAM"
|
|
base ad:0xb0b0C000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "ERCFG0_UNLOCKR,ETHERNETRAM Unlock Register"
|
|
line.long 0x04 "ERCFG0_CSR,ETHERNETRAM Configuration and Status Register"
|
|
bitfld.long 0x04 30.--31. " WAWC2[1:0] ,The number of wait cycles inserted during the RAM write accesses by FastMAC" "0,1,2,3"
|
|
bitfld.long 0x04 28.--29. " RAWC2[1:0] ,The number of wait cycles inserted during the RAM read accesses by FastMAC" "0,1,2,3"
|
|
bitfld.long 0x04 26.--27. " WAWC1[1:0] ,The number of wait cycles inserted during the RAM write accesses by the software" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " RAWC2[1:0] ,The number of wait cycles inserted during the RAM read accesses by FastMAC" "0,1,2,3"
|
|
bitfld.long 0x04 16. " CEIC ,ECC Correctable Error Interrupt (ERCFG0_CSR) Clear" "No effect,Clear"
|
|
bitfld.long 0x04 9. " LCK ,The lock status of the ETHERNETRAM CSRs" "Unlocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " CEIF ,ECC Correctable Error Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " CEIEN ,ECC Correctable Error Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "ERCFG0_EA,ETHERNETRAM ECC Error Address Number Register (last correctable ECC error)"
|
|
group.long 0x0C++0x07
|
|
line.long 0x00 "ERCFG0_ERRMSKR0,ETHERNETRAM Error Mask Register 0"
|
|
bitfld.long 0x0 31. " MSK[31] , ECC Error Mask [31]" "Not masked,Masked"
|
|
bitfld.long 0x0 30. " MSK[30] , ECC Error Mask [30]" "Not masked,Masked"
|
|
bitfld.long 0x0 29. " MSK[29] , ECC Error Mask [29]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 28. " MSK[28] , ECC Error Mask [28]" "Not masked,Masked"
|
|
bitfld.long 0x0 27. " MSK[27] , ECC Error Mask [27]" "Not masked,Masked"
|
|
bitfld.long 0x0 26. " MSK[26] , ECC Error Mask [26]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 25. " MSK[25] , ECC Error Mask [25]" "Not masked,Masked"
|
|
bitfld.long 0x0 24. " MSK[24] , ECC Error Mask [24]" "Not masked,Masked"
|
|
bitfld.long 0x0 23. " MSK[23] , ECC Error Mask [23]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 22. " MSK[22] , ECC Error Mask [22]" "Not masked,Masked"
|
|
bitfld.long 0x0 21. " MSK[21] , ECC Error Mask [21]" "Not masked,Masked"
|
|
bitfld.long 0x0 20. " MSK[20] , ECC Error Mask [20]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 19. " MSK[19] , ECC Error Mask [19]" "Not masked,Masked"
|
|
bitfld.long 0x0 18. " MSK[18] , ECC Error Mask [18]" "Not masked,Masked"
|
|
bitfld.long 0x0 17. " MSK[17] , ECC Error Mask [17]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 16. " MSK[16] , ECC Error Mask [16]" "Not masked,Masked"
|
|
bitfld.long 0x0 15. " MSK[15] , ECC Error Mask [15]" "Not masked,Masked"
|
|
bitfld.long 0x0 14. " MSK[14] , ECC Error Mask [14]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 13. " MSK[13] , ECC Error Mask [13]" "Not masked,Masked"
|
|
bitfld.long 0x0 12. " MSK[12] , ECC Error Mask [12]" "Not masked,Masked"
|
|
bitfld.long 0x0 11. " MSK[11] , ECC Error Mask [11]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 10. " MSK[10] , ECC Error Mask [10]" "Not masked,Masked"
|
|
bitfld.long 0x0 9. " MSK[9] , ECC Error Mask [9]" "Not masked,Masked"
|
|
bitfld.long 0x0 8. " MSK[8] , ECC Error Mask [8]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 7. " MSK[7] , ECC Error Mask [7]" "Not masked,Masked"
|
|
bitfld.long 0x0 6. " MSK[6] , ECC Error Mask [6]" "Not masked,Masked"
|
|
bitfld.long 0x0 5. " MSK[5] , ECC Error Mask [5]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 4. " MSK[4] , ECC Error Mask [4]" "Not masked,Masked"
|
|
bitfld.long 0x0 3. " MSK[3] , ECC Error Mask [3]" "Not masked,Masked"
|
|
bitfld.long 0x0 2. " MSK[2] , ECC Error Mask [2]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 1. " MSK[1] , ECC Error Mask [1]" "Not masked,Masked"
|
|
bitfld.long 0x0 0. " MSK[0] , ECC Error Mask [0]" "Not masked,Masked"
|
|
line.long 0x04 "ERCFG0_ERRMSKR1,ETHERNETRAM Error Mask Register 1"
|
|
bitfld.long 0x4 6. " MSK[6] , ECC Error Mask [6]" "Not masked,Masked"
|
|
bitfld.long 0x4 5. " MSK[5] , ECC Error Mask [5]" "Not masked,Masked"
|
|
bitfld.long 0x4 4. " MSK[4] , ECC Error Mask [4]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 3. " MSK[3] , ECC Error Mask [3]" "Not masked,Masked"
|
|
bitfld.long 0x4 2. " MSK[2] , ECC Error Mask [2]" "Not masked,Masked"
|
|
bitfld.long 0x4 1. " MSK[1] , ECC Error Mask [1]" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 0. " MSK[0] , ECC Error Mask [0]" "Not masked,Masked"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
tree "Up/Down Counter"
|
|
base ad:0xb0a20000
|
|
width 11.
|
|
if (((d.w(ad:0xb0a20000))&0x8000)==0x8000)
|
|
if (((d.w(ad:0xb0a20000))&0x04)==0x0&&((d.w(ad:0xb0a20000))&0xC00)==0x400)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "UDC0_CC0,Count Control Register 0"
|
|
bitfld.word 0x00 15. " M32E ,Enable 32-bit Mode" "16-bit x 2,32-bit"
|
|
rbitfld.word 0x00 14. " CDCF ,Count Direction Change Flag" "Not changed,Changed"
|
|
bitfld.word 0x00 13. " CFIE ,Count Direction Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CLKS ,Select Internal Prescaler" "CLKP/2,CLKP/8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " CMS[1:0] ,Select Count Mode" "Timer,Up/down count,Phase difference count (x2),Phase difference count (x4)"
|
|
bitfld.word 0x00 8.--9. " CES[1:0] ,Select Count Clock Edge" "Disabled,Falling edge,Rising edge,Both edges"
|
|
bitfld.word 0x00 5. " UCRE ,Enable Compare-Match Clear" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " RLDE ,Enable Reload" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CGSC ,Select ZIN Pin Function" "Counter clear,Gate"
|
|
bitfld.word 0x00 0.--1. " CGE[1:0] ,Select ZIN Pin Function" "Detection disabled,Falling edge,Rising edge,Setting disabled"
|
|
elif (((d.w(ad:0xb0a20000))&0x04)==0x0&&((d.w(ad:0xb0a20000))&0xC00)!=0x400)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "UDC0_CC0,Count Control Register 0"
|
|
bitfld.word 0x00 15. " M32E ,Enable 32-bit Mode" "16-bit x 2,32-bit"
|
|
rbitfld.word 0x00 14. " CDCF ,Count Direction Change Flag" "Not changed,Changed"
|
|
bitfld.word 0x00 13. " CFIE ,Count Direction Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CLKS ,Select Internal Prescaler" "CLKP/2,CLKP/8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " CMS[1:0] ,Select Count Mode" "Timer,Up/down count,Phase difference count (x2),Phase difference count (x4)"
|
|
bitfld.word 0x00 5. " UCRE ,Enable Compare-Match Clear" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " RLDE ,Enable Reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " CGSC ,Select ZIN Pin Function" "Counter clear,Gate"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CGE[1:0] ,Select ZIN Pin Function" "Detection disabled,Falling edge,Rising edge,Setting disabled"
|
|
elif (((d.w(ad:0xb0a20000))&0x04)==0x04&&((d.w(ad:0xb0a20000))&0xC00)==0x400)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "UDC0_CC0,Count Control Register 0"
|
|
bitfld.word 0x00 15. " M32E ,Enable 32-bit Mode" "16-bit x 2,32-bit"
|
|
rbitfld.word 0x00 14. " CDCF ,Count Direction Change Flag" "Not changed,Changed"
|
|
bitfld.word 0x00 13. " CFIE ,Count Direction Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CLKS ,Select Internal Prescaler" "CLKP/2,CLKP/8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " CMS[1:0] ,Select Count Mode" "Timer,Up/down count,Phase difference count (x2),Phase difference count (x4)"
|
|
bitfld.word 0x00 8.--9. " CES[1:0] ,Select Count Clock Edge" "Disabled,Falling edge,Rising edge,Both edges"
|
|
bitfld.word 0x00 5. " UCRE ,Enable Compare-Match Clear" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " RLDE ,Enable Reload" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CGSC ,Select ZIN Pin Function" "Counter clear,Gate"
|
|
bitfld.word 0x00 0.--1. " CGE[1:0] ,Select ZIN Pin Function" "Detection disabled,Low level,High level,Setting disabled"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "UDC0_CC0,Count Control Register 0"
|
|
bitfld.word 0x00 15. " M32E ,Enable 32-bit Mode" "16-bit x 2,32-bit"
|
|
rbitfld.word 0x00 14. " CDCF ,Count Direction Change Flag" "Not changed,Changed"
|
|
bitfld.word 0x00 13. " CFIE ,Count Direction Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CLKS ,Select Internal Prescaler" "CLKP/2,CLKP/8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " CMS[1:0] ,Select Count Mode" "Timer,Up/down count,Phase difference count (x2),Phase difference count (x4)"
|
|
bitfld.word 0x00 5. " UCRE ,Enable Compare-Match Clear" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " RLDE ,Enable Reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " CGSC ,Select ZIN Pin Function" "Counter clear,Gate"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CGE[1:0] ,Select ZIN Pin Function" "Detection disabled,Low level,High level,Setting disabled"
|
|
endif
|
|
wgroup.word 0x02++0x01
|
|
line.word 0x00 "UDC0_ECC0,Extended Count Control Register 0"
|
|
bitfld.word 0x00 5. " CTUT ,Counter Load" "No effect,Load"
|
|
bitfld.word 0x00 4. " UDCLR ,Counter Clear" "No effect,Clear"
|
|
bitfld.word 0x00 3. " CMPFCLR ,Compare Interrupt UDC10_CS0:CMPF) Clear" "No effect,Clear"
|
|
bitfld.word 0x00 2. " OVFFCLR ,Overflow Interrupt (UDC0_CS0:OVFF) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UDFFCLR ,Underflow Interrupt (UDC0_CS0:UDFF) Clear" "No effect,Clear"
|
|
bitfld.word 0x00 0. " CDCFCLR ,Count Direction Interrupt (UDC0_CS0:CDCF)Clear" "No effect,Clear"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "UDC0_CS0,Count Status Register 0"
|
|
bitfld.word 0x00 8. " CSTR ,Count Operation" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " CITE ,Compare-Match Interrupt Request" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " UDIE ,Overflow/Underflow Interrupt Request" "Disabled,Enabled"
|
|
rbitfld.word 0x00 4. " CMPF ,Compare-Match Detection Flag" "Not matched,Matched"
|
|
textline " "
|
|
rbitfld.word 0x00 3. " OVFF ,Overflow Detection Flag" "No overflow,Overflow"
|
|
rbitfld.word 0x00 2. " UDFF ,Underflow Detection Flag" "No underflow,Underflow"
|
|
rbitfld.word 0x00 0.--1. " UDF[1:0] ,Up/Down Flag" "No input,Count down,Count up,Count up and down"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "UDC0_CR,Up/Down Counter Register"
|
|
hexmask.long.word 0x00 16.--31. 0x1 " UDCRH[15:0] ,Up/Down Counter Register High"
|
|
hexmask.long.word 0x00 0.--15. 0x1 " UDCRL[15:0] ,Up/Down Counter Register Low"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "UDC0_RC,Up/Down Reload/Compare Register"
|
|
hexmask.long.word 0x00 16.--31. 0x1 " UDRCH[15:0] ,Up/Down Reload/Compare Register High"
|
|
hexmask.long.word 0x00 0.--15. 0x1 " UDRCL[15:0] ,Up/Down Reload/Compare Register Low"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "UDC0_TGL0,Count Toggle Register 0"
|
|
bitfld.word 0x00 10. " CMTE ,Compare Toggle Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " UDTE ,Overflow/Underflow Toggle Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " CDTE ,Dir Change Toggle Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " OUTE ,Output Toggle Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " OUTL ,Toggle Load Value" "0,1"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "UDC0_DBG,Count Debug Register"
|
|
bitfld.word 0x00 0. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
if (((d.w(ad:0xb0a20000))&0x04)==0x0)
|
|
group.word 0x00++0x01 "Channel 0"
|
|
line.word 0x00 "UDC0_CC0,Count Control Register 0"
|
|
bitfld.word 0x00 15. " M32E ,Enable 32-bit Mode" "16-bit x 2,32-bit"
|
|
rbitfld.word 0x00 14. " CDCF ,Count Direction Change Flag" "Not changed,Changed"
|
|
bitfld.word 0x00 13. " CFIE ,Count Direction Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CLKS ,Select Internal Prescaler" "CLKP/2,CLKP/8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " CMS[1:0] ,Select Count Mode" "Timer,Up/down count,Phase difference count (x2),Phase difference count (x4)"
|
|
bitfld.word 0x00 8.--9. " CES[1:0] ,Select Count Clock Edge" "Disabled,Falling edge,Rising edge,Both edges"
|
|
bitfld.word 0x00 5. " UCRE ,Enable Compare-Match Clear" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " RLDE ,Enable Reload" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CGSC ,Select ZIN Pin Function" "Counter clear,Gate"
|
|
bitfld.word 0x00 0.--1. " CGE[1:0] ,Select ZIN Pin Function" "Detection disabled,Falling edge,Rising edge,Setting disabled"
|
|
else
|
|
group.word 0x00++0x01 "Channel 0"
|
|
line.word 0x00 "UDC0_CC0,Count Control Register 0"
|
|
bitfld.word 0x00 15. " M32E ,Enable 32-bit Mode" "16-bit x 2,32-bit"
|
|
rbitfld.word 0x00 14. " CDCF ,Count Direction Change Flag" "Not changed,Changed"
|
|
bitfld.word 0x00 13. " CFIE ,Count Direction Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CLKS ,Select Internal Prescaler" "CLKP/2,CLKP/8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " CMS[1:0] ,Select Count Mode" "Timer,Up/down count,Phase difference count (x2),Phase difference count (x4)"
|
|
bitfld.word 0x00 8.--9. " CES[1:0] ,Select Count Clock Edge" "Disabled,Falling edge,Rising edge,Both edges"
|
|
bitfld.word 0x00 5. " UCRE ,Enable Compare-Match Clear" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " RLDE ,Enable Reload" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CGSC ,Select ZIN Pin Function" "Counter clear,Gate"
|
|
bitfld.word 0x00 0.--1. " CGE[1:0] ,Select ZIN Pin Function" "Detection disabled,Low level,High level,Setting disabled"
|
|
endif
|
|
wgroup.word 0x02++0x01
|
|
line.word 0x00 "UDC0_ECC0,Extended Count Control Register 0"
|
|
bitfld.word 0x00 5. " CTUT ,Counter Load" "No effect,Load"
|
|
bitfld.word 0x00 4. " UDCLR ,Counter Clear" "No effect,Clear"
|
|
bitfld.word 0x00 3. " CMPFCLR ,Compare Interrupt UDC10_CS0:CMPF) Clear" "No effect,Clear"
|
|
bitfld.word 0x00 2. " OVFFCLR ,Overflow Interrupt (UDC0_CS0:OVFF) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UDFFCLR ,Underflow Interrupt (UDC0_CS0:UDFF) Clear" "No effect,Clear"
|
|
bitfld.word 0x00 0. " CDCFCLR ,Count Direction Interrupt (UDC0_CS0:CDCF)Clear" "No effect,Clear"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "UDC0_CS0,Count Status Register 0"
|
|
bitfld.word 0x00 8. " CSTR ,Count Operation" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " CITE ,Compare-Match Interrupt Request" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " UDIE ,Overflow/Underflow Interrupt Request" "Disabled,Enabled"
|
|
rbitfld.word 0x00 4. " CMPF ,Compare-Match Detection Flag" "Not matched,Matched"
|
|
textline " "
|
|
rbitfld.word 0x00 3. " OVFF ,Overflow Detection Flag" "No overflow,Overflow"
|
|
rbitfld.word 0x00 2. " UDFF ,Underflow Detection Flag" "No underflow,Underflow"
|
|
rbitfld.word 0x00 0.--1. " UDF[1:0] ,Up/Down Flag" "No input,Count down,Count up,Count up and down"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "UDC0_TGL0,Count Toggle Register 0"
|
|
bitfld.word 0x00 10. " CMTE ,Compare Toggle Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " UDTE ,Overflow/Underflow Toggle Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " CDTE ,Dir Change Toggle Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " OUTE ,Output Toggle Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " OUTL ,Toggle Load Value" "0,1"
|
|
rgroup.word 0x10++0x01
|
|
line.word 0x00 "UDC0_CR0,Up/Down Counter Register"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "UDC0_RC0,Up/Down Reload/Compare Register"
|
|
if (((d.w(ad:0xb0a20000+0x4))&0x04)==0x0)
|
|
group.word 0x04++0x01 "Channel 1"
|
|
line.word 0x00 "UDC0_CC1,Count Control Register 1"
|
|
rbitfld.word 0x00 14. " CDCF ,Count Direction Change Flag" "Not changed,Changed"
|
|
bitfld.word 0x00 13. " CFIE ,Count Direction Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CLKS ,Select Internal Prescaler" "CLKP/2,CLKP/8"
|
|
bitfld.word 0x00 10.--11. " CMS[1:0] ,Select Count Mode" "Timer,Up/down count,Phase difference count (x2),Phase difference count (x4)"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CES[1:0] ,Select Count Clock Edge" "Disabled,Falling edge,Rising edge,Both edges"
|
|
bitfld.word 0x00 5. " UCRE ,Enable Compare-Match Clear" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " RLDE ,Enable Reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " CGSC ,Select ZIN Pin Function" "Counter clear,Gate"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CGE[1:0] ,Select ZIN Pin Function" "Detection disabled,Falling edge,Rising edge,Setting disabled"
|
|
else
|
|
group.word 0x04++0x01 "Channel 1"
|
|
line.word 0x00 "UDC0_CC1,Count Control Register 1"
|
|
rbitfld.word 0x00 14. " CDCF ,Count Direction Change Flag" "Not changed,Changed"
|
|
bitfld.word 0x00 13. " CFIE ,Count Direction Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CLKS ,Select Internal Prescaler" "CLKP/2,CLKP/8"
|
|
bitfld.word 0x00 10.--11. " CMS[1:0] ,Select Count Mode" "Timer,Up/down count,Phase difference count (x2),Phase difference count (x4)"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CES[1:0] ,Select Count Clock Edge" "Disabled,Falling edge,Rising edge,Both edges"
|
|
bitfld.word 0x00 5. " UCRE ,Enable Compare-Match Clear" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " RLDE ,Enable Reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " CGSC ,Select ZIN Pin Function" "Counter clear,Gate"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CGE[1:0] ,Select ZIN Pin Function" "Detection disabled,Low level,High level,Setting disabled"
|
|
endif
|
|
wgroup.word 0x06++0x01
|
|
line.word 0x00 "UDC0_ECC1,Extended Count Control Register 1"
|
|
bitfld.word 0x00 5. " CTUT ,Counter Load" "No effect,Load"
|
|
bitfld.word 0x00 4. " UDCLR ,Counter Clear" "No effect,Clear"
|
|
bitfld.word 0x00 3. " CMPFCLR ,Compare Interrupt UDC10_CS1:CMPF) Clear" "No effect,Clear"
|
|
bitfld.word 0x00 2. " OVFFCLR ,Overflow Interrupt (UDC0_CS1:OVFF) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UDFFCLR ,Underflow Interrupt (UDC0_CS1:UDFF) Clear" "No effect,Clear"
|
|
bitfld.word 0x00 0. " CDCFCLR ,Count Direction Interrupt (UDC0_CS1:CDCF)Clear" "No effect,Clear"
|
|
group.word 0x0a++0x01
|
|
line.word 0x00 "UDC0_CS1,Count Status Register 1"
|
|
bitfld.word 0x00 8. " CSTR ,Count Operation" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " CITE ,Compare-Match Interrupt Request" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " UDIE ,Overflow/Underflow Interrupt Request" "Disabled,Enabled"
|
|
rbitfld.word 0x00 4. " CMPF ,Compare-Match Detection Flag" "Not matched,Matched"
|
|
textline " "
|
|
rbitfld.word 0x00 3. " OVFF ,Overflow Detection Flag" "No overflow,Overflow"
|
|
rbitfld.word 0x00 2. " UDFF ,Underflow Detection Flag" "No underflow,Underflow"
|
|
rbitfld.word 0x00 0.--1. " UDF[1:0] ,Up/Down Flag" "No input,Count down,Count up,Count up and down"
|
|
rgroup.word 0x12++0x03
|
|
line.word 0x00 "UDC0_CR1,Up/Down Counter Register"
|
|
group.word 0x16++0x03
|
|
line.word 0x00 "UDC0_RC,Up/Down Reload/Compare Register"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UDC0_TGL1,Count Toggle Register 1"
|
|
bitfld.word 0x00 10. " CMTE ,Compare Toggle Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " UDTE ,Overflow/Underflow Toggle Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " CDTE ,Dir Change Toggle Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " OUTE ,Output Toggle Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " OUTL ,Toggle Load Value" "0,1"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
sif (cpu()!="MB9EF226"&&cpu()!="MB9EF126"&&cpu()!="MB9DF125")
|
|
tree "Automotive Remote Handler (ARH)"
|
|
tree "ARH0"
|
|
base ad:0xB0B40000
|
|
width 17.
|
|
textline " "
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ARH0_RHCTRL,ARH Remote Handler Control Register"
|
|
bitfld.long 0x00 31. " UNLOCK ,Transaction Buffer Unlock Request" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " CANCEL ,Transaction Buffer Cancel Request" "Not requested,Requested"
|
|
bitfld.long 0x00 24.--27. " TBNO ,Transaction Buffer Number Trigger" "TBNO0,TBNO1,TBNO2,TBNO3,TBNO4,TBNO5,TBNO6,TBNO7,TBNO8,TBNO9,TBNO10,TBNO11,TBNO12,TBNO13,TBNO14,TBNO15"
|
|
rbitfld.long 0x00 15. " WDG1 ,Watch Dog Timer 1 Interrupt" "Transmit,Receive"
|
|
rbitfld.long 0x00 14. " WDG0 ,Watch Dog Timer 0 Interrupt" "Transmit,Receive"
|
|
rbitfld.long 0x00 13. " FAT1 ,Fatal Interrupt Status from Channel 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.long 0x00 12. " FAT0 ,Fatal Interrupt Status from Channel 0" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 10. " LV ,Level Interrupt Status" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 9. " OFL ,Event Overflow Interrupt Status" "No overflow,Overflow"
|
|
rbitfld.long 0x00 8. " EV ,Event Interrupt Status" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 0. " LST ,ARH Lock Status" "Unlocked,Locked"
|
|
if (((d.l(ad:0xB0B40000))&0x01)==0x00)
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "ARH0_CHCTRL0,ARH Channel Control Register Channel 0"
|
|
bitfld.long 0x00 31. " BYPASS ,BYPASS Mode. Remote Handler active/inactive" "RH active,RH inactive"
|
|
bitfld.long 0x00 30. " FATEIN ,FATAL Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PHYPLLRST ,Reset for PLL" "Normal,Reset"
|
|
bitfld.long 0x00 26. " TXCFG ,Write on ARHn_APCFG registers" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " RSTRTA ,A-Shell Restart" "Running,Initialized"
|
|
bitfld.long 0x00 24. " INITRH ,Remote Handler Initialization" "Running,Initialized"
|
|
textline " "
|
|
rbitfld.long 0x00 22. " PHYPLLGOOD ,APIX PHY PLL Lock Status" "Unlocked,Locked"
|
|
rbitfld.long 0x00 21. " PLLGOOD ,APIX PHY PLL Lock Status" "Unlocked,Locked"
|
|
rbitfld.long 0x00 20. " UPHSK ,Upstream Handshake" "In progress,Done"
|
|
rbitfld.long 0x00 19. " DNHSK ,Downstream Handshake" "In progress,Done"
|
|
rbitfld.long 0x00 18. " FATAL ,Fatal from A-Shell" "No error,Error"
|
|
rbitfld.long 0x00 17. " UPRDY ,Upstream Serial Channel Operational" "Not operational,Operational"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " CONNECTED ,Connection Established" "Not established,Established"
|
|
rbitfld.long 0x00 15. " UPVALID ,Upstream Data Valid Status" "Invalid,Valid"
|
|
rbitfld.long 0x00 14. " DNVALID ,Downstream Data Valid Status" "Invalid,Valid"
|
|
rbitfld.long 0x00 13. " FATIRQ ,Fatal Interrupt Status" "Not active,Active"
|
|
rbitfld.long 0x00 12. " CRCERR ,CRC Error Status in Upstream Data" "No error,Error"
|
|
rbitfld.long 0x00 11. " CRCTOUT ,CRC Timeout Status in Upstream Data" "No timeout,Timeout"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " PERROR ,Protocol Error Status" "No error,Error"
|
|
rbitfld.long 0x00 9. " READY ,A-Shell Ready Status" "Not ready,Ready"
|
|
rbitfld.long 0x00 8. " REMOTERST ,Remote A-Shell Restart Status" "No restart,Restart"
|
|
bitfld.long 0x00 7. " UPVALIDCL ,Clear Upstream Data Valid Status" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " DNVALIDST ,Set Downstream Data Valid Status" "No effect,Set"
|
|
bitfld.long 0x00 5. " FATIRQCL ,Clear Fatal IRQ Interrupt Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CRCERRCL ,Clear CRC Error in Upstream Data Status" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " CRCTOUTCL ,Clear CRC Timeout in Upstream Data Status" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " PERRORCL ,Clear Protocol Error Status" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " READYCL ,Clear A-Shell Ready Status" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " REMOTERSTCL ,Clear Remote A-Shell Restart Status" "No effect,Cleared"
|
|
line.long 0x04 "ARH0_CHCTRL1,ARH Channel Control Register Channel 1"
|
|
bitfld.long 0x04 31. " BYPASS ,BYPASS Mode. Remote Handler active/inactive" "RH active,RH inactive"
|
|
bitfld.long 0x04 30. " FATEIN ,FATAL Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " TXCFG ,Write on ARHn_APCFG registers" "Disabled,Enabled"
|
|
bitfld.long 0x04 25. " RSTRTA ,A-Shell Restart" "Running,Initialized"
|
|
bitfld.long 0x04 24. " INITRH ,Remote Handler Initialization" "Running,Initialized"
|
|
rbitfld.long 0x04 21. " PLLGOOD ,APIX PHY PLL Lock Status" "Unlocked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x04 20. " UPHSK ,Upstream Handshake" "In progress,Done"
|
|
rbitfld.long 0x04 19. " DNHSK ,Downstream Handshake" "In progress,Done"
|
|
rbitfld.long 0x04 18. " FATAL ,Fatal from A-Shell" "No error,Error"
|
|
rbitfld.long 0x04 17. " UPRDY ,Upstream Serial Channel Operational" "Not operational,Operational"
|
|
rbitfld.long 0x04 16. " CONNECTED ,Connection Established" "Not established,Established"
|
|
rbitfld.long 0x04 15. " UPVALID ,Upstream Data Valid Status" "Invalid,Valid"
|
|
textline " "
|
|
rbitfld.long 0x04 14. " DNVALID ,Downstream Data Valid Status" "Invalid,Valid"
|
|
rbitfld.long 0x04 13. " FATIRQ ,Fatal Interrupt Status" "Not active,Active"
|
|
rbitfld.long 0x04 12. " CRCERR ,CRC Error Status in Upstream Data" "No error,Error"
|
|
rbitfld.long 0x04 11. " CRCTOUT ,CRC Timeout Status in Upstream Data" "No timeout,Timeout"
|
|
rbitfld.long 0x04 10. " PERROR ,Protocol Error Status" "No error,Error"
|
|
rbitfld.long 0x04 9. " READY ,A-Shell Ready Status" "Not ready,Ready"
|
|
textline " "
|
|
rbitfld.long 0x04 8. " REMOTERST ,Remote A-Shell Restart Status" "No restart,Restart"
|
|
bitfld.long 0x04 7. " UPVALIDCL ,Clear Upstream Data Valid Status" "No effect,Cleared"
|
|
bitfld.long 0x04 6. " DNVALIDST ,Set Downstream Data Valid Status" "No effect,Set"
|
|
bitfld.long 0x04 5. " FATIRQCL ,Clear Fatal IRQ Interrupt Status" "No effect,Cleared"
|
|
bitfld.long 0x04 4. " CRCERRCL ,Clear CRC Error in Upstream Data Status" "No effect,Cleared"
|
|
bitfld.long 0x04 3. " CRCTOUTCL ,Clear CRC Timeout in Upstream Data Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 2. " PERRORCL ,Clear Protocol Error Status" "No effect,Cleared"
|
|
bitfld.long 0x04 1. " READYCL ,Clear A-Shell Ready Status" "No effect,Cleared"
|
|
bitfld.long 0x04 0. " REMOTERSTCL ,Clear Remote A-Shell Restart Status" "No effect,Cleared"
|
|
else
|
|
rgroup.long 0x04++0x07
|
|
line.long 0x00 "ARH0_CHCTRL0,ARH Channel Control Register Channel 0"
|
|
bitfld.long 0x00 31. " BYPASS ,BYPASS Mode. Remote Handler active/inactive" "RH active,RH inactive"
|
|
bitfld.long 0x00 30. " FATEIN ,FATAL Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PHYPLLRST ,Reset for PLL" "Normal,Reset"
|
|
bitfld.long 0x00 26. " TXCFG ,Write on ARHn_APCFG registers" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " RSTRTA ,A-Shell Restart" "Running,Initialized"
|
|
bitfld.long 0x00 24. " INITRH ,Remote Handler Initialization" "Running,Initialized"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PHYPLLGOOD ,APIX PHY PLL Lock Status" "Unlocked,Locked"
|
|
bitfld.long 0x00 21. " PLLGOOD ,APIX PHY PLL Lock Status" "Unlocked,Locked"
|
|
bitfld.long 0x00 20. " UPHSK ,Upstream Handshake" "In progress,Done"
|
|
bitfld.long 0x00 19. " DNHSK ,Downstream Handshake" "In progress,Done"
|
|
bitfld.long 0x00 18. " FATAL ,Fatal from A-Shell" "No error,Error"
|
|
bitfld.long 0x00 17. " UPRDY ,Upstream Serial Channel Operational" "Not operational,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CONNECTED ,Connection Established" "Not established,Established"
|
|
bitfld.long 0x00 15. " UPVALID ,Upstream Data Valid Status" "Invalid,Valid"
|
|
bitfld.long 0x00 14. " DNVALID ,Downstream Data Valid Status" "Invalid,Valid"
|
|
bitfld.long 0x00 13. " FATIRQ ,Fatal Interrupt Status" "Not active,Active"
|
|
bitfld.long 0x00 12. " CRCERR ,CRC Error Status in Upstream Data" "No error,Error"
|
|
bitfld.long 0x00 11. " CRCTOUT ,CRC Timeout Status in Upstream Data" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PERROR ,Protocol Error Status" "No error,Error"
|
|
bitfld.long 0x00 9. " READY ,A-Shell Ready Status" "Not ready,Ready"
|
|
bitfld.long 0x00 8. " REMOTERST ,Remote A-Shell Restart Status" "No restart,Restart"
|
|
bitfld.long 0x00 7. " UPVALIDCL ,Clear Upstream Data Valid Status" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " DNVALIDST ,Set Downstream Data Valid Status" "No effect,Set"
|
|
bitfld.long 0x00 5. " FATIRQCL ,Clear Fatal IRQ Interrupt Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CRCERRCL ,Clear CRC Error in Upstream Data Status" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " CRCTOUTCL ,Clear CRC Timeout in Upstream Data Status" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " PERRORCL ,Clear Protocol Error Status" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " READYCL ,Clear A-Shell Ready Status" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " REMOTERSTCL ,Clear Remote A-Shell Restart Status" "No effect,Cleared"
|
|
line.long 0x04 "ARH0_CHCTRL1,ARH Channel Control Register Channel 1"
|
|
bitfld.long 0x04 31. " BYPASS ,BYPASS Mode. Remote Handler active/inactive" "RH active,RH inactive"
|
|
bitfld.long 0x04 30. " FATEIN ,FATAL Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " TXCFG ,Write on ARHn_APCFG registers" "Disabled,Enabled"
|
|
bitfld.long 0x04 25. " RSTRTA ,A-Shell Restart" "Running,Initialized"
|
|
bitfld.long 0x04 24. " INITRH ,Remote Handler Initialization" "Running,Initialized"
|
|
bitfld.long 0x04 21. " PLLGOOD ,APIX PHY PLL Lock Status" "Unlocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x04 20. " UPHSK ,Upstream Handshake" "In progress,Done"
|
|
bitfld.long 0x04 19. " DNHSK ,Downstream Handshake" "In progress,Done"
|
|
bitfld.long 0x04 18. " FATAL ,Fatal from A-Shell" "No error,Error"
|
|
bitfld.long 0x04 17. " UPRDY ,Upstream Serial Channel Operational" "Not operational,Operational"
|
|
bitfld.long 0x04 16. " CONNECTED ,Connection Established" "Not established,Established"
|
|
bitfld.long 0x04 15. " UPVALID ,Upstream Data Valid Status" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x04 14. " DNVALID ,Downstream Data Valid Status" "Invalid,Valid"
|
|
bitfld.long 0x04 13. " FATIRQ ,Fatal Interrupt Status" "Not active,Active"
|
|
bitfld.long 0x04 12. " CRCERR ,CRC Error Status in Upstream Data" "No error,Error"
|
|
bitfld.long 0x04 11. " CRCTOUT ,CRC Timeout Status in Upstream Data" "No timeout,Timeout"
|
|
bitfld.long 0x04 10. " PERROR ,Protocol Error Status" "No error,Error"
|
|
bitfld.long 0x04 9. " READY ,A-Shell Ready Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 8. " REMOTERST ,Remote A-Shell Restart Status" "No restart,Restart"
|
|
bitfld.long 0x04 7. " UPVALIDCL ,Clear Upstream Data Valid Status" "No effect,Cleared"
|
|
bitfld.long 0x04 6. " DNVALIDST ,Set Downstream Data Valid Status" "No effect,Set"
|
|
bitfld.long 0x04 5. " FATIRQCL ,Clear Fatal IRQ Interrupt Status" "No effect,Cleared"
|
|
bitfld.long 0x04 4. " CRCERRCL ,Clear CRC Error in Upstream Data Status" "No effect,Cleared"
|
|
bitfld.long 0x04 3. " CRCTOUTCL ,Clear CRC Timeout in Upstream Data Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 2. " PERRORCL ,Clear Protocol Error Status" "No effect,Cleared"
|
|
bitfld.long 0x04 1. " READYCL ,Clear A-Shell Ready Status" "No effect,Cleared"
|
|
bitfld.long 0x04 0. " REMOTERSTCL ,Clear Remote A-Shell Restart Status" "No effect,Cleared"
|
|
endif
|
|
rgroup.long 0x0C++0x07
|
|
line.long 0x00 "ARH0_CHSTAT0,ARH Channel Status Register Channel 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " UPCRC ,Inbound CRC errors"
|
|
hexmask.long.byte 0x00 8.--15. 1. " UPSYNC ,Number of detected synchronization losses of upstream serial channel"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PLLBAD ,Indicates number of detected PLL synchronization losses"
|
|
line.long 0x04 "ARH0_CHSTAT1,ARH Channel Status Register Channel 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " UPCRC ,Inbound CRC errors"
|
|
hexmask.long.byte 0x04 8.--15. 1. " UPSYNC ,Number of detected synchronization losses of upstream serial channel"
|
|
hexmask.long.byte 0x04 0.--7. 1. " PLLBAD ,Indicates number of detected PLL synchronization losses"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "ARH0_CHWDGCTL0,ARH Channel Watchdog Control Register Channel 0"
|
|
bitfld.long 0x00 31. " WDTXIEN ,TX Watchdog Timer Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " WDRXIEN ,RX Watchdog Timer Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26.--27. " WTTX ,TX Watchdog Timer Select. ARN0_CHWDGCTL0:" "WDTXIRQ0,WDTXIRQ1,WDTXIRQ2,WDTXIRQ3"
|
|
bitfld.long 0x00 24.--25. " WTRX ,RX Watchdog Timer Select. ARN0_CHWDGCTL0:" "WDRXIRQ0,WDRXIRQ1,WDRXIRQ2,WDRXIRQ3"
|
|
rbitfld.long 0x00 15. " WDTXIRQ3 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 14. " WDTXIRQ2 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " WDTXIRQ1 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 12. " WDTXIRQ0 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 11. " WDRXIRQ3 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 10. " WDRXIRQ2 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 9. " WDRXIRQ1 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 8. " WDRXIRQ0 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WDTXIRQ3CL ,Clear WDTXIRQ3" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " WDTXIRQ2CL ,Clear WDTXIRQ2" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " WDTXIRQ1CL ,Clear WDTXIRQ1" "No effect,Cleared"
|
|
bitfld.long 0x00 4. " WDTXIRQ0CL ,Clear WDTXIRQ0" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " WDRXIRQ3CL ,Clear WDRXIRQ3" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " WDRXIRQ2CL ,Clear WDRXIRQ2" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WDRXIRQ1CL ,Clear WDRXIRQ1" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " WDRXIRQ0CL ,Clear WDRXIRQ0" "No effect,Cleared"
|
|
line.long 0x04 "ARH0_CHWDGCTL1,ARH Channel Watchdog Control Register Channel 1"
|
|
bitfld.long 0x04 31. " WDTXIEN ,TX Watchdog Timer Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " WDRXIEN ,RX Watchdog Timer Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 26.--27. " WTTX ,TX Watchdog Timer Select. ARN0_CHWDGCTL0:" "WDTXIRQ0,WDTXIRQ1,WDTXIRQ2,WDTXIRQ3"
|
|
bitfld.long 0x04 24.--25. " WTRX ,RX Watchdog Timer Select. ARN0_CHWDGCTL0:" "WDRXIRQ0,WDRXIRQ1,WDRXIRQ2,WDRXIRQ3"
|
|
rbitfld.long 0x04 15. " WDTXIRQ3 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x04 14. " WDTXIRQ2 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.long 0x04 13. " WDTXIRQ1 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x04 12. " WDTXIRQ0 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x04 11. " WDRXIRQ3 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x04 10. " WDRXIRQ2 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x04 9. " WDRXIRQ1 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x04 8. " WDRXIRQ0 ,Watchdog Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 7. " WDTXIRQ3CL ,Clear WDTXIRQ3" "No effect,Cleared"
|
|
bitfld.long 0x04 6. " WDTXIRQ2CL ,Clear WDTXIRQ2" "No effect,Cleared"
|
|
bitfld.long 0x04 5. " WDTXIRQ1CL ,Clear WDTXIRQ1" "No effect,Cleared"
|
|
bitfld.long 0x04 4. " WDTXIRQ0CL ,Clear WDTXIRQ0" "No effect,Cleared"
|
|
bitfld.long 0x04 3. " WDRXIRQ3CL ,Clear WDRXIRQ3" "No effect,Cleared"
|
|
bitfld.long 0x04 2. " WDRXIRQ2CL ,Clear WDRXIRQ2" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 1. " WDRXIRQ1CL ,Clear WDRXIRQ1" "No effect,Cleared"
|
|
bitfld.long 0x04 0. " WDRXIRQ0CL ,Clear WDRXIRQ0" "No effect,Cleared"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "ARH0_CHWDGCNT0,ARH Watchdog Counter Register Channel 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " CNT ,Free Running Timer"
|
|
line.long 0x00 "ARH0_CHWDGCNT1,ARH Watchdog Counter Register Channel 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " CNT ,Free Running Timer"
|
|
tree "ARH Transaction Buffer Control Registers"
|
|
group.long 0x20++0x3F
|
|
line.long 0x0 "ARH0_TBCTRL0,ARH Transaction Buffer Control Register 0"
|
|
bitfld.long 0x0 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x0 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x0 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x0 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x0 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x0 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x0 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x0 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x0 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x0 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x0 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x0 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x0 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x4 "ARH0_TBCTRL1,ARH Transaction Buffer Control Register 1"
|
|
bitfld.long 0x4 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x4 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x4 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x4 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x4 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x4 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x4 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x4 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x4 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x4 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x4 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x4 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x4 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x4 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x8 "ARH0_TBCTRL2,ARH Transaction Buffer Control Register 2"
|
|
bitfld.long 0x8 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x8 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x8 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x8 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x8 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x8 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x8 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x8 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x8 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x8 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x8 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x8 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x8 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x8 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0xC "ARH0_TBCTRL3,ARH Transaction Buffer Control Register 3"
|
|
bitfld.long 0xC 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0xC 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0xC 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0xC 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0xC 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0xC 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0xC 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0xC 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0xC 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0xC 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0xC 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0xC 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0xC 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0xC 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x10 "ARH0_TBCTRL4,ARH Transaction Buffer Control Register 4"
|
|
bitfld.long 0x10 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x10 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x10 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x10 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x10 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x10 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x10 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x10 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x10 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x10 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x10 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x10 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x14 "ARH0_TBCTRL5,ARH Transaction Buffer Control Register 5"
|
|
bitfld.long 0x14 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x14 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x14 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x14 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x14 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x14 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x14 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x14 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x14 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x14 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x14 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x14 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x14 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x18 "ARH0_TBCTRL6,ARH Transaction Buffer Control Register 6"
|
|
bitfld.long 0x18 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x18 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x18 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x18 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x18 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x18 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x18 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x18 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x18 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x18 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x18 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x18 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x18 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x1C "ARH0_TBCTRL7,ARH Transaction Buffer Control Register 7"
|
|
bitfld.long 0x1C 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x1C 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x1C 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x1C 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x1C 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x1C 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x1C 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x1C 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x1C 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x1C 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x1C 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1C 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x1C 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x1C 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x20 "ARH0_TBCTRL8,ARH Transaction Buffer Control Register 8"
|
|
bitfld.long 0x20 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x20 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x20 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x20 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x20 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x20 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x20 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x20 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x20 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x20 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x20 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x20 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x20 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x24 "ARH0_TBCTRL9,ARH Transaction Buffer Control Register 9"
|
|
bitfld.long 0x24 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x24 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x24 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x24 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x24 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x24 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x24 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x24 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x24 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x24 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x24 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x24 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x24 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x24 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x28 "ARH0_TBCTRL10,ARH Transaction Buffer Control Register 10"
|
|
bitfld.long 0x28 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x28 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x28 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x28 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x28 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x28 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x28 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x28 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x28 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x28 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x28 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x28 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x28 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x28 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x2C "ARH0_TBCTRL11,ARH Transaction Buffer Control Register 11"
|
|
bitfld.long 0x2C 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x2C 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x2C 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x2C 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x2C 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x2C 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x2C 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x2C 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x2C 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x2C 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x2C 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x2C 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x2C 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x2C 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x30 "ARH0_TBCTRL12,ARH Transaction Buffer Control Register 12"
|
|
bitfld.long 0x30 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x30 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x30 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x30 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x30 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x30 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x30 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x30 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x30 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x30 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x30 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x30 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x30 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x30 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x34 "ARH0_TBCTRL13,ARH Transaction Buffer Control Register 13"
|
|
bitfld.long 0x34 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x34 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x34 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x34 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x34 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x34 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x34 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x34 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x34 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x34 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x34 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x34 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x34 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x34 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x38 "ARH0_TBCTRL14,ARH Transaction Buffer Control Register 14"
|
|
bitfld.long 0x38 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x38 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x38 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x38 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x38 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x38 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x38 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x38 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x38 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x38 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x38 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x38 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x38 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x38 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
line.long 0x3C "ARH0_TBCTRL15,ARH Transaction Buffer Control Register 15"
|
|
bitfld.long 0x3C 31. " TBCH ,Transaction Buffer Channel" "Channel0,Channel1"
|
|
bitfld.long 0x3C 30. " TBAINC ,Transaction Buffer Address Increment" "Disabled,Enabled"
|
|
bitfld.long 0x3C 29. " TBACT ,Transaction Buffer Activated. ARHn_RHCTRL:" "TBNO(WR),TBNOorTFDATA(RD or WR)"
|
|
bitfld.long 0x3C 28. " TBIMD ,Transaction Buffer Interrupt Mode" "Idle,Valid"
|
|
bitfld.long 0x3C 17. " TBDEN ,Transaction Buffer DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 16. " TBIEN ,Transaction Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x3C 13. " ACTIVE ,Transaction Buffer Request Active" "Not active,Active"
|
|
rbitfld.long 0x3C 12. " UNLOCKED ,Transaction Buffer Unlocked" "No action,Unlocked"
|
|
rbitfld.long 0x3C 11. " CANCELED ,Transaction Buffer Request Cancelled" "No action,Cancelled"
|
|
rbitfld.long 0x3C 10. " WAITING ,Transaction Buffer Request Waiting" "No action,Waiting"
|
|
rbitfld.long 0x3C 9. " PENDING ,Transaction Buffer Request Pending" "No pending,Data pending"
|
|
rbitfld.long 0x3C 8. " TBIRQ ,Transaction Buffer Interrupt" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x3C 2. " UNLOCKEDCL ,Clear Transaction Buffer Unlocked" "No effect,Cleared"
|
|
bitfld.long 0x3C 1. " CANCELEDCL ,Clear Transaction Buffer Cancelled" "No effect,Cleared"
|
|
bitfld.long 0x3C 0. " TBIRQCL ,Clear Transaction Buffer Interrupt" "No effect,Cleared"
|
|
tree.end
|
|
textline " "
|
|
rgroup.word 0x64++0x01
|
|
line.word 0x00 "ARH0_TBIRQ,ARH Transaction Buffer Interrupt Register"
|
|
bitfld.word 0x00 15. " TBIRQ[15] ,Transaction Buffer Interrupt 0" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 14. " TBIRQ[14] ,Transaction Buffer Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 13. " TBIRQ[13] ,Transaction Buffer Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 12. " TBIRQ[12] ,Transaction Buffer Interrupt 3" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 11. " TBIRQ[11] ,Transaction Buffer Interrupt 4" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 10. " TBIRQ[10] ,Transaction Buffer Interrupt 5" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " TBIRQ[9] ,Transaction Buffer Interrupt 6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 8. " TBIRQ[8] ,Transaction Buffer Interrupt 7" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 7. " TBIRQ[7] ,Transaction Buffer Interrupt 8" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 6. " TBIRQ[6] ,Transaction Buffer Interrupt 9" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 5. " TBIRQ[5] ,Transaction Buffer Interrupt 10" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 4. " TBIRQ[4] ,Transaction Buffer Interrupt 11" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 3. " TBIRQ[3] ,Transaction Buffer Interrupt 12" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 2. " TBIRQ[2] ,Transaction Buffer Interrupt 13" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TBIRQ[1] ,Transaction Buffer Interrupt 14" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 0. " TBIRQ[0] ,Transaction Buffer Interrupt 15" "No interrupt,Interrupt"
|
|
group.byte 0x66++0x01
|
|
line.byte 0x00 "ARH0_TBIDX0,ARH Transaction Buffer Index Register Channel 0"
|
|
bitfld.byte 0x00 0.--4. " TBIDX ,Transaction Buffer Index" "No interrupt,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.byte 0x01 "ARH0_TBIDX1,ARH Transaction Buffer Index Register Channel 1"
|
|
bitfld.byte 0x01 0.--4. " TBIDX ,Transaction Buffer Index" "No interrupt,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree "ARH Transaction Frame Control Registers"
|
|
group.byte 0x68++0x1f
|
|
line.byte 0x0 "ARH0_TFCTRL0_0,ARH Transaction Frame Control Register 0"
|
|
bitfld.byte 0x0 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x0 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x0 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x0 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x0 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x0+0x01) "ARH0_TFIDX_0,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x0+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0x2 "ARH0_TFCTRL0_1,ARH Transaction Frame Control Register 1"
|
|
bitfld.byte 0x2 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x2 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x2 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x2 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x2 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x2 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x2+0x01) "ARH0_TFIDX_1,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x2+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0x4 "ARH0_TFCTRL0_2,ARH Transaction Frame Control Register 2"
|
|
bitfld.byte 0x4 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x4 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x4 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x4 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x4 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x4 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x4+0x01) "ARH0_TFIDX_2,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x4+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0x6 "ARH0_TFCTRL0_3,ARH Transaction Frame Control Register 3"
|
|
bitfld.byte 0x6 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x6 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x6 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x6 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x6 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x6 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x6+0x01) "ARH0_TFIDX_3,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x6+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0x8 "ARH0_TFCTRL0_4,ARH Transaction Frame Control Register 4"
|
|
bitfld.byte 0x8 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x8 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x8 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x8 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x8 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x8 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x8+0x01) "ARH0_TFIDX_4,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x8+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0xA "ARH0_TFCTRL0_5,ARH Transaction Frame Control Register 5"
|
|
bitfld.byte 0xA 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0xA 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0xA 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0xA 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0xA 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0xA 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0xA+0x01) "ARH0_TFIDX_5,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0xA+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0xC "ARH0_TFCTRL0_6,ARH Transaction Frame Control Register 6"
|
|
bitfld.byte 0xC 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0xC 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0xC 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0xC 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0xC 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0xC 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0xC+0x01) "ARH0_TFIDX_6,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0xC+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0xE "ARH0_TFCTRL0_7,ARH Transaction Frame Control Register 7"
|
|
bitfld.byte 0xE 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0xE 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0xE 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0xE 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0xE 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0xE 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0xE+0x01) "ARH0_TFIDX_7,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0xE+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0x10 "ARH0_TFCTRL0_8,ARH Transaction Frame Control Register 8"
|
|
bitfld.byte 0x10 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x10 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x10 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x10 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x10 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x10 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x10+0x01) "ARH0_TFIDX_8,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x10+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0x12 "ARH0_TFCTRL0_9,ARH Transaction Frame Control Register 9"
|
|
bitfld.byte 0x12 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x12 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x12 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x12 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x12 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x12 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x12+0x01) "ARH0_TFIDX_9,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x12+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0x14 "ARH0_TFCTRL0_10,ARH Transaction Frame Control Register 10"
|
|
bitfld.byte 0x14 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x14 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x14 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x14 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x14 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x14 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x14+0x01) "ARH0_TFIDX_10,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x14+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0x16 "ARH0_TFCTRL0_11,ARH Transaction Frame Control Register 11"
|
|
bitfld.byte 0x16 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x16 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x16 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x16 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x16 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x16 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x16+0x01) "ARH0_TFIDX_11,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x16+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0x18 "ARH0_TFCTRL0_12,ARH Transaction Frame Control Register 12"
|
|
bitfld.byte 0x18 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x18 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x18 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x18 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x18 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x18 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x18+0x01) "ARH0_TFIDX_12,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x18+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0x1A "ARH0_TFCTRL0_13,ARH Transaction Frame Control Register 13"
|
|
bitfld.byte 0x1A 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x1A 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x1A 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x1A 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x1A 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x1A 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x1A+0x01) "ARH0_TFIDX_13,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x1A+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0x1C "ARH0_TFCTRL0_14,ARH Transaction Frame Control Register 14"
|
|
bitfld.byte 0x1C 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x1C 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x1C 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x1C 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x1C 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x1C 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x1C+0x01) "ARH0_TFIDX_14,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x1C+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
line.byte 0x1E "ARH0_TFCTRL0_15,ARH Transaction Frame Control Register 15"
|
|
bitfld.byte 0x1E 7. " TFDASWP ,Transaction Frame Data Swap" "Normal,Swap"
|
|
bitfld.byte 0x1E 6. " TFAINV ,Transaction Frame Address Inversion" "Normal,Inversion"
|
|
rbitfld.byte 0x1E 4. " ERROR ,Remote Handler RX Error" "No error,Error"
|
|
bitfld.byte 0x1E 2.--3. " SZ ,Size" "Byte,Halfword,Word,"
|
|
bitfld.byte 0x1E 1. " OAEN ,Offset Address Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x1E 0. " RW ,Read or Write" "Read,Write"
|
|
line.byte (0x1E+0x01) "ARH0_TFIDX_15,ARH Transaction Frame Index Register"
|
|
hexmask.byte (0x1E+0x01) 0.--7. 1. " IDX ,Transaction Frame Index"
|
|
tree.end
|
|
tree "ARH Transaction Frame Address Registers"
|
|
group.long 0x88++0x3F
|
|
line.long 0x0 "ARH0_TFADDR0,ARH Transaction Frame Address Register 0"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x4 "ARH0_TFADDR1,ARH Transaction Frame Address Register 1"
|
|
hexmask.long.tbyte 0x4 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x8 "ARH0_TFADDR2,ARH Transaction Frame Address Register 2"
|
|
hexmask.long.tbyte 0x8 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0xC "ARH0_TFADDR3,ARH Transaction Frame Address Register 3"
|
|
hexmask.long.tbyte 0xC 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x10 "ARH0_TFADDR4,ARH Transaction Frame Address Register 4"
|
|
hexmask.long.tbyte 0x10 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x14 "ARH0_TFADDR5,ARH Transaction Frame Address Register 5"
|
|
hexmask.long.tbyte 0x14 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x18 "ARH0_TFADDR6,ARH Transaction Frame Address Register 6"
|
|
hexmask.long.tbyte 0x18 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x1C "ARH0_TFADDR7,ARH Transaction Frame Address Register 7"
|
|
hexmask.long.tbyte 0x1C 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x20 "ARH0_TFADDR8,ARH Transaction Frame Address Register 8"
|
|
hexmask.long.tbyte 0x20 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x24 "ARH0_TFADDR9,ARH Transaction Frame Address Register 9"
|
|
hexmask.long.tbyte 0x24 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x28 "ARH0_TFADDR10,ARH Transaction Frame Address Register 10"
|
|
hexmask.long.tbyte 0x28 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x2C "ARH0_TFADDR11,ARH Transaction Frame Address Register 11"
|
|
hexmask.long.tbyte 0x2C 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x30 "ARH0_TFADDR12,ARH Transaction Frame Address Register 12"
|
|
hexmask.long.tbyte 0x30 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x34 "ARH0_TFADDR13,ARH Transaction Frame Address Register 13"
|
|
hexmask.long.tbyte 0x34 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x38 "ARH0_TFADDR14,ARH Transaction Frame Address Register 14"
|
|
hexmask.long.tbyte 0x38 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
line.long 0x3C "ARH0_TFADDR15,ARH Transaction Frame Address Register 15"
|
|
hexmask.long.tbyte 0x3C 0.--19. 1. " ADDR ,Transaction Frame Address"
|
|
tree.end
|
|
tree "ARH Transaction Frame Data Registers"
|
|
group.long 0x8C++0x3F
|
|
line.long 0x0 "ARH0_TFDATA0,ARH Transaction Frame Data Register 0"
|
|
line.long 0x4 "ARH0_TFDATA1,ARH Transaction Frame Data Register 1"
|
|
line.long 0x8 "ARH0_TFDATA2,ARH Transaction Frame Data Register 2"
|
|
line.long 0xC "ARH0_TFDATA3,ARH Transaction Frame Data Register 3"
|
|
line.long 0x10 "ARH0_TFDATA4,ARH Transaction Frame Data Register 4"
|
|
line.long 0x14 "ARH0_TFDATA5,ARH Transaction Frame Data Register 5"
|
|
line.long 0x18 "ARH0_TFDATA6,ARH Transaction Frame Data Register 6"
|
|
line.long 0x1C "ARH0_TFDATA7,ARH Transaction Frame Data Register 7"
|
|
line.long 0x20 "ARH0_TFDATA8,ARH Transaction Frame Data Register 8"
|
|
line.long 0x24 "ARH0_TFDATA9,ARH Transaction Frame Data Register 9"
|
|
line.long 0x28 "ARH0_TFDATA10,ARH Transaction Frame Data Register 10"
|
|
line.long 0x2C "ARH0_TFDATA11,ARH Transaction Frame Data Register 11"
|
|
line.long 0x30 "ARH0_TFDATA12,ARH Transaction Frame Data Register 12"
|
|
line.long 0x34 "ARH0_TFDATA13,ARH Transaction Frame Data Register 13"
|
|
line.long 0x38 "ARH0_TFDATA14,ARH Transaction Frame Data Register 14"
|
|
line.long 0x3C "ARH0_TFDATA15,ARH Transaction Frame Data Register 15"
|
|
tree.end
|
|
textline " "
|
|
if (((d.l(ad:0xB0B40000))&0x01)==0x00)
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "ARH0_EVCTRL,ARH Event Control Register"
|
|
bitfld.long 0x00 31. " MODE ,FIFO Mode" "Level,Ring"
|
|
bitfld.long 0x00 30. " FRST ,FIFO Reset" "No reset,Reset"
|
|
hexmask.long.byte 0x00 8.--15. 1. " STATUS ,FIFO Fill Status"
|
|
hexmask.long.byte 0x00 0.--7. " LEVEL ,FIFO Interrupt Level"
|
|
else
|
|
rgroup.long 0x108++0x03
|
|
line.long 0x00 "ARH0_EVCTRL,ARH Event Control Register"
|
|
bitfld.long 0x00 31. " MODE ,FIFO Mode" "Level,Ring"
|
|
bitfld.long 0x00 30. " FRST ,FIFO Reset" "No reset,Reset"
|
|
hexmask.long.byte 0x00 8.--15. 1. " STATUS ,FIFO Fill Status"
|
|
hexmask.long.byte 0x00 0.--7. " LEVEL ,FIFO Interrupt Level"
|
|
endif
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "ARH0_EVIRQC,ARH Event Interrupt Control Register"
|
|
bitfld.long 0x00 31. " LVIEN ,Level Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " OFLIEN ,Event Buffer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " EVIEN ,Event Buffer Interrupt Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 23. " LVIRQ ,Level IRQ" "Inactive,Active"
|
|
rbitfld.long 0x00 22. " OFLIRQ ,Overflow IRQ" "Inactive,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 21. " EVIRQ ,Event IRQ" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " LVIRQCL ,Clear Level IRQ" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " OFLIRQCL ,Clear Event Buffer Overflow IRQ" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " EVIRQCL ,Clear Event Buffer Event IRQ" "No effect,Cleared"
|
|
if (((d.l(ad:0xB0B40000+0x138))&0x100)==0x100)
|
|
group.long 0x110++0x07
|
|
line.long 0x00 "ARH0_EVBUF0,ARH Event Buffer Register"
|
|
bitfld.long 0x00 24. " EVCH ,Event Channel Number" "Channel 0,Channel 1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " EVIDX ,Event Index Number"
|
|
line.long 0x04 "ARH0_EVBUF1,ARH Event Buffer Register"
|
|
else
|
|
rgroup.long 0x110++0x07
|
|
line.long 0x00 "ARH0_EVBUF0,ARH Event Buffer Register"
|
|
bitfld.long 0x00 24. " EVCH ,Event Channel Number" "Channel 0,Channel 1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " EVIDX ,Event Index Number"
|
|
line.long 0x04 "ARH0_EVBUF1,ARH Event Buffer Register"
|
|
endif
|
|
if (((d.l(ad:0xB0B40000+0x04))&0x4000000)==0x4000000)
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "ARH0_APCFG00,ARH APIX Configuration Register Channel 0"
|
|
bitfld.long 0x00 31. " PWRDOWN ,APIX PHY Global power down" "Down,Up"
|
|
bitfld.long 0x00 30. " PWRDOWNPREEMP ,APIX PHY Power down pre-emphasis serializer and pre-emphasis output driver" "Down,Up"
|
|
bitfld.long 0x00 29. " PWRDOWNNOM ,APIX PHY Power down nominal serializer and nominal output driver" "Down,Up"
|
|
bitfld.long 0x00 28. " PWRDOWNUP ,APIX PHY Power down upstream path" "Down,Up"
|
|
bitfld.long 0x00 24.--26. " DWNPREEMPCTRL ,APIX PHY Reduce output current (pre-emphasis) after N equal serial bits (N = 0..7)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " DWNBWMODE ,APIX PHY TX Mode Select" "125Mbit/Low1,250Mbit/Low2,500Mbit/Half,1000Mbit/Full"
|
|
bitfld.long 0x00 21. " PXINCLKACTIVEEDGE ,A-Shell Active Clock Edge Configuration" "Falling,Rising"
|
|
bitfld.long 0x00 20. " PXINJUMBLEEN ,A-Shell Cyclic Pixel Data Inversion Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " PXINCTRLPIGGYBACK ,A-Shell Pixel Control Data Transmission Configuration" "Never,Unused,Even,Full"
|
|
bitfld.long 0x00 16.--17. " PXDATAWIDTH ,A-Shell Pixel Data Width Configuration" "10b,12b,18b,24b"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " UPBWMODE ,APIX PHY Master Upstream Data Rate" "62.50 MBit/s,41.67 MBit/s,31.25 MBit/s,20.83 MBit/s"
|
|
bitfld.long 0x00 12. " UPLENIENTWINDOW ,A-Shell Synchronization Error Tolerance Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " UPSMPOFST ,APIX PHY Upstream Sampling Point Configuration" "62.50Mb/s,,41.67_31.25Mb/s,,20.83Mb/s,,,,,,,,,,,"
|
|
bitfld.long 0x00 7. " JUMBLERMASKEN ,A-Shell Pixel Data Mask Enable Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SBUPSKIPSKIP ,A-Shell Resynchronization in Upstream Channel Configuration" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SBUPRESTARTONERROR ,A-Shell Restart on Error in Upstream Channel Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BOOTSUPPORTDISABLE ,A-Shell Boot Support Disable Configuration" "Rising edge,Data enable"
|
|
bitfld.long 0x00 3. " TRACEFEEDENABLE ,A-Shell Trace Feed Enable Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CEB6DISABLE ,A-Shell Consecutive 6 Bits Equivalence Check Configuration" "Enabled,Disabled"
|
|
bitfld.long 0x00 1. " CEB4DISABLE ,A-Shell Consecutive 4 Bits Equivalence Check Configuration" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IGNOREPLLGOOD ,APIX PHY PLLGOOD Output Ignore Configuration" "Enabled,Disabled"
|
|
else
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "ARH0_APCFG00,ARH APIX Configuration Register Channel 0"
|
|
bitfld.long 0x00 31. " PWRDOWN ,APIX PHY Global power down" "Down,Up"
|
|
bitfld.long 0x00 30. " PWRDOWNPREEMP ,APIX PHY Power down pre-emphasis serializer and pre-emphasis output driver" "Down,Up"
|
|
bitfld.long 0x00 29. " PWRDOWNNOM ,APIX PHY Power down nominal serializer and nominal output driver" "Down,Up"
|
|
bitfld.long 0x00 28. " PWRDOWNUP ,APIX PHY Power down upstream path" "Down,Up"
|
|
bitfld.long 0x00 24.--26. " DWNPREEMPCTRL ,APIX PHY Reduce output current (pre-emphasis) after N equal serial bits (N = 0..7)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " DWNBWMODE ,APIX PHY TX Mode Select" "125Mbit/Low1,250Mbit/Low2,500Mbit/Half,1000Mbit/Full"
|
|
bitfld.long 0x00 21. " PXINCLKACTIVEEDGE ,A-Shell Active Clock Edge Configuration" "Falling,Rising"
|
|
bitfld.long 0x00 20. " PXINJUMBLEEN ,A-Shell Cyclic Pixel Data Inversion Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " PXINCTRLPIGGYBACK ,A-Shell Pixel Control Data Transmission Configuration" "Never,Unused,Even,Full"
|
|
bitfld.long 0x00 16.--17. " PXDATAWIDTH ,A-Shell Pixel Data Width Configuration" "10b,12b,18b,24b"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " UPBWMODE ,APIX PHY Master Upstream Data Rate" "62.50 MBit/s,41.67 MBit/s,31.25 MBit/s,20.83 MBit/s"
|
|
bitfld.long 0x00 12. " UPLENIENTWINDOW ,A-Shell Synchronization Error Tolerance Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " UPSMPOFST ,APIX PHY Upstream Sampling Point Configuration" "62.50Mb/s,,41.67_31.25Mb/s,,20.83Mb/s,,,,,,,,,,,"
|
|
bitfld.long 0x00 7. " JUMBLERMASKEN ,A-Shell Pixel Data Mask Enable Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SBUPSKIPSKIP ,A-Shell Resynchronization in Upstream Channel Configuration" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SBUPRESTARTONERROR ,A-Shell Restart on Error in Upstream Channel Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BOOTSUPPORTDISABLE ,A-Shell Boot Support Disable Configuration" "Rising edge,Data enable"
|
|
bitfld.long 0x00 3. " TRACEFEEDENABLE ,A-Shell Trace Feed Enable Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CEB6DISABLE ,A-Shell Consecutive 6 Bits Equivalence Check Configuration" "Enabled,Disabled"
|
|
bitfld.long 0x00 1. " CEB4DISABLE ,A-Shell Consecutive 4 Bits Equivalence Check Configuration" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IGNOREPLLGOOD ,APIX PHY PLLGOOD Output Ignore Configuration" "Enabled,Disabled"
|
|
endif
|
|
if (((d.l(ad:0xB0B40000+0x08))&0x4000000)==0x4000000)
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "ARH0_APCFG10,ARH APIX Configuration Register Channel 1"
|
|
bitfld.long 0x00 21. " PXINCLKACTIVEEDGE ,A-Shell Active Clock Edge Configuration" "Falling,Rising"
|
|
bitfld.long 0x00 20. " PXINJUMBLEEN ,A-Shell Cyclic Pixel Data Inversion Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " PXINCTRLPIGGYBACK ,A-Shell Pixel Control Data Transmission Configuration" "Never,Unused,Even,Full"
|
|
bitfld.long 0x00 16.--17. " PXDATAWIDTH ,A-Shell Pixel Data Width Configuration" "10b,12b,18b,24b"
|
|
bitfld.long 0x00 12. " UPLENIENTWINDOW ,A-Shell Synchronization Error Tolerance Configuration" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " JUMBLERMASKEN ,A-Shell Pixel Data Mask Enable Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SBUPSKIPSKIP ,A-Shell Resynchronization in Upstream Channel Configuration" "Enabled,Disabled"
|
|
bitfld.long 0x00 5. " SBUPRESTARTONERROR ,A-Shell Restart on Error in Upstream Channel Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BOOTSUPPORTDISABLE ,A-Shell Boot Support Disable Configuration" "Rising edge,Data enable"
|
|
bitfld.long 0x00 3. " TRACEFEEDENABLE ,A-Shell Trace Feed Enable Configuration" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CEB6DISABLE ,A-Shell Consecutive 6 Bits Equivalence Check Configuration" "Enabled,Disabled"
|
|
bitfld.long 0x00 1. " CEB4DISABLE ,A-Shell Consecutive 4 Bits Equivalence Check Configuration" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " IGNOREPLLGOOD ,APIX PHY PLLGOOD Output Ignore Configuration" "Enabled,Disabled"
|
|
else
|
|
rgroup.long 0x128++0x03
|
|
line.long 0x00 "ARH0_APCFG10,ARH APIX Configuration Register Channel 1"
|
|
bitfld.long 0x00 21. " PXINCLKACTIVEEDGE ,A-Shell Active Clock Edge Configuration" "Falling,Rising"
|
|
bitfld.long 0x00 20. " PXINJUMBLEEN ,A-Shell Cyclic Pixel Data Inversion Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " PXINCTRLPIGGYBACK ,A-Shell Pixel Control Data Transmission Configuration" "Never,Unused,Even,Full"
|
|
bitfld.long 0x00 16.--17. " PXDATAWIDTH ,A-Shell Pixel Data Width Configuration" "10b,12b,18b,24b"
|
|
bitfld.long 0x00 12. " UPLENIENTWINDOW ,A-Shell Synchronization Error Tolerance Configuration" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " JUMBLERMASKEN ,A-Shell Pixel Data Mask Enable Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SBUPSKIPSKIP ,A-Shell Resynchronization in Upstream Channel Configuration" "Enabled,Disabled"
|
|
bitfld.long 0x00 5. " SBUPRESTARTONERROR ,A-Shell Restart on Error in Upstream Channel Configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BOOTSUPPORTDISABLE ,A-Shell Boot Support Disable Configuration" "Rising edge,Data enable"
|
|
bitfld.long 0x00 3. " TRACEFEEDENABLE ,A-Shell Trace Feed Enable Configuration" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CEB6DISABLE ,A-Shell Consecutive 6 Bits Equivalence Check Configuration" "Enabled,Disabled"
|
|
bitfld.long 0x00 1. " CEB4DISABLE ,A-Shell Consecutive 4 Bits Equivalence Check Configuration" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " IGNOREPLLGOOD ,APIX PHY PLLGOOD Output Ignore Configuration" "Enabled,Disabled"
|
|
endif
|
|
if (((d.l(ad:0xB0B40000+0x04))&0x4000000)==0x4000000)
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "ARH0_APCFG01,ARH APIX Configuration Register Channel 0"
|
|
bitfld.long 0x00 31. " DDOWNENABLE ,A-Shell Downstream Data Path Configuration. Data mode/Pixel stream mode" "Disabled/Enabled,Enabled/Disabled"
|
|
bitfld.long 0x00 30. " SBDOWNSMODE ,APIX PHY Downstream Sideband Data Relation to Core Clock" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 29. " CLKCORE1ENABLE ,APIX PHY Core Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " CLKCORE2ENABLE ,A-Shell1 Core Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " CLKCORE3ENABLE ,A-Shell12 Core Clock Enable" "Disabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " MASKPLLGOOD ,PLLGOOD Mask bit for APIX PHY" "No effec,Enabled"
|
|
bitfld.long 0x00 20.--23. " CRGPMPCTRL ,APIX PHY Charge Pump Current Control" "5uA,10uA,15uA,20uA,25uA,30uA,35uA,40uA,45uA,50uA,55uA,60uA,65uA,70uA,75uA,80uA"
|
|
hexmask.long.byte 0x00 14.--19. 1. " DWNNOMCUR ,APIX Nominal Current Configuration(64 Steps)"
|
|
hexmask.long.byte 0x00 8.--13. 1. " DWNPREEMPCUR ,APIX Pre-emphasis Current Configuration(64 Steps)"
|
|
hexmask.long.byte 0x00 1.--7. 1. " TRIGGERCYCLELENGTH ,A-Shell Sideband Downstream Trigger Output Pulse Pattern Cycle Length Configuration"
|
|
else
|
|
rgroup.long 0x11C++0x03
|
|
line.long 0x00 "ARH0_APCFG01,ARH APIX Configuration Register Channel 0"
|
|
bitfld.long 0x00 31. " DDOWNENABLE ,A-Shell Downstream Data Path Configuration. Data mode/Pixel stream mode" "Disabled/Enabled,Enabled/Disabled"
|
|
bitfld.long 0x00 30. " SBDOWNSMODE ,APIX PHY Downstream Sideband Data Relation to Core Clock" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 29. " CLKCORE1ENABLE ,APIX PHY Core Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " CLKCORE2ENABLE ,A-Shell1 Core Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " CLKCORE3ENABLE ,A-Shell12 Core Clock Enable" "Disabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " MASKPLLGOOD ,PLLGOOD Mask bit for APIX PHY" "No effec,Enabled"
|
|
bitfld.long 0x00 20.--23. " CRGPMPCTRL ,APIX PHY Charge Pump Current Control" "5uA,10uA,15uA,20uA,25uA,30uA,35uA,40uA,45uA,50uA,55uA,60uA,65uA,70uA,75uA,80uA"
|
|
hexmask.long.byte 0x00 14.--19. 1. " DWNNOMCUR ,APIX Nominal Current Configuration(64 Steps)"
|
|
hexmask.long.byte 0x00 8.--13. 1. " DWNPREEMPCUR ,APIX Pre-emphasis Current Configuration(64 Steps)"
|
|
hexmask.long.byte 0x00 1.--7. 1. " TRIGGERCYCLELENGTH ,A-Shell Sideband Downstream Trigger Output Pulse Pattern Cycle Length Configuration"
|
|
endif
|
|
if (((d.l(ad:0xB0B40000+0x08))&0x4000000)==0x4000000)
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "ARH0_APCFG11,ARH APIX Configuration Register Channel 1"
|
|
bitfld.long 0x00 31. " DDOWNENABLE ,A-Shell Downstream Data Path Configuration. Data mode/Pixel stream mode" "Disabled/Enabled,Enabled/Disabled"
|
|
bitfld.long 0x00 30. " SBDOWNSMODE ,APIX PHY Downstream Sideband Data Relation to Core Clock" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 29. " CLKCORE1ENABLE ,APIX PHY Core Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " CLKCORE2ENABLE ,A-Shell1 Core Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " CLKCORE3ENABLE ,A-Shell12 Core Clock Enable" "Disabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " MASKPLLGOOD ,PLLGOOD Mask bit for APIX PHY" "No effec,Enabled"
|
|
hexmask.long.byte 0x00 1.--7. 1. " TRIGGERCYCLELENGTH ,A-Shell Sideband Downstream Trigger Output Pulse Pattern Cycle Length Configuration"
|
|
else
|
|
rgroup.long 0x12C++0x03
|
|
line.long 0x00 "ARH0_APCFG11,ARH APIX Configuration Register Channel 1"
|
|
bitfld.long 0x00 31. " DDOWNENABLE ,A-Shell Downstream Data Path Configuration. Data mode/Pixel stream mode" "Disabled/Enabled,Enabled/Disabled"
|
|
bitfld.long 0x00 30. " SBDOWNSMODE ,APIX PHY Downstream Sideband Data Relation to Core Clock" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 29. " CLKCORE1ENABLE ,APIX PHY Core Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " CLKCORE2ENABLE ,A-Shell1 Core Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " CLKCORE3ENABLE ,A-Shell12 Core Clock Enable" "Disabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " MASKPLLGOOD ,PLLGOOD Mask bit for APIX PHY" "No effec,Enabled"
|
|
hexmask.long.byte 0x00 1.--7. 1. " TRIGGERCYCLELENGTH ,A-Shell Sideband Downstream Trigger Output Pulse Pattern Cycle Length Configuration"
|
|
endif
|
|
if (((d.l(ad:0xB0B40000+0x04))&0x4000000)==0x4000000)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "ARH0_APCFG02,ARH APIX Configuration Register Channel 0"
|
|
hexmask.long.byte 0x00 25.--31. 1. " TRIGGERACTIVELENGTH ,A-Shell Sideband Downstream Trigger Output Active Length Configuration"
|
|
hexmask.long.byte 0x00 17.--23. 1. " TRIGGEROFFSET ,A-Shell Sideband Downstream Trigger Output Offset Configuration"
|
|
bitfld.long 0x00 14.--15. " SBUPVALIDACTIVELENGTH ,A-Shell Sideband Upstream Valid Output Active Length Configuration" "1cycle,2cycles,3cycles,4cycles"
|
|
bitfld.long 0x00 7. " PLLMULT ,APIX PHY PLL Multiplier" "20MHz,25MHz"
|
|
bitfld.long 0x00 6. " OSCFILTER ,APIX PHY Oscillator Filter Enable" "Disabled,100MHz LPF"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TXINVERT ,APIX PHY TX Data Invert Enable" "Not inverted,Inverted"
|
|
bitfld.long 0x00 4. " RXINVERT ,APIX PHY RX Data Invert Enable" "Not inverted,Inverted"
|
|
bitfld.long 0x00 3. " PLLGOODSEL ,APIX PLLGOOD Status Select" "Reset,No reset"
|
|
bitfld.long 0x00 0. " SCPREEN ,Sysclk Prescalar Enable. Shell clock - Bus clock" "Equal,Half"
|
|
else
|
|
rgroup.long 0x120++0x03
|
|
line.long 0x00 "ARH0_APCFG02,ARH APIX Configuration Register Channel 0"
|
|
hexmask.long.byte 0x00 25.--31. 1. " TRIGGERACTIVELENGTH ,A-Shell Sideband Downstream Trigger Output Active Length Configuration"
|
|
hexmask.long.byte 0x00 17.--23. 1. " TRIGGEROFFSET ,A-Shell Sideband Downstream Trigger Output Offset Configuration"
|
|
bitfld.long 0x00 14.--15. " SBUPVALIDACTIVELENGTH ,A-Shell Sideband Upstream Valid Output Active Length Configuration" "1cycle,2cycles,3cycles,4cycles"
|
|
bitfld.long 0x00 7. " PLLMULT ,APIX PHY PLL Multiplier" "20MHz,25MHz"
|
|
bitfld.long 0x00 6. " OSCFILTER ,APIX PHY Oscillator Filter Enable" "Disabled,100MHz LPF"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TXINVERT ,APIX PHY TX Data Invert Enable" "Not inverted,Inverted"
|
|
bitfld.long 0x00 4. " RXINVERT ,APIX PHY RX Data Invert Enable" "Not inverted,Inverted"
|
|
bitfld.long 0x00 3. " PLLGOODSEL ,APIX PLLGOOD Status Select" "Reset,No reset"
|
|
bitfld.long 0x00 0. " SCPREEN ,Sysclk Prescalar Enable. Shell clock - Bus clock" "Equal,Half"
|
|
endif
|
|
if (((d.l(ad:0xB0B40000+0x08))&0x4000000)==0x4000000)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "ARH0_APCFG12,ARH APIX Configuration Register Channel 1"
|
|
hexmask.long.byte 0x00 25.--31. 1. " TRIGGERACTIVELENGTH ,A-Shell Sideband Downstream Trigger Output Active Length Configuration"
|
|
hexmask.long.byte 0x00 17.--23. 1. " TRIGGEROFFSET ,A-Shell Sideband Downstream Trigger Output Offset Configuration"
|
|
bitfld.long 0x00 14.--15. " SBUPVALIDACTIVELENGTH ,A-Shell Sideband Upstream Valid Output Active Length Configuration" "1cycle,2cycles,3cycles,4cycles"
|
|
else
|
|
rgroup.long 0x130++0x03
|
|
line.long 0x00 "ARH0_APCFG12,ARH APIX Configuration Register Channel 1"
|
|
hexmask.long.byte 0x00 25.--31. 1. " TRIGGERACTIVELENGTH ,A-Shell Sideband Downstream Trigger Output Active Length Configuration"
|
|
hexmask.long.byte 0x00 17.--23. 1. " TRIGGEROFFSET ,A-Shell Sideband Downstream Trigger Output Offset Configuration"
|
|
bitfld.long 0x00 14.--15. " SBUPVALIDACTIVELENGTH ,A-Shell Sideband Upstream Valid Output Active Length Configuration" "1cycle,2cycles,3cycles,4cycles"
|
|
endif
|
|
if (((d.l(ad:0xB0B40000+0x04))&0x4000000)==0x4000000)
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ARH0_APCFG03,ARH APIX Configuration Register Channel 0"
|
|
bitfld.long 0x00 31. " SBDWNCLK ,Functional Meaning of Sideband Downstream Trigger" "Request,Strobe"
|
|
hexmask.long.byte 0x00 24.--30. 1. " SBDWNDACLKCLENL ,Sideband Downstream Clock Cycle Time"
|
|
bitfld.long 0x00 23. " SBUPDWIDTH ,Sideband Upstream Ports Enable" "Data[0],Data[1:0]"
|
|
bitfld.long 0x00 22. " SBUPDACLK ,Sideband Upstream Data Validation" "Valid,Data[1]"
|
|
bitfld.long 0x00 21. " SBDWNDWIDTH ,Sideband Downstream Ports Enable" "Data[0],Data[1:0]"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " SBDWNDACLK ,Sideband Downstream(SD) Clock Generate Source" "Disabled,SD Trigger,Internal counter,Disabled"
|
|
bitfld.long 0x00 18. " EPHY ,Internal A-Shell to External APIX PHY Connection Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " ESHELL ,Internal APIX PHY to External A-Shell Connection Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SPIOVERSB ,SPI Over Sideband Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " CRCTIMEOUTVALM ,CRC Timeout Value Multiplier" "1,4,16,128"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CRCTIMEOUTVALB ,CRC Timeout Value Base" "2,4,6,10"
|
|
bitfld.long 0x00 8.--11. " WINDOWSIZE ,These bits defines the window size of the acknowledge protocol" ",1,2,3,4,5,6,7,8,9,10,11,12,,,"
|
|
bitfld.long 0x00 7. " ARQOFF ,ARQ Control" "Enabled,Disabled"
|
|
bitfld.long 0x00 6. " SUPPRESSITA ,Outbound Idle Transaction Control" "Sent,Not sent"
|
|
bitfld.long 0x00 0.--2. " SBDWNDACLKCLENU ,Sideband Downstream Clock Cycle Time" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7"
|
|
else
|
|
rgroup.long 0x124++0x03
|
|
line.long 0x00 "ARH0_APCFG03,ARH APIX Configuration Register Channel 0"
|
|
bitfld.long 0x00 31. " SBDWNCLK ,Functional Meaning of Sideband Downstream Trigger" "Request,Strobe"
|
|
hexmask.long.byte 0x00 24.--30. 1. " SBDWNDACLKCLENL ,Sideband Downstream Clock Cycle Time"
|
|
bitfld.long 0x00 23. " SBUPDWIDTH ,Sideband Upstream Ports Enable" "Data[0],Data[1:0]"
|
|
bitfld.long 0x00 22. " SBUPDACLK ,Sideband Upstream Data Validation" "Valid,Data[1]"
|
|
bitfld.long 0x00 21. " SBDWNDWIDTH ,Sideband Downstream Ports Enable" "Data[0],Data[1:0]"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " SBDWNDACLK ,Sideband Downstream(SD) Clock Generate Source" "Disabled,SD Trigger,Internal counter,Disabled"
|
|
bitfld.long 0x00 18. " EPHY ,Internal A-Shell to External APIX PHY Connection Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " ESHELL ,Internal APIX PHY to External A-Shell Connection Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SPIOVERSB ,SPI Over Sideband Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " CRCTIMEOUTVALM ,CRC Timeout Value Multiplier" "1,4,16,128"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CRCTIMEOUTVALB ,CRC Timeout Value Base" "2,4,6,10"
|
|
bitfld.long 0x00 8.--11. " WINDOWSIZE ,These bits defines the window size of the acknowledge protocol" ",1,2,3,4,5,6,7,8,9,10,11,12,,,"
|
|
bitfld.long 0x00 7. " ARQOFF ,ARQ Control" "Enabled,Disabled"
|
|
bitfld.long 0x00 6. " SUPPRESSITA ,Outbound Idle Transaction Control" "Sent,Not sent"
|
|
bitfld.long 0x00 0.--2. " SBDWNDACLKCLENU ,Sideband Downstream Clock Cycle Time" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7"
|
|
endif
|
|
if (((d.l(ad:0xB0B40000+0x08))&0x4000000)==0x4000000)
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "ARH0_APCFG13,ARH APIX Configuration Register Channel 1"
|
|
bitfld.long 0x00 31. " SBDWNCLK ,Functional Meaning of Sideband Downstream Trigger" "Request,Strobe"
|
|
hexmask.long.byte 0x00 24.--30. 1. " SBDWNDACLKCLENL ,Sideband Downstream Clock Cycle Time"
|
|
bitfld.long 0x00 23. " SBUPDWIDTH ,Sideband Upstream Ports Enable" "Data[0],Data[1:0]"
|
|
bitfld.long 0x00 22. " SBUPDACLK ,Sideband Upstream Data Validation" "Valid,Data[1]"
|
|
bitfld.long 0x00 21. " SBDWNDWIDTH ,Sideband Downstream Ports Enable" "Data[0],Data[1:0]"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " SBDWNDACLK ,Sideband Downstream(SD) Clock Generate Source" "Disabled,SD Trigger,Internal counter,Disabled"
|
|
bitfld.long 0x00 18. " EPHY ,Internal A-Shell to External APIX PHY Connection Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " ESHELL ,Internal APIX PHY to External A-Shell Connection Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SPIOVERSB ,SPI Over Sideband Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " CRCTIMEOUTVALM ,CRC Timeout Value Multiplier" "1,4,16,128"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CRCTIMEOUTVALB ,CRC Timeout Value Base" "2,4,6,10"
|
|
bitfld.long 0x00 8.--11. " WINDOWSIZE ,These bits defines the window size of the acknowledge protocol" ",1,2,3,4,5,6,7,8,9,10,11,12,,,"
|
|
bitfld.long 0x00 7. " ARQOFF ,ARQ Control" "Enabled,Disabled"
|
|
bitfld.long 0x00 6. " SUPPRESSITA ,Outbound Idle Transaction Control" "Sent,Not sent"
|
|
bitfld.long 0x00 0.--2. " SBDWNDACLKCLENU ,Sideband Downstream Clock Cycle Time" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7"
|
|
else
|
|
rgroup.long 0x134++0x03
|
|
line.long 0x00 "ARH0_APCFG13,ARH APIX Configuration Register Channel 1"
|
|
bitfld.long 0x00 31. " SBDWNCLK ,Functional Meaning of Sideband Downstream Trigger" "Request,Strobe"
|
|
hexmask.long.byte 0x00 24.--30. 1. " SBDWNDACLKCLENL ,Sideband Downstream Clock Cycle Time"
|
|
bitfld.long 0x00 23. " SBUPDWIDTH ,Sideband Upstream Ports Enable" "Data[0],Data[1:0]"
|
|
bitfld.long 0x00 22. " SBUPDACLK ,Sideband Upstream Data Validation" "Valid,Data[1]"
|
|
bitfld.long 0x00 21. " SBDWNDWIDTH ,Sideband Downstream Ports Enable" "Data[0],Data[1:0]"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " SBDWNDACLK ,Sideband Downstream(SD) Clock Generate Source" "Disabled,SD Trigger,Internal counter,Disabled"
|
|
bitfld.long 0x00 18. " EPHY ,Internal A-Shell to External APIX PHY Connection Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " ESHELL ,Internal APIX PHY to External A-Shell Connection Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SPIOVERSB ,SPI Over Sideband Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " CRCTIMEOUTVALM ,CRC Timeout Value Multiplier" "1,4,16,128"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CRCTIMEOUTVALB ,CRC Timeout Value Base" "2,4,6,10"
|
|
bitfld.long 0x00 8.--11. " WINDOWSIZE ,These bits defines the window size of the acknowledge protocol" ",1,2,3,4,5,6,7,8,9,10,11,12,,,"
|
|
bitfld.long 0x00 7. " ARQOFF ,ARQ Control" "Enabled,Disabled"
|
|
bitfld.long 0x00 6. " SUPPRESSITA ,Outbound Idle Transaction Control" "Sent,Not sent"
|
|
bitfld.long 0x00 0.--2. " SBDWNDACLKCLENU ,Sideband Downstream Clock Cycle Time" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7"
|
|
endif
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "ARH0_TST,ARH Test Register"
|
|
bitfld.long 0x00 9. " RW ,RAM mode" "Read,Write"
|
|
bitfld.long 0x00 8. " TM ,Test Mode" "FIFO,RAM"
|
|
hexmask.long.byte 0x00 0.--6. 0x1 " ADDR ,Address"
|
|
wgroup.long 0x13C++0x03
|
|
line.long 0x00 "ARH0_UNLOCK,ARH Unlock Register"
|
|
rgroup.long 0x140++0x03
|
|
line.long 0x00 "ARH0_MID,ARH Module ID Register"
|
|
if (((d.l(ad:0xB0B40000+0x04))&0x4000000)==0x4000000)
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "ARH0_APCFG04,ARH APIX Configuration Register Channel 0"
|
|
bitfld.long 0x00 31. " SYSCLKSEL ,A-Shell0 System Clock Source Selector" "APIX PHY,APCFG02:SCPREEN"
|
|
bitfld.long 0x00 14.--15. " AACCLKDATAOFST ,AIC2 Clock Data Offset" "1cycle,2cycles,3cycles,4cycles"
|
|
hexmask.long.word 0x00 2.--13. 1. " AACCLKFREQ ,AIC2 Clock Frequency"
|
|
bitfld.long 0x00 1. " DATAPATHSEL ,Data Path Selection" "APIX PHY,AIC2"
|
|
bitfld.long 0x00 0. " AACCLKMODE ,AIC2 Clock Mode" "Both edges,Rising only"
|
|
else
|
|
rgroup.long 0x144++0x03
|
|
line.long 0x00 "ARH0_APCFG04,ARH APIX Configuration Register Channel 0"
|
|
bitfld.long 0x00 31. " SYSCLKSEL ,A-Shell0 System Clock Source Selector" "APIX PHY,APCFG02:SCPREEN"
|
|
bitfld.long 0x00 14.--15. " AACCLKDATAOFST ,AIC2 Clock Data Offset" "1cycle,2cycles,3cycles,4cycles"
|
|
hexmask.long.word 0x00 2.--13. 1. " AACCLKFREQ ,AIC2 Clock Frequency"
|
|
bitfld.long 0x00 1. " DATAPATHSEL ,Data Path Selection" "APIX PHY,AIC2"
|
|
bitfld.long 0x00 0. " AACCLKMODE ,AIC2 Clock Mode" "Both edges,Rising only"
|
|
endif
|
|
if (((d.l(ad:0xB0B40000+0x08))&0x4000000)==0x4000000)
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "ARH0_APCFG14,ARH APIX Configuration Register Channel 1"
|
|
bitfld.long 0x00 31. " SYSCLKSEL ,A-Shell0 System Clock Source Selector" "APIX PHY,APCFG02:SCPREEN"
|
|
bitfld.long 0x00 14.--15. " AACCLKDATAOFST ,AIC2 Clock Data Offset" "1cycle,2cycles,3cycles,4cycles"
|
|
hexmask.long.word 0x00 2.--13. 1. " AACCLKFREQ ,AIC2 Clock Frequency"
|
|
bitfld.long 0x00 1. " DATAPATHSEL ,Data Path Selection" "APIX PHY,AIC2"
|
|
bitfld.long 0x00 0. " AACCLKMODE ,AIC2 Clock Mode" "Both edges,Rising only"
|
|
else
|
|
rgroup.long 0x148++0x03
|
|
line.long 0x00 "ARH0_APCFG14,ARH APIX Configuration Register Channel 1"
|
|
bitfld.long 0x00 31. " SYSCLKSEL ,A-Shell0 System Clock Source Selector" "APIX PHY,APCFG02:SCPREEN"
|
|
bitfld.long 0x00 14.--15. " AACCLKDATAOFST ,AIC2 Clock Data Offset" "1cycle,2cycles,3cycles,4cycles"
|
|
hexmask.long.word 0x00 2.--13. 1. " AACCLKFREQ ,AIC2 Clock Frequency"
|
|
bitfld.long 0x00 1. " DATAPATHSEL ,Data Path Selection" "APIX PHY,AIC2"
|
|
bitfld.long 0x00 0. " AACCLKMODE ,AIC2 Clock Mode" "Both edges,Rising only"
|
|
endif
|
|
group.long 0x14C++03
|
|
line.long 0x00 "ARHn0EVAL0,APIX PHY Evaluation Transmitter Pattern Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TXPATTERN ,TX Pattern Configuration"
|
|
rgroup.long 0x150++0x03
|
|
line.long 0x00 "ARH0_EVAL1,APIX PHY Evaluation Receiver Pattern Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXPATTERN ,RX Pattern Status"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "ARH0_EVAL2,APIX PHY Evaluation Configuration Register"
|
|
bitfld.long 0x00 30.--31. " PATTERNGENEN ,Pattern Generated and/or Checked" "16b inv 16b,16b,10b PRBS,Preamble 55AA"
|
|
bitfld.long 0x00 29. " RXEDGE ,Edge Selector for Sampling" "Rising,Falling"
|
|
bitfld.long 0x00 28. " PATTERNRATE ,Pattern Rate Selector(for generator and checker)" "APCFG00:TXBWMODE,62.5Mb/s"
|
|
bitfld.long 0x00 27. " PATTCHKSOURCE ,Pattern Check Source" "Samplers,RxBit"
|
|
bitfld.long 0x00 25.--26. " ERRORHOLD ,Hold Time for ARHn_EVAL2:RXEQTX on Error" "16ns,256ns,Next EVAL3:RXTXLOCKED,EVAL2:PATTERNGENEN preamble"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " TXSOURCE ,Transmit Data Source" "Core,Pat generator,Sampled,RxBit,500Mbps Toggle,250Mbps Toggle,125Mbps Toggle,62.5Mbps Toggle"
|
|
bitfld.long 0x00 19.--20. " ENLOOPBCK ,Enable Loopback" "Disabled,Disabled,Serializer,SDOUT"
|
|
bitfld.long 0x00 18. " RXEPTRIGGER ,ARHn_EVAL3:RXEDGEPOS[3] Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--15. " LOOPBCKSWING ,Loopback Swing Control" "48mV,,,,,,,,,,,,,,,192mV"
|
|
bitfld.long 0x00 7. " TESTPD ,Power down for Test" "No effect,Down"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MASKPLLGOODSET ,A-Shell0 MASKPLLGOOD Set" "No effect,Set"
|
|
bitfld.long 0x00 3. " MASKPLLGOODCLR ,A-Shell0 MASKPLLGOOD Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " RXREALIGNSET ,A-Shell0 RXREALIGN Set Bit" "No effect,Set"
|
|
bitfld.long 0x00 1. " RXREALIGNCLR ,A-Shell0 RXREALIGN Clear Bit" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " TESTENABLE ,Enable BIST" "Disabled,Enabled"
|
|
rgroup.long 0x158++0x03
|
|
line.long 0x00 "ARH0_EVAL3,APIX PHY Evaluation Receiver Status Register"
|
|
bitfld.long 0x00 31. " RXTXLOCKED ,Preamble Lock Status" "Expected,Detected"
|
|
bitfld.long 0x00 30. " RXEQTX ,RX Pattern status" "Not detected,Expected"
|
|
bitfld.long 0x00 27. " RXEDGEPOS[3] ,Toggles state when RXEDGEPOS[2:0] crosses 000/111 boundary" "Not crossed,Crossed"
|
|
bitfld.long 0x00 24.--26. " RXEDGEPOS[2:0] ,Position of Last Edge in Upstream Data" "62.5MHz clock rising,Clock 1,Clock 2,Clock 3,Clock 4,Clock 5,Clock 6,Clock 7"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "ARH0_EVAL4,APIX PHY Evaluation Misc Test Enable Register"
|
|
hexmask.long 0x00 6.--31. 1. " TESTMISC ,Test Functions Selection"
|
|
bitfld.long 0x00 5. " LOCK2PATTERN ,Lock Pattern Selection" "Preamble,Pattern"
|
|
bitfld.long 0x00 0.--4. " TESTLENGTH ,Length of BIST Test Pattern (excluding preamble). (2^TestLength) clocks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,,"
|
|
rgroup.long 0x160++0x03
|
|
line.long 0x00 "ARH0_EVAL5,APIX PHY Evaluation Status Register"
|
|
bitfld.long 0x00 4. " TESTSTATUS[4] ,Current pattern type" "Preamble,Pattern"
|
|
bitfld.long 0x00 3. " TESTSTATUS[3] ,Pattern type at test end (pass or fail)" "Preamble,Pattern"
|
|
bitfld.long 0x00 2. " TESTSTATUS[2] ,BIST pass" "Failed/Running,Passed"
|
|
bitfld.long 0x00 1. " TESTSTATUS[1] ,BIST running" "Not running,Complete"
|
|
bitfld.long 0x00 0. " TESTSTATUS[0] ,Edge Selector for Sampling from BIST" "Rising,Falling"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "ARH0_EVAL6,APIX PHY Evaluation Misc Test Configuration Register"
|
|
rgroup.long 0x168++0x03
|
|
line.long 0x00 "ARH0_EVAL7,APIX PHY Evaluation Misc Test Status Register"
|
|
width 0x0b
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
tree "DMA Controller"
|
|
tree "DMA0"
|
|
base ad:0xB0C00000
|
|
width 16.
|
|
group.long 0x1000++0x03
|
|
line.long 0x00 "DMA0_R,DMA Controller Global Configuration Register"
|
|
bitfld.long 0x00 31. " DE ,DMA Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 30. " DSHR ,DMA Stop/Halt Request Flag" "Running,Halted"
|
|
bitfld.long 0x00 29. " DBE ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27.--28. " PR ,Priority Type" "Fixed,Dynamic,Round robin,"
|
|
bitfld.long 0x00 26. " DH ,DMA Halt" "Running,Halted"
|
|
bitfld.long 0x00 24.--25. " DB ,Debug Behaviour" "Continue,Halted,Stopped,"
|
|
rbitfld.long 0x00 0. " DSHS ,DMA Stop/Halt Status Flag" "Running,Halted"
|
|
rgroup.long 0x1004++0x13
|
|
line.long 0x00 "DMA0_DIRQ1,DMA Controller Global Completion Interrupt 1 Register Channels 0-31"
|
|
bitfld.long 0x00 31. " DIRQ[31] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " [30] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " [29] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " [28] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. " [27] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " [26] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " [25] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " [23] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " [22] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " [21] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " [20] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " [19] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " [18] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " [16] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " [15] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " [14] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " [13] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " [12] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " [11] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " [9] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " [8] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " [7] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " [6] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " [5] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " [4] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " [2] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " [1] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " [0] ,Global Completion Interrupt 1" "No interrupt,Interrupt"
|
|
line.long 0x04 "DMA0_DIRQ1,DMA Controller Global Completion Interrupt 1 Register Channels 32-63"
|
|
bitfld.long 0x04 31. " DIRQ[63] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 30. " [62] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 29. " [61] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 28. " [60] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 27. " [59] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 26. " [58] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 25. " [57] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 24. " [56] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 23. " [55] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 22. " [54] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 21. " [53] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " [52] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 19. " [51] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " [50] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 17. " [49] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 16. " [48] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 15. " [47] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " [46] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 13. " [45] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " [44] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 11. " [43] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 10. " [42] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " [41] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " [40] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " [39] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " [38] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " [37] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " [36] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " [35] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " [34] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " [33] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " [32] ,Global Completion Interrupt 2" "No interrupt,Interrupt"
|
|
line.long 0x08 "DMA0_EDIRQ1,DMA Controller Global Error Interrupt 1 Register Channels 0-31"
|
|
bitfld.long 0x08 31. " EDIRQ[31] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 30. " [30] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 29. " [29] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 28. " [28] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 27. " [27] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 26. " [26] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 25. " [25] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 24. " [24] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 23. " [23] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 22. " [22] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 21. " [21] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 20. " [20] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 19. " [19] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 18. " [18] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 17. " [17] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 16. " [16] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 15. " [15] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 14. " [14] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 13. " [13] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 12. " [12] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 11. " [11] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 10. " [10] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 9. " [9] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 8. " [8] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 7. " [7] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 6. " [6] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 5. " [5] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 4. " [4] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 3. " [3] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 2. " [2] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 1. " [1] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 0. " [0] ,Global Error Interrupt 1" "No interrupt,Interrupt"
|
|
line.long 0x0C "DMA0_EDIRQ2,DMA Controller Global Error Interrupt 2 Register Channels 32-63"
|
|
bitfld.long 0x0C 31. " EDIRQ[63] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 30. " [62] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 29. " [61] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 28. " [60] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 27. " [59] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 26. " [58] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 25. " [57] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " [56] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 23. " [55] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 22. " [54] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 21. " [53] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 20. " [52] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 19. " [51] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 18. " [50] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " [49] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 16. " [48] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 15. " [47] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 14. " [46] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 13. " [45] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 12. " [44] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 11. " [43] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " [42] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 9. " [41] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 8. " [40] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 7. " [39] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 6. " [38] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 5. " [37] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 4. " [36] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " [35] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 2. " [34] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 1. " [33] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 0. " [32] ,Global Error Interrupt 2" "No interrupt,Interrupt"
|
|
line.long 0x10 "DMA0_ID,DMA Controller ID Register"
|
|
tree "DMA Controller Channel Configuration A Register Channels"
|
|
if (((d.l(ad:0xB0C00004+0x0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x0))&0x30000000)==0x20000000)
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "DMA0_A0,DMA Controller Channel Configuration A Register Channel 0"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x0))&0x30000000)!=0x20000000)
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "DMA0_A0,DMA Controller Channel Configuration A Register Channel 0"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x0))&0x30000000)==0x20000000)
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "DMA0_A0,DMA Controller Channel Configuration A Register Channel 0"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "DMA0_A0,DMA Controller Channel Configuration A Register Channel 0"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x40))&0x30000000)==0x20000000)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DMA0_A1,DMA Controller Channel Configuration A Register Channel 1"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x40))&0x30000000)!=0x20000000)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DMA0_A1,DMA Controller Channel Configuration A Register Channel 1"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x40))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x40))&0x30000000)==0x20000000)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DMA0_A1,DMA Controller Channel Configuration A Register Channel 1"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DMA0_A1,DMA Controller Channel Configuration A Register Channel 1"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x80))&0x30000000)==0x20000000)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DMA0_A2,DMA Controller Channel Configuration A Register Channel 2"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x80))&0x30000000)!=0x20000000)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DMA0_A2,DMA Controller Channel Configuration A Register Channel 2"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x80))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x80))&0x30000000)==0x20000000)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DMA0_A2,DMA Controller Channel Configuration A Register Channel 2"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DMA0_A2,DMA Controller Channel Configuration A Register Channel 2"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xC0))&0x30000000)==0x20000000)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DMA0_A3,DMA Controller Channel Configuration A Register Channel 3"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xC0))&0x30000000)!=0x20000000)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DMA0_A3,DMA Controller Channel Configuration A Register Channel 3"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xC0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xC0))&0x30000000)==0x20000000)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DMA0_A3,DMA Controller Channel Configuration A Register Channel 3"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DMA0_A3,DMA Controller Channel Configuration A Register Channel 3"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x100))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x100))&0x30000000)==0x20000000)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DMA0_A4,DMA Controller Channel Configuration A Register Channel 4"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x100))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x100))&0x30000000)!=0x20000000)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DMA0_A4,DMA Controller Channel Configuration A Register Channel 4"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x100))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x100))&0x30000000)==0x20000000)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DMA0_A4,DMA Controller Channel Configuration A Register Channel 4"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DMA0_A4,DMA Controller Channel Configuration A Register Channel 4"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x140))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x140))&0x30000000)==0x20000000)
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "DMA0_A5,DMA Controller Channel Configuration A Register Channel 5"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x140))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x140))&0x30000000)!=0x20000000)
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "DMA0_A5,DMA Controller Channel Configuration A Register Channel 5"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x140))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x140))&0x30000000)==0x20000000)
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "DMA0_A5,DMA Controller Channel Configuration A Register Channel 5"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "DMA0_A5,DMA Controller Channel Configuration A Register Channel 5"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x180))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x180))&0x30000000)==0x20000000)
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "DMA0_A6,DMA Controller Channel Configuration A Register Channel 6"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x180))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x180))&0x30000000)!=0x20000000)
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "DMA0_A6,DMA Controller Channel Configuration A Register Channel 6"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x180))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x180))&0x30000000)==0x20000000)
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "DMA0_A6,DMA Controller Channel Configuration A Register Channel 6"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "DMA0_A6,DMA Controller Channel Configuration A Register Channel 6"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x1C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x1C0))&0x30000000)==0x20000000)
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "DMA0_A7,DMA Controller Channel Configuration A Register Channel 7"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x1C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x1C0))&0x30000000)!=0x20000000)
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "DMA0_A7,DMA Controller Channel Configuration A Register Channel 7"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x1C0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x1C0))&0x30000000)==0x20000000)
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "DMA0_A7,DMA Controller Channel Configuration A Register Channel 7"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "DMA0_A7,DMA Controller Channel Configuration A Register Channel 7"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x200))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x200))&0x30000000)==0x20000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "DMA0_A8,DMA Controller Channel Configuration A Register Channel 8"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x200))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x200))&0x30000000)!=0x20000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "DMA0_A8,DMA Controller Channel Configuration A Register Channel 8"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x200))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x200))&0x30000000)==0x20000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "DMA0_A8,DMA Controller Channel Configuration A Register Channel 8"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "DMA0_A8,DMA Controller Channel Configuration A Register Channel 8"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x240))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x240))&0x30000000)==0x20000000)
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "DMA0_A9,DMA Controller Channel Configuration A Register Channel 9"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x240))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x240))&0x30000000)!=0x20000000)
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "DMA0_A9,DMA Controller Channel Configuration A Register Channel 9"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x240))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x240))&0x30000000)==0x20000000)
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "DMA0_A9,DMA Controller Channel Configuration A Register Channel 9"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "DMA0_A9,DMA Controller Channel Configuration A Register Channel 9"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x280))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x280))&0x30000000)==0x20000000)
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "DMA0_A10,DMA Controller Channel Configuration A Register Channel 10"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x280))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x280))&0x30000000)!=0x20000000)
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "DMA0_A10,DMA Controller Channel Configuration A Register Channel 10"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x280))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x280))&0x30000000)==0x20000000)
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "DMA0_A10,DMA Controller Channel Configuration A Register Channel 10"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "DMA0_A10,DMA Controller Channel Configuration A Register Channel 10"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x2C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x2C0))&0x30000000)==0x20000000)
|
|
group.long 0x2C0++0x03
|
|
line.long 0x00 "DMA0_A11,DMA Controller Channel Configuration A Register Channel 11"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x2C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x2C0))&0x30000000)!=0x20000000)
|
|
group.long 0x2C0++0x03
|
|
line.long 0x00 "DMA0_A11,DMA Controller Channel Configuration A Register Channel 11"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x2C0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x2C0))&0x30000000)==0x20000000)
|
|
group.long 0x2C0++0x03
|
|
line.long 0x00 "DMA0_A11,DMA Controller Channel Configuration A Register Channel 11"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x2C0++0x03
|
|
line.long 0x00 "DMA0_A11,DMA Controller Channel Configuration A Register Channel 11"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x300))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x300))&0x30000000)==0x20000000)
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "DMA0_A12,DMA Controller Channel Configuration A Register Channel 12"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x300))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x300))&0x30000000)!=0x20000000)
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "DMA0_A12,DMA Controller Channel Configuration A Register Channel 12"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x300))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x300))&0x30000000)==0x20000000)
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "DMA0_A12,DMA Controller Channel Configuration A Register Channel 12"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "DMA0_A12,DMA Controller Channel Configuration A Register Channel 12"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x340))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x340))&0x30000000)==0x20000000)
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "DMA0_A13,DMA Controller Channel Configuration A Register Channel 13"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x340))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x340))&0x30000000)!=0x20000000)
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "DMA0_A13,DMA Controller Channel Configuration A Register Channel 13"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x340))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x340))&0x30000000)==0x20000000)
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "DMA0_A13,DMA Controller Channel Configuration A Register Channel 13"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "DMA0_A13,DMA Controller Channel Configuration A Register Channel 13"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x380))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x380))&0x30000000)==0x20000000)
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "DMA0_A14,DMA Controller Channel Configuration A Register Channel 14"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x380))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x380))&0x30000000)!=0x20000000)
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "DMA0_A14,DMA Controller Channel Configuration A Register Channel 14"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x380))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x380))&0x30000000)==0x20000000)
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "DMA0_A14,DMA Controller Channel Configuration A Register Channel 14"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "DMA0_A14,DMA Controller Channel Configuration A Register Channel 14"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x3C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x3C0))&0x30000000)==0x20000000)
|
|
group.long 0x3C0++0x03
|
|
line.long 0x00 "DMA0_A15,DMA Controller Channel Configuration A Register Channel 15"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x3C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x3C0))&0x30000000)!=0x20000000)
|
|
group.long 0x3C0++0x03
|
|
line.long 0x00 "DMA0_A15,DMA Controller Channel Configuration A Register Channel 15"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x3C0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x3C0))&0x30000000)==0x20000000)
|
|
group.long 0x3C0++0x03
|
|
line.long 0x00 "DMA0_A15,DMA Controller Channel Configuration A Register Channel 15"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x3C0++0x03
|
|
line.long 0x00 "DMA0_A15,DMA Controller Channel Configuration A Register Channel 15"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x400))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x400))&0x30000000)==0x20000000)
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "DMA0_A16,DMA Controller Channel Configuration A Register Channel 16"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x400))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x400))&0x30000000)!=0x20000000)
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "DMA0_A16,DMA Controller Channel Configuration A Register Channel 16"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x400))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x400))&0x30000000)==0x20000000)
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "DMA0_A16,DMA Controller Channel Configuration A Register Channel 16"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "DMA0_A16,DMA Controller Channel Configuration A Register Channel 16"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x440))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x440))&0x30000000)==0x20000000)
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "DMA0_A17,DMA Controller Channel Configuration A Register Channel 17"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x440))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x440))&0x30000000)!=0x20000000)
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "DMA0_A17,DMA Controller Channel Configuration A Register Channel 17"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x440))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x440))&0x30000000)==0x20000000)
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "DMA0_A17,DMA Controller Channel Configuration A Register Channel 17"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "DMA0_A17,DMA Controller Channel Configuration A Register Channel 17"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x480))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x480))&0x30000000)==0x20000000)
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "DMA0_A18,DMA Controller Channel Configuration A Register Channel 18"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x480))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x480))&0x30000000)!=0x20000000)
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "DMA0_A18,DMA Controller Channel Configuration A Register Channel 18"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x480))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x480))&0x30000000)==0x20000000)
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "DMA0_A18,DMA Controller Channel Configuration A Register Channel 18"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "DMA0_A18,DMA Controller Channel Configuration A Register Channel 18"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x4C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x4C0))&0x30000000)==0x20000000)
|
|
group.long 0x4C0++0x03
|
|
line.long 0x00 "DMA0_A19,DMA Controller Channel Configuration A Register Channel 19"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x4C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x4C0))&0x30000000)!=0x20000000)
|
|
group.long 0x4C0++0x03
|
|
line.long 0x00 "DMA0_A19,DMA Controller Channel Configuration A Register Channel 19"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x4C0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x4C0))&0x30000000)==0x20000000)
|
|
group.long 0x4C0++0x03
|
|
line.long 0x00 "DMA0_A19,DMA Controller Channel Configuration A Register Channel 19"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x4C0++0x03
|
|
line.long 0x00 "DMA0_A19,DMA Controller Channel Configuration A Register Channel 19"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x500))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x500))&0x30000000)==0x20000000)
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "DMA0_A20,DMA Controller Channel Configuration A Register Channel 20"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x500))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x500))&0x30000000)!=0x20000000)
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "DMA0_A20,DMA Controller Channel Configuration A Register Channel 20"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x500))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x500))&0x30000000)==0x20000000)
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "DMA0_A20,DMA Controller Channel Configuration A Register Channel 20"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "DMA0_A20,DMA Controller Channel Configuration A Register Channel 20"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x540))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x540))&0x30000000)==0x20000000)
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "DMA0_A21,DMA Controller Channel Configuration A Register Channel 21"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x540))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x540))&0x30000000)!=0x20000000)
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "DMA0_A21,DMA Controller Channel Configuration A Register Channel 21"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x540))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x540))&0x30000000)==0x20000000)
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "DMA0_A21,DMA Controller Channel Configuration A Register Channel 21"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "DMA0_A21,DMA Controller Channel Configuration A Register Channel 21"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x580))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x580))&0x30000000)==0x20000000)
|
|
group.long 0x580++0x03
|
|
line.long 0x00 "DMA0_A22,DMA Controller Channel Configuration A Register Channel 22"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x580))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x580))&0x30000000)!=0x20000000)
|
|
group.long 0x580++0x03
|
|
line.long 0x00 "DMA0_A22,DMA Controller Channel Configuration A Register Channel 22"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x580))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x580))&0x30000000)==0x20000000)
|
|
group.long 0x580++0x03
|
|
line.long 0x00 "DMA0_A22,DMA Controller Channel Configuration A Register Channel 22"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x580++0x03
|
|
line.long 0x00 "DMA0_A22,DMA Controller Channel Configuration A Register Channel 22"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x5C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x5C0))&0x30000000)==0x20000000)
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "DMA0_A23,DMA Controller Channel Configuration A Register Channel 23"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x5C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x5C0))&0x30000000)!=0x20000000)
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "DMA0_A23,DMA Controller Channel Configuration A Register Channel 23"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x5C0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x5C0))&0x30000000)==0x20000000)
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "DMA0_A23,DMA Controller Channel Configuration A Register Channel 23"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "DMA0_A23,DMA Controller Channel Configuration A Register Channel 23"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x600))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x600))&0x30000000)==0x20000000)
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "DMA0_A24,DMA Controller Channel Configuration A Register Channel 24"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x600))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x600))&0x30000000)!=0x20000000)
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "DMA0_A24,DMA Controller Channel Configuration A Register Channel 24"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x600))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x600))&0x30000000)==0x20000000)
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "DMA0_A24,DMA Controller Channel Configuration A Register Channel 24"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "DMA0_A24,DMA Controller Channel Configuration A Register Channel 24"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x640))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x640))&0x30000000)==0x20000000)
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "DMA0_A25,DMA Controller Channel Configuration A Register Channel 25"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x640))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x640))&0x30000000)!=0x20000000)
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "DMA0_A25,DMA Controller Channel Configuration A Register Channel 25"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x640))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x640))&0x30000000)==0x20000000)
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "DMA0_A25,DMA Controller Channel Configuration A Register Channel 25"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "DMA0_A25,DMA Controller Channel Configuration A Register Channel 25"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x680))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x680))&0x30000000)==0x20000000)
|
|
group.long 0x680++0x03
|
|
line.long 0x00 "DMA0_A26,DMA Controller Channel Configuration A Register Channel 26"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x680))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x680))&0x30000000)!=0x20000000)
|
|
group.long 0x680++0x03
|
|
line.long 0x00 "DMA0_A26,DMA Controller Channel Configuration A Register Channel 26"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x680))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x680))&0x30000000)==0x20000000)
|
|
group.long 0x680++0x03
|
|
line.long 0x00 "DMA0_A26,DMA Controller Channel Configuration A Register Channel 26"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x680++0x03
|
|
line.long 0x00 "DMA0_A26,DMA Controller Channel Configuration A Register Channel 26"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x6C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x6C0))&0x30000000)==0x20000000)
|
|
group.long 0x6C0++0x03
|
|
line.long 0x00 "DMA0_A27,DMA Controller Channel Configuration A Register Channel 27"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x6C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x6C0))&0x30000000)!=0x20000000)
|
|
group.long 0x6C0++0x03
|
|
line.long 0x00 "DMA0_A27,DMA Controller Channel Configuration A Register Channel 27"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x6C0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x6C0))&0x30000000)==0x20000000)
|
|
group.long 0x6C0++0x03
|
|
line.long 0x00 "DMA0_A27,DMA Controller Channel Configuration A Register Channel 27"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x6C0++0x03
|
|
line.long 0x00 "DMA0_A27,DMA Controller Channel Configuration A Register Channel 27"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x700))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x700))&0x30000000)==0x20000000)
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "DMA0_A28,DMA Controller Channel Configuration A Register Channel 28"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x700))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x700))&0x30000000)!=0x20000000)
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "DMA0_A28,DMA Controller Channel Configuration A Register Channel 28"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x700))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x700))&0x30000000)==0x20000000)
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "DMA0_A28,DMA Controller Channel Configuration A Register Channel 28"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "DMA0_A28,DMA Controller Channel Configuration A Register Channel 28"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x740))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x740))&0x30000000)==0x20000000)
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "DMA0_A29,DMA Controller Channel Configuration A Register Channel 29"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x740))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x740))&0x30000000)!=0x20000000)
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "DMA0_A29,DMA Controller Channel Configuration A Register Channel 29"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x740))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x740))&0x30000000)==0x20000000)
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "DMA0_A29,DMA Controller Channel Configuration A Register Channel 29"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "DMA0_A29,DMA Controller Channel Configuration A Register Channel 29"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x780))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x780))&0x30000000)==0x20000000)
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "DMA0_A30,DMA Controller Channel Configuration A Register Channel 30"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x780))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x780))&0x30000000)!=0x20000000)
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "DMA0_A30,DMA Controller Channel Configuration A Register Channel 30"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x780))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x780))&0x30000000)==0x20000000)
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "DMA0_A30,DMA Controller Channel Configuration A Register Channel 30"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "DMA0_A30,DMA Controller Channel Configuration A Register Channel 30"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x7C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x7C0))&0x30000000)==0x20000000)
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "DMA0_A31,DMA Controller Channel Configuration A Register Channel 31"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x7C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x7C0))&0x30000000)!=0x20000000)
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "DMA0_A31,DMA Controller Channel Configuration A Register Channel 31"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x7C0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x7C0))&0x30000000)==0x20000000)
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "DMA0_A31,DMA Controller Channel Configuration A Register Channel 31"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "DMA0_A31,DMA Controller Channel Configuration A Register Channel 31"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x800))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x800))&0x30000000)==0x20000000)
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "DMA0_A32,DMA Controller Channel Configuration A Register Channel 32"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x800))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x800))&0x30000000)!=0x20000000)
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "DMA0_A32,DMA Controller Channel Configuration A Register Channel 32"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x800))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x800))&0x30000000)==0x20000000)
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "DMA0_A32,DMA Controller Channel Configuration A Register Channel 32"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "DMA0_A32,DMA Controller Channel Configuration A Register Channel 32"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x840))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x840))&0x30000000)==0x20000000)
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "DMA0_A33,DMA Controller Channel Configuration A Register Channel 33"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x840))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x840))&0x30000000)!=0x20000000)
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "DMA0_A33,DMA Controller Channel Configuration A Register Channel 33"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x840))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x840))&0x30000000)==0x20000000)
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "DMA0_A33,DMA Controller Channel Configuration A Register Channel 33"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "DMA0_A33,DMA Controller Channel Configuration A Register Channel 33"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x880))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x880))&0x30000000)==0x20000000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "DMA0_A34,DMA Controller Channel Configuration A Register Channel 34"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x880))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x880))&0x30000000)!=0x20000000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "DMA0_A34,DMA Controller Channel Configuration A Register Channel 34"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x880))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x880))&0x30000000)==0x20000000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "DMA0_A34,DMA Controller Channel Configuration A Register Channel 34"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "DMA0_A34,DMA Controller Channel Configuration A Register Channel 34"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x8C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x8C0))&0x30000000)==0x20000000)
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "DMA0_A35,DMA Controller Channel Configuration A Register Channel 35"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x8C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x8C0))&0x30000000)!=0x20000000)
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "DMA0_A35,DMA Controller Channel Configuration A Register Channel 35"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x8C0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x8C0))&0x30000000)==0x20000000)
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "DMA0_A35,DMA Controller Channel Configuration A Register Channel 35"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "DMA0_A35,DMA Controller Channel Configuration A Register Channel 35"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x900))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x900))&0x30000000)==0x20000000)
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "DMA0_A36,DMA Controller Channel Configuration A Register Channel 36"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x900))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x900))&0x30000000)!=0x20000000)
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "DMA0_A36,DMA Controller Channel Configuration A Register Channel 36"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x900))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x900))&0x30000000)==0x20000000)
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "DMA0_A36,DMA Controller Channel Configuration A Register Channel 36"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "DMA0_A36,DMA Controller Channel Configuration A Register Channel 36"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x940))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x940))&0x30000000)==0x20000000)
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "DMA0_A37,DMA Controller Channel Configuration A Register Channel 37"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x940))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x940))&0x30000000)!=0x20000000)
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "DMA0_A37,DMA Controller Channel Configuration A Register Channel 37"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x940))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x940))&0x30000000)==0x20000000)
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "DMA0_A37,DMA Controller Channel Configuration A Register Channel 37"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "DMA0_A37,DMA Controller Channel Configuration A Register Channel 37"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x980))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x980))&0x30000000)==0x20000000)
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "DMA0_A38,DMA Controller Channel Configuration A Register Channel 38"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x980))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x980))&0x30000000)!=0x20000000)
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "DMA0_A38,DMA Controller Channel Configuration A Register Channel 38"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x980))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x980))&0x30000000)==0x20000000)
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "DMA0_A38,DMA Controller Channel Configuration A Register Channel 38"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "DMA0_A38,DMA Controller Channel Configuration A Register Channel 38"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0x9C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x9C0))&0x30000000)==0x20000000)
|
|
group.long 0x9C0++0x03
|
|
line.long 0x00 "DMA0_A39,DMA Controller Channel Configuration A Register Channel 39"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x9C0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0x9C0))&0x30000000)!=0x20000000)
|
|
group.long 0x9C0++0x03
|
|
line.long 0x00 "DMA0_A39,DMA Controller Channel Configuration A Register Channel 39"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0x9C0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0x9C0))&0x30000000)==0x20000000)
|
|
group.long 0x9C0++0x03
|
|
line.long 0x00 "DMA0_A39,DMA Controller Channel Configuration A Register Channel 39"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0x9C0++0x03
|
|
line.long 0x00 "DMA0_A39,DMA Controller Channel Configuration A Register Channel 39"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xA00))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xA00))&0x30000000)==0x20000000)
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "DMA0_A40,DMA Controller Channel Configuration A Register Channel 40"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xA00))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xA00))&0x30000000)!=0x20000000)
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "DMA0_A40,DMA Controller Channel Configuration A Register Channel 40"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xA00))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xA00))&0x30000000)==0x20000000)
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "DMA0_A40,DMA Controller Channel Configuration A Register Channel 40"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "DMA0_A40,DMA Controller Channel Configuration A Register Channel 40"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xA40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xA40))&0x30000000)==0x20000000)
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "DMA0_A41,DMA Controller Channel Configuration A Register Channel 41"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xA40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xA40))&0x30000000)!=0x20000000)
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "DMA0_A41,DMA Controller Channel Configuration A Register Channel 41"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xA40))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xA40))&0x30000000)==0x20000000)
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "DMA0_A41,DMA Controller Channel Configuration A Register Channel 41"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "DMA0_A41,DMA Controller Channel Configuration A Register Channel 41"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xA80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xA80))&0x30000000)==0x20000000)
|
|
group.long 0xA80++0x03
|
|
line.long 0x00 "DMA0_A42,DMA Controller Channel Configuration A Register Channel 42"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xA80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xA80))&0x30000000)!=0x20000000)
|
|
group.long 0xA80++0x03
|
|
line.long 0x00 "DMA0_A42,DMA Controller Channel Configuration A Register Channel 42"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xA80))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xA80))&0x30000000)==0x20000000)
|
|
group.long 0xA80++0x03
|
|
line.long 0x00 "DMA0_A42,DMA Controller Channel Configuration A Register Channel 42"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xA80++0x03
|
|
line.long 0x00 "DMA0_A42,DMA Controller Channel Configuration A Register Channel 42"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xAC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xAC0))&0x30000000)==0x20000000)
|
|
group.long 0xAC0++0x03
|
|
line.long 0x00 "DMA0_A43,DMA Controller Channel Configuration A Register Channel 43"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xAC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xAC0))&0x30000000)!=0x20000000)
|
|
group.long 0xAC0++0x03
|
|
line.long 0x00 "DMA0_A43,DMA Controller Channel Configuration A Register Channel 43"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xAC0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xAC0))&0x30000000)==0x20000000)
|
|
group.long 0xAC0++0x03
|
|
line.long 0x00 "DMA0_A43,DMA Controller Channel Configuration A Register Channel 43"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xAC0++0x03
|
|
line.long 0x00 "DMA0_A43,DMA Controller Channel Configuration A Register Channel 43"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xB00))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xB00))&0x30000000)==0x20000000)
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "DMA0_A44,DMA Controller Channel Configuration A Register Channel 44"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xB00))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xB00))&0x30000000)!=0x20000000)
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "DMA0_A44,DMA Controller Channel Configuration A Register Channel 44"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xB00))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xB00))&0x30000000)==0x20000000)
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "DMA0_A44,DMA Controller Channel Configuration A Register Channel 44"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "DMA0_A44,DMA Controller Channel Configuration A Register Channel 44"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xB40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xB40))&0x30000000)==0x20000000)
|
|
group.long 0xB40++0x03
|
|
line.long 0x00 "DMA0_A45,DMA Controller Channel Configuration A Register Channel 45"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xB40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xB40))&0x30000000)!=0x20000000)
|
|
group.long 0xB40++0x03
|
|
line.long 0x00 "DMA0_A45,DMA Controller Channel Configuration A Register Channel 45"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xB40))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xB40))&0x30000000)==0x20000000)
|
|
group.long 0xB40++0x03
|
|
line.long 0x00 "DMA0_A45,DMA Controller Channel Configuration A Register Channel 45"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xB40++0x03
|
|
line.long 0x00 "DMA0_A45,DMA Controller Channel Configuration A Register Channel 45"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xB80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xB80))&0x30000000)==0x20000000)
|
|
group.long 0xB80++0x03
|
|
line.long 0x00 "DMA0_A46,DMA Controller Channel Configuration A Register Channel 46"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xB80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xB80))&0x30000000)!=0x20000000)
|
|
group.long 0xB80++0x03
|
|
line.long 0x00 "DMA0_A46,DMA Controller Channel Configuration A Register Channel 46"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xB80))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xB80))&0x30000000)==0x20000000)
|
|
group.long 0xB80++0x03
|
|
line.long 0x00 "DMA0_A46,DMA Controller Channel Configuration A Register Channel 46"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xB80++0x03
|
|
line.long 0x00 "DMA0_A46,DMA Controller Channel Configuration A Register Channel 46"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xBC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xBC0))&0x30000000)==0x20000000)
|
|
group.long 0xBC0++0x03
|
|
line.long 0x00 "DMA0_A47,DMA Controller Channel Configuration A Register Channel 47"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xBC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xBC0))&0x30000000)!=0x20000000)
|
|
group.long 0xBC0++0x03
|
|
line.long 0x00 "DMA0_A47,DMA Controller Channel Configuration A Register Channel 47"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xBC0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xBC0))&0x30000000)==0x20000000)
|
|
group.long 0xBC0++0x03
|
|
line.long 0x00 "DMA0_A47,DMA Controller Channel Configuration A Register Channel 47"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xBC0++0x03
|
|
line.long 0x00 "DMA0_A47,DMA Controller Channel Configuration A Register Channel 47"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xC00))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xC00))&0x30000000)==0x20000000)
|
|
group.long 0xC00++0x03
|
|
line.long 0x00 "DMA0_A48,DMA Controller Channel Configuration A Register Channel 48"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xC00))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xC00))&0x30000000)!=0x20000000)
|
|
group.long 0xC00++0x03
|
|
line.long 0x00 "DMA0_A48,DMA Controller Channel Configuration A Register Channel 48"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xC00))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xC00))&0x30000000)==0x20000000)
|
|
group.long 0xC00++0x03
|
|
line.long 0x00 "DMA0_A48,DMA Controller Channel Configuration A Register Channel 48"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xC00++0x03
|
|
line.long 0x00 "DMA0_A48,DMA Controller Channel Configuration A Register Channel 48"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xC40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xC40))&0x30000000)==0x20000000)
|
|
group.long 0xC40++0x03
|
|
line.long 0x00 "DMA0_A49,DMA Controller Channel Configuration A Register Channel 49"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xC40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xC40))&0x30000000)!=0x20000000)
|
|
group.long 0xC40++0x03
|
|
line.long 0x00 "DMA0_A49,DMA Controller Channel Configuration A Register Channel 49"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xC40))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xC40))&0x30000000)==0x20000000)
|
|
group.long 0xC40++0x03
|
|
line.long 0x00 "DMA0_A49,DMA Controller Channel Configuration A Register Channel 49"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xC40++0x03
|
|
line.long 0x00 "DMA0_A49,DMA Controller Channel Configuration A Register Channel 49"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xC80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xC80))&0x30000000)==0x20000000)
|
|
group.long 0xC80++0x03
|
|
line.long 0x00 "DMA0_A50,DMA Controller Channel Configuration A Register Channel 50"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xC80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xC80))&0x30000000)!=0x20000000)
|
|
group.long 0xC80++0x03
|
|
line.long 0x00 "DMA0_A50,DMA Controller Channel Configuration A Register Channel 50"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xC80))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xC80))&0x30000000)==0x20000000)
|
|
group.long 0xC80++0x03
|
|
line.long 0x00 "DMA0_A50,DMA Controller Channel Configuration A Register Channel 50"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xC80++0x03
|
|
line.long 0x00 "DMA0_A50,DMA Controller Channel Configuration A Register Channel 50"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xCC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xCC0))&0x30000000)==0x20000000)
|
|
group.long 0xCC0++0x03
|
|
line.long 0x00 "DMA0_A51,DMA Controller Channel Configuration A Register Channel 51"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xCC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xCC0))&0x30000000)!=0x20000000)
|
|
group.long 0xCC0++0x03
|
|
line.long 0x00 "DMA0_A51,DMA Controller Channel Configuration A Register Channel 51"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xCC0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xCC0))&0x30000000)==0x20000000)
|
|
group.long 0xCC0++0x03
|
|
line.long 0x00 "DMA0_A51,DMA Controller Channel Configuration A Register Channel 51"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xCC0++0x03
|
|
line.long 0x00 "DMA0_A51,DMA Controller Channel Configuration A Register Channel 51"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xD00))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xD00))&0x30000000)==0x20000000)
|
|
group.long 0xD00++0x03
|
|
line.long 0x00 "DMA0_A52,DMA Controller Channel Configuration A Register Channel 52"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xD00))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xD00))&0x30000000)!=0x20000000)
|
|
group.long 0xD00++0x03
|
|
line.long 0x00 "DMA0_A52,DMA Controller Channel Configuration A Register Channel 52"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xD00))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xD00))&0x30000000)==0x20000000)
|
|
group.long 0xD00++0x03
|
|
line.long 0x00 "DMA0_A52,DMA Controller Channel Configuration A Register Channel 52"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xD00++0x03
|
|
line.long 0x00 "DMA0_A52,DMA Controller Channel Configuration A Register Channel 52"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xD40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xD40))&0x30000000)==0x20000000)
|
|
group.long 0xD40++0x03
|
|
line.long 0x00 "DMA0_A53,DMA Controller Channel Configuration A Register Channel 53"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xD40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xD40))&0x30000000)!=0x20000000)
|
|
group.long 0xD40++0x03
|
|
line.long 0x00 "DMA0_A53,DMA Controller Channel Configuration A Register Channel 53"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xD40))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xD40))&0x30000000)==0x20000000)
|
|
group.long 0xD40++0x03
|
|
line.long 0x00 "DMA0_A53,DMA Controller Channel Configuration A Register Channel 53"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xD40++0x03
|
|
line.long 0x00 "DMA0_A53,DMA Controller Channel Configuration A Register Channel 53"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xD80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xD80))&0x30000000)==0x20000000)
|
|
group.long 0xD80++0x03
|
|
line.long 0x00 "DMA0_A54,DMA Controller Channel Configuration A Register Channel 54"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xD80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xD80))&0x30000000)!=0x20000000)
|
|
group.long 0xD80++0x03
|
|
line.long 0x00 "DMA0_A54,DMA Controller Channel Configuration A Register Channel 54"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xD80))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xD80))&0x30000000)==0x20000000)
|
|
group.long 0xD80++0x03
|
|
line.long 0x00 "DMA0_A54,DMA Controller Channel Configuration A Register Channel 54"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xD80++0x03
|
|
line.long 0x00 "DMA0_A54,DMA Controller Channel Configuration A Register Channel 54"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xDC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xDC0))&0x30000000)==0x20000000)
|
|
group.long 0xDC0++0x03
|
|
line.long 0x00 "DMA0_A55,DMA Controller Channel Configuration A Register Channel 55"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xDC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xDC0))&0x30000000)!=0x20000000)
|
|
group.long 0xDC0++0x03
|
|
line.long 0x00 "DMA0_A55,DMA Controller Channel Configuration A Register Channel 55"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xDC0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xDC0))&0x30000000)==0x20000000)
|
|
group.long 0xDC0++0x03
|
|
line.long 0x00 "DMA0_A55,DMA Controller Channel Configuration A Register Channel 55"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xDC0++0x03
|
|
line.long 0x00 "DMA0_A55,DMA Controller Channel Configuration A Register Channel 55"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xE00))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xE00))&0x30000000)==0x20000000)
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "DMA0_A56,DMA Controller Channel Configuration A Register Channel 56"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xE00))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xE00))&0x30000000)!=0x20000000)
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "DMA0_A56,DMA Controller Channel Configuration A Register Channel 56"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xE00))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xE00))&0x30000000)==0x20000000)
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "DMA0_A56,DMA Controller Channel Configuration A Register Channel 56"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "DMA0_A56,DMA Controller Channel Configuration A Register Channel 56"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xE40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xE40))&0x30000000)==0x20000000)
|
|
group.long 0xE40++0x03
|
|
line.long 0x00 "DMA0_A57,DMA Controller Channel Configuration A Register Channel 57"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xE40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xE40))&0x30000000)!=0x20000000)
|
|
group.long 0xE40++0x03
|
|
line.long 0x00 "DMA0_A57,DMA Controller Channel Configuration A Register Channel 57"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xE40))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xE40))&0x30000000)==0x20000000)
|
|
group.long 0xE40++0x03
|
|
line.long 0x00 "DMA0_A57,DMA Controller Channel Configuration A Register Channel 57"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xE40++0x03
|
|
line.long 0x00 "DMA0_A57,DMA Controller Channel Configuration A Register Channel 57"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xE80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xE80))&0x30000000)==0x20000000)
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "DMA0_A58,DMA Controller Channel Configuration A Register Channel 58"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xE80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xE80))&0x30000000)!=0x20000000)
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "DMA0_A58,DMA Controller Channel Configuration A Register Channel 58"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xE80))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xE80))&0x30000000)==0x20000000)
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "DMA0_A58,DMA Controller Channel Configuration A Register Channel 58"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "DMA0_A58,DMA Controller Channel Configuration A Register Channel 58"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xEC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xEC0))&0x30000000)==0x20000000)
|
|
group.long 0xEC0++0x03
|
|
line.long 0x00 "DMA0_A59,DMA Controller Channel Configuration A Register Channel 59"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xEC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xEC0))&0x30000000)!=0x20000000)
|
|
group.long 0xEC0++0x03
|
|
line.long 0x00 "DMA0_A59,DMA Controller Channel Configuration A Register Channel 59"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xEC0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xEC0))&0x30000000)==0x20000000)
|
|
group.long 0xEC0++0x03
|
|
line.long 0x00 "DMA0_A59,DMA Controller Channel Configuration A Register Channel 59"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xEC0++0x03
|
|
line.long 0x00 "DMA0_A59,DMA Controller Channel Configuration A Register Channel 59"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xF00))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xF00))&0x30000000)==0x20000000)
|
|
group.long 0xF00++0x03
|
|
line.long 0x00 "DMA0_A60,DMA Controller Channel Configuration A Register Channel 60"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xF00))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xF00))&0x30000000)!=0x20000000)
|
|
group.long 0xF00++0x03
|
|
line.long 0x00 "DMA0_A60,DMA Controller Channel Configuration A Register Channel 60"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xF00))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xF00))&0x30000000)==0x20000000)
|
|
group.long 0xF00++0x03
|
|
line.long 0x00 "DMA0_A60,DMA Controller Channel Configuration A Register Channel 60"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xF00++0x03
|
|
line.long 0x00 "DMA0_A60,DMA Controller Channel Configuration A Register Channel 60"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xF40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xF40))&0x30000000)==0x20000000)
|
|
group.long 0xF40++0x03
|
|
line.long 0x00 "DMA0_A61,DMA Controller Channel Configuration A Register Channel 61"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xF40))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xF40))&0x30000000)!=0x20000000)
|
|
group.long 0xF40++0x03
|
|
line.long 0x00 "DMA0_A61,DMA Controller Channel Configuration A Register Channel 61"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xF40))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xF40))&0x30000000)==0x20000000)
|
|
group.long 0xF40++0x03
|
|
line.long 0x00 "DMA0_A61,DMA Controller Channel Configuration A Register Channel 61"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xF40++0x03
|
|
line.long 0x00 "DMA0_A61,DMA Controller Channel Configuration A Register Channel 61"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xF80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xF80))&0x30000000)==0x20000000)
|
|
group.long 0xF80++0x03
|
|
line.long 0x00 "DMA0_A62,DMA Controller Channel Configuration A Register Channel 62"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xF80))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xF80))&0x30000000)!=0x20000000)
|
|
group.long 0xF80++0x03
|
|
line.long 0x00 "DMA0_A62,DMA Controller Channel Configuration A Register Channel 62"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xF80))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xF80))&0x30000000)==0x20000000)
|
|
group.long 0xF80++0x03
|
|
line.long 0x00 "DMA0_A62,DMA Controller Channel Configuration A Register Channel 62"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xF80++0x03
|
|
line.long 0x00 "DMA0_A62,DMA Controller Channel Configuration A Register Channel 62"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
if (((d.l(ad:0xB0C00004+0xFC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xFC0))&0x30000000)==0x20000000)
|
|
group.long 0xFC0++0x03
|
|
line.long 0x00 "DMA0_A63,DMA Controller Channel Configuration A Register Channel 63"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
bitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xFC0))&0x2000000)==0x2000000&&((d.l(ad:0xB0C00004+0xFC0))&0x30000000)!=0x20000000)
|
|
group.long 0xFC0++0x03
|
|
line.long 0x00 "DMA0_A63,DMA Controller Channel Configuration A Register Channel 63"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,Request"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
elif (((d.l(ad:0xB0C00004+0xFC0))&0x2000000)==0x00&&((d.l(ad:0xB0C00004+0xFC0))&0x30000000)==0x20000000)
|
|
group.long 0xFC0++0x03
|
|
line.long 0x00 "DMA0_A63,DMA Controller Channel Configuration A Register Channel 63"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 16.--19. " TO ,Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
else
|
|
group.long 0xFC0++0x03
|
|
line.long 0x00 "DMA0_A63,DMA Controller Channel Configuration A Register Channel 63"
|
|
bitfld.long 0x00 31. " EB ,Enable Bbit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PB ,Pause Bit" "Running,Halted"
|
|
rbitfld.long 0x00 29. " ST ,Software Trigger" "No request,"
|
|
bitfld.long 0x00 27.--28. " IS ,Input Select" "Software,Hardware,,"
|
|
bitfld.long 0x00 26. " AL ,Alternate" "Contiguous,Alternate"
|
|
bitfld.long 0x00 24.--25. " BL ,Beat Limit" "SINGLE,INCR4,INCR8,INCR16"
|
|
bitfld.long 0x00 20.--23. " BC ,Block Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
hexmask.long.word 0x00 0.--15. 1. " TC ,Transfer Count"
|
|
endif
|
|
tree.end
|
|
tree "DMA Controller Channel Configuration B Register Channels"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "DMA0_B0,DMA Controller Channel Configuration B Register Channel 0"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "DMA0_B1,DMA Controller Channel Configuration B Register Channel 1"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "DMA0_B2,DMA Controller Channel Configuration B Register Channel 2"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "DMA0_B3,DMA Controller Channel Configuration B Register Channel 3"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "DMA0_B4,DMA Controller Channel Configuration B Register Channel 4"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "DMA0_B5,DMA Controller Channel Configuration B Register Channel 5"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "DMA0_B6,DMA Controller Channel Configuration B Register Channel 6"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x1C4++0x03
|
|
line.long 0x00 "DMA0_B7,DMA Controller Channel Configuration B Register Channel 7"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "DMA0_B8,DMA Controller Channel Configuration B Register Channel 8"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x244++0x03
|
|
line.long 0x00 "DMA0_B9,DMA Controller Channel Configuration B Register Channel 9"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x284++0x03
|
|
line.long 0x00 "DMA0_B10,DMA Controller Channel Configuration B Register Channel 10"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x2C4++0x03
|
|
line.long 0x00 "DMA0_B11,DMA Controller Channel Configuration B Register Channel 11"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "DMA0_B12,DMA Controller Channel Configuration B Register Channel 12"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x344++0x03
|
|
line.long 0x00 "DMA0_B13,DMA Controller Channel Configuration B Register Channel 13"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x384++0x03
|
|
line.long 0x00 "DMA0_B14,DMA Controller Channel Configuration B Register Channel 14"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x3C4++0x03
|
|
line.long 0x00 "DMA0_B15,DMA Controller Channel Configuration B Register Channel 15"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x404++0x03
|
|
line.long 0x00 "DMA0_B16,DMA Controller Channel Configuration B Register Channel 16"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x444++0x03
|
|
line.long 0x00 "DMA0_B17,DMA Controller Channel Configuration B Register Channel 17"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x484++0x03
|
|
line.long 0x00 "DMA0_B18,DMA Controller Channel Configuration B Register Channel 18"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x4C4++0x03
|
|
line.long 0x00 "DMA0_B19,DMA Controller Channel Configuration B Register Channel 19"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "DMA0_B20,DMA Controller Channel Configuration B Register Channel 20"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "DMA0_B21,DMA Controller Channel Configuration B Register Channel 21"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x584++0x03
|
|
line.long 0x00 "DMA0_B22,DMA Controller Channel Configuration B Register Channel 22"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x5C4++0x03
|
|
line.long 0x00 "DMA0_B23,DMA Controller Channel Configuration B Register Channel 23"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x604++0x03
|
|
line.long 0x00 "DMA0_B24,DMA Controller Channel Configuration B Register Channel 24"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x644++0x03
|
|
line.long 0x00 "DMA0_B25,DMA Controller Channel Configuration B Register Channel 25"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x684++0x03
|
|
line.long 0x00 "DMA0_B26,DMA Controller Channel Configuration B Register Channel 26"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x6C4++0x03
|
|
line.long 0x00 "DMA0_B27,DMA Controller Channel Configuration B Register Channel 27"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "DMA0_B28,DMA Controller Channel Configuration B Register Channel 28"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "DMA0_B29,DMA Controller Channel Configuration B Register Channel 29"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x784++0x03
|
|
line.long 0x00 "DMA0_B30,DMA Controller Channel Configuration B Register Channel 30"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x7C4++0x03
|
|
line.long 0x00 "DMA0_B31,DMA Controller Channel Configuration B Register Channel 31"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x804++0x03
|
|
line.long 0x00 "DMA0_B32,DMA Controller Channel Configuration B Register Channel 32"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x844++0x03
|
|
line.long 0x00 "DMA0_B33,DMA Controller Channel Configuration B Register Channel 33"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x884++0x03
|
|
line.long 0x00 "DMA0_B34,DMA Controller Channel Configuration B Register Channel 34"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x8C4++0x03
|
|
line.long 0x00 "DMA0_B35,DMA Controller Channel Configuration B Register Channel 35"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x904++0x03
|
|
line.long 0x00 "DMA0_B36,DMA Controller Channel Configuration B Register Channel 36"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x944++0x03
|
|
line.long 0x00 "DMA0_B37,DMA Controller Channel Configuration B Register Channel 37"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x984++0x03
|
|
line.long 0x00 "DMA0_B38,DMA Controller Channel Configuration B Register Channel 38"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0x9C4++0x03
|
|
line.long 0x00 "DMA0_B39,DMA Controller Channel Configuration B Register Channel 39"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xA04++0x03
|
|
line.long 0x00 "DMA0_B40,DMA Controller Channel Configuration B Register Channel 40"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xA44++0x03
|
|
line.long 0x00 "DMA0_B41,DMA Controller Channel Configuration B Register Channel 41"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xA84++0x03
|
|
line.long 0x00 "DMA0_B42,DMA Controller Channel Configuration B Register Channel 42"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xAC4++0x03
|
|
line.long 0x00 "DMA0_B43,DMA Controller Channel Configuration B Register Channel 43"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xB04++0x03
|
|
line.long 0x00 "DMA0_B44,DMA Controller Channel Configuration B Register Channel 44"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xB44++0x03
|
|
line.long 0x00 "DMA0_B45,DMA Controller Channel Configuration B Register Channel 45"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xB84++0x03
|
|
line.long 0x00 "DMA0_B46,DMA Controller Channel Configuration B Register Channel 46"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xBC4++0x03
|
|
line.long 0x00 "DMA0_B47,DMA Controller Channel Configuration B Register Channel 47"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xC04++0x03
|
|
line.long 0x00 "DMA0_B48,DMA Controller Channel Configuration B Register Channel 48"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xC44++0x03
|
|
line.long 0x00 "DMA0_B49,DMA Controller Channel Configuration B Register Channel 49"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xC84++0x03
|
|
line.long 0x00 "DMA0_B50,DMA Controller Channel Configuration B Register Channel 50"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xCC4++0x03
|
|
line.long 0x00 "DMA0_B51,DMA Controller Channel Configuration B Register Channel 51"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xD04++0x03
|
|
line.long 0x00 "DMA0_B52,DMA Controller Channel Configuration B Register Channel 52"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xD44++0x03
|
|
line.long 0x00 "DMA0_B53,DMA Controller Channel Configuration B Register Channel 53"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xD84++0x03
|
|
line.long 0x00 "DMA0_B54,DMA Controller Channel Configuration B Register Channel 54"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xDC4++0x03
|
|
line.long 0x00 "DMA0_B55,DMA Controller Channel Configuration B Register Channel 55"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xE04++0x03
|
|
line.long 0x00 "DMA0_B56,DMA Controller Channel Configuration B Register Channel 56"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xE44++0x03
|
|
line.long 0x00 "DMA0_B57,DMA Controller Channel Configuration B Register Channel 57"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xE84++0x03
|
|
line.long 0x00 "DMA0_B58,DMA Controller Channel Configuration B Register Channel 58"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xEC4++0x03
|
|
line.long 0x00 "DMA0_B59,DMA Controller Channel Configuration B Register Channel 59"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xF04++0x03
|
|
line.long 0x00 "DMA0_B60,DMA Controller Channel Configuration B Register Channel 60"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xF44++0x03
|
|
line.long 0x00 "DMA0_B61,DMA Controller Channel Configuration B Register Channel 61"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xF84++0x03
|
|
line.long 0x00 "DMA0_B62,DMA Controller Channel Configuration B Register Channel 62"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
group.long 0xFC4++0x03
|
|
line.long 0x00 "DMA0_B63,DMA Controller Channel Configuration B Register Channel 63"
|
|
rbitfld.long 0x00 31. " DQ ,Flag of DIRQ" "Cleared,Set"
|
|
rbitfld.long 0x00 30. " EQ ,Flag of EDIRQ" "Cleared,Set"
|
|
bitfld.long 0x00 28.--29. " MS ,Mode Select" "Block,Burst,Demand,"
|
|
bitfld.long 0x00 26.--27. " TW ,Transfer Width" "Byte,Half word,Word,Double word"
|
|
rbitfld.long 0x00 25. " SR ,Software Trigger Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " EI ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CI ,Completion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " SS ,Stop Status" "None,,Stop,Error,Error,End,,"
|
|
bitfld.long 0x00 15. " SP[3] ,Source Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 14. " SP[2] ,Source Protection" "Not bufferable,Bufferable"
|
|
bitfld.long 0x00 13. " SP[1] ,Source Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 12. " SP[0] ,Source Protection" "Instruction access,Data access"
|
|
bitfld.long 0x00 11. " DP[3] ,Destination Protection" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 10. " DP[2] ,Destination Protection" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DP[1] ,Destination Protection" "User access,Privileged"
|
|
rbitfld.long 0x00 8. " DP[0] ,Destination Protection" "Instruction access,Data access"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PN ,Priority Number"
|
|
tree.end
|
|
tree "MA Controller Channel Configuration Source Address Register Channels"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "DMA0_SA0,DMA Controller Channel Configuration Source Address Register Channel 0"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMA0_SA1,DMA Controller Channel Configuration Source Address Register Channel 1"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "DMA0_SA2,DMA Controller Channel Configuration Source Address Register Channel 2"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "DMA0_SA3,DMA Controller Channel Configuration Source Address Register Channel 3"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "DMA0_SA4,DMA Controller Channel Configuration Source Address Register Channel 4"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "DMA0_SA5,DMA Controller Channel Configuration Source Address Register Channel 5"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "DMA0_SA6,DMA Controller Channel Configuration Source Address Register Channel 6"
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "DMA0_SA7,DMA Controller Channel Configuration Source Address Register Channel 7"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "DMA0_SA8,DMA Controller Channel Configuration Source Address Register Channel 8"
|
|
group.long 0x248++0x03
|
|
line.long 0x00 "DMA0_SA9,DMA Controller Channel Configuration Source Address Register Channel 9"
|
|
group.long 0x288++0x03
|
|
line.long 0x00 "DMA0_SA10,DMA Controller Channel Configuration Source Address Register Channel 10"
|
|
group.long 0x2C8++0x03
|
|
line.long 0x00 "DMA0_SA11,DMA Controller Channel Configuration Source Address Register Channel 11"
|
|
group.long 0x308++0x03
|
|
line.long 0x00 "DMA0_SA12,DMA Controller Channel Configuration Source Address Register Channel 12"
|
|
group.long 0x348++0x03
|
|
line.long 0x00 "DMA0_SA13,DMA Controller Channel Configuration Source Address Register Channel 13"
|
|
group.long 0x388++0x03
|
|
line.long 0x00 "DMA0_SA14,DMA Controller Channel Configuration Source Address Register Channel 14"
|
|
group.long 0x3C8++0x03
|
|
line.long 0x00 "DMA0_SA15,DMA Controller Channel Configuration Source Address Register Channel 15"
|
|
group.long 0x408++0x03
|
|
line.long 0x00 "DMA0_SA16,DMA Controller Channel Configuration Source Address Register Channel 16"
|
|
group.long 0x448++0x03
|
|
line.long 0x00 "DMA0_SA17,DMA Controller Channel Configuration Source Address Register Channel 17"
|
|
group.long 0x488++0x03
|
|
line.long 0x00 "DMA0_SA18,DMA Controller Channel Configuration Source Address Register Channel 18"
|
|
group.long 0x4C8++0x03
|
|
line.long 0x00 "DMA0_SA19,DMA Controller Channel Configuration Source Address Register Channel 19"
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "DMA0_SA20,DMA Controller Channel Configuration Source Address Register Channel 20"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "DMA0_SA21,DMA Controller Channel Configuration Source Address Register Channel 21"
|
|
group.long 0x588++0x03
|
|
line.long 0x00 "DMA0_SA22,DMA Controller Channel Configuration Source Address Register Channel 22"
|
|
group.long 0x5C8++0x03
|
|
line.long 0x00 "DMA0_SA23,DMA Controller Channel Configuration Source Address Register Channel 23"
|
|
group.long 0x608++0x03
|
|
line.long 0x00 "DMA0_SA24,DMA Controller Channel Configuration Source Address Register Channel 24"
|
|
group.long 0x648++0x03
|
|
line.long 0x00 "DMA0_SA25,DMA Controller Channel Configuration Source Address Register Channel 25"
|
|
group.long 0x688++0x03
|
|
line.long 0x00 "DMA0_SA26,DMA Controller Channel Configuration Source Address Register Channel 26"
|
|
group.long 0x6C8++0x03
|
|
line.long 0x00 "DMA0_SA27,DMA Controller Channel Configuration Source Address Register Channel 27"
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "DMA0_SA28,DMA Controller Channel Configuration Source Address Register Channel 28"
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "DMA0_SA29,DMA Controller Channel Configuration Source Address Register Channel 29"
|
|
group.long 0x788++0x03
|
|
line.long 0x00 "DMA0_SA30,DMA Controller Channel Configuration Source Address Register Channel 30"
|
|
group.long 0x7C8++0x03
|
|
line.long 0x00 "DMA0_SA31,DMA Controller Channel Configuration Source Address Register Channel 31"
|
|
group.long 0x808++0x03
|
|
line.long 0x00 "DMA0_SA32,DMA Controller Channel Configuration Source Address Register Channel 32"
|
|
group.long 0x848++0x03
|
|
line.long 0x00 "DMA0_SA33,DMA Controller Channel Configuration Source Address Register Channel 33"
|
|
group.long 0x888++0x03
|
|
line.long 0x00 "DMA0_SA34,DMA Controller Channel Configuration Source Address Register Channel 34"
|
|
group.long 0x8C8++0x03
|
|
line.long 0x00 "DMA0_SA35,DMA Controller Channel Configuration Source Address Register Channel 35"
|
|
group.long 0x908++0x03
|
|
line.long 0x00 "DMA0_SA36,DMA Controller Channel Configuration Source Address Register Channel 36"
|
|
group.long 0x948++0x03
|
|
line.long 0x00 "DMA0_SA37,DMA Controller Channel Configuration Source Address Register Channel 37"
|
|
group.long 0x988++0x03
|
|
line.long 0x00 "DMA0_SA38,DMA Controller Channel Configuration Source Address Register Channel 38"
|
|
group.long 0x9C8++0x03
|
|
line.long 0x00 "DMA0_SA39,DMA Controller Channel Configuration Source Address Register Channel 39"
|
|
group.long 0xA08++0x03
|
|
line.long 0x00 "DMA0_SA40,DMA Controller Channel Configuration Source Address Register Channel 40"
|
|
group.long 0xA48++0x03
|
|
line.long 0x00 "DMA0_SA41,DMA Controller Channel Configuration Source Address Register Channel 41"
|
|
group.long 0xA88++0x03
|
|
line.long 0x00 "DMA0_SA42,DMA Controller Channel Configuration Source Address Register Channel 42"
|
|
group.long 0xAC8++0x03
|
|
line.long 0x00 "DMA0_SA43,DMA Controller Channel Configuration Source Address Register Channel 43"
|
|
group.long 0xB08++0x03
|
|
line.long 0x00 "DMA0_SA44,DMA Controller Channel Configuration Source Address Register Channel 44"
|
|
group.long 0xB48++0x03
|
|
line.long 0x00 "DMA0_SA45,DMA Controller Channel Configuration Source Address Register Channel 45"
|
|
group.long 0xB88++0x03
|
|
line.long 0x00 "DMA0_SA46,DMA Controller Channel Configuration Source Address Register Channel 46"
|
|
group.long 0xBC8++0x03
|
|
line.long 0x00 "DMA0_SA47,DMA Controller Channel Configuration Source Address Register Channel 47"
|
|
group.long 0xC08++0x03
|
|
line.long 0x00 "DMA0_SA48,DMA Controller Channel Configuration Source Address Register Channel 48"
|
|
group.long 0xC48++0x03
|
|
line.long 0x00 "DMA0_SA49,DMA Controller Channel Configuration Source Address Register Channel 49"
|
|
group.long 0xC88++0x03
|
|
line.long 0x00 "DMA0_SA50,DMA Controller Channel Configuration Source Address Register Channel 50"
|
|
group.long 0xCC8++0x03
|
|
line.long 0x00 "DMA0_SA51,DMA Controller Channel Configuration Source Address Register Channel 51"
|
|
group.long 0xD08++0x03
|
|
line.long 0x00 "DMA0_SA52,DMA Controller Channel Configuration Source Address Register Channel 52"
|
|
group.long 0xD48++0x03
|
|
line.long 0x00 "DMA0_SA53,DMA Controller Channel Configuration Source Address Register Channel 53"
|
|
group.long 0xD88++0x03
|
|
line.long 0x00 "DMA0_SA54,DMA Controller Channel Configuration Source Address Register Channel 54"
|
|
group.long 0xDC8++0x03
|
|
line.long 0x00 "DMA0_SA55,DMA Controller Channel Configuration Source Address Register Channel 55"
|
|
group.long 0xE08++0x03
|
|
line.long 0x00 "DMA0_SA56,DMA Controller Channel Configuration Source Address Register Channel 56"
|
|
group.long 0xE48++0x03
|
|
line.long 0x00 "DMA0_SA57,DMA Controller Channel Configuration Source Address Register Channel 57"
|
|
group.long 0xE88++0x03
|
|
line.long 0x00 "DMA0_SA58,DMA Controller Channel Configuration Source Address Register Channel 58"
|
|
group.long 0xEC8++0x03
|
|
line.long 0x00 "DMA0_SA59,DMA Controller Channel Configuration Source Address Register Channel 59"
|
|
group.long 0xF08++0x03
|
|
line.long 0x00 "DMA0_SA60,DMA Controller Channel Configuration Source Address Register Channel 60"
|
|
group.long 0xF48++0x03
|
|
line.long 0x00 "DMA0_SA61,DMA Controller Channel Configuration Source Address Register Channel 61"
|
|
group.long 0xF88++0x03
|
|
line.long 0x00 "DMA0_SA62,DMA Controller Channel Configuration Source Address Register Channel 62"
|
|
group.long 0xFC8++0x03
|
|
line.long 0x00 "DMA0_SA63,DMA Controller Channel Configuration Source Address Register Channel 63"
|
|
tree.end
|
|
tree "DMA Controller Channel Configuration Destination Address Register Channels"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "DMA0_DA0,DMA Controller Channel Configuration Destination Address Register Channel 0"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMA0_DA1,DMA Controller Channel Configuration Destination Address Register Channel 1"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "DMA0_DA2,DMA Controller Channel Configuration Destination Address Register Channel 2"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "DMA0_DA3,DMA Controller Channel Configuration Destination Address Register Channel 3"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "DMA0_DA4,DMA Controller Channel Configuration Destination Address Register Channel 4"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "DMA0_DA5,DMA Controller Channel Configuration Destination Address Register Channel 5"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "DMA0_DA6,DMA Controller Channel Configuration Destination Address Register Channel 6"
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "DMA0_DA7,DMA Controller Channel Configuration Destination Address Register Channel 7"
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "DMA0_DA8,DMA Controller Channel Configuration Destination Address Register Channel 8"
|
|
group.long 0x24C++0x03
|
|
line.long 0x00 "DMA0_DA9,DMA Controller Channel Configuration Destination Address Register Channel 9"
|
|
group.long 0x28C++0x03
|
|
line.long 0x00 "DMA0_DA10,DMA Controller Channel Configuration Destination Address Register Channel 10"
|
|
group.long 0x2CC++0x03
|
|
line.long 0x00 "DMA0_DA11,DMA Controller Channel Configuration Destination Address Register Channel 11"
|
|
group.long 0x30C++0x03
|
|
line.long 0x00 "DMA0_DA12,DMA Controller Channel Configuration Destination Address Register Channel 12"
|
|
group.long 0x34C++0x03
|
|
line.long 0x00 "DMA0_DA13,DMA Controller Channel Configuration Destination Address Register Channel 13"
|
|
group.long 0x38C++0x03
|
|
line.long 0x00 "DMA0_DA14,DMA Controller Channel Configuration Destination Address Register Channel 14"
|
|
group.long 0x3CC++0x03
|
|
line.long 0x00 "DMA0_DA15,DMA Controller Channel Configuration Destination Address Register Channel 15"
|
|
group.long 0x40C++0x03
|
|
line.long 0x00 "DMA0_DA16,DMA Controller Channel Configuration Destination Address Register Channel 16"
|
|
group.long 0x44C++0x03
|
|
line.long 0x00 "DMA0_DA17,DMA Controller Channel Configuration Destination Address Register Channel 17"
|
|
group.long 0x48C++0x03
|
|
line.long 0x00 "DMA0_DA18,DMA Controller Channel Configuration Destination Address Register Channel 18"
|
|
group.long 0x4CC++0x03
|
|
line.long 0x00 "DMA0_DA19,DMA Controller Channel Configuration Destination Address Register Channel 19"
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "DMA0_DA20,DMA Controller Channel Configuration Destination Address Register Channel 20"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "DMA0_DA21,DMA Controller Channel Configuration Destination Address Register Channel 21"
|
|
group.long 0x58C++0x03
|
|
line.long 0x00 "DMA0_DA22,DMA Controller Channel Configuration Destination Address Register Channel 22"
|
|
group.long 0x5CC++0x03
|
|
line.long 0x00 "DMA0_DA23,DMA Controller Channel Configuration Destination Address Register Channel 23"
|
|
group.long 0x60C++0x03
|
|
line.long 0x00 "DMA0_DA24,DMA Controller Channel Configuration Destination Address Register Channel 24"
|
|
group.long 0x64C++0x03
|
|
line.long 0x00 "DMA0_DA25,DMA Controller Channel Configuration Destination Address Register Channel 25"
|
|
group.long 0x68C++0x03
|
|
line.long 0x00 "DMA0_DA26,DMA Controller Channel Configuration Destination Address Register Channel 26"
|
|
group.long 0x6CC++0x03
|
|
line.long 0x00 "DMA0_DA27,DMA Controller Channel Configuration Destination Address Register Channel 27"
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "DMA0_DA28,DMA Controller Channel Configuration Destination Address Register Channel 28"
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "DMA0_DA29,DMA Controller Channel Configuration Destination Address Register Channel 29"
|
|
group.long 0x78C++0x03
|
|
line.long 0x00 "DMA0_DA30,DMA Controller Channel Configuration Destination Address Register Channel 30"
|
|
group.long 0x7CC++0x03
|
|
line.long 0x00 "DMA0_DA31,DMA Controller Channel Configuration Destination Address Register Channel 31"
|
|
group.long 0x80C++0x03
|
|
line.long 0x00 "DMA0_DA32,DMA Controller Channel Configuration Destination Address Register Channel 32"
|
|
group.long 0x84C++0x03
|
|
line.long 0x00 "DMA0_DA33,DMA Controller Channel Configuration Destination Address Register Channel 33"
|
|
group.long 0x88C++0x03
|
|
line.long 0x00 "DMA0_DA34,DMA Controller Channel Configuration Destination Address Register Channel 34"
|
|
group.long 0x8CC++0x03
|
|
line.long 0x00 "DMA0_DA35,DMA Controller Channel Configuration Destination Address Register Channel 35"
|
|
group.long 0x90C++0x03
|
|
line.long 0x00 "DMA0_DA36,DMA Controller Channel Configuration Destination Address Register Channel 36"
|
|
group.long 0x94C++0x03
|
|
line.long 0x00 "DMA0_DA37,DMA Controller Channel Configuration Destination Address Register Channel 37"
|
|
group.long 0x98C++0x03
|
|
line.long 0x00 "DMA0_DA38,DMA Controller Channel Configuration Destination Address Register Channel 38"
|
|
group.long 0x9CC++0x03
|
|
line.long 0x00 "DMA0_DA39,DMA Controller Channel Configuration Destination Address Register Channel 39"
|
|
group.long 0xA0C++0x03
|
|
line.long 0x00 "DMA0_DA40,DMA Controller Channel Configuration Destination Address Register Channel 40"
|
|
group.long 0xA4C++0x03
|
|
line.long 0x00 "DMA0_DA41,DMA Controller Channel Configuration Destination Address Register Channel 41"
|
|
group.long 0xA8C++0x03
|
|
line.long 0x00 "DMA0_DA42,DMA Controller Channel Configuration Destination Address Register Channel 42"
|
|
group.long 0xACC++0x03
|
|
line.long 0x00 "DMA0_DA43,DMA Controller Channel Configuration Destination Address Register Channel 43"
|
|
group.long 0xB0C++0x03
|
|
line.long 0x00 "DMA0_DA44,DMA Controller Channel Configuration Destination Address Register Channel 44"
|
|
group.long 0xB4C++0x03
|
|
line.long 0x00 "DMA0_DA45,DMA Controller Channel Configuration Destination Address Register Channel 45"
|
|
group.long 0xB8C++0x03
|
|
line.long 0x00 "DMA0_DA46,DMA Controller Channel Configuration Destination Address Register Channel 46"
|
|
group.long 0xBCC++0x03
|
|
line.long 0x00 "DMA0_DA47,DMA Controller Channel Configuration Destination Address Register Channel 47"
|
|
group.long 0xC0C++0x03
|
|
line.long 0x00 "DMA0_DA48,DMA Controller Channel Configuration Destination Address Register Channel 48"
|
|
group.long 0xC4C++0x03
|
|
line.long 0x00 "DMA0_DA49,DMA Controller Channel Configuration Destination Address Register Channel 49"
|
|
group.long 0xC8C++0x03
|
|
line.long 0x00 "DMA0_DA50,DMA Controller Channel Configuration Destination Address Register Channel 50"
|
|
group.long 0xCCC++0x03
|
|
line.long 0x00 "DMA0_DA51,DMA Controller Channel Configuration Destination Address Register Channel 51"
|
|
group.long 0xD0C++0x03
|
|
line.long 0x00 "DMA0_DA52,DMA Controller Channel Configuration Destination Address Register Channel 52"
|
|
group.long 0xD4C++0x03
|
|
line.long 0x00 "DMA0_DA53,DMA Controller Channel Configuration Destination Address Register Channel 53"
|
|
group.long 0xD8C++0x03
|
|
line.long 0x00 "DMA0_DA54,DMA Controller Channel Configuration Destination Address Register Channel 54"
|
|
group.long 0xDCC++0x03
|
|
line.long 0x00 "DMA0_DA55,DMA Controller Channel Configuration Destination Address Register Channel 55"
|
|
group.long 0xE0C++0x03
|
|
line.long 0x00 "DMA0_DA56,DMA Controller Channel Configuration Destination Address Register Channel 56"
|
|
group.long 0xE4C++0x03
|
|
line.long 0x00 "DMA0_DA57,DMA Controller Channel Configuration Destination Address Register Channel 57"
|
|
group.long 0xE8C++0x03
|
|
line.long 0x00 "DMA0_DA58,DMA Controller Channel Configuration Destination Address Register Channel 58"
|
|
group.long 0xECC++0x03
|
|
line.long 0x00 "DMA0_DA59,DMA Controller Channel Configuration Destination Address Register Channel 59"
|
|
group.long 0xF0C++0x03
|
|
line.long 0x00 "DMA0_DA60,DMA Controller Channel Configuration Destination Address Register Channel 60"
|
|
group.long 0xF4C++0x03
|
|
line.long 0x00 "DMA0_DA61,DMA Controller Channel Configuration Destination Address Register Channel 61"
|
|
group.long 0xF8C++0x03
|
|
line.long 0x00 "DMA0_DA62,DMA Controller Channel Configuration Destination Address Register Channel 62"
|
|
group.long 0xFCC++0x03
|
|
line.long 0x00 "DMA0_DA63,DMA Controller Channel Configuration Destination Address Register Channel 63"
|
|
tree.end
|
|
tree "DMA Controller Channel Configuration C Register Channels"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "DMA0_C0,DMA Controller Channel Configuration C Register Channel 0"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x50++0x03
|
|
line.long 0x00 "DMA0_C1,DMA Controller Channel Configuration C Register Channel 1"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x90++0x03
|
|
line.long 0x00 "DMA0_C2,DMA Controller Channel Configuration C Register Channel 2"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xD0++0x03
|
|
line.long 0x00 "DMA0_C3,DMA Controller Channel Configuration C Register Channel 3"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x110++0x03
|
|
line.long 0x00 "DMA0_C4,DMA Controller Channel Configuration C Register Channel 4"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x150++0x03
|
|
line.long 0x00 "DMA0_C5,DMA Controller Channel Configuration C Register Channel 5"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x190++0x03
|
|
line.long 0x00 "DMA0_C6,DMA Controller Channel Configuration C Register Channel 6"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x1D0++0x03
|
|
line.long 0x00 "DMA0_C7,DMA Controller Channel Configuration C Register Channel 7"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x210++0x03
|
|
line.long 0x00 "DMA0_C8,DMA Controller Channel Configuration C Register Channel 8"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x250++0x03
|
|
line.long 0x00 "DMA0_C9,DMA Controller Channel Configuration C Register Channel 9"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x290++0x03
|
|
line.long 0x00 "DMA0_C10,DMA Controller Channel Configuration C Register Channel 10"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x2D0++0x03
|
|
line.long 0x00 "DMA0_C11,DMA Controller Channel Configuration C Register Channel 11"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x310++0x03
|
|
line.long 0x00 "DMA0_C12,DMA Controller Channel Configuration C Register Channel 12"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x350++0x03
|
|
line.long 0x00 "DMA0_C13,DMA Controller Channel Configuration C Register Channel 13"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x390++0x03
|
|
line.long 0x00 "DMA0_C14,DMA Controller Channel Configuration C Register Channel 14"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x3D0++0x03
|
|
line.long 0x00 "DMA0_C15,DMA Controller Channel Configuration C Register Channel 15"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x410++0x03
|
|
line.long 0x00 "DMA0_C16,DMA Controller Channel Configuration C Register Channel 16"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x450++0x03
|
|
line.long 0x00 "DMA0_C17,DMA Controller Channel Configuration C Register Channel 17"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x490++0x03
|
|
line.long 0x00 "DMA0_C18,DMA Controller Channel Configuration C Register Channel 18"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x4D0++0x03
|
|
line.long 0x00 "DMA0_C19,DMA Controller Channel Configuration C Register Channel 19"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x510++0x03
|
|
line.long 0x00 "DMA0_C20,DMA Controller Channel Configuration C Register Channel 20"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x550++0x03
|
|
line.long 0x00 "DMA0_C21,DMA Controller Channel Configuration C Register Channel 21"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x590++0x03
|
|
line.long 0x00 "DMA0_C22,DMA Controller Channel Configuration C Register Channel 22"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x5D0++0x03
|
|
line.long 0x00 "DMA0_C23,DMA Controller Channel Configuration C Register Channel 23"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x610++0x03
|
|
line.long 0x00 "DMA0_C24,DMA Controller Channel Configuration C Register Channel 24"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x650++0x03
|
|
line.long 0x00 "DMA0_C25,DMA Controller Channel Configuration C Register Channel 25"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x690++0x03
|
|
line.long 0x00 "DMA0_C26,DMA Controller Channel Configuration C Register Channel 26"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x6D0++0x03
|
|
line.long 0x00 "DMA0_C27,DMA Controller Channel Configuration C Register Channel 27"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x710++0x03
|
|
line.long 0x00 "DMA0_C28,DMA Controller Channel Configuration C Register Channel 28"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x750++0x03
|
|
line.long 0x00 "DMA0_C29,DMA Controller Channel Configuration C Register Channel 29"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x790++0x03
|
|
line.long 0x00 "DMA0_C30,DMA Controller Channel Configuration C Register Channel 30"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x7D0++0x03
|
|
line.long 0x00 "DMA0_C31,DMA Controller Channel Configuration C Register Channel 31"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x810++0x03
|
|
line.long 0x00 "DMA0_C32,DMA Controller Channel Configuration C Register Channel 32"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x850++0x03
|
|
line.long 0x00 "DMA0_C33,DMA Controller Channel Configuration C Register Channel 33"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x890++0x03
|
|
line.long 0x00 "DMA0_C34,DMA Controller Channel Configuration C Register Channel 34"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x8D0++0x03
|
|
line.long 0x00 "DMA0_C35,DMA Controller Channel Configuration C Register Channel 35"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x910++0x03
|
|
line.long 0x00 "DMA0_C36,DMA Controller Channel Configuration C Register Channel 36"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x950++0x03
|
|
line.long 0x00 "DMA0_C37,DMA Controller Channel Configuration C Register Channel 37"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x990++0x03
|
|
line.long 0x00 "DMA0_C38,DMA Controller Channel Configuration C Register Channel 38"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0x9D0++0x03
|
|
line.long 0x00 "DMA0_C39,DMA Controller Channel Configuration C Register Channel 39"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xA10++0x03
|
|
line.long 0x00 "DMA0_C40,DMA Controller Channel Configuration C Register Channel 40"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xA50++0x03
|
|
line.long 0x00 "DMA0_C41,DMA Controller Channel Configuration C Register Channel 41"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xA90++0x03
|
|
line.long 0x00 "DMA0_C42,DMA Controller Channel Configuration C Register Channel 42"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xAD0++0x03
|
|
line.long 0x00 "DMA0_C43,DMA Controller Channel Configuration C Register Channel 43"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xB10++0x03
|
|
line.long 0x00 "DMA0_C44,DMA Controller Channel Configuration C Register Channel 44"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xB50++0x03
|
|
line.long 0x00 "DMA0_C45,DMA Controller Channel Configuration C Register Channel 45"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xB90++0x03
|
|
line.long 0x00 "DMA0_C46,DMA Controller Channel Configuration C Register Channel 46"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xBD0++0x03
|
|
line.long 0x00 "DMA0_C47,DMA Controller Channel Configuration C Register Channel 47"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xC10++0x03
|
|
line.long 0x00 "DMA0_C48,DMA Controller Channel Configuration C Register Channel 48"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xC50++0x03
|
|
line.long 0x00 "DMA0_C49,DMA Controller Channel Configuration C Register Channel 49"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xC90++0x03
|
|
line.long 0x00 "DMA0_C50,DMA Controller Channel Configuration C Register Channel 50"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xCD0++0x03
|
|
line.long 0x00 "DMA0_C51,DMA Controller Channel Configuration C Register Channel 51"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xD10++0x03
|
|
line.long 0x00 "DMA0_C52,DMA Controller Channel Configuration C Register Channel 52"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xD50++0x03
|
|
line.long 0x00 "DMA0_C53,DMA Controller Channel Configuration C Register Channel 53"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xD90++0x03
|
|
line.long 0x00 "DMA0_C54,DMA Controller Channel Configuration C Register Channel 54"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xDD0++0x03
|
|
line.long 0x00 "DMA0_C55,DMA Controller Channel Configuration C Register Channel 55"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xE10++0x03
|
|
line.long 0x00 "DMA0_C56,DMA Controller Channel Configuration C Register Channel 56"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xE50++0x03
|
|
line.long 0x00 "DMA0_C57,DMA Controller Channel Configuration C Register Channel 57"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xE90++0x03
|
|
line.long 0x00 "DMA0_C58,DMA Controller Channel Configuration C Register Channel 58"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xED0++0x03
|
|
line.long 0x00 "DMA0_C59,DMA Controller Channel Configuration C Register Channel 59"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xF10++0x03
|
|
line.long 0x00 "DMA0_C60,DMA Controller Channel Configuration C Register Channel 60"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xF50++0x03
|
|
line.long 0x00 "DMA0_C61,DMA Controller Channel Configuration C Register Channel 61"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xF90++0x03
|
|
line.long 0x00 "DMA0_C62,DMA Controller Channel Configuration C Register Channel 62"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
wgroup.long 0xFD0++0x03
|
|
line.long 0x00 "DMA0_C63,DMA Controller Channel Configuration C Register Channel 63"
|
|
bitfld.long 0x00 8. " CE ,Clear EDIRQ" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CD ,Clear DIRQ" "No effect,Clear"
|
|
tree.end
|
|
tree "DMA Controller Channel Configuration D Register Channels"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DMA0_D0,DMA Controller Channel Configuration D Register Channel 0"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA0,All DMA0_SA0"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA0,All DMA0_DA0"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "DMA0_D1,DMA Controller Channel Configuration D Register Channel 1"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA1,All DMA0_SA1"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA1,All DMA0_DA1"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "DMA0_D2,DMA Controller Channel Configuration D Register Channel 2"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA2,All DMA0_SA2"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA2,All DMA0_DA2"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "DMA0_D3,DMA Controller Channel Configuration D Register Channel 3"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA3,All DMA0_SA3"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA3,All DMA0_DA3"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "DMA0_D4,DMA Controller Channel Configuration D Register Channel 4"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA4,All DMA0_SA4"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA4,All DMA0_DA4"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "DMA0_D5,DMA Controller Channel Configuration D Register Channel 5"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA5,All DMA0_SA5"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA5,All DMA0_DA5"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "DMA0_D6,DMA Controller Channel Configuration D Register Channel 6"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA6,All DMA0_SA6"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA6,All DMA0_DA6"
|
|
group.long 0x1D4++0x03
|
|
line.long 0x00 "DMA0_D7,DMA Controller Channel Configuration D Register Channel 7"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA7,All DMA0_SA7"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA7,All DMA0_DA7"
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "DMA0_D8,DMA Controller Channel Configuration D Register Channel 8"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA8,All DMA0_SA8"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA8,All DMA0_DA8"
|
|
group.long 0x254++0x03
|
|
line.long 0x00 "DMA0_D9,DMA Controller Channel Configuration D Register Channel 9"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA9,All DMA0_SA9"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA9,All DMA0_DA9"
|
|
group.long 0x294++0x03
|
|
line.long 0x00 "DMA0_D10,DMA Controller Channel Configuration D Register Channel 10"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA10,All DMA0_SA10"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA10,All DMA0_DA10"
|
|
group.long 0x2D4++0x03
|
|
line.long 0x00 "DMA0_D11,DMA Controller Channel Configuration D Register Channel 11"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA11,All DMA0_SA11"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA11,All DMA0_DA11"
|
|
group.long 0x314++0x03
|
|
line.long 0x00 "DMA0_D12,DMA Controller Channel Configuration D Register Channel 12"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA12,All DMA0_SA12"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA12,All DMA0_DA12"
|
|
group.long 0x354++0x03
|
|
line.long 0x00 "DMA0_D13,DMA Controller Channel Configuration D Register Channel 13"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA13,All DMA0_SA13"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA13,All DMA0_DA13"
|
|
group.long 0x394++0x03
|
|
line.long 0x00 "DMA0_D14,DMA Controller Channel Configuration D Register Channel 14"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA14,All DMA0_SA14"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA14,All DMA0_DA14"
|
|
group.long 0x3D4++0x03
|
|
line.long 0x00 "DMA0_D15,DMA Controller Channel Configuration D Register Channel 15"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA15,All DMA0_SA15"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA15,All DMA0_DA15"
|
|
group.long 0x414++0x03
|
|
line.long 0x00 "DMA0_D16,DMA Controller Channel Configuration D Register Channel 16"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA16,All DMA0_SA16"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA16,All DMA0_DA16"
|
|
group.long 0x454++0x03
|
|
line.long 0x00 "DMA0_D17,DMA Controller Channel Configuration D Register Channel 17"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA17,All DMA0_SA17"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA17,All DMA0_DA17"
|
|
group.long 0x494++0x03
|
|
line.long 0x00 "DMA0_D18,DMA Controller Channel Configuration D Register Channel 18"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA18,All DMA0_SA18"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA18,All DMA0_DA18"
|
|
group.long 0x4D4++0x03
|
|
line.long 0x00 "DMA0_D19,DMA Controller Channel Configuration D Register Channel 19"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA19,All DMA0_SA19"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA19,All DMA0_DA19"
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "DMA0_D20,DMA Controller Channel Configuration D Register Channel 20"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA20,All DMA0_SA20"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA20,All DMA0_DA20"
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "DMA0_D21,DMA Controller Channel Configuration D Register Channel 21"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA21,All DMA0_SA21"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA21,All DMA0_DA21"
|
|
group.long 0x594++0x03
|
|
line.long 0x00 "DMA0_D22,DMA Controller Channel Configuration D Register Channel 22"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA22,All DMA0_SA22"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA22,All DMA0_DA22"
|
|
group.long 0x5D4++0x03
|
|
line.long 0x00 "DMA0_D23,DMA Controller Channel Configuration D Register Channel 23"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA23,All DMA0_SA23"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA23,All DMA0_DA23"
|
|
group.long 0x614++0x03
|
|
line.long 0x00 "DMA0_D24,DMA Controller Channel Configuration D Register Channel 24"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA24,All DMA0_SA24"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA24,All DMA0_DA24"
|
|
group.long 0x654++0x03
|
|
line.long 0x00 "DMA0_D25,DMA Controller Channel Configuration D Register Channel 25"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA25,All DMA0_SA25"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA25,All DMA0_DA25"
|
|
group.long 0x694++0x03
|
|
line.long 0x00 "DMA0_D26,DMA Controller Channel Configuration D Register Channel 26"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA26,All DMA0_SA26"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA26,All DMA0_DA26"
|
|
group.long 0x6D4++0x03
|
|
line.long 0x00 "DMA0_D27,DMA Controller Channel Configuration D Register Channel 27"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA27,All DMA0_SA27"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA27,All DMA0_DA27"
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "DMA0_D28,DMA Controller Channel Configuration D Register Channel 28"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA28,All DMA0_SA28"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA28,All DMA0_DA28"
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "DMA0_D29,DMA Controller Channel Configuration D Register Channel 29"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA29,All DMA0_SA29"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA29,All DMA0_DA29"
|
|
group.long 0x794++0x03
|
|
line.long 0x00 "DMA0_D30,DMA Controller Channel Configuration D Register Channel 30"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA30,All DMA0_SA30"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA30,All DMA0_DA30"
|
|
group.long 0x7D4++0x03
|
|
line.long 0x00 "DMA0_D31,DMA Controller Channel Configuration D Register Channel 31"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA31,All DMA0_SA31"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA31,All DMA0_DA31"
|
|
group.long 0x814++0x03
|
|
line.long 0x00 "DMA0_D32,DMA Controller Channel Configuration D Register Channel 32"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA32,All DMA0_SA32"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA32,All DMA0_DA32"
|
|
group.long 0x854++0x03
|
|
line.long 0x00 "DMA0_D33,DMA Controller Channel Configuration D Register Channel 33"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA33,All DMA0_SA33"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA33,All DMA0_DA33"
|
|
group.long 0x894++0x03
|
|
line.long 0x00 "DMA0_D34,DMA Controller Channel Configuration D Register Channel 34"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA34,All DMA0_SA34"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA34,All DMA0_DA34"
|
|
group.long 0x8D4++0x03
|
|
line.long 0x00 "DMA0_D35,DMA Controller Channel Configuration D Register Channel 35"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA35,All DMA0_SA35"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA35,All DMA0_DA35"
|
|
group.long 0x914++0x03
|
|
line.long 0x00 "DMA0_D36,DMA Controller Channel Configuration D Register Channel 36"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA36,All DMA0_SA36"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA36,All DMA0_DA36"
|
|
group.long 0x954++0x03
|
|
line.long 0x00 "DMA0_D37,DMA Controller Channel Configuration D Register Channel 37"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA37,All DMA0_SA37"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA37,All DMA0_DA37"
|
|
group.long 0x994++0x03
|
|
line.long 0x00 "DMA0_D38,DMA Controller Channel Configuration D Register Channel 38"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA38,All DMA0_SA38"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA38,All DMA0_DA38"
|
|
group.long 0x9D4++0x03
|
|
line.long 0x00 "DMA0_D39,DMA Controller Channel Configuration D Register Channel 39"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA39,All DMA0_SA39"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA39,All DMA0_DA39"
|
|
group.long 0xA14++0x03
|
|
line.long 0x00 "DMA0_D40,DMA Controller Channel Configuration D Register Channel 40"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA40,All DMA0_SA40"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA40,All DMA0_DA40"
|
|
group.long 0xA54++0x03
|
|
line.long 0x00 "DMA0_D41,DMA Controller Channel Configuration D Register Channel 41"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA41,All DMA0_SA41"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA41,All DMA0_DA41"
|
|
group.long 0xA94++0x03
|
|
line.long 0x00 "DMA0_D42,DMA Controller Channel Configuration D Register Channel 42"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA42,All DMA0_SA42"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA42,All DMA0_DA42"
|
|
group.long 0xAD4++0x03
|
|
line.long 0x00 "DMA0_D43,DMA Controller Channel Configuration D Register Channel 43"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA43,All DMA0_SA43"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA43,All DMA0_DA43"
|
|
group.long 0xB14++0x03
|
|
line.long 0x00 "DMA0_D44,DMA Controller Channel Configuration D Register Channel 44"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA44,All DMA0_SA44"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA44,All DMA0_DA44"
|
|
group.long 0xB54++0x03
|
|
line.long 0x00 "DMA0_D45,DMA Controller Channel Configuration D Register Channel 45"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA45,All DMA0_SA45"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA45,All DMA0_DA45"
|
|
group.long 0xB94++0x03
|
|
line.long 0x00 "DMA0_D46,DMA Controller Channel Configuration D Register Channel 46"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA46,All DMA0_SA46"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA46,All DMA0_DA46"
|
|
group.long 0xBD4++0x03
|
|
line.long 0x00 "DMA0_D47,DMA Controller Channel Configuration D Register Channel 47"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA47,All DMA0_SA47"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA47,All DMA0_DA47"
|
|
group.long 0xC14++0x03
|
|
line.long 0x00 "DMA0_D48,DMA Controller Channel Configuration D Register Channel 48"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA48,All DMA0_SA48"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA48,All DMA0_DA48"
|
|
group.long 0xC54++0x03
|
|
line.long 0x00 "DMA0_D49,DMA Controller Channel Configuration D Register Channel 49"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA49,All DMA0_SA49"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA49,All DMA0_DA49"
|
|
group.long 0xC94++0x03
|
|
line.long 0x00 "DMA0_D50,DMA Controller Channel Configuration D Register Channel 50"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA50,All DMA0_SA50"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA50,All DMA0_DA50"
|
|
group.long 0xCD4++0x03
|
|
line.long 0x00 "DMA0_D51,DMA Controller Channel Configuration D Register Channel 51"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA51,All DMA0_SA51"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA51,All DMA0_DA51"
|
|
group.long 0xD14++0x03
|
|
line.long 0x00 "DMA0_D52,DMA Controller Channel Configuration D Register Channel 52"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA52,All DMA0_SA52"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA52,All DMA0_DA52"
|
|
group.long 0xD54++0x03
|
|
line.long 0x00 "DMA0_D53,DMA Controller Channel Configuration D Register Channel 53"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA53,All DMA0_SA53"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA53,All DMA0_DA53"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "DMA0_D54,DMA Controller Channel Configuration D Register Channel 54"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA54,All DMA0_SA54"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA54,All DMA0_DA54"
|
|
group.long 0xDD4++0x03
|
|
line.long 0x00 "DMA0_D55,DMA Controller Channel Configuration D Register Channel 55"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA55,All DMA0_SA55"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA55,All DMA0_DA55"
|
|
group.long 0xE14++0x03
|
|
line.long 0x00 "DMA0_D56,DMA Controller Channel Configuration D Register Channel 56"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA56,All DMA0_SA56"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA56,All DMA0_DA56"
|
|
group.long 0xE54++0x03
|
|
line.long 0x00 "DMA0_D57,DMA Controller Channel Configuration D Register Channel 57"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA57,All DMA0_SA57"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA57,All DMA0_DA57"
|
|
group.long 0xE94++0x03
|
|
line.long 0x00 "DMA0_D58,DMA Controller Channel Configuration D Register Channel 58"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA58,All DMA0_SA58"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA58,All DMA0_DA58"
|
|
group.long 0xED4++0x03
|
|
line.long 0x00 "DMA0_D59,DMA Controller Channel Configuration D Register Channel 59"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA59,All DMA0_SA59"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA59,All DMA0_DA59"
|
|
group.long 0xF14++0x03
|
|
line.long 0x00 "DMA0_D60,DMA Controller Channel Configuration D Register Channel 60"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA60,All DMA0_SA60"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA60,All DMA0_DA60"
|
|
group.long 0xF54++0x03
|
|
line.long 0x00 "DMA0_D61,DMA Controller Channel Configuration D Register Channel 61"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA61,All DMA0_SA61"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA61,All DMA0_DA61"
|
|
group.long 0xF94++0x03
|
|
line.long 0x00 "DMA0_D62,DMA Controller Channel Configuration D Register Channel 62"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA62,All DMA0_SA62"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA62,All DMA0_DA62"
|
|
group.long 0xFD4++0x03
|
|
line.long 0x00 "DMA0_D63,DMA Controller Channel Configuration D Register Channel 63"
|
|
bitfld.long 0x00 31. " FS ,Fixed Source Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 30. " DES ,Decrement Source Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 29. " US ,Update Source Address" "No update,Update"
|
|
bitfld.long 0x00 28. " FBS ,Fixed Block Source Address" "First DMA0_SA63,All DMA0_SA63"
|
|
bitfld.long 0x00 15. " FD ,Fixed Destination Address" "Incremented,Fixed"
|
|
bitfld.long 0x00 14. " DED ,Decrement Destination Address" "Incremented,Decremented"
|
|
bitfld.long 0x00 13. " UD ,Update Destination Address" "No update,Update"
|
|
bitfld.long 0x00 12. " FBD ,Fixed Block Destination Address" "First DMA0_DA63,All DMA0_DA63"
|
|
tree.end
|
|
tree "DMA Controller Channel Configuration Source Address Shadow Register Channels"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "DMA0_SASHDW0,DMA Controller Channel Configuration Source Address Shadow Register Channel 0"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "DMA0_SASHDW1,DMA Controller Channel Configuration Source Address Shadow Register Channel 1"
|
|
rgroup.long 0x98++0x03
|
|
line.long 0x00 "DMA0_SASHDW2,DMA Controller Channel Configuration Source Address Shadow Register Channel 2"
|
|
rgroup.long 0xD8++0x03
|
|
line.long 0x00 "DMA0_SASHDW3,DMA Controller Channel Configuration Source Address Shadow Register Channel 3"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "DMA0_SASHDW4,DMA Controller Channel Configuration Source Address Shadow Register Channel 4"
|
|
rgroup.long 0x158++0x03
|
|
line.long 0x00 "DMA0_SASHDW5,DMA Controller Channel Configuration Source Address Shadow Register Channel 5"
|
|
rgroup.long 0x198++0x03
|
|
line.long 0x00 "DMA0_SASHDW6,DMA Controller Channel Configuration Source Address Shadow Register Channel 6"
|
|
rgroup.long 0x1D8++0x03
|
|
line.long 0x00 "DMA0_SASHDW7,DMA Controller Channel Configuration Source Address Shadow Register Channel 7"
|
|
rgroup.long 0x218++0x03
|
|
line.long 0x00 "DMA0_SASHDW8,DMA Controller Channel Configuration Source Address Shadow Register Channel 8"
|
|
rgroup.long 0x258++0x03
|
|
line.long 0x00 "DMA0_SASHDW9,DMA Controller Channel Configuration Source Address Shadow Register Channel 9"
|
|
rgroup.long 0x298++0x03
|
|
line.long 0x00 "DMA0_SASHDW10,DMA Controller Channel Configuration Source Address Shadow Register Channel 10"
|
|
rgroup.long 0x2D8++0x03
|
|
line.long 0x00 "DMA0_SASHDW11,DMA Controller Channel Configuration Source Address Shadow Register Channel 11"
|
|
rgroup.long 0x318++0x03
|
|
line.long 0x00 "DMA0_SASHDW12,DMA Controller Channel Configuration Source Address Shadow Register Channel 12"
|
|
rgroup.long 0x358++0x03
|
|
line.long 0x00 "DMA0_SASHDW13,DMA Controller Channel Configuration Source Address Shadow Register Channel 13"
|
|
rgroup.long 0x398++0x03
|
|
line.long 0x00 "DMA0_SASHDW14,DMA Controller Channel Configuration Source Address Shadow Register Channel 14"
|
|
rgroup.long 0x3D8++0x03
|
|
line.long 0x00 "DMA0_SASHDW15,DMA Controller Channel Configuration Source Address Shadow Register Channel 15"
|
|
rgroup.long 0x418++0x03
|
|
line.long 0x00 "DMA0_SASHDW16,DMA Controller Channel Configuration Source Address Shadow Register Channel 16"
|
|
rgroup.long 0x458++0x03
|
|
line.long 0x00 "DMA0_SASHDW17,DMA Controller Channel Configuration Source Address Shadow Register Channel 17"
|
|
rgroup.long 0x498++0x03
|
|
line.long 0x00 "DMA0_SASHDW18,DMA Controller Channel Configuration Source Address Shadow Register Channel 18"
|
|
rgroup.long 0x4D8++0x03
|
|
line.long 0x00 "DMA0_SASHDW19,DMA Controller Channel Configuration Source Address Shadow Register Channel 19"
|
|
rgroup.long 0x518++0x03
|
|
line.long 0x00 "DMA0_SASHDW20,DMA Controller Channel Configuration Source Address Shadow Register Channel 20"
|
|
rgroup.long 0x558++0x03
|
|
line.long 0x00 "DMA0_SASHDW21,DMA Controller Channel Configuration Source Address Shadow Register Channel 21"
|
|
rgroup.long 0x598++0x03
|
|
line.long 0x00 "DMA0_SASHDW22,DMA Controller Channel Configuration Source Address Shadow Register Channel 22"
|
|
rgroup.long 0x5D8++0x03
|
|
line.long 0x00 "DMA0_SASHDW23,DMA Controller Channel Configuration Source Address Shadow Register Channel 23"
|
|
rgroup.long 0x618++0x03
|
|
line.long 0x00 "DMA0_SASHDW24,DMA Controller Channel Configuration Source Address Shadow Register Channel 24"
|
|
rgroup.long 0x658++0x03
|
|
line.long 0x00 "DMA0_SASHDW25,DMA Controller Channel Configuration Source Address Shadow Register Channel 25"
|
|
rgroup.long 0x698++0x03
|
|
line.long 0x00 "DMA0_SASHDW26,DMA Controller Channel Configuration Source Address Shadow Register Channel 26"
|
|
rgroup.long 0x6D8++0x03
|
|
line.long 0x00 "DMA0_SASHDW27,DMA Controller Channel Configuration Source Address Shadow Register Channel 27"
|
|
rgroup.long 0x718++0x03
|
|
line.long 0x00 "DMA0_SASHDW28,DMA Controller Channel Configuration Source Address Shadow Register Channel 28"
|
|
rgroup.long 0x758++0x03
|
|
line.long 0x00 "DMA0_SASHDW29,DMA Controller Channel Configuration Source Address Shadow Register Channel 29"
|
|
rgroup.long 0x798++0x03
|
|
line.long 0x00 "DMA0_SASHDW30,DMA Controller Channel Configuration Source Address Shadow Register Channel 30"
|
|
rgroup.long 0x7D8++0x03
|
|
line.long 0x00 "DMA0_SASHDW31,DMA Controller Channel Configuration Source Address Shadow Register Channel 31"
|
|
rgroup.long 0x818++0x03
|
|
line.long 0x00 "DMA0_SASHDW32,DMA Controller Channel Configuration Source Address Shadow Register Channel 32"
|
|
rgroup.long 0x858++0x03
|
|
line.long 0x00 "DMA0_SASHDW33,DMA Controller Channel Configuration Source Address Shadow Register Channel 33"
|
|
rgroup.long 0x898++0x03
|
|
line.long 0x00 "DMA0_SASHDW34,DMA Controller Channel Configuration Source Address Shadow Register Channel 34"
|
|
rgroup.long 0x8D8++0x03
|
|
line.long 0x00 "DMA0_SASHDW35,DMA Controller Channel Configuration Source Address Shadow Register Channel 35"
|
|
rgroup.long 0x918++0x03
|
|
line.long 0x00 "DMA0_SASHDW36,DMA Controller Channel Configuration Source Address Shadow Register Channel 36"
|
|
rgroup.long 0x958++0x03
|
|
line.long 0x00 "DMA0_SASHDW37,DMA Controller Channel Configuration Source Address Shadow Register Channel 37"
|
|
rgroup.long 0x998++0x03
|
|
line.long 0x00 "DMA0_SASHDW38,DMA Controller Channel Configuration Source Address Shadow Register Channel 38"
|
|
rgroup.long 0x9D8++0x03
|
|
line.long 0x00 "DMA0_SASHDW39,DMA Controller Channel Configuration Source Address Shadow Register Channel 39"
|
|
rgroup.long 0xA18++0x03
|
|
line.long 0x00 "DMA0_SASHDW40,DMA Controller Channel Configuration Source Address Shadow Register Channel 40"
|
|
rgroup.long 0xA58++0x03
|
|
line.long 0x00 "DMA0_SASHDW41,DMA Controller Channel Configuration Source Address Shadow Register Channel 41"
|
|
rgroup.long 0xA98++0x03
|
|
line.long 0x00 "DMA0_SASHDW42,DMA Controller Channel Configuration Source Address Shadow Register Channel 42"
|
|
rgroup.long 0xAD8++0x03
|
|
line.long 0x00 "DMA0_SASHDW43,DMA Controller Channel Configuration Source Address Shadow Register Channel 43"
|
|
rgroup.long 0xB18++0x03
|
|
line.long 0x00 "DMA0_SASHDW44,DMA Controller Channel Configuration Source Address Shadow Register Channel 44"
|
|
rgroup.long 0xB58++0x03
|
|
line.long 0x00 "DMA0_SASHDW45,DMA Controller Channel Configuration Source Address Shadow Register Channel 45"
|
|
rgroup.long 0xB98++0x03
|
|
line.long 0x00 "DMA0_SASHDW46,DMA Controller Channel Configuration Source Address Shadow Register Channel 46"
|
|
rgroup.long 0xBD8++0x03
|
|
line.long 0x00 "DMA0_SASHDW47,DMA Controller Channel Configuration Source Address Shadow Register Channel 47"
|
|
rgroup.long 0xC18++0x03
|
|
line.long 0x00 "DMA0_SASHDW48,DMA Controller Channel Configuration Source Address Shadow Register Channel 48"
|
|
rgroup.long 0xC58++0x03
|
|
line.long 0x00 "DMA0_SASHDW49,DMA Controller Channel Configuration Source Address Shadow Register Channel 49"
|
|
rgroup.long 0xC98++0x03
|
|
line.long 0x00 "DMA0_SASHDW50,DMA Controller Channel Configuration Source Address Shadow Register Channel 50"
|
|
rgroup.long 0xCD8++0x03
|
|
line.long 0x00 "DMA0_SASHDW51,DMA Controller Channel Configuration Source Address Shadow Register Channel 51"
|
|
rgroup.long 0xD18++0x03
|
|
line.long 0x00 "DMA0_SASHDW52,DMA Controller Channel Configuration Source Address Shadow Register Channel 52"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "DMA0_SASHDW53,DMA Controller Channel Configuration Source Address Shadow Register Channel 53"
|
|
rgroup.long 0xD98++0x03
|
|
line.long 0x00 "DMA0_SASHDW54,DMA Controller Channel Configuration Source Address Shadow Register Channel 54"
|
|
rgroup.long 0xDD8++0x03
|
|
line.long 0x00 "DMA0_SASHDW55,DMA Controller Channel Configuration Source Address Shadow Register Channel 55"
|
|
rgroup.long 0xE18++0x03
|
|
line.long 0x00 "DMA0_SASHDW56,DMA Controller Channel Configuration Source Address Shadow Register Channel 56"
|
|
rgroup.long 0xE58++0x03
|
|
line.long 0x00 "DMA0_SASHDW57,DMA Controller Channel Configuration Source Address Shadow Register Channel 57"
|
|
rgroup.long 0xE98++0x03
|
|
line.long 0x00 "DMA0_SASHDW58,DMA Controller Channel Configuration Source Address Shadow Register Channel 58"
|
|
rgroup.long 0xED8++0x03
|
|
line.long 0x00 "DMA0_SASHDW59,DMA Controller Channel Configuration Source Address Shadow Register Channel 59"
|
|
rgroup.long 0xF18++0x03
|
|
line.long 0x00 "DMA0_SASHDW60,DMA Controller Channel Configuration Source Address Shadow Register Channel 60"
|
|
rgroup.long 0xF58++0x03
|
|
line.long 0x00 "DMA0_SASHDW61,DMA Controller Channel Configuration Source Address Shadow Register Channel 61"
|
|
rgroup.long 0xF98++0x03
|
|
line.long 0x00 "DMA0_SASHDW62,DMA Controller Channel Configuration Source Address Shadow Register Channel 62"
|
|
rgroup.long 0xFD8++0x03
|
|
line.long 0x00 "DMA0_SASHDW63,DMA Controller Channel Configuration Source Address Shadow Register Channel 63"
|
|
tree.end
|
|
tree "DMA Controller Channel Configuration Destination Address Shadow Register Channels"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DMA0_DASHDW0,DMA Controller Channel Configuration Destination Address Shadow Register Channel 0"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "DMA0_DASHDW1,DMA Controller Channel Configuration Destination Address Shadow Register Channel 1"
|
|
rgroup.long 0x9C++0x03
|
|
line.long 0x00 "DMA0_DASHDW2,DMA Controller Channel Configuration Destination Address Shadow Register Channel 2"
|
|
rgroup.long 0xDC++0x03
|
|
line.long 0x00 "DMA0_DASHDW3,DMA Controller Channel Configuration Destination Address Shadow Register Channel 3"
|
|
rgroup.long 0x11C++0x03
|
|
line.long 0x00 "DMA0_DASHDW4,DMA Controller Channel Configuration Destination Address Shadow Register Channel 4"
|
|
rgroup.long 0x15C++0x03
|
|
line.long 0x00 "DMA0_DASHDW5,DMA Controller Channel Configuration Destination Address Shadow Register Channel 5"
|
|
rgroup.long 0x19C++0x03
|
|
line.long 0x00 "DMA0_DASHDW6,DMA Controller Channel Configuration Destination Address Shadow Register Channel 6"
|
|
rgroup.long 0x1DC++0x03
|
|
line.long 0x00 "DMA0_DASHDW7,DMA Controller Channel Configuration Destination Address Shadow Register Channel 7"
|
|
rgroup.long 0x21C++0x03
|
|
line.long 0x00 "DMA0_DASHDW8,DMA Controller Channel Configuration Destination Address Shadow Register Channel 8"
|
|
rgroup.long 0x25C++0x03
|
|
line.long 0x00 "DMA0_DASHDW9,DMA Controller Channel Configuration Destination Address Shadow Register Channel 9"
|
|
rgroup.long 0x29C++0x03
|
|
line.long 0x00 "DMA0_DASHDW10,DMA Controller Channel Configuration Destination Address Shadow Register Channel 10"
|
|
rgroup.long 0x2DC++0x03
|
|
line.long 0x00 "DMA0_DASHDW11,DMA Controller Channel Configuration Destination Address Shadow Register Channel 11"
|
|
rgroup.long 0x31C++0x03
|
|
line.long 0x00 "DMA0_DASHDW12,DMA Controller Channel Configuration Destination Address Shadow Register Channel 12"
|
|
rgroup.long 0x35C++0x03
|
|
line.long 0x00 "DMA0_DASHDW13,DMA Controller Channel Configuration Destination Address Shadow Register Channel 13"
|
|
rgroup.long 0x39C++0x03
|
|
line.long 0x00 "DMA0_DASHDW14,DMA Controller Channel Configuration Destination Address Shadow Register Channel 14"
|
|
rgroup.long 0x3DC++0x03
|
|
line.long 0x00 "DMA0_DASHDW15,DMA Controller Channel Configuration Destination Address Shadow Register Channel 15"
|
|
rgroup.long 0x41C++0x03
|
|
line.long 0x00 "DMA0_DASHDW16,DMA Controller Channel Configuration Destination Address Shadow Register Channel 16"
|
|
rgroup.long 0x45C++0x03
|
|
line.long 0x00 "DMA0_DASHDW17,DMA Controller Channel Configuration Destination Address Shadow Register Channel 17"
|
|
rgroup.long 0x49C++0x03
|
|
line.long 0x00 "DMA0_DASHDW18,DMA Controller Channel Configuration Destination Address Shadow Register Channel 18"
|
|
rgroup.long 0x4DC++0x03
|
|
line.long 0x00 "DMA0_DASHDW19,DMA Controller Channel Configuration Destination Address Shadow Register Channel 19"
|
|
rgroup.long 0x51C++0x03
|
|
line.long 0x00 "DMA0_DASHDW20,DMA Controller Channel Configuration Destination Address Shadow Register Channel 20"
|
|
rgroup.long 0x55C++0x03
|
|
line.long 0x00 "DMA0_DASHDW21,DMA Controller Channel Configuration Destination Address Shadow Register Channel 21"
|
|
rgroup.long 0x59C++0x03
|
|
line.long 0x00 "DMA0_DASHDW22,DMA Controller Channel Configuration Destination Address Shadow Register Channel 22"
|
|
rgroup.long 0x5DC++0x03
|
|
line.long 0x00 "DMA0_DASHDW23,DMA Controller Channel Configuration Destination Address Shadow Register Channel 23"
|
|
rgroup.long 0x61C++0x03
|
|
line.long 0x00 "DMA0_DASHDW24,DMA Controller Channel Configuration Destination Address Shadow Register Channel 24"
|
|
rgroup.long 0x65C++0x03
|
|
line.long 0x00 "DMA0_DASHDW25,DMA Controller Channel Configuration Destination Address Shadow Register Channel 25"
|
|
rgroup.long 0x69C++0x03
|
|
line.long 0x00 "DMA0_DASHDW26,DMA Controller Channel Configuration Destination Address Shadow Register Channel 26"
|
|
rgroup.long 0x6DC++0x03
|
|
line.long 0x00 "DMA0_DASHDW27,DMA Controller Channel Configuration Destination Address Shadow Register Channel 27"
|
|
rgroup.long 0x71C++0x03
|
|
line.long 0x00 "DMA0_DASHDW28,DMA Controller Channel Configuration Destination Address Shadow Register Channel 28"
|
|
rgroup.long 0x75C++0x03
|
|
line.long 0x00 "DMA0_DASHDW29,DMA Controller Channel Configuration Destination Address Shadow Register Channel 29"
|
|
rgroup.long 0x79C++0x03
|
|
line.long 0x00 "DMA0_DASHDW30,DMA Controller Channel Configuration Destination Address Shadow Register Channel 30"
|
|
rgroup.long 0x7DC++0x03
|
|
line.long 0x00 "DMA0_DASHDW31,DMA Controller Channel Configuration Destination Address Shadow Register Channel 31"
|
|
rgroup.long 0x81C++0x03
|
|
line.long 0x00 "DMA0_DASHDW32,DMA Controller Channel Configuration Destination Address Shadow Register Channel 32"
|
|
rgroup.long 0x85C++0x03
|
|
line.long 0x00 "DMA0_DASHDW33,DMA Controller Channel Configuration Destination Address Shadow Register Channel 33"
|
|
rgroup.long 0x89C++0x03
|
|
line.long 0x00 "DMA0_DASHDW34,DMA Controller Channel Configuration Destination Address Shadow Register Channel 34"
|
|
rgroup.long 0x8DC++0x03
|
|
line.long 0x00 "DMA0_DASHDW35,DMA Controller Channel Configuration Destination Address Shadow Register Channel 35"
|
|
rgroup.long 0x91C++0x03
|
|
line.long 0x00 "DMA0_DASHDW36,DMA Controller Channel Configuration Destination Address Shadow Register Channel 36"
|
|
rgroup.long 0x95C++0x03
|
|
line.long 0x00 "DMA0_DASHDW37,DMA Controller Channel Configuration Destination Address Shadow Register Channel 37"
|
|
rgroup.long 0x99C++0x03
|
|
line.long 0x00 "DMA0_DASHDW38,DMA Controller Channel Configuration Destination Address Shadow Register Channel 38"
|
|
rgroup.long 0x9DC++0x03
|
|
line.long 0x00 "DMA0_DASHDW39,DMA Controller Channel Configuration Destination Address Shadow Register Channel 39"
|
|
rgroup.long 0xA1C++0x03
|
|
line.long 0x00 "DMA0_DASHDW40,DMA Controller Channel Configuration Destination Address Shadow Register Channel 40"
|
|
rgroup.long 0xA5C++0x03
|
|
line.long 0x00 "DMA0_DASHDW41,DMA Controller Channel Configuration Destination Address Shadow Register Channel 41"
|
|
rgroup.long 0xA9C++0x03
|
|
line.long 0x00 "DMA0_DASHDW42,DMA Controller Channel Configuration Destination Address Shadow Register Channel 42"
|
|
rgroup.long 0xADC++0x03
|
|
line.long 0x00 "DMA0_DASHDW43,DMA Controller Channel Configuration Destination Address Shadow Register Channel 43"
|
|
rgroup.long 0xB1C++0x03
|
|
line.long 0x00 "DMA0_DASHDW44,DMA Controller Channel Configuration Destination Address Shadow Register Channel 44"
|
|
rgroup.long 0xB5C++0x03
|
|
line.long 0x00 "DMA0_DASHDW45,DMA Controller Channel Configuration Destination Address Shadow Register Channel 45"
|
|
rgroup.long 0xB9C++0x03
|
|
line.long 0x00 "DMA0_DASHDW46,DMA Controller Channel Configuration Destination Address Shadow Register Channel 46"
|
|
rgroup.long 0xBDC++0x03
|
|
line.long 0x00 "DMA0_DASHDW47,DMA Controller Channel Configuration Destination Address Shadow Register Channel 47"
|
|
rgroup.long 0xC1C++0x03
|
|
line.long 0x00 "DMA0_DASHDW48,DMA Controller Channel Configuration Destination Address Shadow Register Channel 48"
|
|
rgroup.long 0xC5C++0x03
|
|
line.long 0x00 "DMA0_DASHDW49,DMA Controller Channel Configuration Destination Address Shadow Register Channel 49"
|
|
rgroup.long 0xC9C++0x03
|
|
line.long 0x00 "DMA0_DASHDW50,DMA Controller Channel Configuration Destination Address Shadow Register Channel 50"
|
|
rgroup.long 0xCDC++0x03
|
|
line.long 0x00 "DMA0_DASHDW51,DMA Controller Channel Configuration Destination Address Shadow Register Channel 51"
|
|
rgroup.long 0xD1C++0x03
|
|
line.long 0x00 "DMA0_DASHDW52,DMA Controller Channel Configuration Destination Address Shadow Register Channel 52"
|
|
rgroup.long 0xD5C++0x03
|
|
line.long 0x00 "DMA0_DASHDW53,DMA Controller Channel Configuration Destination Address Shadow Register Channel 53"
|
|
rgroup.long 0xD9C++0x03
|
|
line.long 0x00 "DMA0_DASHDW54,DMA Controller Channel Configuration Destination Address Shadow Register Channel 54"
|
|
rgroup.long 0xDDC++0x03
|
|
line.long 0x00 "DMA0_DASHDW55,DMA Controller Channel Configuration Destination Address Shadow Register Channel 55"
|
|
rgroup.long 0xE1C++0x03
|
|
line.long 0x00 "DMA0_DASHDW56,DMA Controller Channel Configuration Destination Address Shadow Register Channel 56"
|
|
rgroup.long 0xE5C++0x03
|
|
line.long 0x00 "DMA0_DASHDW57,DMA Controller Channel Configuration Destination Address Shadow Register Channel 57"
|
|
rgroup.long 0xE9C++0x03
|
|
line.long 0x00 "DMA0_DASHDW58,DMA Controller Channel Configuration Destination Address Shadow Register Channel 58"
|
|
rgroup.long 0xEDC++0x03
|
|
line.long 0x00 "DMA0_DASHDW59,DMA Controller Channel Configuration Destination Address Shadow Register Channel 59"
|
|
rgroup.long 0xF1C++0x03
|
|
line.long 0x00 "DMA0_DASHDW60,DMA Controller Channel Configuration Destination Address Shadow Register Channel 60"
|
|
rgroup.long 0xF5C++0x03
|
|
line.long 0x00 "DMA0_DASHDW61,DMA Controller Channel Configuration Destination Address Shadow Register Channel 61"
|
|
rgroup.long 0xF9C++0x03
|
|
line.long 0x00 "DMA0_DASHDW62,DMA Controller Channel Configuration Destination Address Shadow Register Channel 62"
|
|
rgroup.long 0xFDC++0x03
|
|
line.long 0x00 "DMA0_DASHDW63,DMA Controller Channel Configuration Destination Address Shadow Register Channel 63"
|
|
tree.end
|
|
tree "DMA Controller Client Matrix External Client Interface Configuration Registers"
|
|
group.long 0x2000++0x03
|
|
line.long 0x00 "DMA0_CMECIC0,DMA Controller Client Matrix External Client Interface Configuration Register 0"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge. DSTP_ACK[0] outputs an inactive logic level / DSTP[0] connected to DSTP_ACK[0]" "0,1"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge. DREQ_ACK[0] outputs an inactive logic level / DREQ[0] connected to DREQ_ACK[0]" "0,1"
|
|
bitfld.long 0x00 21. " LVLEOPACK ,Level End of Processing Acknowledge" "High,Low"
|
|
bitfld.long 0x00 20. " LVLEOP ,Level End of Processing" "High,Low"
|
|
bitfld.long 0x00 19. " LVLSTPACK ,Level Stop Acknowledge" "High,Low"
|
|
bitfld.long 0x00 18. " LVLSTP ,Level Stop Request" "High,Low"
|
|
bitfld.long 0x00 17. " LVLREQACK ,Level Request Acknowledge" "High,Low"
|
|
bitfld.long 0x00 16. " LVLREQ ,Level Request" "High,Low"
|
|
bitfld.long 0x00 2. " ENEOP ,Enable End of Processing" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENSTP ,Enable Stop" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENCI ,Enable Client Interface" "Disabled,Enabled"
|
|
group.long 0x2004++0x03
|
|
line.long 0x00 "DMA0_CMECIC1,DMA Controller Client Matrix External Client Interface Configuration Register 1"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge. DSTP_ACK[1] outputs an inactive logic level / DSTP[1] connected to DSTP_ACK[1]" "0,1"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge. DREQ_ACK[1] outputs an inactive logic level / DREQ[1] connected to DREQ_ACK[1]" "0,1"
|
|
bitfld.long 0x00 21. " LVLEOPACK ,Level End of Processing Acknowledge" "High,Low"
|
|
bitfld.long 0x00 20. " LVLEOP ,Level End of Processing" "High,Low"
|
|
bitfld.long 0x00 19. " LVLSTPACK ,Level Stop Acknowledge" "High,Low"
|
|
bitfld.long 0x00 18. " LVLSTP ,Level Stop Request" "High,Low"
|
|
bitfld.long 0x00 17. " LVLREQACK ,Level Request Acknowledge" "High,Low"
|
|
bitfld.long 0x00 16. " LVLREQ ,Level Request" "High,Low"
|
|
bitfld.long 0x00 2. " ENEOP ,Enable End of Processing" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENSTP ,Enable Stop" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENCI ,Enable Client Interface" "Disabled,Enabled"
|
|
group.long 0x2008++0x03
|
|
line.long 0x00 "DMA0_CMECIC2,DMA Controller Client Matrix External Client Interface Configuration Register 2"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge. DSTP_ACK[2] outputs an inactive logic level / DSTP[2] connected to DSTP_ACK[2]" "0,1"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge. DREQ_ACK[2] outputs an inactive logic level / DREQ[2] connected to DREQ_ACK[2]" "0,1"
|
|
bitfld.long 0x00 21. " LVLEOPACK ,Level End of Processing Acknowledge" "High,Low"
|
|
bitfld.long 0x00 20. " LVLEOP ,Level End of Processing" "High,Low"
|
|
bitfld.long 0x00 19. " LVLSTPACK ,Level Stop Acknowledge" "High,Low"
|
|
bitfld.long 0x00 18. " LVLSTP ,Level Stop Request" "High,Low"
|
|
bitfld.long 0x00 17. " LVLREQACK ,Level Request Acknowledge" "High,Low"
|
|
bitfld.long 0x00 16. " LVLREQ ,Level Request" "High,Low"
|
|
bitfld.long 0x00 2. " ENEOP ,Enable End of Processing" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENSTP ,Enable Stop" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENCI ,Enable Client Interface" "Disabled,Enabled"
|
|
group.long 0x200C++0x03
|
|
line.long 0x00 "DMA0_CMECIC3,DMA Controller Client Matrix External Client Interface Configuration Register 3"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge. DSTP_ACK[3] outputs an inactive logic level / DSTP[3] connected to DSTP_ACK[3]" "0,1"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge. DREQ_ACK[3] outputs an inactive logic level / DREQ[3] connected to DREQ_ACK[3]" "0,1"
|
|
bitfld.long 0x00 21. " LVLEOPACK ,Level End of Processing Acknowledge" "High,Low"
|
|
bitfld.long 0x00 20. " LVLEOP ,Level End of Processing" "High,Low"
|
|
bitfld.long 0x00 19. " LVLSTPACK ,Level Stop Acknowledge" "High,Low"
|
|
bitfld.long 0x00 18. " LVLSTP ,Level Stop Request" "High,Low"
|
|
bitfld.long 0x00 17. " LVLREQACK ,Level Request Acknowledge" "High,Low"
|
|
bitfld.long 0x00 16. " LVLREQ ,Level Request" "High,Low"
|
|
bitfld.long 0x00 2. " ENEOP ,Enable End of Processing" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENSTP ,Enable Stop" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENCI ,Enable Client Interface" "Disabled,Enabled"
|
|
group.long 0x2010++0x03
|
|
line.long 0x00 "DMA0_CMECIC4,DMA Controller Client Matrix External Client Interface Configuration Register 4"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge. DSTP_ACK[4] outputs an inactive logic level / DSTP[4] connected to DSTP_ACK[4]" "0,1"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge. DREQ_ACK[4] outputs an inactive logic level / DREQ[4] connected to DREQ_ACK[4]" "0,1"
|
|
bitfld.long 0x00 21. " LVLEOPACK ,Level End of Processing Acknowledge" "High,Low"
|
|
bitfld.long 0x00 20. " LVLEOP ,Level End of Processing" "High,Low"
|
|
bitfld.long 0x00 19. " LVLSTPACK ,Level Stop Acknowledge" "High,Low"
|
|
bitfld.long 0x00 18. " LVLSTP ,Level Stop Request" "High,Low"
|
|
bitfld.long 0x00 17. " LVLREQACK ,Level Request Acknowledge" "High,Low"
|
|
bitfld.long 0x00 16. " LVLREQ ,Level Request" "High,Low"
|
|
bitfld.long 0x00 2. " ENEOP ,Enable End of Processing" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENSTP ,Enable Stop" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENCI ,Enable Client Interface" "Disabled,Enabled"
|
|
group.long 0x2014++0x03
|
|
line.long 0x00 "DMA0_CMECIC5,DMA Controller Client Matrix External Client Interface Configuration Register 5"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge. DSTP_ACK[5] outputs an inactive logic level / DSTP[5] connected to DSTP_ACK[5]" "0,1"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge. DREQ_ACK[5] outputs an inactive logic level / DREQ[5] connected to DREQ_ACK[5]" "0,1"
|
|
bitfld.long 0x00 21. " LVLEOPACK ,Level End of Processing Acknowledge" "High,Low"
|
|
bitfld.long 0x00 20. " LVLEOP ,Level End of Processing" "High,Low"
|
|
bitfld.long 0x00 19. " LVLSTPACK ,Level Stop Acknowledge" "High,Low"
|
|
bitfld.long 0x00 18. " LVLSTP ,Level Stop Request" "High,Low"
|
|
bitfld.long 0x00 17. " LVLREQACK ,Level Request Acknowledge" "High,Low"
|
|
bitfld.long 0x00 16. " LVLREQ ,Level Request" "High,Low"
|
|
bitfld.long 0x00 2. " ENEOP ,Enable End of Processing" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENSTP ,Enable Stop" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENCI ,Enable Client Interface" "Disabled,Enabled"
|
|
group.long 0x2018++0x03
|
|
line.long 0x00 "DMA0_CMECIC6,DMA Controller Client Matrix External Client Interface Configuration Register 6"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge. DSTP_ACK[6] outputs an inactive logic level / DSTP[6] connected to DSTP_ACK[6]" "0,1"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge. DREQ_ACK[6] outputs an inactive logic level / DREQ[6] connected to DREQ_ACK[6]" "0,1"
|
|
bitfld.long 0x00 21. " LVLEOPACK ,Level End of Processing Acknowledge" "High,Low"
|
|
bitfld.long 0x00 20. " LVLEOP ,Level End of Processing" "High,Low"
|
|
bitfld.long 0x00 19. " LVLSTPACK ,Level Stop Acknowledge" "High,Low"
|
|
bitfld.long 0x00 18. " LVLSTP ,Level Stop Request" "High,Low"
|
|
bitfld.long 0x00 17. " LVLREQACK ,Level Request Acknowledge" "High,Low"
|
|
bitfld.long 0x00 16. " LVLREQ ,Level Request" "High,Low"
|
|
bitfld.long 0x00 2. " ENEOP ,Enable End of Processing" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENSTP ,Enable Stop" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENCI ,Enable Client Interface" "Disabled,Enabled"
|
|
group.long 0x201C++0x03
|
|
line.long 0x00 "DMA0_CMECIC7,DMA Controller Client Matrix External Client Interface Configuration Register 7"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge. DSTP_ACK[7] outputs an inactive logic level / DSTP[7] connected to DSTP_ACK[7]" "0,1"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge. DREQ_ACK[7] outputs an inactive logic level / DREQ[7] connected to DREQ_ACK[7]" "0,1"
|
|
bitfld.long 0x00 21. " LVLEOPACK ,Level End of Processing Acknowledge" "High,Low"
|
|
bitfld.long 0x00 20. " LVLEOP ,Level End of Processing" "High,Low"
|
|
bitfld.long 0x00 19. " LVLSTPACK ,Level Stop Acknowledge" "High,Low"
|
|
bitfld.long 0x00 18. " LVLSTP ,Level Stop Request" "High,Low"
|
|
bitfld.long 0x00 17. " LVLREQACK ,Level Request Acknowledge" "High,Low"
|
|
bitfld.long 0x00 16. " LVLREQ ,Level Request" "High,Low"
|
|
bitfld.long 0x00 2. " ENEOP ,Enable End of Processing" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ENSTP ,Enable Stop" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENCI ,Enable Client Interface" "Disabled,Enabled"
|
|
tree.end
|
|
tree "DMA Controller Client Matrix Internal Client Interface Configuration Registers"
|
|
group.long 0x2020++0x03
|
|
line.long 0x00 "DMA0_CMICIC0,DMA Controller Client Matrix Internal Client Interface Configuration Register 0"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[0]-DSTP_ACK[0]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[0]-DREQ_ACK[0]"
|
|
group.long 0x2024++0x03
|
|
line.long 0x00 "DMA0_CMICIC1,DMA Controller Client Matrix Internal Client Interface Configuration Register 1"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[1]-DSTP_ACK[1]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[1]-DREQ_ACK[1]"
|
|
group.long 0x2028++0x03
|
|
line.long 0x00 "DMA0_CMICIC2,DMA Controller Client Matrix Internal Client Interface Configuration Register 2"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[2]-DSTP_ACK[2]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[2]-DREQ_ACK[2]"
|
|
group.long 0x202C++0x03
|
|
line.long 0x00 "DMA0_CMICIC3,DMA Controller Client Matrix Internal Client Interface Configuration Register 3"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[3]-DSTP_ACK[3]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[3]-DREQ_ACK[3]"
|
|
group.long 0x2030++0x03
|
|
line.long 0x00 "DMA0_CMICIC4,DMA Controller Client Matrix Internal Client Interface Configuration Register 4"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[4]-DSTP_ACK[4]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[4]-DREQ_ACK[4]"
|
|
group.long 0x2034++0x03
|
|
line.long 0x00 "DMA0_CMICIC5,DMA Controller Client Matrix Internal Client Interface Configuration Register 5"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[5]-DSTP_ACK[5]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[5]-DREQ_ACK[5]"
|
|
group.long 0x2038++0x03
|
|
line.long 0x00 "DMA0_CMICIC6,DMA Controller Client Matrix Internal Client Interface Configuration Register 6"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[6]-DSTP_ACK[6]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[6]-DREQ_ACK[6]"
|
|
group.long 0x203C++0x03
|
|
line.long 0x00 "DMA0_CMICIC7,DMA Controller Client Matrix Internal Client Interface Configuration Register 7"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[7]-DSTP_ACK[7]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[7]-DREQ_ACK[7]"
|
|
group.long 0x2040++0x03
|
|
line.long 0x00 "DMA0_CMICIC8,DMA Controller Client Matrix Internal Client Interface Configuration Register 8"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[8]-DSTP_ACK[8]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[8]-DREQ_ACK[8]"
|
|
group.long 0x2044++0x03
|
|
line.long 0x00 "DMA0_CMICIC9,DMA Controller Client Matrix Internal Client Interface Configuration Register 9"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[9]-DSTP_ACK[9]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[9]-DREQ_ACK[9]"
|
|
group.long 0x2048++0x03
|
|
line.long 0x00 "DMA0_CMICIC10,DMA Controller Client Matrix Internal Client Interface Configuration Register 10"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[10]-DSTP_ACK[10]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[10]-DREQ_ACK[10]"
|
|
group.long 0x204C++0x03
|
|
line.long 0x00 "DMA0_CMICIC11,DMA Controller Client Matrix Internal Client Interface Configuration Register 11"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[11]-DSTP_ACK[11]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[11]-DREQ_ACK[11]"
|
|
group.long 0x2050++0x03
|
|
line.long 0x00 "DMA0_CMICIC12,DMA Controller Client Matrix Internal Client Interface Configuration Register 12"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[12]-DSTP_ACK[12]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[12]-DREQ_ACK[12]"
|
|
group.long 0x2054++0x03
|
|
line.long 0x00 "DMA0_CMICIC13,DMA Controller Client Matrix Internal Client Interface Configuration Register 13"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[13]-DSTP_ACK[13]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[13]-DREQ_ACK[13]"
|
|
group.long 0x2058++0x03
|
|
line.long 0x00 "DMA0_CMICIC14,DMA Controller Client Matrix Internal Client Interface Configuration Register 14"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[14]-DSTP_ACK[14]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[14]-DREQ_ACK[14]"
|
|
group.long 0x205C++0x03
|
|
line.long 0x00 "DMA0_CMICIC15,DMA Controller Client Matrix Internal Client Interface Configuration Register 15"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[15]-DSTP_ACK[15]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[15]-DREQ_ACK[15]"
|
|
group.long 0x2060++0x03
|
|
line.long 0x00 "DMA0_CMICIC16,DMA Controller Client Matrix Internal Client Interface Configuration Register 16"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[16]-DSTP_ACK[16]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[16]-DREQ_ACK[16]"
|
|
group.long 0x2064++0x03
|
|
line.long 0x00 "DMA0_CMICIC17,DMA Controller Client Matrix Internal Client Interface Configuration Register 17"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[17]-DSTP_ACK[17]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[17]-DREQ_ACK[17]"
|
|
group.long 0x2068++0x03
|
|
line.long 0x00 "DMA0_CMICIC18,DMA Controller Client Matrix Internal Client Interface Configuration Register 18"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[18]-DSTP_ACK[18]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[18]-DREQ_ACK[18]"
|
|
group.long 0x206C++0x03
|
|
line.long 0x00 "DMA0_CMICIC19,DMA Controller Client Matrix Internal Client Interface Configuration Register 19"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[19]-DSTP_ACK[19]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[19]-DREQ_ACK[19]"
|
|
group.long 0x2070++0x03
|
|
line.long 0x00 "DMA0_CMICIC20,DMA Controller Client Matrix Internal Client Interface Configuration Register 20"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[20]-DSTP_ACK[20]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[20]-DREQ_ACK[20]"
|
|
group.long 0x2074++0x03
|
|
line.long 0x00 "DMA0_CMICIC21,DMA Controller Client Matrix Internal Client Interface Configuration Register 21"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[21]-DSTP_ACK[21]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[21]-DREQ_ACK[21]"
|
|
group.long 0x2078++0x03
|
|
line.long 0x00 "DMA0_CMICIC22,DMA Controller Client Matrix Internal Client Interface Configuration Register 22"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[22]-DSTP_ACK[22]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[22]-DREQ_ACK[22]"
|
|
group.long 0x207C++0x03
|
|
line.long 0x00 "DMA0_CMICIC23,DMA Controller Client Matrix Internal Client Interface Configuration Register 23"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[23]-DSTP_ACK[23]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[23]-DREQ_ACK[23]"
|
|
group.long 0x2080++0x03
|
|
line.long 0x00 "DMA0_CMICIC24,DMA Controller Client Matrix Internal Client Interface Configuration Register 24"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[24]-DSTP_ACK[24]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[24]-DREQ_ACK[24]"
|
|
group.long 0x2084++0x03
|
|
line.long 0x00 "DMA0_CMICIC25,DMA Controller Client Matrix Internal Client Interface Configuration Register 25"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[25]-DSTP_ACK[25]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[25]-DREQ_ACK[25]"
|
|
group.long 0x2088++0x03
|
|
line.long 0x00 "DMA0_CMICIC26,DMA Controller Client Matrix Internal Client Interface Configuration Register 26"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[26]-DSTP_ACK[26]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[26]-DREQ_ACK[26]"
|
|
group.long 0x208C++0x03
|
|
line.long 0x00 "DMA0_CMICIC27,DMA Controller Client Matrix Internal Client Interface Configuration Register 27"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[27]-DSTP_ACK[27]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[27]-DREQ_ACK[27]"
|
|
group.long 0x2090++0x03
|
|
line.long 0x00 "DMA0_CMICIC28,DMA Controller Client Matrix Internal Client Interface Configuration Register 28"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[28]-DSTP_ACK[28]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[28]-DREQ_ACK[28]"
|
|
group.long 0x2094++0x03
|
|
line.long 0x00 "DMA0_CMICIC29,DMA Controller Client Matrix Internal Client Interface Configuration Register 29"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[29]-DSTP_ACK[29]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[29]-DREQ_ACK[29]"
|
|
group.long 0x2098++0x03
|
|
line.long 0x00 "DMA0_CMICIC30,DMA Controller Client Matrix Internal Client Interface Configuration Register 30"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[30]-DSTP_ACK[30]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[30]-DREQ_ACK[30]"
|
|
group.long 0x209C++0x03
|
|
line.long 0x00 "DMA0_CMICIC31,DMA Controller Client Matrix Internal Client Interface Configuration Register 31"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[31]-DSTP_ACK[31]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[31]-DREQ_ACK[31]"
|
|
group.long 0x20A0++0x03
|
|
line.long 0x00 "DMA0_CMICIC32,DMA Controller Client Matrix Internal Client Interface Configuration Register 32"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[32]-DSTP_ACK[32]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[32]-DREQ_ACK[32]"
|
|
group.long 0x20A4++0x03
|
|
line.long 0x00 "DMA0_CMICIC33,DMA Controller Client Matrix Internal Client Interface Configuration Register 33"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[33]-DSTP_ACK[33]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[33]-DREQ_ACK[33]"
|
|
group.long 0x20A8++0x03
|
|
line.long 0x00 "DMA0_CMICIC34,DMA Controller Client Matrix Internal Client Interface Configuration Register 34"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[34]-DSTP_ACK[34]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[34]-DREQ_ACK[34]"
|
|
group.long 0x20AC++0x03
|
|
line.long 0x00 "DMA0_CMICIC35,DMA Controller Client Matrix Internal Client Interface Configuration Register 35"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[35]-DSTP_ACK[35]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[35]-DREQ_ACK[35]"
|
|
group.long 0x20B0++0x03
|
|
line.long 0x00 "DMA0_CMICIC36,DMA Controller Client Matrix Internal Client Interface Configuration Register 36"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[36]-DSTP_ACK[36]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[36]-DREQ_ACK[36]"
|
|
group.long 0x20B4++0x03
|
|
line.long 0x00 "DMA0_CMICIC37,DMA Controller Client Matrix Internal Client Interface Configuration Register 37"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[37]-DSTP_ACK[37]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[37]-DREQ_ACK[37]"
|
|
group.long 0x20B8++0x03
|
|
line.long 0x00 "DMA0_CMICIC38,DMA Controller Client Matrix Internal Client Interface Configuration Register 38"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[38]-DSTP_ACK[38]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[38]-DREQ_ACK[38]"
|
|
group.long 0x20BC++0x03
|
|
line.long 0x00 "DMA0_CMICIC39,DMA Controller Client Matrix Internal Client Interface Configuration Register 39"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[39]-DSTP_ACK[39]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[39]-DREQ_ACK[39]"
|
|
group.long 0x20C0++0x03
|
|
line.long 0x00 "DMA0_CMICIC40,DMA Controller Client Matrix Internal Client Interface Configuration Register 40"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[40]-DSTP_ACK[40]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[40]-DREQ_ACK[40]"
|
|
group.long 0x20C4++0x03
|
|
line.long 0x00 "DMA0_CMICIC41,DMA Controller Client Matrix Internal Client Interface Configuration Register 41"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[41]-DSTP_ACK[41]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[41]-DREQ_ACK[41]"
|
|
group.long 0x20C8++0x03
|
|
line.long 0x00 "DMA0_CMICIC42,DMA Controller Client Matrix Internal Client Interface Configuration Register 42"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[42]-DSTP_ACK[42]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[42]-DREQ_ACK[42]"
|
|
group.long 0x20CC++0x03
|
|
line.long 0x00 "DMA0_CMICIC43,DMA Controller Client Matrix Internal Client Interface Configuration Register 43"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[43]-DSTP_ACK[43]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[43]-DREQ_ACK[43]"
|
|
group.long 0x20D0++0x03
|
|
line.long 0x00 "DMA0_CMICIC44,DMA Controller Client Matrix Internal Client Interface Configuration Register 44"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[44]-DSTP_ACK[44]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[44]-DREQ_ACK[44]"
|
|
group.long 0x20D4++0x03
|
|
line.long 0x00 "DMA0_CMICIC45,DMA Controller Client Matrix Internal Client Interface Configuration Register 45"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[45]-DSTP_ACK[45]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[45]-DREQ_ACK[45]"
|
|
group.long 0x20D8++0x03
|
|
line.long 0x00 "DMA0_CMICIC46,DMA Controller Client Matrix Internal Client Interface Configuration Register 46"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[46]-DSTP_ACK[46]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[46]-DREQ_ACK[46]"
|
|
group.long 0x20DC++0x03
|
|
line.long 0x00 "DMA0_CMICIC47,DMA Controller Client Matrix Internal Client Interface Configuration Register 47"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[47]-DSTP_ACK[47]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[47]-DREQ_ACK[47]"
|
|
group.long 0x20E0++0x03
|
|
line.long 0x00 "DMA0_CMICIC48,DMA Controller Client Matrix Internal Client Interface Configuration Register 48"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[48]-DSTP_ACK[48]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[48]-DREQ_ACK[48]"
|
|
group.long 0x20E4++0x03
|
|
line.long 0x00 "DMA0_CMICIC49,DMA Controller Client Matrix Internal Client Interface Configuration Register 49"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[49]-DSTP_ACK[49]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[49]-DREQ_ACK[49]"
|
|
group.long 0x20E8++0x03
|
|
line.long 0x00 "DMA0_CMICIC50,DMA Controller Client Matrix Internal Client Interface Configuration Register 50"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[50]-DSTP_ACK[50]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[50]-DREQ_ACK[50]"
|
|
group.long 0x20EC++0x03
|
|
line.long 0x00 "DMA0_CMICIC51,DMA Controller Client Matrix Internal Client Interface Configuration Register 51"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[51]-DSTP_ACK[51]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[51]-DREQ_ACK[51]"
|
|
group.long 0x20F0++0x03
|
|
line.long 0x00 "DMA0_CMICIC52,DMA Controller Client Matrix Internal Client Interface Configuration Register 52"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[52]-DSTP_ACK[52]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[52]-DREQ_ACK[52]"
|
|
group.long 0x20F4++0x03
|
|
line.long 0x00 "DMA0_CMICIC53,DMA Controller Client Matrix Internal Client Interface Configuration Register 53"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[53]-DSTP_ACK[53]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[53]-DREQ_ACK[53]"
|
|
group.long 0x20F8++0x03
|
|
line.long 0x00 "DMA0_CMICIC54,DMA Controller Client Matrix Internal Client Interface Configuration Register 54"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[54]-DSTP_ACK[54]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[54]-DREQ_ACK[54]"
|
|
group.long 0x20FC++0x03
|
|
line.long 0x00 "DMA0_CMICIC55,DMA Controller Client Matrix Internal Client Interface Configuration Register 55"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[55]-DSTP_ACK[55]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[55]-DREQ_ACK[55]"
|
|
group.long 0x2100++0x03
|
|
line.long 0x00 "DMA0_CMICIC56,DMA Controller Client Matrix Internal Client Interface Configuration Register 56"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[56]-DSTP_ACK[56]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[56]-DREQ_ACK[56]"
|
|
group.long 0x2104++0x03
|
|
line.long 0x00 "DMA0_CMICIC57,DMA Controller Client Matrix Internal Client Interface Configuration Register 57"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[57]-DSTP_ACK[57]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[57]-DREQ_ACK[57]"
|
|
group.long 0x2108++0x03
|
|
line.long 0x00 "DMA0_CMICIC58,DMA Controller Client Matrix Internal Client Interface Configuration Register 58"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[58]-DSTP_ACK[58]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[58]-DREQ_ACK[58]"
|
|
group.long 0x210C++0x03
|
|
line.long 0x00 "DMA0_CMICIC59,DMA Controller Client Matrix Internal Client Interface Configuration Register 59"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[59]-DSTP_ACK[59]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[59]-DREQ_ACK[59]"
|
|
group.long 0x2110++0x03
|
|
line.long 0x00 "DMA0_CMICIC60,DMA Controller Client Matrix Internal Client Interface Configuration Register 60"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[60]-DSTP_ACK[60]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[60]-DREQ_ACK[60]"
|
|
group.long 0x2114++0x03
|
|
line.long 0x00 "DMA0_CMICIC61,DMA Controller Client Matrix Internal Client Interface Configuration Register 61"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[61]-DSTP_ACK[61]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[61]-DREQ_ACK[61]"
|
|
group.long 0x2118++0x03
|
|
line.long 0x00 "DMA0_CMICIC62,DMA Controller Client Matrix Internal Client Interface Configuration Register 62"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[62]-DSTP_ACK[62]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[62]-DREQ_ACK[62]"
|
|
group.long 0x211C++0x03
|
|
line.long 0x00 "DMA0_CMICIC63,DMA Controller Client Matrix Internal Client Interface Configuration Register 63"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[63]-DSTP_ACK[63]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[63]-DREQ_ACK[63]"
|
|
group.long 0x2120++0x03
|
|
line.long 0x00 "DMA0_CMICIC64,DMA Controller Client Matrix Internal Client Interface Configuration Register 64"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[64]-DSTP_ACK[64]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[64]-DREQ_ACK[64]"
|
|
group.long 0x2124++0x03
|
|
line.long 0x00 "DMA0_CMICIC65,DMA Controller Client Matrix Internal Client Interface Configuration Register 65"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[65]-DSTP_ACK[65]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[65]-DREQ_ACK[65]"
|
|
group.long 0x2128++0x03
|
|
line.long 0x00 "DMA0_CMICIC66,DMA Controller Client Matrix Internal Client Interface Configuration Register 66"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[66]-DSTP_ACK[66]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[66]-DREQ_ACK[66]"
|
|
group.long 0x212C++0x03
|
|
line.long 0x00 "DMA0_CMICIC67,DMA Controller Client Matrix Internal Client Interface Configuration Register 67"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[67]-DSTP_ACK[67]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[67]-DREQ_ACK[67]"
|
|
group.long 0x2130++0x03
|
|
line.long 0x00 "DMA0_CMICIC68,DMA Controller Client Matrix Internal Client Interface Configuration Register 68"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[68]-DSTP_ACK[68]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[68]-DREQ_ACK[68]"
|
|
group.long 0x2134++0x03
|
|
line.long 0x00 "DMA0_CMICIC69,DMA Controller Client Matrix Internal Client Interface Configuration Register 69"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[69]-DSTP_ACK[69]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[69]-DREQ_ACK[69]"
|
|
group.long 0x2138++0x03
|
|
line.long 0x00 "DMA0_CMICIC70,DMA Controller Client Matrix Internal Client Interface Configuration Register 70"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[70]-DSTP_ACK[70]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[70]-DREQ_ACK[70]"
|
|
group.long 0x213C++0x03
|
|
line.long 0x00 "DMA0_CMICIC71,DMA Controller Client Matrix Internal Client Interface Configuration Register 71"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[71]-DSTP_ACK[71]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[71]-DREQ_ACK[71]"
|
|
group.long 0x2140++0x03
|
|
line.long 0x00 "DMA0_CMICIC72,DMA Controller Client Matrix Internal Client Interface Configuration Register 72"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[72]-DSTP_ACK[72]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[72]-DREQ_ACK[72]"
|
|
group.long 0x2144++0x03
|
|
line.long 0x00 "DMA0_CMICIC73,DMA Controller Client Matrix Internal Client Interface Configuration Register 73"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[73]-DSTP_ACK[73]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[73]-DREQ_ACK[73]"
|
|
group.long 0x2148++0x03
|
|
line.long 0x00 "DMA0_CMICIC74,DMA Controller Client Matrix Internal Client Interface Configuration Register 74"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[74]-DSTP_ACK[74]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[74]-DREQ_ACK[74]"
|
|
group.long 0x214C++0x03
|
|
line.long 0x00 "DMA0_CMICIC75,DMA Controller Client Matrix Internal Client Interface Configuration Register 75"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[75]-DSTP_ACK[75]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[75]-DREQ_ACK[75]"
|
|
group.long 0x2150++0x03
|
|
line.long 0x00 "DMA0_CMICIC76,DMA Controller Client Matrix Internal Client Interface Configuration Register 76"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[76]-DSTP_ACK[76]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[76]-DREQ_ACK[76]"
|
|
group.long 0x2154++0x03
|
|
line.long 0x00 "DMA0_CMICIC77,DMA Controller Client Matrix Internal Client Interface Configuration Register 77"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[77]-DSTP_ACK[77]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[77]-DREQ_ACK[77]"
|
|
group.long 0x2158++0x03
|
|
line.long 0x00 "DMA0_CMICIC78,DMA Controller Client Matrix Internal Client Interface Configuration Register 78"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[78]-DSTP_ACK[78]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[78]-DREQ_ACK[78]"
|
|
group.long 0x215C++0x03
|
|
line.long 0x00 "DMA0_CMICIC79,DMA Controller Client Matrix Internal Client Interface Configuration Register 79"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[79]-DSTP_ACK[79]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[79]-DREQ_ACK[79]"
|
|
group.long 0x2160++0x03
|
|
line.long 0x00 "DMA0_CMICIC80,DMA Controller Client Matrix Internal Client Interface Configuration Register 80"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[80]-DSTP_ACK[80]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[80]-DREQ_ACK[80]"
|
|
group.long 0x2164++0x03
|
|
line.long 0x00 "DMA0_CMICIC81,DMA Controller Client Matrix Internal Client Interface Configuration Register 81"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[81]-DSTP_ACK[81]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[81]-DREQ_ACK[81]"
|
|
group.long 0x2168++0x03
|
|
line.long 0x00 "DMA0_CMICIC82,DMA Controller Client Matrix Internal Client Interface Configuration Register 82"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[82]-DSTP_ACK[82]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[82]-DREQ_ACK[82]"
|
|
group.long 0x216C++0x03
|
|
line.long 0x00 "DMA0_CMICIC83,DMA Controller Client Matrix Internal Client Interface Configuration Register 83"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[83]-DSTP_ACK[83]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[83]-DREQ_ACK[83]"
|
|
group.long 0x2170++0x03
|
|
line.long 0x00 "DMA0_CMICIC84,DMA Controller Client Matrix Internal Client Interface Configuration Register 84"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[84]-DSTP_ACK[84]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[84]-DREQ_ACK[84]"
|
|
group.long 0x2174++0x03
|
|
line.long 0x00 "DMA0_CMICIC85,DMA Controller Client Matrix Internal Client Interface Configuration Register 85"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[85]-DSTP_ACK[85]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[85]-DREQ_ACK[85]"
|
|
group.long 0x2178++0x03
|
|
line.long 0x00 "DMA0_CMICIC86,DMA Controller Client Matrix Internal Client Interface Configuration Register 86"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[86]-DSTP_ACK[86]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[86]-DREQ_ACK[86]"
|
|
group.long 0x217C++0x03
|
|
line.long 0x00 "DMA0_CMICIC87,DMA Controller Client Matrix Internal Client Interface Configuration Register 87"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[87]-DSTP_ACK[87]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[87]-DREQ_ACK[87]"
|
|
group.long 0x2180++0x03
|
|
line.long 0x00 "DMA0_CMICIC88,DMA Controller Client Matrix Internal Client Interface Configuration Register 88"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[88]-DSTP_ACK[88]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[88]-DREQ_ACK[88]"
|
|
group.long 0x2184++0x03
|
|
line.long 0x00 "DMA0_CMICIC89,DMA Controller Client Matrix Internal Client Interface Configuration Register 89"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[89]-DSTP_ACK[89]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[89]-DREQ_ACK[89]"
|
|
group.long 0x2188++0x03
|
|
line.long 0x00 "DMA0_CMICIC90,DMA Controller Client Matrix Internal Client Interface Configuration Register 90"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[90]-DSTP_ACK[90]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[90]-DREQ_ACK[90]"
|
|
group.long 0x218C++0x03
|
|
line.long 0x00 "DMA0_CMICIC91,DMA Controller Client Matrix Internal Client Interface Configuration Register 91"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[91]-DSTP_ACK[91]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[91]-DREQ_ACK[91]"
|
|
group.long 0x2190++0x03
|
|
line.long 0x00 "DMA0_CMICIC92,DMA Controller Client Matrix Internal Client Interface Configuration Register 92"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[92]-DSTP_ACK[92]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[92]-DREQ_ACK[92]"
|
|
group.long 0x2194++0x03
|
|
line.long 0x00 "DMA0_CMICIC93,DMA Controller Client Matrix Internal Client Interface Configuration Register 93"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[93]-DSTP_ACK[93]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[93]-DREQ_ACK[93]"
|
|
group.long 0x2198++0x03
|
|
line.long 0x00 "DMA0_CMICIC94,DMA Controller Client Matrix Internal Client Interface Configuration Register 94"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[94]-DSTP_ACK[94]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[94]-DREQ_ACK[94]"
|
|
group.long 0x219C++0x03
|
|
line.long 0x00 "DMA0_CMICIC95,DMA Controller Client Matrix Internal Client Interface Configuration Register 95"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[95]-DSTP_ACK[95]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[95]-DREQ_ACK[95]"
|
|
group.long 0x21A0++0x03
|
|
line.long 0x00 "DMA0_CMICIC96,DMA Controller Client Matrix Internal Client Interface Configuration Register 96"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[96]-DSTP_ACK[96]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[96]-DREQ_ACK[96]"
|
|
group.long 0x21A4++0x03
|
|
line.long 0x00 "DMA0_CMICIC97,DMA Controller Client Matrix Internal Client Interface Configuration Register 97"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[97]-DSTP_ACK[97]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[97]-DREQ_ACK[97]"
|
|
group.long 0x21A8++0x03
|
|
line.long 0x00 "DMA0_CMICIC98,DMA Controller Client Matrix Internal Client Interface Configuration Register 98"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[98]-DSTP_ACK[98]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[98]-DREQ_ACK[98]"
|
|
group.long 0x21AC++0x03
|
|
line.long 0x00 "DMA0_CMICIC99,DMA Controller Client Matrix Internal Client Interface Configuration Register 99"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[99]-DSTP_ACK[99]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[99]-DREQ_ACK[99]"
|
|
group.long 0x21B0++0x03
|
|
line.long 0x00 "DMA0_CMICIC100,DMA Controller Client Matrix Internal Client Interface Configuration Register 100"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[100]-DSTP_ACK[100]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[100]-DREQ_ACK[100]"
|
|
group.long 0x21B4++0x03
|
|
line.long 0x00 "DMA0_CMICIC101,DMA Controller Client Matrix Internal Client Interface Configuration Register 101"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[101]-DSTP_ACK[101]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[101]-DREQ_ACK[101]"
|
|
group.long 0x21B8++0x03
|
|
line.long 0x00 "DMA0_CMICIC102,DMA Controller Client Matrix Internal Client Interface Configuration Register 102"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[102]-DSTP_ACK[102]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[102]-DREQ_ACK[102]"
|
|
group.long 0x21BC++0x03
|
|
line.long 0x00 "DMA0_CMICIC103,DMA Controller Client Matrix Internal Client Interface Configuration Register 103"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[103]-DSTP_ACK[103]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[103]-DREQ_ACK[103]"
|
|
group.long 0x21C0++0x03
|
|
line.long 0x00 "DMA0_CMICIC104,DMA Controller Client Matrix Internal Client Interface Configuration Register 104"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[104]-DSTP_ACK[104]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[104]-DREQ_ACK[104]"
|
|
group.long 0x21C4++0x03
|
|
line.long 0x00 "DMA0_CMICIC105,DMA Controller Client Matrix Internal Client Interface Configuration Register 105"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[105]-DSTP_ACK[105]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[105]-DREQ_ACK[105]"
|
|
group.long 0x21C8++0x03
|
|
line.long 0x00 "DMA0_CMICIC106,DMA Controller Client Matrix Internal Client Interface Configuration Register 106"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[106]-DSTP_ACK[106]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[106]-DREQ_ACK[106]"
|
|
group.long 0x21CC++0x03
|
|
line.long 0x00 "DMA0_CMICIC107,DMA Controller Client Matrix Internal Client Interface Configuration Register 107"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[107]-DSTP_ACK[107]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[107]-DREQ_ACK[107]"
|
|
group.long 0x21D0++0x03
|
|
line.long 0x00 "DMA0_CMICIC108,DMA Controller Client Matrix Internal Client Interface Configuration Register 108"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[108]-DSTP_ACK[108]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[108]-DREQ_ACK[108]"
|
|
group.long 0x21D4++0x03
|
|
line.long 0x00 "DMA0_CMICIC109,DMA Controller Client Matrix Internal Client Interface Configuration Register 109"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[109]-DSTP_ACK[109]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[109]-DREQ_ACK[109]"
|
|
group.long 0x21D8++0x03
|
|
line.long 0x00 "DMA0_CMICIC110,DMA Controller Client Matrix Internal Client Interface Configuration Register 110"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[110]-DSTP_ACK[110]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[110]-DREQ_ACK[110]"
|
|
group.long 0x21DC++0x03
|
|
line.long 0x00 "DMA0_CMICIC111,DMA Controller Client Matrix Internal Client Interface Configuration Register 111"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[111]-DSTP_ACK[111]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[111]-DREQ_ACK[111]"
|
|
group.long 0x21E0++0x03
|
|
line.long 0x00 "DMA0_CMICIC112,DMA Controller Client Matrix Internal Client Interface Configuration Register 112"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[112]-DSTP_ACK[112]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[112]-DREQ_ACK[112]"
|
|
group.long 0x21E4++0x03
|
|
line.long 0x00 "DMA0_CMICIC113,DMA Controller Client Matrix Internal Client Interface Configuration Register 113"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[113]-DSTP_ACK[113]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[113]-DREQ_ACK[113]"
|
|
group.long 0x21E8++0x03
|
|
line.long 0x00 "DMA0_CMICIC114,DMA Controller Client Matrix Internal Client Interface Configuration Register 114"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[114]-DSTP_ACK[114]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[114]-DREQ_ACK[114]"
|
|
group.long 0x21EC++0x03
|
|
line.long 0x00 "DMA0_CMICIC115,DMA Controller Client Matrix Internal Client Interface Configuration Register 115"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[115]-DSTP_ACK[115]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[115]-DREQ_ACK[115]"
|
|
group.long 0x21F0++0x03
|
|
line.long 0x00 "DMA0_CMICIC116,DMA Controller Client Matrix Internal Client Interface Configuration Register 116"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[116]-DSTP_ACK[116]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[116]-DREQ_ACK[116]"
|
|
group.long 0x21F4++0x03
|
|
line.long 0x00 "DMA0_CMICIC117,DMA Controller Client Matrix Internal Client Interface Configuration Register 117"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[117]-DSTP_ACK[117]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[117]-DREQ_ACK[117]"
|
|
group.long 0x21F8++0x03
|
|
line.long 0x00 "DMA0_CMICIC118,DMA Controller Client Matrix Internal Client Interface Configuration Register 118"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[118]-DSTP_ACK[118]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[118]-DREQ_ACK[118]"
|
|
group.long 0x21FC++0x03
|
|
line.long 0x00 "DMA0_CMICIC119,DMA Controller Client Matrix Internal Client Interface Configuration Register 119"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[119]-DSTP_ACK[119]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[119]-DREQ_ACK[119]"
|
|
group.long 0x2200++0x03
|
|
line.long 0x00 "DMA0_CMICIC120,DMA Controller Client Matrix Internal Client Interface Configuration Register 120"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[120]-DSTP_ACK[120]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[120]-DREQ_ACK[120]"
|
|
group.long 0x2204++0x03
|
|
line.long 0x00 "DMA0_CMICIC121,DMA Controller Client Matrix Internal Client Interface Configuration Register 121"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[121]-DSTP_ACK[121]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[121]-DREQ_ACK[121]"
|
|
group.long 0x2208++0x03
|
|
line.long 0x00 "DMA0_CMICIC122,DMA Controller Client Matrix Internal Client Interface Configuration Register 122"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[122]-DSTP_ACK[122]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[122]-DREQ_ACK[122]"
|
|
group.long 0x220C++0x03
|
|
line.long 0x00 "DMA0_CMICIC123,DMA Controller Client Matrix Internal Client Interface Configuration Register 123"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[123]-DSTP_ACK[123]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[123]-DREQ_ACK[123]"
|
|
group.long 0x2210++0x03
|
|
line.long 0x00 "DMA0_CMICIC124,DMA Controller Client Matrix Internal Client Interface Configuration Register 124"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[124]-DSTP_ACK[124]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[124]-DREQ_ACK[124]"
|
|
group.long 0x2214++0x03
|
|
line.long 0x00 "DMA0_CMICIC125,DMA Controller Client Matrix Internal Client Interface Configuration Register 125"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[125]-DSTP_ACK[125]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[125]-DREQ_ACK[125]"
|
|
group.long 0x2218++0x03
|
|
line.long 0x00 "DMA0_CMICIC126,DMA Controller Client Matrix Internal Client Interface Configuration Register 126"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[126]-DSTP_ACK[126]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[126]-DREQ_ACK[126]"
|
|
group.long 0x221C++0x03
|
|
line.long 0x00 "DMA0_CMICIC127,DMA Controller Client Matrix Internal Client Interface Configuration Register 127"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[127]-DSTP_ACK[127]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[127]-DREQ_ACK[127]"
|
|
group.long 0x2220++0x03
|
|
line.long 0x00 "DMA0_CMICIC128,DMA Controller Client Matrix Internal Client Interface Configuration Register 128"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[128]-DSTP_ACK[128]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[128]-DREQ_ACK[128]"
|
|
group.long 0x2224++0x03
|
|
line.long 0x00 "DMA0_CMICIC129,DMA Controller Client Matrix Internal Client Interface Configuration Register 129"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[129]-DSTP_ACK[129]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[129]-DREQ_ACK[129]"
|
|
group.long 0x2228++0x03
|
|
line.long 0x00 "DMA0_CMICIC130,DMA Controller Client Matrix Internal Client Interface Configuration Register 130"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[130]-DSTP_ACK[130]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[130]-DREQ_ACK[130]"
|
|
group.long 0x222C++0x03
|
|
line.long 0x00 "DMA0_CMICIC131,DMA Controller Client Matrix Internal Client Interface Configuration Register 131"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[131]-DSTP_ACK[131]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[131]-DREQ_ACK[131]"
|
|
group.long 0x2230++0x03
|
|
line.long 0x00 "DMA0_CMICIC132,DMA Controller Client Matrix Internal Client Interface Configuration Register 132"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[132]-DSTP_ACK[132]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[132]-DREQ_ACK[132]"
|
|
group.long 0x2234++0x03
|
|
line.long 0x00 "DMA0_CMICIC133,DMA Controller Client Matrix Internal Client Interface Configuration Register 133"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[133]-DSTP_ACK[133]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[133]-DREQ_ACK[133]"
|
|
group.long 0x2238++0x03
|
|
line.long 0x00 "DMA0_CMICIC134,DMA Controller Client Matrix Internal Client Interface Configuration Register 134"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[134]-DSTP_ACK[134]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[134]-DREQ_ACK[134]"
|
|
group.long 0x223C++0x03
|
|
line.long 0x00 "DMA0_CMICIC135,DMA Controller Client Matrix Internal Client Interface Configuration Register 135"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[135]-DSTP_ACK[135]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[135]-DREQ_ACK[135]"
|
|
group.long 0x2240++0x03
|
|
line.long 0x00 "DMA0_CMICIC136,DMA Controller Client Matrix Internal Client Interface Configuration Register 136"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[136]-DSTP_ACK[136]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[136]-DREQ_ACK[136]"
|
|
group.long 0x2244++0x03
|
|
line.long 0x00 "DMA0_CMICIC137,DMA Controller Client Matrix Internal Client Interface Configuration Register 137"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[137]-DSTP_ACK[137]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[137]-DREQ_ACK[137]"
|
|
group.long 0x2248++0x03
|
|
line.long 0x00 "DMA0_CMICIC138,DMA Controller Client Matrix Internal Client Interface Configuration Register 138"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[138]-DSTP_ACK[138]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[138]-DREQ_ACK[138]"
|
|
group.long 0x224C++0x03
|
|
line.long 0x00 "DMA0_CMICIC139,DMA Controller Client Matrix Internal Client Interface Configuration Register 139"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[139]-DSTP_ACK[139]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[139]-DREQ_ACK[139]"
|
|
group.long 0x2250++0x03
|
|
line.long 0x00 "DMA0_CMICIC140,DMA Controller Client Matrix Internal Client Interface Configuration Register 140"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[140]-DSTP_ACK[140]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[140]-DREQ_ACK[140]"
|
|
group.long 0x2254++0x03
|
|
line.long 0x00 "DMA0_CMICIC141,DMA Controller Client Matrix Internal Client Interface Configuration Register 141"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[141]-DSTP_ACK[141]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[141]-DREQ_ACK[141]"
|
|
group.long 0x2258++0x03
|
|
line.long 0x00 "DMA0_CMICIC142,DMA Controller Client Matrix Internal Client Interface Configuration Register 142"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[142]-DSTP_ACK[142]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[142]-DREQ_ACK[142]"
|
|
group.long 0x225C++0x03
|
|
line.long 0x00 "DMA0_CMICIC143,DMA Controller Client Matrix Internal Client Interface Configuration Register 143"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[143]-DSTP_ACK[143]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[143]-DREQ_ACK[143]"
|
|
group.long 0x2260++0x03
|
|
line.long 0x00 "DMA0_CMICIC144,DMA Controller Client Matrix Internal Client Interface Configuration Register 144"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[144]-DSTP_ACK[144]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[144]-DREQ_ACK[144]"
|
|
group.long 0x2264++0x03
|
|
line.long 0x00 "DMA0_CMICIC145,DMA Controller Client Matrix Internal Client Interface Configuration Register 145"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[145]-DSTP_ACK[145]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[145]-DREQ_ACK[145]"
|
|
group.long 0x2268++0x03
|
|
line.long 0x00 "DMA0_CMICIC146,DMA Controller Client Matrix Internal Client Interface Configuration Register 146"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[146]-DSTP_ACK[146]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[146]-DREQ_ACK[146]"
|
|
group.long 0x226C++0x03
|
|
line.long 0x00 "DMA0_CMICIC147,DMA Controller Client Matrix Internal Client Interface Configuration Register 147"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[147]-DSTP_ACK[147]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[147]-DREQ_ACK[147]"
|
|
group.long 0x2270++0x03
|
|
line.long 0x00 "DMA0_CMICIC148,DMA Controller Client Matrix Internal Client Interface Configuration Register 148"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[148]-DSTP_ACK[148]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[148]-DREQ_ACK[148]"
|
|
group.long 0x2274++0x03
|
|
line.long 0x00 "DMA0_CMICIC149,DMA Controller Client Matrix Internal Client Interface Configuration Register 149"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[149]-DSTP_ACK[149]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[149]-DREQ_ACK[149]"
|
|
group.long 0x2278++0x03
|
|
line.long 0x00 "DMA0_CMICIC150,DMA Controller Client Matrix Internal Client Interface Configuration Register 150"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[150]-DSTP_ACK[150]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[150]-DREQ_ACK[150]"
|
|
group.long 0x227C++0x03
|
|
line.long 0x00 "DMA0_CMICIC151,DMA Controller Client Matrix Internal Client Interface Configuration Register 151"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[151]-DSTP_ACK[151]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[151]-DREQ_ACK[151]"
|
|
group.long 0x2280++0x03
|
|
line.long 0x00 "DMA0_CMICIC152,DMA Controller Client Matrix Internal Client Interface Configuration Register 152"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[152]-DSTP_ACK[152]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[152]-DREQ_ACK[152]"
|
|
group.long 0x2284++0x03
|
|
line.long 0x00 "DMA0_CMICIC153,DMA Controller Client Matrix Internal Client Interface Configuration Register 153"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[153]-DSTP_ACK[153]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[153]-DREQ_ACK[153]"
|
|
group.long 0x2288++0x03
|
|
line.long 0x00 "DMA0_CMICIC154,DMA Controller Client Matrix Internal Client Interface Configuration Register 154"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[154]-DSTP_ACK[154]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[154]-DREQ_ACK[154]"
|
|
group.long 0x228C++0x03
|
|
line.long 0x00 "DMA0_CMICIC155,DMA Controller Client Matrix Internal Client Interface Configuration Register 155"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[155]-DSTP_ACK[155]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[155]-DREQ_ACK[155]"
|
|
group.long 0x2290++0x03
|
|
line.long 0x00 "DMA0_CMICIC156,DMA Controller Client Matrix Internal Client Interface Configuration Register 156"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[156]-DSTP_ACK[156]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[156]-DREQ_ACK[156]"
|
|
group.long 0x2294++0x03
|
|
line.long 0x00 "DMA0_CMICIC157,DMA Controller Client Matrix Internal Client Interface Configuration Register 157"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[157]-DSTP_ACK[157]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[157]-DREQ_ACK[157]"
|
|
group.long 0x2298++0x03
|
|
line.long 0x00 "DMA0_CMICIC158,DMA Controller Client Matrix Internal Client Interface Configuration Register 158"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[158]-DSTP_ACK[158]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[158]-DREQ_ACK[158]"
|
|
group.long 0x229C++0x03
|
|
line.long 0x00 "DMA0_CMICIC159,DMA Controller Client Matrix Internal Client Interface Configuration Register 159"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[159]-DSTP_ACK[159]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[159]-DREQ_ACK[159]"
|
|
group.long 0x22A0++0x03
|
|
line.long 0x00 "DMA0_CMICIC160,DMA Controller Client Matrix Internal Client Interface Configuration Register 160"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[160]-DSTP_ACK[160]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[160]-DREQ_ACK[160]"
|
|
group.long 0x22A4++0x03
|
|
line.long 0x00 "DMA0_CMICIC161,DMA Controller Client Matrix Internal Client Interface Configuration Register 161"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[161]-DSTP_ACK[161]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[161]-DREQ_ACK[161]"
|
|
group.long 0x22A8++0x03
|
|
line.long 0x00 "DMA0_CMICIC162,DMA Controller Client Matrix Internal Client Interface Configuration Register 162"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[162]-DSTP_ACK[162]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[162]-DREQ_ACK[162]"
|
|
group.long 0x22AC++0x03
|
|
line.long 0x00 "DMA0_CMICIC163,DMA Controller Client Matrix Internal Client Interface Configuration Register 163"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[163]-DSTP_ACK[163]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[163]-DREQ_ACK[163]"
|
|
group.long 0x22B0++0x03
|
|
line.long 0x00 "DMA0_CMICIC164,DMA Controller Client Matrix Internal Client Interface Configuration Register 164"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[164]-DSTP_ACK[164]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[164]-DREQ_ACK[164]"
|
|
group.long 0x22B4++0x03
|
|
line.long 0x00 "DMA0_CMICIC165,DMA Controller Client Matrix Internal Client Interface Configuration Register 165"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[165]-DSTP_ACK[165]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[165]-DREQ_ACK[165]"
|
|
group.long 0x22B8++0x03
|
|
line.long 0x00 "DMA0_CMICIC166,DMA Controller Client Matrix Internal Client Interface Configuration Register 166"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[166]-DSTP_ACK[166]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[166]-DREQ_ACK[166]"
|
|
group.long 0x22BC++0x03
|
|
line.long 0x00 "DMA0_CMICIC167,DMA Controller Client Matrix Internal Client Interface Configuration Register 167"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[167]-DSTP_ACK[167]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[167]-DREQ_ACK[167]"
|
|
group.long 0x22C0++0x03
|
|
line.long 0x00 "DMA0_CMICIC168,DMA Controller Client Matrix Internal Client Interface Configuration Register 168"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[168]-DSTP_ACK[168]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[168]-DREQ_ACK[168]"
|
|
group.long 0x22C4++0x03
|
|
line.long 0x00 "DMA0_CMICIC169,DMA Controller Client Matrix Internal Client Interface Configuration Register 169"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[169]-DSTP_ACK[169]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[169]-DREQ_ACK[169]"
|
|
group.long 0x22C8++0x03
|
|
line.long 0x00 "DMA0_CMICIC170,DMA Controller Client Matrix Internal Client Interface Configuration Register 170"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[170]-DSTP_ACK[170]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[170]-DREQ_ACK[170]"
|
|
group.long 0x22CC++0x03
|
|
line.long 0x00 "DMA0_CMICIC171,DMA Controller Client Matrix Internal Client Interface Configuration Register 171"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[171]-DSTP_ACK[171]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[171]-DREQ_ACK[171]"
|
|
group.long 0x22D0++0x03
|
|
line.long 0x00 "DMA0_CMICIC172,DMA Controller Client Matrix Internal Client Interface Configuration Register 172"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[172]-DSTP_ACK[172]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[172]-DREQ_ACK[172]"
|
|
group.long 0x22D4++0x03
|
|
line.long 0x00 "DMA0_CMICIC173,DMA Controller Client Matrix Internal Client Interface Configuration Register 173"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[173]-DSTP_ACK[173]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[173]-DREQ_ACK[173]"
|
|
group.long 0x22D8++0x03
|
|
line.long 0x00 "DMA0_CMICIC174,DMA Controller Client Matrix Internal Client Interface Configuration Register 174"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[174]-DSTP_ACK[174]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[174]-DREQ_ACK[174]"
|
|
group.long 0x22DC++0x03
|
|
line.long 0x00 "DMA0_CMICIC175,DMA Controller Client Matrix Internal Client Interface Configuration Register 175"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[175]-DSTP_ACK[175]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[175]-DREQ_ACK[175]"
|
|
group.long 0x22E0++0x03
|
|
line.long 0x00 "DMA0_CMICIC176,DMA Controller Client Matrix Internal Client Interface Configuration Register 176"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[176]-DSTP_ACK[176]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[176]-DREQ_ACK[176]"
|
|
group.long 0x22E4++0x03
|
|
line.long 0x00 "DMA0_CMICIC177,DMA Controller Client Matrix Internal Client Interface Configuration Register 177"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[177]-DSTP_ACK[177]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[177]-DREQ_ACK[177]"
|
|
group.long 0x22E8++0x03
|
|
line.long 0x00 "DMA0_CMICIC178,DMA Controller Client Matrix Internal Client Interface Configuration Register 178"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[178]-DSTP_ACK[178]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[178]-DREQ_ACK[178]"
|
|
group.long 0x22EC++0x03
|
|
line.long 0x00 "DMA0_CMICIC179,DMA Controller Client Matrix Internal Client Interface Configuration Register 179"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[179]-DSTP_ACK[179]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[179]-DREQ_ACK[179]"
|
|
group.long 0x22F0++0x03
|
|
line.long 0x00 "DMA0_CMICIC180,DMA Controller Client Matrix Internal Client Interface Configuration Register 180"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[180]-DSTP_ACK[180]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[180]-DREQ_ACK[180]"
|
|
group.long 0x22F4++0x03
|
|
line.long 0x00 "DMA0_CMICIC181,DMA Controller Client Matrix Internal Client Interface Configuration Register 181"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[181]-DSTP_ACK[181]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[181]-DREQ_ACK[181]"
|
|
group.long 0x22F8++0x03
|
|
line.long 0x00 "DMA0_CMICIC182,DMA Controller Client Matrix Internal Client Interface Configuration Register 182"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[182]-DSTP_ACK[182]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[182]-DREQ_ACK[182]"
|
|
group.long 0x22FC++0x03
|
|
line.long 0x00 "DMA0_CMICIC183,DMA Controller Client Matrix Internal Client Interface Configuration Register 183"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[183]-DSTP_ACK[183]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[183]-DREQ_ACK[183]"
|
|
group.long 0x2300++0x03
|
|
line.long 0x00 "DMA0_CMICIC184,DMA Controller Client Matrix Internal Client Interface Configuration Register 184"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[184]-DSTP_ACK[184]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[184]-DREQ_ACK[184]"
|
|
group.long 0x2304++0x03
|
|
line.long 0x00 "DMA0_CMICIC185,DMA Controller Client Matrix Internal Client Interface Configuration Register 185"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[185]-DSTP_ACK[185]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[185]-DREQ_ACK[185]"
|
|
group.long 0x2308++0x03
|
|
line.long 0x00 "DMA0_CMICIC186,DMA Controller Client Matrix Internal Client Interface Configuration Register 186"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[186]-DSTP_ACK[186]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[186]-DREQ_ACK[186]"
|
|
group.long 0x230C++0x03
|
|
line.long 0x00 "DMA0_CMICIC187,DMA Controller Client Matrix Internal Client Interface Configuration Register 187"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[187]-DSTP_ACK[187]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[187]-DREQ_ACK[187]"
|
|
group.long 0x2310++0x03
|
|
line.long 0x00 "DMA0_CMICIC188,DMA Controller Client Matrix Internal Client Interface Configuration Register 188"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[188]-DSTP_ACK[188]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[188]-DREQ_ACK[188]"
|
|
group.long 0x2314++0x03
|
|
line.long 0x00 "DMA0_CMICIC189,DMA Controller Client Matrix Internal Client Interface Configuration Register 189"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[189]-DSTP_ACK[189]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[189]-DREQ_ACK[189]"
|
|
group.long 0x2318++0x03
|
|
line.long 0x00 "DMA0_CMICIC190,DMA Controller Client Matrix Internal Client Interface Configuration Register 190"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[190]-DSTP_ACK[190]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[190]-DREQ_ACK[190]"
|
|
group.long 0x231C++0x03
|
|
line.long 0x00 "DMA0_CMICIC191,DMA Controller Client Matrix Internal Client Interface Configuration Register 191"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[191]-DSTP_ACK[191]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[191]-DREQ_ACK[191]"
|
|
group.long 0x2320++0x03
|
|
line.long 0x00 "DMA0_CMICIC192,DMA Controller Client Matrix Internal Client Interface Configuration Register 192"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[192]-DSTP_ACK[192]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[192]-DREQ_ACK[192]"
|
|
group.long 0x2324++0x03
|
|
line.long 0x00 "DMA0_CMICIC193,DMA Controller Client Matrix Internal Client Interface Configuration Register 193"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[193]-DSTP_ACK[193]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[193]-DREQ_ACK[193]"
|
|
group.long 0x2328++0x03
|
|
line.long 0x00 "DMA0_CMICIC194,DMA Controller Client Matrix Internal Client Interface Configuration Register 194"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[194]-DSTP_ACK[194]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[194]-DREQ_ACK[194]"
|
|
group.long 0x232C++0x03
|
|
line.long 0x00 "DMA0_CMICIC195,DMA Controller Client Matrix Internal Client Interface Configuration Register 195"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[195]-DSTP_ACK[195]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[195]-DREQ_ACK[195]"
|
|
group.long 0x2330++0x03
|
|
line.long 0x00 "DMA0_CMICIC196,DMA Controller Client Matrix Internal Client Interface Configuration Register 196"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[196]-DSTP_ACK[196]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[196]-DREQ_ACK[196]"
|
|
group.long 0x2334++0x03
|
|
line.long 0x00 "DMA0_CMICIC197,DMA Controller Client Matrix Internal Client Interface Configuration Register 197"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[197]-DSTP_ACK[197]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[197]-DREQ_ACK[197]"
|
|
group.long 0x2338++0x03
|
|
line.long 0x00 "DMA0_CMICIC198,DMA Controller Client Matrix Internal Client Interface Configuration Register 198"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[198]-DSTP_ACK[198]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[198]-DREQ_ACK[198]"
|
|
group.long 0x233C++0x03
|
|
line.long 0x00 "DMA0_CMICIC199,DMA Controller Client Matrix Internal Client Interface Configuration Register 199"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[199]-DSTP_ACK[199]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[199]-DREQ_ACK[199]"
|
|
group.long 0x2340++0x03
|
|
line.long 0x00 "DMA0_CMICIC200,DMA Controller Client Matrix Internal Client Interface Configuration Register 200"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[200]-DSTP_ACK[200]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[200]-DREQ_ACK[200]"
|
|
group.long 0x2344++0x03
|
|
line.long 0x00 "DMA0_CMICIC201,DMA Controller Client Matrix Internal Client Interface Configuration Register 201"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[201]-DSTP_ACK[201]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[201]-DREQ_ACK[201]"
|
|
group.long 0x2348++0x03
|
|
line.long 0x00 "DMA0_CMICIC202,DMA Controller Client Matrix Internal Client Interface Configuration Register 202"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[202]-DSTP_ACK[202]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[202]-DREQ_ACK[202]"
|
|
group.long 0x234C++0x03
|
|
line.long 0x00 "DMA0_CMICIC203,DMA Controller Client Matrix Internal Client Interface Configuration Register 203"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[203]-DSTP_ACK[203]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[203]-DREQ_ACK[203]"
|
|
group.long 0x2350++0x03
|
|
line.long 0x00 "DMA0_CMICIC204,DMA Controller Client Matrix Internal Client Interface Configuration Register 204"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[204]-DSTP_ACK[204]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[204]-DREQ_ACK[204]"
|
|
group.long 0x2354++0x03
|
|
line.long 0x00 "DMA0_CMICIC205,DMA Controller Client Matrix Internal Client Interface Configuration Register 205"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[205]-DSTP_ACK[205]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[205]-DREQ_ACK[205]"
|
|
group.long 0x2358++0x03
|
|
line.long 0x00 "DMA0_CMICIC206,DMA Controller Client Matrix Internal Client Interface Configuration Register 206"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[206]-DSTP_ACK[206]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[206]-DREQ_ACK[206]"
|
|
group.long 0x235C++0x03
|
|
line.long 0x00 "DMA0_CMICIC207,DMA Controller Client Matrix Internal Client Interface Configuration Register 207"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[207]-DSTP_ACK[207]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[207]-DREQ_ACK[207]"
|
|
group.long 0x2360++0x03
|
|
line.long 0x00 "DMA0_CMICIC208,DMA Controller Client Matrix Internal Client Interface Configuration Register 208"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[208]-DSTP_ACK[208]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[208]-DREQ_ACK[208]"
|
|
group.long 0x2364++0x03
|
|
line.long 0x00 "DMA0_CMICIC209,DMA Controller Client Matrix Internal Client Interface Configuration Register 209"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[209]-DSTP_ACK[209]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[209]-DREQ_ACK[209]"
|
|
group.long 0x2368++0x03
|
|
line.long 0x00 "DMA0_CMICIC210,DMA Controller Client Matrix Internal Client Interface Configuration Register 210"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[210]-DSTP_ACK[210]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[210]-DREQ_ACK[210]"
|
|
group.long 0x236C++0x03
|
|
line.long 0x00 "DMA0_CMICIC211,DMA Controller Client Matrix Internal Client Interface Configuration Register 211"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[211]-DSTP_ACK[211]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[211]-DREQ_ACK[211]"
|
|
group.long 0x2370++0x03
|
|
line.long 0x00 "DMA0_CMICIC212,DMA Controller Client Matrix Internal Client Interface Configuration Register 212"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[212]-DSTP_ACK[212]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[212]-DREQ_ACK[212]"
|
|
group.long 0x2374++0x03
|
|
line.long 0x00 "DMA0_CMICIC213,DMA Controller Client Matrix Internal Client Interface Configuration Register 213"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[213]-DSTP_ACK[213]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[213]-DREQ_ACK[213]"
|
|
group.long 0x2378++0x03
|
|
line.long 0x00 "DMA0_CMICIC214,DMA Controller Client Matrix Internal Client Interface Configuration Register 214"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[214]-DSTP_ACK[214]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[214]-DREQ_ACK[214]"
|
|
group.long 0x237C++0x03
|
|
line.long 0x00 "DMA0_CMICIC215,DMA Controller Client Matrix Internal Client Interface Configuration Register 215"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[215]-DSTP_ACK[215]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[215]-DREQ_ACK[215]"
|
|
group.long 0x2380++0x03
|
|
line.long 0x00 "DMA0_CMICIC216,DMA Controller Client Matrix Internal Client Interface Configuration Register 216"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[216]-DSTP_ACK[216]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[216]-DREQ_ACK[216]"
|
|
group.long 0x2384++0x03
|
|
line.long 0x00 "DMA0_CMICIC217,DMA Controller Client Matrix Internal Client Interface Configuration Register 217"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[217]-DSTP_ACK[217]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[217]-DREQ_ACK[217]"
|
|
group.long 0x2388++0x03
|
|
line.long 0x00 "DMA0_CMICIC218,DMA Controller Client Matrix Internal Client Interface Configuration Register 218"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[218]-DSTP_ACK[218]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[218]-DREQ_ACK[218]"
|
|
group.long 0x238C++0x03
|
|
line.long 0x00 "DMA0_CMICIC219,DMA Controller Client Matrix Internal Client Interface Configuration Register 219"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[219]-DSTP_ACK[219]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[219]-DREQ_ACK[219]"
|
|
group.long 0x2390++0x03
|
|
line.long 0x00 "DMA0_CMICIC220,DMA Controller Client Matrix Internal Client Interface Configuration Register 220"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[220]-DSTP_ACK[220]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[220]-DREQ_ACK[220]"
|
|
group.long 0x2394++0x03
|
|
line.long 0x00 "DMA0_CMICIC221,DMA Controller Client Matrix Internal Client Interface Configuration Register 221"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[221]-DSTP_ACK[221]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[221]-DREQ_ACK[221]"
|
|
group.long 0x2398++0x03
|
|
line.long 0x00 "DMA0_CMICIC222,DMA Controller Client Matrix Internal Client Interface Configuration Register 222"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[222]-DSTP_ACK[222]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[222]-DREQ_ACK[222]"
|
|
group.long 0x239C++0x03
|
|
line.long 0x00 "DMA0_CMICIC223,DMA Controller Client Matrix Internal Client Interface Configuration Register 223"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[223]-DSTP_ACK[223]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[223]-DREQ_ACK[223]"
|
|
group.long 0x23A0++0x03
|
|
line.long 0x00 "DMA0_CMICIC224,DMA Controller Client Matrix Internal Client Interface Configuration Register 224"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[224]-DSTP_ACK[224]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[224]-DREQ_ACK[224]"
|
|
group.long 0x23A4++0x03
|
|
line.long 0x00 "DMA0_CMICIC225,DMA Controller Client Matrix Internal Client Interface Configuration Register 225"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[225]-DSTP_ACK[225]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[225]-DREQ_ACK[225]"
|
|
group.long 0x23A8++0x03
|
|
line.long 0x00 "DMA0_CMICIC226,DMA Controller Client Matrix Internal Client Interface Configuration Register 226"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[226]-DSTP_ACK[226]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[226]-DREQ_ACK[226]"
|
|
group.long 0x23AC++0x03
|
|
line.long 0x00 "DMA0_CMICIC227,DMA Controller Client Matrix Internal Client Interface Configuration Register 227"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[227]-DSTP_ACK[227]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[227]-DREQ_ACK[227]"
|
|
group.long 0x23B0++0x03
|
|
line.long 0x00 "DMA0_CMICIC228,DMA Controller Client Matrix Internal Client Interface Configuration Register 228"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[228]-DSTP_ACK[228]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[228]-DREQ_ACK[228]"
|
|
group.long 0x23B4++0x03
|
|
line.long 0x00 "DMA0_CMICIC229,DMA Controller Client Matrix Internal Client Interface Configuration Register 229"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[229]-DSTP_ACK[229]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[229]-DREQ_ACK[229]"
|
|
group.long 0x23B8++0x03
|
|
line.long 0x00 "DMA0_CMICIC230,DMA Controller Client Matrix Internal Client Interface Configuration Register 230"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[230]-DSTP_ACK[230]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[230]-DREQ_ACK[230]"
|
|
group.long 0x23BC++0x03
|
|
line.long 0x00 "DMA0_CMICIC231,DMA Controller Client Matrix Internal Client Interface Configuration Register 231"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[231]-DSTP_ACK[231]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[231]-DREQ_ACK[231]"
|
|
group.long 0x23C0++0x03
|
|
line.long 0x00 "DMA0_CMICIC232,DMA Controller Client Matrix Internal Client Interface Configuration Register 232"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[232]-DSTP_ACK[232]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[232]-DREQ_ACK[232]"
|
|
group.long 0x23C4++0x03
|
|
line.long 0x00 "DMA0_CMICIC233,DMA Controller Client Matrix Internal Client Interface Configuration Register 233"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[233]-DSTP_ACK[233]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[233]-DREQ_ACK[233]"
|
|
group.long 0x23C8++0x03
|
|
line.long 0x00 "DMA0_CMICIC234,DMA Controller Client Matrix Internal Client Interface Configuration Register 234"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[234]-DSTP_ACK[234]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[234]-DREQ_ACK[234]"
|
|
group.long 0x23CC++0x03
|
|
line.long 0x00 "DMA0_CMICIC235,DMA Controller Client Matrix Internal Client Interface Configuration Register 235"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[235]-DSTP_ACK[235]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[235]-DREQ_ACK[235]"
|
|
group.long 0x23D0++0x03
|
|
line.long 0x00 "DMA0_CMICIC236,DMA Controller Client Matrix Internal Client Interface Configuration Register 236"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[236]-DSTP_ACK[236]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[236]-DREQ_ACK[236]"
|
|
group.long 0x23D4++0x03
|
|
line.long 0x00 "DMA0_CMICIC237,DMA Controller Client Matrix Internal Client Interface Configuration Register 237"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[237]-DSTP_ACK[237]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[237]-DREQ_ACK[237]"
|
|
group.long 0x23D8++0x03
|
|
line.long 0x00 "DMA0_CMICIC238,DMA Controller Client Matrix Internal Client Interface Configuration Register 238"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[238]-DSTP_ACK[238]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[238]-DREQ_ACK[238]"
|
|
group.long 0x23DC++0x03
|
|
line.long 0x00 "DMA0_CMICIC239,DMA Controller Client Matrix Internal Client Interface Configuration Register 239"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[239]-DSTP_ACK[239]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[239]-DREQ_ACK[239]"
|
|
group.long 0x23E0++0x03
|
|
line.long 0x00 "DMA0_CMICIC240,DMA Controller Client Matrix Internal Client Interface Configuration Register 240"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[240]-DSTP_ACK[240]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[240]-DREQ_ACK[240]"
|
|
group.long 0x23E4++0x03
|
|
line.long 0x00 "DMA0_CMICIC241,DMA Controller Client Matrix Internal Client Interface Configuration Register 241"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[241]-DSTP_ACK[241]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[241]-DREQ_ACK[241]"
|
|
group.long 0x23E8++0x03
|
|
line.long 0x00 "DMA0_CMICIC242,DMA Controller Client Matrix Internal Client Interface Configuration Register 242"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[242]-DSTP_ACK[242]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[242]-DREQ_ACK[242]"
|
|
group.long 0x23EC++0x03
|
|
line.long 0x00 "DMA0_CMICIC243,DMA Controller Client Matrix Internal Client Interface Configuration Register 243"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[243]-DSTP_ACK[243]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[243]-DREQ_ACK[243]"
|
|
group.long 0x23F0++0x03
|
|
line.long 0x00 "DMA0_CMICIC244,DMA Controller Client Matrix Internal Client Interface Configuration Register 244"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[244]-DSTP_ACK[244]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[244]-DREQ_ACK[244]"
|
|
group.long 0x23F4++0x03
|
|
line.long 0x00 "DMA0_CMICIC245,DMA Controller Client Matrix Internal Client Interface Configuration Register 245"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[245]-DSTP_ACK[245]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[245]-DREQ_ACK[245]"
|
|
group.long 0x23F8++0x03
|
|
line.long 0x00 "DMA0_CMICIC246,DMA Controller Client Matrix Internal Client Interface Configuration Register 246"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[246]-DSTP_ACK[246]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[246]-DREQ_ACK[246]"
|
|
group.long 0x23FC++0x03
|
|
line.long 0x00 "DMA0_CMICIC247,DMA Controller Client Matrix Internal Client Interface Configuration Register 247"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[247]-DSTP_ACK[247]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[247]-DREQ_ACK[247]"
|
|
group.long 0x2400++0x03
|
|
line.long 0x00 "DMA0_CMICIC248,DMA Controller Client Matrix Internal Client Interface Configuration Register 248"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[248]-DSTP_ACK[248]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[248]-DREQ_ACK[248]"
|
|
group.long 0x2404++0x03
|
|
line.long 0x00 "DMA0_CMICIC249,DMA Controller Client Matrix Internal Client Interface Configuration Register 249"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[249]-DSTP_ACK[249]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[249]-DREQ_ACK[249]"
|
|
group.long 0x2408++0x03
|
|
line.long 0x00 "DMA0_CMICIC250,DMA Controller Client Matrix Internal Client Interface Configuration Register 250"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[250]-DSTP_ACK[250]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[250]-DREQ_ACK[250]"
|
|
group.long 0x240C++0x03
|
|
line.long 0x00 "DMA0_CMICIC251,DMA Controller Client Matrix Internal Client Interface Configuration Register 251"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[251]-DSTP_ACK[251]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[251]-DREQ_ACK[251]"
|
|
group.long 0x2410++0x03
|
|
line.long 0x00 "DMA0_CMICIC252,DMA Controller Client Matrix Internal Client Interface Configuration Register 252"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[252]-DSTP_ACK[252]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[252]-DREQ_ACK[252]"
|
|
group.long 0x2414++0x03
|
|
line.long 0x00 "DMA0_CMICIC253,DMA Controller Client Matrix Internal Client Interface Configuration Register 253"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[253]-DSTP_ACK[253]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[253]-DREQ_ACK[253]"
|
|
group.long 0x2418++0x03
|
|
line.long 0x00 "DMA0_CMICIC254,DMA Controller Client Matrix Internal Client Interface Configuration Register 254"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[254]-DSTP_ACK[254]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[254]-DREQ_ACK[254]"
|
|
group.long 0x241C++0x03
|
|
line.long 0x00 "DMA0_CMICIC255,DMA Controller Client Matrix Internal Client Interface Configuration Register 255"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[255]-DSTP_ACK[255]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[255]-DREQ_ACK[255]"
|
|
group.long 0x2420++0x03
|
|
line.long 0x00 "DMA0_CMICIC256,DMA Controller Client Matrix Internal Client Interface Configuration Register 256"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[256]-DSTP_ACK[256]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[256]-DREQ_ACK[256]"
|
|
group.long 0x2424++0x03
|
|
line.long 0x00 "DMA0_CMICIC257,DMA Controller Client Matrix Internal Client Interface Configuration Register 257"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[257]-DSTP_ACK[257]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[257]-DREQ_ACK[257]"
|
|
group.long 0x2428++0x03
|
|
line.long 0x00 "DMA0_CMICIC258,DMA Controller Client Matrix Internal Client Interface Configuration Register 258"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[258]-DSTP_ACK[258]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[258]-DREQ_ACK[258]"
|
|
group.long 0x242C++0x03
|
|
line.long 0x00 "DMA0_CMICIC259,DMA Controller Client Matrix Internal Client Interface Configuration Register 259"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[259]-DSTP_ACK[259]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[259]-DREQ_ACK[259]"
|
|
group.long 0x2430++0x03
|
|
line.long 0x00 "DMA0_CMICIC260,DMA Controller Client Matrix Internal Client Interface Configuration Register 260"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[260]-DSTP_ACK[260]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[260]-DREQ_ACK[260]"
|
|
group.long 0x2434++0x03
|
|
line.long 0x00 "DMA0_CMICIC261,DMA Controller Client Matrix Internal Client Interface Configuration Register 261"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[261]-DSTP_ACK[261]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[261]-DREQ_ACK[261]"
|
|
group.long 0x2438++0x03
|
|
line.long 0x00 "DMA0_CMICIC262,DMA Controller Client Matrix Internal Client Interface Configuration Register 262"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[262]-DSTP_ACK[262]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[262]-DREQ_ACK[262]"
|
|
group.long 0x243C++0x03
|
|
line.long 0x00 "DMA0_CMICIC263,DMA Controller Client Matrix Internal Client Interface Configuration Register 263"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[263]-DSTP_ACK[263]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[263]-DREQ_ACK[263]"
|
|
group.long 0x2440++0x03
|
|
line.long 0x00 "DMA0_CMICIC264,DMA Controller Client Matrix Internal Client Interface Configuration Register 264"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[264]-DSTP_ACK[264]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[264]-DREQ_ACK[264]"
|
|
group.long 0x2444++0x03
|
|
line.long 0x00 "DMA0_CMICIC265,DMA Controller Client Matrix Internal Client Interface Configuration Register 265"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[265]-DSTP_ACK[265]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[265]-DREQ_ACK[265]"
|
|
group.long 0x2448++0x03
|
|
line.long 0x00 "DMA0_CMICIC266,DMA Controller Client Matrix Internal Client Interface Configuration Register 266"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[266]-DSTP_ACK[266]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[266]-DREQ_ACK[266]"
|
|
group.long 0x244C++0x03
|
|
line.long 0x00 "DMA0_CMICIC267,DMA Controller Client Matrix Internal Client Interface Configuration Register 267"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[267]-DSTP_ACK[267]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[267]-DREQ_ACK[267]"
|
|
group.long 0x2450++0x03
|
|
line.long 0x00 "DMA0_CMICIC268,DMA Controller Client Matrix Internal Client Interface Configuration Register 268"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[268]-DSTP_ACK[268]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[268]-DREQ_ACK[268]"
|
|
group.long 0x2454++0x03
|
|
line.long 0x00 "DMA0_CMICIC269,DMA Controller Client Matrix Internal Client Interface Configuration Register 269"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[269]-DSTP_ACK[269]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[269]-DREQ_ACK[269]"
|
|
group.long 0x2458++0x03
|
|
line.long 0x00 "DMA0_CMICIC270,DMA Controller Client Matrix Internal Client Interface Configuration Register 270"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[270]-DSTP_ACK[270]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[270]-DREQ_ACK[270]"
|
|
group.long 0x245C++0x03
|
|
line.long 0x00 "DMA0_CMICIC271,DMA Controller Client Matrix Internal Client Interface Configuration Register 271"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[271]-DSTP_ACK[271]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[271]-DREQ_ACK[271]"
|
|
group.long 0x2460++0x03
|
|
line.long 0x00 "DMA0_CMICIC272,DMA Controller Client Matrix Internal Client Interface Configuration Register 272"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[272]-DSTP_ACK[272]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[272]-DREQ_ACK[272]"
|
|
group.long 0x2464++0x03
|
|
line.long 0x00 "DMA0_CMICIC273,DMA Controller Client Matrix Internal Client Interface Configuration Register 273"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[273]-DSTP_ACK[273]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[273]-DREQ_ACK[273]"
|
|
group.long 0x2468++0x03
|
|
line.long 0x00 "DMA0_CMICIC274,DMA Controller Client Matrix Internal Client Interface Configuration Register 274"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[274]-DSTP_ACK[274]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[274]-DREQ_ACK[274]"
|
|
group.long 0x246C++0x03
|
|
line.long 0x00 "DMA0_CMICIC275,DMA Controller Client Matrix Internal Client Interface Configuration Register 275"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[275]-DSTP_ACK[275]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[275]-DREQ_ACK[275]"
|
|
group.long 0x2470++0x03
|
|
line.long 0x00 "DMA0_CMICIC276,DMA Controller Client Matrix Internal Client Interface Configuration Register 276"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[276]-DSTP_ACK[276]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[276]-DREQ_ACK[276]"
|
|
group.long 0x2474++0x03
|
|
line.long 0x00 "DMA0_CMICIC277,DMA Controller Client Matrix Internal Client Interface Configuration Register 277"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[277]-DSTP_ACK[277]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[277]-DREQ_ACK[277]"
|
|
group.long 0x2478++0x03
|
|
line.long 0x00 "DMA0_CMICIC278,DMA Controller Client Matrix Internal Client Interface Configuration Register 278"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[278]-DSTP_ACK[278]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[278]-DREQ_ACK[278]"
|
|
group.long 0x247C++0x03
|
|
line.long 0x00 "DMA0_CMICIC279,DMA Controller Client Matrix Internal Client Interface Configuration Register 279"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[279]-DSTP_ACK[279]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[279]-DREQ_ACK[279]"
|
|
group.long 0x2480++0x03
|
|
line.long 0x00 "DMA0_CMICIC280,DMA Controller Client Matrix Internal Client Interface Configuration Register 280"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[280]-DSTP_ACK[280]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[280]-DREQ_ACK[280]"
|
|
group.long 0x2484++0x03
|
|
line.long 0x00 "DMA0_CMICIC281,DMA Controller Client Matrix Internal Client Interface Configuration Register 281"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[281]-DSTP_ACK[281]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[281]-DREQ_ACK[281]"
|
|
group.long 0x2488++0x03
|
|
line.long 0x00 "DMA0_CMICIC282,DMA Controller Client Matrix Internal Client Interface Configuration Register 282"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[282]-DSTP_ACK[282]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[282]-DREQ_ACK[282]"
|
|
group.long 0x248C++0x03
|
|
line.long 0x00 "DMA0_CMICIC283,DMA Controller Client Matrix Internal Client Interface Configuration Register 283"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[283]-DSTP_ACK[283]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[283]-DREQ_ACK[283]"
|
|
group.long 0x2490++0x03
|
|
line.long 0x00 "DMA0_CMICIC284,DMA Controller Client Matrix Internal Client Interface Configuration Register 284"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[284]-DSTP_ACK[284]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[284]-DREQ_ACK[284]"
|
|
group.long 0x2494++0x03
|
|
line.long 0x00 "DMA0_CMICIC285,DMA Controller Client Matrix Internal Client Interface Configuration Register 285"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[285]-DSTP_ACK[285]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[285]-DREQ_ACK[285]"
|
|
group.long 0x2498++0x03
|
|
line.long 0x00 "DMA0_CMICIC286,DMA Controller Client Matrix Internal Client Interface Configuration Register 286"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[286]-DSTP_ACK[286]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[286]-DREQ_ACK[286]"
|
|
group.long 0x249C++0x03
|
|
line.long 0x00 "DMA0_CMICIC287,DMA Controller Client Matrix Internal Client Interface Configuration Register 287"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[287]-DSTP_ACK[287]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[287]-DREQ_ACK[287]"
|
|
group.long 0x24A0++0x03
|
|
line.long 0x00 "DMA0_CMICIC288,DMA Controller Client Matrix Internal Client Interface Configuration Register 288"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[288]-DSTP_ACK[288]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[288]-DREQ_ACK[288]"
|
|
group.long 0x24A4++0x03
|
|
line.long 0x00 "DMA0_CMICIC289,DMA Controller Client Matrix Internal Client Interface Configuration Register 289"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[289]-DSTP_ACK[289]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[289]-DREQ_ACK[289]"
|
|
group.long 0x24A8++0x03
|
|
line.long 0x00 "DMA0_CMICIC290,DMA Controller Client Matrix Internal Client Interface Configuration Register 290"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[290]-DSTP_ACK[290]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[290]-DREQ_ACK[290]"
|
|
group.long 0x24AC++0x03
|
|
line.long 0x00 "DMA0_CMICIC291,DMA Controller Client Matrix Internal Client Interface Configuration Register 291"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[291]-DSTP_ACK[291]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[291]-DREQ_ACK[291]"
|
|
group.long 0x24B0++0x03
|
|
line.long 0x00 "DMA0_CMICIC292,DMA Controller Client Matrix Internal Client Interface Configuration Register 292"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[292]-DSTP_ACK[292]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[292]-DREQ_ACK[292]"
|
|
group.long 0x24B4++0x03
|
|
line.long 0x00 "DMA0_CMICIC293,DMA Controller Client Matrix Internal Client Interface Configuration Register 293"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[293]-DSTP_ACK[293]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[293]-DREQ_ACK[293]"
|
|
group.long 0x24B8++0x03
|
|
line.long 0x00 "DMA0_CMICIC294,DMA Controller Client Matrix Internal Client Interface Configuration Register 294"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[294]-DSTP_ACK[294]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[294]-DREQ_ACK[294]"
|
|
group.long 0x24BC++0x03
|
|
line.long 0x00 "DMA0_CMICIC295,DMA Controller Client Matrix Internal Client Interface Configuration Register 295"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[295]-DSTP_ACK[295]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[295]-DREQ_ACK[295]"
|
|
group.long 0x24C0++0x03
|
|
line.long 0x00 "DMA0_CMICIC296,DMA Controller Client Matrix Internal Client Interface Configuration Register 296"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[296]-DSTP_ACK[296]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[296]-DREQ_ACK[296]"
|
|
group.long 0x24C4++0x03
|
|
line.long 0x00 "DMA0_CMICIC297,DMA Controller Client Matrix Internal Client Interface Configuration Register 297"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[297]-DSTP_ACK[297]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[297]-DREQ_ACK[297]"
|
|
group.long 0x24C8++0x03
|
|
line.long 0x00 "DMA0_CMICIC298,DMA Controller Client Matrix Internal Client Interface Configuration Register 298"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[298]-DSTP_ACK[298]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[298]-DREQ_ACK[298]"
|
|
group.long 0x24CC++0x03
|
|
line.long 0x00 "DMA0_CMICIC299,DMA Controller Client Matrix Internal Client Interface Configuration Register 299"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[299]-DSTP_ACK[299]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[299]-DREQ_ACK[299]"
|
|
group.long 0x24D0++0x03
|
|
line.long 0x00 "DMA0_CMICIC300,DMA Controller Client Matrix Internal Client Interface Configuration Register 300"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[300]-DSTP_ACK[300]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[300]-DREQ_ACK[300]"
|
|
group.long 0x24D4++0x03
|
|
line.long 0x00 "DMA0_CMICIC301,DMA Controller Client Matrix Internal Client Interface Configuration Register 301"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[301]-DSTP_ACK[301]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[301]-DREQ_ACK[301]"
|
|
group.long 0x24D8++0x03
|
|
line.long 0x00 "DMA0_CMICIC302,DMA Controller Client Matrix Internal Client Interface Configuration Register 302"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[302]-DSTP_ACK[302]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[302]-DREQ_ACK[302]"
|
|
group.long 0x24DC++0x03
|
|
line.long 0x00 "DMA0_CMICIC303,DMA Controller Client Matrix Internal Client Interface Configuration Register 303"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[303]-DSTP_ACK[303]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[303]-DREQ_ACK[303]"
|
|
group.long 0x24E0++0x03
|
|
line.long 0x00 "DMA0_CMICIC304,DMA Controller Client Matrix Internal Client Interface Configuration Register 304"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[304]-DSTP_ACK[304]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[304]-DREQ_ACK[304]"
|
|
group.long 0x24E4++0x03
|
|
line.long 0x00 "DMA0_CMICIC305,DMA Controller Client Matrix Internal Client Interface Configuration Register 305"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[305]-DSTP_ACK[305]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[305]-DREQ_ACK[305]"
|
|
group.long 0x24E8++0x03
|
|
line.long 0x00 "DMA0_CMICIC306,DMA Controller Client Matrix Internal Client Interface Configuration Register 306"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[306]-DSTP_ACK[306]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[306]-DREQ_ACK[306]"
|
|
group.long 0x24EC++0x03
|
|
line.long 0x00 "DMA0_CMICIC307,DMA Controller Client Matrix Internal Client Interface Configuration Register 307"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[307]-DSTP_ACK[307]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[307]-DREQ_ACK[307]"
|
|
group.long 0x24F0++0x03
|
|
line.long 0x00 "DMA0_CMICIC308,DMA Controller Client Matrix Internal Client Interface Configuration Register 308"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[308]-DSTP_ACK[308]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[308]-DREQ_ACK[308]"
|
|
group.long 0x24F4++0x03
|
|
line.long 0x00 "DMA0_CMICIC309,DMA Controller Client Matrix Internal Client Interface Configuration Register 309"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[309]-DSTP_ACK[309]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[309]-DREQ_ACK[309]"
|
|
group.long 0x24F8++0x03
|
|
line.long 0x00 "DMA0_CMICIC310,DMA Controller Client Matrix Internal Client Interface Configuration Register 310"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[310]-DSTP_ACK[310]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[310]-DREQ_ACK[310]"
|
|
group.long 0x24FC++0x03
|
|
line.long 0x00 "DMA0_CMICIC311,DMA Controller Client Matrix Internal Client Interface Configuration Register 311"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[311]-DSTP_ACK[311]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[311]-DREQ_ACK[311]"
|
|
group.long 0x2500++0x03
|
|
line.long 0x00 "DMA0_CMICIC312,DMA Controller Client Matrix Internal Client Interface Configuration Register 312"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[312]-DSTP_ACK[312]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[312]-DREQ_ACK[312]"
|
|
group.long 0x2504++0x03
|
|
line.long 0x00 "DMA0_CMICIC313,DMA Controller Client Matrix Internal Client Interface Configuration Register 313"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[313]-DSTP_ACK[313]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[313]-DREQ_ACK[313]"
|
|
group.long 0x2508++0x03
|
|
line.long 0x00 "DMA0_CMICIC314,DMA Controller Client Matrix Internal Client Interface Configuration Register 314"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[314]-DSTP_ACK[314]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[314]-DREQ_ACK[314]"
|
|
group.long 0x250C++0x03
|
|
line.long 0x00 "DMA0_CMICIC315,DMA Controller Client Matrix Internal Client Interface Configuration Register 315"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[315]-DSTP_ACK[315]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[315]-DREQ_ACK[315]"
|
|
group.long 0x2510++0x03
|
|
line.long 0x00 "DMA0_CMICIC316,DMA Controller Client Matrix Internal Client Interface Configuration Register 316"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[316]-DSTP_ACK[316]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[316]-DREQ_ACK[316]"
|
|
group.long 0x2514++0x03
|
|
line.long 0x00 "DMA0_CMICIC317,DMA Controller Client Matrix Internal Client Interface Configuration Register 317"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[317]-DSTP_ACK[317]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[317]-DREQ_ACK[317]"
|
|
group.long 0x2518++0x03
|
|
line.long 0x00 "DMA0_CMICIC318,DMA Controller Client Matrix Internal Client Interface Configuration Register 318"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[318]-DSTP_ACK[318]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[318]-DREQ_ACK[318]"
|
|
group.long 0x251C++0x03
|
|
line.long 0x00 "DMA0_CMICIC319,DMA Controller Client Matrix Internal Client Interface Configuration Register 319"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[319]-DSTP_ACK[319]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[319]-DREQ_ACK[319]"
|
|
group.long 0x2520++0x03
|
|
line.long 0x00 "DMA0_CMICIC320,DMA Controller Client Matrix Internal Client Interface Configuration Register 320"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[320]-DSTP_ACK[320]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[320]-DREQ_ACK[320]"
|
|
group.long 0x2524++0x03
|
|
line.long 0x00 "DMA0_CMICIC321,DMA Controller Client Matrix Internal Client Interface Configuration Register 321"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[321]-DSTP_ACK[321]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[321]-DREQ_ACK[321]"
|
|
group.long 0x2528++0x03
|
|
line.long 0x00 "DMA0_CMICIC322,DMA Controller Client Matrix Internal Client Interface Configuration Register 322"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[322]-DSTP_ACK[322]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[322]-DREQ_ACK[322]"
|
|
group.long 0x252C++0x03
|
|
line.long 0x00 "DMA0_CMICIC323,DMA Controller Client Matrix Internal Client Interface Configuration Register 323"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[323]-DSTP_ACK[323]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[323]-DREQ_ACK[323]"
|
|
group.long 0x2530++0x03
|
|
line.long 0x00 "DMA0_CMICIC324,DMA Controller Client Matrix Internal Client Interface Configuration Register 324"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[324]-DSTP_ACK[324]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[324]-DREQ_ACK[324]"
|
|
group.long 0x2534++0x03
|
|
line.long 0x00 "DMA0_CMICIC325,DMA Controller Client Matrix Internal Client Interface Configuration Register 325"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[325]-DSTP_ACK[325]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[325]-DREQ_ACK[325]"
|
|
group.long 0x2538++0x03
|
|
line.long 0x00 "DMA0_CMICIC326,DMA Controller Client Matrix Internal Client Interface Configuration Register 326"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[326]-DSTP_ACK[326]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[326]-DREQ_ACK[326]"
|
|
group.long 0x253C++0x03
|
|
line.long 0x00 "DMA0_CMICIC327,DMA Controller Client Matrix Internal Client Interface Configuration Register 327"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[327]-DSTP_ACK[327]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[327]-DREQ_ACK[327]"
|
|
group.long 0x2540++0x03
|
|
line.long 0x00 "DMA0_CMICIC328,DMA Controller Client Matrix Internal Client Interface Configuration Register 328"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[328]-DSTP_ACK[328]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[328]-DREQ_ACK[328]"
|
|
group.long 0x2544++0x03
|
|
line.long 0x00 "DMA0_CMICIC329,DMA Controller Client Matrix Internal Client Interface Configuration Register 329"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[329]-DSTP_ACK[329]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[329]-DREQ_ACK[329]"
|
|
group.long 0x2548++0x03
|
|
line.long 0x00 "DMA0_CMICIC330,DMA Controller Client Matrix Internal Client Interface Configuration Register 330"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[330]-DSTP_ACK[330]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[330]-DREQ_ACK[330]"
|
|
group.long 0x254C++0x03
|
|
line.long 0x00 "DMA0_CMICIC331,DMA Controller Client Matrix Internal Client Interface Configuration Register 331"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[331]-DSTP_ACK[331]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[331]-DREQ_ACK[331]"
|
|
group.long 0x2550++0x03
|
|
line.long 0x00 "DMA0_CMICIC332,DMA Controller Client Matrix Internal Client Interface Configuration Register 332"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[332]-DSTP_ACK[332]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[332]-DREQ_ACK[332]"
|
|
group.long 0x2554++0x03
|
|
line.long 0x00 "DMA0_CMICIC333,DMA Controller Client Matrix Internal Client Interface Configuration Register 333"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[333]-DSTP_ACK[333]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[333]-DREQ_ACK[333]"
|
|
group.long 0x2558++0x03
|
|
line.long 0x00 "DMA0_CMICIC334,DMA Controller Client Matrix Internal Client Interface Configuration Register 334"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[334]-DSTP_ACK[334]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[334]-DREQ_ACK[334]"
|
|
group.long 0x255C++0x03
|
|
line.long 0x00 "DMA0_CMICIC335,DMA Controller Client Matrix Internal Client Interface Configuration Register 335"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[335]-DSTP_ACK[335]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[335]-DREQ_ACK[335]"
|
|
group.long 0x2560++0x03
|
|
line.long 0x00 "DMA0_CMICIC336,DMA Controller Client Matrix Internal Client Interface Configuration Register 336"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[336]-DSTP_ACK[336]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[336]-DREQ_ACK[336]"
|
|
group.long 0x2564++0x03
|
|
line.long 0x00 "DMA0_CMICIC337,DMA Controller Client Matrix Internal Client Interface Configuration Register 337"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[337]-DSTP_ACK[337]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[337]-DREQ_ACK[337]"
|
|
group.long 0x2568++0x03
|
|
line.long 0x00 "DMA0_CMICIC338,DMA Controller Client Matrix Internal Client Interface Configuration Register 338"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[338]-DSTP_ACK[338]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[338]-DREQ_ACK[338]"
|
|
group.long 0x256C++0x03
|
|
line.long 0x00 "DMA0_CMICIC339,DMA Controller Client Matrix Internal Client Interface Configuration Register 339"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[339]-DSTP_ACK[339]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[339]-DREQ_ACK[339]"
|
|
group.long 0x2570++0x03
|
|
line.long 0x00 "DMA0_CMICIC340,DMA Controller Client Matrix Internal Client Interface Configuration Register 340"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[340]-DSTP_ACK[340]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[340]-DREQ_ACK[340]"
|
|
group.long 0x2574++0x03
|
|
line.long 0x00 "DMA0_CMICIC341,DMA Controller Client Matrix Internal Client Interface Configuration Register 341"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[341]-DSTP_ACK[341]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[341]-DREQ_ACK[341]"
|
|
group.long 0x2578++0x03
|
|
line.long 0x00 "DMA0_CMICIC342,DMA Controller Client Matrix Internal Client Interface Configuration Register 342"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[342]-DSTP_ACK[342]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[342]-DREQ_ACK[342]"
|
|
group.long 0x257C++0x03
|
|
line.long 0x00 "DMA0_CMICIC343,DMA Controller Client Matrix Internal Client Interface Configuration Register 343"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[343]-DSTP_ACK[343]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[343]-DREQ_ACK[343]"
|
|
group.long 0x2580++0x03
|
|
line.long 0x00 "DMA0_CMICIC344,DMA Controller Client Matrix Internal Client Interface Configuration Register 344"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[344]-DSTP_ACK[344]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[344]-DREQ_ACK[344]"
|
|
group.long 0x2584++0x03
|
|
line.long 0x00 "DMA0_CMICIC345,DMA Controller Client Matrix Internal Client Interface Configuration Register 345"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[345]-DSTP_ACK[345]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[345]-DREQ_ACK[345]"
|
|
group.long 0x2588++0x03
|
|
line.long 0x00 "DMA0_CMICIC346,DMA Controller Client Matrix Internal Client Interface Configuration Register 346"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[346]-DSTP_ACK[346]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[346]-DREQ_ACK[346]"
|
|
group.long 0x258C++0x03
|
|
line.long 0x00 "DMA0_CMICIC347,DMA Controller Client Matrix Internal Client Interface Configuration Register 347"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[347]-DSTP_ACK[347]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[347]-DREQ_ACK[347]"
|
|
group.long 0x2590++0x03
|
|
line.long 0x00 "DMA0_CMICIC348,DMA Controller Client Matrix Internal Client Interface Configuration Register 348"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[348]-DSTP_ACK[348]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[348]-DREQ_ACK[348]"
|
|
group.long 0x2594++0x03
|
|
line.long 0x00 "DMA0_CMICIC349,DMA Controller Client Matrix Internal Client Interface Configuration Register 349"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[349]-DSTP_ACK[349]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[349]-DREQ_ACK[349]"
|
|
group.long 0x2598++0x03
|
|
line.long 0x00 "DMA0_CMICIC350,DMA Controller Client Matrix Internal Client Interface Configuration Register 350"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[350]-DSTP_ACK[350]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[350]-DREQ_ACK[350]"
|
|
group.long 0x259C++0x03
|
|
line.long 0x00 "DMA0_CMICIC351,DMA Controller Client Matrix Internal Client Interface Configuration Register 351"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[351]-DSTP_ACK[351]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[351]-DREQ_ACK[351]"
|
|
group.long 0x25A0++0x03
|
|
line.long 0x00 "DMA0_CMICIC352,DMA Controller Client Matrix Internal Client Interface Configuration Register 352"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[352]-DSTP_ACK[352]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[352]-DREQ_ACK[352]"
|
|
group.long 0x25A4++0x03
|
|
line.long 0x00 "DMA0_CMICIC353,DMA Controller Client Matrix Internal Client Interface Configuration Register 353"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[353]-DSTP_ACK[353]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[353]-DREQ_ACK[353]"
|
|
group.long 0x25A8++0x03
|
|
line.long 0x00 "DMA0_CMICIC354,DMA Controller Client Matrix Internal Client Interface Configuration Register 354"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[354]-DSTP_ACK[354]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[354]-DREQ_ACK[354]"
|
|
group.long 0x25AC++0x03
|
|
line.long 0x00 "DMA0_CMICIC355,DMA Controller Client Matrix Internal Client Interface Configuration Register 355"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[355]-DSTP_ACK[355]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[355]-DREQ_ACK[355]"
|
|
group.long 0x25B0++0x03
|
|
line.long 0x00 "DMA0_CMICIC356,DMA Controller Client Matrix Internal Client Interface Configuration Register 356"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[356]-DSTP_ACK[356]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[356]-DREQ_ACK[356]"
|
|
group.long 0x25B4++0x03
|
|
line.long 0x00 "DMA0_CMICIC357,DMA Controller Client Matrix Internal Client Interface Configuration Register 357"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[357]-DSTP_ACK[357]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[357]-DREQ_ACK[357]"
|
|
group.long 0x25B8++0x03
|
|
line.long 0x00 "DMA0_CMICIC358,DMA Controller Client Matrix Internal Client Interface Configuration Register 358"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[358]-DSTP_ACK[358]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[358]-DREQ_ACK[358]"
|
|
group.long 0x25BC++0x03
|
|
line.long 0x00 "DMA0_CMICIC359,DMA Controller Client Matrix Internal Client Interface Configuration Register 359"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[359]-DSTP_ACK[359]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[359]-DREQ_ACK[359]"
|
|
group.long 0x25C0++0x03
|
|
line.long 0x00 "DMA0_CMICIC360,DMA Controller Client Matrix Internal Client Interface Configuration Register 360"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[360]-DSTP_ACK[360]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[360]-DREQ_ACK[360]"
|
|
group.long 0x25C4++0x03
|
|
line.long 0x00 "DMA0_CMICIC361,DMA Controller Client Matrix Internal Client Interface Configuration Register 361"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[361]-DSTP_ACK[361]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[361]-DREQ_ACK[361]"
|
|
group.long 0x25C8++0x03
|
|
line.long 0x00 "DMA0_CMICIC362,DMA Controller Client Matrix Internal Client Interface Configuration Register 362"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[362]-DSTP_ACK[362]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[362]-DREQ_ACK[362]"
|
|
group.long 0x25CC++0x03
|
|
line.long 0x00 "DMA0_CMICIC363,DMA Controller Client Matrix Internal Client Interface Configuration Register 363"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[363]-DSTP_ACK[363]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[363]-DREQ_ACK[363]"
|
|
group.long 0x25D0++0x03
|
|
line.long 0x00 "DMA0_CMICIC364,DMA Controller Client Matrix Internal Client Interface Configuration Register 364"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[364]-DSTP_ACK[364]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[364]-DREQ_ACK[364]"
|
|
group.long 0x25D4++0x03
|
|
line.long 0x00 "DMA0_CMICIC365,DMA Controller Client Matrix Internal Client Interface Configuration Register 365"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[365]-DSTP_ACK[365]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[365]-DREQ_ACK[365]"
|
|
group.long 0x25D8++0x03
|
|
line.long 0x00 "DMA0_CMICIC366,DMA Controller Client Matrix Internal Client Interface Configuration Register 366"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[366]-DSTP_ACK[366]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[366]-DREQ_ACK[366]"
|
|
group.long 0x25DC++0x03
|
|
line.long 0x00 "DMA0_CMICIC367,DMA Controller Client Matrix Internal Client Interface Configuration Register 367"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[367]-DSTP_ACK[367]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[367]-DREQ_ACK[367]"
|
|
group.long 0x25E0++0x03
|
|
line.long 0x00 "DMA0_CMICIC368,DMA Controller Client Matrix Internal Client Interface Configuration Register 368"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[368]-DSTP_ACK[368]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[368]-DREQ_ACK[368]"
|
|
group.long 0x25E4++0x03
|
|
line.long 0x00 "DMA0_CMICIC369,DMA Controller Client Matrix Internal Client Interface Configuration Register 369"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[369]-DSTP_ACK[369]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[369]-DREQ_ACK[369]"
|
|
group.long 0x25E8++0x03
|
|
line.long 0x00 "DMA0_CMICIC370,DMA Controller Client Matrix Internal Client Interface Configuration Register 370"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[370]-DSTP_ACK[370]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[370]-DREQ_ACK[370]"
|
|
group.long 0x25EC++0x03
|
|
line.long 0x00 "DMA0_CMICIC371,DMA Controller Client Matrix Internal Client Interface Configuration Register 371"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[371]-DSTP_ACK[371]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[371]-DREQ_ACK[371]"
|
|
group.long 0x25F0++0x03
|
|
line.long 0x00 "DMA0_CMICIC372,DMA Controller Client Matrix Internal Client Interface Configuration Register 372"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[372]-DSTP_ACK[372]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[372]-DREQ_ACK[372]"
|
|
group.long 0x25F4++0x03
|
|
line.long 0x00 "DMA0_CMICIC373,DMA Controller Client Matrix Internal Client Interface Configuration Register 373"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[373]-DSTP_ACK[373]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[373]-DREQ_ACK[373]"
|
|
group.long 0x25F8++0x03
|
|
line.long 0x00 "DMA0_CMICIC374,DMA Controller Client Matrix Internal Client Interface Configuration Register 374"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[374]-DSTP_ACK[374]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[374]-DREQ_ACK[374]"
|
|
group.long 0x25FC++0x03
|
|
line.long 0x00 "DMA0_CMICIC375,DMA Controller Client Matrix Internal Client Interface Configuration Register 375"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[375]-DSTP_ACK[375]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[375]-DREQ_ACK[375]"
|
|
group.long 0x2600++0x03
|
|
line.long 0x00 "DMA0_CMICIC376,DMA Controller Client Matrix Internal Client Interface Configuration Register 376"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[376]-DSTP_ACK[376]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[376]-DREQ_ACK[376]"
|
|
group.long 0x2604++0x03
|
|
line.long 0x00 "DMA0_CMICIC377,DMA Controller Client Matrix Internal Client Interface Configuration Register 377"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[377]-DSTP_ACK[377]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[377]-DREQ_ACK[377]"
|
|
group.long 0x2608++0x03
|
|
line.long 0x00 "DMA0_CMICIC378,DMA Controller Client Matrix Internal Client Interface Configuration Register 378"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[378]-DSTP_ACK[378]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[378]-DREQ_ACK[378]"
|
|
group.long 0x260C++0x03
|
|
line.long 0x00 "DMA0_CMICIC379,DMA Controller Client Matrix Internal Client Interface Configuration Register 379"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[379]-DSTP_ACK[379]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[379]-DREQ_ACK[379]"
|
|
group.long 0x2610++0x03
|
|
line.long 0x00 "DMA0_CMICIC380,DMA Controller Client Matrix Internal Client Interface Configuration Register 380"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[380]-DSTP_ACK[380]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[380]-DREQ_ACK[380]"
|
|
group.long 0x2614++0x03
|
|
line.long 0x00 "DMA0_CMICIC381,DMA Controller Client Matrix Internal Client Interface Configuration Register 381"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[381]-DSTP_ACK[381]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[381]-DREQ_ACK[381]"
|
|
group.long 0x2618++0x03
|
|
line.long 0x00 "DMA0_CMICIC382,DMA Controller Client Matrix Internal Client Interface Configuration Register 382"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[382]-DSTP_ACK[382]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[382]-DREQ_ACK[382]"
|
|
group.long 0x261C++0x03
|
|
line.long 0x00 "DMA0_CMICIC383,DMA Controller Client Matrix Internal Client Interface Configuration Register 383"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[383]-DSTP_ACK[383]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[383]-DREQ_ACK[383]"
|
|
group.long 0x2620++0x03
|
|
line.long 0x00 "DMA0_CMICIC384,DMA Controller Client Matrix Internal Client Interface Configuration Register 384"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[384]-DSTP_ACK[384]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[384]-DREQ_ACK[384]"
|
|
group.long 0x2624++0x03
|
|
line.long 0x00 "DMA0_CMICIC385,DMA Controller Client Matrix Internal Client Interface Configuration Register 385"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[385]-DSTP_ACK[385]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[385]-DREQ_ACK[385]"
|
|
group.long 0x2628++0x03
|
|
line.long 0x00 "DMA0_CMICIC386,DMA Controller Client Matrix Internal Client Interface Configuration Register 386"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[386]-DSTP_ACK[386]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[386]-DREQ_ACK[386]"
|
|
group.long 0x262C++0x03
|
|
line.long 0x00 "DMA0_CMICIC387,DMA Controller Client Matrix Internal Client Interface Configuration Register 387"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[387]-DSTP_ACK[387]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[387]-DREQ_ACK[387]"
|
|
group.long 0x2630++0x03
|
|
line.long 0x00 "DMA0_CMICIC388,DMA Controller Client Matrix Internal Client Interface Configuration Register 388"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[388]-DSTP_ACK[388]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[388]-DREQ_ACK[388]"
|
|
group.long 0x2634++0x03
|
|
line.long 0x00 "DMA0_CMICIC389,DMA Controller Client Matrix Internal Client Interface Configuration Register 389"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[389]-DSTP_ACK[389]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[389]-DREQ_ACK[389]"
|
|
group.long 0x2638++0x03
|
|
line.long 0x00 "DMA0_CMICIC390,DMA Controller Client Matrix Internal Client Interface Configuration Register 390"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[390]-DSTP_ACK[390]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[390]-DREQ_ACK[390]"
|
|
group.long 0x263C++0x03
|
|
line.long 0x00 "DMA0_CMICIC391,DMA Controller Client Matrix Internal Client Interface Configuration Register 391"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[391]-DSTP_ACK[391]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[391]-DREQ_ACK[391]"
|
|
group.long 0x2640++0x03
|
|
line.long 0x00 "DMA0_CMICIC392,DMA Controller Client Matrix Internal Client Interface Configuration Register 392"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[392]-DSTP_ACK[392]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[392]-DREQ_ACK[392]"
|
|
group.long 0x2644++0x03
|
|
line.long 0x00 "DMA0_CMICIC393,DMA Controller Client Matrix Internal Client Interface Configuration Register 393"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[393]-DSTP_ACK[393]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[393]-DREQ_ACK[393]"
|
|
group.long 0x2648++0x03
|
|
line.long 0x00 "DMA0_CMICIC394,DMA Controller Client Matrix Internal Client Interface Configuration Register 394"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[394]-DSTP_ACK[394]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[394]-DREQ_ACK[394]"
|
|
group.long 0x264C++0x03
|
|
line.long 0x00 "DMA0_CMICIC395,DMA Controller Client Matrix Internal Client Interface Configuration Register 395"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[395]-DSTP_ACK[395]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[395]-DREQ_ACK[395]"
|
|
group.long 0x2650++0x03
|
|
line.long 0x00 "DMA0_CMICIC396,DMA Controller Client Matrix Internal Client Interface Configuration Register 396"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[396]-DSTP_ACK[396]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[396]-DREQ_ACK[396]"
|
|
group.long 0x2654++0x03
|
|
line.long 0x00 "DMA0_CMICIC397,DMA Controller Client Matrix Internal Client Interface Configuration Register 397"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[397]-DSTP_ACK[397]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[397]-DREQ_ACK[397]"
|
|
group.long 0x2658++0x03
|
|
line.long 0x00 "DMA0_CMICIC398,DMA Controller Client Matrix Internal Client Interface Configuration Register 398"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[398]-DSTP_ACK[398]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[398]-DREQ_ACK[398]"
|
|
group.long 0x265C++0x03
|
|
line.long 0x00 "DMA0_CMICIC399,DMA Controller Client Matrix Internal Client Interface Configuration Register 399"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[399]-DSTP_ACK[399]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[399]-DREQ_ACK[399]"
|
|
group.long 0x2660++0x03
|
|
line.long 0x00 "DMA0_CMICIC400,DMA Controller Client Matrix Internal Client Interface Configuration Register 400"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[400]-DSTP_ACK[400]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[400]-DREQ_ACK[400]"
|
|
group.long 0x2664++0x03
|
|
line.long 0x00 "DMA0_CMICIC401,DMA Controller Client Matrix Internal Client Interface Configuration Register 401"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[401]-DSTP_ACK[401]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[401]-DREQ_ACK[401]"
|
|
group.long 0x2668++0x03
|
|
line.long 0x00 "DMA0_CMICIC402,DMA Controller Client Matrix Internal Client Interface Configuration Register 402"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[402]-DSTP_ACK[402]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[402]-DREQ_ACK[402]"
|
|
group.long 0x266C++0x03
|
|
line.long 0x00 "DMA0_CMICIC403,DMA Controller Client Matrix Internal Client Interface Configuration Register 403"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[403]-DSTP_ACK[403]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[403]-DREQ_ACK[403]"
|
|
group.long 0x2670++0x03
|
|
line.long 0x00 "DMA0_CMICIC404,DMA Controller Client Matrix Internal Client Interface Configuration Register 404"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[404]-DSTP_ACK[404]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[404]-DREQ_ACK[404]"
|
|
group.long 0x2674++0x03
|
|
line.long 0x00 "DMA0_CMICIC405,DMA Controller Client Matrix Internal Client Interface Configuration Register 405"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[405]-DSTP_ACK[405]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[405]-DREQ_ACK[405]"
|
|
group.long 0x2678++0x03
|
|
line.long 0x00 "DMA0_CMICIC406,DMA Controller Client Matrix Internal Client Interface Configuration Register 406"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[406]-DSTP_ACK[406]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[406]-DREQ_ACK[406]"
|
|
group.long 0x267C++0x03
|
|
line.long 0x00 "DMA0_CMICIC407,DMA Controller Client Matrix Internal Client Interface Configuration Register 407"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[407]-DSTP_ACK[407]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[407]-DREQ_ACK[407]"
|
|
group.long 0x2680++0x03
|
|
line.long 0x00 "DMA0_CMICIC408,DMA Controller Client Matrix Internal Client Interface Configuration Register 408"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[408]-DSTP_ACK[408]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[408]-DREQ_ACK[408]"
|
|
group.long 0x2684++0x03
|
|
line.long 0x00 "DMA0_CMICIC409,DMA Controller Client Matrix Internal Client Interface Configuration Register 409"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[409]-DSTP_ACK[409]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[409]-DREQ_ACK[409]"
|
|
group.long 0x2688++0x03
|
|
line.long 0x00 "DMA0_CMICIC410,DMA Controller Client Matrix Internal Client Interface Configuration Register 410"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[410]-DSTP_ACK[410]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[410]-DREQ_ACK[410]"
|
|
group.long 0x268C++0x03
|
|
line.long 0x00 "DMA0_CMICIC411,DMA Controller Client Matrix Internal Client Interface Configuration Register 411"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[411]-DSTP_ACK[411]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[411]-DREQ_ACK[411]"
|
|
group.long 0x2690++0x03
|
|
line.long 0x00 "DMA0_CMICIC412,DMA Controller Client Matrix Internal Client Interface Configuration Register 412"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[412]-DSTP_ACK[412]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[412]-DREQ_ACK[412]"
|
|
group.long 0x2694++0x03
|
|
line.long 0x00 "DMA0_CMICIC413,DMA Controller Client Matrix Internal Client Interface Configuration Register 413"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[413]-DSTP_ACK[413]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[413]-DREQ_ACK[413]"
|
|
group.long 0x2698++0x03
|
|
line.long 0x00 "DMA0_CMICIC414,DMA Controller Client Matrix Internal Client Interface Configuration Register 414"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[414]-DSTP_ACK[414]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[414]-DREQ_ACK[414]"
|
|
group.long 0x269C++0x03
|
|
line.long 0x00 "DMA0_CMICIC415,DMA Controller Client Matrix Internal Client Interface Configuration Register 415"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[415]-DSTP_ACK[415]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[415]-DREQ_ACK[415]"
|
|
group.long 0x26A0++0x03
|
|
line.long 0x00 "DMA0_CMICIC416,DMA Controller Client Matrix Internal Client Interface Configuration Register 416"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[416]-DSTP_ACK[416]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[416]-DREQ_ACK[416]"
|
|
group.long 0x26A4++0x03
|
|
line.long 0x00 "DMA0_CMICIC417,DMA Controller Client Matrix Internal Client Interface Configuration Register 417"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[417]-DSTP_ACK[417]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[417]-DREQ_ACK[417]"
|
|
group.long 0x26A8++0x03
|
|
line.long 0x00 "DMA0_CMICIC418,DMA Controller Client Matrix Internal Client Interface Configuration Register 418"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[418]-DSTP_ACK[418]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[418]-DREQ_ACK[418]"
|
|
group.long 0x26AC++0x03
|
|
line.long 0x00 "DMA0_CMICIC419,DMA Controller Client Matrix Internal Client Interface Configuration Register 419"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[419]-DSTP_ACK[419]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[419]-DREQ_ACK[419]"
|
|
group.long 0x26B0++0x03
|
|
line.long 0x00 "DMA0_CMICIC420,DMA Controller Client Matrix Internal Client Interface Configuration Register 420"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[420]-DSTP_ACK[420]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[420]-DREQ_ACK[420]"
|
|
group.long 0x26B4++0x03
|
|
line.long 0x00 "DMA0_CMICIC421,DMA Controller Client Matrix Internal Client Interface Configuration Register 421"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[421]-DSTP_ACK[421]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[421]-DREQ_ACK[421]"
|
|
group.long 0x26B8++0x03
|
|
line.long 0x00 "DMA0_CMICIC422,DMA Controller Client Matrix Internal Client Interface Configuration Register 422"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[422]-DSTP_ACK[422]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[422]-DREQ_ACK[422]"
|
|
group.long 0x26BC++0x03
|
|
line.long 0x00 "DMA0_CMICIC423,DMA Controller Client Matrix Internal Client Interface Configuration Register 423"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[423]-DSTP_ACK[423]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[423]-DREQ_ACK[423]"
|
|
group.long 0x26C0++0x03
|
|
line.long 0x00 "DMA0_CMICIC424,DMA Controller Client Matrix Internal Client Interface Configuration Register 424"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[424]-DSTP_ACK[424]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[424]-DREQ_ACK[424]"
|
|
group.long 0x26C4++0x03
|
|
line.long 0x00 "DMA0_CMICIC425,DMA Controller Client Matrix Internal Client Interface Configuration Register 425"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[425]-DSTP_ACK[425]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[425]-DREQ_ACK[425]"
|
|
group.long 0x26C8++0x03
|
|
line.long 0x00 "DMA0_CMICIC426,DMA Controller Client Matrix Internal Client Interface Configuration Register 426"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[426]-DSTP_ACK[426]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[426]-DREQ_ACK[426]"
|
|
group.long 0x26CC++0x03
|
|
line.long 0x00 "DMA0_CMICIC427,DMA Controller Client Matrix Internal Client Interface Configuration Register 427"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[427]-DSTP_ACK[427]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[427]-DREQ_ACK[427]"
|
|
group.long 0x26D0++0x03
|
|
line.long 0x00 "DMA0_CMICIC428,DMA Controller Client Matrix Internal Client Interface Configuration Register 428"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[428]-DSTP_ACK[428]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[428]-DREQ_ACK[428]"
|
|
group.long 0x26D4++0x03
|
|
line.long 0x00 "DMA0_CMICIC429,DMA Controller Client Matrix Internal Client Interface Configuration Register 429"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[429]-DSTP_ACK[429]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[429]-DREQ_ACK[429]"
|
|
group.long 0x26D8++0x03
|
|
line.long 0x00 "DMA0_CMICIC430,DMA Controller Client Matrix Internal Client Interface Configuration Register 430"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[430]-DSTP_ACK[430]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[430]-DREQ_ACK[430]"
|
|
group.long 0x26DC++0x03
|
|
line.long 0x00 "DMA0_CMICIC431,DMA Controller Client Matrix Internal Client Interface Configuration Register 431"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[431]-DSTP_ACK[431]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[431]-DREQ_ACK[431]"
|
|
group.long 0x26E0++0x03
|
|
line.long 0x00 "DMA0_CMICIC432,DMA Controller Client Matrix Internal Client Interface Configuration Register 432"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[432]-DSTP_ACK[432]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[432]-DREQ_ACK[432]"
|
|
group.long 0x26E4++0x03
|
|
line.long 0x00 "DMA0_CMICIC433,DMA Controller Client Matrix Internal Client Interface Configuration Register 433"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[433]-DSTP_ACK[433]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[433]-DREQ_ACK[433]"
|
|
group.long 0x26E8++0x03
|
|
line.long 0x00 "DMA0_CMICIC434,DMA Controller Client Matrix Internal Client Interface Configuration Register 434"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[434]-DSTP_ACK[434]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[434]-DREQ_ACK[434]"
|
|
group.long 0x26EC++0x03
|
|
line.long 0x00 "DMA0_CMICIC435,DMA Controller Client Matrix Internal Client Interface Configuration Register 435"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[435]-DSTP_ACK[435]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[435]-DREQ_ACK[435]"
|
|
group.long 0x26F0++0x03
|
|
line.long 0x00 "DMA0_CMICIC436,DMA Controller Client Matrix Internal Client Interface Configuration Register 436"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[436]-DSTP_ACK[436]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[436]-DREQ_ACK[436]"
|
|
group.long 0x26F4++0x03
|
|
line.long 0x00 "DMA0_CMICIC437,DMA Controller Client Matrix Internal Client Interface Configuration Register 437"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[437]-DSTP_ACK[437]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[437]-DREQ_ACK[437]"
|
|
group.long 0x26F8++0x03
|
|
line.long 0x00 "DMA0_CMICIC438,DMA Controller Client Matrix Internal Client Interface Configuration Register 438"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[438]-DSTP_ACK[438]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[438]-DREQ_ACK[438]"
|
|
group.long 0x26FC++0x03
|
|
line.long 0x00 "DMA0_CMICIC439,DMA Controller Client Matrix Internal Client Interface Configuration Register 439"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[439]-DSTP_ACK[439]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[439]-DREQ_ACK[439]"
|
|
group.long 0x2700++0x03
|
|
line.long 0x00 "DMA0_CMICIC440,DMA Controller Client Matrix Internal Client Interface Configuration Register 440"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[440]-DSTP_ACK[440]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[440]-DREQ_ACK[440]"
|
|
group.long 0x2704++0x03
|
|
line.long 0x00 "DMA0_CMICIC441,DMA Controller Client Matrix Internal Client Interface Configuration Register 441"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[441]-DSTP_ACK[441]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[441]-DREQ_ACK[441]"
|
|
group.long 0x2708++0x03
|
|
line.long 0x00 "DMA0_CMICIC442,DMA Controller Client Matrix Internal Client Interface Configuration Register 442"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[442]-DSTP_ACK[442]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[442]-DREQ_ACK[442]"
|
|
group.long 0x270C++0x03
|
|
line.long 0x00 "DMA0_CMICIC443,DMA Controller Client Matrix Internal Client Interface Configuration Register 443"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[443]-DSTP_ACK[443]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[443]-DREQ_ACK[443]"
|
|
group.long 0x2710++0x03
|
|
line.long 0x00 "DMA0_CMICIC444,DMA Controller Client Matrix Internal Client Interface Configuration Register 444"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[444]-DSTP_ACK[444]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[444]-DREQ_ACK[444]"
|
|
group.long 0x2714++0x03
|
|
line.long 0x00 "DMA0_CMICIC445,DMA Controller Client Matrix Internal Client Interface Configuration Register 445"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[445]-DSTP_ACK[445]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[445]-DREQ_ACK[445]"
|
|
group.long 0x2718++0x03
|
|
line.long 0x00 "DMA0_CMICIC446,DMA Controller Client Matrix Internal Client Interface Configuration Register 446"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[446]-DSTP_ACK[446]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[446]-DREQ_ACK[446]"
|
|
group.long 0x271C++0x03
|
|
line.long 0x00 "DMA0_CMICIC447,DMA Controller Client Matrix Internal Client Interface Configuration Register 447"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[447]-DSTP_ACK[447]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[447]-DREQ_ACK[447]"
|
|
group.long 0x2720++0x03
|
|
line.long 0x00 "DMA0_CMICIC448,DMA Controller Client Matrix Internal Client Interface Configuration Register 448"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[448]-DSTP_ACK[448]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[448]-DREQ_ACK[448]"
|
|
group.long 0x2724++0x03
|
|
line.long 0x00 "DMA0_CMICIC449,DMA Controller Client Matrix Internal Client Interface Configuration Register 449"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[449]-DSTP_ACK[449]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[449]-DREQ_ACK[449]"
|
|
group.long 0x2728++0x03
|
|
line.long 0x00 "DMA0_CMICIC450,DMA Controller Client Matrix Internal Client Interface Configuration Register 450"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[450]-DSTP_ACK[450]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[450]-DREQ_ACK[450]"
|
|
group.long 0x272C++0x03
|
|
line.long 0x00 "DMA0_CMICIC451,DMA Controller Client Matrix Internal Client Interface Configuration Register 451"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[451]-DSTP_ACK[451]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[451]-DREQ_ACK[451]"
|
|
group.long 0x2730++0x03
|
|
line.long 0x00 "DMA0_CMICIC452,DMA Controller Client Matrix Internal Client Interface Configuration Register 452"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[452]-DSTP_ACK[452]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[452]-DREQ_ACK[452]"
|
|
group.long 0x2734++0x03
|
|
line.long 0x00 "DMA0_CMICIC453,DMA Controller Client Matrix Internal Client Interface Configuration Register 453"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[453]-DSTP_ACK[453]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[453]-DREQ_ACK[453]"
|
|
group.long 0x2738++0x03
|
|
line.long 0x00 "DMA0_CMICIC454,DMA Controller Client Matrix Internal Client Interface Configuration Register 454"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[454]-DSTP_ACK[454]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[454]-DREQ_ACK[454]"
|
|
group.long 0x273C++0x03
|
|
line.long 0x00 "DMA0_CMICIC455,DMA Controller Client Matrix Internal Client Interface Configuration Register 455"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[455]-DSTP_ACK[455]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[455]-DREQ_ACK[455]"
|
|
group.long 0x2740++0x03
|
|
line.long 0x00 "DMA0_CMICIC456,DMA Controller Client Matrix Internal Client Interface Configuration Register 456"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[456]-DSTP_ACK[456]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[456]-DREQ_ACK[456]"
|
|
group.long 0x2744++0x03
|
|
line.long 0x00 "DMA0_CMICIC457,DMA Controller Client Matrix Internal Client Interface Configuration Register 457"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[457]-DSTP_ACK[457]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[457]-DREQ_ACK[457]"
|
|
group.long 0x2748++0x03
|
|
line.long 0x00 "DMA0_CMICIC458,DMA Controller Client Matrix Internal Client Interface Configuration Register 458"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[458]-DSTP_ACK[458]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[458]-DREQ_ACK[458]"
|
|
group.long 0x274C++0x03
|
|
line.long 0x00 "DMA0_CMICIC459,DMA Controller Client Matrix Internal Client Interface Configuration Register 459"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[459]-DSTP_ACK[459]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[459]-DREQ_ACK[459]"
|
|
group.long 0x2750++0x03
|
|
line.long 0x00 "DMA0_CMICIC460,DMA Controller Client Matrix Internal Client Interface Configuration Register 460"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[460]-DSTP_ACK[460]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[460]-DREQ_ACK[460]"
|
|
group.long 0x2754++0x03
|
|
line.long 0x00 "DMA0_CMICIC461,DMA Controller Client Matrix Internal Client Interface Configuration Register 461"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[461]-DSTP_ACK[461]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[461]-DREQ_ACK[461]"
|
|
group.long 0x2758++0x03
|
|
line.long 0x00 "DMA0_CMICIC462,DMA Controller Client Matrix Internal Client Interface Configuration Register 462"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[462]-DSTP_ACK[462]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[462]-DREQ_ACK[462]"
|
|
group.long 0x275C++0x03
|
|
line.long 0x00 "DMA0_CMICIC463,DMA Controller Client Matrix Internal Client Interface Configuration Register 463"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[463]-DSTP_ACK[463]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[463]-DREQ_ACK[463]"
|
|
group.long 0x2760++0x03
|
|
line.long 0x00 "DMA0_CMICIC464,DMA Controller Client Matrix Internal Client Interface Configuration Register 464"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[464]-DSTP_ACK[464]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[464]-DREQ_ACK[464]"
|
|
group.long 0x2764++0x03
|
|
line.long 0x00 "DMA0_CMICIC465,DMA Controller Client Matrix Internal Client Interface Configuration Register 465"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[465]-DSTP_ACK[465]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[465]-DREQ_ACK[465]"
|
|
group.long 0x2768++0x03
|
|
line.long 0x00 "DMA0_CMICIC466,DMA Controller Client Matrix Internal Client Interface Configuration Register 466"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[466]-DSTP_ACK[466]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[466]-DREQ_ACK[466]"
|
|
group.long 0x276C++0x03
|
|
line.long 0x00 "DMA0_CMICIC467,DMA Controller Client Matrix Internal Client Interface Configuration Register 467"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[467]-DSTP_ACK[467]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[467]-DREQ_ACK[467]"
|
|
group.long 0x2770++0x03
|
|
line.long 0x00 "DMA0_CMICIC468,DMA Controller Client Matrix Internal Client Interface Configuration Register 468"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[468]-DSTP_ACK[468]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[468]-DREQ_ACK[468]"
|
|
group.long 0x2774++0x03
|
|
line.long 0x00 "DMA0_CMICIC469,DMA Controller Client Matrix Internal Client Interface Configuration Register 469"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[469]-DSTP_ACK[469]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[469]-DREQ_ACK[469]"
|
|
group.long 0x2778++0x03
|
|
line.long 0x00 "DMA0_CMICIC470,DMA Controller Client Matrix Internal Client Interface Configuration Register 470"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[470]-DSTP_ACK[470]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[470]-DREQ_ACK[470]"
|
|
group.long 0x277C++0x03
|
|
line.long 0x00 "DMA0_CMICIC471,DMA Controller Client Matrix Internal Client Interface Configuration Register 471"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[471]-DSTP_ACK[471]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[471]-DREQ_ACK[471]"
|
|
group.long 0x2780++0x03
|
|
line.long 0x00 "DMA0_CMICIC472,DMA Controller Client Matrix Internal Client Interface Configuration Register 472"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[472]-DSTP_ACK[472]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[472]-DREQ_ACK[472]"
|
|
group.long 0x2784++0x03
|
|
line.long 0x00 "DMA0_CMICIC473,DMA Controller Client Matrix Internal Client Interface Configuration Register 473"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[473]-DSTP_ACK[473]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[473]-DREQ_ACK[473]"
|
|
group.long 0x2788++0x03
|
|
line.long 0x00 "DMA0_CMICIC474,DMA Controller Client Matrix Internal Client Interface Configuration Register 474"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[474]-DSTP_ACK[474]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[474]-DREQ_ACK[474]"
|
|
group.long 0x278C++0x03
|
|
line.long 0x00 "DMA0_CMICIC475,DMA Controller Client Matrix Internal Client Interface Configuration Register 475"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[475]-DSTP_ACK[475]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[475]-DREQ_ACK[475]"
|
|
group.long 0x2790++0x03
|
|
line.long 0x00 "DMA0_CMICIC476,DMA Controller Client Matrix Internal Client Interface Configuration Register 476"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[476]-DSTP_ACK[476]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[476]-DREQ_ACK[476]"
|
|
group.long 0x2794++0x03
|
|
line.long 0x00 "DMA0_CMICIC477,DMA Controller Client Matrix Internal Client Interface Configuration Register 477"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[477]-DSTP_ACK[477]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[477]-DREQ_ACK[477]"
|
|
group.long 0x2798++0x03
|
|
line.long 0x00 "DMA0_CMICIC478,DMA Controller Client Matrix Internal Client Interface Configuration Register 478"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[478]-DSTP_ACK[478]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[478]-DREQ_ACK[478]"
|
|
group.long 0x279C++0x03
|
|
line.long 0x00 "DMA0_CMICIC479,DMA Controller Client Matrix Internal Client Interface Configuration Register 479"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[479]-DSTP_ACK[479]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[479]-DREQ_ACK[479]"
|
|
group.long 0x27A0++0x03
|
|
line.long 0x00 "DMA0_CMICIC480,DMA Controller Client Matrix Internal Client Interface Configuration Register 480"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[480]-DSTP_ACK[480]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[480]-DREQ_ACK[480]"
|
|
group.long 0x27A4++0x03
|
|
line.long 0x00 "DMA0_CMICIC481,DMA Controller Client Matrix Internal Client Interface Configuration Register 481"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[481]-DSTP_ACK[481]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[481]-DREQ_ACK[481]"
|
|
group.long 0x27A8++0x03
|
|
line.long 0x00 "DMA0_CMICIC482,DMA Controller Client Matrix Internal Client Interface Configuration Register 482"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[482]-DSTP_ACK[482]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[482]-DREQ_ACK[482]"
|
|
group.long 0x27AC++0x03
|
|
line.long 0x00 "DMA0_CMICIC483,DMA Controller Client Matrix Internal Client Interface Configuration Register 483"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[483]-DSTP_ACK[483]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[483]-DREQ_ACK[483]"
|
|
group.long 0x27B0++0x03
|
|
line.long 0x00 "DMA0_CMICIC484,DMA Controller Client Matrix Internal Client Interface Configuration Register 484"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[484]-DSTP_ACK[484]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[484]-DREQ_ACK[484]"
|
|
group.long 0x27B4++0x03
|
|
line.long 0x00 "DMA0_CMICIC485,DMA Controller Client Matrix Internal Client Interface Configuration Register 485"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[485]-DSTP_ACK[485]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[485]-DREQ_ACK[485]"
|
|
group.long 0x27B8++0x03
|
|
line.long 0x00 "DMA0_CMICIC486,DMA Controller Client Matrix Internal Client Interface Configuration Register 486"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[486]-DSTP_ACK[486]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[486]-DREQ_ACK[486]"
|
|
group.long 0x27BC++0x03
|
|
line.long 0x00 "DMA0_CMICIC487,DMA Controller Client Matrix Internal Client Interface Configuration Register 487"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[487]-DSTP_ACK[487]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[487]-DREQ_ACK[487]"
|
|
group.long 0x27C0++0x03
|
|
line.long 0x00 "DMA0_CMICIC488,DMA Controller Client Matrix Internal Client Interface Configuration Register 488"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[488]-DSTP_ACK[488]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[488]-DREQ_ACK[488]"
|
|
group.long 0x27C4++0x03
|
|
line.long 0x00 "DMA0_CMICIC489,DMA Controller Client Matrix Internal Client Interface Configuration Register 489"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[489]-DSTP_ACK[489]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[489]-DREQ_ACK[489]"
|
|
group.long 0x27C8++0x03
|
|
line.long 0x00 "DMA0_CMICIC490,DMA Controller Client Matrix Internal Client Interface Configuration Register 490"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[490]-DSTP_ACK[490]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[490]-DREQ_ACK[490]"
|
|
group.long 0x27CC++0x03
|
|
line.long 0x00 "DMA0_CMICIC491,DMA Controller Client Matrix Internal Client Interface Configuration Register 491"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[491]-DSTP_ACK[491]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[491]-DREQ_ACK[491]"
|
|
group.long 0x27D0++0x03
|
|
line.long 0x00 "DMA0_CMICIC492,DMA Controller Client Matrix Internal Client Interface Configuration Register 492"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[492]-DSTP_ACK[492]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[492]-DREQ_ACK[492]"
|
|
group.long 0x27D4++0x03
|
|
line.long 0x00 "DMA0_CMICIC493,DMA Controller Client Matrix Internal Client Interface Configuration Register 493"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[493]-DSTP_ACK[493]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[493]-DREQ_ACK[493]"
|
|
group.long 0x27D8++0x03
|
|
line.long 0x00 "DMA0_CMICIC494,DMA Controller Client Matrix Internal Client Interface Configuration Register 494"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[494]-DSTP_ACK[494]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[494]-DREQ_ACK[494]"
|
|
group.long 0x27DC++0x03
|
|
line.long 0x00 "DMA0_CMICIC495,DMA Controller Client Matrix Internal Client Interface Configuration Register 495"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[495]-DSTP_ACK[495]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[495]-DREQ_ACK[495]"
|
|
group.long 0x27E0++0x03
|
|
line.long 0x00 "DMA0_CMICIC496,DMA Controller Client Matrix Internal Client Interface Configuration Register 496"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[496]-DSTP_ACK[496]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[496]-DREQ_ACK[496]"
|
|
group.long 0x27E4++0x03
|
|
line.long 0x00 "DMA0_CMICIC497,DMA Controller Client Matrix Internal Client Interface Configuration Register 497"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[497]-DSTP_ACK[497]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[497]-DREQ_ACK[497]"
|
|
group.long 0x27E8++0x03
|
|
line.long 0x00 "DMA0_CMICIC498,DMA Controller Client Matrix Internal Client Interface Configuration Register 498"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[498]-DSTP_ACK[498]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[498]-DREQ_ACK[498]"
|
|
group.long 0x27EC++0x03
|
|
line.long 0x00 "DMA0_CMICIC499,DMA Controller Client Matrix Internal Client Interface Configuration Register 499"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[499]-DSTP_ACK[499]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[499]-DREQ_ACK[499]"
|
|
group.long 0x27F0++0x03
|
|
line.long 0x00 "DMA0_CMICIC500,DMA Controller Client Matrix Internal Client Interface Configuration Register 500"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[500]-DSTP_ACK[500]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[500]-DREQ_ACK[500]"
|
|
group.long 0x27F4++0x03
|
|
line.long 0x00 "DMA0_CMICIC501,DMA Controller Client Matrix Internal Client Interface Configuration Register 501"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[501]-DSTP_ACK[501]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[501]-DREQ_ACK[501]"
|
|
group.long 0x27F8++0x03
|
|
line.long 0x00 "DMA0_CMICIC502,DMA Controller Client Matrix Internal Client Interface Configuration Register 502"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[502]-DSTP_ACK[502]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[502]-DREQ_ACK[502]"
|
|
group.long 0x27FC++0x03
|
|
line.long 0x00 "DMA0_CMICIC503,DMA Controller Client Matrix Internal Client Interface Configuration Register 503"
|
|
bitfld.long 0x00 27. " BEHSTPACK ,Behaviour Stop Acknowledge" "Inactive,DSTP[503]-DSTP_ACK[503]"
|
|
bitfld.long 0x00 25. " BEHREQACK ,Behaviour Request Acknowledge" "Inactive,DREQ[503]-DREQ_ACK[503]"
|
|
tree.end
|
|
tree "DMA Controller Client Matrix Channel Interface Configuration Registers"
|
|
group.long 0x2800++0x03
|
|
line.long 0x00 "DMA0_CMCHIC0,DMA Controller Client Matrix Channel Interface Configuration Register 0"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2804++0x03
|
|
line.long 0x00 "DMA0_CMCHIC1,DMA Controller Client Matrix Channel Interface Configuration Register 1"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2808++0x03
|
|
line.long 0x00 "DMA0_CMCHIC2,DMA Controller Client Matrix Channel Interface Configuration Register 2"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x280C++0x03
|
|
line.long 0x00 "DMA0_CMCHIC3,DMA Controller Client Matrix Channel Interface Configuration Register 3"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2810++0x03
|
|
line.long 0x00 "DMA0_CMCHIC4,DMA Controller Client Matrix Channel Interface Configuration Register 4"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2814++0x03
|
|
line.long 0x00 "DMA0_CMCHIC5,DMA Controller Client Matrix Channel Interface Configuration Register 5"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2818++0x03
|
|
line.long 0x00 "DMA0_CMCHIC6,DMA Controller Client Matrix Channel Interface Configuration Register 6"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x281C++0x03
|
|
line.long 0x00 "DMA0_CMCHIC7,DMA Controller Client Matrix Channel Interface Configuration Register 7"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2820++0x03
|
|
line.long 0x00 "DMA0_CMCHIC8,DMA Controller Client Matrix Channel Interface Configuration Register 8"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2824++0x03
|
|
line.long 0x00 "DMA0_CMCHIC9,DMA Controller Client Matrix Channel Interface Configuration Register 9"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2828++0x03
|
|
line.long 0x00 "DMA0_CMCHIC10,DMA Controller Client Matrix Channel Interface Configuration Register 10"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x282C++0x03
|
|
line.long 0x00 "DMA0_CMCHIC11,DMA Controller Client Matrix Channel Interface Configuration Register 11"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2830++0x03
|
|
line.long 0x00 "DMA0_CMCHIC12,DMA Controller Client Matrix Channel Interface Configuration Register 12"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2834++0x03
|
|
line.long 0x00 "DMA0_CMCHIC13,DMA Controller Client Matrix Channel Interface Configuration Register 13"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2838++0x03
|
|
line.long 0x00 "DMA0_CMCHIC14,DMA Controller Client Matrix Channel Interface Configuration Register 14"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x283C++0x03
|
|
line.long 0x00 "DMA0_CMCHIC15,DMA Controller Client Matrix Channel Interface Configuration Register 15"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2840++0x03
|
|
line.long 0x00 "DMA0_CMCHIC16,DMA Controller Client Matrix Channel Interface Configuration Register 16"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2844++0x03
|
|
line.long 0x00 "DMA0_CMCHIC17,DMA Controller Client Matrix Channel Interface Configuration Register 17"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2848++0x03
|
|
line.long 0x00 "DMA0_CMCHIC18,DMA Controller Client Matrix Channel Interface Configuration Register 18"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x284C++0x03
|
|
line.long 0x00 "DMA0_CMCHIC19,DMA Controller Client Matrix Channel Interface Configuration Register 19"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2850++0x03
|
|
line.long 0x00 "DMA0_CMCHIC20,DMA Controller Client Matrix Channel Interface Configuration Register 20"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2854++0x03
|
|
line.long 0x00 "DMA0_CMCHIC21,DMA Controller Client Matrix Channel Interface Configuration Register 21"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2858++0x03
|
|
line.long 0x00 "DMA0_CMCHIC22,DMA Controller Client Matrix Channel Interface Configuration Register 22"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x285C++0x03
|
|
line.long 0x00 "DMA0_CMCHIC23,DMA Controller Client Matrix Channel Interface Configuration Register 23"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2860++0x03
|
|
line.long 0x00 "DMA0_CMCHIC24,DMA Controller Client Matrix Channel Interface Configuration Register 24"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2864++0x03
|
|
line.long 0x00 "DMA0_CMCHIC25,DMA Controller Client Matrix Channel Interface Configuration Register 25"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2868++0x03
|
|
line.long 0x00 "DMA0_CMCHIC26,DMA Controller Client Matrix Channel Interface Configuration Register 26"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x286C++0x03
|
|
line.long 0x00 "DMA0_CMCHIC27,DMA Controller Client Matrix Channel Interface Configuration Register 27"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2870++0x03
|
|
line.long 0x00 "DMA0_CMCHIC28,DMA Controller Client Matrix Channel Interface Configuration Register 28"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2874++0x03
|
|
line.long 0x00 "DMA0_CMCHIC29,DMA Controller Client Matrix Channel Interface Configuration Register 29"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2878++0x03
|
|
line.long 0x00 "DMA0_CMCHIC30,DMA Controller Client Matrix Channel Interface Configuration Register 30"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x287C++0x03
|
|
line.long 0x00 "DMA0_CMCHIC31,DMA Controller Client Matrix Channel Interface Configuration Register 31"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2880++0x03
|
|
line.long 0x00 "DMA0_CMCHIC32,DMA Controller Client Matrix Channel Interface Configuration Register 32"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2884++0x03
|
|
line.long 0x00 "DMA0_CMCHIC33,DMA Controller Client Matrix Channel Interface Configuration Register 33"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2888++0x03
|
|
line.long 0x00 "DMA0_CMCHIC34,DMA Controller Client Matrix Channel Interface Configuration Register 34"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x288C++0x03
|
|
line.long 0x00 "DMA0_CMCHIC35,DMA Controller Client Matrix Channel Interface Configuration Register 35"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2890++0x03
|
|
line.long 0x00 "DMA0_CMCHIC36,DMA Controller Client Matrix Channel Interface Configuration Register 36"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2894++0x03
|
|
line.long 0x00 "DMA0_CMCHIC37,DMA Controller Client Matrix Channel Interface Configuration Register 37"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x2898++0x03
|
|
line.long 0x00 "DMA0_CMCHIC38,DMA Controller Client Matrix Channel Interface Configuration Register 38"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x289C++0x03
|
|
line.long 0x00 "DMA0_CMCHIC39,DMA Controller Client Matrix Channel Interface Configuration Register 39"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28A0++0x03
|
|
line.long 0x00 "DMA0_CMCHIC40,DMA Controller Client Matrix Channel Interface Configuration Register 40"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28A4++0x03
|
|
line.long 0x00 "DMA0_CMCHIC41,DMA Controller Client Matrix Channel Interface Configuration Register 41"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28A8++0x03
|
|
line.long 0x00 "DMA0_CMCHIC42,DMA Controller Client Matrix Channel Interface Configuration Register 42"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28AC++0x03
|
|
line.long 0x00 "DMA0_CMCHIC43,DMA Controller Client Matrix Channel Interface Configuration Register 43"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28B0++0x03
|
|
line.long 0x00 "DMA0_CMCHIC44,DMA Controller Client Matrix Channel Interface Configuration Register 44"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28B4++0x03
|
|
line.long 0x00 "DMA0_CMCHIC45,DMA Controller Client Matrix Channel Interface Configuration Register 45"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28B8++0x03
|
|
line.long 0x00 "DMA0_CMCHIC46,DMA Controller Client Matrix Channel Interface Configuration Register 46"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28BC++0x03
|
|
line.long 0x00 "DMA0_CMCHIC47,DMA Controller Client Matrix Channel Interface Configuration Register 47"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28C0++0x03
|
|
line.long 0x00 "DMA0_CMCHIC48,DMA Controller Client Matrix Channel Interface Configuration Register 48"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28C4++0x03
|
|
line.long 0x00 "DMA0_CMCHIC49,DMA Controller Client Matrix Channel Interface Configuration Register 49"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28C8++0x03
|
|
line.long 0x00 "DMA0_CMCHIC50,DMA Controller Client Matrix Channel Interface Configuration Register 50"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28CC++0x03
|
|
line.long 0x00 "DMA0_CMCHIC51,DMA Controller Client Matrix Channel Interface Configuration Register 51"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28D0++0x03
|
|
line.long 0x00 "DMA0_CMCHIC52,DMA Controller Client Matrix Channel Interface Configuration Register 52"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28D4++0x03
|
|
line.long 0x00 "DMA0_CMCHIC53,DMA Controller Client Matrix Channel Interface Configuration Register 53"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28D8++0x03
|
|
line.long 0x00 "DMA0_CMCHIC54,DMA Controller Client Matrix Channel Interface Configuration Register 54"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28DC++0x03
|
|
line.long 0x00 "DMA0_CMCHIC55,DMA Controller Client Matrix Channel Interface Configuration Register 55"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28E0++0x03
|
|
line.long 0x00 "DMA0_CMCHIC56,DMA Controller Client Matrix Channel Interface Configuration Register 56"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28E4++0x03
|
|
line.long 0x00 "DMA0_CMCHIC57,DMA Controller Client Matrix Channel Interface Configuration Register 57"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28E8++0x03
|
|
line.long 0x00 "DMA0_CMCHIC58,DMA Controller Client Matrix Channel Interface Configuration Register 58"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28EC++0x03
|
|
line.long 0x00 "DMA0_CMCHIC59,DMA Controller Client Matrix Channel Interface Configuration Register 59"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28F0++0x03
|
|
line.long 0x00 "DMA0_CMCHIC60,DMA Controller Client Matrix Channel Interface Configuration Register 60"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28F4++0x03
|
|
line.long 0x00 "DMA0_CMCHIC61,DMA Controller Client Matrix Channel Interface Configuration Register 61"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28F8++0x03
|
|
line.long 0x00 "DMA0_CMCHIC62,DMA Controller Client Matrix Channel Interface Configuration Register 62"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
group.long 0x28FC++0x03
|
|
line.long 0x00 "DMA0_CMCHIC63,DMA Controller Client Matrix Channel Interface Configuration Register 63"
|
|
bitfld.long 0x00 8. " CI[8] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 7. " CI[7] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 6. " CI[6] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 5. " CI[5] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 4. " CI[4] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 3. " CI[3] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 2. " CI[2] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 1. " CI[1] ,Client Interface" "0,1"
|
|
bitfld.long 0x00 0. " CI[0] ,Client Interface" "0,1"
|
|
tree.end
|
|
width 0x0b
|
|
tree.end
|
|
tree.end
|
|
tree "Secure Hardware Extension (SHE)"
|
|
base ad:0xB0413000
|
|
width 19.
|
|
if (((d.l(ad:0xB0413014))&0x1)==0x0&&((d.l(ad:0xB041300C))&0x1)==0x0)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SHE_CMD,SHE Command Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMD ,Command Opcode register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SHE_CMDCANCEL,SHE Command Cancel Register"
|
|
bitfld.long 0x00 0. " CANCELREQ ,Cancel Request bit" "No effect,Cancelled"
|
|
elif (((d.l(ad:0xB0413014))&0x1)==0x0&&((d.l(ad:0xB041300C))&0x1)==0x1)
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "SHE_CMD,SHE Command Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMD ,Command Opcode register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SHE_CMDCANCEL,SHE Command Cancel Register"
|
|
bitfld.long 0x00 0. " CANCELREQ ,Cancel Request bit" "No effect,Cancelled"
|
|
else
|
|
hgroup.long 0x00++0x07
|
|
hide.long 0x00 "SHE_CMD,SHE Command Register"
|
|
hide.long 0x04 "SHE_CMDCANCEL,SHE Command Cancel Register"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SHE_CLKCTRL,SHE Clock Control Register"
|
|
bitfld.long 0x00 16. " DISREQ ,Clock Disable Request bit" "No effect,Disabled"
|
|
bitfld.long 0x00 0. " ENREQ ,Clock Enable Request bit" "No effect,Enabled"
|
|
if (((d.l(ad:0xB0413014))&0x1)==0x0)
|
|
rgroup.long 0x0C++0x07
|
|
line.long 0x00 "SHE_STATUS,SHE Status Register"
|
|
bitfld.long 0x00 24. " FATALERR ,Fatal Error flag" "No error,Error"
|
|
bitfld.long 0x00 19. " FLASHDED ,Flash Double Bit ECC Error flag" "No error,Error"
|
|
bitfld.long 0x00 18. " FLASHSEC ,Flash Single Bit ECC Warning flag" "No error,Error"
|
|
bitfld.long 0x00 17. " RAMDED ,RAM Double Bit ECC Error flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RAMSEC ,RAM Single Bit ECC Warning flag" "No error,Error"
|
|
bitfld.long 0x00 9. " INITDONE ,SHE Initialization status flag" "Working,Finished"
|
|
bitfld.long 0x00 8. " DONE ,Done status flag" "Working,Done"
|
|
bitfld.long 0x00 7. " INTDEBUGGER ,Internal Debugger status flag" "Inactive,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 6. " EXTDEBUGGER ,External Debugger status flag" "Not connected,Connected"
|
|
bitfld.long 0x00 5. " RNDINIT ,Random Seed Initialization status flag" "Not initialized,Initialized"
|
|
bitfld.long 0x00 4. " BOOTOK ,Boot OK status flag" "Failed,Succeed"
|
|
bitfld.long 0x00 3. " BOOTFINISHED ,Boot Finished status flag" "Working,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BOOTINIT ,Boot Initialization status flag" "No effect,Personalized"
|
|
bitfld.long 0x00 1. " SECUREBOOT ,Secure Boot Activated status flag" "Inactive,Activated"
|
|
bitfld.long 0x00 0. " BUSY ,Busy status flag" "Idle,Working"
|
|
line.long 0x04 "SHE_ERC,SHE Error Code Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CANCELEXTD ,Extended Command CMD_CANCEL Execution Error Code"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CANCELMAIN ,Command CMD_CANCEL Execution Error Code"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CMDEXTD ,Extended SHE Command Execution Error Code"
|
|
hexmask.long.byte 0x04 0.--7. 1. " CMDMAIN ,SHE Command Execution Error Code"
|
|
else
|
|
hgroup.long 0x0C++0x07
|
|
hide.long 0x00 "SHE_STATUS,SHE Status Register"
|
|
hide.long 0x04 "SHE_ERC,SHE Error Code Register"
|
|
endif
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SHE_CLKSTAT,SHE Clock Status Register"
|
|
bitfld.long 0x00 0. " CLKOFF ,Clock Disabled flag" "No,Yes"
|
|
if (((d.l(ad:0xB0413014))&0x1)==0x0)
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "SHE_MID,SHE Module ID Register"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SHE_IRQ_SET/CLR,Interrupt Request Set/Clear Register"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " FATALERR_set/clr ,Fatal Error Interrupt flag enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " IFIFOLOCKERR_set/clr ,Write To Locked Input FIFO Interrupt flag enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " OMSTIFSELERR_set/clr ,Output Data Channel Interface Selection Error Interrupt flag enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " IMSTIFSELERR_set/clr ,Input Data Channel Interface Selection Error Interrupt flag enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " OMSTERR_set/clr ,Output Channel Master Error Interrupt flag enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " IMSTERR_set/clr ,Input Channel Master Error Interrupt flag enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " OFIFORDERR_set/clr ,Read From Empty Output FIFO Error Interrupt flag enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " IFIFOWRERR_set/clr ,Write To Full Input FIFO Error Interrupt flag enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " OFIFORDTH_set/clr ,Output FIFO Above Threshold Interrupt flag enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " IFIFOWRTH_set/clr ,Input FIFO Below Threshold Interrupt flag enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " OMSTIDLE_set/clr ,Output Channel Master Idle Interrupt flag enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " IMSTIDLE_set/clr ,Input Channel Master Idle Interrupt flag enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DONE_set/clr ,Command Execution Done Interrupt flag enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " COMPAREMATCH_set/clr ,Compare Match Interrupt flag enable" "Disabled,Enabled"
|
|
group.long 0x28++0x1F
|
|
line.long 0x00 "SHE_IMSTADDR,Input Channel Master Start Address Register"
|
|
line.long 0x04 "SHE_OMSTADDR,Output Channel Master Start Address Register"
|
|
line.long 0x08 "SHE_IMSTCNT,Input Channel Master Data Transfer Counter"
|
|
hexmask.long 0x08 0.--28. 1. " IMSTCNT ,Input Channel Master Data Transfer Counter"
|
|
line.long 0x0C "SHE_OMSTCNT,Output Channel Master Data Transfer Counter"
|
|
hexmask.long 0x0C 0.--28. 1. " OMSTCNT ,Output Channel Master Data Transfer Counter"
|
|
line.long 0x10 "SHE_IMSTSTART,Input Channel Master Start Trigger"
|
|
bitfld.long 0x10 0. " IMSTSTART ,Input Channel Master Start Trigger" "No effect,Start"
|
|
line.long 0x14 "SHE_OMSTSTART,Output Channel Master Start Trigger"
|
|
bitfld.long 0x14 0. " OMSTSTART ,Output Channel Master Start Trigger" "No effect,Start"
|
|
line.long 0x18 "SHE_IFIFOCFG,Input FIFO Configuration Register"
|
|
bitfld.long 0x18 16. " IFSEL ,Interface Selection bit" "Command,Data"
|
|
bitfld.long 0x18 0.--5. " WRTHRESHOLD ,Programmable Write Threshold Of Input FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x1C "SHE_OFIFOCFG,Output FIFO Configuration register"
|
|
bitfld.long 0x1C 16. " IFSEL ,Interface Selection bit" "Command,Data"
|
|
bitfld.long 0x1C 0.--5. " RDTHRESHOLD ,Programmable Read Threshold Of Output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "SHE_COMPARE0,Input FIFO Compare Value Register(Least significant bits of the compare register)"
|
|
line.long 0x04 "SHE_COMPARE1,Input FIFO Compare Value Register(Most significant bits of the compare register)"
|
|
hexmask.long 0x04 0.--26. 1. " COMPARE ,Most significant bits of the compare register"
|
|
rgroup.long 0x50++0x17
|
|
line.long 0x00 "SHE_COMPACC,Compare Register Access Status Register"
|
|
bitfld.long 0x00 0. " CPUEN ,CPU Write Access Enabled status flag" "Allowed,Disallowed"
|
|
line.long 0x04 "SHE_MSTSTATUS,Data Master Status Register"
|
|
bitfld.long 0x04 25.--26. " OMSTERRRESP ,Output Data Channel Master Error Response Code" "OKAY,EXOKAY,SLVERR,DECERR"
|
|
bitfld.long 0x04 24. " OMSTERR ,Output Data Channel Master Error Response flag" "No error,Error"
|
|
bitfld.long 0x04 17. " OMSTLOCK ,Output Data Channel Master Lock Enabled flag" "Unlocked,Locked"
|
|
bitfld.long 0x04 16. " OMSTIDLE ,Output Data Channel Master Idle flag" "Busy,Idle"
|
|
textline " "
|
|
bitfld.long 0x04 9.--10. " IMSTERRRESP ,Input Data Channel Master Error Response Code" "OKAY,EXOKAY,SLVERR,DECERR"
|
|
bitfld.long 0x04 8. " IMSTERR ,Input Data Channel Master Error Response flag" "No error,Error"
|
|
bitfld.long 0x04 1. " IMSTLOCK ,Input Data Channel Master Lock Enabled flag" "Unlocked,Locked"
|
|
bitfld.long 0x04 0. " IMSTIDLE ,Input Data Channel Master Idle flag" "Busy,Idle"
|
|
line.long 0x08 "SHE_IMSTERRADDR,Input Channel Master Error Response Address Register"
|
|
line.long 0x0C "SHE_OMSTERRADDR,Output Channel Master Error Response Address Register"
|
|
line.long 0x10 "SHE_FIFOSTATUS,FIFO Status Register"
|
|
bitfld.long 0x10 16. " COMPAREMATCH ,Compare Match Event flag" "No match,Match"
|
|
bitfld.long 0x10 8. " OFIFORDTH ,Output FIFO Above Threshold flag" "Below,Above"
|
|
bitfld.long 0x10 0. " IFIFOWRTH ,Input FIFO Below Threshold flag" "More,Less"
|
|
line.long 0x14 "SHE_FIFOLOAD,FIFO Load Register"
|
|
bitfld.long 0x14 24.--29. " OFIFOLOAD ,The amount of data stored in the output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x14 16.--21. " OFIFOFREE ,The amount of data which can be written into the output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x14 8.--13. " IFIFOLOAD ,The amount of data stored in the input FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x14 0.--5. " IFIFOFREE ,The amount of data which can be written into the input FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x68++0x07
|
|
line.long 0x00 "SHE_DATACNT0,Input FIFO Data Counter Register(Least significant bits of the data counter register)"
|
|
line.long 0x04 "SHE_DATACNT1,Input FIFO Data Counter Register(Most significant bits of the data counter register)"
|
|
hexmask.long 0x04 0.--26. 1. " DATACNT ,Most significant bits of the data counter register"
|
|
else
|
|
hgroup.long 0x18++0x07
|
|
hide.long 0x00 "SHE_MID,SHE Module ID Register"
|
|
hide.long 0x04 "SHE_IRQ_SET/CLR,Interrupt Request Set/Clear Register"
|
|
hgroup.long 0x28++0x1F
|
|
hide.long 0x00 "SHE_IMSTADDR,Input Channel Master Start Address Register"
|
|
hide.long 0x04 "SHE_OMSTADDR,Output Channel Master Start Address Register"
|
|
hide.long 0x08 "SHE_IMSTCNT,Input Channel Master Data Transfer Counter"
|
|
hide.long 0x0C "SHE_OMSTCNT,Output Channel Master Data Transfer Counter"
|
|
hide.long 0x10 "SHE_IMSTSTART,Input Channel Master Start Trigger"
|
|
hide.long 0x14 "SHE_OMSTSTART,Output Channel Master Start Trigger"
|
|
hide.long 0x18 "SHE_IFIFOCFG,Input FIFO Configuration Register"
|
|
hide.long 0x1C "SHE_OFIFOCFG,Output FIFO Configuration register"
|
|
hgroup.long 0x48++0x07
|
|
hide.long 0x0 "SHE_COMPARE0,Input FIFO Compare Value Register"
|
|
hide.long 0x4 "SHE_COMPARE1,Input FIFO Compare Value Register"
|
|
hgroup.long 0x50++0x17
|
|
hide.long 0x00 "SHE_COMPACC,Compare Register Access Status Register"
|
|
hide.long 0x04 "SHE_MSTSTATUS,Data Master Status Register"
|
|
hide.long 0x08 "SHE_IMSTERRADDR,Input Channel Master Error Response Address Register"
|
|
hide.long 0x0C "SHE_OMSTERRADDR,Output Channel Master Error Response Address Register"
|
|
hide.long 0x10 "SHE_FIFOSTATUS,FIFO Status Register"
|
|
hide.long 0x14 "SHE_FIFOLOAD,FIFO Load Register"
|
|
hgroup.long 0x68++0x07
|
|
hide.long 0x0 "SHE_DATACNT0,Input FIFO Data Counter Register"
|
|
hide.long 0x4 "SHE_DATACNT1,Input FIFO Data Counter Register"
|
|
endif
|
|
tree "Input FIFO Write Data Registers"
|
|
hgroup.long 0x100++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA0,Input FIFO Write Data Register 0"
|
|
in
|
|
hgroup.long 0x104++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA1,Input FIFO Write Data Register 1"
|
|
in
|
|
hgroup.long 0x108++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA2,Input FIFO Write Data Register 2"
|
|
in
|
|
hgroup.long 0x10C++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA3,Input FIFO Write Data Register 3"
|
|
in
|
|
hgroup.long 0x110++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA4,Input FIFO Write Data Register 4"
|
|
in
|
|
hgroup.long 0x114++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA5,Input FIFO Write Data Register 5"
|
|
in
|
|
hgroup.long 0x118++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA6,Input FIFO Write Data Register 6"
|
|
in
|
|
hgroup.long 0x11C++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA7,Input FIFO Write Data Register 7"
|
|
in
|
|
hgroup.long 0x120++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA8,Input FIFO Write Data Register 8"
|
|
in
|
|
hgroup.long 0x124++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA9,Input FIFO Write Data Register 9"
|
|
in
|
|
hgroup.long 0x128++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA10,Input FIFO Write Data Register 10"
|
|
in
|
|
hgroup.long 0x12C++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA11,Input FIFO Write Data Register 11"
|
|
in
|
|
hgroup.long 0x130++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA12,Input FIFO Write Data Register 12"
|
|
in
|
|
hgroup.long 0x134++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA13,Input FIFO Write Data Register 13"
|
|
in
|
|
hgroup.long 0x138++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA14,Input FIFO Write Data Register 14"
|
|
in
|
|
hgroup.long 0x13C++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA15,Input FIFO Write Data Register 15"
|
|
in
|
|
hgroup.long 0x140++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA16,Input FIFO Write Data Register 16"
|
|
in
|
|
hgroup.long 0x144++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA17,Input FIFO Write Data Register 17"
|
|
in
|
|
hgroup.long 0x148++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA18,Input FIFO Write Data Register 18"
|
|
in
|
|
hgroup.long 0x14C++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA19,Input FIFO Write Data Register 19"
|
|
in
|
|
hgroup.long 0x150++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA20,Input FIFO Write Data Register 20"
|
|
in
|
|
hgroup.long 0x154++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA21,Input FIFO Write Data Register 21"
|
|
in
|
|
hgroup.long 0x158++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA22,Input FIFO Write Data Register 22"
|
|
in
|
|
hgroup.long 0x15C++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA23,Input FIFO Write Data Register 23"
|
|
in
|
|
hgroup.long 0x160++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA24,Input FIFO Write Data Register 24"
|
|
in
|
|
hgroup.long 0x164++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA25,Input FIFO Write Data Register 25"
|
|
in
|
|
hgroup.long 0x168++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA26,Input FIFO Write Data Register 26"
|
|
in
|
|
hgroup.long 0x16C++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA27,Input FIFO Write Data Register 27"
|
|
in
|
|
hgroup.long 0x170++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA28,Input FIFO Write Data Register 28"
|
|
in
|
|
hgroup.long 0x174++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA29,Input FIFO Write Data Register 29"
|
|
in
|
|
hgroup.long 0x178++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA30,Input FIFO Write Data Register 30"
|
|
in
|
|
hgroup.long 0x17C++0x03
|
|
hide.long 0x00 "SHE_IFIFOWRDATA31,Input FIFO Write Data Register 31"
|
|
in
|
|
tree.end
|
|
tree "Output FIFO Read Data Registers"
|
|
hgroup.long 0x180++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA0,Output FIFO Read Data Register 0"
|
|
in
|
|
hgroup.long 0x184++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA1,Output FIFO Read Data Register 1"
|
|
in
|
|
hgroup.long 0x188++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA2,Output FIFO Read Data Register 2"
|
|
in
|
|
hgroup.long 0x18C++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA3,Output FIFO Read Data Register 3"
|
|
in
|
|
hgroup.long 0x190++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA4,Output FIFO Read Data Register 4"
|
|
in
|
|
hgroup.long 0x194++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA5,Output FIFO Read Data Register 5"
|
|
in
|
|
hgroup.long 0x198++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA6,Output FIFO Read Data Register 6"
|
|
in
|
|
hgroup.long 0x19C++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA7,Output FIFO Read Data Register 7"
|
|
in
|
|
hgroup.long 0x1A0++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA8,Output FIFO Read Data Register 8"
|
|
in
|
|
hgroup.long 0x1A4++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA9,Output FIFO Read Data Register 9"
|
|
in
|
|
hgroup.long 0x1A8++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA10,Output FIFO Read Data Register 10"
|
|
in
|
|
hgroup.long 0x1AC++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA11,Output FIFO Read Data Register 11"
|
|
in
|
|
hgroup.long 0x1B0++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA12,Output FIFO Read Data Register 12"
|
|
in
|
|
hgroup.long 0x1B4++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA13,Output FIFO Read Data Register 13"
|
|
in
|
|
hgroup.long 0x1B8++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA14,Output FIFO Read Data Register 14"
|
|
in
|
|
hgroup.long 0x1BC++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA15,Output FIFO Read Data Register 15"
|
|
in
|
|
hgroup.long 0x1C0++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA16,Output FIFO Read Data Register 16"
|
|
in
|
|
hgroup.long 0x1C4++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA17,Output FIFO Read Data Register 17"
|
|
in
|
|
hgroup.long 0x1C8++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA18,Output FIFO Read Data Register 18"
|
|
in
|
|
hgroup.long 0x1CC++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA19,Output FIFO Read Data Register 19"
|
|
in
|
|
hgroup.long 0x1D0++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA20,Output FIFO Read Data Register 20"
|
|
in
|
|
hgroup.long 0x1D4++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA21,Output FIFO Read Data Register 21"
|
|
in
|
|
hgroup.long 0x1D8++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA22,Output FIFO Read Data Register 22"
|
|
in
|
|
hgroup.long 0x1DC++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA23,Output FIFO Read Data Register 23"
|
|
in
|
|
hgroup.long 0x1E0++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA24,Output FIFO Read Data Register 24"
|
|
in
|
|
hgroup.long 0x1E4++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA25,Output FIFO Read Data Register 25"
|
|
in
|
|
hgroup.long 0x1E8++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA26,Output FIFO Read Data Register 26"
|
|
in
|
|
hgroup.long 0x1EC++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA27,Output FIFO Read Data Register 27"
|
|
in
|
|
hgroup.long 0x1F0++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA28,Output FIFO Read Data Register 28"
|
|
in
|
|
hgroup.long 0x1F4++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA29,Output FIFO Read Data Register 29"
|
|
in
|
|
hgroup.long 0x1F8++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA30,Output FIFO Read Data Register 30"
|
|
in
|
|
hgroup.long 0x1FC++0x03
|
|
hide.long 0x00 "SHE_OFIFORDDATA31,Output FIFO Read Data Register 31"
|
|
in
|
|
tree.end
|
|
width 0x0b
|
|
tree.end
|
|
sif cpu()=="MB9EF226"
|
|
tree "Media Local Bus Interface (MLB)"
|
|
tree "MLB0"
|
|
base ad:0xB0B10000
|
|
width 15.
|
|
textline " "
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "MLB0_DCCR,MediaLB0 Device Control Configuration Register"
|
|
bitfld.long 0x00 31. " MDE ,MediaLB Device Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LBM ,Loop-Back Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " MCS ,MediaLB Clock Select" "256Fs,512Fs,1024Fs,"
|
|
bitfld.long 0x00 27. " M5PS ,MediaLB 5-Pin Select" "3-pin,"
|
|
rbitfld.long 0x00 26. " MLK ,MediaLB Lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 25. " MLE ,MediaLB Little Endian mode" "Big,Little"
|
|
textline " "
|
|
bitfld.long 0x00 24. " MHRE ,MediaLB Hardware Reset Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MRS ,MediaLB Software Reset" "No reset,Reset"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " MDA ,MediaLB Device Address"
|
|
line.long 0x04 "MLB0_SSCR,MediaLB0 System Status Configuration Register"
|
|
bitfld.long 0x04 7. " SSRE ,System service request enable" "Disabled,Enabled"
|
|
eventfld.long 0x04 6. " SDMU ,System Detects MediaLB Unlock" "Not detected,Detected"
|
|
eventfld.long 0x04 5. " SDML ,System Detects MediaLB Lock" "Not detected,Detected"
|
|
eventfld.long 0x04 4. " SDSC ,System Detects Subcommand" "Not detected,Detected"
|
|
eventfld.long 0x04 3. " SDCS ,System Detects Channel Scan" "Not detected,Detected"
|
|
eventfld.long 0x04 2. " SDNU ,System Detects Network Unlock" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x04 1. " SDNL ,System Detects Network Lock" "Not detected,Detected"
|
|
eventfld.long 0x04 0. " SDR ,System Detects Reset" "Not detected,Detected"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "MLB0_SDCR,MediaLB0 System Data Configuration Register"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "MLB0_SMCR,MediaLB0 System Mask Configuration Register"
|
|
bitfld.long 0x00 6. " SMMU ,System Masks MediaLB Unlock" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " SMML ,System Masks MediaLB Lock" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " SMSC ,System Masks Subcommand" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " SMCS ,System Masks Channel Scan" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " SMNU ,System Masks Network Unlock" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " SMNL ,System Masks Network Lock" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SMR ,System Masks Reset" "Not masked,Masked"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "MLB0_VCCR,MediaLB0 Version Control Configuration Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " UMA ,User Major Revision Code"
|
|
hexmask.long.byte 0x00 16.--23. 1. " UMI ,User Minor Revision Code"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MMA ,MediaLB Major Revision Code"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MMI ,MediaLB Minor Revision Code"
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "MLB0_SBCR,MediaLB0 Synchronous Base Address Configuration Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SRBA ,Upper Half of Synchronous Receive Base Address for DMA mode"
|
|
hexmask.long.word 0x00 0.--15. 1. " STBA ,Upper Half of Synchronous Transmit Base Address for DMA mode"
|
|
line.long 0x04 "MLB0_ABCR,MediaLB0 Asynchronous Base Address Configuration Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " ARBA ,Upper Half of Asynchronous Receive Base Address for DMA mode"
|
|
hexmask.long.word 0x04 0.--15. 1. " ATBA ,Upper Half of Asynchronous Transmit Base Address for DMA mode"
|
|
line.long 0x08 "MLB0_CBCR,MediaLB0 Control Base Address Configuration Register"
|
|
hexmask.long.word 0x08 16.--31. 1. " CRBA ,Upper Half of Control Receive Base Address for DMA mode"
|
|
hexmask.long.word 0x08 0.--15. 1. " CTBA ,Upper Half of Control Transmit Base Address for DMA mode"
|
|
line.long 0x0C "MLB0_IBCR,MediaLB0 Isochronous Base Address Configuration Register"
|
|
hexmask.long.word 0x0C 16.--31. 1. " IRBA ,Upper Half of Isochronous Receive Base Address for DMA mode"
|
|
hexmask.long.word 0x0C 0.--15. 1. " ITBA ,Upper Half of Isochronous Transmit Base Address for DMA mode"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "MLB0_CICR,MediaLB0 Channel Interrupt Configuration Register"
|
|
bitfld.long 0x00 15. " CNSU[15] ,Channel Status Update for Channel 15" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " CNSU[14] ,Channel Status Update for Channel 14" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " CNSU[13] ,Channel Status Update for Channel 13" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " CNSU[12] ,Channel Status Update for Channel 12" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " CNSU[11] ,Channel Status Update for Channel 11" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " CNSU[10] ,Channel Status Update for Channel 10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CNSU[9] ,Channel Status Update for Channel 9" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " CNSU[8] ,Channel Status Update for Channel 8" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " CNSU[7] ,Channel Status Update for Channel 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " CNSU[6] ,Channel Status Update for Channel 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " CNSU[5] ,Channel Status Update for Channel 5" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " CNSU[4] ,Channel Status Update for Channel 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CNSU[3] ,Channel Status Update for Channel 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " CNSU[2] ,Channel Status Update for Channel 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " CNSU[1] ,Channel Status Update for Channel 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " CNSU[0] ,Channel Status Update for Channel 0" "No interrupt,Interrupt"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "MLB0_AHBMCTL,MediaLB0 AHB Master Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " MAXTRANS ,Always write 0 to this register. Read value is X"
|
|
hexmask.long.word 0x00 0.--15. 1. " MCYCNONREQ ,Always write 0 to this register. Read value is X"
|
|
tree "MediaLB Channel Configuration Registers"
|
|
if (((d.l(ad:0xB0B10040+0x0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x0))&0x40000000)==0x0)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MLB0_CECR0,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR0,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x40+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR0,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x40+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR0,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x0))&0x40000000)==0x40000000)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MLB0_CECR0,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR0,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x40+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR0,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x40+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR0,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x0))&0x40000000)==0x40000000)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MLB0_CECR0,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR0,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x40+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR0,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x40+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR0,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x0))&0x40000000)==0x00)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MLB0_CECR0,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR0,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x40+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR0,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x40+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR0,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x0))&0x40000000)==0x0)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MLB0_CECR0,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR0,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x40+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR0,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x40+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR0,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x0))&0x40000000)==0x40000000)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MLB0_CECR0,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR0,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x40+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR0,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x40+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR0,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x0))&0x40000000)==0x0)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MLB0_CECR0,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR0,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x40+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR0,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x40+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR0,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x0))&0x40000000)==0x40000000)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MLB0_CECR0,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR0,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x40+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR0,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x40+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR0,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x0))&0x40000000)==0x40000000)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MLB0_CECR0,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR0,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x40+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR0,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x40+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR0,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x0))&0x40000000)==0x00)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MLB0_CECR0,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR0,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x40+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR0,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x40+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR0,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x0))&0x40000000)==0x0)
|
|
group.long 0x40++0x07
|
|
line.long 0x00 "MLB0_CECR0,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR0,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x40+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR0,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x40+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR0,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x0))&0x40000000)==0x0)
|
|
group.long 0x40++0x07
|
|
line.long 0x00 "MLB0_CECR0,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR0,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x40+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR0,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x40+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR0,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0x10))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x10))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x10))&0x40000000)==0x0)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MLB0_CECR1,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x50+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR1,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x50+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR1,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x50+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR1,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x10))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x10))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MLB0_CECR1,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x50+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR1,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x50+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR1,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x50+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR1,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x10))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x10))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MLB0_CECR1,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x50+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR1,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x50+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR1,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x50+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR1,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x10))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x10))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x10))&0x40000000)==0x00)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MLB0_CECR1,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x50+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR1,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x50+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR1,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x50+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR1,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x10))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x10))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x10))&0x40000000)==0x0)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MLB0_CECR1,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x50+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR1,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x50+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR1,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x50+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR1,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x10))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x10))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MLB0_CECR1,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x50+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR1,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x50+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR1,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x50+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR1,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x10))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x10))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x10))&0x40000000)==0x0)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MLB0_CECR1,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x50+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR1,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x50+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR1,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x50+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR1,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x10))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x10))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MLB0_CECR1,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x50+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR1,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x50+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR1,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x50+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR1,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x10))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x10))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MLB0_CECR1,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x50+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR1,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x50+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR1,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x50+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR1,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x10))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x10))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x10))&0x40000000)==0x00)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MLB0_CECR1,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x50+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR1,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x50+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR1,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x50+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR1,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x10))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x10))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x10))&0x40000000)==0x0)
|
|
group.long 0x50++0x07
|
|
line.long 0x00 "MLB0_CECR1,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x50+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR1,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x50+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR1,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x50+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR1,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x10))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x10))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x10))&0x40000000)==0x0)
|
|
group.long 0x50++0x07
|
|
line.long 0x00 "MLB0_CECR1,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x50+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR1,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x50+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR1,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x50+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR1,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0x20))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x20))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x20))&0x40000000)==0x0)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MLB0_CECR2,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x60+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR2,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x60+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR2,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x60+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR2,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x20))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x20))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x20))&0x40000000)==0x40000000)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MLB0_CECR2,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x60+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR2,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x60+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR2,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x60+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR2,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x20))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x20))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x20))&0x40000000)==0x40000000)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MLB0_CECR2,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x60+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR2,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x60+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR2,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x60+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR2,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x20))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x20))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x20))&0x40000000)==0x00)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MLB0_CECR2,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x60+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR2,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x60+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR2,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x60+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR2,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x20))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x20))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x20))&0x40000000)==0x0)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MLB0_CECR2,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x60+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR2,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x60+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR2,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x60+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR2,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x20))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x20))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x20))&0x40000000)==0x40000000)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MLB0_CECR2,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x60+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR2,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x60+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR2,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x60+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR2,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x20))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x20))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x20))&0x40000000)==0x0)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MLB0_CECR2,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x60+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR2,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x60+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR2,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x60+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR2,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x20))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x20))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x20))&0x40000000)==0x40000000)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MLB0_CECR2,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x60+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR2,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x60+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR2,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x60+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR2,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x20))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x20))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x20))&0x40000000)==0x40000000)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MLB0_CECR2,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x60+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR2,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x60+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR2,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x60+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR2,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x20))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x20))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x20))&0x40000000)==0x00)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MLB0_CECR2,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x60+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR2,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x60+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR2,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x60+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR2,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x20))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x20))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x20))&0x40000000)==0x0)
|
|
group.long 0x60++0x07
|
|
line.long 0x00 "MLB0_CECR2,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x60+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR2,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x60+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR2,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x60+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR2,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x20))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x20))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x20))&0x40000000)==0x0)
|
|
group.long 0x60++0x07
|
|
line.long 0x00 "MLB0_CECR2,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x60+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR2,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x60+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR2,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x60+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR2,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0x30))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x30))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x30))&0x40000000)==0x0)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MLB0_CECR3,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x70+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR3,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x70+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR3,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x70+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR3,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x30))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x30))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x30))&0x40000000)==0x40000000)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MLB0_CECR3,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x70+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR3,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x70+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR3,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x70+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR3,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x30))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x30))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x30))&0x40000000)==0x40000000)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MLB0_CECR3,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x70+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR3,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x70+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR3,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x70+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR3,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x30))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x30))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x30))&0x40000000)==0x00)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MLB0_CECR3,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x70+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR3,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x70+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR3,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x70+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR3,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x30))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x30))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x30))&0x40000000)==0x0)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MLB0_CECR3,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x70+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR3,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x70+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR3,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x70+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR3,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x30))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x30))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x30))&0x40000000)==0x40000000)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MLB0_CECR3,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x70+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR3,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x70+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR3,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x70+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR3,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x30))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x30))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x30))&0x40000000)==0x0)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MLB0_CECR3,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x70+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR3,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x70+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR3,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x70+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR3,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x30))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x30))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x30))&0x40000000)==0x40000000)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MLB0_CECR3,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x70+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR3,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x70+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR3,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x70+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR3,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x30))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x30))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x30))&0x40000000)==0x40000000)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MLB0_CECR3,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x70+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR3,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x70+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR3,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x70+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR3,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x30))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x30))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x30))&0x40000000)==0x00)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MLB0_CECR3,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x70+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR3,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x70+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR3,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x70+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR3,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x30))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x30))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x30))&0x40000000)==0x0)
|
|
group.long 0x70++0x07
|
|
line.long 0x00 "MLB0_CECR3,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x70+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR3,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x70+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR3,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x70+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR3,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x30))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x30))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x30))&0x40000000)==0x0)
|
|
group.long 0x70++0x07
|
|
line.long 0x00 "MLB0_CECR3,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x70+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR3,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x70+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR3,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x70+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR3,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0x40))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x40))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x40))&0x40000000)==0x0)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MLB0_CECR4,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x80+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR4,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x80+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR4,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x80+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR4,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x40))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x40))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x40))&0x40000000)==0x40000000)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MLB0_CECR4,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x80+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR4,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x80+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR4,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x80+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR4,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x40))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x40))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x40))&0x40000000)==0x40000000)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MLB0_CECR4,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x80+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR4,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x80+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR4,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x80+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR4,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x40))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x40))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x40))&0x40000000)==0x00)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MLB0_CECR4,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x80+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR4,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x80+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR4,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x80+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR4,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x40))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x40))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x40))&0x40000000)==0x0)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MLB0_CECR4,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x80+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR4,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x80+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR4,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x80+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR4,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x40))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x40))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x40))&0x40000000)==0x40000000)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MLB0_CECR4,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x80+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR4,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x80+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR4,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x80+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR4,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x40))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x40))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x40))&0x40000000)==0x0)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MLB0_CECR4,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x80+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR4,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x80+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR4,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x80+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR4,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x40))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x40))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x40))&0x40000000)==0x40000000)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MLB0_CECR4,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x80+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR4,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x80+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR4,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x80+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR4,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x40))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x40))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x40))&0x40000000)==0x40000000)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MLB0_CECR4,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x80+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR4,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x80+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR4,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x80+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR4,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x40))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x40))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x40))&0x40000000)==0x00)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MLB0_CECR4,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x80+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR4,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x80+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR4,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x80+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR4,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x40))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x40))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x40))&0x40000000)==0x0)
|
|
group.long 0x80++0x07
|
|
line.long 0x00 "MLB0_CECR4,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x80+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR4,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x80+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR4,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x80+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR4,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x40))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x40))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x40))&0x40000000)==0x0)
|
|
group.long 0x80++0x07
|
|
line.long 0x00 "MLB0_CECR4,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x80+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR4,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x80+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR4,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x80+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR4,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0x50))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x50))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x50))&0x40000000)==0x0)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "MLB0_CECR5,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x90+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR5,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x90+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR5,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x90+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR5,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x50))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x50))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x50))&0x40000000)==0x40000000)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "MLB0_CECR5,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x90+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR5,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x90+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR5,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x90+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR5,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x50))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x50))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x50))&0x40000000)==0x40000000)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "MLB0_CECR5,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x90+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR5,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x90+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR5,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x90+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR5,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x50))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x50))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x50))&0x40000000)==0x00)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "MLB0_CECR5,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x90+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR5,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x90+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR5,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x90+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR5,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x50))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x50))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x50))&0x40000000)==0x0)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "MLB0_CECR5,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x90+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR5,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x90+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR5,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x90+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR5,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x50))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x50))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x50))&0x40000000)==0x40000000)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "MLB0_CECR5,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x90+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR5,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x90+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR5,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x90+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR5,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x50))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x50))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x50))&0x40000000)==0x0)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "MLB0_CECR5,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x90+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR5,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x90+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR5,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x90+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR5,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x50))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x50))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x50))&0x40000000)==0x40000000)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "MLB0_CECR5,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x90+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR5,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x90+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR5,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x90+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR5,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x50))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x50))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x50))&0x40000000)==0x40000000)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "MLB0_CECR5,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x90+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR5,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x90+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR5,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x90+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR5,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x50))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x50))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x50))&0x40000000)==0x00)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "MLB0_CECR5,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x90+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR5,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x90+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR5,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x90+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR5,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x50))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x50))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x50))&0x40000000)==0x0)
|
|
group.long 0x90++0x07
|
|
line.long 0x00 "MLB0_CECR5,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x90+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR5,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x90+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR5,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x90+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR5,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x50))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x50))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x50))&0x40000000)==0x0)
|
|
group.long 0x90++0x07
|
|
line.long 0x00 "MLB0_CECR5,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x90+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR5,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x90+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR5,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x90+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR5,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0x60))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x60))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x60))&0x40000000)==0x0)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "MLB0_CECR6,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR6,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xA0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR6,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xA0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR6,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x60))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x60))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x60))&0x40000000)==0x40000000)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "MLB0_CECR6,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR6,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0xA0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR6,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xA0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR6,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x60))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x60))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x60))&0x40000000)==0x40000000)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "MLB0_CECR6,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR6,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xA0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR6,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xA0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR6,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x60))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x60))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x60))&0x40000000)==0x00)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "MLB0_CECR6,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR6,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xA0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR6,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xA0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR6,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x60))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x60))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x60))&0x40000000)==0x0)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "MLB0_CECR6,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR6,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xA0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR6,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xA0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR6,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x60))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x60))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x60))&0x40000000)==0x40000000)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "MLB0_CECR6,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR6,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0xA0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR6,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xA0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR6,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x60))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x60))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x60))&0x40000000)==0x0)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "MLB0_CECR6,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR6,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xA0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR6,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xA0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR6,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x60))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x60))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x60))&0x40000000)==0x40000000)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "MLB0_CECR6,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR6,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0xA0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR6,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xA0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR6,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x60))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x60))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x60))&0x40000000)==0x40000000)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "MLB0_CECR6,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR6,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xA0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR6,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xA0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR6,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x60))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x60))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x60))&0x40000000)==0x00)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "MLB0_CECR6,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR6,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xA0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR6,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xA0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR6,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x60))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x60))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x60))&0x40000000)==0x0)
|
|
group.long 0xA0++0x07
|
|
line.long 0x00 "MLB0_CECR6,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR6,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xA0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR6,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xA0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR6,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x60))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x60))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x60))&0x40000000)==0x0)
|
|
group.long 0xA0++0x07
|
|
line.long 0x00 "MLB0_CECR6,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR6,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0xA0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR6,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xA0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR6,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0x70))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x70))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x70))&0x40000000)==0x0)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "MLB0_CECR7,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xB0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR7,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xB0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR7,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xB0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR7,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x70))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x70))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x70))&0x40000000)==0x40000000)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "MLB0_CECR7,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xB0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR7,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0xB0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR7,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xB0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR7,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x70))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x70))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x70))&0x40000000)==0x40000000)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "MLB0_CECR7,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xB0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR7,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xB0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR7,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xB0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR7,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x70))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x70))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x70))&0x40000000)==0x00)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "MLB0_CECR7,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xB0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR7,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xB0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR7,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xB0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR7,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x70))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x70))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x70))&0x40000000)==0x0)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "MLB0_CECR7,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xB0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR7,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xB0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR7,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xB0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR7,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x70))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x70))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x70))&0x40000000)==0x40000000)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "MLB0_CECR7,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xB0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR7,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0xB0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR7,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xB0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR7,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x70))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x70))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x70))&0x40000000)==0x0)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "MLB0_CECR7,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xB0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR7,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xB0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR7,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xB0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR7,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x70))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x70))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x70))&0x40000000)==0x40000000)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "MLB0_CECR7,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xB0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR7,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0xB0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR7,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xB0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR7,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x70))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x70))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x70))&0x40000000)==0x40000000)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "MLB0_CECR7,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xB0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR7,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xB0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR7,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xB0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR7,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x70))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x70))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x70))&0x40000000)==0x00)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "MLB0_CECR7,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xB0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR7,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xB0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR7,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xB0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR7,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x70))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x70))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x70))&0x40000000)==0x0)
|
|
group.long 0xB0++0x07
|
|
line.long 0x00 "MLB0_CECR7,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xB0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR7,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xB0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR7,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xB0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR7,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x70))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x70))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x70))&0x40000000)==0x0)
|
|
group.long 0xB0++0x07
|
|
line.long 0x00 "MLB0_CECR7,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xB0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR7,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0xB0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR7,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xB0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR7,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0x80))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x80))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x80))&0x40000000)==0x0)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "MLB0_CECR8,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR8,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xC0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR8,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xC0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR8,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x80))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x80))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x80))&0x40000000)==0x40000000)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "MLB0_CECR8,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR8,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0xC0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR8,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xC0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR8,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x80))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x80))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x80))&0x40000000)==0x40000000)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "MLB0_CECR8,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR8,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xC0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR8,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xC0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR8,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x80))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x80))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x80))&0x40000000)==0x00)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "MLB0_CECR8,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR8,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xC0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR8,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xC0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR8,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x80))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x80))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x80))&0x40000000)==0x0)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "MLB0_CECR8,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR8,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xC0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR8,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xC0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR8,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x80))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x80))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x80))&0x40000000)==0x40000000)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "MLB0_CECR8,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR8,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0xC0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR8,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xC0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR8,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x80))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x80))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x80))&0x40000000)==0x0)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "MLB0_CECR8,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR8,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xC0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR8,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xC0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR8,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x80))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x80))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x80))&0x40000000)==0x40000000)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "MLB0_CECR8,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR8,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0xC0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR8,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xC0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR8,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x80))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x80))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x80))&0x40000000)==0x40000000)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "MLB0_CECR8,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR8,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xC0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR8,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xC0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR8,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x80))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x80))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x80))&0x40000000)==0x00)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "MLB0_CECR8,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR8,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xC0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR8,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xC0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR8,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x80))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x80))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x80))&0x40000000)==0x0)
|
|
group.long 0xC0++0x07
|
|
line.long 0x00 "MLB0_CECR8,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR8,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xC0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR8,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xC0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR8,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x80))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x80))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x80))&0x40000000)==0x0)
|
|
group.long 0xC0++0x07
|
|
line.long 0x00 "MLB0_CECR8,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR8,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0xC0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR8,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xC0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR8,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0x90))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x90))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x90))&0x40000000)==0x0)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "MLB0_CECR9,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xD0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR9,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xD0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR9,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xD0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR9,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x90))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x90))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x90))&0x40000000)==0x40000000)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "MLB0_CECR9,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xD0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR9,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0xD0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR9,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xD0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR9,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x90))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x90))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x90))&0x40000000)==0x40000000)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "MLB0_CECR9,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xD0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR9,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xD0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR9,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xD0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR9,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x90))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x90))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x90))&0x40000000)==0x00)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "MLB0_CECR9,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xD0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR9,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xD0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR9,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xD0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR9,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x90))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x90))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x90))&0x40000000)==0x0)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "MLB0_CECR9,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xD0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR9,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xD0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR9,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xD0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR9,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x90))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x90))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0x90))&0x40000000)==0x40000000)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "MLB0_CECR9,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xD0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR9,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0xD0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR9,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xD0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR9,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x90))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x90))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x90))&0x40000000)==0x0)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "MLB0_CECR9,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xD0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR9,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xD0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR9,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xD0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR9,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x90))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0x90))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x90))&0x40000000)==0x40000000)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "MLB0_CECR9,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xD0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR9,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0xD0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR9,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xD0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR9,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x90))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x90))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x90))&0x40000000)==0x40000000)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "MLB0_CECR9,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xD0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR9,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xD0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR9,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xD0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR9,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x90))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0x90))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x90))&0x40000000)==0x00)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "MLB0_CECR9,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xD0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR9,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xD0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR9,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xD0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR9,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x90))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x90))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x90))&0x40000000)==0x0)
|
|
group.long 0xD0++0x07
|
|
line.long 0x00 "MLB0_CECR9,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xD0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR9,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xD0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR9,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xD0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR9,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0x90))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0x90))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0x90))&0x40000000)==0x0)
|
|
group.long 0xD0++0x07
|
|
line.long 0x00 "MLB0_CECR9,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xD0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR9,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0xD0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR9,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xD0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR9,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0xA0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xA0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xA0))&0x40000000)==0x0)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "MLB0_CECR10,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR10,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xE0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR10,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xE0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR10,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xA0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xA0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xA0))&0x40000000)==0x40000000)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "MLB0_CECR10,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR10,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0xE0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR10,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xE0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR10,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xA0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xA0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xA0))&0x40000000)==0x40000000)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "MLB0_CECR10,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR10,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xE0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR10,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xE0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR10,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xA0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xA0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xA0))&0x40000000)==0x00)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "MLB0_CECR10,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR10,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xE0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR10,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xE0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR10,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xA0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xA0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xA0))&0x40000000)==0x0)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "MLB0_CECR10,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR10,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xE0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR10,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xE0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR10,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xA0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xA0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xA0))&0x40000000)==0x40000000)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "MLB0_CECR10,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR10,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0xE0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR10,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xE0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR10,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xA0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xA0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xA0))&0x40000000)==0x0)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "MLB0_CECR10,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR10,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xE0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR10,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xE0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR10,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xA0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xA0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xA0))&0x40000000)==0x40000000)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "MLB0_CECR10,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR10,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0xE0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR10,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xE0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR10,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xA0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xA0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xA0))&0x40000000)==0x40000000)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "MLB0_CECR10,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR10,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xE0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR10,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xE0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR10,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xA0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xA0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xA0))&0x40000000)==0x00)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "MLB0_CECR10,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR10,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xE0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR10,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xE0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR10,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xA0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xA0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xA0))&0x40000000)==0x0)
|
|
group.long 0xE0++0x07
|
|
line.long 0x00 "MLB0_CECR10,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR10,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xE0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR10,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xE0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR10,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xA0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xA0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xA0))&0x40000000)==0x0)
|
|
group.long 0xE0++0x07
|
|
line.long 0x00 "MLB0_CECR10,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR10,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0xE0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR10,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xE0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR10,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0xB0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xB0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xB0))&0x40000000)==0x0)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "MLB0_CECR11,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xF0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR11,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xF0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR11,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xF0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR11,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xB0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xB0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xB0))&0x40000000)==0x40000000)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "MLB0_CECR11,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xF0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR11,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0xF0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR11,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xF0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR11,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xB0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xB0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xB0))&0x40000000)==0x40000000)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "MLB0_CECR11,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xF0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR11,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xF0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR11,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xF0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR11,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xB0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xB0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xB0))&0x40000000)==0x00)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "MLB0_CECR11,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xF0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR11,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xF0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR11,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xF0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR11,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xB0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xB0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xB0))&0x40000000)==0x0)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "MLB0_CECR11,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xF0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR11,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xF0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR11,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xF0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR11,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xB0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xB0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xB0))&0x40000000)==0x40000000)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "MLB0_CECR11,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xF0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR11,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0xF0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR11,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xF0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR11,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xB0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xB0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xB0))&0x40000000)==0x0)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "MLB0_CECR11,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xF0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR11,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xF0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR11,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xF0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR11,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xB0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xB0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xB0))&0x40000000)==0x40000000)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "MLB0_CECR11,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xF0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR11,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0xF0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR11,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xF0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR11,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xB0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xB0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xB0))&0x40000000)==0x40000000)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "MLB0_CECR11,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xF0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR11,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xF0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR11,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xF0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR11,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xB0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xB0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xB0))&0x40000000)==0x00)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "MLB0_CECR11,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xF0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR11,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xF0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR11,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xF0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR11,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xB0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xB0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xB0))&0x40000000)==0x0)
|
|
group.long 0xF0++0x07
|
|
line.long 0x00 "MLB0_CECR11,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xF0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR11,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0xF0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR11,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xF0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR11,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xB0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xB0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xB0))&0x40000000)==0x0)
|
|
group.long 0xF0++0x07
|
|
line.long 0x00 "MLB0_CECR11,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0xF0+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR11,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0xF0+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR11,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0xF0+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR11,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0xC0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xC0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xC0))&0x40000000)==0x0)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "MLB0_CECR12,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x100+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR12,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x100+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR12,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x100+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR12,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xC0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xC0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xC0))&0x40000000)==0x40000000)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "MLB0_CECR12,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x100+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR12,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x100+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR12,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x100+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR12,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xC0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xC0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xC0))&0x40000000)==0x40000000)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "MLB0_CECR12,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x100+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR12,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x100+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR12,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x100+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR12,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xC0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xC0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xC0))&0x40000000)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "MLB0_CECR12,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x100+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR12,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x100+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR12,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x100+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR12,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xC0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xC0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xC0))&0x40000000)==0x0)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "MLB0_CECR12,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x100+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR12,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x100+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR12,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x100+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR12,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xC0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xC0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xC0))&0x40000000)==0x40000000)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "MLB0_CECR12,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x100+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR12,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x100+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR12,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x100+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR12,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xC0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xC0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xC0))&0x40000000)==0x0)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "MLB0_CECR12,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x100+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR12,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x100+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR12,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x100+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR12,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xC0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xC0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xC0))&0x40000000)==0x40000000)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "MLB0_CECR12,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x100+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR12,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x100+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR12,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x100+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR12,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xC0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xC0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xC0))&0x40000000)==0x40000000)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "MLB0_CECR12,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x100+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR12,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x100+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR12,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x100+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR12,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xC0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xC0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xC0))&0x40000000)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "MLB0_CECR12,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x100+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR12,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x100+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR12,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x100+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR12,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xC0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xC0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xC0))&0x40000000)==0x0)
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "MLB0_CECR12,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x100+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR12,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x100+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR12,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x100+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR12,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xC0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xC0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xC0))&0x40000000)==0x0)
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "MLB0_CECR12,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x100+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR12,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x100+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR12,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x100+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR12,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0xD0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xD0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xD0))&0x40000000)==0x0)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "MLB0_CECR13,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x110+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR13,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x110+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR13,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x110+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR13,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xD0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xD0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xD0))&0x40000000)==0x40000000)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "MLB0_CECR13,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x110+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR13,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x110+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR13,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x110+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR13,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xD0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xD0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xD0))&0x40000000)==0x40000000)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "MLB0_CECR13,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x110+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR13,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x110+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR13,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x110+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR13,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xD0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xD0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xD0))&0x40000000)==0x00)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "MLB0_CECR13,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x110+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR13,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x110+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR13,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x110+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR13,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xD0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xD0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xD0))&0x40000000)==0x0)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "MLB0_CECR13,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x110+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR13,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x110+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR13,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x110+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR13,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xD0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xD0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xD0))&0x40000000)==0x40000000)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "MLB0_CECR13,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x110+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR13,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x110+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR13,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x110+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR13,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xD0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xD0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xD0))&0x40000000)==0x0)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "MLB0_CECR13,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x110+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR13,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x110+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR13,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x110+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR13,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xD0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xD0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xD0))&0x40000000)==0x40000000)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "MLB0_CECR13,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x110+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR13,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x110+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR13,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x110+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR13,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xD0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xD0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xD0))&0x40000000)==0x40000000)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "MLB0_CECR13,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x110+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR13,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x110+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR13,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x110+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR13,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xD0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xD0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xD0))&0x40000000)==0x00)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "MLB0_CECR13,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x110+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR13,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x110+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR13,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x110+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR13,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xD0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xD0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xD0))&0x40000000)==0x0)
|
|
group.long 0x110++0x07
|
|
line.long 0x00 "MLB0_CECR13,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x110+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR13,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x110+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR13,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x110+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR13,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xD0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xD0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xD0))&0x40000000)==0x0)
|
|
group.long 0x110++0x07
|
|
line.long 0x00 "MLB0_CECR13,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x110+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR13,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x110+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR13,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x110+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR13,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0xE0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xE0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xE0))&0x40000000)==0x0)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "MLB0_CECR14,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x120+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR14,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x120+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR14,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x120+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR14,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xE0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xE0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xE0))&0x40000000)==0x40000000)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "MLB0_CECR14,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x120+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR14,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x120+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR14,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x120+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR14,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xE0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xE0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xE0))&0x40000000)==0x40000000)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "MLB0_CECR14,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x120+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR14,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x120+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR14,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x120+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR14,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xE0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xE0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xE0))&0x40000000)==0x00)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "MLB0_CECR14,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x120+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR14,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x120+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR14,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x120+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR14,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xE0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xE0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xE0))&0x40000000)==0x0)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "MLB0_CECR14,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x120+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR14,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x120+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR14,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x120+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR14,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xE0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xE0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xE0))&0x40000000)==0x40000000)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "MLB0_CECR14,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x120+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR14,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x120+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR14,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x120+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR14,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xE0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xE0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xE0))&0x40000000)==0x0)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "MLB0_CECR14,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x120+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR14,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x120+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR14,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x120+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR14,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xE0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xE0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xE0))&0x40000000)==0x40000000)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "MLB0_CECR14,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x120+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR14,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x120+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR14,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x120+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR14,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xE0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xE0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xE0))&0x40000000)==0x40000000)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "MLB0_CECR14,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x120+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR14,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x120+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR14,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x120+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR14,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xE0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xE0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xE0))&0x40000000)==0x00)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "MLB0_CECR14,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x120+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR14,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x120+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR14,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x120+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR14,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xE0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xE0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xE0))&0x40000000)==0x0)
|
|
group.long 0x120++0x07
|
|
line.long 0x00 "MLB0_CECR14,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x120+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR14,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x120+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR14,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x120+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR14,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xE0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xE0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xE0))&0x40000000)==0x0)
|
|
group.long 0x120++0x07
|
|
line.long 0x00 "MLB0_CECR14,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x120+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR14,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x120+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR14,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x120+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR14,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
if (((d.l(ad:0xB0B10040+0xF0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xF0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xF0))&0x40000000)==0x0)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "MLB0_CECR15,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x130+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR15,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x130+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR15,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x130+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR15,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xF0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xF0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xF0))&0x40000000)==0x40000000)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "MLB0_CECR15,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x130+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR15,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x130+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR15,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x130+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR15,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xF0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xF0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xF0))&0x40000000)==0x40000000)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "MLB0_CECR15,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x130+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR15,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x130+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR15,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x130+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR15,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xF0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xF0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xF0))&0x40000000)==0x00)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "MLB0_CECR15,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x130+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR15,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " STS[9] ,Receive Packet Start detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Receive Packet Abort detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x130+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR15,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x130+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR15,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xF0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xF0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xF0))&0x40000000)==0x0)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "MLB0_CECR15,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x130+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR15,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x130+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR15,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x130+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR15,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xF0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xF0))&0x6000000)==0x4000000&&((d.l(ad:0xB0B10040+0xF0))&0x40000000)==0x40000000)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "MLB0_CECR15,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the transmission service request interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the reception service request interrupt or reception packet abort interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x130+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR15,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS[3] ,Transmit Service Request bit" "No effect,Requested"
|
|
eventfld.long 0x00 2. " STS[2] ,Receive Service Request bit" "No effect,Requested"
|
|
hgroup.long (0x130+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR15,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x130+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR15,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xF0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xF0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xF0))&0x40000000)==0x0)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "MLB0_CECR15,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x130+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR15,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
rbitfld.long 0x00 18.--19. " IVB ,Isochronous Valid Bytes" "CCBCR0.BCA-5,CCBCR0.BCA-4,CCBCR0.BCA-3,CCBCR0.BCA-2"
|
|
bitfld.long 0x00 17. " GIRB ,Generates the Isochronous Receive Break (GIRB)" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x130+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR15,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x130+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR15,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xF0))&0x30000000)==0x10000000)&&(((d.l(ad:0xB0B10040+0xF0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xF0))&0x40000000)==0x40000000)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "MLB0_CECR15,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FCE ,Flow Control Enable. ReceiverBusy response" ",Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
hexmask.long.byte 0x00 8.--15. 1. " IPL ,Packet Length. Number of packet bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x130+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR15,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
textline " "
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x130+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR15,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x130+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR15,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xF0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xF0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xF0))&0x40000000)==0x40000000)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "MLB0_CECR15,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x130+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR15,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x130+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR15,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x130+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR15,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xF0))&0x30000000)==(0x20000000||0x30000000))&&(((d.l(ad:0xB0B10040+0xF0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xF0))&0x40000000)==0x00)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "MLB0_CECR15,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " PCE ,Flow Control Enable. Sets whether the reception packet counter should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Packet count threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x130+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR15,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 17. " GB ,Generate Break. Enables break generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 1. " STS[1] ,Current Buffer Detect Break bit" "No effect,Break"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x130+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR15,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x130+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR15,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xF0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xF0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xF0))&0x40000000)==0x0)
|
|
group.long 0x130++0x07
|
|
line.long 0x00 "MLB0_CECR15,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x130+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR15,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 8. " STS[8] ,Previous Buffer Protocol Error detected bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
textline " "
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 0. " STS[0] ,Current Buffer Protocol Error detect bit" "No effect,Detected"
|
|
hgroup.long (0x130+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR15,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x130+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR15,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
elif (((d.l(ad:0xB0B10040+0xF0))&0x30000000)==0x0)&&(((d.l(ad:0xB0B10040+0xF0))&0x6000000)==(0x2000000||0x0)&&((d.l(ad:0xB0B10040+0xF0))&0x40000000)==0x0)
|
|
group.long 0x130++0x07
|
|
line.long 0x00 "MLB0_CECR15,MediaLB Channel Entry Configuration Register"
|
|
bitfld.long 0x00 31. " CE ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TR ,Channel Transmit Select" "Receive,Transmit"
|
|
bitfld.long 0x00 28.--29. " CT ,Channel Type Select" "Synchronous,Isochronous,Asynchronous,Control"
|
|
bitfld.long 0x00 27. " FSE ,Flow Control Enable. Sets whether the frame synchronization for the streaming channel should be enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " MDS ,Channel Mode Select" "DMA(Ping-pong),DMA(Circular),IO,"
|
|
bitfld.long 0x00 22. " MASK[6] ,Sets whether channel interrupt due to the frame sync lost should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK[4] ,Sets whether the channel interrupt due to a buffer error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " MASK[3] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
textline " "
|
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bitfld.long 0x00 18. " MASK[2] ,Masks the buffer start interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK[1] ,Sets whether the channel interrupt due to the detection of break should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK[0] ,Sets whether the channel interrupt due a protocol error should be masked" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " IPL[7] ,Frame synchronization disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " IPL[4:0] ,Sets the number of frame synchronous physical channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " CA ,Channel Address"
|
|
group.long (0x130+0x04)++0x03
|
|
line.long 0x00 "MLB0_CSCR15,MediaLB Channel Status Configuration Register"
|
|
rbitfld.long 0x00 31. " BM ,Buffer Empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 30. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 16. " RDY ,Next Buffer Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 11. " STS[11] ,Previous Buffer Start bit" "No effect,Succeed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " STS[10] ,Previous Buffer Done bit" "No effect,Succeed"
|
|
eventfld.long 0x00 9. " STS[9] ,Previous Buffer Detect Break bit" "No effect,Detected"
|
|
eventfld.long 0x00 6. " STS[6] ,Lost Frame Synchronization bit" "No effect,Lost"
|
|
eventfld.long 0x00 5. " STS[5] ,Host Bus Error detect bit" "No effect,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " STS[4] ,Buffer Underflow Error detect bit" "No effect,Detected"
|
|
eventfld.long 0x00 3. " STS[3] ,Current Buffer Start bit" "No effect,Started"
|
|
eventfld.long 0x00 2. " STS[2] ,Current Buffer Done bit" "No effect,Succeed"
|
|
hgroup.long (0x130+0x08)++0x03
|
|
hide.long 0x00 "MLB0_CCBCR15,MediaLB Channel Current Buffer Configuration Register"
|
|
in
|
|
hgroup.long (0x130+0x0C)++0x03
|
|
hide.long 0x00 "MLB0_CNBCR15,MediaLBn Channel Next Buffer Configuration Register"
|
|
in
|
|
endif
|
|
tree.end
|
|
tree "MediaLB Local Channel Buffer Configuration Registers"
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "MLB0_LCBCR0,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x284++0x03
|
|
line.long 0x00 "MLB0_LCBCR1,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x288++0x03
|
|
line.long 0x00 "MLB0_LCBCR2,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x28C++0x03
|
|
line.long 0x00 "MLB0_LCBCR3,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x290++0x03
|
|
line.long 0x00 "MLB0_LCBCR4,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x294++0x03
|
|
line.long 0x00 "MLB0_LCBCR5,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x298++0x03
|
|
line.long 0x00 "MLB0_LCBCR6,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x29C++0x03
|
|
line.long 0x00 "MLB0_LCBCR7,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x2A0++0x03
|
|
line.long 0x00 "MLB0_LCBCR8,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x2A4++0x03
|
|
line.long 0x00 "MLB0_LCBCR9,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x2A8++0x03
|
|
line.long 0x00 "MLB0_LCBCR10,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x2AC++0x03
|
|
line.long 0x00 "MLB0_LCBCR11,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x2B0++0x03
|
|
line.long 0x00 "MLB0_LCBCR12,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x2B4++0x03
|
|
line.long 0x00 "MLB0_LCBCR13,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x2B8++0x03
|
|
line.long 0x00 "MLB0_LCBCR14,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
group.long 0x2BC++0x03
|
|
line.long 0x00 "MLB0_LCBCR15,MediaLB Local Channel Buffer Configuration Register"
|
|
hexmask.long.byte 0x00 22.--28. 1. " TH ,Buffer Threshold"
|
|
hexmask.long.byte 0x00 13.--18. 1. " BD ,Buffer Depth"
|
|
hexmask.long.byte 0x00 0.--5. 1. " SA ,Buffer Start Address"
|
|
tree.end
|
|
rgroup.long 0x2fc++0x03
|
|
line.long 0x00 "MLB0_MID,MediaLB0 Module Identification Register"
|
|
width 0x0b
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
textline ""
|