16537 lines
1.1 MiB
16537 lines
1.1 MiB
; --------------------------------------------------------------------------------
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; @Title: LX61202 On-Chip Peripherals
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; @Props: Released
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; @Author: KRZ
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; @Changelog: 2025-01-10 KRZ
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; @Manufacturer: LX_SEMICON - LX Semicon Co., Ltd.
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; @Doc: Generated (TRACE32, build: 175345.), based on: LX61202.svd
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; @Core: Cortex-M4F
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; @Chip: LX61202
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; @Copyright: (C) 1989-2025 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; (C)Copyright Siliconworks CORPORATION 2020 All rights reserved
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; --------------------------------------------------------------------------------
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; $Id: perlx61202.per 19311 2025-03-31 12:37:24Z pegold $
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AUTOINDENT.ON CENTER TREE
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ENUMDELIMITER ","
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base ad:0x0
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sif (CORENAME()=="CORTEXM4F")
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tree.close "Core Registers (Cortex-M4F)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
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bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
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bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
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group.long 0x10++0x0B
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited"
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bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15"
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,ARMv7-M"
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newline
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abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC24=Cortex-M4"
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bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15"
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
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bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x07
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line.long 0x00 "HFSR,Hard Fault Status Register"
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bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
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bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
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bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
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group.long 0xD34++0x0B
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line.long 0x00 "MMFAR,MemManage Fault Address Register"
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line.long 0x04 "BFAR,BusFault Address Register"
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line.long 0x08 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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width 10.
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tree "Feature Registers"
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
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line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
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bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
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bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
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textline " "
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bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
endif
|
|
tree "ADC (Analog-to-Digital Converter)"
|
|
base ad:0x0
|
|
tree "ADC0"
|
|
base ad:0x40040800
|
|
group.long 0x0++0x2B
|
|
line.long 0x0 "COCR,Core Operation Control Register"
|
|
bitfld.long 0x0 0.--1. "ACC,ADC Core Control" "0: ADC Core off,1: ADC Core manual on,2: ADC Core auto on,?"
|
|
line.long 0x4 "CSTR,Conversion Setting Register"
|
|
bitfld.long 0x4 7. "ADST,ADC Scan Start" "0: ADC non operation,1: ADC operation"
|
|
bitfld.long 0x4 5.--6. "DRSFT,Data Register Right Shift Setting" "0: Data register shift off,?,2: Data register shift 10bit mode(2 right shift),3: Data register shift 8bit mode(4 right shift)"
|
|
newline
|
|
bitfld.long 0x4 4. "DRACEN,Data Register Auto-Clear Enable" "0: Data register auto clear disable,1: Data register auto clear enable"
|
|
bitfld.long 0x4 3. "GRAIEN,Group A Interrupt Enable" "0: Group A interrupt disable,1: Group A interrupt enable"
|
|
newline
|
|
bitfld.long 0x4 2. "GRCEN,Group C Enable" "0: Group C Disable,1: Group C Enable"
|
|
bitfld.long 0x4 0.--1. "SMS,Scan Mode Select" "0: Single Scan Mode,1: Group Scan Mode,2: Continuous Scan Mode,?"
|
|
line.long 0x8 "TR0R,Trigger Select 0 Register"
|
|
hexmask.long.byte 0x8 8.--13. 1. "TRSB,Trigger Select for Group B"
|
|
hexmask.long.byte 0x8 0.--5. 1. "TRSA,Trigger Select for Group A"
|
|
line.long 0xC "TR1R,Trigger Select 1 Register"
|
|
hexmask.long.byte 0xC 0.--5. 1. "TRSC,Trigger Select for Group C"
|
|
line.long 0x10 "TR2R,Trigger Select 2 Register"
|
|
hexmask.long.byte 0x10 12.--15. 1. "TRG_SKIP_CNT_C,Triggger skip counter C"
|
|
hexmask.long.byte 0x10 8.--11. 1. "TRG_SKIP_CNT_B,Triggger skip counter B"
|
|
newline
|
|
hexmask.long.byte 0x10 4.--7. 1. "TRG_SKIP_CNT_A,Triggger skip counter A"
|
|
bitfld.long 0x10 0.--1. "SATRGEN,Synchronous and Asynchronous Trigger Enable" "0: Hardware trigger off,1: Synchronous trigger on,?,3: Asynchronous trigger on"
|
|
line.long 0x14 "GSMR,Group Scan Management Register"
|
|
bitfld.long 0x14 5. "RSRVEN,Restart and Reservatioon Enable" "0: Reservation Disable,1: Reservation Enable"
|
|
bitfld.long 0x14 4. "GPRIEN,Group Priority Operation Enable" "0: Group Priority Operation Disable,1: Group Priority Operation Enable"
|
|
newline
|
|
bitfld.long 0x14 1. "GRCIEN,Group C Interrupt Enable" "0: Group C interrupt disable,1: Group C interrupt enable"
|
|
bitfld.long 0x14 0. "GRBIEN,Group B Interrupt Enable" "0: Group B interrupt disable,1: Group B interrupt enable"
|
|
line.long 0x18 "CCAR,Conversion Channel A Register"
|
|
bitfld.long 0x18 14. "AIN14,Channel Select 14" "0: CH14 disable,1: CH14 enable"
|
|
bitfld.long 0x18 13. "AIN13,Channel Select 13" "0: CH13 disable,1: CH13 enable"
|
|
newline
|
|
bitfld.long 0x18 12. "AIN12,Channel Select 12" "0: CH12 disable,1: CH12 enable"
|
|
bitfld.long 0x18 11. "AIN11,Channel Select 11" "0: CH11 disable,1: CH11 enable"
|
|
newline
|
|
bitfld.long 0x18 10. "AIN10,Channel Select 10" "0: CH10 disable,1: CH10 enable"
|
|
bitfld.long 0x18 9. "AIN09,Channel Select 09" "0: CH09 disable,1: CH09 enable"
|
|
newline
|
|
bitfld.long 0x18 8. "AIN08,Channel Select 08" "0: CH08 disable,1: CH08 enable"
|
|
bitfld.long 0x18 7. "AIN07,Channel Select 07" "0: CH07 disable,1: CH07 enable"
|
|
newline
|
|
bitfld.long 0x18 6. "AIN06,Channel Select 06" "0: CH06 disable,1: CH06 enable"
|
|
bitfld.long 0x18 5. "AIN05,Channel Select 05" "0: CH05 disable,1: CH05 enable"
|
|
newline
|
|
bitfld.long 0x18 4. "AIN04,Channel Select 04" "0: CH04 disable,1: CH04 enable"
|
|
bitfld.long 0x18 3. "AIN03,Channel Select 03" "0: CH03 disable,1: CH03 enable"
|
|
newline
|
|
bitfld.long 0x18 2. "AIN02,Channel Select 02" "0: CH02 disable,1: CH02 enable"
|
|
bitfld.long 0x18 1. "AIN01,Channel Select 01" "0: CH01 disable,1: CH01 enable"
|
|
newline
|
|
bitfld.long 0x18 0. "AIN00,Channel Select 00" "0: CH00 disable,1: CH00 enable"
|
|
line.long 0x1C "CCBR,Conversion Channel B Register"
|
|
bitfld.long 0x1C 14. "AIN14,Channel Select 14" "0: CH14 disable,1: CH14 enable"
|
|
bitfld.long 0x1C 13. "AIN13,Channel Select 13" "0: CH13 disable,1: CH13 enable"
|
|
newline
|
|
bitfld.long 0x1C 12. "AIN12,Channel Select 12" "0: CH12 disable,1: CH12 enable"
|
|
bitfld.long 0x1C 11. "AIN11,Channel Select 11" "0: CH11 disable,1: CH11 enable"
|
|
newline
|
|
bitfld.long 0x1C 10. "AIN10,Channel Select 10" "0: CH10 disable,1: CH10 enable"
|
|
bitfld.long 0x1C 9. "AIN09,Channel Select 09" "0: CH09 disable,1: CH09 enable"
|
|
newline
|
|
bitfld.long 0x1C 8. "AIN08,Channel Select 08" "0: CH08 disable,1: CH08 enable"
|
|
bitfld.long 0x1C 7. "AIN07,Channel Select 07" "0: CH07 disable,1: CH07 enable"
|
|
newline
|
|
bitfld.long 0x1C 6. "AIN06,Channel Select 06" "0: CH06 disable,1: CH06 enable"
|
|
bitfld.long 0x1C 5. "AIN05,Channel Select 05" "0: CH05 disable,1: CH05 enable"
|
|
newline
|
|
bitfld.long 0x1C 4. "AIN04,Channel Select 04" "0: CH04 disable,1: CH04 enable"
|
|
bitfld.long 0x1C 3. "AIN03,Channel Select 03" "0: CH03 disable,1: CH03 enable"
|
|
newline
|
|
bitfld.long 0x1C 2. "AIN02,Channel Select 02" "0: CH02 disable,1: CH02 enable"
|
|
bitfld.long 0x1C 1. "AIN01,Channel Select 01" "0: CH01 disable,1: CH01 enable"
|
|
newline
|
|
bitfld.long 0x1C 0. "AIN00,Channel Select 00" "0: CH00 disable,1: CH00 enable"
|
|
line.long 0x20 "CCCR,Conversion Channel C Register"
|
|
bitfld.long 0x20 14. "AIN14,Channel Select 14" "0: CH14 disable,1: CH14 enable"
|
|
bitfld.long 0x20 13. "AIN13,Channel Select 13" "0: CH13 disable,1: CH13 enable"
|
|
newline
|
|
bitfld.long 0x20 12. "AIN12,Channel Select 12" "0: CH12 disable,1: CH12 enable"
|
|
bitfld.long 0x20 11. "AIN11,Channel Select 11" "0: CH11 disable,1: CH11 enable"
|
|
newline
|
|
bitfld.long 0x20 10. "AIN10,Channel Select 10" "0: CH10 disable,1: CH10 enable"
|
|
bitfld.long 0x20 9. "AIN09,Channel Select 09" "0: CH09 disable,1: CH09 enable"
|
|
newline
|
|
bitfld.long 0x20 8. "AIN08,Channel Select 08" "0: CH08 disable,1: CH08 enable"
|
|
bitfld.long 0x20 7. "AIN07,Channel Select 07" "0: CH07 disable,1: CH07 enable"
|
|
newline
|
|
bitfld.long 0x20 6. "AIN06,Channel Select 06" "0: CH06 disable,1: CH06 enable"
|
|
bitfld.long 0x20 5. "AIN05,Channel Select 05" "0: CH05 disable,1: CH05 enable"
|
|
newline
|
|
bitfld.long 0x20 4. "AIN04,Channel Select 04" "0: CH04 disable,1: CH04 enable"
|
|
bitfld.long 0x20 3. "AIN03,Channel Select 03" "0: CH03 disable,1: CH03 enable"
|
|
newline
|
|
bitfld.long 0x20 2. "AIN02,Channel Select 02" "0: CH02 disable,1: CH02 enable"
|
|
bitfld.long 0x20 1. "AIN01,Channel Select 01" "0: CH01 disable,1: CH01 enable"
|
|
newline
|
|
bitfld.long 0x20 0. "AIN00,Channel Select 00" "0: CH00 disable,1: CH00 enable"
|
|
line.long 0x24 "MCCR,Multiple Conversion Channel Register"
|
|
bitfld.long 0x24 14. "AIN14,Channel Select 14" "0: CH14 disable,1: CH14 enable"
|
|
bitfld.long 0x24 13. "AIN13,Channel Select 13" "0: CH13 disable,1: CH13 enable"
|
|
newline
|
|
bitfld.long 0x24 12. "AIN12,Channel Select 12" "0: CH12 disable,1: CH12 enable"
|
|
bitfld.long 0x24 11. "AIN11,Channel Select 11" "0: CH11 disable,1: CH11 enable"
|
|
newline
|
|
bitfld.long 0x24 10. "AIN10,Channel Select 10" "0: CH10 disable,1: CH10 enable"
|
|
bitfld.long 0x24 9. "AIN09,Channel Select 09" "0: CH09 disable,1: CH09 enable"
|
|
newline
|
|
bitfld.long 0x24 8. "AIN08,Channel Select 08" "0: CH08 disable,1: CH08 enable"
|
|
bitfld.long 0x24 7. "AIN07,Channel Select 07" "0: CH07 disable,1: CH07 enable"
|
|
newline
|
|
bitfld.long 0x24 6. "AIN06,Channel Select 06" "0: CH06 disable,1: CH06 enable"
|
|
bitfld.long 0x24 5. "AIN05,Channel Select 05" "0: CH05 disable,1: CH05 enable"
|
|
newline
|
|
bitfld.long 0x24 4. "AIN04,Channel Select 04" "0: CH04 disable,1: CH04 enable"
|
|
bitfld.long 0x24 3. "AIN03,Channel Select 03" "0: CH03 disable,1: CH03 enable"
|
|
newline
|
|
bitfld.long 0x24 2. "AIN02,Channel Select 02" "0: CH02 disable,1: CH02 enable"
|
|
bitfld.long 0x24 1. "AIN01,Channel Select 01" "0: CH01 disable,1: CH01 enable"
|
|
newline
|
|
bitfld.long 0x24 0. "AIN00,Channel Select 00" "0: CH00 disable,1: CH00 enable"
|
|
line.long 0x28 "MCSR,Multiple Conversion Setting Register"
|
|
bitfld.long 0x28 7. "WDCPM,Window Compare Mode select" "0: Window Compare out of range,1: Window Compare inside range"
|
|
bitfld.long 0x28 6. "CPIEN,Compare Result Interrupt Enable" "0: Compare interrupt disable,1: Compare interrupt enable"
|
|
newline
|
|
bitfld.long 0x28 4. "MCMS,Multiple Conversion Mode Select" "0: Multi conversion addition mode,1: Multi conversion average mode"
|
|
bitfld.long 0x28 0.--2. "MCCNT,Multiple Conversion Count" "0: Multi conversion 1time,1: Multi conversion 2time,2: Multi conversion 3time,3: Multi conversion 4time,4: Multi conversion 8time,5: Multi conversion 16time,?,?"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "IRSR,Interrupt Request Status Register"
|
|
bitfld.long 0x0 3. "IRQCP,Compare Interrupt Status" "0: no event IRQ CP,1: yes event IRQ CP"
|
|
bitfld.long 0x0 2. "IRQC,Group C Interrupt Status" "0: no event IRQ C,1: yes event IRQ C"
|
|
newline
|
|
bitfld.long 0x0 1. "IRQB,Group B Interrupt Status" "0: no event IRQ B,1: yes event IRQ B"
|
|
bitfld.long 0x0 0. "IRQA,Group A Interrupt Status" "0: no event IRQ A,1: yes event IRQ A"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "IRCR,Interrupt Request Clear Register"
|
|
bitfld.long 0x0 3. "IRCPC,Interrupt CP clear" "?,1: IRQ CP clear"
|
|
bitfld.long 0x0 2. "IRCC,Interrupt C clear" "?,1: IRQ C clear"
|
|
newline
|
|
bitfld.long 0x0 1. "IRBC,Interrupt B clear" "?,1: IRQ B clear"
|
|
bitfld.long 0x0 0. "IRAC,Interrupt A clear" "?,1: IRQ A clear"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "TSSR,Sampling Time Setting Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADTSP,Sampling Time"
|
|
rgroup.long 0x40++0x3B
|
|
line.long 0x0 "DR00,Data Register 00"
|
|
bitfld.long 0x0 16.--17. "MGRP00,Measure group 0" "0,1,2,3"
|
|
hexmask.long.word 0x0 0.--15. 1. "DR00,Data 0"
|
|
line.long 0x4 "DR01,Data Register 01"
|
|
bitfld.long 0x4 16.--17. "MGRP01,Measure group 1" "0,1,2,3"
|
|
hexmask.long.word 0x4 0.--15. 1. "DR01,Data 1"
|
|
line.long 0x8 "DR02,Data Register 02"
|
|
bitfld.long 0x8 16.--17. "MGRP02,Measure group 2" "0,1,2,3"
|
|
hexmask.long.word 0x8 0.--15. 1. "DR02,Data 2"
|
|
line.long 0xC "DR03,Data Register 03"
|
|
bitfld.long 0xC 16.--17. "MGRP03,Measure group 3" "0,1,2,3"
|
|
hexmask.long.word 0xC 0.--15. 1. "DR03,Data 3"
|
|
line.long 0x10 "DR04,Data Register 04"
|
|
bitfld.long 0x10 16.--17. "MGRP04,Measure group 4" "0,1,2,3"
|
|
hexmask.long.word 0x10 0.--15. 1. "DR04,Data 4"
|
|
line.long 0x14 "DR05,Data Register 05"
|
|
bitfld.long 0x14 16.--17. "MGRP05,Measure group 5" "0,1,2,3"
|
|
hexmask.long.word 0x14 0.--15. 1. "DR05,Data 5"
|
|
line.long 0x18 "DR06,Data Register 06"
|
|
bitfld.long 0x18 16.--17. "MGRP06,Measure group 6" "0,1,2,3"
|
|
hexmask.long.word 0x18 0.--15. 1. "DR06,Data 6"
|
|
line.long 0x1C "DR07,Data Register 07"
|
|
bitfld.long 0x1C 16.--17. "MGRP07,Measure group 7" "0,1,2,3"
|
|
hexmask.long.word 0x1C 0.--15. 1. "DR07,Data 7"
|
|
line.long 0x20 "DR08,Data Register 08"
|
|
bitfld.long 0x20 16.--17. "MGRP08,Measure group 8" "0,1,2,3"
|
|
hexmask.long.word 0x20 0.--15. 1. "DR08,Data 8"
|
|
line.long 0x24 "DR09,Data Register 09"
|
|
bitfld.long 0x24 16.--17. "MGRP09,Measure group 9" "0,1,2,3"
|
|
hexmask.long.word 0x24 0.--15. 1. "DR09,Data 9"
|
|
line.long 0x28 "DR10,Data Register 10"
|
|
bitfld.long 0x28 16.--17. "MGRP10,Measure group 10" "0,1,2,3"
|
|
hexmask.long.word 0x28 0.--15. 1. "DR10,Data 10"
|
|
line.long 0x2C "DR11,Data Register 11"
|
|
bitfld.long 0x2C 16.--17. "MGRP11,Measure group 11" "0,1,2,3"
|
|
hexmask.long.word 0x2C 0.--15. 1. "DR11,Data 11"
|
|
line.long 0x30 "DR12,Data Register 12"
|
|
bitfld.long 0x30 16.--17. "MGRP12,Measure group 12" "0,1,2,3"
|
|
hexmask.long.word 0x30 0.--15. 1. "DR12,Data 12"
|
|
line.long 0x34 "DR13,Data Register 13"
|
|
bitfld.long 0x34 16.--17. "MGRP13,Measure group 13" "0,1,2,3"
|
|
hexmask.long.word 0x34 0.--15. 1. "DR13,Data 13"
|
|
line.long 0x38 "DR14,Data Register 14"
|
|
bitfld.long 0x38 16.--17. "MGRP14,Measure group 14" "0,1,2,3"
|
|
hexmask.long.word 0x38 0.--15. 1. "DR14,Data 14"
|
|
group.long 0x80++0xF
|
|
line.long 0x0 "CDR,Compare Data Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "GE_CMPD,Greater than or Equal Compare Data"
|
|
hexmask.long.word 0x0 0.--15. 1. "LE_CMPD,Less than or Equal Compare Data"
|
|
line.long 0x4 "CGESR,Compare for Greater than or Equal Select Register"
|
|
bitfld.long 0x4 14. "AIN14,Channel select 14" "0: CH14 disable,1: CH14 enable"
|
|
bitfld.long 0x4 13. "AIN13,Channel select 13" "0: CH13 disable,1: CH13 enable"
|
|
newline
|
|
bitfld.long 0x4 12. "AIN12,Channel select 12" "0: CH12 disable,1: CH12 enable"
|
|
bitfld.long 0x4 11. "AIN11,Channel select 11" "0: CH11 disable,1: CH11 enable"
|
|
newline
|
|
bitfld.long 0x4 10. "AIN10,Channel select 10" "0: CH10 disable,1: CH10 enable"
|
|
bitfld.long 0x4 9. "AIN09,Channel select 9" "0: CH09 disable,1: CH09 enable"
|
|
newline
|
|
bitfld.long 0x4 8. "AIN08,Channel select 8" "0: CH08 disable,1: CH08 enable"
|
|
bitfld.long 0x4 7. "AIN07,Channel select 7" "0: CH07 disable,1: CH07 enable"
|
|
newline
|
|
bitfld.long 0x4 6. "AIN06,Channel select 6" "0: CH06 disable,1: CH06 enable"
|
|
bitfld.long 0x4 5. "AIN05,Channel select 5" "0: CH05 disable,1: CH05 enable"
|
|
newline
|
|
bitfld.long 0x4 4. "AIN04,Channel select 4" "0: CH04 disable,1: CH04 enable"
|
|
bitfld.long 0x4 3. "AIN03,Channel select 3" "0: CH03 disable,1: CH03 enable"
|
|
newline
|
|
bitfld.long 0x4 2. "AIN02,Channel select 2" "0: CH02 disable,1: CH02 enable"
|
|
bitfld.long 0x4 1. "AIN01,Channel select 1" "0: CH01 disable,1: CH01 enable"
|
|
newline
|
|
bitfld.long 0x4 0. "AIN00,Channel select 0" "0: CH00 disable,1: CH00 enable"
|
|
line.long 0x8 "CLESR,Compare for Less than or Equal Select Register"
|
|
bitfld.long 0x8 14. "AIN14,Channel select 14" "0: CH14 disable,1: CH14 enable"
|
|
bitfld.long 0x8 13. "AIN13,Channel select 13" "0: CH13 disable,1: CH13 enable"
|
|
newline
|
|
bitfld.long 0x8 12. "AIN12,Channel select 12" "0: CH12 disable,1: CH12 enable"
|
|
bitfld.long 0x8 11. "AIN11,Channel select 11" "0: CH11 disable,1: CH11 enable"
|
|
newline
|
|
bitfld.long 0x8 10. "AIN10,Channel select 10" "0: CH10 disable,1: CH10 enable"
|
|
bitfld.long 0x8 9. "AIN09,Channel select 9" "0: CH09 disable,1: CH09 enable"
|
|
newline
|
|
bitfld.long 0x8 8. "AIN08,Channel select 8" "0: CH08 disable,1: CH08 enable"
|
|
bitfld.long 0x8 7. "AIN07,Channel select 7" "0: CH07 disable,1: CH07 enable"
|
|
newline
|
|
bitfld.long 0x8 6. "AIN06,Channel select 6" "0: CH06 disable,1: CH06 enable"
|
|
bitfld.long 0x8 5. "AIN05,Channel select 5" "0: CH05 disable,1: CH05 enable"
|
|
newline
|
|
bitfld.long 0x8 4. "AIN04,Channel select 4" "0: CH04 disable,1: CH04 enable"
|
|
bitfld.long 0x8 3. "AIN03,Channel select 3" "0: CH03 disable,1: CH03 enable"
|
|
newline
|
|
bitfld.long 0x8 2. "AIN02,Channel select 2" "0: CH02 disable,1: CH02 enable"
|
|
bitfld.long 0x8 1. "AIN01,Channel select 1" "0: CH01 disable,1: CH01 enable"
|
|
newline
|
|
bitfld.long 0x8 0. "AIN00,Channel select 0" "0: CH00 disable,1: CH00 enable"
|
|
line.long 0xC "CWDSR,Compare for Window Select Register"
|
|
bitfld.long 0xC 14. "AIN14,Channel select 14" "0: CH14 disable,1: CH14 enable"
|
|
bitfld.long 0xC 13. "AIN13,Channel select 13" "0: CH13 disable,1: CH13 enable"
|
|
newline
|
|
bitfld.long 0xC 12. "AIN12,Channel select 12" "0: CH12 disable,1: CH12 enable"
|
|
bitfld.long 0xC 11. "AIN11,Channel select 11" "0: CH11 disable,1: CH11 enable"
|
|
newline
|
|
bitfld.long 0xC 10. "AIN10,Channel select 10" "0: CH10 disable,1: CH10 enable"
|
|
bitfld.long 0xC 9. "AIN09,Channel select 9" "0: CH09 disable,1: CH09 enable"
|
|
newline
|
|
bitfld.long 0xC 8. "AIN08,Channel select 8" "0: CH08 disable,1: CH08 enable"
|
|
bitfld.long 0xC 7. "AIN07,Channel select 7" "0: CH07 disable,1: CH07 enable"
|
|
newline
|
|
bitfld.long 0xC 6. "AIN06,Channel select 6" "0: CH06 disable,1: CH06 enable"
|
|
bitfld.long 0xC 5. "AIN05,Channel select 5" "0: CH05 disable,1: CH05 enable"
|
|
newline
|
|
bitfld.long 0xC 4. "AIN04,Channel select 4" "0: CH04 disable,1: CH04 enable"
|
|
bitfld.long 0xC 3. "AIN03,Channel select 3" "0: CH03 disable,1: CH03 enable"
|
|
newline
|
|
bitfld.long 0xC 2. "AIN02,Channel select 2" "0: CH02 disable,1: CH02 enable"
|
|
bitfld.long 0xC 1. "AIN01,Channel select 1" "0: CH01 disable,1: CH01 enable"
|
|
newline
|
|
bitfld.long 0xC 0. "AIN00,Channel select 0" "0: CH00 disable,1: CH00 enable"
|
|
rgroup.long 0x90++0xB
|
|
line.long 0x0 "CGERR,Compare for Greater than or Equal Result Register"
|
|
bitfld.long 0x0 14. "GERAIN14,Channel Result 14" "0: AIN14 GE event no detect,1: AIN14 GE event detect"
|
|
bitfld.long 0x0 13. "GERAIN13,Channel Result 13" "0: AIN13 GE event no detect,1: AIN13 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 12. "GERAIN12,Channel Result 12" "0: AIN12 GE event no detect,1: AIN12 GE event detect"
|
|
bitfld.long 0x0 11. "GERAIN11,Channel Result 11" "0: AIN11 GE event no detect,1: AIN11 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 10. "GERAIN10,Channel Result 10" "0: AIN10 GE event no detect,1: AIN10 GE event detect"
|
|
bitfld.long 0x0 9. "GERAIN09,Channel Result 9" "0: AIN09 GE event no detect,1: AIN09 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 8. "GERAIN08,Channel Result 8" "0: AIN08 GE event no detect,1: AIN08 GE event detect"
|
|
bitfld.long 0x0 7. "GERAIN07,Channel Result 7" "0: AIN07 GE event no detect,1: AIN07 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 6. "GERAIN06,Channel Result 6" "0: AIN06 GE event no detect,1: AIN06 GE event detect"
|
|
bitfld.long 0x0 5. "GERAIN05,Channel Result 5" "0: AIN05 GE event no detect,1: AIN05 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 4. "GERAIN04,Channel Result 4" "0: AIN04 GE event no detect,1: AIN04 GE event detect"
|
|
bitfld.long 0x0 3. "GERAIN03,Channel Result 3" "0: AIN03 GE event no detect,1: AIN03 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 2. "GERAIN02,Channel Result 2" "0: AIN02 GE event no detect,1: AIN02 GE event detect"
|
|
bitfld.long 0x0 1. "GERAIN01,Channel Result 1" "0: AIN01 GE event no detect,1: AIN01 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 0. "GERAIN00,Channel Result 0" "0: AIN00 GE event no detect,1: AIN00 GE event detect"
|
|
line.long 0x4 "CLERR,Compare for Less than or Equal Result Register"
|
|
bitfld.long 0x4 14. "LERAIN14,Channel Result 14" "0: AIN14 LE event no detect,1: AIN14 LE event detect"
|
|
bitfld.long 0x4 13. "LERAIN13,Channel Result 13" "0: AIN13 LE event no detect,1: AIN13 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 12. "LERAIN12,Channel Result 12" "0: AIN12 LE event no detect,1: AIN12 LE event detect"
|
|
bitfld.long 0x4 11. "LERAIN11,Channel Result 11" "0: AIN11 LE event no detect,1: AIN11 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 10. "LERAIN10,Channel Result 10" "0: AIN10 LE event no detect,1: AIN10 LE event detect"
|
|
bitfld.long 0x4 9. "LERAIN09,Channel Result 9" "0: AIN09 LE event no detect,1: AIN09 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 8. "LERAIN08,Channel Result 8" "0: AIN08 LE event no detect,1: AIN08 LE event detect"
|
|
bitfld.long 0x4 7. "LERAIN07,Channel Result 7" "0: AIN07 LE event no detect,1: AIN07 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 6. "LERAIN06,Channel Result 6" "0: AIN06 LE event no detect,1: AIN06 LE event detect"
|
|
bitfld.long 0x4 5. "LERAIN05,Channel Result 5" "0: AIN05 LE event no detect,1: AIN05 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 4. "LERAIN04,Channel Result 4" "0: AIN04 LE event no detect,1: AIN04 LE event detect"
|
|
bitfld.long 0x4 3. "LERAIN03,Channel Result 3" "0: AIN03 LE event no detect,1: AIN03 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 2. "LERAIN02,Channel Result 2" "0: AIN02 LE event no detect,1: AIN02 LE event detect"
|
|
bitfld.long 0x4 1. "LERAIN01,Channel Result 1" "0: AIN01 LE event no detect,1: AIN01 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 0. "LERAIN00,Channel Result 0" "0: AIN00 LE event no detect,1: AIN00 LE event detect"
|
|
line.long 0x8 "CWDRR,Compare for Window Result Register"
|
|
bitfld.long 0x8 14. "WDRAIN14,Channel Result 14" "0: AIN14 WD event no detect,1: AIN14 WD event detect"
|
|
bitfld.long 0x8 13. "WDRAIN13,Channel Result 13" "0: AIN13 WD event no detect,1: AIN13 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 12. "WDRAIN12,Channel Result 12" "0: AIN12 WD event no detect,1: AIN12 WD event detect"
|
|
bitfld.long 0x8 11. "WDRAIN11,Channel Result 11" "0: AIN11 WD event no detect,1: AIN11 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 10. "WDRAIN10,Channel Result 10" "0: AIN10 WD event no detect,1: AIN10 WD event detect"
|
|
bitfld.long 0x8 9. "WDRAIN09,Channel Result 9" "0: AIN09 WD event no detect,1: AIN09 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 8. "WDRAIN08,Channel Result 8" "0: AIN08 WD event no detect,1: AIN08 WD event detect"
|
|
bitfld.long 0x8 7. "WDRAIN07,Channel Result 7" "0: AIN07 WD event no detect,1: AIN07 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 6. "WDRAIN06,Channel Result 6" "0: AIN06 WD event no detect,1: AIN06 WD event detect"
|
|
bitfld.long 0x8 5. "WDRAIN05,Channel Result 5" "0: AIN05 WD event no detect,1: AIN05 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 4. "WDRAIN04,Channel Result 4" "0: AIN04 WD event no detect,1: AIN04 WD event detect"
|
|
bitfld.long 0x8 3. "WDRAIN03,Channel Result 3" "0: AIN03 WD event no detect,1: AIN03 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 2. "WDRAIN02,Channel Result 2" "0: AIN02 WD event no detect,1: AIN02 WD event detect"
|
|
bitfld.long 0x8 1. "WDRAIN01,Channel Result 1" "0: AIN01 WD event no detect,1: AIN01 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 0. "WDRAIN00,Channel Result 0" "0: AIN00 WD event no detect,1: AIN00 WD event detect"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "DMASR,DMA request Select Register"
|
|
bitfld.long 0x0 0.--2. "DMASEL,DMA request Select" "0: DMA request disable,1: DMA request source group A,2: DMA request source group B,3: DMA request source group C,4: DMA request source CP,?,?,?"
|
|
rgroup.long 0xB0++0x1F
|
|
line.long 0x0 "CDR00,Combine Data Register00"
|
|
hexmask.long.word 0x0 16.--31. 1. "DR01,Data 01"
|
|
hexmask.long.word 0x0 0.--15. 1. "DR00,Data 00"
|
|
line.long 0x4 "CDR01,Combine Data Register01"
|
|
hexmask.long.word 0x4 16.--31. 1. "DR03,Data 03"
|
|
hexmask.long.word 0x4 0.--15. 1. "DR02,Data 02"
|
|
line.long 0x8 "CDR02,Combine Data Register02"
|
|
hexmask.long.word 0x8 16.--31. 1. "DR05,Data 05"
|
|
hexmask.long.word 0x8 0.--15. 1. "DR04,Data 04"
|
|
line.long 0xC "CDR03,Combine Data Register03"
|
|
hexmask.long.word 0xC 16.--31. 1. "DR07,Data 07"
|
|
hexmask.long.word 0xC 0.--15. 1. "DR06,Data 06"
|
|
line.long 0x10 "CDR04,Combine Data Register04"
|
|
hexmask.long.word 0x10 16.--31. 1. "DR09,Data 09"
|
|
hexmask.long.word 0x10 0.--15. 1. "DR08,Data 08"
|
|
line.long 0x14 "CDR05,Combine Data Register05"
|
|
hexmask.long.word 0x14 16.--31. 1. "DR11,Data 11"
|
|
hexmask.long.word 0x14 0.--15. 1. "DR10,Data 10"
|
|
line.long 0x18 "CDR06,Combine Data Register06"
|
|
hexmask.long.word 0x18 16.--31. 1. "DR13,Data 13"
|
|
hexmask.long.word 0x18 0.--15. 1. "DR12,Data 12"
|
|
line.long 0x1C "CDR07,Combine Data Register07"
|
|
hexmask.long.word 0x1C 0.--15. 1. "DR14,Data 14"
|
|
group.long 0xD0++0x3
|
|
line.long 0x0 "DBCR,Data Buffer Control Register"
|
|
hexmask.long.byte 0x0 20.--23. 1. "GCDB1_CHSEL,Group C Buffer 1 channel select"
|
|
hexmask.long.byte 0x0 16.--19. 1. "GCDB0_CHSEL,Group C Buffer 0 channel select"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "GBDB1_CHSEL,Group B Buffer 1 channel select"
|
|
hexmask.long.byte 0x0 8.--11. 1. "GBDB0_CHSEL,Group B Buffer 0 channel select"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "GADB1_CHSEL,Group A Buffer 1 channel select"
|
|
hexmask.long.byte 0x0 0.--3. 1. "GADB0_CHSEL,Group A Buffer 0 channel select"
|
|
rgroup.long 0xD4++0x17
|
|
line.long 0x0 "GADBR0,Group A Data Buffer Register 0"
|
|
hexmask.long.word 0x0 0.--15. 1. "GADBR0,Group A Data Buffer Register 0"
|
|
line.long 0x4 "GADBR1,Group A Data Buffer Register 1"
|
|
hexmask.long.word 0x4 0.--15. 1. "GADBR1,Group A Data Buffer Register 1"
|
|
line.long 0x8 "GBDBR0,Group B Data Buffer Register 0"
|
|
hexmask.long.word 0x8 0.--15. 1. "GBDBR0,Group B Data Buffer Register 0"
|
|
line.long 0xC "GBDBR1,Group B Data Buffer Register 1"
|
|
hexmask.long.word 0xC 0.--15. 1. "GBDBR1,Group B Data Buffer Register 1"
|
|
line.long 0x10 "GCDBR0,Group C Data Buffer Register 0"
|
|
hexmask.long.word 0x10 0.--15. 1. "GCDBR0,Group C Data Buffer Register 0"
|
|
line.long 0x14 "GCDBR1,Group C Data Buffer Register 1"
|
|
hexmask.long.word 0x14 0.--15. 1. "GCDBR1,Group C Data Buffer Register 1"
|
|
group.long 0xF0++0x3
|
|
line.long 0x0 "TSDR,Data-out Time Setting Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADTDO,Data-out Time"
|
|
tree.end
|
|
tree "ADC1"
|
|
base ad:0x40040900
|
|
group.long 0x0++0x2B
|
|
line.long 0x0 "COCR,Core Operation Control Register"
|
|
bitfld.long 0x0 0.--1. "ACC,ADC Core Control" "0: ADC Core off,1: ADC Core manual on,2: ADC Core auto on,?"
|
|
line.long 0x4 "CSTR,Conversion Setting Register"
|
|
bitfld.long 0x4 7. "ADST,ADC Scan Start" "0: ADC non operation,1: ADC operation"
|
|
bitfld.long 0x4 5.--6. "DRSFT,Data Register Right Shift Setting" "0: Data register shift off,?,2: Data register shift 10bit mode(2 right shift),3: Data register shift 8bit mode(4 right shift)"
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|
newline
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bitfld.long 0x4 4. "DRACEN,Data Register Auto-Clear Enable" "0: Data register auto clear disable,1: Data register auto clear enable"
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|
bitfld.long 0x4 3. "GRAIEN,Group A Interrupt Enable" "0: Group A interrupt disable,1: Group A interrupt enable"
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|
newline
|
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bitfld.long 0x4 2. "GRCEN,Group C Enable" "0: Group C Disable,1: Group C Enable"
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|
bitfld.long 0x4 0.--1. "SMS,Scan Mode Select" "0: Single Scan Mode,1: Group Scan Mode,2: Continuous Scan Mode,?"
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|
line.long 0x8 "TR0R,Trigger Select 0 Register"
|
|
hexmask.long.byte 0x8 8.--13. 1. "TRSB,Trigger Select for Group B"
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hexmask.long.byte 0x8 0.--5. 1. "TRSA,Trigger Select for Group A"
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line.long 0xC "TR1R,Trigger Select 1 Register"
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hexmask.long.byte 0xC 0.--5. 1. "TRSC,Trigger Select for Group C"
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line.long 0x10 "TR2R,Trigger Select 2 Register"
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|
hexmask.long.byte 0x10 12.--15. 1. "TRG_SKIP_CNT_C,Triggger skip counter C"
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hexmask.long.byte 0x10 8.--11. 1. "TRG_SKIP_CNT_B,Triggger skip counter B"
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newline
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hexmask.long.byte 0x10 4.--7. 1. "TRG_SKIP_CNT_A,Triggger skip counter A"
|
|
bitfld.long 0x10 0.--1. "SATRGEN,Synchronous and Asynchronous Trigger Enable" "0: Hardware trigger off,1: Synchronous trigger on,?,3: Asynchronous trigger on"
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line.long 0x14 "GSMR,Group Scan Management Register"
|
|
bitfld.long 0x14 5. "RSRVEN,Restart and Reservatioon Enable" "0: Reservation Disable,1: Reservation Enable"
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bitfld.long 0x14 4. "GPRIEN,Group Priority Operation Enable" "0: Group Priority Operation Disable,1: Group Priority Operation Enable"
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newline
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bitfld.long 0x14 1. "GRCIEN,Group C Interrupt Enable" "0: Group C interrupt disable,1: Group C interrupt enable"
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bitfld.long 0x14 0. "GRBIEN,Group B Interrupt Enable" "0: Group B interrupt disable,1: Group B interrupt enable"
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line.long 0x18 "CCAR,Conversion Channel A Register"
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bitfld.long 0x18 14. "AIN14,Channel Select 14" "0: CH14 disable,1: CH14 enable"
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bitfld.long 0x18 13. "AIN13,Channel Select 13" "0: CH13 disable,1: CH13 enable"
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newline
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bitfld.long 0x18 12. "AIN12,Channel Select 12" "0: CH12 disable,1: CH12 enable"
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bitfld.long 0x18 11. "AIN11,Channel Select 11" "0: CH11 disable,1: CH11 enable"
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newline
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bitfld.long 0x18 10. "AIN10,Channel Select 10" "0: CH10 disable,1: CH10 enable"
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bitfld.long 0x18 9. "AIN09,Channel Select 09" "0: CH09 disable,1: CH09 enable"
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newline
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bitfld.long 0x18 8. "AIN08,Channel Select 08" "0: CH08 disable,1: CH08 enable"
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bitfld.long 0x18 7. "AIN07,Channel Select 07" "0: CH07 disable,1: CH07 enable"
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newline
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bitfld.long 0x18 6. "AIN06,Channel Select 06" "0: CH06 disable,1: CH06 enable"
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bitfld.long 0x18 5. "AIN05,Channel Select 05" "0: CH05 disable,1: CH05 enable"
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newline
|
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bitfld.long 0x18 4. "AIN04,Channel Select 04" "0: CH04 disable,1: CH04 enable"
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bitfld.long 0x18 3. "AIN03,Channel Select 03" "0: CH03 disable,1: CH03 enable"
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newline
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bitfld.long 0x18 2. "AIN02,Channel Select 02" "0: CH02 disable,1: CH02 enable"
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bitfld.long 0x18 1. "AIN01,Channel Select 01" "0: CH01 disable,1: CH01 enable"
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newline
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bitfld.long 0x18 0. "AIN00,Channel Select 00" "0: CH00 disable,1: CH00 enable"
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line.long 0x1C "CCBR,Conversion Channel B Register"
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bitfld.long 0x1C 14. "AIN14,Channel Select 14" "0: CH14 disable,1: CH14 enable"
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bitfld.long 0x1C 13. "AIN13,Channel Select 13" "0: CH13 disable,1: CH13 enable"
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newline
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bitfld.long 0x1C 12. "AIN12,Channel Select 12" "0: CH12 disable,1: CH12 enable"
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bitfld.long 0x1C 11. "AIN11,Channel Select 11" "0: CH11 disable,1: CH11 enable"
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newline
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bitfld.long 0x1C 10. "AIN10,Channel Select 10" "0: CH10 disable,1: CH10 enable"
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bitfld.long 0x1C 9. "AIN09,Channel Select 09" "0: CH09 disable,1: CH09 enable"
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newline
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bitfld.long 0x1C 8. "AIN08,Channel Select 08" "0: CH08 disable,1: CH08 enable"
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bitfld.long 0x1C 7. "AIN07,Channel Select 07" "0: CH07 disable,1: CH07 enable"
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newline
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bitfld.long 0x1C 6. "AIN06,Channel Select 06" "0: CH06 disable,1: CH06 enable"
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bitfld.long 0x1C 5. "AIN05,Channel Select 05" "0: CH05 disable,1: CH05 enable"
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newline
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bitfld.long 0x1C 4. "AIN04,Channel Select 04" "0: CH04 disable,1: CH04 enable"
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bitfld.long 0x1C 3. "AIN03,Channel Select 03" "0: CH03 disable,1: CH03 enable"
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newline
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bitfld.long 0x1C 2. "AIN02,Channel Select 02" "0: CH02 disable,1: CH02 enable"
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bitfld.long 0x1C 1. "AIN01,Channel Select 01" "0: CH01 disable,1: CH01 enable"
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newline
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bitfld.long 0x1C 0. "AIN00,Channel Select 00" "0: CH00 disable,1: CH00 enable"
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line.long 0x20 "CCCR,Conversion Channel C Register"
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bitfld.long 0x20 14. "AIN14,Channel Select 14" "0: CH14 disable,1: CH14 enable"
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|
bitfld.long 0x20 13. "AIN13,Channel Select 13" "0: CH13 disable,1: CH13 enable"
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newline
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bitfld.long 0x20 12. "AIN12,Channel Select 12" "0: CH12 disable,1: CH12 enable"
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bitfld.long 0x20 11. "AIN11,Channel Select 11" "0: CH11 disable,1: CH11 enable"
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newline
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bitfld.long 0x20 10. "AIN10,Channel Select 10" "0: CH10 disable,1: CH10 enable"
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bitfld.long 0x20 9. "AIN09,Channel Select 09" "0: CH09 disable,1: CH09 enable"
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newline
|
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bitfld.long 0x20 8. "AIN08,Channel Select 08" "0: CH08 disable,1: CH08 enable"
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|
bitfld.long 0x20 7. "AIN07,Channel Select 07" "0: CH07 disable,1: CH07 enable"
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newline
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bitfld.long 0x20 6. "AIN06,Channel Select 06" "0: CH06 disable,1: CH06 enable"
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bitfld.long 0x20 5. "AIN05,Channel Select 05" "0: CH05 disable,1: CH05 enable"
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newline
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bitfld.long 0x20 4. "AIN04,Channel Select 04" "0: CH04 disable,1: CH04 enable"
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|
bitfld.long 0x20 3. "AIN03,Channel Select 03" "0: CH03 disable,1: CH03 enable"
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newline
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bitfld.long 0x20 2. "AIN02,Channel Select 02" "0: CH02 disable,1: CH02 enable"
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bitfld.long 0x20 1. "AIN01,Channel Select 01" "0: CH01 disable,1: CH01 enable"
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newline
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bitfld.long 0x20 0. "AIN00,Channel Select 00" "0: CH00 disable,1: CH00 enable"
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|
line.long 0x24 "MCCR,Multiple Conversion Channel Register"
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|
bitfld.long 0x24 14. "AIN14,Channel Select 14" "0: CH14 disable,1: CH14 enable"
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|
bitfld.long 0x24 13. "AIN13,Channel Select 13" "0: CH13 disable,1: CH13 enable"
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|
newline
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bitfld.long 0x24 12. "AIN12,Channel Select 12" "0: CH12 disable,1: CH12 enable"
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|
bitfld.long 0x24 11. "AIN11,Channel Select 11" "0: CH11 disable,1: CH11 enable"
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|
newline
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bitfld.long 0x24 10. "AIN10,Channel Select 10" "0: CH10 disable,1: CH10 enable"
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|
bitfld.long 0x24 9. "AIN09,Channel Select 09" "0: CH09 disable,1: CH09 enable"
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newline
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bitfld.long 0x24 8. "AIN08,Channel Select 08" "0: CH08 disable,1: CH08 enable"
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|
bitfld.long 0x24 7. "AIN07,Channel Select 07" "0: CH07 disable,1: CH07 enable"
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|
newline
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bitfld.long 0x24 6. "AIN06,Channel Select 06" "0: CH06 disable,1: CH06 enable"
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|
bitfld.long 0x24 5. "AIN05,Channel Select 05" "0: CH05 disable,1: CH05 enable"
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newline
|
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bitfld.long 0x24 4. "AIN04,Channel Select 04" "0: CH04 disable,1: CH04 enable"
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|
bitfld.long 0x24 3. "AIN03,Channel Select 03" "0: CH03 disable,1: CH03 enable"
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newline
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bitfld.long 0x24 2. "AIN02,Channel Select 02" "0: CH02 disable,1: CH02 enable"
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bitfld.long 0x24 1. "AIN01,Channel Select 01" "0: CH01 disable,1: CH01 enable"
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newline
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bitfld.long 0x24 0. "AIN00,Channel Select 00" "0: CH00 disable,1: CH00 enable"
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line.long 0x28 "MCSR,Multiple Conversion Setting Register"
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bitfld.long 0x28 7. "WDCPM,Window Compare Mode select" "0: Window Compare out of range,1: Window Compare inside range"
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bitfld.long 0x28 6. "CPIEN,Compare Result Interrupt Enable" "0: Compare interrupt disable,1: Compare interrupt enable"
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newline
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bitfld.long 0x28 4. "MCMS,Multiple Conversion Mode Select" "0: Multi conversion addition mode,1: Multi conversion average mode"
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bitfld.long 0x28 0.--2. "MCCNT,Multiple Conversion Count" "0: Multi conversion 1time,1: Multi conversion 2time,2: Multi conversion 3time,3: Multi conversion 4time,4: Multi conversion 8time,5: Multi conversion 16time,?,?"
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rgroup.long 0x2C++0x3
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line.long 0x0 "IRSR,Interrupt Request Status Register"
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bitfld.long 0x0 3. "IRQCP,Compare Interrupt Status" "0: no event IRQ CP,1: yes event IRQ CP"
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bitfld.long 0x0 2. "IRQC,Group C Interrupt Status" "0: no event IRQ C,1: yes event IRQ C"
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newline
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bitfld.long 0x0 1. "IRQB,Group B Interrupt Status" "0: no event IRQ B,1: yes event IRQ B"
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bitfld.long 0x0 0. "IRQA,Group A Interrupt Status" "0: no event IRQ A,1: yes event IRQ A"
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wgroup.long 0x30++0x3
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line.long 0x0 "IRCR,Interrupt Request Clear Register"
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bitfld.long 0x0 3. "IRCPC,Interrupt CP clear" "?,1: IRQ CP clear"
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bitfld.long 0x0 2. "IRCC,Interrupt C clear" "?,1: IRQ C clear"
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newline
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bitfld.long 0x0 1. "IRBC,Interrupt B clear" "?,1: IRQ B clear"
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bitfld.long 0x0 0. "IRAC,Interrupt A clear" "?,1: IRQ A clear"
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group.long 0x34++0x3
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line.long 0x0 "TSSR,Sampling Time Setting Register"
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hexmask.long.byte 0x0 0.--7. 1. "ADTSP,Sampling Time"
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rgroup.long 0x40++0x3B
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line.long 0x0 "DR00,Data Register 00"
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bitfld.long 0x0 16.--17. "MGRP00,Measure group 0" "0,1,2,3"
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hexmask.long.word 0x0 0.--15. 1. "DR00,Data 0"
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line.long 0x4 "DR01,Data Register 01"
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bitfld.long 0x4 16.--17. "MGRP01,Measure group 1" "0,1,2,3"
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hexmask.long.word 0x4 0.--15. 1. "DR01,Data 1"
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line.long 0x8 "DR02,Data Register 02"
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bitfld.long 0x8 16.--17. "MGRP02,Measure group 2" "0,1,2,3"
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hexmask.long.word 0x8 0.--15. 1. "DR02,Data 2"
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line.long 0xC "DR03,Data Register 03"
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bitfld.long 0xC 16.--17. "MGRP03,Measure group 3" "0,1,2,3"
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hexmask.long.word 0xC 0.--15. 1. "DR03,Data 3"
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line.long 0x10 "DR04,Data Register 04"
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bitfld.long 0x10 16.--17. "MGRP04,Measure group 4" "0,1,2,3"
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hexmask.long.word 0x10 0.--15. 1. "DR04,Data 4"
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line.long 0x14 "DR05,Data Register 05"
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bitfld.long 0x14 16.--17. "MGRP05,Measure group 5" "0,1,2,3"
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hexmask.long.word 0x14 0.--15. 1. "DR05,Data 5"
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line.long 0x18 "DR06,Data Register 06"
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bitfld.long 0x18 16.--17. "MGRP06,Measure group 6" "0,1,2,3"
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hexmask.long.word 0x18 0.--15. 1. "DR06,Data 6"
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line.long 0x1C "DR07,Data Register 07"
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bitfld.long 0x1C 16.--17. "MGRP07,Measure group 7" "0,1,2,3"
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hexmask.long.word 0x1C 0.--15. 1. "DR07,Data 7"
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line.long 0x20 "DR08,Data Register 08"
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bitfld.long 0x20 16.--17. "MGRP08,Measure group 8" "0,1,2,3"
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hexmask.long.word 0x20 0.--15. 1. "DR08,Data 8"
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line.long 0x24 "DR09,Data Register 09"
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bitfld.long 0x24 16.--17. "MGRP09,Measure group 9" "0,1,2,3"
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hexmask.long.word 0x24 0.--15. 1. "DR09,Data 9"
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line.long 0x28 "DR10,Data Register 10"
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bitfld.long 0x28 16.--17. "MGRP10,Measure group 10" "0,1,2,3"
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hexmask.long.word 0x28 0.--15. 1. "DR10,Data 10"
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line.long 0x2C "DR11,Data Register 11"
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bitfld.long 0x2C 16.--17. "MGRP11,Measure group 11" "0,1,2,3"
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hexmask.long.word 0x2C 0.--15. 1. "DR11,Data 11"
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line.long 0x30 "DR12,Data Register 12"
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bitfld.long 0x30 16.--17. "MGRP12,Measure group 12" "0,1,2,3"
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hexmask.long.word 0x30 0.--15. 1. "DR12,Data 12"
|
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line.long 0x34 "DR13,Data Register 13"
|
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bitfld.long 0x34 16.--17. "MGRP13,Measure group 13" "0,1,2,3"
|
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hexmask.long.word 0x34 0.--15. 1. "DR13,Data 13"
|
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line.long 0x38 "DR14,Data Register 14"
|
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bitfld.long 0x38 16.--17. "MGRP14,Measure group 14" "0,1,2,3"
|
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hexmask.long.word 0x38 0.--15. 1. "DR14,Data 14"
|
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group.long 0x80++0xF
|
|
line.long 0x0 "CDR,Compare Data Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "GE_CMPD,Greater than or Equal Compare Data"
|
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hexmask.long.word 0x0 0.--15. 1. "LE_CMPD,Less than or Equal Compare Data"
|
|
line.long 0x4 "CGESR,Compare for Greater than or Equal Select Register"
|
|
bitfld.long 0x4 14. "AIN14,Channel select 14" "0: CH14 disable,1: CH14 enable"
|
|
bitfld.long 0x4 13. "AIN13,Channel select 13" "0: CH13 disable,1: CH13 enable"
|
|
newline
|
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bitfld.long 0x4 12. "AIN12,Channel select 12" "0: CH12 disable,1: CH12 enable"
|
|
bitfld.long 0x4 11. "AIN11,Channel select 11" "0: CH11 disable,1: CH11 enable"
|
|
newline
|
|
bitfld.long 0x4 10. "AIN10,Channel select 10" "0: CH10 disable,1: CH10 enable"
|
|
bitfld.long 0x4 9. "AIN09,Channel select 9" "0: CH09 disable,1: CH09 enable"
|
|
newline
|
|
bitfld.long 0x4 8. "AIN08,Channel select 8" "0: CH08 disable,1: CH08 enable"
|
|
bitfld.long 0x4 7. "AIN07,Channel select 7" "0: CH07 disable,1: CH07 enable"
|
|
newline
|
|
bitfld.long 0x4 6. "AIN06,Channel select 6" "0: CH06 disable,1: CH06 enable"
|
|
bitfld.long 0x4 5. "AIN05,Channel select 5" "0: CH05 disable,1: CH05 enable"
|
|
newline
|
|
bitfld.long 0x4 4. "AIN04,Channel select 4" "0: CH04 disable,1: CH04 enable"
|
|
bitfld.long 0x4 3. "AIN03,Channel select 3" "0: CH03 disable,1: CH03 enable"
|
|
newline
|
|
bitfld.long 0x4 2. "AIN02,Channel select 2" "0: CH02 disable,1: CH02 enable"
|
|
bitfld.long 0x4 1. "AIN01,Channel select 1" "0: CH01 disable,1: CH01 enable"
|
|
newline
|
|
bitfld.long 0x4 0. "AIN00,Channel select 0" "0: CH00 disable,1: CH00 enable"
|
|
line.long 0x8 "CLESR,Compare for Less than or Equal Select Register"
|
|
bitfld.long 0x8 14. "AIN14,Channel select 14" "0: CH14 disable,1: CH14 enable"
|
|
bitfld.long 0x8 13. "AIN13,Channel select 13" "0: CH13 disable,1: CH13 enable"
|
|
newline
|
|
bitfld.long 0x8 12. "AIN12,Channel select 12" "0: CH12 disable,1: CH12 enable"
|
|
bitfld.long 0x8 11. "AIN11,Channel select 11" "0: CH11 disable,1: CH11 enable"
|
|
newline
|
|
bitfld.long 0x8 10. "AIN10,Channel select 10" "0: CH10 disable,1: CH10 enable"
|
|
bitfld.long 0x8 9. "AIN09,Channel select 9" "0: CH09 disable,1: CH09 enable"
|
|
newline
|
|
bitfld.long 0x8 8. "AIN08,Channel select 8" "0: CH08 disable,1: CH08 enable"
|
|
bitfld.long 0x8 7. "AIN07,Channel select 7" "0: CH07 disable,1: CH07 enable"
|
|
newline
|
|
bitfld.long 0x8 6. "AIN06,Channel select 6" "0: CH06 disable,1: CH06 enable"
|
|
bitfld.long 0x8 5. "AIN05,Channel select 5" "0: CH05 disable,1: CH05 enable"
|
|
newline
|
|
bitfld.long 0x8 4. "AIN04,Channel select 4" "0: CH04 disable,1: CH04 enable"
|
|
bitfld.long 0x8 3. "AIN03,Channel select 3" "0: CH03 disable,1: CH03 enable"
|
|
newline
|
|
bitfld.long 0x8 2. "AIN02,Channel select 2" "0: CH02 disable,1: CH02 enable"
|
|
bitfld.long 0x8 1. "AIN01,Channel select 1" "0: CH01 disable,1: CH01 enable"
|
|
newline
|
|
bitfld.long 0x8 0. "AIN00,Channel select 0" "0: CH00 disable,1: CH00 enable"
|
|
line.long 0xC "CWDSR,Compare for Window Select Register"
|
|
bitfld.long 0xC 14. "AIN14,Channel select 14" "0: CH14 disable,1: CH14 enable"
|
|
bitfld.long 0xC 13. "AIN13,Channel select 13" "0: CH13 disable,1: CH13 enable"
|
|
newline
|
|
bitfld.long 0xC 12. "AIN12,Channel select 12" "0: CH12 disable,1: CH12 enable"
|
|
bitfld.long 0xC 11. "AIN11,Channel select 11" "0: CH11 disable,1: CH11 enable"
|
|
newline
|
|
bitfld.long 0xC 10. "AIN10,Channel select 10" "0: CH10 disable,1: CH10 enable"
|
|
bitfld.long 0xC 9. "AIN09,Channel select 9" "0: CH09 disable,1: CH09 enable"
|
|
newline
|
|
bitfld.long 0xC 8. "AIN08,Channel select 8" "0: CH08 disable,1: CH08 enable"
|
|
bitfld.long 0xC 7. "AIN07,Channel select 7" "0: CH07 disable,1: CH07 enable"
|
|
newline
|
|
bitfld.long 0xC 6. "AIN06,Channel select 6" "0: CH06 disable,1: CH06 enable"
|
|
bitfld.long 0xC 5. "AIN05,Channel select 5" "0: CH05 disable,1: CH05 enable"
|
|
newline
|
|
bitfld.long 0xC 4. "AIN04,Channel select 4" "0: CH04 disable,1: CH04 enable"
|
|
bitfld.long 0xC 3. "AIN03,Channel select 3" "0: CH03 disable,1: CH03 enable"
|
|
newline
|
|
bitfld.long 0xC 2. "AIN02,Channel select 2" "0: CH02 disable,1: CH02 enable"
|
|
bitfld.long 0xC 1. "AIN01,Channel select 1" "0: CH01 disable,1: CH01 enable"
|
|
newline
|
|
bitfld.long 0xC 0. "AIN00,Channel select 0" "0: CH00 disable,1: CH00 enable"
|
|
rgroup.long 0x90++0xB
|
|
line.long 0x0 "CGERR,Compare for Greater than or Equal Result Register"
|
|
bitfld.long 0x0 14. "GERAIN14,Channel Result 14" "0: AIN14 GE event no detect,1: AIN14 GE event detect"
|
|
bitfld.long 0x0 13. "GERAIN13,Channel Result 13" "0: AIN13 GE event no detect,1: AIN13 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 12. "GERAIN12,Channel Result 12" "0: AIN12 GE event no detect,1: AIN12 GE event detect"
|
|
bitfld.long 0x0 11. "GERAIN11,Channel Result 11" "0: AIN11 GE event no detect,1: AIN11 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 10. "GERAIN10,Channel Result 10" "0: AIN10 GE event no detect,1: AIN10 GE event detect"
|
|
bitfld.long 0x0 9. "GERAIN09,Channel Result 9" "0: AIN09 GE event no detect,1: AIN09 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 8. "GERAIN08,Channel Result 8" "0: AIN08 GE event no detect,1: AIN08 GE event detect"
|
|
bitfld.long 0x0 7. "GERAIN07,Channel Result 7" "0: AIN07 GE event no detect,1: AIN07 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 6. "GERAIN06,Channel Result 6" "0: AIN06 GE event no detect,1: AIN06 GE event detect"
|
|
bitfld.long 0x0 5. "GERAIN05,Channel Result 5" "0: AIN05 GE event no detect,1: AIN05 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 4. "GERAIN04,Channel Result 4" "0: AIN04 GE event no detect,1: AIN04 GE event detect"
|
|
bitfld.long 0x0 3. "GERAIN03,Channel Result 3" "0: AIN03 GE event no detect,1: AIN03 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 2. "GERAIN02,Channel Result 2" "0: AIN02 GE event no detect,1: AIN02 GE event detect"
|
|
bitfld.long 0x0 1. "GERAIN01,Channel Result 1" "0: AIN01 GE event no detect,1: AIN01 GE event detect"
|
|
newline
|
|
bitfld.long 0x0 0. "GERAIN00,Channel Result 0" "0: AIN00 GE event no detect,1: AIN00 GE event detect"
|
|
line.long 0x4 "CLERR,Compare for Less than or Equal Result Register"
|
|
bitfld.long 0x4 14. "LERAIN14,Channel Result 14" "0: AIN14 LE event no detect,1: AIN14 LE event detect"
|
|
bitfld.long 0x4 13. "LERAIN13,Channel Result 13" "0: AIN13 LE event no detect,1: AIN13 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 12. "LERAIN12,Channel Result 12" "0: AIN12 LE event no detect,1: AIN12 LE event detect"
|
|
bitfld.long 0x4 11. "LERAIN11,Channel Result 11" "0: AIN11 LE event no detect,1: AIN11 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 10. "LERAIN10,Channel Result 10" "0: AIN10 LE event no detect,1: AIN10 LE event detect"
|
|
bitfld.long 0x4 9. "LERAIN09,Channel Result 9" "0: AIN09 LE event no detect,1: AIN09 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 8. "LERAIN08,Channel Result 8" "0: AIN08 LE event no detect,1: AIN08 LE event detect"
|
|
bitfld.long 0x4 7. "LERAIN07,Channel Result 7" "0: AIN07 LE event no detect,1: AIN07 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 6. "LERAIN06,Channel Result 6" "0: AIN06 LE event no detect,1: AIN06 LE event detect"
|
|
bitfld.long 0x4 5. "LERAIN05,Channel Result 5" "0: AIN05 LE event no detect,1: AIN05 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 4. "LERAIN04,Channel Result 4" "0: AIN04 LE event no detect,1: AIN04 LE event detect"
|
|
bitfld.long 0x4 3. "LERAIN03,Channel Result 3" "0: AIN03 LE event no detect,1: AIN03 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 2. "LERAIN02,Channel Result 2" "0: AIN02 LE event no detect,1: AIN02 LE event detect"
|
|
bitfld.long 0x4 1. "LERAIN01,Channel Result 1" "0: AIN01 LE event no detect,1: AIN01 LE event detect"
|
|
newline
|
|
bitfld.long 0x4 0. "LERAIN00,Channel Result 0" "0: AIN00 LE event no detect,1: AIN00 LE event detect"
|
|
line.long 0x8 "CWDRR,Compare for Window Result Register"
|
|
bitfld.long 0x8 14. "WDRAIN14,Channel Result 14" "0: AIN14 WD event no detect,1: AIN14 WD event detect"
|
|
bitfld.long 0x8 13. "WDRAIN13,Channel Result 13" "0: AIN13 WD event no detect,1: AIN13 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 12. "WDRAIN12,Channel Result 12" "0: AIN12 WD event no detect,1: AIN12 WD event detect"
|
|
bitfld.long 0x8 11. "WDRAIN11,Channel Result 11" "0: AIN11 WD event no detect,1: AIN11 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 10. "WDRAIN10,Channel Result 10" "0: AIN10 WD event no detect,1: AIN10 WD event detect"
|
|
bitfld.long 0x8 9. "WDRAIN09,Channel Result 9" "0: AIN09 WD event no detect,1: AIN09 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 8. "WDRAIN08,Channel Result 8" "0: AIN08 WD event no detect,1: AIN08 WD event detect"
|
|
bitfld.long 0x8 7. "WDRAIN07,Channel Result 7" "0: AIN07 WD event no detect,1: AIN07 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 6. "WDRAIN06,Channel Result 6" "0: AIN06 WD event no detect,1: AIN06 WD event detect"
|
|
bitfld.long 0x8 5. "WDRAIN05,Channel Result 5" "0: AIN05 WD event no detect,1: AIN05 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 4. "WDRAIN04,Channel Result 4" "0: AIN04 WD event no detect,1: AIN04 WD event detect"
|
|
bitfld.long 0x8 3. "WDRAIN03,Channel Result 3" "0: AIN03 WD event no detect,1: AIN03 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 2. "WDRAIN02,Channel Result 2" "0: AIN02 WD event no detect,1: AIN02 WD event detect"
|
|
bitfld.long 0x8 1. "WDRAIN01,Channel Result 1" "0: AIN01 WD event no detect,1: AIN01 WD event detect"
|
|
newline
|
|
bitfld.long 0x8 0. "WDRAIN00,Channel Result 0" "0: AIN00 WD event no detect,1: AIN00 WD event detect"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "DMASR,DMA request Select Register"
|
|
bitfld.long 0x0 0.--2. "DMASEL,DMA request Select" "0: DMA request disable,1: DMA request source group A,2: DMA request source group B,3: DMA request source group C,4: DMA request source CP,?,?,?"
|
|
rgroup.long 0xB0++0x1F
|
|
line.long 0x0 "CDR00,Combine Data Register00"
|
|
hexmask.long.word 0x0 16.--31. 1. "DR01,Data 01"
|
|
hexmask.long.word 0x0 0.--15. 1. "DR00,Data 00"
|
|
line.long 0x4 "CDR01,Combine Data Register01"
|
|
hexmask.long.word 0x4 16.--31. 1. "DR03,Data 03"
|
|
hexmask.long.word 0x4 0.--15. 1. "DR02,Data 02"
|
|
line.long 0x8 "CDR02,Combine Data Register02"
|
|
hexmask.long.word 0x8 16.--31. 1. "DR05,Data 05"
|
|
hexmask.long.word 0x8 0.--15. 1. "DR04,Data 04"
|
|
line.long 0xC "CDR03,Combine Data Register03"
|
|
hexmask.long.word 0xC 16.--31. 1. "DR07,Data 07"
|
|
hexmask.long.word 0xC 0.--15. 1. "DR06,Data 06"
|
|
line.long 0x10 "CDR04,Combine Data Register04"
|
|
hexmask.long.word 0x10 16.--31. 1. "DR09,Data 09"
|
|
hexmask.long.word 0x10 0.--15. 1. "DR08,Data 08"
|
|
line.long 0x14 "CDR05,Combine Data Register05"
|
|
hexmask.long.word 0x14 16.--31. 1. "DR11,Data 11"
|
|
hexmask.long.word 0x14 0.--15. 1. "DR10,Data 10"
|
|
line.long 0x18 "CDR06,Combine Data Register06"
|
|
hexmask.long.word 0x18 16.--31. 1. "DR13,Data 13"
|
|
hexmask.long.word 0x18 0.--15. 1. "DR12,Data 12"
|
|
line.long 0x1C "CDR07,Combine Data Register07"
|
|
hexmask.long.word 0x1C 0.--15. 1. "DR14,Data 14"
|
|
group.long 0xD0++0x3
|
|
line.long 0x0 "DBCR,Data Buffer Control Register"
|
|
hexmask.long.byte 0x0 20.--23. 1. "GCDB1_CHSEL,Group C Buffer 1 channel select"
|
|
hexmask.long.byte 0x0 16.--19. 1. "GCDB0_CHSEL,Group C Buffer 0 channel select"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "GBDB1_CHSEL,Group B Buffer 1 channel select"
|
|
hexmask.long.byte 0x0 8.--11. 1. "GBDB0_CHSEL,Group B Buffer 0 channel select"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "GADB1_CHSEL,Group A Buffer 1 channel select"
|
|
hexmask.long.byte 0x0 0.--3. 1. "GADB0_CHSEL,Group A Buffer 0 channel select"
|
|
rgroup.long 0xD4++0x17
|
|
line.long 0x0 "GADBR0,Group A Data Buffer Register 0"
|
|
hexmask.long.word 0x0 0.--15. 1. "GADBR0,Group A Data Buffer Register 0"
|
|
line.long 0x4 "GADBR1,Group A Data Buffer Register 1"
|
|
hexmask.long.word 0x4 0.--15. 1. "GADBR1,Group A Data Buffer Register 1"
|
|
line.long 0x8 "GBDBR0,Group B Data Buffer Register 0"
|
|
hexmask.long.word 0x8 0.--15. 1. "GBDBR0,Group B Data Buffer Register 0"
|
|
line.long 0xC "GBDBR1,Group B Data Buffer Register 1"
|
|
hexmask.long.word 0xC 0.--15. 1. "GBDBR1,Group B Data Buffer Register 1"
|
|
line.long 0x10 "GCDBR0,Group C Data Buffer Register 0"
|
|
hexmask.long.word 0x10 0.--15. 1. "GCDBR0,Group C Data Buffer Register 0"
|
|
line.long 0x14 "GCDBR1,Group C Data Buffer Register 1"
|
|
hexmask.long.word 0x14 0.--15. 1. "GCDBR1,Group C Data Buffer Register 1"
|
|
group.long 0xF0++0x3
|
|
line.long 0x0 "TSDR,Data-out Time Setting Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADTDO,Data-out Time"
|
|
tree.end
|
|
tree.end
|
|
tree "ANACON (Analog Controller Unit)"
|
|
base ad:0x40041000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "LVDLCR0,Lv0 detection level configuration register"
|
|
bitfld.long 0x0 0.--2. "LVD0_LVL_SEL,LDO0 Lv detection level configuration register" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "LVDLCR1,Lv1 detection level configuration register"
|
|
bitfld.long 0x4 0.--2. "LVD1_LVL_SEL,LDO1 Lv detection level configuration register" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "PGA0CR,PGA0 Control Register"
|
|
bitfld.long 0x8 9. "PGA0_CALSHORT,PGA0 input short" "0,1"
|
|
bitfld.long 0x8 6.--8. "PGA0_CH_SEL,PGA0 channel selection" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x8 2.--5. 1. "PGA0_GAIN_SEL,PGA0 gain selection"
|
|
bitfld.long 0x8 1. "PGA0_DIFFIN_SEL,PGA0 path selection" "0,1"
|
|
bitfld.long 0x8 0. "PGA0_EN,PGA0 enable" "0,1"
|
|
line.long 0xC "PGA1CR,PGA1 Control Register"
|
|
bitfld.long 0xC 9. "PGA1_CALSHORT,PGA1 input short" "0,1"
|
|
bitfld.long 0xC 6.--8. "PGA1_CH_SEL,PGA1 channel selection" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 2.--5. 1. "PGA1_GAIN_SEL,PGA1 gain selection"
|
|
bitfld.long 0xC 1. "PGA1_DIFFIN_SEL,PGA1 path selection" "0,1"
|
|
bitfld.long 0xC 0. "PGA1_EN,PGA1 enable" "0,1"
|
|
line.long 0x10 "CMP0CR,Comparator0 Control Register"
|
|
hexmask.long.byte 0x10 3.--6. 1. "COMP0_FILT_SEL,comparator0 filter time selection"
|
|
bitfld.long 0x10 2. "COMP0_POL_SEL,comparator0 output polarity selection" "0,1"
|
|
bitfld.long 0x10 1. "COMP0_IN_SEL,comparator0 input selection" "0,1"
|
|
bitfld.long 0x10 0. "COMP0_EN,comparator0 enable" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "CMP0OUT,Comparator0 output"
|
|
bitfld.long 0x0 0. "COMP0_OUT_O,comparator0 result" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CMP1CR,Comparator1 Control Register"
|
|
hexmask.long.byte 0x0 3.--6. 1. "COMP1_FILT_SEL,comparator1 filter time selection"
|
|
bitfld.long 0x0 2. "COMP1_POL_SEL,comparator1 output polarity selection" "0,1"
|
|
bitfld.long 0x0 1. "COMP1_IN_SEL,comparator1 input selection" "0,1"
|
|
bitfld.long 0x0 0. "COMP1_EN,comparator1 enable" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "CMP1OUT,Comparator1 output"
|
|
bitfld.long 0x0 0. "COMP1_OUT_O,comparator1 result" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "MONCR,Monitoring configuration register"
|
|
hexmask.long.word 0x0 0.--9. 1. "FAULT_FIL_EN,fault monitor enable"
|
|
rgroup.long 0x24++0x7
|
|
line.long 0x0 "MONRAW,Synchronous fault raw status"
|
|
hexmask.long.word 0x0 0.--9. 1. "FAULT_FIL_RAW,raw fault signal status"
|
|
line.long 0x4 "MONLAT,Synchronous fault latch status"
|
|
hexmask.long.word 0x4 0.--9. 1. "FAULT_FIL_LAT,latch fault signal status"
|
|
tree.end
|
|
tree "CCU (System Clock Controller)"
|
|
base ad:0x40041300
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "IHCR,Internal High-Speed Oscillator Control Register"
|
|
rbitfld.long 0x0 28. "OK,OK indicator" "0: Not Ready,1: Ready"
|
|
bitfld.long 0x0 0. "EN,IHOSC enable" "0: Disable,1: Enable"
|
|
line.long 0x4 "ILCR,Internal Low-Speed Oscillator Control Register"
|
|
rbitfld.long 0x4 28. "OK,OK indicator" "0: Not Ready,1: Ready"
|
|
bitfld.long 0x4 0. "EN,ILOSC enable" "0: Disable,1: Enable"
|
|
line.long 0x8 "XHCR,External High-Speed Oscillator Control Register"
|
|
rbitfld.long 0x8 28. "OK,OK indicator" "0: Not Ready,1: Ready"
|
|
bitfld.long 0x8 1. "SRC,External clock source selection" "0: X-tal,1: Clock Source"
|
|
bitfld.long 0x8 0. "EN,EXT_HOSC enable" "0: Disable,1: Enable"
|
|
group.long 0x10++0x6B
|
|
line.long 0x0 "PLCR,PLL Control Register"
|
|
bitfld.long 0x0 28. "LOCK,Lock detector output" "0,1"
|
|
bitfld.long 0x0 24.--26. "CPSET,CP setting" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--22. "LFSET,Loop filter setting" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ODIV,Output clock dividing value" "0: Output clock divide by 1,1: Output clock divide by 2,2: Output clock divide by 4,3: Output clock divide by 8"
|
|
hexmask.long.byte 0x0 8.--13. 1. "MDIV,Feedback dividing value (2 to 127)"
|
|
bitfld.long 0x0 4.--6. "PDIV,Reference clock dividing value" "0: Reference clock divide by 1,1: Reference clock divide by 2,2: Reference clock divide by 3,3: Reference clock divide by 4,4: Reference clock divide by 5,5: Reference clock divide by 6,6: Reference clock divide by 7,7: Reference clock divide by 8"
|
|
newline
|
|
bitfld.long 0x0 2. "REFSEL,Reference clock selection" "0: External High-speed Oscillator,1: Internal High-speed Oscillator"
|
|
bitfld.long 0x0 0.--1. "EN,PLL enable (0: disable. 3: enable)" "0: disable,?,?,3: enable"
|
|
line.long 0x4 "SCR,System Clock Control Register"
|
|
bitfld.long 0x4 29. "CRSC,Change request for the system clock" "0,1"
|
|
bitfld.long 0x4 28. "CCSC,Complete change the system clock" "0,1"
|
|
bitfld.long 0x4 16. "TCS,Trace clock source" "0: SW-JTAG Clock,1: System Clock"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--10. 1. "DIV,System clock dividing value"
|
|
bitfld.long 0x4 0.--2. "SRC,System clock source" "0: Internal High-Speed Oscillator Clock,1: Internal Low-Speed Oscillator Clock,2: External High-Speed Oscillator Clock,?,4: PLL Clock,?,?,?"
|
|
line.long 0x8 "PCR_WDT,Peripheral Clock Control Register: WDT"
|
|
hexmask.long.byte 0x8 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x8 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0xC "PCR_IWDT,Peripheral Clock Control Register: IWDT"
|
|
hexmask.long.byte 0xC 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0xC 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x10 "PCR_MFTR,Peripheral Clock Control Register: MFTR"
|
|
bitfld.long 0x10 0.--2. "SRC,0:NOCLK 1:SYSCLK" "0: NOCLK,1: SYSCLK,?,?,?,?,6: System Clock,?"
|
|
line.long 0x14 "PCR_TMS00,Peripheral Clock Control Register: TMS0 CH.0"
|
|
hexmask.long.byte 0x14 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x14 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x18 "PCR_TMS01,Peripheral Clock Control Register: TMS0 CH.1"
|
|
hexmask.long.byte 0x18 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x18 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x1C "PCR_TMS02,Peripheral Clock Control Register: TMS0 CH.2"
|
|
hexmask.long.byte 0x1C 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x1C 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x20 "PCR_TMS03,Peripheral Clock Control Register: TMS0 CH.3"
|
|
hexmask.long.byte 0x20 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x20 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x24 "PCR_TMS10,Peripheral Clock Control Register: TMS1 CH.0"
|
|
hexmask.long.byte 0x24 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x24 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x28 "PCR_TMS11,Peripheral Clock Control Register: TMS1 CH.1"
|
|
hexmask.long.byte 0x28 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x28 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x2C "PCR_TMS12,Peripheral Clock Control Register: TMS1 CH.2"
|
|
hexmask.long.byte 0x2C 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x2C 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x30 "PCR_TMS13,Peripheral Clock Control Register: TMS1 CH.3"
|
|
hexmask.long.byte 0x30 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x30 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x34 "PCR_TMS20,Peripheral Clock Control Register: TMS2 CH.0"
|
|
hexmask.long.byte 0x34 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x34 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x38 "PCR_TMS21,Peripheral Clock Control Register: TMS2 CH.1"
|
|
hexmask.long.byte 0x38 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x38 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x3C "PCR_TMS22,Peripheral Clock Control Register: TMS2 CH.2"
|
|
hexmask.long.byte 0x3C 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x3C 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x40 "PCR_TMS23,Peripheral Clock Control Register: TMS2 CH.3"
|
|
hexmask.long.byte 0x40 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x40 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x44 "PCR_I2CM,Peripheral Clock Control Register: I2CM"
|
|
hexmask.long.byte 0x44 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x44 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x48 "PCR_I2CS0,Peripheral Clock Control Register: I2CS0"
|
|
hexmask.long.byte 0x48 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x48 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x4C "PCR_I2CS1,Peripheral Clock Control Register: I2CS1"
|
|
hexmask.long.byte 0x4C 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x4C 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x50 "PCR_SPI0,Peripheral Clock Control Register: SPI0"
|
|
hexmask.long.byte 0x50 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x50 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x54 "PCR_SPI1,Peripheral Clock Control Register: SPI1"
|
|
hexmask.long.byte 0x54 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x54 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x58 "PCR_UART0,Peripheral Clock Control Register: UART0"
|
|
hexmask.long.byte 0x58 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x58 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x5C "PCR_UART1,Peripheral Clock Control Register: UART1"
|
|
hexmask.long.byte 0x5C 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x5C 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x60 "PCR_UART2,Peripheral Clock Control Register: UART2"
|
|
hexmask.long.byte 0x60 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x60 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x64 "PCR_UART3,Peripheral Clock Control Register: UART3"
|
|
hexmask.long.byte 0x64 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x64 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x68 "PCR_UART4,Peripheral Clock Control Register: UART4"
|
|
hexmask.long.byte 0x68 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x68 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
group.long 0x80++0x3B
|
|
line.long 0x0 "PCR_MFTP,Peripheral Clock Control Register: MFTP"
|
|
bitfld.long 0x0 0.--2. "SRC,0:NOCLK 1:SYSCLK" "0: NOCLK,1: SYSCLK,?,?,?,?,6: System Clock,?"
|
|
line.long 0x4 "PCR_GPIO,Peripheral Clock Control Register: GPIO"
|
|
bitfld.long 0x4 0.--2. "SRC,0:NOCLK 1:SYSCLK" "0: NOCLK,1: SYSCLK,?,?,?,?,6: System Clock,?"
|
|
line.long 0x8 "PCR_DMA,Peripheral Clock Control Register: DMA"
|
|
bitfld.long 0x8 0.--2. "SRC,0:NOCLK 1:SYSCLK" "0: NOCLK,1: SYSCLK,?,?,?,?,6: System Clock,?"
|
|
line.long 0xC "PCR_DNFA,Peripheral Clock Control Register: DNF GPA"
|
|
hexmask.long.byte 0xC 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0xC 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x10 "PCR_DNFB,Peripheral Clock Control Register: DNF GPB"
|
|
hexmask.long.byte 0x10 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x10 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x14 "PCR_DNFC,Peripheral Clock Control Register: DNF GPC"
|
|
hexmask.long.byte 0x14 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x14 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x18 "PCR_DNFD,Peripheral Clock Control Register: DNF GPD"
|
|
hexmask.long.byte 0x18 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x18 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x1C "PCR_DNFX,Peripheral Clock Control Register: DNF GPX"
|
|
hexmask.long.byte 0x1C 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x1C 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x20 "PCR_IOC,Peripheral Clock Control Register: IOC"
|
|
bitfld.long 0x20 0.--2. "SRC,0:NOCLK 1:SYSCLK" "0: NOCLK,1: SYSCLK,?,?,?,?,6: System Clock,?"
|
|
line.long 0x24 "PCR_ADCCTRL0,Peripheral Clock Control Register: ADCCTRL0"
|
|
hexmask.long.byte 0x24 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x24 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x28 "PCR_ADCCTRL1,Peripheral Clock Control Register: ADCCTRL1"
|
|
hexmask.long.byte 0x28 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x28 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x2C "PCR_DACCTRL0,Peripheral Clock Control Register: DACCTRL0"
|
|
hexmask.long.byte 0x2C 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x2C 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x30 "PCR_DACCTRL1,Peripheral Clock Control Register: DACCTRL1"
|
|
hexmask.long.byte 0x30 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x30 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x34 "PCR_COMP,Peripheral Clock Control Register: COMP"
|
|
hexmask.long.byte 0x34 16.--22. 1. "DIV,0:div by 1. 1~64:div by itself. others:Forbidden"
|
|
bitfld.long 0x34 0.--2. "SRC,0:NOCLK 1:IHCLK 2:ILCLK 3:XHCLK 4:XLCLK 5:PLLCLK 6:SYSCLK" "0: NOCLK,1: IHCLK,2: ILCLK,3: XHCLK,4: XLCLK,5: PLLCLK,6: SYSCLK,?"
|
|
line.long 0x38 "PCR_ICU,Peripheral Clock Control Register: ICU"
|
|
bitfld.long 0x38 0.--2. "SRC,0:NOCLK 1:SYSCLK" "0: NOCLK,1: SYSCLK,?,?,?,?,6: System Clock,?"
|
|
tree.end
|
|
tree "CFCTRL (Flash Controller)"
|
|
base ad:0x40041A00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CCR,Cache Control Register"
|
|
bitfld.long 0x0 2. "DCME,D-Cache Memory Enable" "0,1"
|
|
bitfld.long 0x0 1. "CRP,Cache Replacement Policy" "0,1"
|
|
bitfld.long 0x0 0. "ICME,I-Cache Memory Enable" "0,1"
|
|
group.long 0x8++0x17
|
|
line.long 0x0 "WAITOPT,Flash Wait Time Setting Register"
|
|
bitfld.long 0x0 0. "WAITOPT,Wait Time" "0,1"
|
|
line.long 0x4 "DELAYOPT,Flash Read Wait Cycle Setting Register"
|
|
bitfld.long 0x4 0.--2. "DELAYOPT,Wait Cycle" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "WRCMD,Write Command Register"
|
|
bitfld.long 0x8 0.--2. "WRCMD,Write Command" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "WRSTA,Write Start Address Register"
|
|
hexmask.long 0xC 0.--31. 1. "WRSTA,Write Start Address"
|
|
line.long 0x10 "WREDA,Write End Address Register"
|
|
hexmask.long 0x10 0.--31. 1. "WREDA,Write End Address"
|
|
line.long 0x14 "WREN,Write Enable Register"
|
|
bitfld.long 0x14 0.--1. "WREN,Write Enable" "0,1,2,3"
|
|
wgroup.long 0x20++0x7
|
|
line.long 0x0 "BURSTDR,Burst Program Data Input Register"
|
|
hexmask.long 0x0 0.--31. 1. "BURSTDR,Burst Data Register"
|
|
line.long 0x4 "ERAR,Erase Operation Start Register"
|
|
hexmask.long 0x4 0.--31. 1. "ERAR,Erase Operation Start Register"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "ISCR,Interrupt Status and Clear Register"
|
|
bitfld.long 0x0 2. "ECCCORRECT,Interrupt Status (ECC Correct when Flash Read)" "0,1"
|
|
bitfld.long 0x0 1. "ECCFAULT,Interrupt Status (ECC Fault when Flash Read)" "0,1"
|
|
bitfld.long 0x0 0. "WRCPLT,Interrupt Status (Completion of Flash program. erase. termination)" "0,1"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "WRCIS,Flash Write Complete Interrupt Status"
|
|
bitfld.long 0x0 2. "PROGC,Program complete interrupt status" "0,1"
|
|
bitfld.long 0x0 1. "ERAC,Erase complete interrupt status" "0,1"
|
|
bitfld.long 0x0 0. "TERMC,Interrupt Status (Terminated by LVD1 during Flash Program or Erase)" "0,1"
|
|
tree.end
|
|
tree "CMC (Clock Monitoring Circuit)"
|
|
base ad:0x40000400
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR0,Control Register0"
|
|
bitfld.long 0x0 4. "DIVIDEN,Clock Divide Enable" "0: Clock Divide Disable,1: Clock Divide Enable"
|
|
bitfld.long 0x0 0. "CFME,Clock Frequency Measurement Enable" "0: Clock Frequency Measurement Disable,1: Clock Frequency Measurement Enable"
|
|
line.long 0x4 "CR1,Control Register1"
|
|
bitfld.long 0x4 6.--7. "EDGES,Valid Edge Select" "0: Rising Edge,1: Falling Edge,2: Both Edge,?"
|
|
bitfld.long 0x4 4.--5. "TCSS,Timer Count Clock Source Select" "0: Divided by 1,1: Divided by 4,2: Divided by 8,3: Divided by 32"
|
|
newline
|
|
bitfld.long 0x4 1.--3. "FMCS,Measurement Target Clock Select" "0: System Clock,1: Internal High Frequency Oscillator Clock,2: Internal Low Frequency Oscillator Clock,3: External High Frequency Oscillator Clock,?,?,?,?"
|
|
bitfld.long 0x4 0. "CMCREFE,CMCREF Pin Input Enable" "0: CMCREF Pin Input Disable,1: CMCREF Pin Input Enable"
|
|
line.long 0x8 "CR2,Control Register2"
|
|
bitfld.long 0x8 8. "RCCE,Reference Clock Counting Enable" "0: Reference Clock Counting Disable,1: Reference Clock Counting Enable"
|
|
bitfld.long 0x8 6.--7. "DFS,Digital Filter Select" "0: Digital Filter Disable,1: sampling clock = measure clock and 1,2: sampling clock = measure clock and 4,3: sampling clock = measure clock and 16"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "RCDS,Measurement Reference Clock Frequency Divide Ratio Select" "0: Divided by 32,1: Divided by 128,2: Divided by 1024,3: Divided by 8192"
|
|
bitfld.long 0x8 1.--3. "RSCS,Measurement Reference Clock Select" "0: System Clock,1: Internal High Frequency Oscillator Clock,2: Internal Low Frequency Oscillator Clock,3: External High Frequency Oscillator Clock,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x8 0. "RPS,Reference Signal Select" "0: CMCREF Pin Clock Input,1: Internal Clock Input"
|
|
line.long 0xC "ICR,Interrupt Control Register"
|
|
bitfld.long 0xC 11. "TOUTRE,Timeout Reset Request Enable" "0: Timeout Reset Request Disable,1: Timeout Reset Request Enable"
|
|
bitfld.long 0xC 8. "CLKSFCL,Clock Select Flag Clear" "?,1: Clock Select Flag Clear"
|
|
newline
|
|
bitfld.long 0xC 7. "TOUTFCL,Timeout Flag Clear" "?,1: Timeout Flag Clear"
|
|
bitfld.long 0xC 6. "COVFFCL,Counter Overflow Flag Clear" "?,1: Counter Overflow Flag Clear"
|
|
newline
|
|
bitfld.long 0xC 5. "MENDFCL,Measurement End Flag Clear" "?,1: Measurement End Flag Clear"
|
|
bitfld.long 0xC 4. "FERRFCL,Frequency Error Flag Clear" "?,1: Frequency Error Flag Clear"
|
|
newline
|
|
bitfld.long 0xC 3. "TOUTIE,Timeout Interrupt Enable" "0: Timeout Interrupt Disable,1: Timeout Interrupt Enable"
|
|
bitfld.long 0xC 2. "COVFIE,Counter Overflow Interrupt Enable" "0: Counter Overflow Interrupt Disable,1: Counter Overflow Interrupt Enable"
|
|
newline
|
|
bitfld.long 0xC 1. "MENDIE,Measurement End Interrupt Enable" "0: Measurement End Interrupt Disable,1: Measurement End Interrupt Enable"
|
|
bitfld.long 0xC 0. "FERRIE,Frequency Error Interrupt Enable" "0: Frequency Error Interrupt Disable,1: Frequency Error Interrupt Enable"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 21.--23. "FMCSF,Measurement Target Clock Select Flag" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20. "CMCREFEF,CMCREF Pin Input Enable Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17.--19. "RSCSF,Measurement Reference Clock Select Flag" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 16. "RPSF,Reference Signal Select Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CNTING,Counter Operation Status" "0,1"
|
|
bitfld.long 0x0 3. "TOUTF,Timeout Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "COVFF,Counter Overflow Flag" "0,1"
|
|
bitfld.long 0x0 1. "MENDF,Measurement End Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FERRF,Frequency Error Flag" "0,1"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "ULVR,Upper-Limmit Value Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "ULVR,Counter Upper-Limit Value"
|
|
line.long 0x4 "LLVR,Lower-Limmit Value Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "LLVR,Counter Lower-Limit Value"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "CNTBR,Counter Buffer Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNTBR,Counter Buffer"
|
|
tree.end
|
|
tree "DAC (Digital-to-Analog Converter)"
|
|
base ad:0x0
|
|
tree "DAC0"
|
|
base ad:0x40040C00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 6. "LSB_SEL,8-bit and 9-bit mode LSB value select control" "0,1"
|
|
bitfld.long 0x0 4.--5. "MODE_SEL,8-bit and 9bit mode select control" "0,1,2,3"
|
|
bitfld.long 0x0 3. "DRE,DMA request enable control" "0: DAC DMA request disable,1: DAC DMA request enable"
|
|
bitfld.long 0x0 2. "IE,Interrupt enable control" "0: DAC interrupt disable,1: DAC interrupt enable"
|
|
newline
|
|
bitfld.long 0x0 1. "OEN,DAC pad output enable control" "0: DAC pad output disable,1: DAC pad output enable"
|
|
bitfld.long 0x0 0. "ST,DAC Enable control" "0: DAC disable,1: DAC enable"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x0 0. "IS,Interrupt Status" "0: DAC no event interrupt,1: DAC event interrupt"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x0 0. "IC,Interrupt Clear" "?,1: DAC interrupt clear"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "DR,Data Register"
|
|
hexmask.long.word 0x0 0.--9. 1. "DR,Conversion Data"
|
|
line.long 0x4 "TLDR,Load Counter Register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "LC,Timer Load Count"
|
|
tree.end
|
|
tree "DAC1"
|
|
base ad:0x40040D00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 6. "LSB_SEL,8-bit and 9-bit mode LSB value select control" "0,1"
|
|
bitfld.long 0x0 4.--5. "MODE_SEL,8-bit and 9bit mode select control" "0,1,2,3"
|
|
bitfld.long 0x0 3. "DRE,DMA request enable control" "0: DAC DMA request disable,1: DAC DMA request enable"
|
|
bitfld.long 0x0 2. "IE,Interrupt enable control" "0: DAC interrupt disable,1: DAC interrupt enable"
|
|
newline
|
|
bitfld.long 0x0 1. "OEN,DAC pad output enable control" "0: DAC pad output disable,1: DAC pad output enable"
|
|
bitfld.long 0x0 0. "ST,DAC Enable control" "0: DAC disable,1: DAC enable"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x0 0. "IS,Interrupt Status" "0: DAC no event interrupt,1: DAC event interrupt"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x0 0. "IC,Interrupt Clear" "?,1: DAC interrupt clear"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "DR,Data Register"
|
|
hexmask.long.word 0x0 0.--9. 1. "DR,Conversion Data"
|
|
line.long 0x4 "TLDR,Load Counter Register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "LC,Timer Load Count"
|
|
tree.end
|
|
tree.end
|
|
tree "DFCTRL (Flash Controller)"
|
|
base ad:0x40041B00
|
|
group.long 0x8++0x17
|
|
line.long 0x0 "WATIME,Flash Wait Time Setting Register"
|
|
bitfld.long 0x0 0.--2. "WATIME,Flash Wait Time Setting Register" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "WATCYC,Flash Read Wait Cycle Setting Register"
|
|
bitfld.long 0x4 0.--2. "WATCYC,Flash Read Wait Cycle Setting Register" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "WRCMD,Write Command Register"
|
|
hexmask.long.byte 0x8 0.--3. 1. "WRCMD,Write Command Register"
|
|
line.long 0xC "WRSTA,Write Start Address Register"
|
|
line.long 0x10 "WREDA,Write End Address Register"
|
|
line.long 0x14 "WREN,Write Enable Register"
|
|
bitfld.long 0x14 0.--2. "WREN,Write Enable Register" "0,1,2,3,4,5,6,7"
|
|
wgroup.long 0x20++0x7
|
|
line.long 0x0 "BURSTDR,Burst Program Data Input Register"
|
|
line.long 0x4 "ERAR,Erase Operation Start Register"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x0 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x0 0. "ICR,Interrupt Clear Register" "0,1"
|
|
rgroup.long 0x38++0x7
|
|
line.long 0x0 "WRCRIS,Flash Write Complete Raw Interrupt Status"
|
|
bitfld.long 0x0 3. "THVTMOUT,Thv Timeout Interrupt Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x0 2. "PROG,Program Complete Interrupt Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x0 1. "ERASE,Erase Complete Interrupt Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x0 0. "TERM,Termination Complete Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "WRCMIS,Flash Write Complete Masked Interrupt Status"
|
|
bitfld.long 0x4 3. "THVTMOUT,Thv Timeout Interrupt Masked Interrupt Status" "0,1"
|
|
bitfld.long 0x4 2. "PROG,Program Complete Interrupt Masked Interrupt Status" "0,1"
|
|
bitfld.long 0x4 1. "ERASE,Erase Complete Interrupt Masked Interrupt Status" "0,1"
|
|
bitfld.long 0x4 0. "TERM,Termination Complete Masked Interrupt Status" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "WRCIMSC,Flash Write Complete Interrupt Mask set and clear Register"
|
|
bitfld.long 0x0 3. "THVTMOUT,Thv Timeout Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "PROG,Program Complete Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 1. "ERASE,Erase Complete Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "TERM,Termination Complete Interrupt Mask" "0,1"
|
|
tree.end
|
|
tree "DMA (Direct Memory Access)"
|
|
base ad:0x40032000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "SRCADDR,Source Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Read Source Address"
|
|
line.long 0x4 "SRCMASK,Source Address Mask Register"
|
|
hexmask.long.tbyte 0x4 0.--16. 1. "SMASK,Source Address Mask"
|
|
line.long 0x8 "DSTADDR,Destination Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Write Destination Address"
|
|
line.long 0xC "DSTMASK,Destination Address Mask Register"
|
|
hexmask.long.tbyte 0xC 0.--16. 1. "DMASK,Destination Address Mask"
|
|
line.long 0x10 "LLIADDR,Link List Item Address Register"
|
|
hexmask.long 0x10 0.--31. 1. "LLIADDR,Link List Item Address"
|
|
line.long 0x14 "CTRL,DMA Control Register"
|
|
bitfld.long 0x14 31. "LTYPE,Line Transfer Type" "0: Software Type,1: Request Type"
|
|
bitfld.long 0x14 30. "DMYWR1,Dummy Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x14 28.--29. "BDACKSEL,Acknowledge Type" "0: Ack Signal @ Read End,1: Ack Signal @ Read End,2: Ack Signal @ Write End,3: Ack Signal @ Arbitration End"
|
|
bitfld.long 0x14 27. "DSWAPEN,Destination Swap Enable" "0: Destination Data Endian Swap Disable,1: Destination Data Endian Swap Enable"
|
|
newline
|
|
bitfld.long 0x14 26. "SSWAPEN,Source Swap Enable" "0: Source Data Endian Swap Disable,1: Source Data Endian Swap Enable"
|
|
bitfld.long 0x14 24.--25. "DMYWR0,Dummy Bit" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x14 23. "BTYPE,Burst Transfer Type" "0: Software Type,1: Request Type"
|
|
bitfld.long 0x14 20.--22. "SBST,Source Burst Number" "0: 1-Burst,1: 1-Burst,2: 1-Burst,3: 1-Burst,4: 4-Burst,5: 8-Burst,6: 16-Burst,7: 32-Burst"
|
|
newline
|
|
bitfld.long 0x14 18.--19. "DWIDTH,Destination Width" "0: Byte,1: Byte,2: Half-Word,3: Word"
|
|
bitfld.long 0x14 16.--17. "SWIDTH,Source Width" "0: Byte,1: Byte,2: Half-Word,3: Word"
|
|
newline
|
|
hexmask.long.word 0x14 0.--15. 1. "TRSIZE,Total Transfer Size"
|
|
line.long 0x18 "EN,DMA Enable Register"
|
|
bitfld.long 0x18 31. "IREQEN_LDERQERR,LTREQ Error Interrupt Enable" "0: LTREQ Error Interrupt Disable,1: LTREQ Error Interrupt Enable"
|
|
bitfld.long 0x18 30. "IREQEN_BDREQERR,BTREQ Error Interrupt Enable" "0: BTREQ Error Interrupt Disable,1: BTREQ Error Interrupt Enable"
|
|
newline
|
|
bitfld.long 0x18 29. "IREQEN_STOPDONE,Stop Done Interrupt Enable" "0: Stop Done Interrupt Disable,1: Stop Done Interrupt Enable"
|
|
bitfld.long 0x18 28. "IREQEN_DONE,Done Interrupt Enable" "0: Done Interrupt Disable,1: Done Interrupt Enable"
|
|
newline
|
|
bitfld.long 0x18 27. "IREQEN_LLEND,Link List Done Interrupt Enable" "0: Link List Done Interrupt Disable,1: Link List Done Interrupt Enable"
|
|
bitfld.long 0x18 26. "IREQEN_UMERR,Unintentional Modification Interrupt Enable" "0: Unintentional Modification Interrupt Disable,1: Unintentional Modification Interrupt Enable"
|
|
newline
|
|
bitfld.long 0x18 25. "IREQEN_TIMEOUT,Timeout Interrupt Enable" "0: Timeout Interrupt Disable,1: Timeout Interrupt Enable"
|
|
bitfld.long 0x18 24. "IREQEN_CFGERR,Configuration Error Interrupt Enable" "0: Configuration Error Interrupt Disable,1: Configuration Error Interrupt Enable"
|
|
newline
|
|
bitfld.long 0x18 20. "TOUTEN,Timeout Finish Enable" "0: Timeout Finish Disable,1: Timeout Finish Enable"
|
|
bitfld.long 0x18 16. "HALT,Halt Enable" "0: Halt Disable,1: Halt Enable"
|
|
newline
|
|
bitfld.long 0x18 12. "UMERREN,Unintentional Modification Finish Enable" "0: Unintentional Modification Finish Disable,1: Unintentional Modification Finish Enable"
|
|
bitfld.long 0x18 8. "STOP,Stop Enable" "0: Stop Disable,1: Stop Enable"
|
|
newline
|
|
bitfld.long 0x18 4. "CFGERREN,Configuration Error Finish Enable" "0: Configuration Error Finish Disable,1: Configuration Error Finish Enable"
|
|
bitfld.long 0x18 0. "EN,DMA Transfer Start Enable" "0: DMA Transfer Disable,1: DMA Transfer Enable"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "ARBCNT,Arbitration Wait Counter"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ARBCNT,Bus Arbitration Wait Cycle"
|
|
line.long 0x4 "BDREQSEL,BT Request Selection Register"
|
|
hexmask.long 0x4 0.--31. 1. "BDREQSEL,Request Selection on Burst Transfer Mode"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "SRCLSIZE,Source Line Size Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SRCLSIZE,Source Line Size"
|
|
line.long 0x4 "DSTLSIZE,Destination Line Size Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "DSTLSIZE,Destination Line Size"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CFG,DMA Configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "TOCNT,Timeout Counter"
|
|
hexmask.long.byte 0x0 8.--15. 1. "ITERNO,Iteration Number"
|
|
newline
|
|
bitfld.long 0x0 7. "CIVS,CRC Initial Value Select" "0: DMA Auto Setting,1: CRCVAL Data"
|
|
bitfld.long 0x0 6. "CIDS,CRC Input Data Select" "0: DMA Read Data,1: CRCIN Data"
|
|
newline
|
|
bitfld.long 0x0 5. "CPOS,CRC Polynomial Select" "0: CRC-16-IBM,1: CRC-16-CCITT"
|
|
bitfld.long 0x0 4. "LM,Line Repeat Transfer Mode Enable" "0: Line Repeat Transfer Mode Disable,1: Line Repeat Transfer Mode Enable"
|
|
newline
|
|
bitfld.long 0x0 1.--3. "DMYWR,Dummy Bit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0. "SLLI,Short LLI Transfer Enable" "0: Short LLI Transfer Disable,1: Short LLI Transfer Enable"
|
|
rgroup.long 0x74++0x3
|
|
line.long 0x0 "IREQ,DMA Interrupt Request Status Register"
|
|
bitfld.long 0x0 23. "FLAG_LDREQERR,LTREQ Error Flag Status" "0: LTREQ Error Flag is Not Occurred,1: LTREQ Error Flag is Occurred"
|
|
bitfld.long 0x0 22. "FLAG_BDREQERR,BTREQ Error Flag Status" "0: BTREQ Error Flag is Not Occurred,1: BTREQ Error Flag is Occurred"
|
|
newline
|
|
bitfld.long 0x0 21. "FLAG_CHSTOPDONE,Stop Done Flag Status" "0: Stop Done Flag is Not Occurred,1: Stop Done Flag is Occurred"
|
|
bitfld.long 0x0 20. "FLAG_CHDONE,Done Flag Status" "0: Done Flag is Not Occurred,1: Done Flag is Occurred"
|
|
newline
|
|
bitfld.long 0x0 19. "FLAG_CHLLEND,Link List Done Flag Status" "0: Link List Done Flag is Not Occurred,1: Link List Done Flag is Occurred"
|
|
bitfld.long 0x0 18. "FLAG_CHUMERR,Unintentional Modification Flag Status" "0: Unintentional Modification Flag is Not Occurred,1: Unintentional Modification Flag is Occurred"
|
|
newline
|
|
bitfld.long 0x0 17. "FLAG_CHTIMEOUT,Timeout Flag Status" "0: Timeout Flag is Not Occurred,1: Timeout Flag is Occurred"
|
|
bitfld.long 0x0 16. "FLAG_CHCFGERR,Configuration Error Flag Status" "0: Configuration Error Flag is Not Occurred,1: Configuration Error Flag is Occurred"
|
|
newline
|
|
bitfld.long 0x0 7. "IREQ_LDREQERR,LTREQ Error Interrupt Status" "0: LTREQ Error Interrupt is Not Occurred,1: LTREQ Error Interrupt is Occurred"
|
|
bitfld.long 0x0 6. "IREQ_BDREQERR,BTREQ Error Interrupt Status" "0: BTREQ Error Interrupt is Not Occurred,1: BTREQ Error Interrupt is Occurred"
|
|
newline
|
|
bitfld.long 0x0 5. "IREQ_CHSTOPDONE,Stop Done Interrupt Status" "0: Stop Done Interrupt is Not Occurred,1: Stop Done Interrupt is Occurred"
|
|
bitfld.long 0x0 4. "IREQ_CHDONE,Done Interrupt Status" "0: Done Interrupt is Not Occurred,1: Done Interrupt is Occurred"
|
|
newline
|
|
bitfld.long 0x0 3. "IREQ_CHLLEND,Link List Done Interrupt Status" "0: Link List Done Interrupt is Not Occurred,1: Link List Done Interrupt is Occurred"
|
|
bitfld.long 0x0 2. "IREQ_CHUMERR,Unintentional Modification Interrupt Status" "0: Unintentional Modification Interrupt is Not..,1: Unintentional Modification Interrupt is Occurred"
|
|
newline
|
|
bitfld.long 0x0 1. "IREQ_CHTIMEOUT,Timeout Interrupt Status" "0: Timeout Interrupt is Not Occurred,1: Timeout Interrupt is Occurred"
|
|
bitfld.long 0x0 0. "IREQ_CHCFGERR,Configuration Error Interrupt Status" "0: Configuration Error Interrupt is Not Occurred,1: Configuration Error Interrupt is Occurred"
|
|
wgroup.long 0x78++0x3
|
|
line.long 0x0 "IREQCLR,DMA Interrupt Clear Register"
|
|
bitfld.long 0x0 23. "FLAG_LDREQERR,LTREQ Error Flag Clear" "0: LTREQ Error Flag is Not Occurred,1: LTREQ Error Flag is Occurred"
|
|
bitfld.long 0x0 22. "FLAG_BDREQERR,BTREQ Error Flag Clear" "0: BTREQ Error Flag is Not Occurred,1: BTREQ Error Flag is Occurred"
|
|
newline
|
|
bitfld.long 0x0 21. "FLAG_CHSTOPDONE,Stop Done Flag Clear" "0: Stop Done Flag is Not Occurred,1: Stop Done Flag is Occurred"
|
|
bitfld.long 0x0 20. "FLAG_CHDONE,Done Flag Clear" "0: Done Flag is Not Occurred,1: Done Flag is Occurred"
|
|
newline
|
|
bitfld.long 0x0 19. "FLAG_CHLLEND,Link List Done Flag Clear" "0: Link List Done Flag is Not Occurred,1: Link List Done Flag is Occurred"
|
|
bitfld.long 0x0 18. "FLAG_CHUMERR,Unintentional Modification Flag Clear" "0: Unintentional Modification Flag is Not Occurred,1: Unintentional Modification Flag is Occurred"
|
|
newline
|
|
bitfld.long 0x0 17. "FLAG_CHTIMEOUT,Timeout Flag Clear" "0: Timeout Flag is Not Occurred,1: Timeout Flag is Occurred"
|
|
bitfld.long 0x0 16. "FLAG_CHCFGERR,Configuration Error Flag Clear" "0: Configuration Error Flag is Not Occurred,1: Configuration Error Flag is Occurred"
|
|
newline
|
|
bitfld.long 0x0 7. "IREQ_LDREQERR,LTREQ Error Interrupt Clear" "0: LTREQ Error Interrupt is Not Occurred,1: LTREQ Error Interrupt is Occurred"
|
|
bitfld.long 0x0 6. "IREQ_BDREQERR,BTREQ Error Interrupt Clear" "0: BTREQ Error Interrupt is Not Occurred,1: BTREQ Error Interrupt is Occurred"
|
|
newline
|
|
bitfld.long 0x0 5. "IREQ_CHSTOPDONE,Stop Done Interrupt Clear" "0: Stop Done Interrupt is Not Occurred,1: Stop Done Interrupt is Occurred"
|
|
bitfld.long 0x0 4. "IREQ_CHDONE,Done Interrupt Clear" "0: Done Interrupt is Not Occurred,1: Done Interrupt is Occurred"
|
|
newline
|
|
bitfld.long 0x0 3. "IREQ_CHLLEND,Link List Done Interrupt Clear" "0: Link List Done Interrupt is Not Occurred,1: Link List Done Interrupt is Occurred"
|
|
bitfld.long 0x0 2. "IREQ_CHUMERR,Unintentional Modification Interrupt Clear" "0: Unintentional Modification Interrupt is Not..,1: Unintentional Modification Interrupt is Occurred"
|
|
newline
|
|
bitfld.long 0x0 1. "IREQ_CHTIMEOUT,Timeout Interrupt Clear" "0: Timeout Interrupt is Not Occurred,1: Timeout Interrupt is Occurred"
|
|
bitfld.long 0x0 0. "IREQ_CHCFGERR,Configuration Error Interrupt Clear" "0: Configuration Error Interrupt is Not Occurred,1: Configuration Error Interrupt is Occurred"
|
|
group.long 0x7C++0xF
|
|
line.long 0x0 "LDREQSEL,LT Request Selection Register"
|
|
hexmask.long 0x0 0.--31. 1. "LDREQSEL,Request Selection on Line Repeat Transfer Mode"
|
|
line.long 0x4 "CHKOK,Transferred Data CRC Check Register"
|
|
bitfld.long 0x4 0. "OK,CRC Check Status" "0: CRC Check Fail,1: CRC Check Status Clear"
|
|
line.long 0x8 "RESULT,CRC Initial Value and Result Register"
|
|
hexmask.long 0x8 0.--31. 1. "RESULT,CRC Initial Value and Result"
|
|
line.long 0xC "INPUT,CRC Input Data Register"
|
|
hexmask.long 0xC 0.--31. 1. "INPUT_DATA,CRC Input Data"
|
|
tree.end
|
|
tree "DNF (Digital Noise Filter)"
|
|
base ad:0x0
|
|
tree "DNFA"
|
|
base ad:0x40040000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "NFER,Noise Filter Enable Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
tree.end
|
|
tree "DNFB"
|
|
base ad:0x40040020
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "NFER,Noise Filter Enable Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
tree.end
|
|
tree "DNFC"
|
|
base ad:0x40040040
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "NFER,Noise Filter Enable Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
tree.end
|
|
tree "DNFD"
|
|
base ad:0x40040060
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "NFER,Noise Filter Enable Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
tree.end
|
|
tree "DNFX"
|
|
base ad:0x40040080
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "NFER,Noise Filter Enable Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Noise Filter Disable,1: Noise Filter Enable"
|
|
tree.end
|
|
tree.end
|
|
tree "GPIO (General Purpose IO)"
|
|
base ad:0x0
|
|
tree "GPIOA"
|
|
base ad:0x40031000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IDR,Input Data Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
group.long 0x4++0x27
|
|
line.long 0x0 "ODR,Output Data Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x4 "OER,Output Enable Register"
|
|
bitfld.long 0x4 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x8 "INER,Input Enable Register"
|
|
bitfld.long 0x8 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0xC "ODER,Open-Drain Enable Register"
|
|
bitfld.long 0xC 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x10 "PUPR,Pull-up Resistor Enable Register"
|
|
bitfld.long 0x10 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x14 "PDNR,Pull-down Resistor Enable Register"
|
|
bitfld.long 0x14 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x18 "ISR,Interrupt Sense Register"
|
|
bitfld.long 0x18 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x1C "IBER,Interrupt Edge Select Register"
|
|
bitfld.long 0x1C 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x20 "IEVR,Interrupt Event Register"
|
|
bitfld.long 0x20 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x24 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x24 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "ICLR,Interrupt Clear Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "MSKR,Masked Interrupt Status Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x4 "STSR,Raw Interrupt Status Register"
|
|
bitfld.long 0x4 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "SIER,Secondary Interrupt Enable Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
tree.end
|
|
tree "GPIOB"
|
|
base ad:0x40031040
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IDR,Input Data Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
group.long 0x4++0x27
|
|
line.long 0x0 "ODR,Output Data Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x4 "OER,Output Enable Register"
|
|
bitfld.long 0x4 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x8 "INER,Input Enable Register"
|
|
bitfld.long 0x8 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0xC "ODER,Open-Drain Enable Register"
|
|
bitfld.long 0xC 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x10 "PUPR,Pull-up Resistor Enable Register"
|
|
bitfld.long 0x10 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x14 "PDNR,Pull-down Resistor Enable Register"
|
|
bitfld.long 0x14 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x18 "ISR,Interrupt Sense Register"
|
|
bitfld.long 0x18 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x1C "IBER,Interrupt Edge Select Register"
|
|
bitfld.long 0x1C 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x20 "IEVR,Interrupt Event Register"
|
|
bitfld.long 0x20 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x24 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x24 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "ICLR,Interrupt Clear Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "MSKR,Masked Interrupt Status Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x4 "STSR,Raw Interrupt Status Register"
|
|
bitfld.long 0x4 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "SIER,Secondary Interrupt Enable Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
tree.end
|
|
tree "GPIOC"
|
|
base ad:0x40031080
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IDR,Input Data Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
group.long 0x4++0x27
|
|
line.long 0x0 "ODR,Output Data Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x4 "OER,Output Enable Register"
|
|
bitfld.long 0x4 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x8 "INER,Input Enable Register"
|
|
bitfld.long 0x8 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0xC "ODER,Open-Drain Enable Register"
|
|
bitfld.long 0xC 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x10 "PUPR,Pull-up Resistor Enable Register"
|
|
bitfld.long 0x10 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x14 "PDNR,Pull-down Resistor Enable Register"
|
|
bitfld.long 0x14 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x18 "ISR,Interrupt Sense Register"
|
|
bitfld.long 0x18 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x1C "IBER,Interrupt Edge Select Register"
|
|
bitfld.long 0x1C 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x20 "IEVR,Interrupt Event Register"
|
|
bitfld.long 0x20 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x24 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x24 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "ICLR,Interrupt Clear Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "MSKR,Masked Interrupt Status Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x4 "STSR,Raw Interrupt Status Register"
|
|
bitfld.long 0x4 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "SIER,Secondary Interrupt Enable Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
tree.end
|
|
tree "GPIOD"
|
|
base ad:0x400310C0
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IDR,Input Data Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
group.long 0x4++0x27
|
|
line.long 0x0 "ODR,Output Data Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x4 "OER,Output Enable Register"
|
|
bitfld.long 0x4 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x8 "INER,Input Enable Register"
|
|
bitfld.long 0x8 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0xC "ODER,Open-Drain Enable Register"
|
|
bitfld.long 0xC 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x10 "PUPR,Pull-up Resistor Enable Register"
|
|
bitfld.long 0x10 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x14 "PDNR,Pull-down Resistor Enable Register"
|
|
bitfld.long 0x14 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x18 "ISR,Interrupt Sense Register"
|
|
bitfld.long 0x18 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x1C "IBER,Interrupt Edge Select Register"
|
|
bitfld.long 0x1C 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x20 "IEVR,Interrupt Event Register"
|
|
bitfld.long 0x20 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x24 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x24 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "ICLR,Interrupt Clear Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "MSKR,Masked Interrupt Status Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x4 "STSR,Raw Interrupt Status Register"
|
|
bitfld.long 0x4 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "SIER,Secondary Interrupt Enable Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
tree.end
|
|
tree "GPIOM"
|
|
base ad:0x40031140
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "DMASR,DMA Request Source Select Register"
|
|
bitfld.long 0x0 0.--2. "DMASEL,DMA Source Select" "0: DMA Trigger Disable,1: External Interrupt A Trigger,2: External Interrupt B Trigger,3: External Interrupt C Trigger,4: External Interrupt D Trigger,5: External Interrupt X Trigger,?,?"
|
|
tree.end
|
|
tree "GPIOX"
|
|
base ad:0x40031100
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IDR,Input Data Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
group.long 0x4++0x27
|
|
line.long 0x0 "ODR,Output Data Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x4 "OER,Output Enable Register"
|
|
bitfld.long 0x4 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x8 "INER,Input Enable Register"
|
|
bitfld.long 0x8 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x8 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x8 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0xC "ODER,Open-Drain Enable Register"
|
|
bitfld.long 0xC 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0xC 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0xC 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x10 "PUPR,Pull-up Resistor Enable Register"
|
|
bitfld.long 0x10 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x10 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x10 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x14 "PDNR,Pull-down Resistor Enable Register"
|
|
bitfld.long 0x14 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x14 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x14 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x18 "ISR,Interrupt Sense Register"
|
|
bitfld.long 0x18 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x18 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x18 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x1C "IBER,Interrupt Edge Select Register"
|
|
bitfld.long 0x1C 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x1C 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x1C 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x20 "IEVR,Interrupt Event Register"
|
|
bitfld.long 0x20 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x20 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x20 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x24 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x24 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x24 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x24 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "ICLR,Interrupt Clear Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "MSKR,Masked Interrupt Status Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
line.long 0x4 "STSR,Raw Interrupt Status Register"
|
|
bitfld.long 0x4 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x4 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x4 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "SIER,Secondary Interrupt Enable Register"
|
|
bitfld.long 0x0 28. "P28,Port 28" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 27. "P27,Port 27" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 26. "P26,Port 26" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 25. "P25,Port 25" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 24. "P24,Port 24" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 23. "P23,Port 23" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 22. "P22,Port 22" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 21. "P21,Port 21" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 20. "P20,Port 20" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Port 19" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 18. "P18,Port 18" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 17. "P17,Port 17" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 16. "P16,Port 16" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 15. "P15,Port 15" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 14. "P14,Port 14" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 13. "P13,Port 13" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 12. "P12,Port 12" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 11. "P11,Port 11" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Port 10" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 9. "P09,Port 09" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 8. "P08,Port 08" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 7. "P07,Port 07" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 6. "P06,Port 06" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 5. "P05,Port 05" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 4. "P04,Port 04" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 3. "P03,Port 03" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 2. "P02,Port 02" "0: Value 0,1: Value 1"
|
|
newline
|
|
bitfld.long 0x0 1. "P01,Port 01" "0: Value 0,1: Value 1"
|
|
bitfld.long 0x0 0. "P00,Port 00" "0: Value 0,1: Value 1"
|
|
tree.end
|
|
tree.end
|
|
tree "GPPD (GPIO Port Division)"
|
|
base ad:0x0
|
|
tree "GPPDA"
|
|
base ad:0x40031150
|
|
group.long 0x0++0x7F
|
|
line.long 0x0 "PDCR00,Port Direct Control Register 00"
|
|
bitfld.long 0x0 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x4 "PDCR01,Port Direct Control Register 01"
|
|
bitfld.long 0x4 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x8 "PDCR02,Port Direct Control Register 02"
|
|
bitfld.long 0x8 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0xC "PDCR03,Port Direct Control Register 03"
|
|
bitfld.long 0xC 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x10 "PDCR04,Port Direct Control Register 04"
|
|
bitfld.long 0x10 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x14 "PDCR05,Port Direct Control Register 05"
|
|
bitfld.long 0x14 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x18 "PDCR06,Port Direct Control Register 06"
|
|
bitfld.long 0x18 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x1C "PDCR07,Port Direct Control Register 07"
|
|
bitfld.long 0x1C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x20 "PDCR08,Port Direct Control Register 08"
|
|
bitfld.long 0x20 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x24 "PDCR09,Port Direct Control Register 09"
|
|
bitfld.long 0x24 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x28 "PDCR10,Port Direct Control Register 10"
|
|
bitfld.long 0x28 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x2C "PDCR11,Port Direct Control Register 11"
|
|
bitfld.long 0x2C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x30 "PDCR12,Port Direct Control Register 12"
|
|
bitfld.long 0x30 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x34 "PDCR13,Port Direct Control Register 13"
|
|
bitfld.long 0x34 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x38 "PDCR14,Port Direct Control Register 14"
|
|
bitfld.long 0x38 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x3C "PDCR15,Port Direct Control Register 15"
|
|
bitfld.long 0x3C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x40 "PDCR16,Port Direct Control Register 16"
|
|
bitfld.long 0x40 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x44 "PDCR17,Port Direct Control Register 17"
|
|
bitfld.long 0x44 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x48 "PDCR18,Port Direct Control Register 18"
|
|
bitfld.long 0x48 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x4C "PDCR19,Port Direct Control Register 19"
|
|
bitfld.long 0x4C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x50 "PDCR20,Port Direct Control Register 20"
|
|
bitfld.long 0x50 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x54 "PDCR21,Port Direct Control Register 21"
|
|
bitfld.long 0x54 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x58 "PDCR22,Port Direct Control Register 22"
|
|
bitfld.long 0x58 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x5C "PDCR23,Port Direct Control Register 23"
|
|
bitfld.long 0x5C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x60 "PDCR24,Port Direct Control Register 24"
|
|
bitfld.long 0x60 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x64 "PDCR25,Port Direct Control Register 25"
|
|
bitfld.long 0x64 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x68 "PDCR26,Port Direct Control Register 26"
|
|
bitfld.long 0x68 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x6C "PDCR27,Port Direct Control Register 27"
|
|
bitfld.long 0x6C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x70 "PDCR28,Port Direct Control Register 28"
|
|
bitfld.long 0x70 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x74 "PDCR29,Port Direct Control Register 29"
|
|
bitfld.long 0x74 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x78 "PDCR30,Port Direct Control Register 30"
|
|
bitfld.long 0x78 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x7C "PDCR31,Port Direct Control Register 31"
|
|
bitfld.long 0x7C 0. "PD,Port Data" "0: Low,1: High"
|
|
tree.end
|
|
tree "GPPDB"
|
|
base ad:0x400311D0
|
|
group.long 0x0++0x7F
|
|
line.long 0x0 "PDCR00,Port Direct Control Register 00"
|
|
bitfld.long 0x0 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x4 "PDCR01,Port Direct Control Register 01"
|
|
bitfld.long 0x4 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x8 "PDCR02,Port Direct Control Register 02"
|
|
bitfld.long 0x8 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0xC "PDCR03,Port Direct Control Register 03"
|
|
bitfld.long 0xC 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x10 "PDCR04,Port Direct Control Register 04"
|
|
bitfld.long 0x10 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x14 "PDCR05,Port Direct Control Register 05"
|
|
bitfld.long 0x14 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x18 "PDCR06,Port Direct Control Register 06"
|
|
bitfld.long 0x18 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x1C "PDCR07,Port Direct Control Register 07"
|
|
bitfld.long 0x1C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x20 "PDCR08,Port Direct Control Register 08"
|
|
bitfld.long 0x20 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x24 "PDCR09,Port Direct Control Register 09"
|
|
bitfld.long 0x24 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x28 "PDCR10,Port Direct Control Register 10"
|
|
bitfld.long 0x28 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x2C "PDCR11,Port Direct Control Register 11"
|
|
bitfld.long 0x2C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x30 "PDCR12,Port Direct Control Register 12"
|
|
bitfld.long 0x30 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x34 "PDCR13,Port Direct Control Register 13"
|
|
bitfld.long 0x34 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x38 "PDCR14,Port Direct Control Register 14"
|
|
bitfld.long 0x38 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x3C "PDCR15,Port Direct Control Register 15"
|
|
bitfld.long 0x3C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x40 "PDCR16,Port Direct Control Register 16"
|
|
bitfld.long 0x40 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x44 "PDCR17,Port Direct Control Register 17"
|
|
bitfld.long 0x44 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x48 "PDCR18,Port Direct Control Register 18"
|
|
bitfld.long 0x48 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x4C "PDCR19,Port Direct Control Register 19"
|
|
bitfld.long 0x4C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x50 "PDCR20,Port Direct Control Register 20"
|
|
bitfld.long 0x50 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x54 "PDCR21,Port Direct Control Register 21"
|
|
bitfld.long 0x54 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x58 "PDCR22,Port Direct Control Register 22"
|
|
bitfld.long 0x58 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x5C "PDCR23,Port Direct Control Register 23"
|
|
bitfld.long 0x5C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x60 "PDCR24,Port Direct Control Register 24"
|
|
bitfld.long 0x60 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x64 "PDCR25,Port Direct Control Register 25"
|
|
bitfld.long 0x64 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x68 "PDCR26,Port Direct Control Register 26"
|
|
bitfld.long 0x68 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x6C "PDCR27,Port Direct Control Register 27"
|
|
bitfld.long 0x6C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x70 "PDCR28,Port Direct Control Register 28"
|
|
bitfld.long 0x70 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x74 "PDCR29,Port Direct Control Register 29"
|
|
bitfld.long 0x74 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x78 "PDCR30,Port Direct Control Register 30"
|
|
bitfld.long 0x78 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x7C "PDCR31,Port Direct Control Register 31"
|
|
bitfld.long 0x7C 0. "PD,Port Data" "0: Low,1: High"
|
|
tree.end
|
|
tree "GPPDC"
|
|
base ad:0x40031250
|
|
group.long 0x0++0x7F
|
|
line.long 0x0 "PDCR00,Port Direct Control Register 00"
|
|
bitfld.long 0x0 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x4 "PDCR01,Port Direct Control Register 01"
|
|
bitfld.long 0x4 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x8 "PDCR02,Port Direct Control Register 02"
|
|
bitfld.long 0x8 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0xC "PDCR03,Port Direct Control Register 03"
|
|
bitfld.long 0xC 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x10 "PDCR04,Port Direct Control Register 04"
|
|
bitfld.long 0x10 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x14 "PDCR05,Port Direct Control Register 05"
|
|
bitfld.long 0x14 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x18 "PDCR06,Port Direct Control Register 06"
|
|
bitfld.long 0x18 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x1C "PDCR07,Port Direct Control Register 07"
|
|
bitfld.long 0x1C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x20 "PDCR08,Port Direct Control Register 08"
|
|
bitfld.long 0x20 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x24 "PDCR09,Port Direct Control Register 09"
|
|
bitfld.long 0x24 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x28 "PDCR10,Port Direct Control Register 10"
|
|
bitfld.long 0x28 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x2C "PDCR11,Port Direct Control Register 11"
|
|
bitfld.long 0x2C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x30 "PDCR12,Port Direct Control Register 12"
|
|
bitfld.long 0x30 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x34 "PDCR13,Port Direct Control Register 13"
|
|
bitfld.long 0x34 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x38 "PDCR14,Port Direct Control Register 14"
|
|
bitfld.long 0x38 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x3C "PDCR15,Port Direct Control Register 15"
|
|
bitfld.long 0x3C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x40 "PDCR16,Port Direct Control Register 16"
|
|
bitfld.long 0x40 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x44 "PDCR17,Port Direct Control Register 17"
|
|
bitfld.long 0x44 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x48 "PDCR18,Port Direct Control Register 18"
|
|
bitfld.long 0x48 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x4C "PDCR19,Port Direct Control Register 19"
|
|
bitfld.long 0x4C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x50 "PDCR20,Port Direct Control Register 20"
|
|
bitfld.long 0x50 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x54 "PDCR21,Port Direct Control Register 21"
|
|
bitfld.long 0x54 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x58 "PDCR22,Port Direct Control Register 22"
|
|
bitfld.long 0x58 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x5C "PDCR23,Port Direct Control Register 23"
|
|
bitfld.long 0x5C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x60 "PDCR24,Port Direct Control Register 24"
|
|
bitfld.long 0x60 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x64 "PDCR25,Port Direct Control Register 25"
|
|
bitfld.long 0x64 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x68 "PDCR26,Port Direct Control Register 26"
|
|
bitfld.long 0x68 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x6C "PDCR27,Port Direct Control Register 27"
|
|
bitfld.long 0x6C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x70 "PDCR28,Port Direct Control Register 28"
|
|
bitfld.long 0x70 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x74 "PDCR29,Port Direct Control Register 29"
|
|
bitfld.long 0x74 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x78 "PDCR30,Port Direct Control Register 30"
|
|
bitfld.long 0x78 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x7C "PDCR31,Port Direct Control Register 31"
|
|
bitfld.long 0x7C 0. "PD,Port Data" "0: Low,1: High"
|
|
tree.end
|
|
tree "GPPDD"
|
|
base ad:0x400312D0
|
|
group.long 0x0++0x7F
|
|
line.long 0x0 "PDCR00,Port Direct Control Register 00"
|
|
bitfld.long 0x0 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x4 "PDCR01,Port Direct Control Register 01"
|
|
bitfld.long 0x4 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x8 "PDCR02,Port Direct Control Register 02"
|
|
bitfld.long 0x8 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0xC "PDCR03,Port Direct Control Register 03"
|
|
bitfld.long 0xC 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x10 "PDCR04,Port Direct Control Register 04"
|
|
bitfld.long 0x10 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x14 "PDCR05,Port Direct Control Register 05"
|
|
bitfld.long 0x14 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x18 "PDCR06,Port Direct Control Register 06"
|
|
bitfld.long 0x18 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x1C "PDCR07,Port Direct Control Register 07"
|
|
bitfld.long 0x1C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x20 "PDCR08,Port Direct Control Register 08"
|
|
bitfld.long 0x20 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x24 "PDCR09,Port Direct Control Register 09"
|
|
bitfld.long 0x24 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x28 "PDCR10,Port Direct Control Register 10"
|
|
bitfld.long 0x28 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x2C "PDCR11,Port Direct Control Register 11"
|
|
bitfld.long 0x2C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x30 "PDCR12,Port Direct Control Register 12"
|
|
bitfld.long 0x30 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x34 "PDCR13,Port Direct Control Register 13"
|
|
bitfld.long 0x34 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x38 "PDCR14,Port Direct Control Register 14"
|
|
bitfld.long 0x38 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x3C "PDCR15,Port Direct Control Register 15"
|
|
bitfld.long 0x3C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x40 "PDCR16,Port Direct Control Register 16"
|
|
bitfld.long 0x40 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x44 "PDCR17,Port Direct Control Register 17"
|
|
bitfld.long 0x44 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x48 "PDCR18,Port Direct Control Register 18"
|
|
bitfld.long 0x48 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x4C "PDCR19,Port Direct Control Register 19"
|
|
bitfld.long 0x4C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x50 "PDCR20,Port Direct Control Register 20"
|
|
bitfld.long 0x50 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x54 "PDCR21,Port Direct Control Register 21"
|
|
bitfld.long 0x54 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x58 "PDCR22,Port Direct Control Register 22"
|
|
bitfld.long 0x58 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x5C "PDCR23,Port Direct Control Register 23"
|
|
bitfld.long 0x5C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x60 "PDCR24,Port Direct Control Register 24"
|
|
bitfld.long 0x60 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x64 "PDCR25,Port Direct Control Register 25"
|
|
bitfld.long 0x64 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x68 "PDCR26,Port Direct Control Register 26"
|
|
bitfld.long 0x68 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x6C "PDCR27,Port Direct Control Register 27"
|
|
bitfld.long 0x6C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x70 "PDCR28,Port Direct Control Register 28"
|
|
bitfld.long 0x70 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x74 "PDCR29,Port Direct Control Register 29"
|
|
bitfld.long 0x74 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x78 "PDCR30,Port Direct Control Register 30"
|
|
bitfld.long 0x78 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x7C "PDCR31,Port Direct Control Register 31"
|
|
bitfld.long 0x7C 0. "PD,Port Data" "0: Low,1: High"
|
|
tree.end
|
|
tree "GPPDX"
|
|
base ad:0x40031350
|
|
group.long 0x0++0x7F
|
|
line.long 0x0 "PDCR00,Port Direct Control Register 00"
|
|
bitfld.long 0x0 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x4 "PDCR01,Port Direct Control Register 01"
|
|
bitfld.long 0x4 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x8 "PDCR02,Port Direct Control Register 02"
|
|
bitfld.long 0x8 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0xC "PDCR03,Port Direct Control Register 03"
|
|
bitfld.long 0xC 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x10 "PDCR04,Port Direct Control Register 04"
|
|
bitfld.long 0x10 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x14 "PDCR05,Port Direct Control Register 05"
|
|
bitfld.long 0x14 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x18 "PDCR06,Port Direct Control Register 06"
|
|
bitfld.long 0x18 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x1C "PDCR07,Port Direct Control Register 07"
|
|
bitfld.long 0x1C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x20 "PDCR08,Port Direct Control Register 08"
|
|
bitfld.long 0x20 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x24 "PDCR09,Port Direct Control Register 09"
|
|
bitfld.long 0x24 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x28 "PDCR10,Port Direct Control Register 10"
|
|
bitfld.long 0x28 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x2C "PDCR11,Port Direct Control Register 11"
|
|
bitfld.long 0x2C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x30 "PDCR12,Port Direct Control Register 12"
|
|
bitfld.long 0x30 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x34 "PDCR13,Port Direct Control Register 13"
|
|
bitfld.long 0x34 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x38 "PDCR14,Port Direct Control Register 14"
|
|
bitfld.long 0x38 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x3C "PDCR15,Port Direct Control Register 15"
|
|
bitfld.long 0x3C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x40 "PDCR16,Port Direct Control Register 16"
|
|
bitfld.long 0x40 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x44 "PDCR17,Port Direct Control Register 17"
|
|
bitfld.long 0x44 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x48 "PDCR18,Port Direct Control Register 18"
|
|
bitfld.long 0x48 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x4C "PDCR19,Port Direct Control Register 19"
|
|
bitfld.long 0x4C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x50 "PDCR20,Port Direct Control Register 20"
|
|
bitfld.long 0x50 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x54 "PDCR21,Port Direct Control Register 21"
|
|
bitfld.long 0x54 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x58 "PDCR22,Port Direct Control Register 22"
|
|
bitfld.long 0x58 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x5C "PDCR23,Port Direct Control Register 23"
|
|
bitfld.long 0x5C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x60 "PDCR24,Port Direct Control Register 24"
|
|
bitfld.long 0x60 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x64 "PDCR25,Port Direct Control Register 25"
|
|
bitfld.long 0x64 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x68 "PDCR26,Port Direct Control Register 26"
|
|
bitfld.long 0x68 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x6C "PDCR27,Port Direct Control Register 27"
|
|
bitfld.long 0x6C 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x70 "PDCR28,Port Direct Control Register 28"
|
|
bitfld.long 0x70 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x74 "PDCR29,Port Direct Control Register 29"
|
|
bitfld.long 0x74 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x78 "PDCR30,Port Direct Control Register 30"
|
|
bitfld.long 0x78 0. "PD,Port Data" "0: Low,1: High"
|
|
line.long 0x7C "PDCR31,Port Direct Control Register 31"
|
|
bitfld.long 0x7C 0. "PD,Port Data" "0: Low,1: High"
|
|
tree.end
|
|
tree.end
|
|
tree "I2CM (Inter-Integrated Circuit for Master)"
|
|
base ad:0x0
|
|
tree "I2CM0"
|
|
base ad:0x40002000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "PRES,Clock Pre-Scale Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "PRES,Clock Pre-Scale data"
|
|
line.long 0x4 "CTR,Control Register"
|
|
hexmask.long.byte 0x4 24.--27. 1. "TXTH,TX FIFO Threshold"
|
|
hexmask.long.byte 0x4 16.--19. 1. "RXTH,RX FIFO Threshold"
|
|
bitfld.long 0x4 10.--11. "DSS,DMA Source Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 9. "ATNS,Auto NACK. STOP mode" "0,1"
|
|
bitfld.long 0x4 8. "FBRS,FIFO Burst Mode" "0,1"
|
|
bitfld.long 0x4 7. "EN,Core Enable" "0: EN Disable,1: EN Enable"
|
|
newline
|
|
bitfld.long 0x4 6. "WEC,Slave Wait Enable Control Register" "0,1"
|
|
bitfld.long 0x4 5. "PSC,Pad Swap Control" "0,1"
|
|
bitfld.long 0x4 4. "FEC,Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "TFCLR,TX FIFO Clear" "0,1"
|
|
bitfld.long 0x4 2. "RFCLR,RX FIFO Clear" "0,1"
|
|
bitfld.long 0x4 1. "TFEN,TX FIFO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RFEN,RX FIFO Enable" "0,1"
|
|
line.long 0x8 "TXR,Transmit Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "TXR,Transmit"
|
|
line.long 0xC "CR,Command Register"
|
|
bitfld.long 0xC 7. "STA,Start Condition Generation" "0: START Condition not generation,1: Start Condition Generation"
|
|
bitfld.long 0xC 6. "STO,Stop Condition Generation" "0: STOP Condition not generation,1: STOP Condition generation"
|
|
bitfld.long 0xC 5. "RD,Read From Slave" "0: RD Disable,1: RD Enable"
|
|
newline
|
|
bitfld.long 0xC 4. "WR,Write to Slave" "0: WR Disable,1: WR Enable"
|
|
bitfld.long 0xC 3. "ACK,Send ACK" "0: send ACK,1: not send ACK"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RXR,Receive Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RXR,Receive"
|
|
line.long 0x4 "SR,Status Register"
|
|
hexmask.long.byte 0x4 24.--28. 1. "TXCNT,TX FIFO Count Value"
|
|
hexmask.long.byte 0x4 16.--20. 1. "RXCNT,RX FIFO Count Value"
|
|
bitfld.long 0x4 6. "BUSY,Bus Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "AL,Arbitration Lost" "0,1"
|
|
bitfld.long 0x4 1. "TIP,Transfer In Progress" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TCFGR,Timing Control Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "RC,Recovery time Counter load value"
|
|
bitfld.long 0x0 5. "CKSEL,Clock Source Select" "0: Clock Source is I2CCLK from clock controller,1: Clock Source is PCLK divided by 2"
|
|
hexmask.long.byte 0x0 0.--4. 1. "FC,Noise Filter Counter load value"
|
|
rgroup.long 0x1C++0x7
|
|
line.long 0x0 "IREQ,Interrupt Request Status Register"
|
|
bitfld.long 0x0 13. "RNACKRS,Receive NACK interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 12. "TUDRRS,TX FIFO Underrun Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 11. "RUDRRS,RX FIFO Underrun Interrupt Request Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "TOVFRS,TX FIFO Overflow Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 9. "ROVFRS,RX FIFO Overflow Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 8. "TXEVTNRS,TX FIFO Not Event Interrupt Request Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RXEVTNRS,RX FIFO Not Event Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 6. "TXEVTRS,TX FIFO Event Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 5. "RXEVTRS,RX FIFO Event Interrupt Request Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ALRS,Arbitration lost Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 2. "STORS,Stop condition detect Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 1. "STARS,Start condition detect Interrupt Request Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RWDRS,Command done Interrupt Request Status" "0,1"
|
|
line.long 0x4 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x4 13. "RNACKRIS,Receive NACK Raw interrupt Status" "0,1"
|
|
bitfld.long 0x4 12. "TUDRRIS,TX FIFO Underrun Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x4 11. "RUDRRIS,RX FIFO Underrun Raw Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "TOVFRIS,TX FIFO Overflow Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x4 9. "ROVFRIS,RX FIFO Overflow Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x4 8. "TXEVTNRIS,TX FIFO Not Event Raw Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "RXEVTNRIS,RX FIFO Not Event Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x4 6. "TXEVTRIS,TX FIFO Event Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x4 5. "RXEVTRIS,RX FIFO Event Raw Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ALRIS,Arbitration lost Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x4 2. "STORIS,Stop condition detect Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x4 1. "STARIS,Start condition detect Raw Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RWDRIS,Command done Raw Interrupt Status" "0,1"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "DIEN,DMA and Interrupt Enable Register"
|
|
bitfld.long 0x0 13. "RNACKIE,Receive NACK interrupt Enable" "0,1"
|
|
bitfld.long 0x0 12. "TUDRIE,TX FIFO Underrun Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "RUDRIE,RX FIFO Underrun Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "TOVFIE,TX FIFO Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 9. "ROVFIE,RX FIFO Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "TXEVTNIE,TX FIFO Not Event Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RXEVTNIE,RX FIFO Not Event Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "TXEVTIE,TX FIFO Event Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "RXEVTIE,RX FIFO Event Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "DMAE,Dma Enable" "0,1"
|
|
bitfld.long 0x0 3. "ALIE,Arbitration lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "STOIE,Stop condition detect Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "STAIE,Start condition detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "RWDIE,Command done Interrupt Enable" "0,1"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "ICLR,Interrupt request Clear Register"
|
|
bitfld.long 0x0 13. "RNACKIRSC,Receive NACK interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 12. "TUDRIRSC,TX FIFO Underrun Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 11. "RUDRIRSC,RX FIFO Underrun Interrupt Request Status Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "TOVFIRSC,TX FIFO Overflow Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 9. "ROVFIRSC,RX FIFO Overflow Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 3. "ALIRSC,Arbitration lost Interrupt Request Status Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "STOIRSC,Stop condition detect Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 1. "STAIRSC,Start condition detect Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 0. "RWDIRSC,Command done Interrupt Request Status Clear" "0,1"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "DTXR,Transmit Register for DMA"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DTXR,DMA Transmit"
|
|
line.long 0x4 "DCMD,Command Register for DMA"
|
|
bitfld.long 0x4 7. "STA,Start Condition Generation for DMA" "0: START Condition not generation,1: Start Condition Generation"
|
|
bitfld.long 0x4 6. "STO,Stop Condition Generation for DMA" "0: STOP Condition not generation,1: STOP Condition generation"
|
|
bitfld.long 0x4 5. "RD,Read From Slave for DMA" "0: RD Disable,1: RD Enable"
|
|
newline
|
|
bitfld.long 0x4 4. "WR,Write to Slave for DMA" "0: WR Disable,1: WR Enable"
|
|
bitfld.long 0x4 3. "ACK,Send ACK for DMA" "0: send ACK,1: not send ACK"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x0 "DCLR,DMA request Clear Register for DMA"
|
|
bitfld.long 0x0 4. "DMARSC,DMA Request Status Clear" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "I2CS (Inter-Integrated Circuit for Slave)"
|
|
base ad:0x0
|
|
tree "I2CS0"
|
|
base ad:0x40002100
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "DPORT,Data Access Port"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DPORT,TX and RX FIFO access Data Port"
|
|
line.long 0x4 "CTRL,Control Register"
|
|
hexmask.long.byte 0x4 20.--24. 1. "FC,Filter Counter Load Value"
|
|
hexmask.long.byte 0x4 14.--18. 1. "TXTH,TX FIFO Threshold"
|
|
hexmask.long.byte 0x4 8.--12. 1. "RXTH,RX FIFO Threshold"
|
|
bitfld.long 0x4 5. "FEC,Filter Enable" "0,1"
|
|
bitfld.long 0x4 4. "WS,Wait Status Control by SCL Stretching" "0: Enable(Wait Status Control by SCL Stretching),1: Disable(Wait Status Control by SCL Stretching)"
|
|
bitfld.long 0x4 2. "FCLR,FIFO Clear" "0,1"
|
|
bitfld.long 0x4 0. "EN,Core Enable" "0,1"
|
|
line.long 0x8 "ADDR,Address Register"
|
|
hexmask.long.byte 0x8 1.--7. 1. "ADDR,Device Address"
|
|
line.long 0xC "IEN,Interrupt Enable Register"
|
|
bitfld.long 0xC 11. "AHIE,Address Hit Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 10. "TEIE,Transmit End Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 9. "STOIE,Stop Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 8. "STAIE,Start Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 7. "TFUIE,TX FIFO Under-run Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 6. "RFUIE,RX FIFO Under-run Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 5. "TFOIE,TX FIFO Over-flow Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 4. "RFOIE,RX FIFO Over-flow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "TNIE,TX FIFO Not Event Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 2. "RNIE,RX FIFO Not Event Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 1. "TIE,TX FIFO Event Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 0. "RIE,RX FIFO Event Interrupt Enable" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "IREQ,Interrupt Request Status Register"
|
|
bitfld.long 0x0 27. "AHIF,Address Hit Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 26. "TEIF,Transmit End Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 25. "STOIF,Stop Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 24. "STAIF,Start Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 23. "TFUIF,TX FIFO Under-run Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 22. "RFUIF,RX FIFO Under-run Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 21. "TFOIF,TX FIFO Over-flow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 20. "RFOIF,RX FIFO Over-flow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TNIF,TX FIFO Not Event Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 18. "RNIF,RX FIFO Not Event Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 17. "TIF,TX FIFO Event Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 16. "RIF,RX FIFO Event Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 11. "AHIRS,Address Hit Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 10. "TEIRS,Transmit End Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 9. "STOIRS,Stop Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 8. "STAIRS,Start Interrupt Request Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TFUIRS,TX FIFO Under-run Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 6. "RFUIRS,RX FIFO Under-run Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 5. "TFOIRS,TX FIFO Over-flow Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 4. "RFOIRS,RX FIFO Over-flow Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 3. "TNIRS,TX FIFO Not Event Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 2. "RNIRS,RX FIFO Not Event Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 1. "TIRS,TX FIFO Event Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 0. "RIRS,RX FIFO Event Interrupt Request Status" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "ICLR,Interrupt request Clear Register"
|
|
bitfld.long 0x0 27. "AHIFC,Address Hit Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 26. "TEIFC,Transmit End Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 25. "STOIFC,Stop Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 24. "STAIFC,Start Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 23. "TFUIFC,TX FIFO Under-run Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 22. "RFUIFC,RX FIFO Under-run Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 21. "TFOIFC,TX FIFO Over-flow Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 20. "RFOIFC,RX FIFO Over-flow Interrupt Flag Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "AHIRSC,Address Hit Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 10. "TEIRSC,Transmit End Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 9. "STOIRSC,Stop Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 8. "STAIRSC,Start Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 7. "TFUIRSC,TX FIFO Under-run Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 6. "RFUIRSC,RX FIFO Under-run Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 5. "TFOIRSC,TX FIFO Over-flow Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 4. "RFOIRSC,RX FIFO Over-flow Interrupt Request Status Clear" "0,1"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "DCTRL,DMA Control Register"
|
|
bitfld.long 0x0 31. "TDEN,TX DMA Request Enable" "0,1"
|
|
bitfld.long 0x0 16. "TDS,TX DMA Request Source Select" "0,1"
|
|
bitfld.long 0x0 15. "RDEN,RX DMA Request Enable" "0,1"
|
|
bitfld.long 0x0 0. "RDS,RX DMA Request Source Select" "0,1"
|
|
rgroup.long 0x24++0x7
|
|
line.long 0x0 "TVC,Transmit Buffer Valid Entry Count"
|
|
hexmask.long.byte 0x0 0.--5. 1. "TXVC,Transmit Buffer Valid Entry Count"
|
|
line.long 0x4 "RVC,Receive Buffer Valid Entry Count"
|
|
hexmask.long.byte 0x4 0.--5. 1. "RXVC,Receive Buffer Valid Entry Count"
|
|
tree.end
|
|
tree "I2CS1"
|
|
base ad:0x40002200
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "DPORT,Data Access Port"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DPORT,TX and RX FIFO access Data Port"
|
|
line.long 0x4 "CTRL,Control Register"
|
|
hexmask.long.byte 0x4 20.--24. 1. "FC,Filter Counter Load Value"
|
|
hexmask.long.byte 0x4 14.--18. 1. "TXTH,TX FIFO Threshold"
|
|
hexmask.long.byte 0x4 8.--12. 1. "RXTH,RX FIFO Threshold"
|
|
bitfld.long 0x4 5. "FEC,Filter Enable" "0,1"
|
|
bitfld.long 0x4 4. "WS,Wait Status Control by SCL Stretching" "0: Enable(Wait Status Control by SCL Stretching),1: Disable(Wait Status Control by SCL Stretching)"
|
|
bitfld.long 0x4 2. "FCLR,FIFO Clear" "0,1"
|
|
bitfld.long 0x4 0. "EN,Core Enable" "0,1"
|
|
line.long 0x8 "ADDR,Address Register"
|
|
hexmask.long.byte 0x8 1.--7. 1. "ADDR,Device Address"
|
|
line.long 0xC "IEN,Interrupt Enable Register"
|
|
bitfld.long 0xC 11. "AHIE,Address Hit Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 10. "TEIE,Transmit End Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 9. "STOIE,Stop Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 8. "STAIE,Start Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 7. "TFUIE,TX FIFO Under-run Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 6. "RFUIE,RX FIFO Under-run Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 5. "TFOIE,TX FIFO Over-flow Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 4. "RFOIE,RX FIFO Over-flow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "TNIE,TX FIFO Not Event Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 2. "RNIE,RX FIFO Not Event Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 1. "TIE,TX FIFO Event Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 0. "RIE,RX FIFO Event Interrupt Enable" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "IREQ,Interrupt Request Status Register"
|
|
bitfld.long 0x0 27. "AHIF,Address Hit Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 26. "TEIF,Transmit End Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 25. "STOIF,Stop Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 24. "STAIF,Start Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 23. "TFUIF,TX FIFO Under-run Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 22. "RFUIF,RX FIFO Under-run Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 21. "TFOIF,TX FIFO Over-flow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 20. "RFOIF,RX FIFO Over-flow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TNIF,TX FIFO Not Event Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 18. "RNIF,RX FIFO Not Event Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 17. "TIF,TX FIFO Event Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 16. "RIF,RX FIFO Event Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 11. "AHIRS,Address Hit Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 10. "TEIRS,Transmit End Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 9. "STOIRS,Stop Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 8. "STAIRS,Start Interrupt Request Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TFUIRS,TX FIFO Under-run Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 6. "RFUIRS,RX FIFO Under-run Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 5. "TFOIRS,TX FIFO Over-flow Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 4. "RFOIRS,RX FIFO Over-flow Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 3. "TNIRS,TX FIFO Not Event Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 2. "RNIRS,RX FIFO Not Event Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 1. "TIRS,TX FIFO Event Interrupt Request Status" "0,1"
|
|
bitfld.long 0x0 0. "RIRS,RX FIFO Event Interrupt Request Status" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "ICLR,Interrupt request Clear Register"
|
|
bitfld.long 0x0 27. "AHIFC,Address Hit Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 26. "TEIFC,Transmit End Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 25. "STOIFC,Stop Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 24. "STAIFC,Start Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 23. "TFUIFC,TX FIFO Under-run Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 22. "RFUIFC,RX FIFO Under-run Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 21. "TFOIFC,TX FIFO Over-flow Interrupt Flag Clear" "0,1"
|
|
bitfld.long 0x0 20. "RFOIFC,RX FIFO Over-flow Interrupt Flag Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "AHIRSC,Address Hit Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 10. "TEIRSC,Transmit End Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 9. "STOIRSC,Stop Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 8. "STAIRSC,Start Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 7. "TFUIRSC,TX FIFO Under-run Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 6. "RFUIRSC,RX FIFO Under-run Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 5. "TFOIRSC,TX FIFO Over-flow Interrupt Request Status Clear" "0,1"
|
|
bitfld.long 0x0 4. "RFOIRSC,RX FIFO Over-flow Interrupt Request Status Clear" "0,1"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "DCTRL,DMA Control Register"
|
|
bitfld.long 0x0 31. "TDEN,TX DMA Request Enable" "0,1"
|
|
bitfld.long 0x0 16. "TDS,TX DMA Request Source Select" "0,1"
|
|
bitfld.long 0x0 15. "RDEN,RX DMA Request Enable" "0,1"
|
|
bitfld.long 0x0 0. "RDS,RX DMA Request Source Select" "0,1"
|
|
rgroup.long 0x24++0x7
|
|
line.long 0x0 "TVC,Transmit Buffer Valid Entry Count"
|
|
hexmask.long.byte 0x0 0.--5. 1. "TXVC,Transmit Buffer Valid Entry Count"
|
|
line.long 0x4 "RVC,Receive Buffer Valid Entry Count"
|
|
hexmask.long.byte 0x4 0.--5. 1. "RXVC,Receive Buffer Valid Entry Count"
|
|
tree.end
|
|
tree.end
|
|
tree "ICU (System Interrupt Controller)"
|
|
base ad:0x40041600
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "CIQR0,Clear IRQ Register 0"
|
|
bitfld.long 0x0 31. "IRQ31,Clear IRQ #31" "0,1"
|
|
bitfld.long 0x0 30. "IRQ30,Clear IRQ #30" "0,1"
|
|
bitfld.long 0x0 29. "IRQ29,Clear IRQ #29" "0,1"
|
|
bitfld.long 0x0 28. "IRQ28,Clear IRQ #28" "0,1"
|
|
bitfld.long 0x0 27. "IRQ27,Clear IRQ #27" "0,1"
|
|
bitfld.long 0x0 26. "IRQ26,Clear IRQ #26" "0,1"
|
|
bitfld.long 0x0 25. "IRQ25,Clear IRQ #25" "0,1"
|
|
bitfld.long 0x0 24. "IRQ24,Clear IRQ #24" "0,1"
|
|
bitfld.long 0x0 23. "IRQ23,Clear IRQ #23" "0,1"
|
|
bitfld.long 0x0 22. "IRQ22,Clear IRQ #22" "0,1"
|
|
bitfld.long 0x0 21. "IRQ21,Clear IRQ #21" "0,1"
|
|
bitfld.long 0x0 20. "IRQ20,Clear IRQ #20" "0,1"
|
|
bitfld.long 0x0 19. "IRQ19,Clear IRQ #19" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "IRQ18,Clear IRQ #18" "0,1"
|
|
bitfld.long 0x0 17. "IRQ17,Clear IRQ #17" "0,1"
|
|
bitfld.long 0x0 16. "IRQ16,Clear IRQ #16" "0,1"
|
|
bitfld.long 0x0 15. "IRQ15,Clear IRQ #15" "0,1"
|
|
bitfld.long 0x0 14. "IRQ14,Clear IRQ #14" "0,1"
|
|
bitfld.long 0x0 13. "IRQ13,Clear IRQ #13" "0,1"
|
|
bitfld.long 0x0 12. "IRQ12,Clear IRQ #12" "0,1"
|
|
bitfld.long 0x0 11. "IRQ11,Clear IRQ #11" "0,1"
|
|
bitfld.long 0x0 10. "IRQ10,Clear IRQ #10" "0,1"
|
|
bitfld.long 0x0 9. "IRQ9,Clear IRQ #9" "0,1"
|
|
bitfld.long 0x0 8. "IRQ8,Clear IRQ #8" "0,1"
|
|
bitfld.long 0x0 7. "IRQ7,Clear IRQ #7" "0,1"
|
|
bitfld.long 0x0 6. "IRQ6,Clear IRQ #6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IRQ5,Clear IRQ #5" "0,1"
|
|
bitfld.long 0x0 4. "IRQ4,Clear IRQ #4" "0,1"
|
|
bitfld.long 0x0 3. "IRQ3,Clear IRQ #3" "0,1"
|
|
bitfld.long 0x0 2. "IRQ2,Clear IRQ #2" "0,1"
|
|
bitfld.long 0x0 1. "IRQ1,Clear IRQ #1" "0,1"
|
|
bitfld.long 0x0 0. "IRQ0,Clear IRQ #0" "0,1"
|
|
line.long 0x4 "CIQR1,Clear IRQ Register 1"
|
|
bitfld.long 0x4 31. "IRQ63,Clear IRQ #63" "0,1"
|
|
bitfld.long 0x4 30. "IRQ62,Clear IRQ #62" "0,1"
|
|
bitfld.long 0x4 29. "IRQ61,Clear IRQ #61" "0,1"
|
|
bitfld.long 0x4 28. "IRQ60,Clear IRQ #60" "0,1"
|
|
bitfld.long 0x4 27. "IRQ59,Clear IRQ #59" "0,1"
|
|
bitfld.long 0x4 26. "IRQ58,Clear IRQ #58" "0,1"
|
|
bitfld.long 0x4 25. "IRQ57,Clear IRQ #57" "0,1"
|
|
bitfld.long 0x4 24. "IRQ56,Clear IRQ #56" "0,1"
|
|
bitfld.long 0x4 23. "IRQ55,Clear IRQ #55" "0,1"
|
|
bitfld.long 0x4 22. "IRQ54,Clear IRQ #54" "0,1"
|
|
bitfld.long 0x4 21. "IRQ53,Clear IRQ #53" "0,1"
|
|
bitfld.long 0x4 20. "IRQ52,Clear IRQ #52" "0,1"
|
|
bitfld.long 0x4 19. "IRQ51,Clear IRQ #51" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "IRQ50,Clear IRQ #50" "0,1"
|
|
bitfld.long 0x4 17. "IRQ49,Clear IRQ #49" "0,1"
|
|
bitfld.long 0x4 16. "IRQ48,Clear IRQ #48" "0,1"
|
|
bitfld.long 0x4 15. "IRQ47,Clear IRQ #47" "0,1"
|
|
bitfld.long 0x4 14. "IRQ46,Clear IRQ #46" "0,1"
|
|
bitfld.long 0x4 13. "IRQ45,Clear IRQ #45" "0,1"
|
|
bitfld.long 0x4 12. "IRQ44,Clear IRQ #44" "0,1"
|
|
bitfld.long 0x4 11. "IRQ43,Clear IRQ #43" "0,1"
|
|
bitfld.long 0x4 10. "IRQ42,Clear IRQ #42" "0,1"
|
|
bitfld.long 0x4 9. "IRQ41,Clear IRQ #41" "0,1"
|
|
bitfld.long 0x4 8. "IRQ40,Clear IRQ #40" "0,1"
|
|
bitfld.long 0x4 7. "IRQ39,Clear IRQ #39" "0,1"
|
|
bitfld.long 0x4 6. "IRQ38,Clear IRQ #38" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "IRQ37,Clear IRQ #37" "0,1"
|
|
bitfld.long 0x4 4. "IRQ36,Clear IRQ #36" "0,1"
|
|
bitfld.long 0x4 3. "IRQ35,Clear IRQ #35" "0,1"
|
|
bitfld.long 0x4 2. "IRQ34,Clear IRQ #34" "0,1"
|
|
bitfld.long 0x4 1. "IRQ33,Clear IRQ #33" "0,1"
|
|
bitfld.long 0x4 0. "IRQ32,Clear IRQ #32" "0,1"
|
|
line.long 0x8 "CIQR2,Clear IRQ Register 2"
|
|
bitfld.long 0x8 31. "IRQ95,Clear IRQ #95" "0,1"
|
|
bitfld.long 0x8 30. "IRQ94,Clear IRQ #94" "0,1"
|
|
bitfld.long 0x8 29. "IRQ93,Clear IRQ #93" "0,1"
|
|
bitfld.long 0x8 28. "IRQ92,Clear IRQ #92" "0,1"
|
|
bitfld.long 0x8 27. "IRQ91,Clear IRQ #91" "0,1"
|
|
bitfld.long 0x8 26. "IRQ90,Clear IRQ #90" "0,1"
|
|
bitfld.long 0x8 25. "IRQ89,Clear IRQ #89" "0,1"
|
|
bitfld.long 0x8 24. "IRQ88,Clear IRQ #88" "0,1"
|
|
bitfld.long 0x8 23. "IRQ87,Clear IRQ #87" "0,1"
|
|
bitfld.long 0x8 22. "IRQ86,Clear IRQ #86" "0,1"
|
|
bitfld.long 0x8 21. "IRQ85,Clear IRQ #85" "0,1"
|
|
bitfld.long 0x8 20. "IRQ84,Clear IRQ #84" "0,1"
|
|
bitfld.long 0x8 19. "IRQ83,Clear IRQ #83" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "IRQ82,Clear IRQ #82" "0,1"
|
|
bitfld.long 0x8 17. "IRQ81,Clear IRQ #81" "0,1"
|
|
bitfld.long 0x8 16. "IRQ80,Clear IRQ #80" "0,1"
|
|
bitfld.long 0x8 11. "IRQ75,Clear IRQ #75" "0,1"
|
|
bitfld.long 0x8 10. "IRQ74,Clear IRQ #74" "0,1"
|
|
bitfld.long 0x8 9. "IRQ73,Clear IRQ #73" "0,1"
|
|
bitfld.long 0x8 8. "IRQ72,Clear IRQ #72" "0,1"
|
|
bitfld.long 0x8 7. "IRQ71,Clear IRQ #71" "0,1"
|
|
bitfld.long 0x8 6. "IRQ70,Clear IRQ #70" "0,1"
|
|
bitfld.long 0x8 5. "IRQ69,Clear IRQ #69" "0,1"
|
|
bitfld.long 0x8 4. "IRQ68,Clear IRQ #68" "0,1"
|
|
bitfld.long 0x8 3. "IRQ67,Clear IRQ #67" "0,1"
|
|
bitfld.long 0x8 2. "IRQ66,Clear IRQ #66" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "IRQ65,Clear IRQ #65" "0,1"
|
|
bitfld.long 0x8 0. "IRQ64,Clear IRQ #64" "0,1"
|
|
line.long 0xC "CIQR3,Clear IRQ Register 3"
|
|
bitfld.long 0xC 28. "IRQ124,Clear IRQ #124" "0,1"
|
|
bitfld.long 0xC 27. "IRQ123,Clear IRQ #123" "0,1"
|
|
bitfld.long 0xC 26. "IRQ122,Clear IRQ #122" "0,1"
|
|
bitfld.long 0xC 25. "IRQ121,Clear IRQ #121" "0,1"
|
|
bitfld.long 0xC 24. "IRQ120,Clear IRQ #120" "0,1"
|
|
bitfld.long 0xC 23. "IRQ119,Clear IRQ #119" "0,1"
|
|
bitfld.long 0xC 22. "IRQ118,Clear IRQ #118" "0,1"
|
|
bitfld.long 0xC 21. "IRQ117,Clear IRQ #117" "0,1"
|
|
bitfld.long 0xC 20. "IRQ116,Clear IRQ #116" "0,1"
|
|
bitfld.long 0xC 19. "IRQ115,Clear IRQ #115" "0,1"
|
|
bitfld.long 0xC 18. "IRQ114,Clear IRQ #114" "0,1"
|
|
bitfld.long 0xC 17. "IRQ113,Clear IRQ #113" "0,1"
|
|
bitfld.long 0xC 16. "IRQ112,Clear IRQ #112" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "IRQ111,Clear IRQ #111" "0,1"
|
|
bitfld.long 0xC 14. "IRQ110,Clear IRQ #110" "0,1"
|
|
bitfld.long 0xC 13. "IRQ109,Clear IRQ #109" "0,1"
|
|
bitfld.long 0xC 12. "IRQ108,Clear IRQ #108" "0,1"
|
|
bitfld.long 0xC 11. "IRQ107,Clear IRQ #107" "0,1"
|
|
bitfld.long 0xC 10. "IRQ106,Clear IRQ #106" "0,1"
|
|
bitfld.long 0xC 9. "IRQ105,Clear IRQ #105" "0,1"
|
|
bitfld.long 0xC 8. "IRQ104,Clear IRQ #104" "0,1"
|
|
bitfld.long 0xC 7. "IRQ103,Clear IRQ #103" "0,1"
|
|
bitfld.long 0xC 6. "IRQ102,Clear IRQ #102" "0,1"
|
|
bitfld.long 0xC 5. "IRQ101,Clear IRQ #101" "0,1"
|
|
bitfld.long 0xC 4. "IRQ100,Clear IRQ #100" "0,1"
|
|
bitfld.long 0xC 3. "IRQ99,Clear IRQ #99" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "IRQ98,Clear IRQ #98" "0,1"
|
|
bitfld.long 0xC 1. "IRQ97,Clear IRQ #97" "0,1"
|
|
bitfld.long 0xC 0. "IRQ96,Clear IRQ #96" "0,1"
|
|
line.long 0x10 "CIQR4,Clear IRQ Register 4"
|
|
bitfld.long 0x10 31. "IRQ159,Clear IRQ #159" "0,1"
|
|
bitfld.long 0x10 30. "IRQ158,Clear IRQ #158" "0,1"
|
|
bitfld.long 0x10 29. "IRQ157,Clear IRQ #157" "0,1"
|
|
bitfld.long 0x10 28. "IRQ156,Clear IRQ #156" "0,1"
|
|
bitfld.long 0x10 27. "IRQ155,Clear IRQ #155" "0,1"
|
|
bitfld.long 0x10 26. "IRQ154,Clear IRQ #154" "0,1"
|
|
bitfld.long 0x10 25. "IRQ153,Clear IRQ #153" "0,1"
|
|
bitfld.long 0x10 24. "IRQ152,Clear IRQ #152" "0,1"
|
|
bitfld.long 0x10 23. "IRQ151,Clear IRQ #151" "0,1"
|
|
bitfld.long 0x10 22. "IRQ150,Clear IRQ #150" "0,1"
|
|
bitfld.long 0x10 21. "IRQ149,Clear IRQ #149" "0,1"
|
|
bitfld.long 0x10 20. "IRQ148,Clear IRQ #148" "0,1"
|
|
bitfld.long 0x10 19. "IRQ147,Clear IRQ #147" "0,1"
|
|
newline
|
|
bitfld.long 0x10 18. "IRQ146,Clear IRQ #146" "0,1"
|
|
bitfld.long 0x10 17. "IRQ145,Clear IRQ #145" "0,1"
|
|
bitfld.long 0x10 16. "IRQ144,Clear IRQ #144" "0,1"
|
|
bitfld.long 0x10 15. "IRQ143,Clear IRQ #143" "0,1"
|
|
bitfld.long 0x10 14. "IRQ142,Clear IRQ #142" "0,1"
|
|
bitfld.long 0x10 13. "IRQ141,Clear IRQ #141" "0,1"
|
|
bitfld.long 0x10 12. "IRQ140,Clear IRQ #140" "0,1"
|
|
bitfld.long 0x10 11. "IRQ139,Clear IRQ #139" "0,1"
|
|
bitfld.long 0x10 8. "IRQ136,Clear IRQ #136" "0,1"
|
|
bitfld.long 0x10 7. "IRQ135,Clear IRQ #135" "0,1"
|
|
bitfld.long 0x10 6. "IRQ134,Clear IRQ #134" "0,1"
|
|
bitfld.long 0x10 5. "IRQ133,Clear IRQ #133" "0,1"
|
|
bitfld.long 0x10 4. "IRQ132,Clear IRQ #132" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "IRQ131,Clear IRQ #131" "0,1"
|
|
line.long 0x14 "CIQR5,Clear IRQ Register 5"
|
|
bitfld.long 0x14 7. "IRQ167,Clear IRQ #167" "0,1"
|
|
bitfld.long 0x14 6. "IRQ166,Clear IRQ #166" "0,1"
|
|
bitfld.long 0x14 5. "IRQ165,Clear IRQ #165" "0,1"
|
|
bitfld.long 0x14 4. "IRQ164,Clear IRQ #164" "0,1"
|
|
bitfld.long 0x14 3. "IRQ163,Clear IRQ #163" "0,1"
|
|
bitfld.long 0x14 2. "IRQ162,Clear IRQ #162" "0,1"
|
|
bitfld.long 0x14 1. "IRQ161,Clear IRQ #161" "0,1"
|
|
bitfld.long 0x14 0. "IRQ160,Clear IRQ #160" "0,1"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "RTSR0,Rising-edge Triggering Control Register 0"
|
|
bitfld.long 0x0 31. "IRQ31,Enable triggering at rising-edge IRQ #31" "0,1"
|
|
bitfld.long 0x0 30. "IRQ30,Enable triggering at rising-edge IRQ #30" "0,1"
|
|
bitfld.long 0x0 29. "IRQ29,Enable triggering at rising-edge IRQ #29" "0,1"
|
|
bitfld.long 0x0 28. "IRQ28,Enable triggering at rising-edge IRQ #28" "0,1"
|
|
bitfld.long 0x0 27. "IRQ27,Enable triggering at rising-edge IRQ #27" "0,1"
|
|
bitfld.long 0x0 26. "IRQ26,Enable triggering at rising-edge IRQ #26" "0,1"
|
|
bitfld.long 0x0 25. "IRQ25,Enable triggering at rising-edge IRQ #25" "0,1"
|
|
bitfld.long 0x0 24. "IRQ24,Enable triggering at rising-edge IRQ #24" "0,1"
|
|
bitfld.long 0x0 23. "IRQ23,Enable triggering at rising-edge IRQ #23" "0,1"
|
|
bitfld.long 0x0 22. "IRQ22,Enable triggering at rising-edge IRQ #22" "0,1"
|
|
bitfld.long 0x0 21. "IRQ21,Enable triggering at rising-edge IRQ #21" "0,1"
|
|
bitfld.long 0x0 20. "IRQ20,Enable triggering at rising-edge IRQ #20" "0,1"
|
|
bitfld.long 0x0 19. "IRQ19,Enable triggering at rising-edge IRQ #19" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "IRQ18,Enable triggering at rising-edge IRQ #18" "0,1"
|
|
bitfld.long 0x0 17. "IRQ17,Enable triggering at rising-edge IRQ #17" "0,1"
|
|
bitfld.long 0x0 16. "IRQ16,Enable triggering at rising-edge IRQ #16" "0,1"
|
|
bitfld.long 0x0 15. "IRQ15,Enable triggering at rising-edge IRQ #15" "0,1"
|
|
bitfld.long 0x0 14. "IRQ14,Enable triggering at rising-edge IRQ #14" "0,1"
|
|
bitfld.long 0x0 13. "IRQ13,Enable triggering at rising-edge IRQ #13" "0,1"
|
|
bitfld.long 0x0 12. "IRQ12,Enable triggering at rising-edge IRQ #12" "0,1"
|
|
bitfld.long 0x0 11. "IRQ11,Enable triggering at rising-edge IRQ #11" "0,1"
|
|
bitfld.long 0x0 10. "IRQ10,Enable triggering at rising-edge IRQ #10" "0,1"
|
|
bitfld.long 0x0 9. "IRQ9,Enable triggering at rising-edge IRQ #9" "0,1"
|
|
bitfld.long 0x0 8. "IRQ8,Enable triggering at rising-edge IRQ #8" "0,1"
|
|
bitfld.long 0x0 7. "IRQ7,Enable triggering at rising-edge IRQ #7" "0,1"
|
|
bitfld.long 0x0 6. "IRQ6,Enable triggering at rising-edge IRQ #6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IRQ5,Enable triggering at rising-edge IRQ #5" "0,1"
|
|
bitfld.long 0x0 4. "IRQ4,Enable triggering at rising-edge IRQ #4" "0,1"
|
|
bitfld.long 0x0 3. "IRQ3,Enable triggering at rising-edge IRQ #3" "0,1"
|
|
bitfld.long 0x0 2. "IRQ2,Enable triggering at rising-edge IRQ #2" "0,1"
|
|
bitfld.long 0x0 1. "IRQ1,Enable triggering at rising-edge IRQ #1" "0,1"
|
|
bitfld.long 0x0 0. "IRQ0,Enable triggering at rising-edge IRQ #0" "0,1"
|
|
line.long 0x4 "RTSR1,Rising-edge Triggering Control Register 1"
|
|
bitfld.long 0x4 31. "IRQ63,Enable triggering at rising-edge IRQ #63" "0,1"
|
|
bitfld.long 0x4 30. "IRQ62,Enable triggering at rising-edge IRQ #62" "0,1"
|
|
bitfld.long 0x4 29. "IRQ61,Enable triggering at rising-edge IRQ #61" "0,1"
|
|
bitfld.long 0x4 28. "IRQ60,Enable triggering at rising-edge IRQ #60" "0,1"
|
|
bitfld.long 0x4 27. "IRQ59,Enable triggering at rising-edge IRQ #59" "0,1"
|
|
bitfld.long 0x4 26. "IRQ58,Enable triggering at rising-edge IRQ #58" "0,1"
|
|
bitfld.long 0x4 25. "IRQ57,Enable triggering at rising-edge IRQ #57" "0,1"
|
|
bitfld.long 0x4 24. "IRQ56,Enable triggering at rising-edge IRQ #56" "0,1"
|
|
bitfld.long 0x4 23. "IRQ55,Enable triggering at rising-edge IRQ #55" "0,1"
|
|
bitfld.long 0x4 22. "IRQ54,Enable triggering at rising-edge IRQ #54" "0,1"
|
|
bitfld.long 0x4 21. "IRQ53,Enable triggering at rising-edge IRQ #53" "0,1"
|
|
bitfld.long 0x4 20. "IRQ52,Enable triggering at rising-edge IRQ #52" "0,1"
|
|
bitfld.long 0x4 19. "IRQ51,Enable triggering at rising-edge IRQ #51" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "IRQ50,Enable triggering at rising-edge IRQ #50" "0,1"
|
|
bitfld.long 0x4 17. "IRQ49,Enable triggering at rising-edge IRQ #49" "0,1"
|
|
bitfld.long 0x4 16. "IRQ48,Enable triggering at rising-edge IRQ #48" "0,1"
|
|
bitfld.long 0x4 15. "IRQ47,Enable triggering at rising-edge IRQ #47" "0,1"
|
|
bitfld.long 0x4 14. "IRQ46,Enable triggering at rising-edge IRQ #46" "0,1"
|
|
bitfld.long 0x4 13. "IRQ45,Enable triggering at rising-edge IRQ #45" "0,1"
|
|
bitfld.long 0x4 12. "IRQ44,Enable triggering at rising-edge IRQ #44" "0,1"
|
|
bitfld.long 0x4 11. "IRQ43,Enable triggering at rising-edge IRQ #43" "0,1"
|
|
bitfld.long 0x4 10. "IRQ42,Enable triggering at rising-edge IRQ #42" "0,1"
|
|
bitfld.long 0x4 9. "IRQ41,Enable triggering at rising-edge IRQ #41" "0,1"
|
|
bitfld.long 0x4 8. "IRQ40,Enable triggering at rising-edge IRQ #40" "0,1"
|
|
bitfld.long 0x4 7. "IRQ39,Enable triggering at rising-edge IRQ #39" "0,1"
|
|
bitfld.long 0x4 6. "IRQ38,Enable triggering at rising-edge IRQ #38" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "IRQ37,Enable triggering at rising-edge IRQ #37" "0,1"
|
|
bitfld.long 0x4 4. "IRQ36,Enable triggering at rising-edge IRQ #36" "0,1"
|
|
bitfld.long 0x4 3. "IRQ35,Enable triggering at rising-edge IRQ #35" "0,1"
|
|
bitfld.long 0x4 2. "IRQ34,Enable triggering at rising-edge IRQ #34" "0,1"
|
|
bitfld.long 0x4 1. "IRQ33,Enable triggering at rising-edge IRQ #33" "0,1"
|
|
bitfld.long 0x4 0. "IRQ32,Enable triggering at rising-edge IRQ #32" "0,1"
|
|
line.long 0x8 "RTSR2,Rising-edge Triggering Control Register 2"
|
|
bitfld.long 0x8 31. "IRQ95,Enable triggering at rising-edge IRQ #95" "0,1"
|
|
bitfld.long 0x8 30. "IRQ94,Enable triggering at rising-edge IRQ #94" "0,1"
|
|
bitfld.long 0x8 29. "IRQ93,Enable triggering at rising-edge IRQ #93" "0,1"
|
|
bitfld.long 0x8 28. "IRQ92,Enable triggering at rising-edge IRQ #92" "0,1"
|
|
bitfld.long 0x8 27. "IRQ91,Enable triggering at rising-edge IRQ #91" "0,1"
|
|
bitfld.long 0x8 26. "IRQ90,Enable triggering at rising-edge IRQ #90" "0,1"
|
|
bitfld.long 0x8 25. "IRQ89,Enable triggering at rising-edge IRQ #89" "0,1"
|
|
bitfld.long 0x8 24. "IRQ88,Enable triggering at rising-edge IRQ #88" "0,1"
|
|
bitfld.long 0x8 23. "IRQ87,Enable triggering at rising-edge IRQ #87" "0,1"
|
|
bitfld.long 0x8 22. "IRQ86,Enable triggering at rising-edge IRQ #86" "0,1"
|
|
bitfld.long 0x8 21. "IRQ85,Enable triggering at rising-edge IRQ #85" "0,1"
|
|
bitfld.long 0x8 20. "IRQ84,Enable triggering at rising-edge IRQ #84" "0,1"
|
|
bitfld.long 0x8 19. "IRQ83,Enable triggering at rising-edge IRQ #83" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "IRQ82,Enable triggering at rising-edge IRQ #82" "0,1"
|
|
bitfld.long 0x8 17. "IRQ81,Enable triggering at rising-edge IRQ #81" "0,1"
|
|
bitfld.long 0x8 16. "IRQ80,Enable triggering at rising-edge IRQ #80" "0,1"
|
|
bitfld.long 0x8 11. "IRQ75,Enable triggering at rising-edge IRQ #75" "0,1"
|
|
bitfld.long 0x8 10. "IRQ74,Enable triggering at rising-edge IRQ #74" "0,1"
|
|
bitfld.long 0x8 9. "IRQ73,Enable triggering at rising-edge IRQ #73" "0,1"
|
|
bitfld.long 0x8 8. "IRQ72,Enable triggering at rising-edge IRQ #72" "0,1"
|
|
bitfld.long 0x8 7. "IRQ71,Enable triggering at rising-edge IRQ #71" "0,1"
|
|
bitfld.long 0x8 6. "IRQ70,Enable triggering at rising-edge IRQ #70" "0,1"
|
|
bitfld.long 0x8 5. "IRQ69,Enable triggering at rising-edge IRQ #69" "0,1"
|
|
bitfld.long 0x8 4. "IRQ68,Enable triggering at rising-edge IRQ #68" "0,1"
|
|
bitfld.long 0x8 3. "IRQ67,Enable triggering at rising-edge IRQ #67" "0,1"
|
|
bitfld.long 0x8 2. "IRQ66,Enable triggering at rising-edge IRQ #66" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "IRQ65,Enable triggering at rising-edge IRQ #65" "0,1"
|
|
bitfld.long 0x8 0. "IRQ64,Enable triggering at rising-edge IRQ #64" "0,1"
|
|
line.long 0xC "RTSR3,Rising-edge Triggering Control Register 3"
|
|
bitfld.long 0xC 28. "IRQ124,Enable triggering at rising-edge IRQ #124" "0,1"
|
|
bitfld.long 0xC 27. "IRQ123,Enable triggering at rising-edge IRQ #123" "0,1"
|
|
bitfld.long 0xC 26. "IRQ122,Enable triggering at rising-edge IRQ #122" "0,1"
|
|
bitfld.long 0xC 25. "IRQ121,Enable triggering at rising-edge IRQ #121" "0,1"
|
|
bitfld.long 0xC 24. "IRQ120,Enable triggering at rising-edge IRQ #120" "0,1"
|
|
bitfld.long 0xC 23. "IRQ119,Enable triggering at rising-edge IRQ #119" "0,1"
|
|
bitfld.long 0xC 22. "IRQ118,Enable triggering at rising-edge IRQ #118" "0,1"
|
|
bitfld.long 0xC 21. "IRQ117,Enable triggering at rising-edge IRQ #117" "0,1"
|
|
bitfld.long 0xC 20. "IRQ116,Enable triggering at rising-edge IRQ #116" "0,1"
|
|
bitfld.long 0xC 19. "IRQ115,Enable triggering at rising-edge IRQ #115" "0,1"
|
|
bitfld.long 0xC 18. "IRQ114,Enable triggering at rising-edge IRQ #114" "0,1"
|
|
bitfld.long 0xC 17. "IRQ113,Enable triggering at rising-edge IRQ #113" "0,1"
|
|
bitfld.long 0xC 16. "IRQ112,Enable triggering at rising-edge IRQ #112" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "IRQ111,Enable triggering at rising-edge IRQ #111" "0,1"
|
|
bitfld.long 0xC 14. "IRQ110,Enable triggering at rising-edge IRQ #110" "0,1"
|
|
bitfld.long 0xC 13. "IRQ109,Enable triggering at rising-edge IRQ #109" "0,1"
|
|
bitfld.long 0xC 12. "IRQ108,Enable triggering at rising-edge IRQ #108" "0,1"
|
|
bitfld.long 0xC 11. "IRQ107,Enable triggering at rising-edge IRQ #107" "0,1"
|
|
bitfld.long 0xC 10. "IRQ106,Enable triggering at rising-edge IRQ #106" "0,1"
|
|
bitfld.long 0xC 9. "IRQ105,Enable triggering at rising-edge IRQ #105" "0,1"
|
|
bitfld.long 0xC 8. "IRQ104,Enable triggering at rising-edge IRQ #104" "0,1"
|
|
bitfld.long 0xC 7. "IRQ103,Enable triggering at rising-edge IRQ #103" "0,1"
|
|
bitfld.long 0xC 6. "IRQ102,Enable triggering at rising-edge IRQ #102" "0,1"
|
|
bitfld.long 0xC 5. "IRQ101,Enable triggering at rising-edge IRQ #101" "0,1"
|
|
bitfld.long 0xC 4. "IRQ100,Enable triggering at rising-edge IRQ #100" "0,1"
|
|
bitfld.long 0xC 3. "IRQ99,Enable triggering at rising-edge IRQ #99" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "IRQ98,Enable triggering at rising-edge IRQ #98" "0,1"
|
|
bitfld.long 0xC 1. "IRQ97,Enable triggering at rising-edge IRQ #97" "0,1"
|
|
bitfld.long 0xC 0. "IRQ96,Enable triggering at rising-edge IRQ #96" "0,1"
|
|
line.long 0x10 "RTSR4,Rising-edge Triggering Control Register 4"
|
|
bitfld.long 0x10 31. "IRQ159,Enable triggering at rising-edge IRQ #159" "0,1"
|
|
bitfld.long 0x10 30. "IRQ158,Enable triggering at rising-edge IRQ #158" "0,1"
|
|
bitfld.long 0x10 29. "IRQ157,Enable triggering at rising-edge IRQ #157" "0,1"
|
|
bitfld.long 0x10 28. "IRQ156,Enable triggering at rising-edge IRQ #156" "0,1"
|
|
bitfld.long 0x10 27. "IRQ155,Enable triggering at rising-edge IRQ #155" "0,1"
|
|
bitfld.long 0x10 26. "IRQ154,Enable triggering at rising-edge IRQ #154" "0,1"
|
|
bitfld.long 0x10 25. "IRQ153,Enable triggering at rising-edge IRQ #153" "0,1"
|
|
bitfld.long 0x10 24. "IRQ152,Enable triggering at rising-edge IRQ #152" "0,1"
|
|
bitfld.long 0x10 23. "IRQ151,Enable triggering at rising-edge IRQ #151" "0,1"
|
|
bitfld.long 0x10 22. "IRQ150,Enable triggering at rising-edge IRQ #150" "0,1"
|
|
bitfld.long 0x10 21. "IRQ149,Enable triggering at rising-edge IRQ #149" "0,1"
|
|
bitfld.long 0x10 20. "IRQ148,Enable triggering at rising-edge IRQ #148" "0,1"
|
|
bitfld.long 0x10 19. "IRQ147,Enable triggering at rising-edge IRQ #147" "0,1"
|
|
newline
|
|
bitfld.long 0x10 18. "IRQ146,Enable triggering at rising-edge IRQ #146" "0,1"
|
|
bitfld.long 0x10 17. "IRQ145,Enable triggering at rising-edge IRQ #145" "0,1"
|
|
bitfld.long 0x10 16. "IRQ144,Enable triggering at rising-edge IRQ #144" "0,1"
|
|
bitfld.long 0x10 15. "IRQ143,Enable triggering at rising-edge IRQ #143" "0,1"
|
|
bitfld.long 0x10 14. "IRQ142,Enable triggering at rising-edge IRQ #142" "0,1"
|
|
bitfld.long 0x10 13. "IRQ141,Enable triggering at rising-edge IRQ #141" "0,1"
|
|
bitfld.long 0x10 12. "IRQ140,Enable triggering at rising-edge IRQ #140" "0,1"
|
|
bitfld.long 0x10 11. "IRQ139,Enable triggering at rising-edge IRQ #139" "0,1"
|
|
bitfld.long 0x10 8. "IRQ136,Enable triggering at rising-edge IRQ #136" "0,1"
|
|
bitfld.long 0x10 7. "IRQ135,Enable triggering at rising-edge IRQ #135" "0,1"
|
|
bitfld.long 0x10 6. "IRQ134,Enable triggering at rising-edge IRQ #134" "0,1"
|
|
bitfld.long 0x10 5. "IRQ133,Enable triggering at rising-edge IRQ #133" "0,1"
|
|
bitfld.long 0x10 4. "IRQ132,Enable triggering at rising-edge IRQ #132" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "IRQ131,Enable triggering at rising-edge IRQ #131" "0,1"
|
|
line.long 0x14 "RTSR5,Rising-edge Triggering Control Register 5"
|
|
bitfld.long 0x14 7. "IRQ167,Enable triggering at rising-edge IRQ #167" "0,1"
|
|
bitfld.long 0x14 6. "IRQ166,Enable triggering at rising-edge IRQ #166" "0,1"
|
|
bitfld.long 0x14 5. "IRQ165,Enable triggering at rising-edge IRQ #165" "0,1"
|
|
bitfld.long 0x14 4. "IRQ164,Enable triggering at rising-edge IRQ #164" "0,1"
|
|
bitfld.long 0x14 3. "IRQ163,Enable triggering at rising-edge IRQ #163" "0,1"
|
|
bitfld.long 0x14 2. "IRQ162,Enable triggering at rising-edge IRQ #162" "0,1"
|
|
bitfld.long 0x14 1. "IRQ161,Enable triggering at rising-edge IRQ #161" "0,1"
|
|
bitfld.long 0x14 0. "IRQ160,Enable triggering at rising-edge IRQ #160" "0,1"
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "FTSR0,Falling-edge Triggering Control Register 0"
|
|
bitfld.long 0x0 31. "IRQ31,Enable triggering at falling-edge IRQ #31" "0,1"
|
|
bitfld.long 0x0 30. "IRQ30,Enable triggering at falling-edge IRQ #30" "0,1"
|
|
bitfld.long 0x0 29. "IRQ29,Enable triggering at falling-edge IRQ #29" "0,1"
|
|
bitfld.long 0x0 28. "IRQ28,Enable triggering at falling-edge IRQ #28" "0,1"
|
|
bitfld.long 0x0 27. "IRQ27,Enable triggering at falling-edge IRQ #27" "0,1"
|
|
bitfld.long 0x0 26. "IRQ26,Enable triggering at falling-edge IRQ #26" "0,1"
|
|
bitfld.long 0x0 25. "IRQ25,Enable triggering at falling-edge IRQ #25" "0,1"
|
|
bitfld.long 0x0 24. "IRQ24,Enable triggering at falling-edge IRQ #24" "0,1"
|
|
bitfld.long 0x0 23. "IRQ23,Enable triggering at falling-edge IRQ #23" "0,1"
|
|
bitfld.long 0x0 22. "IRQ22,Enable triggering at falling-edge IRQ #22" "0,1"
|
|
bitfld.long 0x0 21. "IRQ21,Enable triggering at falling-edge IRQ #21" "0,1"
|
|
bitfld.long 0x0 20. "IRQ20,Enable triggering at falling-edge IRQ #20" "0,1"
|
|
bitfld.long 0x0 19. "IRQ19,Enable triggering at falling-edge IRQ #19" "0,1"
|
|
newline
|
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bitfld.long 0x0 18. "IRQ18,Enable triggering at falling-edge IRQ #18" "0,1"
|
|
bitfld.long 0x0 17. "IRQ17,Enable triggering at falling-edge IRQ #17" "0,1"
|
|
bitfld.long 0x0 16. "IRQ16,Enable triggering at falling-edge IRQ #16" "0,1"
|
|
bitfld.long 0x0 15. "IRQ15,Enable triggering at falling-edge IRQ #15" "0,1"
|
|
bitfld.long 0x0 14. "IRQ14,Enable triggering at falling-edge IRQ #14" "0,1"
|
|
bitfld.long 0x0 13. "IRQ13,Enable triggering at falling-edge IRQ #13" "0,1"
|
|
bitfld.long 0x0 12. "IRQ12,Enable triggering at falling-edge IRQ #12" "0,1"
|
|
bitfld.long 0x0 11. "IRQ11,Enable triggering at falling-edge IRQ #11" "0,1"
|
|
bitfld.long 0x0 10. "IRQ10,Enable triggering at falling-edge IRQ #10" "0,1"
|
|
bitfld.long 0x0 9. "IRQ9,Enable triggering at falling-edge IRQ #9" "0,1"
|
|
bitfld.long 0x0 8. "IRQ8,Enable triggering at falling-edge IRQ #8" "0,1"
|
|
bitfld.long 0x0 7. "IRQ7,Enable triggering at falling-edge IRQ #7" "0,1"
|
|
bitfld.long 0x0 6. "IRQ6,Enable triggering at falling-edge IRQ #6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IRQ5,Enable triggering at falling-edge IRQ #5" "0,1"
|
|
bitfld.long 0x0 4. "IRQ4,Enable triggering at falling-edge IRQ #4" "0,1"
|
|
bitfld.long 0x0 3. "IRQ3,Enable triggering at falling-edge IRQ #3" "0,1"
|
|
bitfld.long 0x0 2. "IRQ2,Enable triggering at falling-edge IRQ #2" "0,1"
|
|
bitfld.long 0x0 1. "IRQ1,Enable triggering at falling-edge IRQ #1" "0,1"
|
|
bitfld.long 0x0 0. "IRQ0,Enable triggering at falling-edge IRQ #0" "0,1"
|
|
line.long 0x4 "FTSR1,Falling-edge Triggering Control Register 1"
|
|
bitfld.long 0x4 31. "IRQ63,Enable triggering at falling-edge IRQ #63" "0,1"
|
|
bitfld.long 0x4 30. "IRQ62,Enable triggering at falling-edge IRQ #62" "0,1"
|
|
bitfld.long 0x4 29. "IRQ61,Enable triggering at falling-edge IRQ #61" "0,1"
|
|
bitfld.long 0x4 28. "IRQ60,Enable triggering at falling-edge IRQ #60" "0,1"
|
|
bitfld.long 0x4 27. "IRQ59,Enable triggering at falling-edge IRQ #59" "0,1"
|
|
bitfld.long 0x4 26. "IRQ58,Enable triggering at falling-edge IRQ #58" "0,1"
|
|
bitfld.long 0x4 25. "IRQ57,Enable triggering at falling-edge IRQ #57" "0,1"
|
|
bitfld.long 0x4 24. "IRQ56,Enable triggering at falling-edge IRQ #56" "0,1"
|
|
bitfld.long 0x4 23. "IRQ55,Enable triggering at falling-edge IRQ #55" "0,1"
|
|
bitfld.long 0x4 22. "IRQ54,Enable triggering at falling-edge IRQ #54" "0,1"
|
|
bitfld.long 0x4 21. "IRQ53,Enable triggering at falling-edge IRQ #53" "0,1"
|
|
bitfld.long 0x4 20. "IRQ52,Enable triggering at falling-edge IRQ #52" "0,1"
|
|
bitfld.long 0x4 19. "IRQ51,Enable triggering at falling-edge IRQ #51" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "IRQ50,Enable triggering at falling-edge IRQ #50" "0,1"
|
|
bitfld.long 0x4 17. "IRQ49,Enable triggering at falling-edge IRQ #49" "0,1"
|
|
bitfld.long 0x4 16. "IRQ48,Enable triggering at falling-edge IRQ #48" "0,1"
|
|
bitfld.long 0x4 15. "IRQ47,Enable triggering at falling-edge IRQ #47" "0,1"
|
|
bitfld.long 0x4 14. "IRQ46,Enable triggering at falling-edge IRQ #46" "0,1"
|
|
bitfld.long 0x4 13. "IRQ45,Enable triggering at falling-edge IRQ #45" "0,1"
|
|
bitfld.long 0x4 12. "IRQ44,Enable triggering at falling-edge IRQ #44" "0,1"
|
|
bitfld.long 0x4 11. "IRQ43,Enable triggering at falling-edge IRQ #43" "0,1"
|
|
bitfld.long 0x4 10. "IRQ42,Enable triggering at falling-edge IRQ #42" "0,1"
|
|
bitfld.long 0x4 9. "IRQ41,Enable triggering at falling-edge IRQ #41" "0,1"
|
|
bitfld.long 0x4 8. "IRQ40,Enable triggering at falling-edge IRQ #40" "0,1"
|
|
bitfld.long 0x4 7. "IRQ39,Enable triggering at falling-edge IRQ #39" "0,1"
|
|
bitfld.long 0x4 6. "IRQ38,Enable triggering at falling-edge IRQ #38" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "IRQ37,Enable triggering at falling-edge IRQ #37" "0,1"
|
|
bitfld.long 0x4 4. "IRQ36,Enable triggering at falling-edge IRQ #36" "0,1"
|
|
bitfld.long 0x4 3. "IRQ35,Enable triggering at falling-edge IRQ #35" "0,1"
|
|
bitfld.long 0x4 2. "IRQ34,Enable triggering at falling-edge IRQ #34" "0,1"
|
|
bitfld.long 0x4 1. "IRQ33,Enable triggering at falling-edge IRQ #33" "0,1"
|
|
bitfld.long 0x4 0. "IRQ32,Enable triggering at falling-edge IRQ #32" "0,1"
|
|
line.long 0x8 "FTSR2,Falling-edge Triggering Control Register 2"
|
|
bitfld.long 0x8 31. "IRQ95,Enable triggering at falling-edge IRQ #95" "0,1"
|
|
bitfld.long 0x8 30. "IRQ94,Enable triggering at falling-edge IRQ #94" "0,1"
|
|
bitfld.long 0x8 29. "IRQ93,Enable triggering at falling-edge IRQ #93" "0,1"
|
|
bitfld.long 0x8 28. "IRQ92,Enable triggering at falling-edge IRQ #92" "0,1"
|
|
bitfld.long 0x8 27. "IRQ91,Enable triggering at falling-edge IRQ #91" "0,1"
|
|
bitfld.long 0x8 26. "IRQ90,Enable triggering at falling-edge IRQ #90" "0,1"
|
|
bitfld.long 0x8 25. "IRQ89,Enable triggering at falling-edge IRQ #89" "0,1"
|
|
bitfld.long 0x8 24. "IRQ88,Enable triggering at falling-edge IRQ #88" "0,1"
|
|
bitfld.long 0x8 23. "IRQ87,Enable triggering at falling-edge IRQ #87" "0,1"
|
|
bitfld.long 0x8 22. "IRQ86,Enable triggering at falling-edge IRQ #86" "0,1"
|
|
bitfld.long 0x8 21. "IRQ85,Enable triggering at falling-edge IRQ #85" "0,1"
|
|
bitfld.long 0x8 20. "IRQ84,Enable triggering at falling-edge IRQ #84" "0,1"
|
|
bitfld.long 0x8 19. "IRQ83,Enable triggering at falling-edge IRQ #83" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "IRQ82,Enable triggering at falling-edge IRQ #82" "0,1"
|
|
bitfld.long 0x8 17. "IRQ81,Enable triggering at falling-edge IRQ #81" "0,1"
|
|
bitfld.long 0x8 16. "IRQ80,Enable triggering at falling-edge IRQ #80" "0,1"
|
|
bitfld.long 0x8 11. "IRQ75,Enable triggering at falling-edge IRQ #75" "0,1"
|
|
bitfld.long 0x8 10. "IRQ74,Enable triggering at falling-edge IRQ #74" "0,1"
|
|
bitfld.long 0x8 9. "IRQ73,Enable triggering at falling-edge IRQ #73" "0,1"
|
|
bitfld.long 0x8 8. "IRQ72,Enable triggering at falling-edge IRQ #72" "0,1"
|
|
bitfld.long 0x8 7. "IRQ71,Enable triggering at falling-edge IRQ #71" "0,1"
|
|
bitfld.long 0x8 6. "IRQ70,Enable triggering at falling-edge IRQ #70" "0,1"
|
|
bitfld.long 0x8 5. "IRQ69,Enable triggering at falling-edge IRQ #69" "0,1"
|
|
bitfld.long 0x8 4. "IRQ68,Enable triggering at falling-edge IRQ #68" "0,1"
|
|
bitfld.long 0x8 3. "IRQ67,Enable triggering at falling-edge IRQ #67" "0,1"
|
|
bitfld.long 0x8 2. "IRQ66,Enable triggering at falling-edge IRQ #66" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "IRQ65,Enable triggering at falling-edge IRQ #65" "0,1"
|
|
bitfld.long 0x8 0. "IRQ64,Enable triggering at falling-edge IRQ #64" "0,1"
|
|
line.long 0xC "FTSR3,Falling-edge Triggering Control Register 3"
|
|
bitfld.long 0xC 28. "IRQ124,Enable triggering at falling-edge IRQ #124" "0,1"
|
|
bitfld.long 0xC 27. "IRQ123,Enable triggering at falling-edge IRQ #123" "0,1"
|
|
bitfld.long 0xC 26. "IRQ122,Enable triggering at falling-edge IRQ #122" "0,1"
|
|
bitfld.long 0xC 25. "IRQ121,Enable triggering at falling-edge IRQ #121" "0,1"
|
|
bitfld.long 0xC 24. "IRQ120,Enable triggering at falling-edge IRQ #120" "0,1"
|
|
bitfld.long 0xC 23. "IRQ119,Enable triggering at falling-edge IRQ #119" "0,1"
|
|
bitfld.long 0xC 22. "IRQ118,Enable triggering at falling-edge IRQ #118" "0,1"
|
|
bitfld.long 0xC 21. "IRQ117,Enable triggering at falling-edge IRQ #117" "0,1"
|
|
bitfld.long 0xC 20. "IRQ116,Enable triggering at falling-edge IRQ #116" "0,1"
|
|
bitfld.long 0xC 19. "IRQ115,Enable triggering at falling-edge IRQ #115" "0,1"
|
|
bitfld.long 0xC 18. "IRQ114,Enable triggering at falling-edge IRQ #114" "0,1"
|
|
bitfld.long 0xC 17. "IRQ113,Enable triggering at falling-edge IRQ #113" "0,1"
|
|
bitfld.long 0xC 16. "IRQ112,Enable triggering at falling-edge IRQ #112" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "IRQ111,Enable triggering at falling-edge IRQ #111" "0,1"
|
|
bitfld.long 0xC 14. "IRQ110,Enable triggering at falling-edge IRQ #110" "0,1"
|
|
bitfld.long 0xC 13. "IRQ109,Enable triggering at falling-edge IRQ #109" "0,1"
|
|
bitfld.long 0xC 12. "IRQ108,Enable triggering at falling-edge IRQ #108" "0,1"
|
|
bitfld.long 0xC 11. "IRQ107,Enable triggering at falling-edge IRQ #107" "0,1"
|
|
bitfld.long 0xC 10. "IRQ106,Enable triggering at falling-edge IRQ #106" "0,1"
|
|
bitfld.long 0xC 9. "IRQ105,Enable triggering at falling-edge IRQ #105" "0,1"
|
|
bitfld.long 0xC 8. "IRQ104,Enable triggering at falling-edge IRQ #104" "0,1"
|
|
bitfld.long 0xC 7. "IRQ103,Enable triggering at falling-edge IRQ #103" "0,1"
|
|
bitfld.long 0xC 6. "IRQ102,Enable triggering at falling-edge IRQ #102" "0,1"
|
|
bitfld.long 0xC 5. "IRQ101,Enable triggering at falling-edge IRQ #101" "0,1"
|
|
bitfld.long 0xC 4. "IRQ100,Enable triggering at falling-edge IRQ #100" "0,1"
|
|
bitfld.long 0xC 3. "IRQ99,Enable triggering at falling-edge IRQ #99" "0,1"
|
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newline
|
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bitfld.long 0xC 2. "IRQ98,Enable triggering at falling-edge IRQ #98" "0,1"
|
|
bitfld.long 0xC 1. "IRQ97,Enable triggering at falling-edge IRQ #97" "0,1"
|
|
bitfld.long 0xC 0. "IRQ96,Enable triggering at falling-edge IRQ #96" "0,1"
|
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line.long 0x10 "FTSR4,Falling-edge Triggering Control Register 4"
|
|
bitfld.long 0x10 31. "IRQ159,Enable triggering at falling-edge IRQ #159" "0,1"
|
|
bitfld.long 0x10 30. "IRQ158,Enable triggering at falling-edge IRQ #158" "0,1"
|
|
bitfld.long 0x10 29. "IRQ157,Enable triggering at falling-edge IRQ #157" "0,1"
|
|
bitfld.long 0x10 28. "IRQ156,Enable triggering at falling-edge IRQ #156" "0,1"
|
|
bitfld.long 0x10 27. "IRQ155,Enable triggering at falling-edge IRQ #155" "0,1"
|
|
bitfld.long 0x10 26. "IRQ154,Enable triggering at falling-edge IRQ #154" "0,1"
|
|
bitfld.long 0x10 25. "IRQ153,Enable triggering at falling-edge IRQ #153" "0,1"
|
|
bitfld.long 0x10 24. "IRQ152,Enable triggering at falling-edge IRQ #152" "0,1"
|
|
bitfld.long 0x10 23. "IRQ151,Enable triggering at falling-edge IRQ #151" "0,1"
|
|
bitfld.long 0x10 22. "IRQ150,Enable triggering at falling-edge IRQ #150" "0,1"
|
|
bitfld.long 0x10 21. "IRQ149,Enable triggering at falling-edge IRQ #149" "0,1"
|
|
bitfld.long 0x10 20. "IRQ148,Enable triggering at falling-edge IRQ #148" "0,1"
|
|
bitfld.long 0x10 19. "IRQ147,Enable triggering at falling-edge IRQ #147" "0,1"
|
|
newline
|
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bitfld.long 0x10 18. "IRQ146,Enable triggering at falling-edge IRQ #146" "0,1"
|
|
bitfld.long 0x10 17. "IRQ145,Enable triggering at falling-edge IRQ #145" "0,1"
|
|
bitfld.long 0x10 16. "IRQ144,Enable triggering at falling-edge IRQ #144" "0,1"
|
|
bitfld.long 0x10 15. "IRQ143,Enable triggering at falling-edge IRQ #143" "0,1"
|
|
bitfld.long 0x10 14. "IRQ142,Enable triggering at falling-edge IRQ #142" "0,1"
|
|
bitfld.long 0x10 13. "IRQ141,Enable triggering at falling-edge IRQ #141" "0,1"
|
|
bitfld.long 0x10 12. "IRQ140,Enable triggering at falling-edge IRQ #140" "0,1"
|
|
bitfld.long 0x10 11. "IRQ139,Enable triggering at falling-edge IRQ #139" "0,1"
|
|
bitfld.long 0x10 8. "IRQ136,Enable triggering at falling-edge IRQ #136" "0,1"
|
|
bitfld.long 0x10 7. "IRQ135,Enable triggering at falling-edge IRQ #135" "0,1"
|
|
bitfld.long 0x10 6. "IRQ134,Enable triggering at falling-edge IRQ #134" "0,1"
|
|
bitfld.long 0x10 5. "IRQ133,Enable triggering at falling-edge IRQ #133" "0,1"
|
|
bitfld.long 0x10 4. "IRQ132,Enable triggering at falling-edge IRQ #132" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "IRQ131,Enable triggering at falling-edge IRQ #131" "0,1"
|
|
line.long 0x14 "FTSR5,Falling-edge Triggering Control Register 5"
|
|
bitfld.long 0x14 7. "IRQ167,Enable triggering at falling-edge IRQ #167" "0,1"
|
|
bitfld.long 0x14 6. "IRQ166,Enable triggering at falling-edge IRQ #166" "0,1"
|
|
bitfld.long 0x14 5. "IRQ165,Enable triggering at falling-edge IRQ #165" "0,1"
|
|
bitfld.long 0x14 4. "IRQ164,Enable triggering at falling-edge IRQ #164" "0,1"
|
|
bitfld.long 0x14 3. "IRQ163,Enable triggering at falling-edge IRQ #163" "0,1"
|
|
bitfld.long 0x14 2. "IRQ162,Enable triggering at falling-edge IRQ #162" "0,1"
|
|
bitfld.long 0x14 1. "IRQ161,Enable triggering at falling-edge IRQ #161" "0,1"
|
|
bitfld.long 0x14 0. "IRQ160,Enable triggering at falling-edge IRQ #160" "0,1"
|
|
group.long 0x60++0x17
|
|
line.long 0x0 "BICR0,Bypass IRQ Enable Register 0"
|
|
bitfld.long 0x0 31. "IRQ31,Enable bypass IRQ #31" "0,1"
|
|
bitfld.long 0x0 30. "IRQ30,Enable bypass IRQ #30" "0,1"
|
|
bitfld.long 0x0 29. "IRQ29,Enable bypass IRQ #29" "0,1"
|
|
bitfld.long 0x0 28. "IRQ28,Enable bypass IRQ #28" "0,1"
|
|
bitfld.long 0x0 27. "IRQ27,Enable bypass IRQ #27" "0,1"
|
|
bitfld.long 0x0 26. "IRQ26,Enable bypass IRQ #26" "0,1"
|
|
bitfld.long 0x0 25. "IRQ25,Enable bypass IRQ #25" "0,1"
|
|
bitfld.long 0x0 24. "IRQ24,Enable bypass IRQ #24" "0,1"
|
|
bitfld.long 0x0 23. "IRQ23,Enable bypass IRQ #23" "0,1"
|
|
bitfld.long 0x0 22. "IRQ22,Enable bypass IRQ #22" "0,1"
|
|
bitfld.long 0x0 21. "IRQ21,Enable bypass IRQ #21" "0,1"
|
|
bitfld.long 0x0 20. "IRQ20,Enable bypass IRQ #20" "0,1"
|
|
bitfld.long 0x0 19. "IRQ19,Enable bypass IRQ #19" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "IRQ18,Enable bypass IRQ #18" "0,1"
|
|
bitfld.long 0x0 17. "IRQ17,Enable bypass IRQ #17" "0,1"
|
|
bitfld.long 0x0 16. "IRQ16,Enable bypass IRQ #16" "0,1"
|
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bitfld.long 0x0 15. "IRQ15,Enable bypass IRQ #15" "0,1"
|
|
bitfld.long 0x0 14. "IRQ14,Enable bypass IRQ #14" "0,1"
|
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bitfld.long 0x0 13. "IRQ13,Enable bypass IRQ #13" "0,1"
|
|
bitfld.long 0x0 12. "IRQ12,Enable bypass IRQ #12" "0,1"
|
|
bitfld.long 0x0 11. "IRQ11,Enable bypass IRQ #11" "0,1"
|
|
bitfld.long 0x0 10. "IRQ10,Enable bypass IRQ #10" "0,1"
|
|
bitfld.long 0x0 9. "IRQ9,Enable bypass IRQ #9" "0,1"
|
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bitfld.long 0x0 8. "IRQ8,Enable bypass IRQ #8" "0,1"
|
|
bitfld.long 0x0 7. "IRQ7,Enable bypass IRQ #7" "0,1"
|
|
bitfld.long 0x0 6. "IRQ6,Enable bypass IRQ #6" "0,1"
|
|
newline
|
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bitfld.long 0x0 5. "IRQ5,Enable bypass IRQ #5" "0,1"
|
|
bitfld.long 0x0 4. "IRQ4,Enable bypass IRQ #4" "0,1"
|
|
bitfld.long 0x0 3. "IRQ3,Enable bypass IRQ #3" "0,1"
|
|
bitfld.long 0x0 2. "IRQ2,Enable bypass IRQ #2" "0,1"
|
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bitfld.long 0x0 1. "IRQ1,Enable bypass IRQ #1" "0,1"
|
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bitfld.long 0x0 0. "IRQ0,Enable bypass IRQ #0" "0,1"
|
|
line.long 0x4 "BICR1,Bypass IRQ Enable Register 1"
|
|
bitfld.long 0x4 31. "IRQ63,Enable bypass IRQ #63" "0,1"
|
|
bitfld.long 0x4 30. "IRQ62,Enable bypass IRQ #62" "0,1"
|
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bitfld.long 0x4 29. "IRQ61,Enable bypass IRQ #61" "0,1"
|
|
bitfld.long 0x4 28. "IRQ60,Enable bypass IRQ #60" "0,1"
|
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bitfld.long 0x4 27. "IRQ59,Enable bypass IRQ #59" "0,1"
|
|
bitfld.long 0x4 26. "IRQ58,Enable bypass IRQ #58" "0,1"
|
|
bitfld.long 0x4 25. "IRQ57,Enable bypass IRQ #57" "0,1"
|
|
bitfld.long 0x4 24. "IRQ56,Enable bypass IRQ #56" "0,1"
|
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bitfld.long 0x4 23. "IRQ55,Enable bypass IRQ #55" "0,1"
|
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bitfld.long 0x4 22. "IRQ54,Enable bypass IRQ #54" "0,1"
|
|
bitfld.long 0x4 21. "IRQ53,Enable bypass IRQ #53" "0,1"
|
|
bitfld.long 0x4 20. "IRQ52,Enable bypass IRQ #52" "0,1"
|
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bitfld.long 0x4 19. "IRQ51,Enable bypass IRQ #51" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "IRQ50,Enable bypass IRQ #50" "0,1"
|
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bitfld.long 0x4 17. "IRQ49,Enable bypass IRQ #49" "0,1"
|
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bitfld.long 0x4 16. "IRQ48,Enable bypass IRQ #48" "0,1"
|
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bitfld.long 0x4 15. "IRQ47,Enable bypass IRQ #47" "0,1"
|
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bitfld.long 0x4 14. "IRQ46,Enable bypass IRQ #46" "0,1"
|
|
bitfld.long 0x4 13. "IRQ45,Enable bypass IRQ #45" "0,1"
|
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bitfld.long 0x4 12. "IRQ44,Enable bypass IRQ #44" "0,1"
|
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bitfld.long 0x4 11. "IRQ43,Enable bypass IRQ #43" "0,1"
|
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bitfld.long 0x4 10. "IRQ42,Enable bypass IRQ #42" "0,1"
|
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bitfld.long 0x4 9. "IRQ41,Enable bypass IRQ #41" "0,1"
|
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bitfld.long 0x4 8. "IRQ40,Enable bypass IRQ #40" "0,1"
|
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bitfld.long 0x4 7. "IRQ39,Enable bypass IRQ #39" "0,1"
|
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bitfld.long 0x4 6. "IRQ38,Enable bypass IRQ #38" "0,1"
|
|
newline
|
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bitfld.long 0x4 5. "IRQ37,Enable bypass IRQ #37" "0,1"
|
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bitfld.long 0x4 4. "IRQ36,Enable bypass IRQ #36" "0,1"
|
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bitfld.long 0x4 3. "IRQ35,Enable bypass IRQ #35" "0,1"
|
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bitfld.long 0x4 2. "IRQ34,Enable bypass IRQ #34" "0,1"
|
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bitfld.long 0x4 1. "IRQ33,Enable bypass IRQ #33" "0,1"
|
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bitfld.long 0x4 0. "IRQ32,Enable bypass IRQ #32" "0,1"
|
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line.long 0x8 "BICR2,Bypass IRQ Enable Register 2"
|
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bitfld.long 0x8 31. "IRQ95,Enable bypass IRQ #95" "0,1"
|
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bitfld.long 0x8 30. "IRQ94,Enable bypass IRQ #94" "0,1"
|
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bitfld.long 0x8 29. "IRQ93,Enable bypass IRQ #93" "0,1"
|
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bitfld.long 0x8 28. "IRQ92,Enable bypass IRQ #92" "0,1"
|
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bitfld.long 0x8 27. "IRQ91,Enable bypass IRQ #91" "0,1"
|
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bitfld.long 0x8 26. "IRQ90,Enable bypass IRQ #90" "0,1"
|
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bitfld.long 0x8 25. "IRQ89,Enable bypass IRQ #89" "0,1"
|
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bitfld.long 0x8 24. "IRQ88,Enable bypass IRQ #88" "0,1"
|
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bitfld.long 0x8 23. "IRQ87,Enable bypass IRQ #87" "0,1"
|
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bitfld.long 0x8 22. "IRQ86,Enable bypass IRQ #86" "0,1"
|
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bitfld.long 0x8 21. "IRQ85,Enable bypass IRQ #85" "0,1"
|
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bitfld.long 0x8 20. "IRQ84,Enable bypass IRQ #84" "0,1"
|
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bitfld.long 0x8 19. "IRQ83,Enable bypass IRQ #83" "0,1"
|
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newline
|
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bitfld.long 0x8 18. "IRQ82,Enable bypass IRQ #82" "0,1"
|
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bitfld.long 0x8 17. "IRQ81,Enable bypass IRQ #81" "0,1"
|
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bitfld.long 0x8 16. "IRQ80,Enable bypass IRQ #80" "0,1"
|
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bitfld.long 0x8 11. "IRQ75,Enable bypass IRQ #75" "0,1"
|
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bitfld.long 0x8 10. "IRQ74,Enable bypass IRQ #74" "0,1"
|
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bitfld.long 0x8 9. "IRQ73,Enable bypass IRQ #73" "0,1"
|
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bitfld.long 0x8 8. "IRQ72,Enable bypass IRQ #72" "0,1"
|
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bitfld.long 0x8 7. "IRQ71,Enable bypass IRQ #71" "0,1"
|
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bitfld.long 0x8 6. "IRQ70,Enable bypass IRQ #70" "0,1"
|
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bitfld.long 0x8 5. "IRQ69,Enable bypass IRQ #69" "0,1"
|
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bitfld.long 0x8 4. "IRQ68,Enable bypass IRQ #68" "0,1"
|
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bitfld.long 0x8 3. "IRQ67,Enable bypass IRQ #67" "0,1"
|
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bitfld.long 0x8 2. "IRQ66,Enable bypass IRQ #66" "0,1"
|
|
newline
|
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bitfld.long 0x8 1. "IRQ65,Enable bypass IRQ #65" "0,1"
|
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bitfld.long 0x8 0. "IRQ64,Enable bypass IRQ #64" "0,1"
|
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line.long 0xC "BICR3,Bypass IRQ Enable Register 3"
|
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bitfld.long 0xC 28. "IRQ124,Enable bypass IRQ #124" "0,1"
|
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bitfld.long 0xC 27. "IRQ123,Enable bypass IRQ #123" "0,1"
|
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bitfld.long 0xC 26. "IRQ122,Enable bypass IRQ #122" "0,1"
|
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bitfld.long 0xC 25. "IRQ121,Enable bypass IRQ #121" "0,1"
|
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bitfld.long 0xC 24. "IRQ120,Enable bypass IRQ #120" "0,1"
|
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bitfld.long 0xC 23. "IRQ119,Enable bypass IRQ #119" "0,1"
|
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bitfld.long 0xC 22. "IRQ118,Enable bypass IRQ #118" "0,1"
|
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bitfld.long 0xC 21. "IRQ117,Enable bypass IRQ #117" "0,1"
|
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bitfld.long 0xC 20. "IRQ116,Enable bypass IRQ #116" "0,1"
|
|
bitfld.long 0xC 19. "IRQ115,Enable bypass IRQ #115" "0,1"
|
|
bitfld.long 0xC 18. "IRQ114,Enable bypass IRQ #114" "0,1"
|
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bitfld.long 0xC 17. "IRQ113,Enable bypass IRQ #113" "0,1"
|
|
bitfld.long 0xC 16. "IRQ112,Enable bypass IRQ #112" "0,1"
|
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newline
|
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bitfld.long 0xC 15. "IRQ111,Enable bypass IRQ #111" "0,1"
|
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bitfld.long 0xC 14. "IRQ110,Enable bypass IRQ #110" "0,1"
|
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bitfld.long 0xC 13. "IRQ109,Enable bypass IRQ #109" "0,1"
|
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bitfld.long 0xC 12. "IRQ108,Enable bypass IRQ #108" "0,1"
|
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bitfld.long 0xC 11. "IRQ107,Enable bypass IRQ #107" "0,1"
|
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bitfld.long 0xC 10. "IRQ106,Enable bypass IRQ #106" "0,1"
|
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bitfld.long 0xC 9. "IRQ105,Enable bypass IRQ #105" "0,1"
|
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bitfld.long 0xC 8. "IRQ104,Enable bypass IRQ #104" "0,1"
|
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bitfld.long 0xC 7. "IRQ103,Enable bypass IRQ #103" "0,1"
|
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bitfld.long 0xC 6. "IRQ102,Enable bypass IRQ #102" "0,1"
|
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bitfld.long 0xC 5. "IRQ101,Enable bypass IRQ #101" "0,1"
|
|
bitfld.long 0xC 4. "IRQ100,Enable bypass IRQ #100" "0,1"
|
|
bitfld.long 0xC 3. "IRQ99,Enable bypass IRQ #99" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "IRQ98,Enable bypass IRQ #98" "0,1"
|
|
bitfld.long 0xC 1. "IRQ97,Enable bypass IRQ #97" "0,1"
|
|
bitfld.long 0xC 0. "IRQ96,Enable bypass IRQ #96" "0,1"
|
|
line.long 0x10 "BICR4,Bypass IRQ Enable Register 4"
|
|
bitfld.long 0x10 31. "IRQ159,Enable bypass IRQ #159" "0,1"
|
|
bitfld.long 0x10 30. "IRQ158,Enable bypass IRQ #158" "0,1"
|
|
bitfld.long 0x10 29. "IRQ157,Enable bypass IRQ #157" "0,1"
|
|
bitfld.long 0x10 28. "IRQ156,Enable bypass IRQ #156" "0,1"
|
|
bitfld.long 0x10 27. "IRQ155,Enable bypass IRQ #155" "0,1"
|
|
bitfld.long 0x10 26. "IRQ154,Enable bypass IRQ #154" "0,1"
|
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bitfld.long 0x10 25. "IRQ153,Enable bypass IRQ #153" "0,1"
|
|
bitfld.long 0x10 24. "IRQ152,Enable bypass IRQ #152" "0,1"
|
|
bitfld.long 0x10 23. "IRQ151,Enable bypass IRQ #151" "0,1"
|
|
bitfld.long 0x10 22. "IRQ150,Enable bypass IRQ #150" "0,1"
|
|
bitfld.long 0x10 21. "IRQ149,Enable bypass IRQ #149" "0,1"
|
|
bitfld.long 0x10 20. "IRQ148,Enable bypass IRQ #148" "0,1"
|
|
bitfld.long 0x10 19. "IRQ147,Enable bypass IRQ #147" "0,1"
|
|
newline
|
|
bitfld.long 0x10 18. "IRQ146,Enable bypass IRQ #146" "0,1"
|
|
bitfld.long 0x10 17. "IRQ145,Enable bypass IRQ #145" "0,1"
|
|
bitfld.long 0x10 16. "IRQ144,Enable bypass IRQ #144" "0,1"
|
|
bitfld.long 0x10 15. "IRQ143,Enable bypass IRQ #143" "0,1"
|
|
bitfld.long 0x10 14. "IRQ142,Enable bypass IRQ #142" "0,1"
|
|
bitfld.long 0x10 13. "IRQ141,Enable bypass IRQ #141" "0,1"
|
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bitfld.long 0x10 12. "IRQ140,Enable bypass IRQ #140" "0,1"
|
|
bitfld.long 0x10 11. "IRQ139,Enable bypass IRQ #139" "0,1"
|
|
bitfld.long 0x10 8. "IRQ136,Enable bypass IRQ #136" "0,1"
|
|
bitfld.long 0x10 7. "IRQ135,Enable bypass IRQ #135" "0,1"
|
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bitfld.long 0x10 6. "IRQ134,Enable bypass IRQ #134" "0,1"
|
|
bitfld.long 0x10 5. "IRQ133,Enable bypass IRQ #133" "0,1"
|
|
bitfld.long 0x10 4. "IRQ132,Enable bypass IRQ #132" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "IRQ131,Enable bypass IRQ #131" "0,1"
|
|
line.long 0x14 "BICR5,Bypass IRQ Enable Register 5"
|
|
bitfld.long 0x14 7. "IRQ167,Enable bypass IRQ #167" "0,1"
|
|
bitfld.long 0x14 6. "IRQ166,Enable bypass IRQ #166" "0,1"
|
|
bitfld.long 0x14 5. "IRQ165,Enable bypass IRQ #165" "0,1"
|
|
bitfld.long 0x14 4. "IRQ164,Enable bypass IRQ #164" "0,1"
|
|
bitfld.long 0x14 3. "IRQ163,Enable bypass IRQ #163" "0,1"
|
|
bitfld.long 0x14 2. "IRQ162,Enable bypass IRQ #162" "0,1"
|
|
bitfld.long 0x14 1. "IRQ161,Enable bypass IRQ #161" "0,1"
|
|
bitfld.long 0x14 0. "IRQ160,Enable bypass IRQ #160" "0,1"
|
|
group.long 0x80++0x17
|
|
line.long 0x0 "NMCR0,NMI Control Register 0"
|
|
bitfld.long 0x0 31. "IRQ31,Set IRQ #31 as NMI" "0,1"
|
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bitfld.long 0x0 30. "IRQ30,Set IRQ #30 as NMI" "0,1"
|
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bitfld.long 0x0 29. "IRQ29,Set IRQ #29 as NMI" "0,1"
|
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bitfld.long 0x0 28. "IRQ28,Set IRQ #28 as NMI" "0,1"
|
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bitfld.long 0x0 27. "IRQ27,Set IRQ #27 as NMI" "0,1"
|
|
bitfld.long 0x0 26. "IRQ26,Set IRQ #26 as NMI" "0,1"
|
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bitfld.long 0x0 25. "IRQ25,Set IRQ #25 as NMI" "0,1"
|
|
bitfld.long 0x0 24. "IRQ24,Set IRQ #24 as NMI" "0,1"
|
|
bitfld.long 0x0 23. "IRQ23,Set IRQ #23 as NMI" "0,1"
|
|
bitfld.long 0x0 22. "IRQ22,Set IRQ #22 as NMI" "0,1"
|
|
bitfld.long 0x0 21. "IRQ21,Set IRQ #21 as NMI" "0,1"
|
|
bitfld.long 0x0 20. "IRQ20,Set IRQ #20 as NMI" "0,1"
|
|
bitfld.long 0x0 19. "IRQ19,Set IRQ #19 as NMI" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "IRQ18,Set IRQ #18 as NMI" "0,1"
|
|
bitfld.long 0x0 17. "IRQ17,Set IRQ #17 as NMI" "0,1"
|
|
bitfld.long 0x0 16. "IRQ16,Set IRQ #16 as NMI" "0,1"
|
|
bitfld.long 0x0 15. "IRQ15,Set IRQ #15 as NMI" "0,1"
|
|
bitfld.long 0x0 14. "IRQ14,Set IRQ #14 as NMI" "0,1"
|
|
bitfld.long 0x0 13. "IRQ13,Set IRQ #13 as NMI" "0,1"
|
|
bitfld.long 0x0 12. "IRQ12,Set IRQ #12 as NMI" "0,1"
|
|
bitfld.long 0x0 11. "IRQ11,Set IRQ #11 as NMI" "0,1"
|
|
bitfld.long 0x0 10. "IRQ10,Set IRQ #10 as NMI" "0,1"
|
|
bitfld.long 0x0 9. "IRQ9,Set IRQ #9 as NMI" "0,1"
|
|
bitfld.long 0x0 8. "IRQ8,Set IRQ #8 as NMI" "0,1"
|
|
bitfld.long 0x0 7. "IRQ7,Set IRQ #7 as NMI" "0,1"
|
|
bitfld.long 0x0 6. "IRQ6,Set IRQ #6 as NMI" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IRQ5,Set IRQ #5 as NMI" "0,1"
|
|
bitfld.long 0x0 4. "IRQ4,Set IRQ #4 as NMI" "0,1"
|
|
bitfld.long 0x0 3. "IRQ3,Set IRQ #3 as NMI" "0,1"
|
|
bitfld.long 0x0 2. "IRQ2,Set IRQ #2 as NMI" "0,1"
|
|
bitfld.long 0x0 1. "IRQ1,Set IRQ #1 as NMI" "0,1"
|
|
bitfld.long 0x0 0. "IRQ0,Set IRQ #0 as NMI" "0,1"
|
|
line.long 0x4 "NMCR1,NMI Control Register 1"
|
|
bitfld.long 0x4 31. "IRQ63,Set IRQ #63 as NMI" "0,1"
|
|
bitfld.long 0x4 30. "IRQ62,Set IRQ #62 as NMI" "0,1"
|
|
bitfld.long 0x4 29. "IRQ61,Set IRQ #61 as NMI" "0,1"
|
|
bitfld.long 0x4 28. "IRQ60,Set IRQ #60 as NMI" "0,1"
|
|
bitfld.long 0x4 27. "IRQ59,Set IRQ #59 as NMI" "0,1"
|
|
bitfld.long 0x4 26. "IRQ58,Set IRQ #58 as NMI" "0,1"
|
|
bitfld.long 0x4 25. "IRQ57,Set IRQ #57 as NMI" "0,1"
|
|
bitfld.long 0x4 24. "IRQ56,Set IRQ #56 as NMI" "0,1"
|
|
bitfld.long 0x4 23. "IRQ55,Set IRQ #55 as NMI" "0,1"
|
|
bitfld.long 0x4 22. "IRQ54,Set IRQ #54 as NMI" "0,1"
|
|
bitfld.long 0x4 21. "IRQ53,Set IRQ #53 as NMI" "0,1"
|
|
bitfld.long 0x4 20. "IRQ52,Set IRQ #52 as NMI" "0,1"
|
|
bitfld.long 0x4 19. "IRQ51,Set IRQ #51 as NMI" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "IRQ50,Set IRQ #50 as NMI" "0,1"
|
|
bitfld.long 0x4 17. "IRQ49,Set IRQ #49 as NMI" "0,1"
|
|
bitfld.long 0x4 16. "IRQ48,Set IRQ #48 as NMI" "0,1"
|
|
bitfld.long 0x4 15. "IRQ47,Set IRQ #47 as NMI" "0,1"
|
|
bitfld.long 0x4 14. "IRQ46,Set IRQ #46 as NMI" "0,1"
|
|
bitfld.long 0x4 13. "IRQ45,Set IRQ #45 as NMI" "0,1"
|
|
bitfld.long 0x4 12. "IRQ44,Set IRQ #44 as NMI" "0,1"
|
|
bitfld.long 0x4 11. "IRQ43,Set IRQ #43 as NMI" "0,1"
|
|
bitfld.long 0x4 10. "IRQ42,Set IRQ #42 as NMI" "0,1"
|
|
bitfld.long 0x4 9. "IRQ41,Set IRQ #41 as NMI" "0,1"
|
|
bitfld.long 0x4 8. "IRQ40,Set IRQ #40 as NMI" "0,1"
|
|
bitfld.long 0x4 7. "IRQ39,Set IRQ #39 as NMI" "0,1"
|
|
bitfld.long 0x4 6. "IRQ38,Set IRQ #38 as NMI" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "IRQ37,Set IRQ #37 as NMI" "0,1"
|
|
bitfld.long 0x4 4. "IRQ36,Set IRQ #36 as NMI" "0,1"
|
|
bitfld.long 0x4 3. "IRQ35,Set IRQ #35 as NMI" "0,1"
|
|
bitfld.long 0x4 2. "IRQ34,Set IRQ #34 as NMI" "0,1"
|
|
bitfld.long 0x4 1. "IRQ33,Set IRQ #33 as NMI" "0,1"
|
|
bitfld.long 0x4 0. "IRQ32,Set IRQ #32 as NMI" "0,1"
|
|
line.long 0x8 "NMCR2,NMI Control Register 2"
|
|
bitfld.long 0x8 31. "IRQ95,Set IRQ #95 as NMI" "0,1"
|
|
bitfld.long 0x8 30. "IRQ94,Set IRQ #94 as NMI" "0,1"
|
|
bitfld.long 0x8 29. "IRQ93,Set IRQ #93 as NMI" "0,1"
|
|
bitfld.long 0x8 28. "IRQ92,Set IRQ #92 as NMI" "0,1"
|
|
bitfld.long 0x8 27. "IRQ91,Set IRQ #91 as NMI" "0,1"
|
|
bitfld.long 0x8 26. "IRQ90,Set IRQ #90 as NMI" "0,1"
|
|
bitfld.long 0x8 25. "IRQ89,Set IRQ #89 as NMI" "0,1"
|
|
bitfld.long 0x8 24. "IRQ88,Set IRQ #88 as NMI" "0,1"
|
|
bitfld.long 0x8 23. "IRQ87,Set IRQ #87 as NMI" "0,1"
|
|
bitfld.long 0x8 22. "IRQ86,Set IRQ #86 as NMI" "0,1"
|
|
bitfld.long 0x8 21. "IRQ85,Set IRQ #85 as NMI" "0,1"
|
|
bitfld.long 0x8 20. "IRQ84,Set IRQ #84 as NMI" "0,1"
|
|
bitfld.long 0x8 19. "IRQ83,Set IRQ #83 as NMI" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "IRQ82,Set IRQ #82 as NMI" "0,1"
|
|
bitfld.long 0x8 17. "IRQ81,Set IRQ #81 as NMI" "0,1"
|
|
bitfld.long 0x8 16. "IRQ80,Set IRQ #80 as NMI" "0,1"
|
|
bitfld.long 0x8 11. "IRQ75,Set IRQ #75 as NMI" "0,1"
|
|
bitfld.long 0x8 10. "IRQ74,Set IRQ #74 as NMI" "0,1"
|
|
bitfld.long 0x8 9. "IRQ73,Set IRQ #73 as NMI" "0,1"
|
|
bitfld.long 0x8 8. "IRQ72,Set IRQ #72 as NMI" "0,1"
|
|
bitfld.long 0x8 7. "IRQ71,Set IRQ #71 as NMI" "0,1"
|
|
bitfld.long 0x8 6. "IRQ70,Set IRQ #70 as NMI" "0,1"
|
|
bitfld.long 0x8 5. "IRQ69,Set IRQ #69 as NMI" "0,1"
|
|
bitfld.long 0x8 4. "IRQ68,Set IRQ #68 as NMI" "0,1"
|
|
bitfld.long 0x8 3. "IRQ67,Set IRQ #67 as NMI" "0,1"
|
|
bitfld.long 0x8 2. "IRQ66,Set IRQ #66 as NMI" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "IRQ65,Set IRQ #65 as NMI" "0,1"
|
|
bitfld.long 0x8 0. "IRQ64,Set IRQ #64 as NMI" "0,1"
|
|
line.long 0xC "NMCR3,NMI Control Register 3"
|
|
bitfld.long 0xC 28. "IRQ124,Set IRQ #124 as NMI" "0,1"
|
|
bitfld.long 0xC 27. "IRQ123,Set IRQ #123 as NMI" "0,1"
|
|
bitfld.long 0xC 26. "IRQ122,Set IRQ #122 as NMI" "0,1"
|
|
bitfld.long 0xC 25. "IRQ121,Set IRQ #121 as NMI" "0,1"
|
|
bitfld.long 0xC 24. "IRQ120,Set IRQ #120 as NMI" "0,1"
|
|
bitfld.long 0xC 23. "IRQ119,Set IRQ #119 as NMI" "0,1"
|
|
bitfld.long 0xC 22. "IRQ118,Set IRQ #118 as NMI" "0,1"
|
|
bitfld.long 0xC 21. "IRQ117,Set IRQ #117 as NMI" "0,1"
|
|
bitfld.long 0xC 20. "IRQ116,Set IRQ #116 as NMI" "0,1"
|
|
bitfld.long 0xC 19. "IRQ115,Set IRQ #115 as NMI" "0,1"
|
|
bitfld.long 0xC 18. "IRQ114,Set IRQ #114 as NMI" "0,1"
|
|
bitfld.long 0xC 17. "IRQ113,Set IRQ #113 as NMI" "0,1"
|
|
bitfld.long 0xC 16. "IRQ112,Set IRQ #112 as NMI" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "IRQ111,Set IRQ #111 as NMI" "0,1"
|
|
bitfld.long 0xC 14. "IRQ110,Set IRQ #110 as NMI" "0,1"
|
|
bitfld.long 0xC 13. "IRQ109,Set IRQ #109 as NMI" "0,1"
|
|
bitfld.long 0xC 12. "IRQ108,Set IRQ #108 as NMI" "0,1"
|
|
bitfld.long 0xC 11. "IRQ107,Set IRQ #107 as NMI" "0,1"
|
|
bitfld.long 0xC 10. "IRQ106,Set IRQ #106 as NMI" "0,1"
|
|
bitfld.long 0xC 9. "IRQ105,Set IRQ #105 as NMI" "0,1"
|
|
bitfld.long 0xC 8. "IRQ104,Set IRQ #104 as NMI" "0,1"
|
|
bitfld.long 0xC 7. "IRQ103,Set IRQ #103 as NMI" "0,1"
|
|
bitfld.long 0xC 6. "IRQ102,Set IRQ #102 as NMI" "0,1"
|
|
bitfld.long 0xC 5. "IRQ101,Set IRQ #101 as NMI" "0,1"
|
|
bitfld.long 0xC 4. "IRQ100,Set IRQ #100 as NMI" "0,1"
|
|
bitfld.long 0xC 3. "IRQ99,Set IRQ #99 as NMI" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "IRQ98,Set IRQ #98 as NMI" "0,1"
|
|
bitfld.long 0xC 1. "IRQ97,Set IRQ #97 as NMI" "0,1"
|
|
bitfld.long 0xC 0. "IRQ96,Set IRQ #96 as NMI" "0,1"
|
|
line.long 0x10 "NMCR4,NMI Control Register 4"
|
|
bitfld.long 0x10 31. "IRQ159,Set IRQ #159 as NMI" "0,1"
|
|
bitfld.long 0x10 30. "IRQ158,Set IRQ #158 as NMI" "0,1"
|
|
bitfld.long 0x10 29. "IRQ157,Set IRQ #157 as NMI" "0,1"
|
|
bitfld.long 0x10 28. "IRQ156,Set IRQ #156 as NMI" "0,1"
|
|
bitfld.long 0x10 27. "IRQ155,Set IRQ #155 as NMI" "0,1"
|
|
bitfld.long 0x10 26. "IRQ154,Set IRQ #154 as NMI" "0,1"
|
|
bitfld.long 0x10 25. "IRQ153,Set IRQ #153 as NMI" "0,1"
|
|
bitfld.long 0x10 24. "IRQ152,Set IRQ #152 as NMI" "0,1"
|
|
bitfld.long 0x10 23. "IRQ151,Set IRQ #151 as NMI" "0,1"
|
|
bitfld.long 0x10 22. "IRQ150,Set IRQ #150 as NMI" "0,1"
|
|
bitfld.long 0x10 21. "IRQ149,Set IRQ #149 as NMI" "0,1"
|
|
bitfld.long 0x10 20. "IRQ148,Set IRQ #148 as NMI" "0,1"
|
|
bitfld.long 0x10 19. "IRQ147,Set IRQ #147 as NMI" "0,1"
|
|
newline
|
|
bitfld.long 0x10 18. "IRQ146,Set IRQ #146 as NMI" "0,1"
|
|
bitfld.long 0x10 17. "IRQ145,Set IRQ #145 as NMI" "0,1"
|
|
bitfld.long 0x10 16. "IRQ144,Set IRQ #144 as NMI" "0,1"
|
|
bitfld.long 0x10 15. "IRQ143,Set IRQ #143 as NMI" "0,1"
|
|
bitfld.long 0x10 14. "IRQ142,Set IRQ #142 as NMI" "0,1"
|
|
bitfld.long 0x10 13. "IRQ141,Set IRQ #141 as NMI" "0,1"
|
|
bitfld.long 0x10 12. "IRQ140,Set IRQ #140 as NMI" "0,1"
|
|
bitfld.long 0x10 11. "IRQ139,Set IRQ #139 as NMI" "0,1"
|
|
bitfld.long 0x10 8. "IRQ136,Set IRQ #136 as NMI" "0,1"
|
|
bitfld.long 0x10 7. "IRQ135,Set IRQ #135 as NMI" "0,1"
|
|
bitfld.long 0x10 6. "IRQ134,Set IRQ #134 as NMI" "0,1"
|
|
bitfld.long 0x10 5. "IRQ133,Set IRQ #133 as NMI" "0,1"
|
|
bitfld.long 0x10 4. "IRQ132,Set IRQ #132 as NMI" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "IRQ131,Set IRQ #131 as NMI" "0,1"
|
|
line.long 0x14 "NMCR5,NMI Control Register 5"
|
|
bitfld.long 0x14 7. "IRQ167,Set IRQ #167 as NMI" "0,1"
|
|
bitfld.long 0x14 6. "IRQ166,Set IRQ #166 as NMI" "0,1"
|
|
bitfld.long 0x14 5. "IRQ165,Set IRQ #165 as NMI" "0,1"
|
|
bitfld.long 0x14 4. "IRQ164,Set IRQ #164 as NMI" "0,1"
|
|
bitfld.long 0x14 3. "IRQ163,Set IRQ #163 as NMI" "0,1"
|
|
bitfld.long 0x14 2. "IRQ162,Set IRQ #162 as NMI" "0,1"
|
|
bitfld.long 0x14 1. "IRQ161,Set IRQ #161 as NMI" "0,1"
|
|
bitfld.long 0x14 0. "IRQ160,Set IRQ #160 as NMI" "0,1"
|
|
tree.end
|
|
tree "IOC (IO Controller)"
|
|
base ad:0x0
|
|
tree "IOCA"
|
|
base ad:0x40040400
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "FSR0,Function Select Register 0"
|
|
hexmask.long.byte 0x0 28.--31. 1. "AF07,Port 07"
|
|
hexmask.long.byte 0x0 24.--27. 1. "AF06,Port 06"
|
|
hexmask.long.byte 0x0 20.--23. 1. "AF05,Port 05"
|
|
hexmask.long.byte 0x0 16.--19. 1. "AF04,Port 04"
|
|
hexmask.long.byte 0x0 12.--15. 1. "AF03,Port 03"
|
|
hexmask.long.byte 0x0 8.--11. 1. "AF02,Port 02"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "AF01,Port 01"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AF00,Port 00"
|
|
line.long 0x4 "FSR1,Function Select Register 1"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AF15,Port 15"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AF14,Port 14"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AF13,Port 13"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AF12,Port 12"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AF11,Port 11"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AF10,Port 10"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "AF09,Port 09"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AF08,Port 08"
|
|
line.long 0x8 "FSR2,Function Select Register 2"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AF23,Port 23"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AF22,Port 22"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AF21,Port 21"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AF20,Port 20"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AF19,Port 19"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AF18,Port 18"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "AF17,Port 17"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AF16,Port 16"
|
|
line.long 0xC "FSR3,Function Select Register 3"
|
|
hexmask.long.byte 0xC 16.--19. 1. "AF28,Port 28"
|
|
hexmask.long.byte 0xC 12.--15. 1. "AF27,Port 27"
|
|
hexmask.long.byte 0xC 8.--11. 1. "AF26,Port 26"
|
|
hexmask.long.byte 0xC 4.--7. 1. "AF25,Port 25"
|
|
hexmask.long.byte 0xC 0.--3. 1. "AF24,Port 24"
|
|
line.long 0x10 "SMR,Setting Mode Register"
|
|
bitfld.long 0x10 28. "P28,Port 28" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 27. "P27,Port 27" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 26. "P26,Port 26" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 25. "P25,Port 25" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 24. "P24,Port 24" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 23. "P23,Port 23" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 22. "P22,Port 22" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 21. "P21,Port 21" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 20. "P20,Port 20" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 19. "P19,Port 19" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 18. "P18,Port 18" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 17. "P17,Port 17" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 16. "P16,Port 16" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 15. "P15,Port 15" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 14. "P14,Port 14" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 13. "P13,Port 13" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 12. "P12,Port 12" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 11. "P11,Port 11" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 10. "P10,Port 10" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 9. "P09,Port 09" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 8. "P08,Port 08" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 7. "P07,Port 07" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 6. "P06,Port 06" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 5. "P05,Port 05" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 4. "P04,Port 04" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 3. "P03,Port 03" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 2. "P02,Port 02" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 1. "P01,Port 01" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 0. "P00,Port 00" "0: Software Mode,1: Hardware Mode"
|
|
tree.end
|
|
tree "IOCAMC"
|
|
base ad:0x400404D0
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "IOAMCRMP,Advanced MUX Control Register for MFTP"
|
|
bitfld.long 0x0 30.--31. "MP7BI,MFTP7 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x0 28.--29. "MP7AI,MFTP7 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x0 26.--27. "MP6BI,MFTP6 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x0 24.--25. "MP6AI,MFTP6 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x0 22.--23. "MP5BI,MFTP5 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x0 20.--21. "MP5AI,MFTP5 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "MP4BI,MFTP4 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x0 16.--17. "MP4AI,MFTP4 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x0 14.--15. "MP3BI,MFTP3 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "MP3AI,MFTP3 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x0 10.--11. "MP2BI,MFTP2 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x0 8.--9. "MP2AI,MFTP2 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "MP1BI,MFTP1 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x0 4.--5. "MP1AI,MFTP1 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x0 2.--3. "MP0BI,MFTP0 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MP0AI,MFTP0 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
line.long 0x4 "IOAMCRMR,Advanced MUX Control Register for MFTR"
|
|
bitfld.long 0x4 18.--19. "MR4BI,MFTR4 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x4 16.--17. "MR4AI,MFTR4 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x4 14.--15. "MR3BI,MFTR3 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "MR3AI,MFTR3 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x4 10.--11. "MR2BI,MFTR2 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x4 8.--9. "MR2AI,MFTR2 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "MR1BI,MFTR1 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x4 4.--5. "MR1AI,MFTR1 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
bitfld.long 0x4 2.--3. "MR0BI,MFTR0 B Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "MR0AI,MFTR0 A Input Source" "?,1: Input Source is Comparator 0 Output,2: Input Source is Comparator 1 Output,3: No Function 3"
|
|
tree.end
|
|
tree "IOCB"
|
|
base ad:0x40040420
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "FSR0,Function Select Register 0"
|
|
hexmask.long.byte 0x0 28.--31. 1. "AF07,Port 07"
|
|
hexmask.long.byte 0x0 24.--27. 1. "AF06,Port 06"
|
|
hexmask.long.byte 0x0 20.--23. 1. "AF05,Port 05"
|
|
hexmask.long.byte 0x0 16.--19. 1. "AF04,Port 04"
|
|
hexmask.long.byte 0x0 12.--15. 1. "AF03,Port 03"
|
|
hexmask.long.byte 0x0 8.--11. 1. "AF02,Port 02"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "AF01,Port 01"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AF00,Port 00"
|
|
line.long 0x4 "FSR1,Function Select Register 1"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AF15,Port 15"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AF14,Port 14"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AF13,Port 13"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AF12,Port 12"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AF11,Port 11"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AF10,Port 10"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "AF09,Port 09"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AF08,Port 08"
|
|
line.long 0x8 "FSR2,Function Select Register 2"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AF23,Port 23"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AF22,Port 22"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AF21,Port 21"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AF20,Port 20"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AF19,Port 19"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AF18,Port 18"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "AF17,Port 17"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AF16,Port 16"
|
|
line.long 0xC "FSR3,Function Select Register 3"
|
|
hexmask.long.byte 0xC 16.--19. 1. "AF28,Port 28"
|
|
hexmask.long.byte 0xC 12.--15. 1. "AF27,Port 27"
|
|
hexmask.long.byte 0xC 8.--11. 1. "AF26,Port 26"
|
|
hexmask.long.byte 0xC 4.--7. 1. "AF25,Port 25"
|
|
hexmask.long.byte 0xC 0.--3. 1. "AF24,Port 24"
|
|
line.long 0x10 "SMR,Setting Mode Register"
|
|
bitfld.long 0x10 28. "P28,Port 28" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 27. "P27,Port 27" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 26. "P26,Port 26" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 25. "P25,Port 25" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 24. "P24,Port 24" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 23. "P23,Port 23" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 22. "P22,Port 22" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 21. "P21,Port 21" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 20. "P20,Port 20" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 19. "P19,Port 19" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 18. "P18,Port 18" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 17. "P17,Port 17" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 16. "P16,Port 16" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 15. "P15,Port 15" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 14. "P14,Port 14" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 13. "P13,Port 13" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 12. "P12,Port 12" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 11. "P11,Port 11" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 10. "P10,Port 10" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 9. "P09,Port 09" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 8. "P08,Port 08" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 7. "P07,Port 07" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 6. "P06,Port 06" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 5. "P05,Port 05" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 4. "P04,Port 04" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 3. "P03,Port 03" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 2. "P02,Port 02" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 1. "P01,Port 01" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 0. "P00,Port 00" "0: Software Mode,1: Hardware Mode"
|
|
tree.end
|
|
tree "IOCC"
|
|
base ad:0x40040440
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "FSR0,Function Select Register 0"
|
|
hexmask.long.byte 0x0 28.--31. 1. "AF07,Port 07"
|
|
hexmask.long.byte 0x0 24.--27. 1. "AF06,Port 06"
|
|
hexmask.long.byte 0x0 20.--23. 1. "AF05,Port 05"
|
|
hexmask.long.byte 0x0 16.--19. 1. "AF04,Port 04"
|
|
hexmask.long.byte 0x0 12.--15. 1. "AF03,Port 03"
|
|
hexmask.long.byte 0x0 8.--11. 1. "AF02,Port 02"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "AF01,Port 01"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AF00,Port 00"
|
|
line.long 0x4 "FSR1,Function Select Register 1"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AF15,Port 15"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AF14,Port 14"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AF13,Port 13"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AF12,Port 12"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AF11,Port 11"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AF10,Port 10"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "AF09,Port 09"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AF08,Port 08"
|
|
line.long 0x8 "FSR2,Function Select Register 2"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AF23,Port 23"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AF22,Port 22"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AF21,Port 21"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AF20,Port 20"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AF19,Port 19"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AF18,Port 18"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "AF17,Port 17"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AF16,Port 16"
|
|
line.long 0xC "FSR3,Function Select Register 3"
|
|
hexmask.long.byte 0xC 16.--19. 1. "AF28,Port 28"
|
|
hexmask.long.byte 0xC 12.--15. 1. "AF27,Port 27"
|
|
hexmask.long.byte 0xC 8.--11. 1. "AF26,Port 26"
|
|
hexmask.long.byte 0xC 4.--7. 1. "AF25,Port 25"
|
|
hexmask.long.byte 0xC 0.--3. 1. "AF24,Port 24"
|
|
line.long 0x10 "SMR,Setting Mode Register"
|
|
bitfld.long 0x10 28. "P28,Port 28" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 27. "P27,Port 27" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 26. "P26,Port 26" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 25. "P25,Port 25" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 24. "P24,Port 24" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 23. "P23,Port 23" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 22. "P22,Port 22" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 21. "P21,Port 21" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 20. "P20,Port 20" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 19. "P19,Port 19" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 18. "P18,Port 18" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 17. "P17,Port 17" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 16. "P16,Port 16" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 15. "P15,Port 15" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 14. "P14,Port 14" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 13. "P13,Port 13" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 12. "P12,Port 12" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 11. "P11,Port 11" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 10. "P10,Port 10" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 9. "P09,Port 09" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 8. "P08,Port 08" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 7. "P07,Port 07" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 6. "P06,Port 06" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 5. "P05,Port 05" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 4. "P04,Port 04" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 3. "P03,Port 03" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 2. "P02,Port 02" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 1. "P01,Port 01" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 0. "P00,Port 00" "0: Software Mode,1: Hardware Mode"
|
|
tree.end
|
|
tree "IOCD"
|
|
base ad:0x40040460
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "FSR0,Function Select Register 0"
|
|
hexmask.long.byte 0x0 28.--31. 1. "AF07,Port 07"
|
|
hexmask.long.byte 0x0 24.--27. 1. "AF06,Port 06"
|
|
hexmask.long.byte 0x0 20.--23. 1. "AF05,Port 05"
|
|
hexmask.long.byte 0x0 16.--19. 1. "AF04,Port 04"
|
|
hexmask.long.byte 0x0 12.--15. 1. "AF03,Port 03"
|
|
hexmask.long.byte 0x0 8.--11. 1. "AF02,Port 02"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "AF01,Port 01"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AF00,Port 00"
|
|
line.long 0x4 "FSR1,Function Select Register 1"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AF15,Port 15"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AF14,Port 14"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AF13,Port 13"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AF12,Port 12"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AF11,Port 11"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AF10,Port 10"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "AF09,Port 09"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AF08,Port 08"
|
|
line.long 0x8 "FSR2,Function Select Register 2"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AF23,Port 23"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AF22,Port 22"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AF21,Port 21"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AF20,Port 20"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AF19,Port 19"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AF18,Port 18"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "AF17,Port 17"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AF16,Port 16"
|
|
line.long 0xC "FSR3,Function Select Register 3"
|
|
hexmask.long.byte 0xC 16.--19. 1. "AF28,Port 28"
|
|
hexmask.long.byte 0xC 12.--15. 1. "AF27,Port 27"
|
|
hexmask.long.byte 0xC 8.--11. 1. "AF26,Port 26"
|
|
hexmask.long.byte 0xC 4.--7. 1. "AF25,Port 25"
|
|
hexmask.long.byte 0xC 0.--3. 1. "AF24,Port 24"
|
|
line.long 0x10 "SMR,Setting Mode Register"
|
|
bitfld.long 0x10 28. "P28,Port 28" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 27. "P27,Port 27" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 26. "P26,Port 26" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 25. "P25,Port 25" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 24. "P24,Port 24" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 23. "P23,Port 23" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 22. "P22,Port 22" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 21. "P21,Port 21" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 20. "P20,Port 20" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 19. "P19,Port 19" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 18. "P18,Port 18" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 17. "P17,Port 17" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 16. "P16,Port 16" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 15. "P15,Port 15" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 14. "P14,Port 14" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 13. "P13,Port 13" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 12. "P12,Port 12" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 11. "P11,Port 11" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 10. "P10,Port 10" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 9. "P09,Port 09" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 8. "P08,Port 08" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 7. "P07,Port 07" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 6. "P06,Port 06" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 5. "P05,Port 05" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 4. "P04,Port 04" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 3. "P03,Port 03" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 2. "P02,Port 02" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 1. "P01,Port 01" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 0. "P00,Port 00" "0: Software Mode,1: Hardware Mode"
|
|
tree.end
|
|
tree "IOCPTC"
|
|
base ad:0x400404A0
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "IOPER,Protection Enable Register"
|
|
bitfld.long 0x0 14.--15. "PTCEND,Protect Function Enable by External Input D" "0: Trigger Disable,1: Trigger Enable by Low Level,2: Trigger Enable by High Level,3: No Function 3"
|
|
bitfld.long 0x0 12.--13. "PTCENC,Protect Function Enable by External Input C" "0: Trigger Disable,1: Trigger Enable by Low Level,2: Trigger Enable by High Level,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "PTCENB,Protect Function Enable by External Input B" "0: Trigger Disable,1: Trigger Enable by Low Level,2: Trigger Enable by High Level,3: No Function 3"
|
|
bitfld.long 0x0 8.--9. "PTCENA,Protect Function Enable by External Input A" "0: Trigger Disable,1: Trigger Enable by Low Level,2: Trigger Enable by High Level,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "PTCENCOMP1,Protect Function Enable by Comparator 1" "0: Trigger Disable,1: Trigger Enable by Low Level,2: Trigger Enable by High Level,3: No Function 3"
|
|
bitfld.long 0x0 4.--5. "PTCENCOMP0,Protect Function Enable by Comparator 0" "0: Trigger Disable,1: Trigger Enable by Low Level,2: Trigger Enable by High Level,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "PTCENAD1,Protect Function Enable by ADC1" "0: Trigger Disable,1: Trigger Enable by GE,2: Trigger Enable by LE,3: Trigger Enable by Window"
|
|
bitfld.long 0x0 0.--1. "PTCENAD0,Protect Function Enable by ADC0" "0: Trigger Disable,1: Trigger Enable by GE,2: Trigger Enable by LE,3: Trigger Enable by Window"
|
|
line.long 0x4 "IOPSCR,Protection Status and Clear Register"
|
|
bitfld.long 0x4 15. "PTCCLR,Protect Function Status Clear" "?,1: Clear by Set to 1 (Write Only)"
|
|
rbitfld.long 0x4 7. "PTCSTSD,Protect Function Status by External Input D" "0: Not Detected,1: Detected"
|
|
newline
|
|
rbitfld.long 0x4 6. "PTCSTSC,Protect Function Status by External Input C" "0: Not Detected,1: Detected"
|
|
rbitfld.long 0x4 5. "PTCSTSB,Protect Function Status by External Input B" "0: Not Detected,1: Detected"
|
|
newline
|
|
rbitfld.long 0x4 4. "PTCSTSA,Protect Function Status by External Input A" "0: Not Detected,1: Detected"
|
|
rbitfld.long 0x4 3. "PTCSTSCOMP1,Protect Function Status by Comparator 1" "0: Not Detected,1: Detected"
|
|
newline
|
|
rbitfld.long 0x4 2. "PTCSTSCOMP0,Protect Function Status by Comparator 0" "0: Not Detected,1: Detected"
|
|
rbitfld.long 0x4 1. "PTCSTSAD1,Protect Function Status by ADC1" "0: Not Detected,1: Detected"
|
|
newline
|
|
rbitfld.long 0x4 0. "PTCSTSAD0,Protect Function Status by ADC0" "0: Not Detected,1: Detected"
|
|
line.long 0x8 "IOPSRMP03,Protection Setting Register MFTP0~3"
|
|
bitfld.long 0x8 30.--31. "PSPMP3B,Port Settings in Protect state MFTP3B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
bitfld.long 0x8 28.--29. "PSPMP3A,Port Settings in Protect state MFTP3A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
newline
|
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hexmask.long.byte 0x8 24.--27. 1. "PESSMP3,Protection Event Source Select MFTP3"
|
|
bitfld.long 0x8 22.--23. "PSPMP2B,Port Settings in Protect state MFTP2B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
newline
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bitfld.long 0x8 20.--21. "PSPMP2A,Port Settings in Protect state MFTP2A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PESSMP2,Protection Event Source Select MFTP2"
|
|
newline
|
|
bitfld.long 0x8 14.--15. "PSPMP1B,Port Settings in Protect state MFTP1B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
bitfld.long 0x8 12.--13. "PSPMP1A,Port Settings in Protect state MFTP1A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
newline
|
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hexmask.long.byte 0x8 8.--11. 1. "PESSMP1,Protection Event Source Select MFTP1"
|
|
bitfld.long 0x8 6.--7. "PSPMP0B,Port Settings in Protect state MFTP0B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
newline
|
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bitfld.long 0x8 4.--5. "PSPMP0A,Port Settings in Protect state MFTP0A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
hexmask.long.byte 0x8 0.--3. 1. "PESSMP0,Protection Event Source Select MFTP0"
|
|
line.long 0xC "IOPSRMP47,Protection Setting Register MFTP4~7"
|
|
bitfld.long 0xC 30.--31. "PSPMP7B,Port Settings in Protect state MFTP7B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
bitfld.long 0xC 28.--29. "PSPMP7A,Port Settings in Protect state MFTP7A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
newline
|
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hexmask.long.byte 0xC 24.--27. 1. "PESSMP7,Protection Event Source Select MFTP7"
|
|
bitfld.long 0xC 22.--23. "PSPMP6B,Port Settings in Protect state MFTP6B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
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|
newline
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bitfld.long 0xC 20.--21. "PSPMP6A,Port Settings in Protect state MFTP6A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PESSMP6,Protection Event Source Select MFTP6"
|
|
newline
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bitfld.long 0xC 14.--15. "PSPMP5B,Port Settings in Protect state MFTP5B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
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|
bitfld.long 0xC 12.--13. "PSPMP5A,Port Settings in Protect state MFTP5A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
newline
|
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hexmask.long.byte 0xC 8.--11. 1. "PESSMP5,Protection Event Source Select MFTP5"
|
|
bitfld.long 0xC 6.--7. "PSPMP4B,Port Settings in Protect state MFTP4B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
newline
|
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bitfld.long 0xC 4.--5. "PSPMP4A,Port Settings in Protect state MFTP4A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
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hexmask.long.byte 0xC 0.--3. 1. "PESSMP4,Protection Event Source Select MFTP4"
|
|
line.long 0x10 "IOPSRMR03,Protection Setting Register MFTR0~3"
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|
bitfld.long 0x10 30.--31. "PSPMR3B,Port Settings in Protect state MFTR3B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
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bitfld.long 0x10 28.--29. "PSPMR3A,Port Settings in Protect state MFTR3A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
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|
newline
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hexmask.long.byte 0x10 24.--27. 1. "PESSMR3,Protection Event Source Select MFTR3"
|
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bitfld.long 0x10 22.--23. "PSPMR2B,Port Settings in Protect state MFTR2B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
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|
newline
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bitfld.long 0x10 20.--21. "PSPMR2A,Port Settings in Protect state MFTR2A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PESSMR2,Protection Event Source Select MFTR2"
|
|
newline
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bitfld.long 0x10 14.--15. "PSPMR1B,Port Settings in Protect state MFTR1B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
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|
bitfld.long 0x10 12.--13. "PSPMR1A,Port Settings in Protect state MFTR1A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
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|
newline
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hexmask.long.byte 0x10 8.--11. 1. "PESSMR1,Protection Event Source Select MFTR1"
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|
bitfld.long 0x10 6.--7. "PSPMR0B,Port Settings in Protect state MFTR0B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
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|
newline
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bitfld.long 0x10 4.--5. "PSPMR0A,Port Settings in Protect state MFTR0A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
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|
hexmask.long.byte 0x10 0.--3. 1. "PESSMR0,Protection Event Source Select MFTR0"
|
|
line.long 0x14 "IOPSRMR4,Protection Setting Register MFTR4~5"
|
|
bitfld.long 0x14 6.--7. "PSPMR4B,Port Settings in Protect state MFTR4B" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
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|
bitfld.long 0x14 4.--5. "PSPMR4A,Port Settings in Protect state MFTR4A" "0: Protection Disable,1: Protection Enable and Force Input,2: Protection Enable and Force Output Low,3: Protection Enable and Force Output High"
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|
newline
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hexmask.long.byte 0x14 0.--3. 1. "PESSMR4,Protection Event Source Select MFTR4"
|
|
tree.end
|
|
tree "IOCX"
|
|
base ad:0x40040480
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "FSR0,Function Select Register 0"
|
|
hexmask.long.byte 0x0 28.--31. 1. "AF07,Port 07"
|
|
hexmask.long.byte 0x0 24.--27. 1. "AF06,Port 06"
|
|
hexmask.long.byte 0x0 20.--23. 1. "AF05,Port 05"
|
|
hexmask.long.byte 0x0 16.--19. 1. "AF04,Port 04"
|
|
hexmask.long.byte 0x0 12.--15. 1. "AF03,Port 03"
|
|
hexmask.long.byte 0x0 8.--11. 1. "AF02,Port 02"
|
|
newline
|
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hexmask.long.byte 0x0 4.--7. 1. "AF01,Port 01"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AF00,Port 00"
|
|
line.long 0x4 "FSR1,Function Select Register 1"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AF15,Port 15"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AF14,Port 14"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AF13,Port 13"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AF12,Port 12"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AF11,Port 11"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AF10,Port 10"
|
|
newline
|
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hexmask.long.byte 0x4 4.--7. 1. "AF09,Port 09"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AF08,Port 08"
|
|
line.long 0x8 "FSR2,Function Select Register 2"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AF23,Port 23"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AF22,Port 22"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AF21,Port 21"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AF20,Port 20"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AF19,Port 19"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AF18,Port 18"
|
|
newline
|
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hexmask.long.byte 0x8 4.--7. 1. "AF17,Port 17"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AF16,Port 16"
|
|
line.long 0xC "FSR3,Function Select Register 3"
|
|
hexmask.long.byte 0xC 16.--19. 1. "AF28,Port 28"
|
|
hexmask.long.byte 0xC 12.--15. 1. "AF27,Port 27"
|
|
hexmask.long.byte 0xC 8.--11. 1. "AF26,Port 26"
|
|
hexmask.long.byte 0xC 4.--7. 1. "AF25,Port 25"
|
|
hexmask.long.byte 0xC 0.--3. 1. "AF24,Port 24"
|
|
line.long 0x10 "SMR,Setting Mode Register"
|
|
bitfld.long 0x10 28. "P28,Port 28" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 27. "P27,Port 27" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 26. "P26,Port 26" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 25. "P25,Port 25" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 24. "P24,Port 24" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 23. "P23,Port 23" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 22. "P22,Port 22" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 21. "P21,Port 21" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 20. "P20,Port 20" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 19. "P19,Port 19" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 18. "P18,Port 18" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 17. "P17,Port 17" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 16. "P16,Port 16" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 15. "P15,Port 15" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 14. "P14,Port 14" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 13. "P13,Port 13" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 12. "P12,Port 12" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 11. "P11,Port 11" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 10. "P10,Port 10" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 9. "P09,Port 09" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 8. "P08,Port 08" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 7. "P07,Port 07" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 6. "P06,Port 06" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 5. "P05,Port 05" "0: Software Mode,1: Hardware Mode"
|
|
newline
|
|
bitfld.long 0x10 4. "P04,Port 04" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 3. "P03,Port 03" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 2. "P02,Port 02" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 1. "P01,Port 01" "0: Software Mode,1: Hardware Mode"
|
|
bitfld.long 0x10 0. "P00,Port 00" "0: Software Mode,1: Hardware Mode"
|
|
tree.end
|
|
tree.end
|
|
tree "IWDT (Independent Watchdog Timer)"
|
|
base ad:0x40000200
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "RR,Refresh Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "REFRESH,Counter Refresh"
|
|
line.long 0x4 "CR,Control Register"
|
|
bitfld.long 0x4 28. "CCO,Continuous Counter Operation" "0: Counter Stop at Interrupt and Reset requset,1: Continuous Counter Operation"
|
|
hexmask.long.word 0x4 16.--26. 1. "CKS,Clock Divide Ratio Select"
|
|
bitfld.long 0x4 12.--13. "RPSS,Window Start Position Select" "0: Window start position 25P,1: Window start position 50P,2: Window start position 75P,3: Window start position 100P"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "RPES,Window End Position Select" "0: Window end position 75P,1: Window end position 50P,2: Window end position 25P,3: Window end position 0P"
|
|
bitfld.long 0x4 0.--2. "TOPS,Timeout Period Select" "0: 128 cycles,1: 512 cycles,2: 1024 cycles,3: 2048 cycles,4: 4096 cycles,5: 8192 cycles,6: 16384 cycles,?"
|
|
line.long 0x8 "SR,Status Register"
|
|
rbitfld.long 0x8 16. "RUNF,Running Flag" "0,1"
|
|
bitfld.long 0x8 15. "REFEF,Refresh Error Flag" "0: Refresh Error Flag Clear,?"
|
|
bitfld.long 0x8 14. "UNDFF,Underflow Flag" "0: Underflow Flag Clear,?"
|
|
newline
|
|
hexmask.long.word 0x8 0.--13. 1. "CNTVAL,Counter Current Value"
|
|
line.long 0xC "RCR,Reset Control Register"
|
|
bitfld.long 0xC 7. "RSTIRQS,Reset Interrupt Request Select" "0: Interrupt Select,1: Reset Requset Select"
|
|
line.long 0x10 "CSTPR,Count Stop Control Register"
|
|
bitfld.long 0x10 7. "SLPSTP,CM4 Sleep Mode Count Stop Enable" "0: CM4 Sleep Mode Count Stop Disable,1: CM4 Sleep Mode Count Stop Enable"
|
|
bitfld.long 0x10 6. "DBGSTP,CM4 Debug Mode Count Stop Enable" "0: CM4 Debug Mode Count Stop Disable,1: CM4 Debug Mode Count Stop Enable"
|
|
tree.end
|
|
tree "MFTP (Multi-Function Timer P Unit)"
|
|
base ad:0x0
|
|
tree "MFTP0"
|
|
base ad:0x40030020
|
|
group.long 0x0++0x27
|
|
line.long 0x0 "CSR,Counter Setting Register"
|
|
bitfld.long 0x0 13. "GRBAUTO,General Register B Auto Setting Enable" "0: Auto Setting Disable,1: Auto Setting Enable"
|
|
bitfld.long 0x0 12. "CMMSK,Compare Match Mask at General Register Zero" "0: Mask Disable,1: Mask Enable"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
|
|
bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Triangular Count (from Down-count)"
|
|
newline
|
|
bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
|
|
bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
|
|
line.long 0x4 "IOCR,I and O Control Register"
|
|
bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
|
|
bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
newline
|
|
bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
|
|
bitfld.long 0x4 10. "OCTSB,Output Controller Type Select B" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
|
|
newline
|
|
bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
|
|
bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
|
|
newline
|
|
bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
|
|
bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
newline
|
|
bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
|
|
bitfld.long 0x4 2. "OCTSA,Output Controller Type Select A" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
|
|
newline
|
|
bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
|
|
bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
|
|
line.long 0x8 "PACR,Port F and F A Control Register"
|
|
bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0xC "PBCR,Port F and F B Control Register"
|
|
bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
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line.long 0x10 "DTCR,Dead Time Control Register"
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bitfld.long 0x10 8.--9. "DTOLB,Dead Time Output Level B" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 6.--7. "DTOLA,Dead Time Output Level A" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 4.--5. "DTASB,Dead Time Adoption Select B" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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bitfld.long 0x10 2.--3. "DTASA,Dead Time Adoption Select A" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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bitfld.long 0x10 0.--1. "DTSS,Dead Time Controller Start Trigger Select" "0: Rising edge - PFF A and Falling edge - PFF A,1: Rising edge - PFF B and Falling edge - PFF B,2: Rising edge - PFF A and Falling edge - PFF B,3: Rising edge - PFF B and Falling edge - PFF A"
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line.long 0x14 "BOSR,Buffer Operation Setting Register"
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bitfld.long 0x14 16.--17. "BFOIOMS,Buffer Write Operation Select IOMS" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 15. "BFSKIOMS,Buffer Write Operation with Skipping Enable IOMS" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 14. "BFSKO,Buffer Write Operation with Skipping Enable O" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 13. "BFSKD,Buffer Write Operation with Skipping Enable D" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 12. "BFSKP,Buffer Write Operation with Skipping Enable P" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 11. "BFSKB,Buffer Write Operation with Skipping Enable B" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 10. "BFSKA,Buffer Write Operation with Skipping Enable A" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 8.--9. "BFOO,Buffer Write Operation Select O" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 6.--7. "BFOD,Buffer Write Operation Select D" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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line.long 0x18 "IER,Interrupt Enable Register"
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bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
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bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
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bitfld.long 0x18 8.--9. "IRQENO,Interrupt Request Enable O" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 6.--7. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 4.--5. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 2.--3. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 0.--1. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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line.long 0x1C "TER,Trigger Enable Register"
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bitfld.long 0x1C 8.--9. "TRGENO,Trigger Enable O" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 6.--7. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 4.--5. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 2.--3. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 0.--1. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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line.long 0x20 "ISLRA,Interrupt Skipping Limit Register A"
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hexmask.long.byte 0x20 8.--11. 1. "SKLMTO,Interrupt Request Skipping Limit O"
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hexmask.long.byte 0x20 4.--7. 1. "SKLMTU,Interrupt Request Skipping Limit U"
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hexmask.long.byte 0x20 0.--3. 1. "SKLMTV,Interrupt Request Skipping Limit V"
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line.long 0x24 "ISLRB,Interrupt Skipping Limit Register B"
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hexmask.long.byte 0x24 4.--7. 1. "SKLMTB,Interrupt Request Skipping Limit B"
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hexmask.long.byte 0x24 0.--3. 1. "SKLMTA,Interrupt Request Skipping Limit A"
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rgroup.long 0x28++0xB
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line.long 0x0 "ISCRA,Interrupt Skipping Count Register A"
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hexmask.long.byte 0x0 8.--11. 1. "SKCNTO,Interrupt Request Skipping Count O"
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hexmask.long.byte 0x0 4.--7. 1. "SKCNTU,Interrupt Request Skipping Count U"
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hexmask.long.byte 0x0 0.--3. 1. "SKCNTV,Interrupt Request Skipping Count V"
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line.long 0x4 "ISCRB,Interrupt Skipping Count Register B"
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hexmask.long.byte 0x4 4.--7. 1. "SKCNTB,Interrupt Request Skipping Count B"
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hexmask.long.byte 0x4 0.--3. 1. "SKCNTA,Interrupt Request Skipping Count A"
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line.long 0x8 "COSR,Counter Operation Status Register"
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bitfld.long 0x8 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
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group.long 0x34++0x33
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line.long 0x0 "CNT,Counter"
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hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
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line.long 0x4 "GRA,General Register A"
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hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
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line.long 0x8 "GRB,General Register B"
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hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
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line.long 0xC "PDR,Period Register"
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hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
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line.long 0x10 "DTR,Dead Time Register"
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hexmask.long.word 0x10 0.--15. 1. "DTR,Dead Time Register"
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line.long 0x14 "TRO,Trigger Register O"
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hexmask.long.word 0x14 0.--15. 1. "TRO,Trigger Register O"
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line.long 0x18 "BRA,Buffer Register A"
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hexmask.long.word 0x18 0.--15. 1. "BRA,Buffer Register A"
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line.long 0x1C "BRB,Buffer Register B"
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hexmask.long.word 0x1C 0.--15. 1. "BRB,Buffer Register B"
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line.long 0x20 "PDBR,Period Buffer Register"
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hexmask.long.word 0x20 0.--15. 1. "PDBR,Period Buffer Register"
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line.long 0x24 "DTBR,Dead Time Buffer Register"
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hexmask.long.word 0x24 0.--15. 1. "DTBR,Dead Time Buffer Register"
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line.long 0x28 "TBRO,Trigger Buffer Register O"
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hexmask.long.word 0x28 0.--15. 1. "TBRO,Trigger Buffer Register O"
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line.long 0x2C "IOMSR,I and O Manual Setting Register"
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bitfld.long 0x2C 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x2C 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x2C 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
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bitfld.long 0x2C 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
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line.long 0x30 "IOMSBR,I and O Manual Setting Buffer Register"
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bitfld.long 0x30 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x30 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x30 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
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bitfld.long 0x30 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
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tree.end
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tree "MFTP1"
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base ad:0x40030090
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group.long 0x0++0x27
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line.long 0x0 "CSR,Counter Setting Register"
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bitfld.long 0x0 13. "GRBAUTO,General Register B Auto Setting Enable" "0: Auto Setting Disable,1: Auto Setting Enable"
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bitfld.long 0x0 12. "CMMSK,Compare Match Mask at General Register Zero" "0: Mask Disable,1: Mask Enable"
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bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
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bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Triangular Count (from Down-count)"
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bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
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bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
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newline
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hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
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line.long 0x4 "IOCR,I and O Control Register"
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bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
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bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 10. "OCTSB,Output Controller Type Select B" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
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bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
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bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
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bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 2. "OCTSA,Output Controller Type Select A" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
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bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
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line.long 0x8 "PACR,Port F and F A Control Register"
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bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
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bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
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line.long 0xC "PBCR,Port F and F B Control Register"
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bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
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bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
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line.long 0x10 "DTCR,Dead Time Control Register"
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bitfld.long 0x10 8.--9. "DTOLB,Dead Time Output Level B" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 6.--7. "DTOLA,Dead Time Output Level A" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 4.--5. "DTASB,Dead Time Adoption Select B" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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bitfld.long 0x10 2.--3. "DTASA,Dead Time Adoption Select A" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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newline
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bitfld.long 0x10 0.--1. "DTSS,Dead Time Controller Start Trigger Select" "0: Rising edge - PFF A and Falling edge - PFF A,1: Rising edge - PFF B and Falling edge - PFF B,2: Rising edge - PFF A and Falling edge - PFF B,3: Rising edge - PFF B and Falling edge - PFF A"
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line.long 0x14 "BOSR,Buffer Operation Setting Register"
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bitfld.long 0x14 16.--17. "BFOIOMS,Buffer Write Operation Select IOMS" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 15. "BFSKIOMS,Buffer Write Operation with Skipping Enable IOMS" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 14. "BFSKO,Buffer Write Operation with Skipping Enable O" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 13. "BFSKD,Buffer Write Operation with Skipping Enable D" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 12. "BFSKP,Buffer Write Operation with Skipping Enable P" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 11. "BFSKB,Buffer Write Operation with Skipping Enable B" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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newline
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bitfld.long 0x14 10. "BFSKA,Buffer Write Operation with Skipping Enable A" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 8.--9. "BFOO,Buffer Write Operation Select O" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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newline
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bitfld.long 0x14 6.--7. "BFOD,Buffer Write Operation Select D" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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newline
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bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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line.long 0x18 "IER,Interrupt Enable Register"
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bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
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bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
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newline
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bitfld.long 0x18 8.--9. "IRQENO,Interrupt Request Enable O" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 6.--7. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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newline
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bitfld.long 0x18 4.--5. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 2.--3. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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newline
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bitfld.long 0x18 0.--1. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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line.long 0x1C "TER,Trigger Enable Register"
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bitfld.long 0x1C 8.--9. "TRGENO,Trigger Enable O" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 6.--7. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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newline
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bitfld.long 0x1C 4.--5. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 2.--3. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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newline
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bitfld.long 0x1C 0.--1. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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line.long 0x20 "ISLRA,Interrupt Skipping Limit Register A"
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hexmask.long.byte 0x20 8.--11. 1. "SKLMTO,Interrupt Request Skipping Limit O"
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hexmask.long.byte 0x20 4.--7. 1. "SKLMTU,Interrupt Request Skipping Limit U"
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hexmask.long.byte 0x20 0.--3. 1. "SKLMTV,Interrupt Request Skipping Limit V"
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line.long 0x24 "ISLRB,Interrupt Skipping Limit Register B"
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hexmask.long.byte 0x24 4.--7. 1. "SKLMTB,Interrupt Request Skipping Limit B"
|
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hexmask.long.byte 0x24 0.--3. 1. "SKLMTA,Interrupt Request Skipping Limit A"
|
|
rgroup.long 0x28++0xB
|
|
line.long 0x0 "ISCRA,Interrupt Skipping Count Register A"
|
|
hexmask.long.byte 0x0 8.--11. 1. "SKCNTO,Interrupt Request Skipping Count O"
|
|
hexmask.long.byte 0x0 4.--7. 1. "SKCNTU,Interrupt Request Skipping Count U"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "SKCNTV,Interrupt Request Skipping Count V"
|
|
line.long 0x4 "ISCRB,Interrupt Skipping Count Register B"
|
|
hexmask.long.byte 0x4 4.--7. 1. "SKCNTB,Interrupt Request Skipping Count B"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SKCNTA,Interrupt Request Skipping Count A"
|
|
line.long 0x8 "COSR,Counter Operation Status Register"
|
|
bitfld.long 0x8 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
|
|
group.long 0x34++0x33
|
|
line.long 0x0 "CNT,Counter"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
|
|
line.long 0x4 "GRA,General Register A"
|
|
hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
|
|
line.long 0x8 "GRB,General Register B"
|
|
hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
|
|
line.long 0xC "PDR,Period Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
|
|
line.long 0x10 "DTR,Dead Time Register"
|
|
hexmask.long.word 0x10 0.--15. 1. "DTR,Dead Time Register"
|
|
line.long 0x14 "TRO,Trigger Register O"
|
|
hexmask.long.word 0x14 0.--15. 1. "TRO,Trigger Register O"
|
|
line.long 0x18 "BRA,Buffer Register A"
|
|
hexmask.long.word 0x18 0.--15. 1. "BRA,Buffer Register A"
|
|
line.long 0x1C "BRB,Buffer Register B"
|
|
hexmask.long.word 0x1C 0.--15. 1. "BRB,Buffer Register B"
|
|
line.long 0x20 "PDBR,Period Buffer Register"
|
|
hexmask.long.word 0x20 0.--15. 1. "PDBR,Period Buffer Register"
|
|
line.long 0x24 "DTBR,Dead Time Buffer Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "DTBR,Dead Time Buffer Register"
|
|
line.long 0x28 "TBRO,Trigger Buffer Register O"
|
|
hexmask.long.word 0x28 0.--15. 1. "TBRO,Trigger Buffer Register O"
|
|
line.long 0x2C "IOMSR,I and O Manual Setting Register"
|
|
bitfld.long 0x2C 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
bitfld.long 0x2C 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
newline
|
|
bitfld.long 0x2C 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
|
|
bitfld.long 0x2C 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0x30 "IOMSBR,I and O Manual Setting Buffer Register"
|
|
bitfld.long 0x30 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
bitfld.long 0x30 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
newline
|
|
bitfld.long 0x30 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
|
|
bitfld.long 0x30 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
|
|
tree.end
|
|
tree "MFTP2"
|
|
base ad:0x40030100
|
|
group.long 0x0++0x27
|
|
line.long 0x0 "CSR,Counter Setting Register"
|
|
bitfld.long 0x0 13. "GRBAUTO,General Register B Auto Setting Enable" "0: Auto Setting Disable,1: Auto Setting Enable"
|
|
bitfld.long 0x0 12. "CMMSK,Compare Match Mask at General Register Zero" "0: Mask Disable,1: Mask Enable"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
|
|
bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Triangular Count (from Down-count)"
|
|
newline
|
|
bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
|
|
bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
|
|
line.long 0x4 "IOCR,I and O Control Register"
|
|
bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
|
|
bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
newline
|
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bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
|
|
bitfld.long 0x4 10. "OCTSB,Output Controller Type Select B" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
|
|
newline
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bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
|
|
bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
|
|
newline
|
|
bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
|
|
bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
newline
|
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bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 2. "OCTSA,Output Controller Type Select A" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
|
|
newline
|
|
bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
|
|
bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
|
|
line.long 0x8 "PACR,Port F and F A Control Register"
|
|
bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
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bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
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bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0xC "PBCR,Port F and F B Control Register"
|
|
bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
|
|
line.long 0x10 "DTCR,Dead Time Control Register"
|
|
bitfld.long 0x10 8.--9. "DTOLB,Dead Time Output Level B" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
|
|
bitfld.long 0x10 6.--7. "DTOLA,Dead Time Output Level A" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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|
newline
|
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bitfld.long 0x10 4.--5. "DTASB,Dead Time Adoption Select B" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
|
|
bitfld.long 0x10 2.--3. "DTASA,Dead Time Adoption Select A" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
|
|
newline
|
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bitfld.long 0x10 0.--1. "DTSS,Dead Time Controller Start Trigger Select" "0: Rising edge - PFF A and Falling edge - PFF A,1: Rising edge - PFF B and Falling edge - PFF B,2: Rising edge - PFF A and Falling edge - PFF B,3: Rising edge - PFF B and Falling edge - PFF A"
|
|
line.long 0x14 "BOSR,Buffer Operation Setting Register"
|
|
bitfld.long 0x14 16.--17. "BFOIOMS,Buffer Write Operation Select IOMS" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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|
bitfld.long 0x14 15. "BFSKIOMS,Buffer Write Operation with Skipping Enable IOMS" "0: Link with Skipping Disable,1: Link with Skipping Enable"
|
|
newline
|
|
bitfld.long 0x14 14. "BFSKO,Buffer Write Operation with Skipping Enable O" "0: Link with Skipping Disable,1: Link with Skipping Enable"
|
|
bitfld.long 0x14 13. "BFSKD,Buffer Write Operation with Skipping Enable D" "0: Link with Skipping Disable,1: Link with Skipping Enable"
|
|
newline
|
|
bitfld.long 0x14 12. "BFSKP,Buffer Write Operation with Skipping Enable P" "0: Link with Skipping Disable,1: Link with Skipping Enable"
|
|
bitfld.long 0x14 11. "BFSKB,Buffer Write Operation with Skipping Enable B" "0: Link with Skipping Disable,1: Link with Skipping Enable"
|
|
newline
|
|
bitfld.long 0x14 10. "BFSKA,Buffer Write Operation with Skipping Enable A" "0: Link with Skipping Disable,1: Link with Skipping Enable"
|
|
bitfld.long 0x14 8.--9. "BFOO,Buffer Write Operation Select O" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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|
newline
|
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bitfld.long 0x14 6.--7. "BFOD,Buffer Write Operation Select D" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
newline
|
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bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
line.long 0x18 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
|
|
bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
|
|
newline
|
|
bitfld.long 0x18 8.--9. "IRQENO,Interrupt Request Enable O" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
|
|
bitfld.long 0x18 6.--7. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x18 4.--5. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
|
|
bitfld.long 0x18 2.--3. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x18 0.--1. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
|
|
line.long 0x1C "TER,Trigger Enable Register"
|
|
bitfld.long 0x1C 8.--9. "TRGENO,Trigger Enable O" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
|
|
bitfld.long 0x1C 6.--7. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x1C 4.--5. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
|
|
bitfld.long 0x1C 2.--3. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x1C 0.--1. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
|
|
line.long 0x20 "ISLRA,Interrupt Skipping Limit Register A"
|
|
hexmask.long.byte 0x20 8.--11. 1. "SKLMTO,Interrupt Request Skipping Limit O"
|
|
hexmask.long.byte 0x20 4.--7. 1. "SKLMTU,Interrupt Request Skipping Limit U"
|
|
newline
|
|
hexmask.long.byte 0x20 0.--3. 1. "SKLMTV,Interrupt Request Skipping Limit V"
|
|
line.long 0x24 "ISLRB,Interrupt Skipping Limit Register B"
|
|
hexmask.long.byte 0x24 4.--7. 1. "SKLMTB,Interrupt Request Skipping Limit B"
|
|
hexmask.long.byte 0x24 0.--3. 1. "SKLMTA,Interrupt Request Skipping Limit A"
|
|
rgroup.long 0x28++0xB
|
|
line.long 0x0 "ISCRA,Interrupt Skipping Count Register A"
|
|
hexmask.long.byte 0x0 8.--11. 1. "SKCNTO,Interrupt Request Skipping Count O"
|
|
hexmask.long.byte 0x0 4.--7. 1. "SKCNTU,Interrupt Request Skipping Count U"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "SKCNTV,Interrupt Request Skipping Count V"
|
|
line.long 0x4 "ISCRB,Interrupt Skipping Count Register B"
|
|
hexmask.long.byte 0x4 4.--7. 1. "SKCNTB,Interrupt Request Skipping Count B"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SKCNTA,Interrupt Request Skipping Count A"
|
|
line.long 0x8 "COSR,Counter Operation Status Register"
|
|
bitfld.long 0x8 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
|
|
group.long 0x34++0x33
|
|
line.long 0x0 "CNT,Counter"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
|
|
line.long 0x4 "GRA,General Register A"
|
|
hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
|
|
line.long 0x8 "GRB,General Register B"
|
|
hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
|
|
line.long 0xC "PDR,Period Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
|
|
line.long 0x10 "DTR,Dead Time Register"
|
|
hexmask.long.word 0x10 0.--15. 1. "DTR,Dead Time Register"
|
|
line.long 0x14 "TRO,Trigger Register O"
|
|
hexmask.long.word 0x14 0.--15. 1. "TRO,Trigger Register O"
|
|
line.long 0x18 "BRA,Buffer Register A"
|
|
hexmask.long.word 0x18 0.--15. 1. "BRA,Buffer Register A"
|
|
line.long 0x1C "BRB,Buffer Register B"
|
|
hexmask.long.word 0x1C 0.--15. 1. "BRB,Buffer Register B"
|
|
line.long 0x20 "PDBR,Period Buffer Register"
|
|
hexmask.long.word 0x20 0.--15. 1. "PDBR,Period Buffer Register"
|
|
line.long 0x24 "DTBR,Dead Time Buffer Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "DTBR,Dead Time Buffer Register"
|
|
line.long 0x28 "TBRO,Trigger Buffer Register O"
|
|
hexmask.long.word 0x28 0.--15. 1. "TBRO,Trigger Buffer Register O"
|
|
line.long 0x2C "IOMSR,I and O Manual Setting Register"
|
|
bitfld.long 0x2C 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
bitfld.long 0x2C 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
newline
|
|
bitfld.long 0x2C 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
|
|
bitfld.long 0x2C 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0x30 "IOMSBR,I and O Manual Setting Buffer Register"
|
|
bitfld.long 0x30 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
bitfld.long 0x30 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
newline
|
|
bitfld.long 0x30 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
|
|
bitfld.long 0x30 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
|
|
tree.end
|
|
tree "MFTP3"
|
|
base ad:0x40030170
|
|
group.long 0x0++0x27
|
|
line.long 0x0 "CSR,Counter Setting Register"
|
|
bitfld.long 0x0 13. "GRBAUTO,General Register B Auto Setting Enable" "0: Auto Setting Disable,1: Auto Setting Enable"
|
|
bitfld.long 0x0 12. "CMMSK,Compare Match Mask at General Register Zero" "0: Mask Disable,1: Mask Enable"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
|
|
bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Triangular Count (from Down-count)"
|
|
newline
|
|
bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
|
|
bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
|
|
line.long 0x4 "IOCR,I and O Control Register"
|
|
bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
|
|
bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
newline
|
|
bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
|
|
bitfld.long 0x4 10. "OCTSB,Output Controller Type Select B" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
|
|
newline
|
|
bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
|
|
bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
|
|
newline
|
|
bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
|
|
bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
newline
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bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 2. "OCTSA,Output Controller Type Select A" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
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bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
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line.long 0x8 "PACR,Port F and F A Control Register"
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bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
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bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
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line.long 0xC "PBCR,Port F and F B Control Register"
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bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
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bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
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line.long 0x10 "DTCR,Dead Time Control Register"
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bitfld.long 0x10 8.--9. "DTOLB,Dead Time Output Level B" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 6.--7. "DTOLA,Dead Time Output Level A" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 4.--5. "DTASB,Dead Time Adoption Select B" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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bitfld.long 0x10 2.--3. "DTASA,Dead Time Adoption Select A" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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bitfld.long 0x10 0.--1. "DTSS,Dead Time Controller Start Trigger Select" "0: Rising edge - PFF A and Falling edge - PFF A,1: Rising edge - PFF B and Falling edge - PFF B,2: Rising edge - PFF A and Falling edge - PFF B,3: Rising edge - PFF B and Falling edge - PFF A"
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line.long 0x14 "BOSR,Buffer Operation Setting Register"
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bitfld.long 0x14 16.--17. "BFOIOMS,Buffer Write Operation Select IOMS" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 15. "BFSKIOMS,Buffer Write Operation with Skipping Enable IOMS" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 14. "BFSKO,Buffer Write Operation with Skipping Enable O" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 13. "BFSKD,Buffer Write Operation with Skipping Enable D" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 12. "BFSKP,Buffer Write Operation with Skipping Enable P" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 11. "BFSKB,Buffer Write Operation with Skipping Enable B" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 10. "BFSKA,Buffer Write Operation with Skipping Enable A" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 8.--9. "BFOO,Buffer Write Operation Select O" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 6.--7. "BFOD,Buffer Write Operation Select D" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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line.long 0x18 "IER,Interrupt Enable Register"
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bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
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bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
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bitfld.long 0x18 8.--9. "IRQENO,Interrupt Request Enable O" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 6.--7. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 4.--5. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 2.--3. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 0.--1. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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line.long 0x1C "TER,Trigger Enable Register"
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bitfld.long 0x1C 8.--9. "TRGENO,Trigger Enable O" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 6.--7. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 4.--5. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 2.--3. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 0.--1. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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line.long 0x20 "ISLRA,Interrupt Skipping Limit Register A"
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hexmask.long.byte 0x20 8.--11. 1. "SKLMTO,Interrupt Request Skipping Limit O"
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hexmask.long.byte 0x20 4.--7. 1. "SKLMTU,Interrupt Request Skipping Limit U"
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hexmask.long.byte 0x20 0.--3. 1. "SKLMTV,Interrupt Request Skipping Limit V"
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line.long 0x24 "ISLRB,Interrupt Skipping Limit Register B"
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hexmask.long.byte 0x24 4.--7. 1. "SKLMTB,Interrupt Request Skipping Limit B"
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hexmask.long.byte 0x24 0.--3. 1. "SKLMTA,Interrupt Request Skipping Limit A"
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rgroup.long 0x28++0xB
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line.long 0x0 "ISCRA,Interrupt Skipping Count Register A"
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hexmask.long.byte 0x0 8.--11. 1. "SKCNTO,Interrupt Request Skipping Count O"
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hexmask.long.byte 0x0 4.--7. 1. "SKCNTU,Interrupt Request Skipping Count U"
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hexmask.long.byte 0x0 0.--3. 1. "SKCNTV,Interrupt Request Skipping Count V"
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line.long 0x4 "ISCRB,Interrupt Skipping Count Register B"
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hexmask.long.byte 0x4 4.--7. 1. "SKCNTB,Interrupt Request Skipping Count B"
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hexmask.long.byte 0x4 0.--3. 1. "SKCNTA,Interrupt Request Skipping Count A"
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line.long 0x8 "COSR,Counter Operation Status Register"
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bitfld.long 0x8 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
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group.long 0x34++0x33
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line.long 0x0 "CNT,Counter"
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hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
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line.long 0x4 "GRA,General Register A"
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hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
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line.long 0x8 "GRB,General Register B"
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hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
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line.long 0xC "PDR,Period Register"
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hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
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line.long 0x10 "DTR,Dead Time Register"
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hexmask.long.word 0x10 0.--15. 1. "DTR,Dead Time Register"
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line.long 0x14 "TRO,Trigger Register O"
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hexmask.long.word 0x14 0.--15. 1. "TRO,Trigger Register O"
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line.long 0x18 "BRA,Buffer Register A"
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hexmask.long.word 0x18 0.--15. 1. "BRA,Buffer Register A"
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line.long 0x1C "BRB,Buffer Register B"
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hexmask.long.word 0x1C 0.--15. 1. "BRB,Buffer Register B"
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line.long 0x20 "PDBR,Period Buffer Register"
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hexmask.long.word 0x20 0.--15. 1. "PDBR,Period Buffer Register"
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line.long 0x24 "DTBR,Dead Time Buffer Register"
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hexmask.long.word 0x24 0.--15. 1. "DTBR,Dead Time Buffer Register"
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line.long 0x28 "TBRO,Trigger Buffer Register O"
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hexmask.long.word 0x28 0.--15. 1. "TBRO,Trigger Buffer Register O"
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line.long 0x2C "IOMSR,I and O Manual Setting Register"
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bitfld.long 0x2C 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x2C 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x2C 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
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bitfld.long 0x2C 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
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line.long 0x30 "IOMSBR,I and O Manual Setting Buffer Register"
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bitfld.long 0x30 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x30 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x30 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
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bitfld.long 0x30 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
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tree.end
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tree "MFTP4"
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base ad:0x400301E0
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group.long 0x0++0x27
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line.long 0x0 "CSR,Counter Setting Register"
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bitfld.long 0x0 13. "GRBAUTO,General Register B Auto Setting Enable" "0: Auto Setting Disable,1: Auto Setting Enable"
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bitfld.long 0x0 12. "CMMSK,Compare Match Mask at General Register Zero" "0: Mask Disable,1: Mask Enable"
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bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
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bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Triangular Count (from Down-count)"
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bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
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bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
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hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
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line.long 0x4 "IOCR,I and O Control Register"
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bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
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bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 10. "OCTSB,Output Controller Type Select B" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
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bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
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bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
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bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 2. "OCTSA,Output Controller Type Select A" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
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bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
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line.long 0x8 "PACR,Port F and F A Control Register"
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bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
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bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
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line.long 0xC "PBCR,Port F and F B Control Register"
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bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
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bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
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line.long 0x10 "DTCR,Dead Time Control Register"
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bitfld.long 0x10 8.--9. "DTOLB,Dead Time Output Level B" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 6.--7. "DTOLA,Dead Time Output Level A" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 4.--5. "DTASB,Dead Time Adoption Select B" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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bitfld.long 0x10 2.--3. "DTASA,Dead Time Adoption Select A" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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bitfld.long 0x10 0.--1. "DTSS,Dead Time Controller Start Trigger Select" "0: Rising edge - PFF A and Falling edge - PFF A,1: Rising edge - PFF B and Falling edge - PFF B,2: Rising edge - PFF A and Falling edge - PFF B,3: Rising edge - PFF B and Falling edge - PFF A"
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line.long 0x14 "BOSR,Buffer Operation Setting Register"
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bitfld.long 0x14 16.--17. "BFOIOMS,Buffer Write Operation Select IOMS" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 15. "BFSKIOMS,Buffer Write Operation with Skipping Enable IOMS" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 14. "BFSKO,Buffer Write Operation with Skipping Enable O" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 13. "BFSKD,Buffer Write Operation with Skipping Enable D" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 12. "BFSKP,Buffer Write Operation with Skipping Enable P" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 11. "BFSKB,Buffer Write Operation with Skipping Enable B" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 10. "BFSKA,Buffer Write Operation with Skipping Enable A" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 8.--9. "BFOO,Buffer Write Operation Select O" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 6.--7. "BFOD,Buffer Write Operation Select D" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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|
line.long 0x18 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
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bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
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|
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bitfld.long 0x18 8.--9. "IRQENO,Interrupt Request Enable O" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 6.--7. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 4.--5. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 2.--3. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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|
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bitfld.long 0x18 0.--1. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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|
line.long 0x1C "TER,Trigger Enable Register"
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|
bitfld.long 0x1C 8.--9. "TRGENO,Trigger Enable O" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 6.--7. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 4.--5. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 2.--3. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 0.--1. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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line.long 0x20 "ISLRA,Interrupt Skipping Limit Register A"
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hexmask.long.byte 0x20 8.--11. 1. "SKLMTO,Interrupt Request Skipping Limit O"
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hexmask.long.byte 0x20 4.--7. 1. "SKLMTU,Interrupt Request Skipping Limit U"
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hexmask.long.byte 0x20 0.--3. 1. "SKLMTV,Interrupt Request Skipping Limit V"
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line.long 0x24 "ISLRB,Interrupt Skipping Limit Register B"
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hexmask.long.byte 0x24 4.--7. 1. "SKLMTB,Interrupt Request Skipping Limit B"
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hexmask.long.byte 0x24 0.--3. 1. "SKLMTA,Interrupt Request Skipping Limit A"
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rgroup.long 0x28++0xB
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line.long 0x0 "ISCRA,Interrupt Skipping Count Register A"
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hexmask.long.byte 0x0 8.--11. 1. "SKCNTO,Interrupt Request Skipping Count O"
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hexmask.long.byte 0x0 4.--7. 1. "SKCNTU,Interrupt Request Skipping Count U"
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hexmask.long.byte 0x0 0.--3. 1. "SKCNTV,Interrupt Request Skipping Count V"
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line.long 0x4 "ISCRB,Interrupt Skipping Count Register B"
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hexmask.long.byte 0x4 4.--7. 1. "SKCNTB,Interrupt Request Skipping Count B"
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hexmask.long.byte 0x4 0.--3. 1. "SKCNTA,Interrupt Request Skipping Count A"
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line.long 0x8 "COSR,Counter Operation Status Register"
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bitfld.long 0x8 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
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group.long 0x34++0x33
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line.long 0x0 "CNT,Counter"
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hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
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line.long 0x4 "GRA,General Register A"
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hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
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line.long 0x8 "GRB,General Register B"
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hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
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line.long 0xC "PDR,Period Register"
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hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
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line.long 0x10 "DTR,Dead Time Register"
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hexmask.long.word 0x10 0.--15. 1. "DTR,Dead Time Register"
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line.long 0x14 "TRO,Trigger Register O"
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hexmask.long.word 0x14 0.--15. 1. "TRO,Trigger Register O"
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line.long 0x18 "BRA,Buffer Register A"
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hexmask.long.word 0x18 0.--15. 1. "BRA,Buffer Register A"
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line.long 0x1C "BRB,Buffer Register B"
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hexmask.long.word 0x1C 0.--15. 1. "BRB,Buffer Register B"
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line.long 0x20 "PDBR,Period Buffer Register"
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hexmask.long.word 0x20 0.--15. 1. "PDBR,Period Buffer Register"
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line.long 0x24 "DTBR,Dead Time Buffer Register"
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hexmask.long.word 0x24 0.--15. 1. "DTBR,Dead Time Buffer Register"
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line.long 0x28 "TBRO,Trigger Buffer Register O"
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hexmask.long.word 0x28 0.--15. 1. "TBRO,Trigger Buffer Register O"
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line.long 0x2C "IOMSR,I and O Manual Setting Register"
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bitfld.long 0x2C 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x2C 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x2C 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
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bitfld.long 0x2C 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
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line.long 0x30 "IOMSBR,I and O Manual Setting Buffer Register"
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bitfld.long 0x30 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x30 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x30 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
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bitfld.long 0x30 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
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tree.end
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tree "MFTP5"
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base ad:0x40030250
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group.long 0x0++0x27
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line.long 0x0 "CSR,Counter Setting Register"
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bitfld.long 0x0 13. "GRBAUTO,General Register B Auto Setting Enable" "0: Auto Setting Disable,1: Auto Setting Enable"
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bitfld.long 0x0 12. "CMMSK,Compare Match Mask at General Register Zero" "0: Mask Disable,1: Mask Enable"
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bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
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bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Triangular Count (from Down-count)"
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bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
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bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
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newline
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hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
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line.long 0x4 "IOCR,I and O Control Register"
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bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
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bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 10. "OCTSB,Output Controller Type Select B" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
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bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
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newline
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bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
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bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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newline
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bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 2. "OCTSA,Output Controller Type Select A" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
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bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
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line.long 0x8 "PACR,Port F and F A Control Register"
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bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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newline
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bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
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bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
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line.long 0xC "PBCR,Port F and F B Control Register"
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bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
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bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
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line.long 0x10 "DTCR,Dead Time Control Register"
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bitfld.long 0x10 8.--9. "DTOLB,Dead Time Output Level B" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 6.--7. "DTOLA,Dead Time Output Level A" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 4.--5. "DTASB,Dead Time Adoption Select B" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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bitfld.long 0x10 2.--3. "DTASA,Dead Time Adoption Select A" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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newline
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bitfld.long 0x10 0.--1. "DTSS,Dead Time Controller Start Trigger Select" "0: Rising edge - PFF A and Falling edge - PFF A,1: Rising edge - PFF B and Falling edge - PFF B,2: Rising edge - PFF A and Falling edge - PFF B,3: Rising edge - PFF B and Falling edge - PFF A"
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line.long 0x14 "BOSR,Buffer Operation Setting Register"
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bitfld.long 0x14 16.--17. "BFOIOMS,Buffer Write Operation Select IOMS" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 15. "BFSKIOMS,Buffer Write Operation with Skipping Enable IOMS" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 14. "BFSKO,Buffer Write Operation with Skipping Enable O" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 13. "BFSKD,Buffer Write Operation with Skipping Enable D" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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newline
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bitfld.long 0x14 12. "BFSKP,Buffer Write Operation with Skipping Enable P" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 11. "BFSKB,Buffer Write Operation with Skipping Enable B" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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newline
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bitfld.long 0x14 10. "BFSKA,Buffer Write Operation with Skipping Enable A" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 8.--9. "BFOO,Buffer Write Operation Select O" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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newline
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bitfld.long 0x14 6.--7. "BFOD,Buffer Write Operation Select D" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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newline
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bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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line.long 0x18 "IER,Interrupt Enable Register"
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bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
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bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
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newline
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bitfld.long 0x18 8.--9. "IRQENO,Interrupt Request Enable O" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 6.--7. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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newline
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bitfld.long 0x18 4.--5. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 2.--3. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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newline
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bitfld.long 0x18 0.--1. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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line.long 0x1C "TER,Trigger Enable Register"
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bitfld.long 0x1C 8.--9. "TRGENO,Trigger Enable O" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 6.--7. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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newline
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bitfld.long 0x1C 4.--5. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 2.--3. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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newline
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bitfld.long 0x1C 0.--1. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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line.long 0x20 "ISLRA,Interrupt Skipping Limit Register A"
|
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hexmask.long.byte 0x20 8.--11. 1. "SKLMTO,Interrupt Request Skipping Limit O"
|
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hexmask.long.byte 0x20 4.--7. 1. "SKLMTU,Interrupt Request Skipping Limit U"
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hexmask.long.byte 0x20 0.--3. 1. "SKLMTV,Interrupt Request Skipping Limit V"
|
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line.long 0x24 "ISLRB,Interrupt Skipping Limit Register B"
|
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hexmask.long.byte 0x24 4.--7. 1. "SKLMTB,Interrupt Request Skipping Limit B"
|
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hexmask.long.byte 0x24 0.--3. 1. "SKLMTA,Interrupt Request Skipping Limit A"
|
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rgroup.long 0x28++0xB
|
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line.long 0x0 "ISCRA,Interrupt Skipping Count Register A"
|
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hexmask.long.byte 0x0 8.--11. 1. "SKCNTO,Interrupt Request Skipping Count O"
|
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hexmask.long.byte 0x0 4.--7. 1. "SKCNTU,Interrupt Request Skipping Count U"
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newline
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hexmask.long.byte 0x0 0.--3. 1. "SKCNTV,Interrupt Request Skipping Count V"
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line.long 0x4 "ISCRB,Interrupt Skipping Count Register B"
|
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hexmask.long.byte 0x4 4.--7. 1. "SKCNTB,Interrupt Request Skipping Count B"
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hexmask.long.byte 0x4 0.--3. 1. "SKCNTA,Interrupt Request Skipping Count A"
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line.long 0x8 "COSR,Counter Operation Status Register"
|
|
bitfld.long 0x8 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
|
|
group.long 0x34++0x33
|
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line.long 0x0 "CNT,Counter"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
|
|
line.long 0x4 "GRA,General Register A"
|
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hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
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line.long 0x8 "GRB,General Register B"
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hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
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line.long 0xC "PDR,Period Register"
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hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
|
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line.long 0x10 "DTR,Dead Time Register"
|
|
hexmask.long.word 0x10 0.--15. 1. "DTR,Dead Time Register"
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line.long 0x14 "TRO,Trigger Register O"
|
|
hexmask.long.word 0x14 0.--15. 1. "TRO,Trigger Register O"
|
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line.long 0x18 "BRA,Buffer Register A"
|
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hexmask.long.word 0x18 0.--15. 1. "BRA,Buffer Register A"
|
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line.long 0x1C "BRB,Buffer Register B"
|
|
hexmask.long.word 0x1C 0.--15. 1. "BRB,Buffer Register B"
|
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line.long 0x20 "PDBR,Period Buffer Register"
|
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hexmask.long.word 0x20 0.--15. 1. "PDBR,Period Buffer Register"
|
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line.long 0x24 "DTBR,Dead Time Buffer Register"
|
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hexmask.long.word 0x24 0.--15. 1. "DTBR,Dead Time Buffer Register"
|
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line.long 0x28 "TBRO,Trigger Buffer Register O"
|
|
hexmask.long.word 0x28 0.--15. 1. "TBRO,Trigger Buffer Register O"
|
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line.long 0x2C "IOMSR,I and O Manual Setting Register"
|
|
bitfld.long 0x2C 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
bitfld.long 0x2C 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
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newline
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bitfld.long 0x2C 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
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bitfld.long 0x2C 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
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|
line.long 0x30 "IOMSBR,I and O Manual Setting Buffer Register"
|
|
bitfld.long 0x30 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
bitfld.long 0x30 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x30 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
|
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bitfld.long 0x30 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
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tree.end
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tree "MFTP6"
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base ad:0x400302C0
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group.long 0x0++0x27
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|
line.long 0x0 "CSR,Counter Setting Register"
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|
bitfld.long 0x0 13. "GRBAUTO,General Register B Auto Setting Enable" "0: Auto Setting Disable,1: Auto Setting Enable"
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bitfld.long 0x0 12. "CMMSK,Compare Match Mask at General Register Zero" "0: Mask Disable,1: Mask Enable"
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bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
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|
bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Triangular Count (from Down-count)"
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bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
|
|
bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
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hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
|
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line.long 0x4 "IOCR,I and O Control Register"
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|
bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
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bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 10. "OCTSB,Output Controller Type Select B" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
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bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
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bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
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bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 2. "OCTSA,Output Controller Type Select A" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
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bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
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line.long 0x8 "PACR,Port F and F A Control Register"
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bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
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bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
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line.long 0xC "PBCR,Port F and F B Control Register"
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bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
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|
bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
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line.long 0x10 "DTCR,Dead Time Control Register"
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bitfld.long 0x10 8.--9. "DTOLB,Dead Time Output Level B" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 6.--7. "DTOLA,Dead Time Output Level A" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 4.--5. "DTASB,Dead Time Adoption Select B" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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bitfld.long 0x10 2.--3. "DTASA,Dead Time Adoption Select A" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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bitfld.long 0x10 0.--1. "DTSS,Dead Time Controller Start Trigger Select" "0: Rising edge - PFF A and Falling edge - PFF A,1: Rising edge - PFF B and Falling edge - PFF B,2: Rising edge - PFF A and Falling edge - PFF B,3: Rising edge - PFF B and Falling edge - PFF A"
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line.long 0x14 "BOSR,Buffer Operation Setting Register"
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bitfld.long 0x14 16.--17. "BFOIOMS,Buffer Write Operation Select IOMS" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 15. "BFSKIOMS,Buffer Write Operation with Skipping Enable IOMS" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 14. "BFSKO,Buffer Write Operation with Skipping Enable O" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 13. "BFSKD,Buffer Write Operation with Skipping Enable D" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 12. "BFSKP,Buffer Write Operation with Skipping Enable P" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 11. "BFSKB,Buffer Write Operation with Skipping Enable B" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 10. "BFSKA,Buffer Write Operation with Skipping Enable A" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 8.--9. "BFOO,Buffer Write Operation Select O" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 6.--7. "BFOD,Buffer Write Operation Select D" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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line.long 0x18 "IER,Interrupt Enable Register"
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bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
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bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
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bitfld.long 0x18 8.--9. "IRQENO,Interrupt Request Enable O" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 6.--7. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 4.--5. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 2.--3. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 0.--1. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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line.long 0x1C "TER,Trigger Enable Register"
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bitfld.long 0x1C 8.--9. "TRGENO,Trigger Enable O" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 6.--7. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 4.--5. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 2.--3. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 0.--1. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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line.long 0x20 "ISLRA,Interrupt Skipping Limit Register A"
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hexmask.long.byte 0x20 8.--11. 1. "SKLMTO,Interrupt Request Skipping Limit O"
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hexmask.long.byte 0x20 4.--7. 1. "SKLMTU,Interrupt Request Skipping Limit U"
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hexmask.long.byte 0x20 0.--3. 1. "SKLMTV,Interrupt Request Skipping Limit V"
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line.long 0x24 "ISLRB,Interrupt Skipping Limit Register B"
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hexmask.long.byte 0x24 4.--7. 1. "SKLMTB,Interrupt Request Skipping Limit B"
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hexmask.long.byte 0x24 0.--3. 1. "SKLMTA,Interrupt Request Skipping Limit A"
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rgroup.long 0x28++0xB
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line.long 0x0 "ISCRA,Interrupt Skipping Count Register A"
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hexmask.long.byte 0x0 8.--11. 1. "SKCNTO,Interrupt Request Skipping Count O"
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hexmask.long.byte 0x0 4.--7. 1. "SKCNTU,Interrupt Request Skipping Count U"
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hexmask.long.byte 0x0 0.--3. 1. "SKCNTV,Interrupt Request Skipping Count V"
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line.long 0x4 "ISCRB,Interrupt Skipping Count Register B"
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hexmask.long.byte 0x4 4.--7. 1. "SKCNTB,Interrupt Request Skipping Count B"
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hexmask.long.byte 0x4 0.--3. 1. "SKCNTA,Interrupt Request Skipping Count A"
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line.long 0x8 "COSR,Counter Operation Status Register"
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bitfld.long 0x8 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
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group.long 0x34++0x33
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line.long 0x0 "CNT,Counter"
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hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
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line.long 0x4 "GRA,General Register A"
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hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
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line.long 0x8 "GRB,General Register B"
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hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
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line.long 0xC "PDR,Period Register"
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hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
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line.long 0x10 "DTR,Dead Time Register"
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hexmask.long.word 0x10 0.--15. 1. "DTR,Dead Time Register"
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line.long 0x14 "TRO,Trigger Register O"
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hexmask.long.word 0x14 0.--15. 1. "TRO,Trigger Register O"
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line.long 0x18 "BRA,Buffer Register A"
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hexmask.long.word 0x18 0.--15. 1. "BRA,Buffer Register A"
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line.long 0x1C "BRB,Buffer Register B"
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hexmask.long.word 0x1C 0.--15. 1. "BRB,Buffer Register B"
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line.long 0x20 "PDBR,Period Buffer Register"
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hexmask.long.word 0x20 0.--15. 1. "PDBR,Period Buffer Register"
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line.long 0x24 "DTBR,Dead Time Buffer Register"
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hexmask.long.word 0x24 0.--15. 1. "DTBR,Dead Time Buffer Register"
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line.long 0x28 "TBRO,Trigger Buffer Register O"
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hexmask.long.word 0x28 0.--15. 1. "TBRO,Trigger Buffer Register O"
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line.long 0x2C "IOMSR,I and O Manual Setting Register"
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bitfld.long 0x2C 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x2C 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
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newline
|
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bitfld.long 0x2C 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
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bitfld.long 0x2C 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
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line.long 0x30 "IOMSBR,I and O Manual Setting Buffer Register"
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bitfld.long 0x30 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x30 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x30 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
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bitfld.long 0x30 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
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tree.end
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tree "MFTP7"
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base ad:0x40030330
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group.long 0x0++0x27
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line.long 0x0 "CSR,Counter Setting Register"
|
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bitfld.long 0x0 13. "GRBAUTO,General Register B Auto Setting Enable" "0: Auto Setting Disable,1: Auto Setting Enable"
|
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bitfld.long 0x0 12. "CMMSK,Compare Match Mask at General Register Zero" "0: Mask Disable,1: Mask Enable"
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bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
|
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bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Triangular Count (from Down-count)"
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|
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bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
|
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bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
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newline
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hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
|
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line.long 0x4 "IOCR,I and O Control Register"
|
|
bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
|
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bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 10. "OCTSB,Output Controller Type Select B" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
|
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bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
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bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
|
|
bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
|
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bitfld.long 0x4 2. "OCTSA,Output Controller Type Select A" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
|
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bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
|
|
line.long 0x8 "PACR,Port F and F A Control Register"
|
|
bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
|
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bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0xC "PBCR,Port F and F B Control Register"
|
|
bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
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bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
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line.long 0x10 "DTCR,Dead Time Control Register"
|
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bitfld.long 0x10 8.--9. "DTOLB,Dead Time Output Level B" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 6.--7. "DTOLA,Dead Time Output Level A" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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bitfld.long 0x10 4.--5. "DTASB,Dead Time Adoption Select B" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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bitfld.long 0x10 2.--3. "DTASA,Dead Time Adoption Select A" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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bitfld.long 0x10 0.--1. "DTSS,Dead Time Controller Start Trigger Select" "0: Rising edge - PFF A and Falling edge - PFF A,1: Rising edge - PFF B and Falling edge - PFF B,2: Rising edge - PFF A and Falling edge - PFF B,3: Rising edge - PFF B and Falling edge - PFF A"
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line.long 0x14 "BOSR,Buffer Operation Setting Register"
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bitfld.long 0x14 16.--17. "BFOIOMS,Buffer Write Operation Select IOMS" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 15. "BFSKIOMS,Buffer Write Operation with Skipping Enable IOMS" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 14. "BFSKO,Buffer Write Operation with Skipping Enable O" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 13. "BFSKD,Buffer Write Operation with Skipping Enable D" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 12. "BFSKP,Buffer Write Operation with Skipping Enable P" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 11. "BFSKB,Buffer Write Operation with Skipping Enable B" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 10. "BFSKA,Buffer Write Operation with Skipping Enable A" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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bitfld.long 0x14 8.--9. "BFOO,Buffer Write Operation Select O" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 6.--7. "BFOD,Buffer Write Operation Select D" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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line.long 0x18 "IER,Interrupt Enable Register"
|
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bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
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bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
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bitfld.long 0x18 8.--9. "IRQENO,Interrupt Request Enable O" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 6.--7. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 4.--5. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 2.--3. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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bitfld.long 0x18 0.--1. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
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line.long 0x1C "TER,Trigger Enable Register"
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bitfld.long 0x1C 8.--9. "TRGENO,Trigger Enable O" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 6.--7. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 4.--5. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 2.--3. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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bitfld.long 0x1C 0.--1. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
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line.long 0x20 "ISLRA,Interrupt Skipping Limit Register A"
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hexmask.long.byte 0x20 8.--11. 1. "SKLMTO,Interrupt Request Skipping Limit O"
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hexmask.long.byte 0x20 4.--7. 1. "SKLMTU,Interrupt Request Skipping Limit U"
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hexmask.long.byte 0x20 0.--3. 1. "SKLMTV,Interrupt Request Skipping Limit V"
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line.long 0x24 "ISLRB,Interrupt Skipping Limit Register B"
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hexmask.long.byte 0x24 4.--7. 1. "SKLMTB,Interrupt Request Skipping Limit B"
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hexmask.long.byte 0x24 0.--3. 1. "SKLMTA,Interrupt Request Skipping Limit A"
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rgroup.long 0x28++0xB
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line.long 0x0 "ISCRA,Interrupt Skipping Count Register A"
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|
hexmask.long.byte 0x0 8.--11. 1. "SKCNTO,Interrupt Request Skipping Count O"
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hexmask.long.byte 0x0 4.--7. 1. "SKCNTU,Interrupt Request Skipping Count U"
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hexmask.long.byte 0x0 0.--3. 1. "SKCNTV,Interrupt Request Skipping Count V"
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line.long 0x4 "ISCRB,Interrupt Skipping Count Register B"
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hexmask.long.byte 0x4 4.--7. 1. "SKCNTB,Interrupt Request Skipping Count B"
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hexmask.long.byte 0x4 0.--3. 1. "SKCNTA,Interrupt Request Skipping Count A"
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line.long 0x8 "COSR,Counter Operation Status Register"
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bitfld.long 0x8 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
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group.long 0x34++0x33
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line.long 0x0 "CNT,Counter"
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hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
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line.long 0x4 "GRA,General Register A"
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|
hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
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line.long 0x8 "GRB,General Register B"
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hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
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line.long 0xC "PDR,Period Register"
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hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
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line.long 0x10 "DTR,Dead Time Register"
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hexmask.long.word 0x10 0.--15. 1. "DTR,Dead Time Register"
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line.long 0x14 "TRO,Trigger Register O"
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hexmask.long.word 0x14 0.--15. 1. "TRO,Trigger Register O"
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line.long 0x18 "BRA,Buffer Register A"
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hexmask.long.word 0x18 0.--15. 1. "BRA,Buffer Register A"
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line.long 0x1C "BRB,Buffer Register B"
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hexmask.long.word 0x1C 0.--15. 1. "BRB,Buffer Register B"
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line.long 0x20 "PDBR,Period Buffer Register"
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hexmask.long.word 0x20 0.--15. 1. "PDBR,Period Buffer Register"
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line.long 0x24 "DTBR,Dead Time Buffer Register"
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hexmask.long.word 0x24 0.--15. 1. "DTBR,Dead Time Buffer Register"
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line.long 0x28 "TBRO,Trigger Buffer Register O"
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hexmask.long.word 0x28 0.--15. 1. "TBRO,Trigger Buffer Register O"
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line.long 0x2C "IOMSR,I and O Manual Setting Register"
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bitfld.long 0x2C 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x2C 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x2C 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
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bitfld.long 0x2C 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
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line.long 0x30 "IOMSBR,I and O Manual Setting Buffer Register"
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bitfld.long 0x30 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x30 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
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bitfld.long 0x30 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
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bitfld.long 0x30 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
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tree.end
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tree "MFTPC"
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base ad:0x40030000
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group.long 0x4++0xB
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line.long 0x0 "SCR,Start Control Register"
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bitfld.long 0x0 7. "CST7,Counter Start 7" "0: Counter Stop,1: Counter Start"
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bitfld.long 0x0 6. "CST6,Counter Start 6" "0: Counter Stop,1: Counter Start"
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bitfld.long 0x0 5. "CST5,Counter Start 5" "0: Counter Stop,1: Counter Start"
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bitfld.long 0x0 4. "CST4,Counter Start 4" "0: Counter Stop,1: Counter Start"
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bitfld.long 0x0 3. "CST3,Counter Start 3" "0: Counter Stop,1: Counter Start"
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bitfld.long 0x0 2. "CST2,Counter Start 2" "0: Counter Stop,1: Counter Start"
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bitfld.long 0x0 1. "CST1,Counter Start 1" "0: Counter Stop,1: Counter Start"
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bitfld.long 0x0 0. "CST0,Counter Start 0" "0: Counter Stop,1: Counter Start"
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line.long 0x4 "SASR,Synchronous Access Setting Register"
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bitfld.long 0x4 7. "SYNCWE7,Synchronous Operation Write Enable 7" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
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bitfld.long 0x4 6. "SYNCWE6,Synchronous Operation Write Enable 6" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
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bitfld.long 0x4 5. "SYNCWE5,Synchronous Operation Write Enable 5" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
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bitfld.long 0x4 4. "SYNCWE4,Synchronous Operation Write Enable 4" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
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bitfld.long 0x4 3. "SYNCWE3,Synchronous Operation Write Enable 3" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
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bitfld.long 0x4 2. "SYNCWE2,Synchronous Operation Write Enable 2" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
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bitfld.long 0x4 1. "SYNCWE1,Synchronous Operation Write Enable 1" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
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bitfld.long 0x4 0. "SYNCWE0,Synchronous Operation Write Enable 0" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
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line.long 0x8 "EISR,External Input Setting Register"
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bitfld.long 0x8 4.--5. "NFCSE,Noise Filter Clock Select External Input" "0: Divider 1,1: Divider 2,2: Divider 8,3: Divider 32"
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bitfld.long 0x8 3. "NFENDE,Noise Filter Enable External Input D" "0: EIN D Noise Filter Disable,1: EIN D Noise Filter Enable"
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bitfld.long 0x8 2. "NFENCE,Noise Filter Enable External Input C" "0: EIN C Noise Filter Disable,1: EIN C Noise Filter Enable"
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bitfld.long 0x8 1. "NFENBE,Noise Filter Enable External Input B" "0: EIN B Noise Filter Disable,1: EIN B Noise Filter Enable"
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bitfld.long 0x8 0. "NFENAE,Noise Filter Enable External Input A" "0: EIN A Noise Filter Disable,1: EIN A Noise Filter Enable"
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group.long 0x18++0x7
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line.long 0x0 "DOSR,Debug Output Select Register"
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hexmask.long.byte 0x0 8.--13. 1. "DOS1,Debug Output Select 1"
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hexmask.long.byte 0x0 0.--5. 1. "DOS0,Debug Output Select 0"
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line.long 0x4 "DSSR,DMA Request Source Select Register"
|
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hexmask.long.byte 0x4 0.--5. 1. "DMASEL,DMA Source Select"
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tree.end
|
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tree "MFTPU"
|
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base ad:0x40030020
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group.long 0x0++0x27
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line.long 0x0 "CSR,Counter Setting Register"
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bitfld.long 0x0 13. "GRBAUTO,General Register B Auto Setting Enable" "0: Auto Setting Disable,1: Auto Setting Enable"
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bitfld.long 0x0 12. "CMMSK,Compare Match Mask at General Register Zero" "0: Mask Disable,1: Mask Enable"
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bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
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bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Triangular Count (from Down-count)"
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|
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bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
|
|
bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
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|
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hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
|
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line.long 0x4 "IOCR,I and O Control Register"
|
|
bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
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bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 10. "OCTSB,Output Controller Type Select B" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
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bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
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|
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bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
|
|
bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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bitfld.long 0x4 2. "OCTSA,Output Controller Type Select A" "0: Output by Port Flip Flop,1: Output by Dead Time Controller"
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bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
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bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
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line.long 0x8 "PACR,Port F and F A Control Register"
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|
bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
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bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
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|
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bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0xC "PBCR,Port F and F B Control Register"
|
|
bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
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bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
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|
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bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
|
|
line.long 0x10 "DTCR,Dead Time Control Register"
|
|
bitfld.long 0x10 8.--9. "DTOLB,Dead Time Output Level B" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
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|
bitfld.long 0x10 6.--7. "DTOLA,Dead Time Output Level A" "0: Low (up-count) and Low (down-count),1: High (up-count) and High (down-count),2: High (up-count) and Low (down-count),3: Low (up-count) and High (down-count)"
|
|
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bitfld.long 0x10 4.--5. "DTASB,Dead Time Adoption Select B" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
|
|
bitfld.long 0x10 2.--3. "DTASA,Dead Time Adoption Select A" "0: Disable,1: Rising edge delay,2: Falling edge delay,3: Rising and Falling edge"
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|
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bitfld.long 0x10 0.--1. "DTSS,Dead Time Controller Start Trigger Select" "0: Rising edge - PFF A and Falling edge - PFF A,1: Rising edge - PFF B and Falling edge - PFF B,2: Rising edge - PFF A and Falling edge - PFF B,3: Rising edge - PFF B and Falling edge - PFF A"
|
|
line.long 0x14 "BOSR,Buffer Operation Setting Register"
|
|
bitfld.long 0x14 16.--17. "BFOIOMS,Buffer Write Operation Select IOMS" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
bitfld.long 0x14 15. "BFSKIOMS,Buffer Write Operation with Skipping Enable IOMS" "0: Link with Skipping Disable,1: Link with Skipping Enable"
|
|
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|
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bitfld.long 0x14 14. "BFSKO,Buffer Write Operation with Skipping Enable O" "0: Link with Skipping Disable,1: Link with Skipping Enable"
|
|
bitfld.long 0x14 13. "BFSKD,Buffer Write Operation with Skipping Enable D" "0: Link with Skipping Disable,1: Link with Skipping Enable"
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|
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|
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bitfld.long 0x14 12. "BFSKP,Buffer Write Operation with Skipping Enable P" "0: Link with Skipping Disable,1: Link with Skipping Enable"
|
|
bitfld.long 0x14 11. "BFSKB,Buffer Write Operation with Skipping Enable B" "0: Link with Skipping Disable,1: Link with Skipping Enable"
|
|
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|
|
bitfld.long 0x14 10. "BFSKA,Buffer Write Operation with Skipping Enable A" "0: Link with Skipping Disable,1: Link with Skipping Enable"
|
|
bitfld.long 0x14 8.--9. "BFOO,Buffer Write Operation Select O" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
newline
|
|
bitfld.long 0x14 6.--7. "BFOD,Buffer Write Operation Select D" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
newline
|
|
bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
line.long 0x18 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
|
|
bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
|
|
newline
|
|
bitfld.long 0x18 8.--9. "IRQENO,Interrupt Request Enable O" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
|
|
bitfld.long 0x18 6.--7. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x18 4.--5. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
|
|
bitfld.long 0x18 2.--3. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x18 0.--1. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable,2: Interrupt Request Enablee with Skipping Counter,3: No Function 3"
|
|
line.long 0x1C "TER,Trigger Enable Register"
|
|
bitfld.long 0x1C 8.--9. "TRGENO,Trigger Enable O" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
|
|
bitfld.long 0x1C 6.--7. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x1C 4.--5. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
|
|
bitfld.long 0x1C 2.--3. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
|
|
newline
|
|
bitfld.long 0x1C 0.--1. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable,2: Trigger Enable with Skipping Counter,3: No Function 3"
|
|
line.long 0x20 "ISLRA,Interrupt Skipping Limit Register A"
|
|
hexmask.long.byte 0x20 8.--11. 1. "SKLMTO,Interrupt Request Skipping Limit O"
|
|
hexmask.long.byte 0x20 4.--7. 1. "SKLMTU,Interrupt Request Skipping Limit U"
|
|
newline
|
|
hexmask.long.byte 0x20 0.--3. 1. "SKLMTV,Interrupt Request Skipping Limit V"
|
|
line.long 0x24 "ISLRB,Interrupt Skipping Limit Register B"
|
|
hexmask.long.byte 0x24 4.--7. 1. "SKLMTB,Interrupt Request Skipping Limit B"
|
|
hexmask.long.byte 0x24 0.--3. 1. "SKLMTA,Interrupt Request Skipping Limit A"
|
|
rgroup.long 0x28++0xB
|
|
line.long 0x0 "ISCRA,Interrupt Skipping Count Register A"
|
|
hexmask.long.byte 0x0 8.--11. 1. "SKCNTO,Interrupt Request Skipping Count O"
|
|
hexmask.long.byte 0x0 4.--7. 1. "SKCNTU,Interrupt Request Skipping Count U"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "SKCNTV,Interrupt Request Skipping Count V"
|
|
line.long 0x4 "ISCRB,Interrupt Skipping Count Register B"
|
|
hexmask.long.byte 0x4 4.--7. 1. "SKCNTB,Interrupt Request Skipping Count B"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SKCNTA,Interrupt Request Skipping Count A"
|
|
line.long 0x8 "COSR,Counter Operation Status Register"
|
|
bitfld.long 0x8 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
|
|
group.long 0x34++0x33
|
|
line.long 0x0 "CNT,Counter"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
|
|
line.long 0x4 "GRA,General Register A"
|
|
hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
|
|
line.long 0x8 "GRB,General Register B"
|
|
hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
|
|
line.long 0xC "PDR,Period Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
|
|
line.long 0x10 "DTR,Dead Time Register"
|
|
hexmask.long.word 0x10 0.--15. 1. "DTR,Dead Time Register"
|
|
line.long 0x14 "TRO,Trigger Register O"
|
|
hexmask.long.word 0x14 0.--15. 1. "TRO,Trigger Register O"
|
|
line.long 0x18 "BRA,Buffer Register A"
|
|
hexmask.long.word 0x18 0.--15. 1. "BRA,Buffer Register A"
|
|
line.long 0x1C "BRB,Buffer Register B"
|
|
hexmask.long.word 0x1C 0.--15. 1. "BRB,Buffer Register B"
|
|
line.long 0x20 "PDBR,Period Buffer Register"
|
|
hexmask.long.word 0x20 0.--15. 1. "PDBR,Period Buffer Register"
|
|
line.long 0x24 "DTBR,Dead Time Buffer Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "DTBR,Dead Time Buffer Register"
|
|
line.long 0x28 "TBRO,Trigger Buffer Register O"
|
|
hexmask.long.word 0x28 0.--15. 1. "TBRO,Trigger Buffer Register O"
|
|
line.long 0x2C "IOMSR,I and O Manual Setting Register"
|
|
bitfld.long 0x2C 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
bitfld.long 0x2C 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
newline
|
|
bitfld.long 0x2C 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
|
|
bitfld.long 0x2C 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0x30 "IOMSBR,I and O Manual Setting Buffer Register"
|
|
bitfld.long 0x30 5. "MENB,Manual Setting Enable B" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
bitfld.long 0x30 4. "MENA,Manual Setting Enable A" "0: Manual Setting Disable,1: Manual Setting Enable"
|
|
newline
|
|
bitfld.long 0x30 1. "MLVB,Manual Setting Output Level B" "0: Set to Low,1: Set to High"
|
|
bitfld.long 0x30 0. "MLVA,Manual Setting Output Level A" "0: Set to Low,1: Set to High"
|
|
tree.end
|
|
tree.end
|
|
tree "MFTR (Multi-Function Timer R Unit)"
|
|
base ad:0x0
|
|
tree "MFTR0"
|
|
base ad:0x40000620
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "CSR,Counter Setting Register"
|
|
bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
|
|
bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Phase Count"
|
|
newline
|
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bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
|
|
bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
|
|
line.long 0x4 "IOCR,I and O Control Register"
|
|
bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
|
|
bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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|
newline
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bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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|
bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
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|
newline
|
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bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
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|
bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
|
|
newline
|
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bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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|
bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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|
newline
|
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bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
|
|
bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
|
|
line.long 0x8 "PACR,Port F and F A Control Register"
|
|
bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
newline
|
|
bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
newline
|
|
bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0xC "PBCR,Port F and F B Control Register"
|
|
bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
|
|
line.long 0x10 "CCSR,Count Condition Setting Regsiter"
|
|
bitfld.long 0x10 6.--7. "CCIB,Count Condition Input B" "0: Input Disable,1: Input A is Phase Input,2: Input B is Phase Input,3: No Function 3"
|
|
bitfld.long 0x10 4.--5. "CCIA,Count Condition Input A" "0: Input Disable,1: Input A is Phase Input,2: Input B is Phase Input,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--3. 1. "CCM,Count Condition Mode"
|
|
line.long 0x14 "BOSR,Buffer Operation Setting Register"
|
|
bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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|
newline
|
|
bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
line.long 0x18 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
|
|
bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
|
|
newline
|
|
bitfld.long 0x18 6. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
bitfld.long 0x18 4. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
newline
|
|
bitfld.long 0x18 2. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
bitfld.long 0x18 0. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
line.long 0x1C "TER,Trigger Enable Register"
|
|
bitfld.long 0x1C 6. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable"
|
|
bitfld.long 0x1C 4. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable"
|
|
newline
|
|
bitfld.long 0x1C 2. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable"
|
|
bitfld.long 0x1C 0. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "COSR,Counter Operation Status Register"
|
|
bitfld.long 0x0 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
|
|
group.long 0x24++0x1B
|
|
line.long 0x0 "CNT,Counter"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
|
|
line.long 0x4 "GRA,General Register A"
|
|
hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
|
|
line.long 0x8 "GRB,General Register B"
|
|
hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
|
|
line.long 0xC "PDR,Period Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
|
|
line.long 0x10 "BRA,Buffer Register A"
|
|
hexmask.long.word 0x10 0.--15. 1. "BRA,Buffer Register A"
|
|
line.long 0x14 "BRB,Buffer Register B"
|
|
hexmask.long.word 0x14 0.--15. 1. "BRB,Buffer Register B"
|
|
line.long 0x18 "PDBR,Period Buffer Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "PDBR,Period Buffer Register"
|
|
tree.end
|
|
tree "MFTR1"
|
|
base ad:0x40000660
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "CSR,Counter Setting Register"
|
|
bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
|
|
bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Phase Count"
|
|
newline
|
|
bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
|
|
bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
|
|
line.long 0x4 "IOCR,I and O Control Register"
|
|
bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
|
|
bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
newline
|
|
bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
|
|
bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
|
|
newline
|
|
bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
|
|
bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
|
|
newline
|
|
bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
|
|
bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
|
|
line.long 0x8 "PACR,Port F and F A Control Register"
|
|
bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0xC "PBCR,Port F and F B Control Register"
|
|
bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
|
|
line.long 0x10 "CCSR,Count Condition Setting Regsiter"
|
|
bitfld.long 0x10 6.--7. "CCIB,Count Condition Input B" "0: Input Disable,1: Input A is Phase Input,2: Input B is Phase Input,3: No Function 3"
|
|
bitfld.long 0x10 4.--5. "CCIA,Count Condition Input A" "0: Input Disable,1: Input A is Phase Input,2: Input B is Phase Input,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--3. 1. "CCM,Count Condition Mode"
|
|
line.long 0x14 "BOSR,Buffer Operation Setting Register"
|
|
bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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|
newline
|
|
bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
line.long 0x18 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
|
|
bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
|
|
newline
|
|
bitfld.long 0x18 6. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
bitfld.long 0x18 4. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
newline
|
|
bitfld.long 0x18 2. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
bitfld.long 0x18 0. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
line.long 0x1C "TER,Trigger Enable Register"
|
|
bitfld.long 0x1C 6. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable"
|
|
bitfld.long 0x1C 4. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable"
|
|
newline
|
|
bitfld.long 0x1C 2. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable"
|
|
bitfld.long 0x1C 0. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "COSR,Counter Operation Status Register"
|
|
bitfld.long 0x0 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
|
|
group.long 0x24++0x1B
|
|
line.long 0x0 "CNT,Counter"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
|
|
line.long 0x4 "GRA,General Register A"
|
|
hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
|
|
line.long 0x8 "GRB,General Register B"
|
|
hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
|
|
line.long 0xC "PDR,Period Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
|
|
line.long 0x10 "BRA,Buffer Register A"
|
|
hexmask.long.word 0x10 0.--15. 1. "BRA,Buffer Register A"
|
|
line.long 0x14 "BRB,Buffer Register B"
|
|
hexmask.long.word 0x14 0.--15. 1. "BRB,Buffer Register B"
|
|
line.long 0x18 "PDBR,Period Buffer Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "PDBR,Period Buffer Register"
|
|
tree.end
|
|
tree "MFTR2"
|
|
base ad:0x400006A0
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "CSR,Counter Setting Register"
|
|
bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
|
|
bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Phase Count"
|
|
newline
|
|
bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
|
|
bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
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|
newline
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hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
|
|
line.long 0x4 "IOCR,I and O Control Register"
|
|
bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
|
|
bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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|
newline
|
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bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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|
bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
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|
newline
|
|
bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
|
|
bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
|
|
newline
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bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
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|
bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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|
newline
|
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bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
|
|
bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
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|
line.long 0x8 "PACR,Port F and F A Control Register"
|
|
bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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newline
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bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
newline
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|
bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
newline
|
|
bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0xC "PBCR,Port F and F B Control Register"
|
|
bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
newline
|
|
bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
newline
|
|
bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
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|
line.long 0x10 "CCSR,Count Condition Setting Regsiter"
|
|
bitfld.long 0x10 6.--7. "CCIB,Count Condition Input B" "0: Input Disable,1: Input A is Phase Input,2: Input B is Phase Input,3: No Function 3"
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|
bitfld.long 0x10 4.--5. "CCIA,Count Condition Input A" "0: Input Disable,1: Input A is Phase Input,2: Input B is Phase Input,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--3. 1. "CCM,Count Condition Mode"
|
|
line.long 0x14 "BOSR,Buffer Operation Setting Register"
|
|
bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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|
bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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|
newline
|
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bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
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|
line.long 0x18 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
|
|
bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
|
|
newline
|
|
bitfld.long 0x18 6. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
bitfld.long 0x18 4. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
newline
|
|
bitfld.long 0x18 2. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
bitfld.long 0x18 0. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
line.long 0x1C "TER,Trigger Enable Register"
|
|
bitfld.long 0x1C 6. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable"
|
|
bitfld.long 0x1C 4. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable"
|
|
newline
|
|
bitfld.long 0x1C 2. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable"
|
|
bitfld.long 0x1C 0. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "COSR,Counter Operation Status Register"
|
|
bitfld.long 0x0 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
|
|
group.long 0x24++0x1B
|
|
line.long 0x0 "CNT,Counter"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
|
|
line.long 0x4 "GRA,General Register A"
|
|
hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
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|
line.long 0x8 "GRB,General Register B"
|
|
hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
|
|
line.long 0xC "PDR,Period Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
|
|
line.long 0x10 "BRA,Buffer Register A"
|
|
hexmask.long.word 0x10 0.--15. 1. "BRA,Buffer Register A"
|
|
line.long 0x14 "BRB,Buffer Register B"
|
|
hexmask.long.word 0x14 0.--15. 1. "BRB,Buffer Register B"
|
|
line.long 0x18 "PDBR,Period Buffer Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "PDBR,Period Buffer Register"
|
|
tree.end
|
|
tree "MFTR3"
|
|
base ad:0x400006E0
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "CSR,Counter Setting Register"
|
|
bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
|
|
bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Phase Count"
|
|
newline
|
|
bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
|
|
bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
|
|
line.long 0x4 "IOCR,I and O Control Register"
|
|
bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
|
|
bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
newline
|
|
bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
|
|
bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
|
|
newline
|
|
bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
|
|
bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
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|
newline
|
|
bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
|
|
bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
|
|
line.long 0x8 "PACR,Port F and F A Control Register"
|
|
bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
newline
|
|
bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
newline
|
|
bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0xC "PBCR,Port F and F B Control Register"
|
|
bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
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|
newline
|
|
bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
|
|
line.long 0x10 "CCSR,Count Condition Setting Regsiter"
|
|
bitfld.long 0x10 6.--7. "CCIB,Count Condition Input B" "0: Input Disable,1: Input A is Phase Input,2: Input B is Phase Input,3: No Function 3"
|
|
bitfld.long 0x10 4.--5. "CCIA,Count Condition Input A" "0: Input Disable,1: Input A is Phase Input,2: Input B is Phase Input,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--3. 1. "CCM,Count Condition Mode"
|
|
line.long 0x14 "BOSR,Buffer Operation Setting Register"
|
|
bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
newline
|
|
bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
line.long 0x18 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
|
|
bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
|
|
newline
|
|
bitfld.long 0x18 6. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
bitfld.long 0x18 4. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
newline
|
|
bitfld.long 0x18 2. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
bitfld.long 0x18 0. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
line.long 0x1C "TER,Trigger Enable Register"
|
|
bitfld.long 0x1C 6. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable"
|
|
bitfld.long 0x1C 4. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable"
|
|
newline
|
|
bitfld.long 0x1C 2. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable"
|
|
bitfld.long 0x1C 0. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "COSR,Counter Operation Status Register"
|
|
bitfld.long 0x0 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
|
|
group.long 0x24++0x1B
|
|
line.long 0x0 "CNT,Counter"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
|
|
line.long 0x4 "GRA,General Register A"
|
|
hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
|
|
line.long 0x8 "GRB,General Register B"
|
|
hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
|
|
line.long 0xC "PDR,Period Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
|
|
line.long 0x10 "BRA,Buffer Register A"
|
|
hexmask.long.word 0x10 0.--15. 1. "BRA,Buffer Register A"
|
|
line.long 0x14 "BRB,Buffer Register B"
|
|
hexmask.long.word 0x14 0.--15. 1. "BRB,Buffer Register B"
|
|
line.long 0x18 "PDBR,Period Buffer Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "PDBR,Period Buffer Register"
|
|
tree.end
|
|
tree "MFTR4"
|
|
base ad:0x40000720
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "CSR,Counter Setting Register"
|
|
bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
|
|
bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Phase Count"
|
|
newline
|
|
bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
|
|
bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
|
|
line.long 0x4 "IOCR,I and O Control Register"
|
|
bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
|
|
bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
newline
|
|
bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
|
|
bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
|
|
newline
|
|
bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
|
|
bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
|
|
newline
|
|
bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
|
|
bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
|
|
line.long 0x8 "PACR,Port F and F A Control Register"
|
|
bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0xC "PBCR,Port F and F B Control Register"
|
|
bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
|
|
line.long 0x10 "CCSR,Count Condition Setting Regsiter"
|
|
bitfld.long 0x10 6.--7. "CCIB,Count Condition Input B" "0: Input Disable,1: Input A is Phase Input,2: Input B is Phase Input,3: No Function 3"
|
|
bitfld.long 0x10 4.--5. "CCIA,Count Condition Input A" "0: Input Disable,1: Input A is Phase Input,2: Input B is Phase Input,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--3. 1. "CCM,Count Condition Mode"
|
|
line.long 0x14 "BOSR,Buffer Operation Setting Register"
|
|
bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
newline
|
|
bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
line.long 0x18 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
|
|
bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
|
|
newline
|
|
bitfld.long 0x18 6. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
bitfld.long 0x18 4. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
newline
|
|
bitfld.long 0x18 2. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
bitfld.long 0x18 0. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
line.long 0x1C "TER,Trigger Enable Register"
|
|
bitfld.long 0x1C 6. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable"
|
|
bitfld.long 0x1C 4. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable"
|
|
newline
|
|
bitfld.long 0x1C 2. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable"
|
|
bitfld.long 0x1C 0. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "COSR,Counter Operation Status Register"
|
|
bitfld.long 0x0 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
|
|
group.long 0x24++0x1B
|
|
line.long 0x0 "CNT,Counter"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
|
|
line.long 0x4 "GRA,General Register A"
|
|
hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
|
|
line.long 0x8 "GRB,General Register B"
|
|
hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
|
|
line.long 0xC "PDR,Period Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
|
|
line.long 0x10 "BRA,Buffer Register A"
|
|
hexmask.long.word 0x10 0.--15. 1. "BRA,Buffer Register A"
|
|
line.long 0x14 "BRB,Buffer Register B"
|
|
hexmask.long.word 0x14 0.--15. 1. "BRB,Buffer Register B"
|
|
line.long 0x18 "PDBR,Period Buffer Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "PDBR,Period Buffer Register"
|
|
tree.end
|
|
tree "MFTRC"
|
|
base ad:0x40000600
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "SCR,Start Control Register"
|
|
bitfld.long 0x0 4. "CST4,Counter Start 4" "0: Counter Stop,1: Counter Start"
|
|
bitfld.long 0x0 3. "CST3,Counter Start 3" "0: Counter Stop,1: Counter Start"
|
|
bitfld.long 0x0 2. "CST2,Counter Start 2" "0: Counter Stop,1: Counter Start"
|
|
newline
|
|
bitfld.long 0x0 1. "CST1,Counter Start 1" "0: Counter Stop,1: Counter Start"
|
|
bitfld.long 0x0 0. "CST0,Counter Start 0" "0: Counter Stop,1: Counter Start"
|
|
line.long 0x4 "SASR,Synchronous Access Setting Register"
|
|
bitfld.long 0x4 4. "SYNCWE4,Synchronous Operation Write Enable 4" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
|
|
bitfld.long 0x4 3. "SYNCWE3,Synchronous Operation Write Enable 3" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
|
|
bitfld.long 0x4 2. "SYNCWE2,Synchronous Operation Write Enable 2" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
|
|
newline
|
|
bitfld.long 0x4 1. "SYNCWE1,Synchronous Operation Write Enable 1" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
|
|
bitfld.long 0x4 0. "SYNCWE0,Synchronous Operation Write Enable 0" "0: Synchronous Write Access Disable,1: Synchronous Write Access Enable"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "DOSR,Debug Output Select Register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "DOS1,Debug Output Select 1"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DOS0,Debug Output Select 0"
|
|
line.long 0x4 "DSSR,DMA Request Source Select Register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "DMASEL,DMA Source Select"
|
|
tree.end
|
|
tree "MFTRU"
|
|
base ad:0x40000620
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "CSR,Counter Setting Register"
|
|
bitfld.long 0x0 10.--11. "NFCS,Noise Filter Clock Select" "0: Divider 1,1: Divider 8,2: Divider 32,3: Divider 64"
|
|
bitfld.long 0x0 8.--9. "MD,Mode Select" "0: Saw-tooth Count (Up-count),1: Saw-tooth Count (Down-count),2: Triangular Count (from Up-count),3: Phase Count"
|
|
newline
|
|
bitfld.long 0x0 7. "CACLR,Counter Auto-Clear" "0: Auto-clear Disable,1: Auto-clear Enable"
|
|
bitfld.long 0x0 5.--6. "CEDGE,Clock Edge Select" "0: Rising edge Detection,1: Falling edge Detection,2: Both edge Detection,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "PSC,Pre-scaler Select"
|
|
line.long 0x4 "IOCR,I and O Control Register"
|
|
bitfld.long 0x4 15. "NFENB,Noise Filter Enable B" "0: Input B Noise Filter Disable,1: Input B Noise Filter Enable"
|
|
bitfld.long 0x4 13.--14. "ICTSB,Input Capture Type Select B" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
newline
|
|
bitfld.long 0x4 11.--12. "IOHALTB,IO State under the HALT State B" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
|
|
bitfld.long 0x4 9. "MSTOEB,Master Output Enable B" "0: Input Enable,1: Output Enable"
|
|
newline
|
|
bitfld.long 0x4 8. "IOCTSB,IO Controller Type Select B" "0: Output and Compare Match,1: Input and Input Capture"
|
|
bitfld.long 0x4 7. "NFENA,Noise Filter Enable A" "0: Input A Noise Filter Disable,1: Input A Noise Filter Enable"
|
|
newline
|
|
bitfld.long 0x4 5.--6. "ICTSA,Input Capture Type Select A" "0: Capture Disable,1: Capture at Rising edge,2: Capture at Falling edge,3: Capture at Both edge"
|
|
bitfld.long 0x4 3.--4. "IOHALTA,IO State under the HALT State A" "0: Ignore HALT State,1: Set Input under HALT State,2: Set Output Low under HALT State,3: Set Output High under HALT State"
|
|
newline
|
|
bitfld.long 0x4 1. "MSTOEA,Master Output Enable A" "0: Input Enable,1: Output Enable"
|
|
bitfld.long 0x4 0. "IOCTSA,IO Controller Type Select A" "0: Output and Compare Match,1: Input and Input Capture"
|
|
line.long 0x8 "PACR,Port F and F A Control Register"
|
|
bitfld.long 0x8 12.--13. "PFASBD,Port F and F A Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 10.--11. "PFASBU,Port F and F A Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 8.--9. "PFASAD,Port F and F A Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 6.--7. "PFASAU,Port F and F A Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "PFASU,Port F and F A Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x8 2.--3. "PFASV,Port F and F A Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x8 1. "STOPLVA,Stop state Output Level A" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0x8 0. "INITLVA,Initial Output Level A" "0: Set to Low,1: Set to High"
|
|
line.long 0xC "PBCR,Port F and F B Control Register"
|
|
bitfld.long 0xC 12.--13. "PFBSBD,Port F and F B Setting by Compare Match B in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 10.--11. "PFBSBU,Port F and F B Setting by Compare Match B in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 8.--9. "PFBSAD,Port F and F B Setting by Compare Match A in Down-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 6.--7. "PFBSAU,Port F and F B Setting by Compare Match A in Up-count" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PFBSU,Port F and F B Setting by Underflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0xC 2.--3. "PFBSV,Port F and F B Setting by Overflow" "0: Source Disable,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0xC 1. "STOPLVB,Stop state Output Level B" "0: Set to Last state,1: Set to Initial state"
|
|
bitfld.long 0xC 0. "INITLVB,Initial Output Level B" "0: Set to Low,1: Set to High"
|
|
line.long 0x10 "CCSR,Count Condition Setting Regsiter"
|
|
bitfld.long 0x10 6.--7. "CCIB,Count Condition Input B" "0: Input Disable,1: Input A is Phase Input,2: Input B is Phase Input,3: No Function 3"
|
|
bitfld.long 0x10 4.--5. "CCIA,Count Condition Input A" "0: Input Disable,1: Input A is Phase Input,2: Input B is Phase Input,3: No Function 3"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--3. 1. "CCM,Count Condition Mode"
|
|
line.long 0x14 "BOSR,Buffer Operation Setting Register"
|
|
bitfld.long 0x14 4.--5. "BFOP,Buffer Write Operation Select P" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
bitfld.long 0x14 2.--3. "BFOB,Buffer Write Operation Select B" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
newline
|
|
bitfld.long 0x14 0.--1. "BFOA,Buffer Write Operation Select A" "0: Disable Buffer Operation,1: Copy by Counter Overflow Trigger,2: Copy by Counter Underflow Trigger,3: Copy by Counter Overflow or Underflow Trigger"
|
|
line.long 0x18 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x18 15. "IRQDLKEN,Interrupt Request Direction Link Enable" "0: Direction Link Disable,1: Direction Link Enable"
|
|
bitfld.long 0x18 14. "IRQDLKS,Interrupt Request Direction Link Select" "0: Direction Link with Down Count,1: Direction Link with Up Count"
|
|
newline
|
|
bitfld.long 0x18 6. "IRQENU,Interrupt Request Enable U" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
bitfld.long 0x18 4. "IRQENV,Interrupt Request Enable V" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
newline
|
|
bitfld.long 0x18 2. "IRQENB,Interrupt Request Enable B" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
bitfld.long 0x18 0. "IRQENA,Interrupt Request Enable A" "0: Interrupt Request Disable,1: Interrupt Request Enable"
|
|
line.long 0x1C "TER,Trigger Enable Register"
|
|
bitfld.long 0x1C 6. "TRGENU,Trigger Enable U" "0: Trigger Disable,1: Trigger Enable"
|
|
bitfld.long 0x1C 4. "TRGENV,Trigger Enable V" "0: Trigger Disable,1: Trigger Enable"
|
|
newline
|
|
bitfld.long 0x1C 2. "TRGENB,Trigger Enable B" "0: Trigger Disable,1: Trigger Enable"
|
|
bitfld.long 0x1C 0. "TRGENA,Trigger Enable A" "0: Trigger Disable,1: Trigger Enable"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "COSR,Counter Operation Status Register"
|
|
bitfld.long 0x0 0. "CDIR,Count Direction" "0: Down-count,1: Up-count"
|
|
group.long 0x24++0x1B
|
|
line.long 0x0 "CNT,Counter"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter"
|
|
line.long 0x4 "GRA,General Register A"
|
|
hexmask.long.word 0x4 0.--15. 1. "GRA,General Register A"
|
|
line.long 0x8 "GRB,General Register B"
|
|
hexmask.long.word 0x8 0.--15. 1. "GRB,General Register B"
|
|
line.long 0xC "PDR,Period Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "PDR,Period Register"
|
|
line.long 0x10 "BRA,Buffer Register A"
|
|
hexmask.long.word 0x10 0.--15. 1. "BRA,Buffer Register A"
|
|
line.long 0x14 "BRB,Buffer Register B"
|
|
hexmask.long.word 0x14 0.--15. 1. "BRB,Buffer Register B"
|
|
line.long 0x18 "PDBR,Period Buffer Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "PDBR,Period Buffer Register"
|
|
tree.end
|
|
tree.end
|
|
tree "PMU (System Power Management Controller)"
|
|
base ad:0x40041200
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "PMRM,Address Re-map Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "REMAP,Re-map"
|
|
line.long 0x4 "PMCR,PMU Control Register"
|
|
bitfld.long 0x4 30.--31. "PML12,Select power down mode for LDO1P2 during STOP mode" "0: No power down,1: OCP off,?,3: OCP off and Minimum Power"
|
|
bitfld.long 0x4 0. "STOPDIS,STOP mode disable" "0: STOP mode permitted,1: STOP mode forbidden"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "PMSR,PMU Status Register"
|
|
bitfld.long 0x0 0.--1. "PMUSTS,PMU Status" "0,1,2,3"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "PHCR,Peripheral's Halt mode Control Register"
|
|
bitfld.long 0x0 13. "PFE_MFTP,Enable the pause function of the MFTP" "0,1"
|
|
bitfld.long 0x0 12. "PFE_MFTR,Enable the pause function of the MFTR" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "PFE_TMS2,Enable the pause function of the TMS2"
|
|
hexmask.long.byte 0x0 4.--7. 1. "PFE_TMS1,Enable the pause function of the TMS1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PFE_TMS0,Enable the pause function of the TMS0"
|
|
group.long 0xFC++0x3
|
|
line.long 0x0 "CID,Chip ID Register"
|
|
hexmask.long 0x0 0.--31. 1. "CID,Chip ID"
|
|
tree.end
|
|
tree "RCU (System Reset Controller)"
|
|
base ad:0x40041500
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "SRR,System and Peripherals Reset Register"
|
|
bitfld.long 0x0 31. "IOC,IOC Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 30. "DNF,DNF Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 29. "DMA,DMA Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 28. "GPIO,GPIO Reset" "0: Reset deassertion,1: Reset assertion"
|
|
newline
|
|
bitfld.long 0x0 27. "MFTP,MFTP Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 25. "UART4,UART4 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 24. "UART3,UART3 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 23. "UART2,UART2 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
newline
|
|
bitfld.long 0x0 22. "UART1,UART1 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 21. "UART0,UART0 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 20. "SPI1,SPI1 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 19. "SPI0,SPI0 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
newline
|
|
bitfld.long 0x0 18. "I2CS1,I2CS1 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 17. "I2CS0,I2CS0 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 16. "I2CM,I2CM Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 15. "TMS23,TMS23 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
newline
|
|
bitfld.long 0x0 14. "TMS22,TMS22 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 13. "TMS21,TMS21 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 12. "TMS20,TMS20 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 11. "TMS13,TMS13 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
newline
|
|
bitfld.long 0x0 10. "TMS12,TMS12 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 9. "TMS11,TMS11 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 8. "TMS10,TMS10 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 7. "TMS03,TMS03 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
newline
|
|
bitfld.long 0x0 6. "TMS02,TMS02 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 5. "TMS01,TMS01 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 4. "TMS00,TMS00 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 3. "MFTR,MFTR Reset" "0: Reset deassertion,1: Reset assertion"
|
|
newline
|
|
bitfld.long 0x0 2. "CMC,CMC Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 1. "IWDT,IWDT Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x0 0. "WDT,WDT Reset" "0: Reset deassertion,1: Reset assertion"
|
|
line.long 0x4 "SRR2,System and Peripherals Reset Register 2"
|
|
bitfld.long 0x4 31. "SYSTEM,SYSTEM Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x4 30. "CORE,Core (CM4. Bus) Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x4 29. "MEMC,Reset All Memory Controller" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x4 28. "PERI,Reset All Peripherals" "0: Reset deassertion,1: Reset assertion"
|
|
newline
|
|
bitfld.long 0x4 6. "FPI,FPI Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x4 4. "GPR,GPR Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x4 3. "DACCTRL1,DACCTRL1 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x4 2. "DACCTRL0,DACCTRL0 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
newline
|
|
bitfld.long 0x4 1. "ADCCTRL1,ADCCTRL1 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
bitfld.long 0x4 0. "ADCCTRL0,ADCCTRL0 Reset" "0: Reset deassertion,1: Reset assertion"
|
|
line.long 0x8 "RMR,Reset Mask Register"
|
|
bitfld.long 0x8 31. "IOC,IOC Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 30. "DNF,DNF Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 29. "DMA,DMA Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 28. "GPIO,GPIO Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
newline
|
|
bitfld.long 0x8 27. "MFTP,MFTP Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 25. "UART4,UART4 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 24. "UART3,UART3 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 23. "UART2,UART2 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
newline
|
|
bitfld.long 0x8 22. "UART1,UART1 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 21. "UART0,UART0 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 20. "SPI1,SPI1 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 19. "SPI0,SPI0 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
newline
|
|
bitfld.long 0x8 18. "I2CS1,I2CS1 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 17. "I2CS0,I2CS0 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 16. "I2CM,I2CM Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 15. "TMS23,TMS23 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
newline
|
|
bitfld.long 0x8 14. "TMS22,TMS22 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 13. "TMS21,TMS21 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 12. "TMS20,TMS20 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 11. "TMS13,TMS13 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
newline
|
|
bitfld.long 0x8 10. "TMS12,TMS12 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 9. "TMS11,TMS11 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 8. "TMS10,TMS10 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 7. "TMS03,TMS03 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
newline
|
|
bitfld.long 0x8 6. "TMS02,TMS02 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 5. "TMS01,TMS01 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 4. "TMS00,TMS00 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 3. "MFTR,MFTR Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
newline
|
|
bitfld.long 0x8 2. "CMC,CMC Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 1. "IWDT,IWDT Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0x8 0. "WDT,WDT Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
line.long 0xC "RMR2,Reset Mask Register 2"
|
|
bitfld.long 0xC 30. "CORE,Core Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0xC 29. "MEMC,Reset Mask for All Memory Controllers" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0xC 28. "PERI,Reset Mask for All Peripherals" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0xC 6. "FPI,FPI Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
newline
|
|
bitfld.long 0xC 4. "GPR,GPR Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0xC 3. "DACCTRL1,DACCTRL1 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0xC 2. "DACCTRL0,DACCTRL0 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
bitfld.long 0xC 1. "ADCCTRL1,ADCCTRL1 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
newline
|
|
bitfld.long 0xC 0. "ADCCTRL0,ADCCTRL0 Reset Mask" "0: Non-mask Reset,1: Mask Reset"
|
|
line.long 0x10 "RKR,Reset Key Register"
|
|
hexmask.long 0x10 0.--31. 1. "KEY,Key for updating SRR and SRR2"
|
|
line.long 0x14 "ARC,Auxiliary Reset Control Register"
|
|
bitfld.long 0x14 2. "LVDIS,Enable System Reset by LVD" "0: Disable Reset by LVD,1: Enable Reset by LVD"
|
|
bitfld.long 0x14 1. "RFDIS,Disable RESETn filter (to bypass)" "0: Enable Reset Filter,1: Disable Reset Filter"
|
|
bitfld.long 0x14 0. "LURST,Enable Reset for Lock-up" "0: Disable System Reset by Lock-up occur,1: Enable System Reset by Lock-up"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "RIR,Reset Information Register"
|
|
bitfld.long 0x0 7. "LVD,System Reset Occurs by LVD" "0,1"
|
|
bitfld.long 0x0 6. "CMC,System Reset Occurs by CMC" "0,1"
|
|
bitfld.long 0x0 5. "WDT,System Reset Occurs by WDT" "0,1"
|
|
bitfld.long 0x0 4. "PIN,System Reset Occurs by RESETn" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "LOCKUP,System Reset Occurs by CM4 Lock-up" "0,1"
|
|
bitfld.long 0x0 2. "IWDT,System Reset Occurs by IWDT" "0,1"
|
|
bitfld.long 0x0 1. "SYSRST,System Reset Occurs by CM4 (SYSRSTREQ)" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,System Reset Occurs by SW (SRR)" "0,1"
|
|
tree.end
|
|
tree "SPI (Serial Peripheral Interface)"
|
|
base ad:0x0
|
|
tree "SPI0"
|
|
base ad:0x40003000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR0,Control Register 0"
|
|
hexmask.long.byte 0x0 8.--15. 1. "SCR,Serial Clock Rate"
|
|
bitfld.long 0x0 7. "SPH,SPICLKOUT Phase" "0,1"
|
|
bitfld.long 0x0 6. "SPO,SPICLKOUT Polarity" "0,1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DSS,Data Size Select"
|
|
line.long 0x4 "CR1,Control Register 1"
|
|
bitfld.long 0x4 5. "MODE,SPI 4-wire and 3-wire mode select" "0,1"
|
|
bitfld.long 0x4 4. "FTEN,Fixed TX output enable" "0,1"
|
|
bitfld.long 0x4 3. "SOD,Slave-mode Output Disable" "0,1"
|
|
bitfld.long 0x4 2. "MS,Master or Slave mode select" "0,1"
|
|
bitfld.long 0x4 1. "SSE,Synchronous Serial port Enable" "0,1"
|
|
bitfld.long 0x4 0. "LBM,Loop Back Mode" "0,1"
|
|
line.long 0x8 "DR,Data Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DATA,TX and RX FIFO Data"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
hexmask.long.byte 0x0 12.--15. 1. "RXFFILEVEL,Receive FIFO Level Select"
|
|
hexmask.long.byte 0x0 8.--11. 1. "TXFFILEVEL,Transmit FIFO Level Select"
|
|
bitfld.long 0x0 4. "BSY,Busy flag" "0,1"
|
|
bitfld.long 0x0 3. "RFF,Receive FIFO Full" "0,1"
|
|
bitfld.long 0x0 2. "RNE,Receive FIFO Not Empty" "0,1"
|
|
bitfld.long 0x0 1. "TNF,Transmit FIFO Not Full" "0,1"
|
|
bitfld.long 0x0 0. "TFE,Transmit FIFO Empty" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "CPSR,Clock Pre-Scale Register"
|
|
hexmask.long.byte 0x0 1.--7. 1. "CPSR,Clock Pre-Scale Divisor"
|
|
line.long 0x4 "IMSC,Interrupt Mask Set or Clear Register"
|
|
bitfld.long 0x4 4. "NEIM,Not empty interrupt Mask" "0,1"
|
|
bitfld.long 0x4 3. "TXIM,Transmit FIFO Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 2. "RXIM,Receive FIFO Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 1. "RTIM,Receive Timeout Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 0. "RORIM,Receive Overrun Interrupt Mask" "0,1"
|
|
rgroup.long 0x18++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 4. "NERIS,Not empty Raw interrupt Status" "0,1"
|
|
bitfld.long 0x0 3. "TXRIS,Transmit FIFO Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x0 2. "RXRIS,Receive FIFO Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x0 1. "RTRIS,Receive Timeout Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x0 0. "RORRIS,Receive Overrun Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 4. "NEMIS,Not empty Masked interrupt Status" "0,1"
|
|
bitfld.long 0x4 3. "TXMIS,Transmit FIFO Masked Interrupt Status" "0,1"
|
|
bitfld.long 0x4 2. "RXMIS,Receive FIFO Masked Interrupt Status" "0,1"
|
|
bitfld.long 0x4 1. "RTMIS,Receive Timeout Masked Interrupt Status" "0,1"
|
|
bitfld.long 0x4 0. "RORMIS,Receive Overrun Masked Interrupt Status" "0,1"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x0 1. "RTIC,Receive Timeout Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 0. "RORIC,Receive Overrun Interrupt Clear" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "DMACR,DMA Control Register"
|
|
bitfld.long 0x0 3. "TXSRMSK,Tx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 2. "RXSRMSK,Rx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 1. "TXDMAE,Transmit DMA Enable" "0,1"
|
|
bitfld.long 0x0 0. "RXDMAE,Receive DMA Enable" "0,1"
|
|
line.long 0x4 "FIFOCR,FIFO Control Register"
|
|
bitfld.long 0x4 13. "SPIRFRSTn,SPI Rx FIFO Reset" "0,1"
|
|
bitfld.long 0x4 12. "SPIRFEN,SPI Rx FIFO Enable" "0,1"
|
|
bitfld.long 0x4 8.--10. "SPIRFLIMIT,SPI Rx FIFO Limit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 5. "SPITFRSTn,SPI Tx FIFO Reset" "0,1"
|
|
bitfld.long 0x4 4. "SPITFEN,SPI Tx FIFO Enable" "0,1"
|
|
bitfld.long 0x4 0.--2. "SPITFLIMIT,SPI Tx FIFO Limit" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "SPI1"
|
|
base ad:0x40004000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR0,Control Register 0"
|
|
hexmask.long.byte 0x0 8.--15. 1. "SCR,Serial Clock Rate"
|
|
bitfld.long 0x0 7. "SPH,SPICLKOUT Phase" "0,1"
|
|
bitfld.long 0x0 6. "SPO,SPICLKOUT Polarity" "0,1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DSS,Data Size Select"
|
|
line.long 0x4 "CR1,Control Register 1"
|
|
bitfld.long 0x4 5. "MODE,SPI 4-wire and 3-wire mode select" "0,1"
|
|
bitfld.long 0x4 4. "FTEN,Fixed TX output enable" "0,1"
|
|
bitfld.long 0x4 3. "SOD,Slave-mode Output Disable" "0,1"
|
|
bitfld.long 0x4 2. "MS,Master or Slave mode select" "0,1"
|
|
bitfld.long 0x4 1. "SSE,Synchronous Serial port Enable" "0,1"
|
|
bitfld.long 0x4 0. "LBM,Loop Back Mode" "0,1"
|
|
line.long 0x8 "DR,Data Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DATA,TX and RX FIFO Data"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
hexmask.long.byte 0x0 12.--15. 1. "RXFFILEVEL,Receive FIFO Level Select"
|
|
hexmask.long.byte 0x0 8.--11. 1. "TXFFILEVEL,Transmit FIFO Level Select"
|
|
bitfld.long 0x0 4. "BSY,Busy flag" "0,1"
|
|
bitfld.long 0x0 3. "RFF,Receive FIFO Full" "0,1"
|
|
bitfld.long 0x0 2. "RNE,Receive FIFO Not Empty" "0,1"
|
|
bitfld.long 0x0 1. "TNF,Transmit FIFO Not Full" "0,1"
|
|
bitfld.long 0x0 0. "TFE,Transmit FIFO Empty" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "CPSR,Clock Pre-Scale Register"
|
|
hexmask.long.byte 0x0 1.--7. 1. "CPSR,Clock Pre-Scale Divisor"
|
|
line.long 0x4 "IMSC,Interrupt Mask Set or Clear Register"
|
|
bitfld.long 0x4 4. "NEIM,Not empty interrupt Mask" "0,1"
|
|
bitfld.long 0x4 3. "TXIM,Transmit FIFO Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 2. "RXIM,Receive FIFO Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 1. "RTIM,Receive Timeout Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 0. "RORIM,Receive Overrun Interrupt Mask" "0,1"
|
|
rgroup.long 0x18++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 4. "NERIS,Not empty Raw interrupt Status" "0,1"
|
|
bitfld.long 0x0 3. "TXRIS,Transmit FIFO Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x0 2. "RXRIS,Receive FIFO Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x0 1. "RTRIS,Receive Timeout Raw Interrupt Status" "0,1"
|
|
bitfld.long 0x0 0. "RORRIS,Receive Overrun Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 4. "NEMIS,Not empty Masked interrupt Status" "0,1"
|
|
bitfld.long 0x4 3. "TXMIS,Transmit FIFO Masked Interrupt Status" "0,1"
|
|
bitfld.long 0x4 2. "RXMIS,Receive FIFO Masked Interrupt Status" "0,1"
|
|
bitfld.long 0x4 1. "RTMIS,Receive Timeout Masked Interrupt Status" "0,1"
|
|
bitfld.long 0x4 0. "RORMIS,Receive Overrun Masked Interrupt Status" "0,1"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x0 1. "RTIC,Receive Timeout Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 0. "RORIC,Receive Overrun Interrupt Clear" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "DMACR,DMA Control Register"
|
|
bitfld.long 0x0 3. "TXSRMSK,Tx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 2. "RXSRMSK,Rx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 1. "TXDMAE,Transmit DMA Enable" "0,1"
|
|
bitfld.long 0x0 0. "RXDMAE,Receive DMA Enable" "0,1"
|
|
line.long 0x4 "FIFOCR,FIFO Control Register"
|
|
bitfld.long 0x4 13. "SPIRFRSTn,SPI Rx FIFO Reset" "0,1"
|
|
bitfld.long 0x4 12. "SPIRFEN,SPI Rx FIFO Enable" "0,1"
|
|
bitfld.long 0x4 8.--10. "SPIRFLIMIT,SPI Rx FIFO Limit" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 5. "SPITFRSTn,SPI Tx FIFO Reset" "0,1"
|
|
bitfld.long 0x4 4. "SPITFEN,SPI Tx FIFO Enable" "0,1"
|
|
bitfld.long 0x4 0.--2. "SPITFLIMIT,SPI Tx FIFO Limit" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree.end
|
|
tree "SRCTRL (SRAM Controller)"
|
|
base ad:0x0
|
|
tree "SRCTRL0"
|
|
base ad:0x40041D00
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "ACCR,Access Control Register"
|
|
bitfld.long 0x0 3. "SREPEN,SRAM Even Parity Enable" "0,1"
|
|
bitfld.long 0x0 2. "SRHDEN,SRAM HREADY Delay Enable" "0,1"
|
|
bitfld.long 0x0 1. "SRINIT_EN,SRAM initilize enable register" "0,1"
|
|
bitfld.long 0x0 0. "ECCEN,ECC enable control register" "0: ECC disable,1: ECC enable"
|
|
line.long 0x4 "IRCR,Interrupt Request Control Register"
|
|
bitfld.long 0x4 1. "EDIEN,Error Detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "ECIEN,ECC correct interrupt enable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "ECSR,ECC Status Register"
|
|
bitfld.long 0x0 3. "PESR,Parity Error Status Register" "0,1"
|
|
bitfld.long 0x0 2. "SRINIT_DONE,SRAM initilize done register" "0,1"
|
|
bitfld.long 0x0 1. "ECSR,ECC correct status register" "0,1"
|
|
bitfld.long 0x0 0. "EFSR,ECC fault status register" "0,1"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "ESCR,ECC Clear Register"
|
|
bitfld.long 0x0 3. "PESCR,Parity Error Status Clear Register" "0,1"
|
|
bitfld.long 0x0 1. "ECSCR,ECC correct status clear" "0,1"
|
|
bitfld.long 0x0 0. "EFSCR,ECC fault status clear" "0,1"
|
|
rgroup.long 0x10++0xF
|
|
line.long 0x0 "FEAR,First Event Address Register"
|
|
bitfld.long 0x0 31. "FECSR,First ECC correct Status Register" "0,1"
|
|
bitfld.long 0x0 30. "FEFSR,First ECC Fault Status Register" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "FEAR,First Event Address Register"
|
|
line.long 0x4 "EEAR,ECC Event Address Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "EEAR,ECC event address register"
|
|
line.long 0x8 "EEDR,ECC Event Data Register"
|
|
hexmask.long 0x8 0.--31. 1. "EEDR,ECC Event Data Register"
|
|
line.long 0xC "EEPR,ECC Event Parity Register"
|
|
hexmask.long.byte 0xC 0.--7. 1. "EEPR,ECC Event Parity Register"
|
|
tree.end
|
|
tree "SRCTRL1"
|
|
base ad:0x40041E00
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "ACCR,Access Control Register"
|
|
bitfld.long 0x0 3. "SREPEN,SRAM Even Parity Enable" "0,1"
|
|
bitfld.long 0x0 2. "SRHDEN,SRAM HREADY Delay Enable" "0,1"
|
|
bitfld.long 0x0 1. "SRINIT_EN,SRAM initilize enable register" "0,1"
|
|
bitfld.long 0x0 0. "ECCEN,ECC enable control register" "0: ECC disable,1: ECC enable"
|
|
line.long 0x4 "IRCR,Interrupt Request Control Register"
|
|
bitfld.long 0x4 1. "EDIEN,Error Detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "ECIEN,ECC correct interrupt enable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "ECSR,ECC Status Register"
|
|
bitfld.long 0x0 3. "PESR,Parity Error Status Register" "0,1"
|
|
bitfld.long 0x0 2. "SRINIT_DONE,SRAM initilize done register" "0,1"
|
|
bitfld.long 0x0 1. "ECSR,ECC correct status register" "0,1"
|
|
bitfld.long 0x0 0. "EFSR,ECC fault status register" "0,1"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "ESCR,ECC Clear Register"
|
|
bitfld.long 0x0 3. "PESCR,Parity Error Status Clear Register" "0,1"
|
|
bitfld.long 0x0 1. "ECSCR,ECC correct status clear" "0,1"
|
|
bitfld.long 0x0 0. "EFSCR,ECC fault status clear" "0,1"
|
|
rgroup.long 0x10++0xF
|
|
line.long 0x0 "FEAR,First Event Address Register"
|
|
bitfld.long 0x0 31. "FECSR,First ECC correct Status Register" "0,1"
|
|
bitfld.long 0x0 30. "FEFSR,First ECC Fault Status Register" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "FEAR,First Event Address Register"
|
|
line.long 0x4 "EEAR,ECC Event Address Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "EEAR,ECC event address register"
|
|
line.long 0x8 "EEDR,ECC Event Data Register"
|
|
hexmask.long 0x8 0.--31. 1. "EEDR,ECC Event Data Register"
|
|
line.long 0xC "EEPR,ECC Event Parity Register"
|
|
hexmask.long.byte 0xC 0.--7. 1. "EEPR,ECC Event Parity Register"
|
|
tree.end
|
|
tree.end
|
|
tree "TMS (Simple Timers)"
|
|
base ad:0x0
|
|
tree "TMS00"
|
|
base ad:0x40000800
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LOAD,Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "LOAD,Counter Load Value"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "VALUE,Current Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Counter Current Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CONTROL,Control Register"
|
|
bitfld.long 0x0 21. "PWMMODE,PWM Mode Enable" "0: PWM Mode Disable,1: PWM Mode Enable"
|
|
bitfld.long 0x0 20. "RVAL,PWM Output Reset Value Select" "0: PWM Output Reset Value 'LOW',1: PWM Output Reset Value 'HIGH'"
|
|
bitfld.long 0x0 18.--19. "OSZ,PWM Output Select at Zero" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "OSC,PWM Output Select at Compare Match" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x0 8. "TIMCLKEN,Timer Clock Enable" "0: Timer Clock Disable,1: Timer Clock Enable"
|
|
bitfld.long 0x0 7. "TIMEREN,Timer Enable" "0: Timer Disable,1: Timer Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "TIMERMODE,Operation Mode Select" "0: Free-Running Mode Operation,1: Periodic Mode Operation"
|
|
bitfld.long 0x0 5. "INTENABLE,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
bitfld.long 0x0 2.--3. "TIMERPRE,Clock Divide Ratio Select" "0: Divided by 1,1: Divided by 16,2: Divided by 256,?"
|
|
newline
|
|
bitfld.long 0x0 1. "TIMERSIZE,Counter Size Select" "0: 16bits Counter Operation,1: 32bits Counter Operation"
|
|
bitfld.long 0x0 0. "ONESHOT,One-Shot Mode Enable" "0: Wrapping Mode Operation,1: One-Shot Mode Operation"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "INTCLR,Interrupt Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "INTCLR,Interrupt Clear"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 0. "RIS,Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 0. "MIS,Masked Interrupt Status" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BGLOAD,Background Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "BGLOAD,Background Load Value"
|
|
tree.end
|
|
tree "TMS01"
|
|
base ad:0x40000820
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LOAD,Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "LOAD,Counter Load Value"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "VALUE,Current Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Counter Current Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CONTROL,Control Register"
|
|
bitfld.long 0x0 21. "PWMMODE,PWM Mode Enable" "0: PWM Mode Disable,1: PWM Mode Enable"
|
|
bitfld.long 0x0 20. "RVAL,PWM Output Reset Value Select" "0: PWM Output Reset Value 'LOW',1: PWM Output Reset Value 'HIGH'"
|
|
bitfld.long 0x0 18.--19. "OSZ,PWM Output Select at Zero" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "OSC,PWM Output Select at Compare Match" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x0 8. "TIMCLKEN,Timer Clock Enable" "0: Timer Clock Disable,1: Timer Clock Enable"
|
|
bitfld.long 0x0 7. "TIMEREN,Timer Enable" "0: Timer Disable,1: Timer Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "TIMERMODE,Operation Mode Select" "0: Free-Running Mode Operation,1: Periodic Mode Operation"
|
|
bitfld.long 0x0 5. "INTENABLE,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
bitfld.long 0x0 2.--3. "TIMERPRE,Clock Divide Ratio Select" "0: Divided by 1,1: Divided by 16,2: Divided by 256,?"
|
|
newline
|
|
bitfld.long 0x0 1. "TIMERSIZE,Counter Size Select" "0: 16bits Counter Operation,1: 32bits Counter Operation"
|
|
bitfld.long 0x0 0. "ONESHOT,One-Shot Mode Enable" "0: Wrapping Mode Operation,1: One-Shot Mode Operation"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "INTCLR,Interrupt Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "INTCLR,Interrupt Clear"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 0. "RIS,Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 0. "MIS,Masked Interrupt Status" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BGLOAD,Background Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "BGLOAD,Background Load Value"
|
|
tree.end
|
|
tree "TMS02"
|
|
base ad:0x40000880
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LOAD,Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "LOAD,Counter Load Value"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "VALUE,Current Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Counter Current Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CONTROL,Control Register"
|
|
bitfld.long 0x0 21. "PWMMODE,PWM Mode Enable" "0: PWM Mode Disable,1: PWM Mode Enable"
|
|
bitfld.long 0x0 20. "RVAL,PWM Output Reset Value Select" "0: PWM Output Reset Value 'LOW',1: PWM Output Reset Value 'HIGH'"
|
|
bitfld.long 0x0 18.--19. "OSZ,PWM Output Select at Zero" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "OSC,PWM Output Select at Compare Match" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x0 8. "TIMCLKEN,Timer Clock Enable" "0: Timer Clock Disable,1: Timer Clock Enable"
|
|
bitfld.long 0x0 7. "TIMEREN,Timer Enable" "0: Timer Disable,1: Timer Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "TIMERMODE,Operation Mode Select" "0: Free-Running Mode Operation,1: Periodic Mode Operation"
|
|
bitfld.long 0x0 5. "INTENABLE,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
bitfld.long 0x0 2.--3. "TIMERPRE,Clock Divide Ratio Select" "0: Divided by 1,1: Divided by 16,2: Divided by 256,?"
|
|
newline
|
|
bitfld.long 0x0 1. "TIMERSIZE,Counter Size Select" "0: 16bits Counter Operation,1: 32bits Counter Operation"
|
|
bitfld.long 0x0 0. "ONESHOT,One-Shot Mode Enable" "0: Wrapping Mode Operation,1: One-Shot Mode Operation"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "INTCLR,Interrupt Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "INTCLR,Interrupt Clear"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 0. "RIS,Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 0. "MIS,Masked Interrupt Status" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BGLOAD,Background Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "BGLOAD,Background Load Value"
|
|
tree.end
|
|
tree "TMS03"
|
|
base ad:0x400008A0
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LOAD,Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "LOAD,Counter Load Value"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "VALUE,Current Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Counter Current Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CONTROL,Control Register"
|
|
bitfld.long 0x0 21. "PWMMODE,PWM Mode Enable" "0: PWM Mode Disable,1: PWM Mode Enable"
|
|
bitfld.long 0x0 20. "RVAL,PWM Output Reset Value Select" "0: PWM Output Reset Value 'LOW',1: PWM Output Reset Value 'HIGH'"
|
|
bitfld.long 0x0 18.--19. "OSZ,PWM Output Select at Zero" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "OSC,PWM Output Select at Compare Match" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x0 8. "TIMCLKEN,Timer Clock Enable" "0: Timer Clock Disable,1: Timer Clock Enable"
|
|
bitfld.long 0x0 7. "TIMEREN,Timer Enable" "0: Timer Disable,1: Timer Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "TIMERMODE,Operation Mode Select" "0: Free-Running Mode Operation,1: Periodic Mode Operation"
|
|
bitfld.long 0x0 5. "INTENABLE,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
bitfld.long 0x0 2.--3. "TIMERPRE,Clock Divide Ratio Select" "0: Divided by 1,1: Divided by 16,2: Divided by 256,?"
|
|
newline
|
|
bitfld.long 0x0 1. "TIMERSIZE,Counter Size Select" "0: 16bits Counter Operation,1: 32bits Counter Operation"
|
|
bitfld.long 0x0 0. "ONESHOT,One-Shot Mode Enable" "0: Wrapping Mode Operation,1: One-Shot Mode Operation"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "INTCLR,Interrupt Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "INTCLR,Interrupt Clear"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 0. "RIS,Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 0. "MIS,Masked Interrupt Status" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BGLOAD,Background Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "BGLOAD,Background Load Value"
|
|
tree.end
|
|
tree "TMS10"
|
|
base ad:0x40000900
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LOAD,Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "LOAD,Counter Load Value"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "VALUE,Current Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Counter Current Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CONTROL,Control Register"
|
|
bitfld.long 0x0 21. "PWMMODE,PWM Mode Enable" "0: PWM Mode Disable,1: PWM Mode Enable"
|
|
bitfld.long 0x0 20. "RVAL,PWM Output Reset Value Select" "0: PWM Output Reset Value 'LOW',1: PWM Output Reset Value 'HIGH'"
|
|
bitfld.long 0x0 18.--19. "OSZ,PWM Output Select at Zero" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "OSC,PWM Output Select at Compare Match" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x0 8. "TIMCLKEN,Timer Clock Enable" "0: Timer Clock Disable,1: Timer Clock Enable"
|
|
bitfld.long 0x0 7. "TIMEREN,Timer Enable" "0: Timer Disable,1: Timer Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "TIMERMODE,Operation Mode Select" "0: Free-Running Mode Operation,1: Periodic Mode Operation"
|
|
bitfld.long 0x0 5. "INTENABLE,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
bitfld.long 0x0 2.--3. "TIMERPRE,Clock Divide Ratio Select" "0: Divided by 1,1: Divided by 16,2: Divided by 256,?"
|
|
newline
|
|
bitfld.long 0x0 1. "TIMERSIZE,Counter Size Select" "0: 16bits Counter Operation,1: 32bits Counter Operation"
|
|
bitfld.long 0x0 0. "ONESHOT,One-Shot Mode Enable" "0: Wrapping Mode Operation,1: One-Shot Mode Operation"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "INTCLR,Interrupt Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "INTCLR,Interrupt Clear"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 0. "RIS,Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 0. "MIS,Masked Interrupt Status" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BGLOAD,Background Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "BGLOAD,Background Load Value"
|
|
tree.end
|
|
tree "TMS11"
|
|
base ad:0x40000920
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LOAD,Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "LOAD,Counter Load Value"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "VALUE,Current Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Counter Current Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CONTROL,Control Register"
|
|
bitfld.long 0x0 21. "PWMMODE,PWM Mode Enable" "0: PWM Mode Disable,1: PWM Mode Enable"
|
|
bitfld.long 0x0 20. "RVAL,PWM Output Reset Value Select" "0: PWM Output Reset Value 'LOW',1: PWM Output Reset Value 'HIGH'"
|
|
bitfld.long 0x0 18.--19. "OSZ,PWM Output Select at Zero" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "OSC,PWM Output Select at Compare Match" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x0 8. "TIMCLKEN,Timer Clock Enable" "0: Timer Clock Disable,1: Timer Clock Enable"
|
|
bitfld.long 0x0 7. "TIMEREN,Timer Enable" "0: Timer Disable,1: Timer Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "TIMERMODE,Operation Mode Select" "0: Free-Running Mode Operation,1: Periodic Mode Operation"
|
|
bitfld.long 0x0 5. "INTENABLE,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
bitfld.long 0x0 2.--3. "TIMERPRE,Clock Divide Ratio Select" "0: Divided by 1,1: Divided by 16,2: Divided by 256,?"
|
|
newline
|
|
bitfld.long 0x0 1. "TIMERSIZE,Counter Size Select" "0: 16bits Counter Operation,1: 32bits Counter Operation"
|
|
bitfld.long 0x0 0. "ONESHOT,One-Shot Mode Enable" "0: Wrapping Mode Operation,1: One-Shot Mode Operation"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "INTCLR,Interrupt Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "INTCLR,Interrupt Clear"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 0. "RIS,Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 0. "MIS,Masked Interrupt Status" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BGLOAD,Background Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "BGLOAD,Background Load Value"
|
|
tree.end
|
|
tree "TMS12"
|
|
base ad:0x40000980
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LOAD,Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "LOAD,Counter Load Value"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "VALUE,Current Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Counter Current Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CONTROL,Control Register"
|
|
bitfld.long 0x0 21. "PWMMODE,PWM Mode Enable" "0: PWM Mode Disable,1: PWM Mode Enable"
|
|
bitfld.long 0x0 20. "RVAL,PWM Output Reset Value Select" "0: PWM Output Reset Value 'LOW',1: PWM Output Reset Value 'HIGH'"
|
|
bitfld.long 0x0 18.--19. "OSZ,PWM Output Select at Zero" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "OSC,PWM Output Select at Compare Match" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x0 8. "TIMCLKEN,Timer Clock Enable" "0: Timer Clock Disable,1: Timer Clock Enable"
|
|
bitfld.long 0x0 7. "TIMEREN,Timer Enable" "0: Timer Disable,1: Timer Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "TIMERMODE,Operation Mode Select" "0: Free-Running Mode Operation,1: Periodic Mode Operation"
|
|
bitfld.long 0x0 5. "INTENABLE,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
bitfld.long 0x0 2.--3. "TIMERPRE,Clock Divide Ratio Select" "0: Divided by 1,1: Divided by 16,2: Divided by 256,?"
|
|
newline
|
|
bitfld.long 0x0 1. "TIMERSIZE,Counter Size Select" "0: 16bits Counter Operation,1: 32bits Counter Operation"
|
|
bitfld.long 0x0 0. "ONESHOT,One-Shot Mode Enable" "0: Wrapping Mode Operation,1: One-Shot Mode Operation"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "INTCLR,Interrupt Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "INTCLR,Interrupt Clear"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 0. "RIS,Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 0. "MIS,Masked Interrupt Status" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BGLOAD,Background Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "BGLOAD,Background Load Value"
|
|
tree.end
|
|
tree "TMS13"
|
|
base ad:0x400009A0
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LOAD,Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "LOAD,Counter Load Value"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "VALUE,Current Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Counter Current Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CONTROL,Control Register"
|
|
bitfld.long 0x0 21. "PWMMODE,PWM Mode Enable" "0: PWM Mode Disable,1: PWM Mode Enable"
|
|
bitfld.long 0x0 20. "RVAL,PWM Output Reset Value Select" "0: PWM Output Reset Value 'LOW',1: PWM Output Reset Value 'HIGH'"
|
|
bitfld.long 0x0 18.--19. "OSZ,PWM Output Select at Zero" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "OSC,PWM Output Select at Compare Match" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x0 8. "TIMCLKEN,Timer Clock Enable" "0: Timer Clock Disable,1: Timer Clock Enable"
|
|
bitfld.long 0x0 7. "TIMEREN,Timer Enable" "0: Timer Disable,1: Timer Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "TIMERMODE,Operation Mode Select" "0: Free-Running Mode Operation,1: Periodic Mode Operation"
|
|
bitfld.long 0x0 5. "INTENABLE,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
bitfld.long 0x0 2.--3. "TIMERPRE,Clock Divide Ratio Select" "0: Divided by 1,1: Divided by 16,2: Divided by 256,?"
|
|
newline
|
|
bitfld.long 0x0 1. "TIMERSIZE,Counter Size Select" "0: 16bits Counter Operation,1: 32bits Counter Operation"
|
|
bitfld.long 0x0 0. "ONESHOT,One-Shot Mode Enable" "0: Wrapping Mode Operation,1: One-Shot Mode Operation"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "INTCLR,Interrupt Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "INTCLR,Interrupt Clear"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 0. "RIS,Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 0. "MIS,Masked Interrupt Status" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BGLOAD,Background Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "BGLOAD,Background Load Value"
|
|
tree.end
|
|
tree "TMS20"
|
|
base ad:0x40000A00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LOAD,Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "LOAD,Counter Load Value"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "VALUE,Current Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Counter Current Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CONTROL,Control Register"
|
|
bitfld.long 0x0 21. "PWMMODE,PWM Mode Enable" "0: PWM Mode Disable,1: PWM Mode Enable"
|
|
bitfld.long 0x0 20. "RVAL,PWM Output Reset Value Select" "0: PWM Output Reset Value 'LOW',1: PWM Output Reset Value 'HIGH'"
|
|
bitfld.long 0x0 18.--19. "OSZ,PWM Output Select at Zero" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "OSC,PWM Output Select at Compare Match" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x0 8. "TIMCLKEN,Timer Clock Enable" "0: Timer Clock Disable,1: Timer Clock Enable"
|
|
bitfld.long 0x0 7. "TIMEREN,Timer Enable" "0: Timer Disable,1: Timer Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "TIMERMODE,Operation Mode Select" "0: Free-Running Mode Operation,1: Periodic Mode Operation"
|
|
bitfld.long 0x0 5. "INTENABLE,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
bitfld.long 0x0 2.--3. "TIMERPRE,Clock Divide Ratio Select" "0: Divided by 1,1: Divided by 16,2: Divided by 256,?"
|
|
newline
|
|
bitfld.long 0x0 1. "TIMERSIZE,Counter Size Select" "0: 16bits Counter Operation,1: 32bits Counter Operation"
|
|
bitfld.long 0x0 0. "ONESHOT,One-Shot Mode Enable" "0: Wrapping Mode Operation,1: One-Shot Mode Operation"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "INTCLR,Interrupt Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "INTCLR,Interrupt Clear"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 0. "RIS,Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 0. "MIS,Masked Interrupt Status" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BGLOAD,Background Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "BGLOAD,Background Load Value"
|
|
tree.end
|
|
tree "TMS21"
|
|
base ad:0x40000A20
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LOAD,Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "LOAD,Counter Load Value"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "VALUE,Current Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Counter Current Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CONTROL,Control Register"
|
|
bitfld.long 0x0 21. "PWMMODE,PWM Mode Enable" "0: PWM Mode Disable,1: PWM Mode Enable"
|
|
bitfld.long 0x0 20. "RVAL,PWM Output Reset Value Select" "0: PWM Output Reset Value 'LOW',1: PWM Output Reset Value 'HIGH'"
|
|
bitfld.long 0x0 18.--19. "OSZ,PWM Output Select at Zero" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "OSC,PWM Output Select at Compare Match" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x0 8. "TIMCLKEN,Timer Clock Enable" "0: Timer Clock Disable,1: Timer Clock Enable"
|
|
bitfld.long 0x0 7. "TIMEREN,Timer Enable" "0: Timer Disable,1: Timer Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "TIMERMODE,Operation Mode Select" "0: Free-Running Mode Operation,1: Periodic Mode Operation"
|
|
bitfld.long 0x0 5. "INTENABLE,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
bitfld.long 0x0 2.--3. "TIMERPRE,Clock Divide Ratio Select" "0: Divided by 1,1: Divided by 16,2: Divided by 256,?"
|
|
newline
|
|
bitfld.long 0x0 1. "TIMERSIZE,Counter Size Select" "0: 16bits Counter Operation,1: 32bits Counter Operation"
|
|
bitfld.long 0x0 0. "ONESHOT,One-Shot Mode Enable" "0: Wrapping Mode Operation,1: One-Shot Mode Operation"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "INTCLR,Interrupt Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "INTCLR,Interrupt Clear"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 0. "RIS,Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 0. "MIS,Masked Interrupt Status" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BGLOAD,Background Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "BGLOAD,Background Load Value"
|
|
tree.end
|
|
tree "TMS22"
|
|
base ad:0x40000A80
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LOAD,Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "LOAD,Counter Load Value"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "VALUE,Current Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Counter Current Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CONTROL,Control Register"
|
|
bitfld.long 0x0 21. "PWMMODE,PWM Mode Enable" "0: PWM Mode Disable,1: PWM Mode Enable"
|
|
bitfld.long 0x0 20. "RVAL,PWM Output Reset Value Select" "0: PWM Output Reset Value 'LOW',1: PWM Output Reset Value 'HIGH'"
|
|
bitfld.long 0x0 18.--19. "OSZ,PWM Output Select at Zero" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "OSC,PWM Output Select at Compare Match" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x0 8. "TIMCLKEN,Timer Clock Enable" "0: Timer Clock Disable,1: Timer Clock Enable"
|
|
bitfld.long 0x0 7. "TIMEREN,Timer Enable" "0: Timer Disable,1: Timer Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "TIMERMODE,Operation Mode Select" "0: Free-Running Mode Operation,1: Periodic Mode Operation"
|
|
bitfld.long 0x0 5. "INTENABLE,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
bitfld.long 0x0 2.--3. "TIMERPRE,Clock Divide Ratio Select" "0: Divided by 1,1: Divided by 16,2: Divided by 256,?"
|
|
newline
|
|
bitfld.long 0x0 1. "TIMERSIZE,Counter Size Select" "0: 16bits Counter Operation,1: 32bits Counter Operation"
|
|
bitfld.long 0x0 0. "ONESHOT,One-Shot Mode Enable" "0: Wrapping Mode Operation,1: One-Shot Mode Operation"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "INTCLR,Interrupt Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "INTCLR,Interrupt Clear"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 0. "RIS,Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 0. "MIS,Masked Interrupt Status" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BGLOAD,Background Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "BGLOAD,Background Load Value"
|
|
tree.end
|
|
tree "TMS23"
|
|
base ad:0x40000AA0
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LOAD,Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "LOAD,Counter Load Value"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "VALUE,Current Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Counter Current Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CONTROL,Control Register"
|
|
bitfld.long 0x0 21. "PWMMODE,PWM Mode Enable" "0: PWM Mode Disable,1: PWM Mode Enable"
|
|
bitfld.long 0x0 20. "RVAL,PWM Output Reset Value Select" "0: PWM Output Reset Value 'LOW',1: PWM Output Reset Value 'HIGH'"
|
|
bitfld.long 0x0 18.--19. "OSZ,PWM Output Select at Zero" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "OSC,PWM Output Select at Compare Match" "0: No Change,1: Set to Low,2: Set to High,3: Set to Toggle"
|
|
bitfld.long 0x0 8. "TIMCLKEN,Timer Clock Enable" "0: Timer Clock Disable,1: Timer Clock Enable"
|
|
bitfld.long 0x0 7. "TIMEREN,Timer Enable" "0: Timer Disable,1: Timer Enable"
|
|
newline
|
|
bitfld.long 0x0 6. "TIMERMODE,Operation Mode Select" "0: Free-Running Mode Operation,1: Periodic Mode Operation"
|
|
bitfld.long 0x0 5. "INTENABLE,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
bitfld.long 0x0 2.--3. "TIMERPRE,Clock Divide Ratio Select" "0: Divided by 1,1: Divided by 16,2: Divided by 256,?"
|
|
newline
|
|
bitfld.long 0x0 1. "TIMERSIZE,Counter Size Select" "0: 16bits Counter Operation,1: 32bits Counter Operation"
|
|
bitfld.long 0x0 0. "ONESHOT,One-Shot Mode Enable" "0: Wrapping Mode Operation,1: One-Shot Mode Operation"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "INTCLR,Interrupt Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "INTCLR,Interrupt Clear"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 0. "RIS,Raw Interrupt Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 0. "MIS,Masked Interrupt Status" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BGLOAD,Background Load Register"
|
|
hexmask.long 0x0 0.--31. 1. "BGLOAD,Background Load Value"
|
|
tree.end
|
|
tree.end
|
|
tree "UART (Universal Asynchronous Receiver and Transmitter)"
|
|
base ad:0x0
|
|
tree "UART0"
|
|
base ad:0x40009000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "DR,Data Register"
|
|
rbitfld.long 0x0 11. "OE,Overrun Error" "0,1"
|
|
rbitfld.long 0x0 10. "BE,Break Error" "0,1"
|
|
rbitfld.long 0x0 9. "PE,Parity Error" "0,1"
|
|
rbitfld.long 0x0 8. "FE,Framing Error" "0,1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive (read) data and Transmit (write) data"
|
|
line.long 0x4 "RSR_ECR,Receive Status Register and Error Clear Register"
|
|
bitfld.long 0x4 3. "OE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 2. "BE,Break Error" "0,1"
|
|
bitfld.long 0x4 1. "PE,Parity Error" "0,1"
|
|
bitfld.long 0x4 0. "FE,Framing Error" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "FR,Flag Register"
|
|
bitfld.long 0x0 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x0 6. "RXFF,Receive FIFO full" "0,1"
|
|
bitfld.long 0x0 5. "TXFF,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x0 4. "RXFE,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x0 3. "BUSY,UART busy" "0,1"
|
|
group.long 0x24++0x17
|
|
line.long 0x0 "IBRD,Integer Baud-rate Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "BAUD_DIVINT,Integer Baud-rate"
|
|
line.long 0x4 "FBRD,Fractional Baud-rate Register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "BAUD_DIVFRAC,Fractional Baud-rate"
|
|
line.long 0x8 "LCR_H,Line Control Register"
|
|
bitfld.long 0x8 9. "RRE,Receive Reverse Enable" "0,1"
|
|
bitfld.long 0x8 8. "TRE,Transfer Reverse Enable" "0,1"
|
|
bitfld.long 0x8 7. "SPS,Stick Parity Select" "0,1"
|
|
bitfld.long 0x8 5.--6. "WLEN,Word Length" "0,1,2,3"
|
|
bitfld.long 0x8 4. "FEN,Enable FIFOs" "0,1"
|
|
bitfld.long 0x8 3. "STP2,Two Stop bits Select" "0,1"
|
|
bitfld.long 0x8 2. "EPS,Even Parity Select" "0,1"
|
|
bitfld.long 0x8 1. "PEN,Parity Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "BRK,Send Break" "0,1"
|
|
line.long 0xC "CR,Control Register"
|
|
bitfld.long 0xC 15. "CTSEn ,CTS hardware flow control Enable" "0,1"
|
|
bitfld.long 0xC 9. "RXE,Receive Enable" "0,1"
|
|
bitfld.long 0xC 8. "TXE,Transmit Enable" "0,1"
|
|
bitfld.long 0xC 7. "LBE,Loopback Enable" "0,1"
|
|
bitfld.long 0xC 0. "UARTEN,UART Enable" "0,1"
|
|
line.long 0x10 "IFLS,Interrupt FIFO Level Select Register"
|
|
hexmask.long.byte 0x10 12.--15. 1. "RXFFILEVEL,Receive FIFO Level Select"
|
|
hexmask.long.byte 0x10 8.--11. 1. "TXFFILEVEL,Transmit FIFO Level Select"
|
|
bitfld.long 0x10 3.--5. "RXIFLSEL,Receive Interrupt FIFO Level Select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "TXIFLSEL,Transmit Interrupt FIFO Level Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "IMSC,Interrupt Mask Set and Clear Register"
|
|
bitfld.long 0x14 10. "OEIM,Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 9. "BEIM,Break Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 8. "PEIM,Parity Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 7. "FEIM,Framing Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 6. "RTIM,Receive timeout Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 5. "TXIM,Transmit Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 4. "RXIM,Receive Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 3. "TEIE,Transmit End Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "NEIM,Not Empty Interrupt Mask" "0,1"
|
|
rgroup.long 0x3C++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 10. "OERIS,Overrun Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 9. "BERIS,Break Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 8. "PERIS,Parity Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 7. "FERIS,Framing Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 6. "RTRIS,Receive timeout Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 5. "TXRIS,Transmit Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 4. "RXRIS,Receive Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 0. "NERIS,Not Empty Interrupt Raw Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 10. "OEMIS,Overrun Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 9. "BEMIS,Break Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 8. "PEMIS,Parity Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 7. "FEMIS,Framing Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 6. "RTMIS,Receive timeout Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 5. "TXMIS,Transmit Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 4. "RXMIS,Receive Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 0. "NEMIS,Not Empty Interrupt Masked Status" "0,1"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x0 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x0 10. "OEIC,Overrun Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 9. "BEIC,Break Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 8. "PEIC,Parity Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 7. "FEIC,Framing Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 6. "RTIC,Receive timeout Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 5. "TXIC,Transmit Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 4. "RXIC,Receive Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 0. "NEIC,Not Empty Interrupt Clear" "0,1"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "DMACR,DMA Control Register"
|
|
bitfld.long 0x0 5. "TXSRMSK,Tx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 4. "RXSRMSK,Rx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 2. "DMAONERR,DMA On Error" "0,1"
|
|
bitfld.long 0x0 1. "TXDMAE,Transmit DMA Enable" "0,1"
|
|
bitfld.long 0x0 0. "RXDMAE,Receive DMA Enable" "0,1"
|
|
tree.end
|
|
tree "UART1"
|
|
base ad:0x4000A000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "DR,Data Register"
|
|
rbitfld.long 0x0 11. "OE,Overrun Error" "0,1"
|
|
rbitfld.long 0x0 10. "BE,Break Error" "0,1"
|
|
rbitfld.long 0x0 9. "PE,Parity Error" "0,1"
|
|
rbitfld.long 0x0 8. "FE,Framing Error" "0,1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive (read) data and Transmit (write) data"
|
|
line.long 0x4 "RSR_ECR,Receive Status Register and Error Clear Register"
|
|
bitfld.long 0x4 3. "OE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 2. "BE,Break Error" "0,1"
|
|
bitfld.long 0x4 1. "PE,Parity Error" "0,1"
|
|
bitfld.long 0x4 0. "FE,Framing Error" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "FR,Flag Register"
|
|
bitfld.long 0x0 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x0 6. "RXFF,Receive FIFO full" "0,1"
|
|
bitfld.long 0x0 5. "TXFF,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x0 4. "RXFE,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x0 3. "BUSY,UART busy" "0,1"
|
|
group.long 0x24++0x17
|
|
line.long 0x0 "IBRD,Integer Baud-rate Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "BAUD_DIVINT,Integer Baud-rate"
|
|
line.long 0x4 "FBRD,Fractional Baud-rate Register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "BAUD_DIVFRAC,Fractional Baud-rate"
|
|
line.long 0x8 "LCR_H,Line Control Register"
|
|
bitfld.long 0x8 9. "RRE,Receive Reverse Enable" "0,1"
|
|
bitfld.long 0x8 8. "TRE,Transfer Reverse Enable" "0,1"
|
|
bitfld.long 0x8 7. "SPS,Stick Parity Select" "0,1"
|
|
bitfld.long 0x8 5.--6. "WLEN,Word Length" "0,1,2,3"
|
|
bitfld.long 0x8 4. "FEN,Enable FIFOs" "0,1"
|
|
bitfld.long 0x8 3. "STP2,Two Stop bits Select" "0,1"
|
|
bitfld.long 0x8 2. "EPS,Even Parity Select" "0,1"
|
|
bitfld.long 0x8 1. "PEN,Parity Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "BRK,Send Break" "0,1"
|
|
line.long 0xC "CR,Control Register"
|
|
bitfld.long 0xC 15. "CTSEn ,CTS hardware flow control Enable" "0,1"
|
|
bitfld.long 0xC 9. "RXE,Receive Enable" "0,1"
|
|
bitfld.long 0xC 8. "TXE,Transmit Enable" "0,1"
|
|
bitfld.long 0xC 7. "LBE,Loopback Enable" "0,1"
|
|
bitfld.long 0xC 0. "UARTEN,UART Enable" "0,1"
|
|
line.long 0x10 "IFLS,Interrupt FIFO Level Select Register"
|
|
hexmask.long.byte 0x10 12.--15. 1. "RXFFILEVEL,Receive FIFO Level Select"
|
|
hexmask.long.byte 0x10 8.--11. 1. "TXFFILEVEL,Transmit FIFO Level Select"
|
|
bitfld.long 0x10 3.--5. "RXIFLSEL,Receive Interrupt FIFO Level Select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "TXIFLSEL,Transmit Interrupt FIFO Level Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "IMSC,Interrupt Mask Set and Clear Register"
|
|
bitfld.long 0x14 10. "OEIM,Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 9. "BEIM,Break Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 8. "PEIM,Parity Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 7. "FEIM,Framing Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 6. "RTIM,Receive timeout Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 5. "TXIM,Transmit Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 4. "RXIM,Receive Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 3. "TEIE,Transmit End Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "NEIM,Not Empty Interrupt Mask" "0,1"
|
|
rgroup.long 0x3C++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 10. "OERIS,Overrun Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 9. "BERIS,Break Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 8. "PERIS,Parity Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 7. "FERIS,Framing Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 6. "RTRIS,Receive timeout Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 5. "TXRIS,Transmit Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 4. "RXRIS,Receive Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 0. "NERIS,Not Empty Interrupt Raw Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 10. "OEMIS,Overrun Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 9. "BEMIS,Break Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 8. "PEMIS,Parity Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 7. "FEMIS,Framing Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 6. "RTMIS,Receive timeout Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 5. "TXMIS,Transmit Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 4. "RXMIS,Receive Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 0. "NEMIS,Not Empty Interrupt Masked Status" "0,1"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x0 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x0 10. "OEIC,Overrun Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 9. "BEIC,Break Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 8. "PEIC,Parity Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 7. "FEIC,Framing Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 6. "RTIC,Receive timeout Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 5. "TXIC,Transmit Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 4. "RXIC,Receive Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 0. "NEIC,Not Empty Interrupt Clear" "0,1"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "DMACR,DMA Control Register"
|
|
bitfld.long 0x0 5. "TXSRMSK,Tx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 4. "RXSRMSK,Rx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 2. "DMAONERR,DMA On Error" "0,1"
|
|
bitfld.long 0x0 1. "TXDMAE,Transmit DMA Enable" "0,1"
|
|
bitfld.long 0x0 0. "RXDMAE,Receive DMA Enable" "0,1"
|
|
tree.end
|
|
tree "UART2"
|
|
base ad:0x4000B000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "DR,Data Register"
|
|
rbitfld.long 0x0 11. "OE,Overrun Error" "0,1"
|
|
rbitfld.long 0x0 10. "BE,Break Error" "0,1"
|
|
rbitfld.long 0x0 9. "PE,Parity Error" "0,1"
|
|
rbitfld.long 0x0 8. "FE,Framing Error" "0,1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive (read) data and Transmit (write) data"
|
|
line.long 0x4 "RSR_ECR,Receive Status Register and Error Clear Register"
|
|
bitfld.long 0x4 3. "OE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 2. "BE,Break Error" "0,1"
|
|
bitfld.long 0x4 1. "PE,Parity Error" "0,1"
|
|
bitfld.long 0x4 0. "FE,Framing Error" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "FR,Flag Register"
|
|
bitfld.long 0x0 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x0 6. "RXFF,Receive FIFO full" "0,1"
|
|
bitfld.long 0x0 5. "TXFF,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x0 4. "RXFE,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x0 3. "BUSY,UART busy" "0,1"
|
|
group.long 0x24++0x17
|
|
line.long 0x0 "IBRD,Integer Baud-rate Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "BAUD_DIVINT,Integer Baud-rate"
|
|
line.long 0x4 "FBRD,Fractional Baud-rate Register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "BAUD_DIVFRAC,Fractional Baud-rate"
|
|
line.long 0x8 "LCR_H,Line Control Register"
|
|
bitfld.long 0x8 9. "RRE,Receive Reverse Enable" "0,1"
|
|
bitfld.long 0x8 8. "TRE,Transfer Reverse Enable" "0,1"
|
|
bitfld.long 0x8 7. "SPS,Stick Parity Select" "0,1"
|
|
bitfld.long 0x8 5.--6. "WLEN,Word Length" "0,1,2,3"
|
|
bitfld.long 0x8 4. "FEN,Enable FIFOs" "0,1"
|
|
bitfld.long 0x8 3. "STP2,Two Stop bits Select" "0,1"
|
|
bitfld.long 0x8 2. "EPS,Even Parity Select" "0,1"
|
|
bitfld.long 0x8 1. "PEN,Parity Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "BRK,Send Break" "0,1"
|
|
line.long 0xC "CR,Control Register"
|
|
bitfld.long 0xC 15. "CTSEn ,CTS hardware flow control Enable" "0,1"
|
|
bitfld.long 0xC 9. "RXE,Receive Enable" "0,1"
|
|
bitfld.long 0xC 8. "TXE,Transmit Enable" "0,1"
|
|
bitfld.long 0xC 7. "LBE,Loopback Enable" "0,1"
|
|
bitfld.long 0xC 0. "UARTEN,UART Enable" "0,1"
|
|
line.long 0x10 "IFLS,Interrupt FIFO Level Select Register"
|
|
hexmask.long.byte 0x10 12.--15. 1. "RXFFILEVEL,Receive FIFO Level Select"
|
|
hexmask.long.byte 0x10 8.--11. 1. "TXFFILEVEL,Transmit FIFO Level Select"
|
|
bitfld.long 0x10 3.--5. "RXIFLSEL,Receive Interrupt FIFO Level Select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "TXIFLSEL,Transmit Interrupt FIFO Level Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "IMSC,Interrupt Mask Set and Clear Register"
|
|
bitfld.long 0x14 10. "OEIM,Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 9. "BEIM,Break Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 8. "PEIM,Parity Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 7. "FEIM,Framing Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 6. "RTIM,Receive timeout Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 5. "TXIM,Transmit Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 4. "RXIM,Receive Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 3. "TEIE,Transmit End Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "NEIM,Not Empty Interrupt Mask" "0,1"
|
|
rgroup.long 0x3C++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 10. "OERIS,Overrun Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 9. "BERIS,Break Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 8. "PERIS,Parity Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 7. "FERIS,Framing Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 6. "RTRIS,Receive timeout Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 5. "TXRIS,Transmit Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 4. "RXRIS,Receive Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 0. "NERIS,Not Empty Interrupt Raw Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 10. "OEMIS,Overrun Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 9. "BEMIS,Break Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 8. "PEMIS,Parity Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 7. "FEMIS,Framing Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 6. "RTMIS,Receive timeout Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 5. "TXMIS,Transmit Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 4. "RXMIS,Receive Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 0. "NEMIS,Not Empty Interrupt Masked Status" "0,1"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x0 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x0 10. "OEIC,Overrun Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 9. "BEIC,Break Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 8. "PEIC,Parity Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 7. "FEIC,Framing Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 6. "RTIC,Receive timeout Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 5. "TXIC,Transmit Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 4. "RXIC,Receive Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 0. "NEIC,Not Empty Interrupt Clear" "0,1"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "DMACR,DMA Control Register"
|
|
bitfld.long 0x0 5. "TXSRMSK,Tx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 4. "RXSRMSK,Rx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 2. "DMAONERR,DMA On Error" "0,1"
|
|
bitfld.long 0x0 1. "TXDMAE,Transmit DMA Enable" "0,1"
|
|
bitfld.long 0x0 0. "RXDMAE,Receive DMA Enable" "0,1"
|
|
tree.end
|
|
tree "UART3"
|
|
base ad:0x4000C000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "DR,Data Register"
|
|
rbitfld.long 0x0 11. "OE,Overrun Error" "0,1"
|
|
rbitfld.long 0x0 10. "BE,Break Error" "0,1"
|
|
rbitfld.long 0x0 9. "PE,Parity Error" "0,1"
|
|
rbitfld.long 0x0 8. "FE,Framing Error" "0,1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive (read) data and Transmit (write) data"
|
|
line.long 0x4 "RSR_ECR,Receive Status Register and Error Clear Register"
|
|
bitfld.long 0x4 3. "OE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 2. "BE,Break Error" "0,1"
|
|
bitfld.long 0x4 1. "PE,Parity Error" "0,1"
|
|
bitfld.long 0x4 0. "FE,Framing Error" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "FR,Flag Register"
|
|
bitfld.long 0x0 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x0 6. "RXFF,Receive FIFO full" "0,1"
|
|
bitfld.long 0x0 5. "TXFF,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x0 4. "RXFE,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x0 3. "BUSY,UART busy" "0,1"
|
|
group.long 0x24++0x17
|
|
line.long 0x0 "IBRD,Integer Baud-rate Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "BAUD_DIVINT,Integer Baud-rate"
|
|
line.long 0x4 "FBRD,Fractional Baud-rate Register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "BAUD_DIVFRAC,Fractional Baud-rate"
|
|
line.long 0x8 "LCR_H,Line Control Register"
|
|
bitfld.long 0x8 9. "RRE,Receive Reverse Enable" "0,1"
|
|
bitfld.long 0x8 8. "TRE,Transfer Reverse Enable" "0,1"
|
|
bitfld.long 0x8 7. "SPS,Stick Parity Select" "0,1"
|
|
bitfld.long 0x8 5.--6. "WLEN,Word Length" "0,1,2,3"
|
|
bitfld.long 0x8 4. "FEN,Enable FIFOs" "0,1"
|
|
bitfld.long 0x8 3. "STP2,Two Stop bits Select" "0,1"
|
|
bitfld.long 0x8 2. "EPS,Even Parity Select" "0,1"
|
|
bitfld.long 0x8 1. "PEN,Parity Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "BRK,Send Break" "0,1"
|
|
line.long 0xC "CR,Control Register"
|
|
bitfld.long 0xC 15. "CTSEn ,CTS hardware flow control Enable" "0,1"
|
|
bitfld.long 0xC 9. "RXE,Receive Enable" "0,1"
|
|
bitfld.long 0xC 8. "TXE,Transmit Enable" "0,1"
|
|
bitfld.long 0xC 7. "LBE,Loopback Enable" "0,1"
|
|
bitfld.long 0xC 0. "UARTEN,UART Enable" "0,1"
|
|
line.long 0x10 "IFLS,Interrupt FIFO Level Select Register"
|
|
hexmask.long.byte 0x10 12.--15. 1. "RXFFILEVEL,Receive FIFO Level Select"
|
|
hexmask.long.byte 0x10 8.--11. 1. "TXFFILEVEL,Transmit FIFO Level Select"
|
|
bitfld.long 0x10 3.--5. "RXIFLSEL,Receive Interrupt FIFO Level Select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "TXIFLSEL,Transmit Interrupt FIFO Level Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "IMSC,Interrupt Mask Set and Clear Register"
|
|
bitfld.long 0x14 10. "OEIM,Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 9. "BEIM,Break Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 8. "PEIM,Parity Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 7. "FEIM,Framing Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 6. "RTIM,Receive timeout Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 5. "TXIM,Transmit Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 4. "RXIM,Receive Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 3. "TEIE,Transmit End Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "NEIM,Not Empty Interrupt Mask" "0,1"
|
|
rgroup.long 0x3C++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 10. "OERIS,Overrun Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 9. "BERIS,Break Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 8. "PERIS,Parity Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 7. "FERIS,Framing Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 6. "RTRIS,Receive timeout Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 5. "TXRIS,Transmit Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 4. "RXRIS,Receive Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 0. "NERIS,Not Empty Interrupt Raw Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 10. "OEMIS,Overrun Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 9. "BEMIS,Break Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 8. "PEMIS,Parity Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 7. "FEMIS,Framing Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 6. "RTMIS,Receive timeout Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 5. "TXMIS,Transmit Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 4. "RXMIS,Receive Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 0. "NEMIS,Not Empty Interrupt Masked Status" "0,1"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x0 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x0 10. "OEIC,Overrun Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 9. "BEIC,Break Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 8. "PEIC,Parity Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 7. "FEIC,Framing Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 6. "RTIC,Receive timeout Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 5. "TXIC,Transmit Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 4. "RXIC,Receive Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 0. "NEIC,Not Empty Interrupt Clear" "0,1"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "DMACR,DMA Control Register"
|
|
bitfld.long 0x0 5. "TXSRMSK,Tx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 4. "RXSRMSK,Rx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 2. "DMAONERR,DMA On Error" "0,1"
|
|
bitfld.long 0x0 1. "TXDMAE,Transmit DMA Enable" "0,1"
|
|
bitfld.long 0x0 0. "RXDMAE,Receive DMA Enable" "0,1"
|
|
tree.end
|
|
tree "UART4"
|
|
base ad:0x4000D000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "DR,Data Register"
|
|
rbitfld.long 0x0 11. "OE,Overrun Error" "0,1"
|
|
rbitfld.long 0x0 10. "BE,Break Error" "0,1"
|
|
rbitfld.long 0x0 9. "PE,Parity Error" "0,1"
|
|
rbitfld.long 0x0 8. "FE,Framing Error" "0,1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive (read) data and Transmit (write) data"
|
|
line.long 0x4 "RSR_ECR,Receive Status Register and Error Clear Register"
|
|
bitfld.long 0x4 3. "OE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 2. "BE,Break Error" "0,1"
|
|
bitfld.long 0x4 1. "PE,Parity Error" "0,1"
|
|
bitfld.long 0x4 0. "FE,Framing Error" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "FR,Flag Register"
|
|
bitfld.long 0x0 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x0 6. "RXFF,Receive FIFO full" "0,1"
|
|
bitfld.long 0x0 5. "TXFF,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x0 4. "RXFE,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x0 3. "BUSY,UART busy" "0,1"
|
|
group.long 0x24++0x17
|
|
line.long 0x0 "IBRD,Integer Baud-rate Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "BAUD_DIVINT,Integer Baud-rate"
|
|
line.long 0x4 "FBRD,Fractional Baud-rate Register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "BAUD_DIVFRAC,Fractional Baud-rate"
|
|
line.long 0x8 "LCR_H,Line Control Register"
|
|
bitfld.long 0x8 9. "RRE,Receive Reverse Enable" "0,1"
|
|
bitfld.long 0x8 8. "TRE,Transfer Reverse Enable" "0,1"
|
|
bitfld.long 0x8 7. "SPS,Stick Parity Select" "0,1"
|
|
bitfld.long 0x8 5.--6. "WLEN,Word Length" "0,1,2,3"
|
|
bitfld.long 0x8 4. "FEN,Enable FIFOs" "0,1"
|
|
bitfld.long 0x8 3. "STP2,Two Stop bits Select" "0,1"
|
|
bitfld.long 0x8 2. "EPS,Even Parity Select" "0,1"
|
|
bitfld.long 0x8 1. "PEN,Parity Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "BRK,Send Break" "0,1"
|
|
line.long 0xC "CR,Control Register"
|
|
bitfld.long 0xC 15. "CTSEn ,CTS hardware flow control Enable" "0,1"
|
|
bitfld.long 0xC 9. "RXE,Receive Enable" "0,1"
|
|
bitfld.long 0xC 8. "TXE,Transmit Enable" "0,1"
|
|
bitfld.long 0xC 7. "LBE,Loopback Enable" "0,1"
|
|
bitfld.long 0xC 0. "UARTEN,UART Enable" "0,1"
|
|
line.long 0x10 "IFLS,Interrupt FIFO Level Select Register"
|
|
hexmask.long.byte 0x10 12.--15. 1. "RXFFILEVEL,Receive FIFO Level Select"
|
|
hexmask.long.byte 0x10 8.--11. 1. "TXFFILEVEL,Transmit FIFO Level Select"
|
|
bitfld.long 0x10 3.--5. "RXIFLSEL,Receive Interrupt FIFO Level Select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "TXIFLSEL,Transmit Interrupt FIFO Level Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "IMSC,Interrupt Mask Set and Clear Register"
|
|
bitfld.long 0x14 10. "OEIM,Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 9. "BEIM,Break Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 8. "PEIM,Parity Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 7. "FEIM,Framing Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 6. "RTIM,Receive timeout Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 5. "TXIM,Transmit Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 4. "RXIM,Receive Interrupt Mask" "0,1"
|
|
bitfld.long 0x14 3. "TEIE,Transmit End Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "NEIM,Not Empty Interrupt Mask" "0,1"
|
|
rgroup.long 0x3C++0x7
|
|
line.long 0x0 "RIS,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 10. "OERIS,Overrun Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 9. "BERIS,Break Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 8. "PERIS,Parity Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 7. "FERIS,Framing Error Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 6. "RTRIS,Receive timeout Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 5. "TXRIS,Transmit Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 4. "RXRIS,Receive Interrupt Raw Status" "0,1"
|
|
bitfld.long 0x0 0. "NERIS,Not Empty Interrupt Raw Status" "0,1"
|
|
line.long 0x4 "MIS,Masked Interrupt Status Register"
|
|
bitfld.long 0x4 10. "OEMIS,Overrun Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 9. "BEMIS,Break Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 8. "PEMIS,Parity Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 7. "FEMIS,Framing Error Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 6. "RTMIS,Receive timeout Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 5. "TXMIS,Transmit Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 4. "RXMIS,Receive Interrupt Masked Status" "0,1"
|
|
bitfld.long 0x4 0. "NEMIS,Not Empty Interrupt Masked Status" "0,1"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x0 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x0 10. "OEIC,Overrun Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 9. "BEIC,Break Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 8. "PEIC,Parity Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 7. "FEIC,Framing Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 6. "RTIC,Receive timeout Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 5. "TXIC,Transmit Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 4. "RXIC,Receive Interrupt Clear" "0,1"
|
|
bitfld.long 0x0 0. "NEIC,Not Empty Interrupt Clear" "0,1"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "DMACR,DMA Control Register"
|
|
bitfld.long 0x0 5. "TXSRMSK,Tx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 4. "RXSRMSK,Rx DMA single Request mask" "0,1"
|
|
bitfld.long 0x0 2. "DMAONERR,DMA On Error" "0,1"
|
|
bitfld.long 0x0 1. "TXDMAE,Transmit DMA Enable" "0,1"
|
|
bitfld.long 0x0 0. "RXDMAE,Receive DMA Enable" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "WDT (Watchdog Timer)"
|
|
base ad:0x40000000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "RR,Refresh Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "REFRESH,Counter Refresh"
|
|
line.long 0x4 "CR,Control Register"
|
|
bitfld.long 0x4 29. "SLPSTP,CM4 Sleep Mode Count Stop Enable" "0: CM4 Sleep Mode Count Stop Disable,1: CM4 Sleep Mode Count Stop Enable"
|
|
bitfld.long 0x4 28. "DBGSTP,CM4 Debug Mode Count Stop Enable" "0: CM4 Debug Mode Count Stop Disable,1: CM4 Debug Mode Count Stop Enable"
|
|
bitfld.long 0x4 25. "RSTEN,Reset Requset Enable" "0: Reset Request Disable,1: Reset Request Enable"
|
|
newline
|
|
bitfld.long 0x4 24. "INTEN,Interrupt Enable" "0: Interrupt Disable,1: Interrupt Enable"
|
|
hexmask.long.byte 0x4 16.--23. 1. "CKS,Clock Divide Ratio Select"
|
|
hexmask.long.word 0x4 0.--15. 1. "LOADVAL,Counter Load Value"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 16. "INTS,Interrupt Status" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNTVAL,Counter Current Value"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "ER,Enable Register"
|
|
bitfld.long 0x0 0. "WDTEN,WDT Enable" "0: WDT Disable,1: WDT Enable"
|
|
line.long 0x4 "PR,Protection Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PROTECTION,Protection"
|
|
tree.end
|
|
newline
|
|
AUTOINDENT.OFF
|