; -------------------------------------------------------------------------------- ; @Title: NRF54Lxxx On-Chip Peripherals ; @Props: Released ; @Author: KRZ ; @Changelog: 2025-04-08 KRZ ; @Manufacturer: NORDICSEMI - Nordic Semiconductor ; @Doc: Generated (TRACE32, build: 179090.), based on: nrf54l15.svd (Ver. 1) ; @Core: Cortex-M33F ; @Chip: nRF54L15 ; @Copyright: (C) 1989-2025 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved. ; ; SPDX-License-Identifier: BSD-3-Clause ; ; Redistribution and use in source and binary forms, with or without ; modification, are permitted provided that the following conditions are met: ; ; 1. Redistributions of source code must retain the above copyright notice, this ; list of conditions and the following disclaimer. ; ; 2. Redistributions in binary form must reproduce the above copyright ; notice, this list of conditions and the following disclaimer in the ; documentation and/or other materials provided with the distribution. ; ; 3. Neither the name of Nordic Semiconductor ASA nor the names of its ; contributors may be used to endorse or promote products derived from this ; software without specific prior written permission. ; ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ; IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE ; ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ; POSSIBILITY OF SUCH DAMAGE. ; -------------------------------------------------------------------------------- ; $Id: pernrf54lxxx.per 19361 2025-04-08 14:09:32Z kwisniewski $ AUTOINDENT.ON CENTER TREE ENUMDELIMITER "," base ad:0x0 tree.close "Core Registers (Cortex-M33F)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 29. " EXTEXCLALL ,Allows external exclusive operations to be used in a configuration with no MPU" "No,Yes" bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes" bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes" textline " " bitfld.long 0x00 9. " DISOOFP ,Disables floating-point" "No,Yes" bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes" bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle" "No,Yes" group.long 0x0C++0x0F line.long 0x00 "CPPWR,Coprocessor Power Control Register" bitfld.long 0x00 21. " SUS10 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 20. " SU10 ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 15. " SUS7 ,State unknown Secure only" "Both states,Secure only" textline " " bitfld.long 0x00 14. " SU7 ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 13. " SUS6 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 12. " SU6 ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted" textline " " bitfld.long 0x00 11. " SUS5 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 10. " SU5 ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 9. " SUS4 ,State unknown Secure only" "Both states,Secure only" textline " " bitfld.long 0x00 8. " SU4 ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 7. " SUS3 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 6. " SU3 ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted" textline " " bitfld.long 0x00 5. " SUS2 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 4. " SU2 ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 3. " SUS1 ,State unknown Secure only" "Both states,Secure only" textline " " bitfld.long 0x00 2. " SU1 ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 1. " SUS0 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 0. " SU0 ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted" line.long 0x04 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x04 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x04 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x04 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" textline " " bitfld.long 0x04 0. " ENABLE ,Counter Enable" "Disabled,Enabled" line.long 0x08 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x0C "SYST_CVR,SysTick Current Value Register" hexmask.long.tbyte 0x0C 0.--23. 1. " CURRENT ,Current counter value" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPUID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main Extension" newline abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xD21=Cortex-M33" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" group.long 0xD04++0x23 line.long 0x00 "ICSR,Interrupt Control and State Register" setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET , On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET , On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending" textline " " bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure" rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled" rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending" textline " " hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt" rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent" hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key" rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian" bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration and Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored" bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored" bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled" line.long 0x14 "SHPR1,System Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of system handler 7, SecureFault" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6, UsageFault" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5, BusFault" textline " " hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4, MemManage" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV" hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending" bitfld.long 0x20 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending" bitfld.long 0x20 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled" textline " " bitfld.long 0x20 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending" textline " " bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick exception status" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV exception status" "Not active,Active" textline " " bitfld.long 0x20 8. " MONITORACT ,Monitor exception status" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall exception status" "Not active,Active" bitfld.long 0x20 5. " NMIACT ,NMI exception status" "Not active,Active" textline " " bitfld.long 0x20 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active" bitfld.long 0x20 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active" textline " " bitfld.long 0x20 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active" group.byte 0xD28++0x1 line.byte 0x00 "MMFSR,MemManage Status Register" bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,Stacking Access Violations" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " MUNSTKERR ,Unstacking Access Violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault (exception entry)" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault (exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xD2A++0x1 line.word 0x00 "UFSR,Usage Fault Status Register" eventfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" eventfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" eventfld.word 0x00 4. " STKOF ,Stack overflow error" "No error,Error" textline " " eventfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" eventfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" eventfld.word 0x00 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error" textline " " eventfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xD2C++0x03 line.long 0x00 "HFSR,HardFault Status Register" bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred" bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred" bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" group.long 0xD34++0x0B line.long 0x00 "MMFAR,MemManage Fault Address Register" line.long 0x04 "BFAR,BusFault Address Register" line.long 0x08 "AFSR,Auxiliary Fault Status Register" group.long 0xD88++0x03 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full" if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD48) group.long 0xD8C++0x03 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 11. " CP11 ,Enables Non-secure access to coprocessor CP11" "Disabled,Enabled" bitfld.long 0x00 10. " CP10 ,Enables Non-secure access to coprocessor CP10" "Disabled,Enabled" bitfld.long 0x00 7. " CP7 ,Enables Non-secure access to coprocessor CP7" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CP6 ,Enables Non-secure access to coprocessor CP6" "Disabled,Enabled" bitfld.long 0x00 5. " CP5 ,Enables Non-secure access to coprocessor CP5" "Disabled,Enabled" bitfld.long 0x00 4. " CP4 ,Enables Non-secure access to coprocessor CP4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CP3 ,Enables Non-secure access to coprocessor CP3" "Disabled,Enabled" bitfld.long 0x00 2. " CP2 ,Enables Non-secure access to coprocessor CP2" "Disabled,Enabled" bitfld.long 0x00 1. " CP1 ,Enables Non-secure access to coprocessor CP1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CP0 ,Enables Non-secure access to coprocessor CP0" "Disabled,Enabled" else hgroup.long 0xD8C++0x03 hide.long 0x00 "NSACR,Non-Secure Access Control Register (not accessible)" endif wgroup.long 0xF00++0x03 line.long 0x00 "STIR,Software Triggered Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be pended" tree "Memory System" width 10. rgroup.long 0xD78++0x03 line.long 0x00 "CLIDR,Cache Level ID Register" bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest" bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..." textline " " bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..." bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..." bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..." textline " " bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..." bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..." bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..." textline " " bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD7C)&0xE0000000)==0x80000000) rgroup.long 0xD7C++0x03 line.long 0x00 "CTR,Cache Type Register" bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..." bitfld.long 0x00 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else rgroup.long 0xD7C++0x03 line.long 0x00 "CTR,Cache Type Register" bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..." endif rgroup.long 0xD80++0x03 line.long 0x00 "CCSIDR,Cache Size ID Register" bitfld.long 0x00 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported" bitfld.long 0x00 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported" bitfld.long 0x00 29. " RA ,Indicates support available for read allocation" "Not supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Indicates support available for write allocation" "Not supported,Supported" hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1" hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1" textline " " bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512" group.long 0xD84++0x03 line.long 0x00 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..." bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction" wgroup.long 0xF50++0x03 line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU" wgroup.long 0xF58++0x23 line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU" line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC" line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way" hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU" line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC" line.long 0x14 "DCCSW,D-Cache Clean by Set-Way" hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC" line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way" hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x20 "BPIALL,Branch Predictor Invalidate All" tree.end tree "Feature Registers" width 10. rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,T32 instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." bitfld.long 0x04 4.--7. " SECURITY ,Security support" "Not implemented,Implemented,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " MPROFDBG ,M-profile debug. Indicates the supported M-profile debug architecture" "Not supported,ARMv8-M Debug architecture,?..." rgroup.long 0xD4C++0x03 line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TCM ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,,PMSAv8,?..." rgroup.long 0xD54++0x03 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD5C++0x03 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 8.--11. " BPMAINT ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..." bitfld.long 0x00 4.--7. " CMAINTSW ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " CMAINTVA ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..." rgroup.long 0xD60++0x03 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." rgroup.long 0xD64++0x03 line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x00 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x00 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x00 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x00 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Basic,Extended,?..." rgroup.long 0xD68++0x03 line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x00 28.--31. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x00 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x00 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,SMULL/SMLAL,,SMULL/SMLAL/DSP,?..." textline " " bitfld.long 0x00 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MUL,MUL/MLA/MLS,?..." bitfld.long 0x00 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x00 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x00 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,,Load-acquire/Store-release/Exclusive,?..." rgroup.long 0xD6C++0x03 line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x00 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x00 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x00 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Extended,?..." textline " " bitfld.long 0x00 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..." rgroup.long 0xD70++0x03 line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x00 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,CPS/MRS/MSR,?..." bitfld.long 0x00 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" ",,,Supported,?..." bitfld.long 0x00 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,,,DMB/DSB/ISB,?..." textline " " bitfld.long 0x00 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x00 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,,,Load/store,?..." bitfld.long 0x00 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,?..." tree.end tree "CoreSight Identification Registers" base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 11. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFE0++0x0F line.long 0x00 "DPIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "DPIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "DPIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "DPIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "DCIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "DCIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "DCIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "DCIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit (MPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..." group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15" endif tree.end newline group.long 0xDC0++0x07 line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 24.--27. " ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 16.--19. " ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 8.--11. " ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 0.--3. " ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1" bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 24.--27. " ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 16.--19. " ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 8.--11. " ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 0.--3. " ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Security Attribution Unit (SAU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. group.long 0xDD0++0x03 line.long 0x00 "SAU_CTRL,SAU Control Register" bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure" bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled" rgroup.long 0xDD4++0x03 line.long 0x00 "SAU_TYPE,SAU Type Register" bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,1,2,3,4,5,6,7,8,?..." group.long 0xDD8++0x03 line.long 0x00 "SAU_RNR,SAU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR" tree.close "SAU regions" if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0) if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x0 group.long 0xDDC++0x03 "Region 0" saveout 0xDD8 %l 0x0 line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 0 (not implemented)" saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x1 group.long 0xDDC++0x03 "Region 1" saveout 0xDD8 %l 0x1 line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 1 (not implemented)" saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x2 group.long 0xDDC++0x03 "Region 2" saveout 0xDD8 %l 0x2 line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 2 (not implemented)" saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x3 group.long 0xDDC++0x03 "Region 3" saveout 0xDD8 %l 0x3 line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 3 (not implemented)" saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x4 group.long 0xDDC++0x03 "Region 4" saveout 0xDD8 %l 0x4 line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 4 (not implemented)" saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x5 group.long 0xDDC++0x03 "Region 5" saveout 0xDD8 %l 0x5 line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 5 (not implemented)" saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x6 group.long 0xDDC++0x03 "Region 6" saveout 0xDD8 %l 0x6 line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 6 (not implemented)" saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x7 group.long 0xDDC++0x03 "Region 7" saveout 0xDD8 %l 0x7 line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 7 (not implemented)" saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" endif else hgroup.long 0xDDC++0x03 "Region 0 (not accessible)" saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" hgroup.long 0xDDC++0x03 "Region 1 (not accessible)" saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" hgroup.long 0xDDC++0x03 "Region 2 (not accessible)" saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" hgroup.long 0xDDC++0x03 "Region 3 (not accessible)" saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" hgroup.long 0xDDC++0x03 "Region 4 (not accessible)" saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" hgroup.long 0xDDC++0x03 "Region 5 (not accessible)" saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" hgroup.long 0xDDC++0x03 "Region 6 (not accessible)" saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" hgroup.long 0xDDC++0x03 "Region 7 (not accessible)" saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" endif tree.end group.long 0xDE4++0x03 line.long 0x00 "SFSR,Secure Fault Status Register" bitfld.long 0x00 7. " LSERR ,Lazy state error flag" "Not occurred,Occurred" bitfld.long 0x00 6. " SFARVALID ,Secure fault address valid" "Not valid,Valid" bitfld.long 0x00 5. " LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred" bitfld.long 0x00 3. " AUVIOL ,Attribution unit violation flag" "Not occurred,Occurred" bitfld.long 0x00 2. " INVER ,Invalid exception return flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " INVIS ,Invalid integrity signature flag" "Not occurred,Occurred" bitfld.long 0x00 0. " INVEP ,Invalid entry point" "Not occurred,Occurred" group.long 0xDE8++0x03 line.long 0x00 "SFAR,Secure Fault Address Register" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller (NVIC)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. group.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,0-511" width 24. tree "Interrupt Enable Registers" group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x104++0x03 line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x104++0x03 hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x108++0x03 line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x108++0x03 hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x10C++0x03 line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x10C++0x03 hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x110++0x03 line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x110++0x03 hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x114++0x03 line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x114++0x03 hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x118++0x03 line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x118++0x03 hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x11C++0x03 line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA254 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA253 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA252 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA251 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA250 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA248 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA247 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA246 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA245 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA244 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA242 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA241 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA240 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x11C++0x03 hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x120++0x03 line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA286 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA285 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA284 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA283 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA282 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA280 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA279 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA278 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA277 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA276 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA274 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA273 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA272 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA271 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA270 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA268 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA267 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA266 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA265 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA264 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA262 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA261 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA260 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA259 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA258 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA256 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x120++0x03 hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x124++0x03 line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA318 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA317 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA316 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA315 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA314 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA312 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA311 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA310 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA309 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA308 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA306 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA305 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA304 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA303 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA302 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA300 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA299 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA298 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA297 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA296 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA294 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA293 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA292 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA291 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA290 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA288 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x124++0x03 hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x128++0x03 line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA350 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA349 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA348 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA347 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA346 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA344 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA343 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA342 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA341 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA340 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA338 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA337 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA336 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA335 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA334 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA332 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA331 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA330 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA329 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA328 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA326 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA325 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA324 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA323 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA322 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA320 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x128++0x03 hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x12C++0x03 line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA382 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA381 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA380 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA379 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA378 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA376 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA375 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA374 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA373 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA372 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA370 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA369 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA368 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA367 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA366 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA364 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA363 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA362 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA361 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA360 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA358 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA357 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA356 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA355 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA354 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA352 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x12C++0x03 hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x130++0x03 line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA414 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA413 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA412 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA411 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA410 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA408 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA407 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA406 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA405 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA404 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA402 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA401 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA400 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA399 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA398 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA396 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA395 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA394 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA393 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA392 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA390 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA389 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA388 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA387 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA386 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA384 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x130++0x03 hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x134++0x03 line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA446 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA445 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA444 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA443 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA442 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA440 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA439 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA438 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA437 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA436 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA434 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA433 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA432 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA431 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA430 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA428 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA427 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA426 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA425 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA424 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA422 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA421 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA420 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA419 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA418 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA416 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x134++0x03 hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x138++0x03 line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA478 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA477 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA476 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA475 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA474 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA472 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA471 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA470 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA469 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA468 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA466 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA465 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA464 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA463 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA462 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA460 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA459 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA458 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA457 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA456 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA454 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA453 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA452 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA451 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA450 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA448 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x138++0x03 hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F) group.long 0x13C++0x03 line.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA511 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA510 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA509 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA508 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA507 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA506 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA505 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA504 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA503 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA502 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA501 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA500 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA499 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA498 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA497 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA496 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA495 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA494 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA493 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA492 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA491 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA490 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA489 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA488 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA487 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA486 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA485 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA484 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA483 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA482 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA481 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA480 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x13C++0x03 hide.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register" endif tree.end width 24. tree "Interrupt Pending Registers" group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x204++0x03 line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x204++0x03 hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x208++0x03 line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x208++0x03 hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x20C++0x03 line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x20C++0x03 hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x210++0x03 line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x210++0x03 hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x214++0x03 line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x214++0x03 hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x218++0x03 line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x218++0x03 hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x21C++0x03 line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN254 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN253 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN252 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN251 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN250 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN248 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN247 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN246 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN245 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN244 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN242 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN241 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN240 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x21C++0x03 hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x220++0x03 line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN286 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN285 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN284 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN283 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN282 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN280 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN279 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN278 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN277 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN276 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN274 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN273 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN272 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN271 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN270 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN268 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN267 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN266 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN265 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN264 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN262 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN261 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN260 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN259 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN258 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN256 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x220++0x03 hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x224++0x03 line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN318 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN317 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN316 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN315 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN314 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN312 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN311 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN310 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN309 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN308 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN306 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN305 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN304 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN303 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN302 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN300 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN299 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN298 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN297 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN296 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN294 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN293 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN292 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN291 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN290 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN288 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x224++0x03 hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x228++0x03 line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN350 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN349 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN348 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN347 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN346 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN344 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN343 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN342 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN341 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN340 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN338 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN337 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN336 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN335 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN334 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN332 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN331 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN330 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN329 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN328 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN326 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN325 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN324 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN323 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN322 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN320 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x228++0x03 hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x22C++0x03 line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN382 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN381 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN380 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN379 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN378 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN376 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN375 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN374 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN373 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN372 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN370 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN369 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN368 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN367 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN366 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN364 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN363 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN362 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN361 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN360 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN358 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN357 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN356 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN355 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN354 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN352 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x22C++0x03 hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x230++0x03 line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN414 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN413 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN412 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN411 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN410 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN408 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN407 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN406 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN405 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN404 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN402 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN401 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN400 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN399 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN398 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN396 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN395 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN394 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN393 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN392 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN390 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN389 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN388 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN387 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN386 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN384 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x230++0x03 hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x234++0x03 line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN446 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN445 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN444 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN443 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN442 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN440 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN439 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN438 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN437 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN436 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN434 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN433 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN432 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN431 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN430 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN428 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN427 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN426 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN425 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN424 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN422 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN421 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN420 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN419 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN418 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN416 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x234++0x03 hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x238++0x03 line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN478 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN477 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN476 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN475 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN474 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN472 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN471 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN470 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN469 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN468 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN466 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN465 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN464 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN463 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN462 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN460 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN459 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN458 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN457 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN456 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN454 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN453 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN452 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN451 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN450 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN448 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x238++0x03 hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F) group.long 0x23C++0x03 line.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN511 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN510 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN509 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN508 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN507 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN506 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN505 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN504 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN503 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN502 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN501 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN500 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN499 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN498 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN497 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN496 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN495 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN494 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN493 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN492 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN491 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN490 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN489 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN488 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN487 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN486 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN485 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN484 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN483 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN482 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN481 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN480 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x23C++0x03 hide.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register" endif tree.end width 11. tree "Interrupt Active Bit Registers" rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE0,Active Bit Register 0" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) rgroup.long 0x304++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x304++0x03 hide.long 0x00 "ACTIVE1,Active Bit Register 1" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) rgroup.long 0x308++0x03 line.long 0x00 "ACTIVE2,Active Bit Register 2" bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x308++0x03 hide.long 0x00 "ACTIVE2,Active Bit Register 2" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) rgroup.long 0x30C++0x03 line.long 0x00 "ACTIVE3,Active Bit Register 3" bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x30C++0x03 hide.long 0x00 "ACTIVE3,Active Bit Register 3" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) rgroup.long 0x310++0x03 line.long 0x00 "ACTIVE4,Active Bit Register 4" bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x310++0x03 hide.long 0x00 "ACTIVE4,Active Bit Register 4" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) rgroup.long 0x314++0x03 line.long 0x00 "ACTIVE5,Active Bit Register 5" bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x314++0x03 hide.long 0x00 "ACTIVE5,Active Bit Register 5" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) rgroup.long 0x318++0x03 line.long 0x00 "ACTIVE6,Active Bit Register 6" bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x318++0x03 hide.long 0x00 "ACTIVE6,Active Bit Register 6" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) rgroup.long 0x31C++0x03 line.long 0x00 "ACTIVE7,Active Bit Register 7" bitfld.long 0x00 31. " ACTIVE255 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE254 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE253 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE252 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE251 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE250 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE249 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE248 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE247 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE246 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE245 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE244 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE243 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE242 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE241 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE240 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x31C++0x03 hide.long 0x00 "ACTIVE7,Active Bit Register 7" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) rgroup.long 0x320++0x03 line.long 0x00 "ACTIVE8,Active Bit Register 8" bitfld.long 0x00 31. " ACTIVE287 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE286 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE285 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE284 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE283 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE282 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE281 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE280 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE279 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE278 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE277 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE276 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE275 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE274 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE273 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE272 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE271 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE270 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE269 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE268 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE267 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE266 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE265 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE264 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE263 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE262 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE261 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE260 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE259 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE258 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE257 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE256 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x320++0x03 hide.long 0x00 "ACTIVE8,Active Bit Register 8" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) rgroup.long 0x324++0x03 line.long 0x00 "ACTIVE9,Active Bit Register 9" bitfld.long 0x00 31. " ACTIVE319 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE318 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE317 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE316 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE315 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE314 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE313 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE312 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE311 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE310 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE309 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE308 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE307 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE306 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE305 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE304 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE303 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE302 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE301 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE300 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE299 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE298 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE297 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE296 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE295 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE294 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE293 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE292 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE291 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE290 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE289 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE288 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x324++0x03 hide.long 0x00 "ACTIVE9,Active Bit Register 9" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) rgroup.long 0x328++0x03 line.long 0x00 "ACTIVE10,Active Bit Register 10" bitfld.long 0x00 31. " ACTIVE351 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE350 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE349 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE348 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE347 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE346 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE345 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE344 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE343 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE342 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE341 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE340 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE339 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE338 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE337 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE336 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE335 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE334 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE333 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE332 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE331 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE330 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE329 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE328 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE327 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE326 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE325 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE324 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE323 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE322 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE321 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE320 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x328++0x03 hide.long 0x00 "ACTIVE10,Active Bit Register 10" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) rgroup.long 0x32C++0x03 line.long 0x00 "ACTIVE11,Active Bit Register 11" bitfld.long 0x00 31. " ACTIVE383 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE382 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE381 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE380 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE379 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE378 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE377 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE376 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE375 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE374 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE373 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE372 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE371 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE370 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE369 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE368 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE367 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE366 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE365 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE364 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE363 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE362 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE361 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE360 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE359 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE358 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE357 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE356 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE355 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE354 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE353 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE352 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x32C++0x03 hide.long 0x00 "ACTIVE11,Active Bit Register 11" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) rgroup.long 0x330++0x03 line.long 0x00 "ACTIVE12,Active Bit Register 12" bitfld.long 0x00 31. " ACTIVE415 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE414 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE413 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE412 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE411 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE410 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE409 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE408 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE407 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE406 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE405 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE404 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE403 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE402 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE401 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE400 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE399 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE398 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE397 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE396 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE395 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE394 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE393 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE392 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE391 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE390 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE389 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE388 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE387 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE386 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE385 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE384 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x330++0x03 hide.long 0x00 "ACTIVE12,Active Bit Register 12" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) rgroup.long 0x334++0x03 line.long 0x00 "ACTIVE13,Active Bit Register 13" bitfld.long 0x00 31. " ACTIVE447 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE446 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE445 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE444 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE443 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE442 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE441 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE440 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE439 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE438 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE437 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE436 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE435 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE434 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE433 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE432 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE431 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE430 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE429 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE428 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE427 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE426 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE425 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE424 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE423 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE422 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE421 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE420 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE419 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE418 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE417 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE416 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x334++0x03 hide.long 0x00 "ACTIVE13,Active Bit Register 13" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) rgroup.long 0x338++0x03 line.long 0x00 "ACTIVE14,Active Bit Register 14" bitfld.long 0x00 31. " ACTIVE479 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE478 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE477 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE476 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE475 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE474 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE473 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE472 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE471 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE470 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE469 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE468 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE467 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE466 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE465 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE464 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE463 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE462 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE461 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE460 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE459 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE458 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE457 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE456 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE455 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE454 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE453 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE452 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE451 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE450 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE449 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE448 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x338++0x03 hide.long 0x00 "ACTIVE14,Active Bit Register 14" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F) rgroup.long 0x33C++0x03 line.long 0x00 "ACTIVE15,Active Bit Register 15" bitfld.long 0x00 31. " ACTIVE511 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE510 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE509 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE508 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE507 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE506 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE505 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE504 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE503 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE502 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE501 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE500 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE499 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE498 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE497 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE496 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE495 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE494 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE493 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE492 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE491 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE490 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE489 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE488 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE487 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE486 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE485 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE484 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE483 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE482 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE481 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE480 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x33C++0x03 hide.long 0x00 "ACTIVE15,Active Bit Register 15" endif tree.end width 13. tree "Interrupt Target Non-Secure Registers" group.long 0x380++0x03 line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0" bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x384++0x03 line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1" bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure" else hgroup.long 0x384++0x03 hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x388++0x03 line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2" bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure" else hgroup.long 0x388++0x03 hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x38C++0x03 line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3" bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure" else hgroup.long 0x38C++0x03 hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x390++0x03 line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4" bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure" else hgroup.long 0x390++0x03 hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x394++0x03 line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5" bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure" else hgroup.long 0x394++0x03 hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x398++0x03 line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6" bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure" else hgroup.long 0x398++0x03 hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x39C++0x03 line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7" bitfld.long 0x00 31. " ITNS255 ,Interrupt Targets Non-secure 255" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS254 ,Interrupt Targets Non-secure 254" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS253 ,Interrupt Targets Non-secure 253" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS252 ,Interrupt Targets Non-secure 252" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS251 ,Interrupt Targets Non-secure 251" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS250 ,Interrupt Targets Non-secure 250" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS249 ,Interrupt Targets Non-secure 249" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS248 ,Interrupt Targets Non-secure 248" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS247 ,Interrupt Targets Non-secure 247" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS246 ,Interrupt Targets Non-secure 246" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS245 ,Interrupt Targets Non-secure 245" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS244 ,Interrupt Targets Non-secure 244" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS243 ,Interrupt Targets Non-secure 243" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS242 ,Interrupt Targets Non-secure 242" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS241 ,Interrupt Targets Non-secure 241" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS240 ,Interrupt Targets Non-secure 240" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure" else hgroup.long 0x39C++0x03 hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x3A0++0x03 line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8" bitfld.long 0x00 31. " ITNS287 ,Interrupt Targets Non-secure 287" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS286 ,Interrupt Targets Non-secure 286" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS285 ,Interrupt Targets Non-secure 285" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS284 ,Interrupt Targets Non-secure 284" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS283 ,Interrupt Targets Non-secure 283" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS282 ,Interrupt Targets Non-secure 282" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS281 ,Interrupt Targets Non-secure 281" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS280 ,Interrupt Targets Non-secure 280" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS279 ,Interrupt Targets Non-secure 279" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS278 ,Interrupt Targets Non-secure 278" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS277 ,Interrupt Targets Non-secure 277" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS276 ,Interrupt Targets Non-secure 276" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS275 ,Interrupt Targets Non-secure 275" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS274 ,Interrupt Targets Non-secure 274" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS273 ,Interrupt Targets Non-secure 273" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS272 ,Interrupt Targets Non-secure 272" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS271 ,Interrupt Targets Non-secure 271" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS270 ,Interrupt Targets Non-secure 270" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS269 ,Interrupt Targets Non-secure 269" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS268 ,Interrupt Targets Non-secure 268" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS267 ,Interrupt Targets Non-secure 267" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS266 ,Interrupt Targets Non-secure 266" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS265 ,Interrupt Targets Non-secure 265" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS264 ,Interrupt Targets Non-secure 264" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS263 ,Interrupt Targets Non-secure 263" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS262 ,Interrupt Targets Non-secure 262" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS261 ,Interrupt Targets Non-secure 261" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS260 ,Interrupt Targets Non-secure 260" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS259 ,Interrupt Targets Non-secure 259" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS258 ,Interrupt Targets Non-secure 258" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS257 ,Interrupt Targets Non-secure 257" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS256 ,Interrupt Targets Non-secure 256" "Secure,Non-secure" else hgroup.long 0x3A0++0x03 hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x3A4++0x03 line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9" bitfld.long 0x00 31. " ITNS319 ,Interrupt Targets Non-secure 319" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS318 ,Interrupt Targets Non-secure 318" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS317 ,Interrupt Targets Non-secure 317" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS316 ,Interrupt Targets Non-secure 316" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS315 ,Interrupt Targets Non-secure 315" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS314 ,Interrupt Targets Non-secure 314" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS313 ,Interrupt Targets Non-secure 313" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS312 ,Interrupt Targets Non-secure 312" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS311 ,Interrupt Targets Non-secure 311" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS310 ,Interrupt Targets Non-secure 310" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS309 ,Interrupt Targets Non-secure 309" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS308 ,Interrupt Targets Non-secure 308" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS307 ,Interrupt Targets Non-secure 307" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS306 ,Interrupt Targets Non-secure 306" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS305 ,Interrupt Targets Non-secure 305" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS304 ,Interrupt Targets Non-secure 304" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS303 ,Interrupt Targets Non-secure 303" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS302 ,Interrupt Targets Non-secure 302" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS301 ,Interrupt Targets Non-secure 301" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS300 ,Interrupt Targets Non-secure 300" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS299 ,Interrupt Targets Non-secure 299" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS298 ,Interrupt Targets Non-secure 298" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS297 ,Interrupt Targets Non-secure 297" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS296 ,Interrupt Targets Non-secure 296" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS295 ,Interrupt Targets Non-secure 295" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS294 ,Interrupt Targets Non-secure 294" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS293 ,Interrupt Targets Non-secure 293" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS292 ,Interrupt Targets Non-secure 292" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS291 ,Interrupt Targets Non-secure 291" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS290 ,Interrupt Targets Non-secure 290" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS289 ,Interrupt Targets Non-secure 289" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS288 ,Interrupt Targets Non-secure 288" "Secure,Non-secure" else hgroup.long 0x3A4++0x03 hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x3A8++0x03 line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10" bitfld.long 0x00 31. " ITNS351 ,Interrupt Targets Non-secure 351" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS350 ,Interrupt Targets Non-secure 350" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS349 ,Interrupt Targets Non-secure 349" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS348 ,Interrupt Targets Non-secure 348" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS347 ,Interrupt Targets Non-secure 347" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS346 ,Interrupt Targets Non-secure 346" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS345 ,Interrupt Targets Non-secure 345" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS344 ,Interrupt Targets Non-secure 344" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS343 ,Interrupt Targets Non-secure 343" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS342 ,Interrupt Targets Non-secure 342" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS341 ,Interrupt Targets Non-secure 341" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS340 ,Interrupt Targets Non-secure 340" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS339 ,Interrupt Targets Non-secure 339" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS338 ,Interrupt Targets Non-secure 338" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS337 ,Interrupt Targets Non-secure 337" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS336 ,Interrupt Targets Non-secure 336" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS335 ,Interrupt Targets Non-secure 335" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS334 ,Interrupt Targets Non-secure 334" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS333 ,Interrupt Targets Non-secure 333" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS332 ,Interrupt Targets Non-secure 332" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS331 ,Interrupt Targets Non-secure 331" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS330 ,Interrupt Targets Non-secure 330" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS329 ,Interrupt Targets Non-secure 329" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS328 ,Interrupt Targets Non-secure 328" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS327 ,Interrupt Targets Non-secure 327" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS326 ,Interrupt Targets Non-secure 326" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS325 ,Interrupt Targets Non-secure 325" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS324 ,Interrupt Targets Non-secure 324" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS323 ,Interrupt Targets Non-secure 323" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS322 ,Interrupt Targets Non-secure 322" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS321 ,Interrupt Targets Non-secure 321" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS320 ,Interrupt Targets Non-secure 320" "Secure,Non-secure" else hgroup.long 0x3A8++0x03 hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x3AC++0x03 line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11" bitfld.long 0x00 31. " ITNS383 ,Interrupt Targets Non-secure 383" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS382 ,Interrupt Targets Non-secure 382" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS381 ,Interrupt Targets Non-secure 381" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS380 ,Interrupt Targets Non-secure 380" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS379 ,Interrupt Targets Non-secure 379" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS378 ,Interrupt Targets Non-secure 378" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS377 ,Interrupt Targets Non-secure 377" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS376 ,Interrupt Targets Non-secure 376" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS375 ,Interrupt Targets Non-secure 375" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS374 ,Interrupt Targets Non-secure 374" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS373 ,Interrupt Targets Non-secure 373" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS372 ,Interrupt Targets Non-secure 372" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS371 ,Interrupt Targets Non-secure 371" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS370 ,Interrupt Targets Non-secure 370" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS369 ,Interrupt Targets Non-secure 369" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS368 ,Interrupt Targets Non-secure 368" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS367 ,Interrupt Targets Non-secure 367" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS366 ,Interrupt Targets Non-secure 366" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS365 ,Interrupt Targets Non-secure 365" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS364 ,Interrupt Targets Non-secure 364" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS363 ,Interrupt Targets Non-secure 363" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS362 ,Interrupt Targets Non-secure 362" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS361 ,Interrupt Targets Non-secure 361" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS360 ,Interrupt Targets Non-secure 360" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS359 ,Interrupt Targets Non-secure 359" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS358 ,Interrupt Targets Non-secure 358" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS357 ,Interrupt Targets Non-secure 357" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS356 ,Interrupt Targets Non-secure 356" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS355 ,Interrupt Targets Non-secure 355" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS354 ,Interrupt Targets Non-secure 354" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS353 ,Interrupt Targets Non-secure 353" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS352 ,Interrupt Targets Non-secure 352" "Secure,Non-secure" else hgroup.long 0x3AC++0x03 hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x3B0++0x03 line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12" bitfld.long 0x00 31. " ITNS415 ,Interrupt Targets Non-secure 415" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS414 ,Interrupt Targets Non-secure 414" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS413 ,Interrupt Targets Non-secure 413" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS412 ,Interrupt Targets Non-secure 412" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS411 ,Interrupt Targets Non-secure 411" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS410 ,Interrupt Targets Non-secure 410" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS409 ,Interrupt Targets Non-secure 409" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS408 ,Interrupt Targets Non-secure 408" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS407 ,Interrupt Targets Non-secure 407" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS406 ,Interrupt Targets Non-secure 406" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS405 ,Interrupt Targets Non-secure 405" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS404 ,Interrupt Targets Non-secure 404" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS403 ,Interrupt Targets Non-secure 403" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS402 ,Interrupt Targets Non-secure 402" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS401 ,Interrupt Targets Non-secure 401" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS400 ,Interrupt Targets Non-secure 400" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS399 ,Interrupt Targets Non-secure 399" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS398 ,Interrupt Targets Non-secure 398" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS397 ,Interrupt Targets Non-secure 397" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS396 ,Interrupt Targets Non-secure 396" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS395 ,Interrupt Targets Non-secure 395" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS394 ,Interrupt Targets Non-secure 394" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS393 ,Interrupt Targets Non-secure 393" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS392 ,Interrupt Targets Non-secure 392" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS391 ,Interrupt Targets Non-secure 391" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS390 ,Interrupt Targets Non-secure 390" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS389 ,Interrupt Targets Non-secure 389" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS388 ,Interrupt Targets Non-secure 388" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS387 ,Interrupt Targets Non-secure 387" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS386 ,Interrupt Targets Non-secure 386" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS385 ,Interrupt Targets Non-secure 385" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS384 ,Interrupt Targets Non-secure 384" "Secure,Non-secure" else hgroup.long 0x3B0++0x03 hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x3B4++0x03 line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13" bitfld.long 0x00 31. " ITNS447 ,Interrupt Targets Non-secure 447" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS446 ,Interrupt Targets Non-secure 446" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS445 ,Interrupt Targets Non-secure 445" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS444 ,Interrupt Targets Non-secure 444" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS443 ,Interrupt Targets Non-secure 443" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS442 ,Interrupt Targets Non-secure 442" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS441 ,Interrupt Targets Non-secure 441" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS440 ,Interrupt Targets Non-secure 440" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS439 ,Interrupt Targets Non-secure 439" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS438 ,Interrupt Targets Non-secure 438" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS437 ,Interrupt Targets Non-secure 437" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS436 ,Interrupt Targets Non-secure 436" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS435 ,Interrupt Targets Non-secure 435" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS434 ,Interrupt Targets Non-secure 434" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS433 ,Interrupt Targets Non-secure 433" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS432 ,Interrupt Targets Non-secure 432" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS431 ,Interrupt Targets Non-secure 431" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS430 ,Interrupt Targets Non-secure 430" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS429 ,Interrupt Targets Non-secure 429" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS428 ,Interrupt Targets Non-secure 428" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS427 ,Interrupt Targets Non-secure 427" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS426 ,Interrupt Targets Non-secure 426" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS425 ,Interrupt Targets Non-secure 425" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS424 ,Interrupt Targets Non-secure 424" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS423 ,Interrupt Targets Non-secure 423" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS422 ,Interrupt Targets Non-secure 422" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS421 ,Interrupt Targets Non-secure 421" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS420 ,Interrupt Targets Non-secure 420" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS419 ,Interrupt Targets Non-secure 419" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS418 ,Interrupt Targets Non-secure 418" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS417 ,Interrupt Targets Non-secure 417" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS416 ,Interrupt Targets Non-secure 416" "Secure,Non-secure" else hgroup.long 0x3B4++0x03 hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x3B8++0x03 line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14" bitfld.long 0x00 31. " ITNS479 ,Interrupt Targets Non-secure 479" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS478 ,Interrupt Targets Non-secure 478" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS477 ,Interrupt Targets Non-secure 477" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS476 ,Interrupt Targets Non-secure 476" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS475 ,Interrupt Targets Non-secure 475" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS474 ,Interrupt Targets Non-secure 474" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS473 ,Interrupt Targets Non-secure 473" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS472 ,Interrupt Targets Non-secure 472" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS471 ,Interrupt Targets Non-secure 471" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS470 ,Interrupt Targets Non-secure 470" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS469 ,Interrupt Targets Non-secure 469" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS468 ,Interrupt Targets Non-secure 468" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS467 ,Interrupt Targets Non-secure 467" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS466 ,Interrupt Targets Non-secure 466" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS465 ,Interrupt Targets Non-secure 465" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS464 ,Interrupt Targets Non-secure 464" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS463 ,Interrupt Targets Non-secure 463" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS462 ,Interrupt Targets Non-secure 462" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS461 ,Interrupt Targets Non-secure 461" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS460 ,Interrupt Targets Non-secure 460" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS459 ,Interrupt Targets Non-secure 459" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS458 ,Interrupt Targets Non-secure 458" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS457 ,Interrupt Targets Non-secure 457" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS456 ,Interrupt Targets Non-secure 456" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS455 ,Interrupt Targets Non-secure 455" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS454 ,Interrupt Targets Non-secure 454" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS453 ,Interrupt Targets Non-secure 453" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS452 ,Interrupt Targets Non-secure 452" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS451 ,Interrupt Targets Non-secure 451" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS450 ,Interrupt Targets Non-secure 450" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS449 ,Interrupt Targets Non-secure 449" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS448 ,Interrupt Targets Non-secure 448" "Secure,Non-secure" else hgroup.long 0x3B8++0x03 hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x0F) group.long 0x3BC++0x03 line.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15" bitfld.long 0x00 31. " ITNS511 ,Interrupt Targets Non-secure 511" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS510 ,Interrupt Targets Non-secure 510" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS509 ,Interrupt Targets Non-secure 509" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS508 ,Interrupt Targets Non-secure 508" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS507 ,Interrupt Targets Non-secure 507" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS506 ,Interrupt Targets Non-secure 506" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS505 ,Interrupt Targets Non-secure 505" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS504 ,Interrupt Targets Non-secure 504" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS503 ,Interrupt Targets Non-secure 503" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS502 ,Interrupt Targets Non-secure 502" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS501 ,Interrupt Targets Non-secure 501" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS500 ,Interrupt Targets Non-secure 500" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS499 ,Interrupt Targets Non-secure 499" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS498 ,Interrupt Targets Non-secure 498" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS497 ,Interrupt Targets Non-secure 497" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS496 ,Interrupt Targets Non-secure 496" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS495 ,Interrupt Targets Non-secure 495" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS494 ,Interrupt Targets Non-secure 494" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS493 ,Interrupt Targets Non-secure 493" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS492 ,Interrupt Targets Non-secure 492" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS491 ,Interrupt Targets Non-secure 491" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS490 ,Interrupt Targets Non-secure 490" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS489 ,Interrupt Targets Non-secure 489" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS488 ,Interrupt Targets Non-secure 488" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS487 ,Interrupt Targets Non-secure 487" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS486 ,Interrupt Targets Non-secure 486" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS485 ,Interrupt Targets Non-secure 485" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS484 ,Interrupt Targets Non-secure 484" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS483 ,Interrupt Targets Non-secure 483" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS482 ,Interrupt Targets Non-secure 482" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS481 ,Interrupt Targets Non-secure 481" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS480 ,Interrupt Targets Non-secure 480" "Secure,Non-secure" else hgroup.long 0x3BC++0x03 hide.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15" endif tree.end tree "Interrupt Priority Registers" group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x420++0x1F line.long 0x0 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x4 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x8 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0xC "IPR11,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x10 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x14 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x18 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x1C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" else hgroup.long 0x420++0x1F hide.long 0x0 "IPR8,Interrupt Priority Register" hide.long 0x4 "IPR9,Interrupt Priority Register" hide.long 0x8 "IPR10,Interrupt Priority Register" hide.long 0xC "IPR11,Interrupt Priority Register" hide.long 0x10 "IPR12,Interrupt Priority Register" hide.long 0x14 "IPR13,Interrupt Priority Register" hide.long 0x18 "IPR14,Interrupt Priority Register" hide.long 0x1C "IPR15,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x440++0x1F line.long 0x0 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x4 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x8 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0xC "IPR19,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x10 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x14 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x18 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x1C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" else hgroup.long 0x440++0x1F hide.long 0x0 "IPR16,Interrupt Priority Register" hide.long 0x4 "IPR17,Interrupt Priority Register" hide.long 0x8 "IPR18,Interrupt Priority Register" hide.long 0xC "IPR19,Interrupt Priority Register" hide.long 0x10 "IPR20,Interrupt Priority Register" hide.long 0x14 "IPR21,Interrupt Priority Register" hide.long 0x18 "IPR22,Interrupt Priority Register" hide.long 0x1C "IPR23,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x460++0x1F line.long 0x0 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x4 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x8 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0xC "IPR27,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x10 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x14 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x18 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x1C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" else hgroup.long 0x460++0x1F hide.long 0x0 "IPR24,Interrupt Priority Register" hide.long 0x4 "IPR25,Interrupt Priority Register" hide.long 0x8 "IPR26,Interrupt Priority Register" hide.long 0xC "IPR27,Interrupt Priority Register" hide.long 0x10 "IPR28,Interrupt Priority Register" hide.long 0x14 "IPR29,Interrupt Priority Register" hide.long 0x18 "IPR30,Interrupt Priority Register" hide.long 0x1C "IPR31,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x480++0x1F line.long 0x0 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x4 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x8 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0xC "IPR35,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x10 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x14 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x18 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x1C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" else hgroup.long 0x480++0x1F hide.long 0x0 "IPR32,Interrupt Priority Register" hide.long 0x4 "IPR33,Interrupt Priority Register" hide.long 0x8 "IPR34,Interrupt Priority Register" hide.long 0xC "IPR35,Interrupt Priority Register" hide.long 0x10 "IPR36,Interrupt Priority Register" hide.long 0x14 "IPR37,Interrupt Priority Register" hide.long 0x18 "IPR38,Interrupt Priority Register" hide.long 0x1C "IPR39,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x4A0++0x1F line.long 0x0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0x4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0x8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0x10 "IPR44,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0x14 "IPR45,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0x18 "IPR46,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0x1C "IPR47,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" else hgroup.long 0x4A0++0x1F hide.long 0x0 "IPR40,Interrupt Priority Register" hide.long 0x4 "IPR41,Interrupt Priority Register" hide.long 0x8 "IPR42,Interrupt Priority Register" hide.long 0xC "IPR43,Interrupt Priority Register" hide.long 0x10 "IPR44,Interrupt Priority Register" hide.long 0x14 "IPR45,Interrupt Priority Register" hide.long 0x18 "IPR46,Interrupt Priority Register" hide.long 0x1C "IPR47,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x4C0++0x1F line.long 0x0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0x4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0x8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0x10 "IPR52,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0x14 "IPR53,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0x18 "IPR54,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0x1C "IPR55,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" else hgroup.long 0x4C0++0x1F hide.long 0x0 "IPR48,Interrupt Priority Register" hide.long 0x4 "IPR49,Interrupt Priority Register" hide.long 0x8 "IPR50,Interrupt Priority Register" hide.long 0xC "IPR51,Interrupt Priority Register" hide.long 0x10 "IPR52,Interrupt Priority Register" hide.long 0x14 "IPR53,Interrupt Priority Register" hide.long 0x18 "IPR54,Interrupt Priority Register" hide.long 0x1C "IPR55,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x4E0++0x1F line.long 0x0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0x4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0x8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" line.long 0x10 "IPR60,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_243 ,Interrupt 243 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_242 ,Interrupt 242 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_241 ,Interrupt 241 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_240 ,Interrupt 240 Priority" line.long 0x14 "IPR61,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_247 ,Interrupt 247 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_246 ,Interrupt 246 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_245 ,Interrupt 245 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_244 ,Interrupt 244 Priority" line.long 0x18 "IPR62,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_251 ,Interrupt 251 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_250 ,Interrupt 250 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_249 ,Interrupt 249 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_248 ,Interrupt 248 Priority" line.long 0x1C "IPR63,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_255 ,Interrupt 255 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_254 ,Interrupt 254 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_253 ,Interrupt 253 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_252 ,Interrupt 252 Priority" else hgroup.long 0x4E0++0x1F hide.long 0x0 "IPR56,Interrupt Priority Register" hide.long 0x4 "IPR57,Interrupt Priority Register" hide.long 0x8 "IPR58,Interrupt Priority Register" hide.long 0xC "IPR59,Interrupt Priority Register" hide.long 0x10 "IPR60,Interrupt Priority Register" hide.long 0x14 "IPR61,Interrupt Priority Register" hide.long 0x18 "IPR62,Interrupt Priority Register" hide.long 0x1C "IPR63,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x500++0x1F line.long 0x0 "IPR64,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_259 ,Interrupt 259 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_258 ,Interrupt 258 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_257 ,Interrupt 257 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_256 ,Interrupt 256 Priority" line.long 0x4 "IPR65,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_263 ,Interrupt 263 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_262 ,Interrupt 262 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_261 ,Interrupt 261 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_260 ,Interrupt 260 Priority" line.long 0x8 "IPR66,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_267 ,Interrupt 267 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_266 ,Interrupt 266 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_265 ,Interrupt 265 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_264 ,Interrupt 264 Priority" line.long 0xC "IPR67,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_271 ,Interrupt 271 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_270 ,Interrupt 270 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_269 ,Interrupt 269 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_268 ,Interrupt 268 Priority" line.long 0x10 "IPR68,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_275 ,Interrupt 275 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_274 ,Interrupt 274 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_273 ,Interrupt 273 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_272 ,Interrupt 272 Priority" line.long 0x14 "IPR69,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_279 ,Interrupt 279 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_278 ,Interrupt 278 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_277 ,Interrupt 277 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_276 ,Interrupt 276 Priority" line.long 0x18 "IPR70,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_283 ,Interrupt 283 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_282 ,Interrupt 282 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_281 ,Interrupt 281 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_280 ,Interrupt 280 Priority" line.long 0x1C "IPR71,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_287 ,Interrupt 287 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_286 ,Interrupt 286 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_285 ,Interrupt 285 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_284 ,Interrupt 284 Priority" else hgroup.long 0x500++0x1F hide.long 0x0 "IPR64,Interrupt Priority Register" hide.long 0x4 "IPR65,Interrupt Priority Register" hide.long 0x8 "IPR66,Interrupt Priority Register" hide.long 0xC "IPR67,Interrupt Priority Register" hide.long 0x10 "IPR68,Interrupt Priority Register" hide.long 0x14 "IPR69,Interrupt Priority Register" hide.long 0x18 "IPR70,Interrupt Priority Register" hide.long 0x1C "IPR71,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x520++0x1F line.long 0x0 "IPR72,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_291 ,Interrupt 291 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_290 ,Interrupt 290 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_289 ,Interrupt 289 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_288 ,Interrupt 288 Priority" line.long 0x4 "IPR73,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_295 ,Interrupt 295 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_294 ,Interrupt 294 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_293 ,Interrupt 293 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_292 ,Interrupt 292 Priority" line.long 0x8 "IPR74,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_299 ,Interrupt 299 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_298 ,Interrupt 298 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_297 ,Interrupt 297 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_296 ,Interrupt 296 Priority" line.long 0xC "IPR75,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_303 ,Interrupt 303 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_302 ,Interrupt 302 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_301 ,Interrupt 301 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_300 ,Interrupt 300 Priority" line.long 0x10 "IPR76,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_307 ,Interrupt 307 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_306 ,Interrupt 306 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_305 ,Interrupt 305 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_304 ,Interrupt 304 Priority" line.long 0x14 "IPR77,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_311 ,Interrupt 311 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_310 ,Interrupt 310 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_309 ,Interrupt 309 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_308 ,Interrupt 308 Priority" line.long 0x18 "IPR78,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_315 ,Interrupt 315 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_314 ,Interrupt 314 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_313 ,Interrupt 313 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_312 ,Interrupt 312 Priority" line.long 0x1C "IPR79,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_319 ,Interrupt 319 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_318 ,Interrupt 318 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_317 ,Interrupt 317 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_316 ,Interrupt 316 Priority" else hgroup.long 0x520++0x1F hide.long 0x0 "IPR72,Interrupt Priority Register" hide.long 0x4 "IPR73,Interrupt Priority Register" hide.long 0x8 "IPR74,Interrupt Priority Register" hide.long 0xC "IPR75,Interrupt Priority Register" hide.long 0x10 "IPR76,Interrupt Priority Register" hide.long 0x14 "IPR77,Interrupt Priority Register" hide.long 0x18 "IPR78,Interrupt Priority Register" hide.long 0x1C "IPR79,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x540++0x1F line.long 0x0 "IPR80,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_323 ,Interrupt 323 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_322 ,Interrupt 322 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_321 ,Interrupt 321 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_320 ,Interrupt 320 Priority" line.long 0x4 "IPR81,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_327 ,Interrupt 327 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_326 ,Interrupt 326 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_325 ,Interrupt 325 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_324 ,Interrupt 324 Priority" line.long 0x8 "IPR82,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_331 ,Interrupt 331 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_330 ,Interrupt 330 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_329 ,Interrupt 329 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_328 ,Interrupt 328 Priority" line.long 0xC "IPR83,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_335 ,Interrupt 335 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_334 ,Interrupt 334 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_333 ,Interrupt 333 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_332 ,Interrupt 332 Priority" line.long 0x10 "IPR84,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_339 ,Interrupt 339 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_338 ,Interrupt 338 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_337 ,Interrupt 337 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_336 ,Interrupt 336 Priority" line.long 0x14 "IPR85,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_343 ,Interrupt 343 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_342 ,Interrupt 342 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_341 ,Interrupt 341 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_340 ,Interrupt 340 Priority" line.long 0x18 "IPR86,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_347 ,Interrupt 347 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_346 ,Interrupt 346 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_345 ,Interrupt 345 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_344 ,Interrupt 344 Priority" line.long 0x1C "IPR87,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_351 ,Interrupt 351 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_350 ,Interrupt 350 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_349 ,Interrupt 349 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_348 ,Interrupt 348 Priority" else hgroup.long 0x540++0x1F hide.long 0x0 "IPR80,Interrupt Priority Register" hide.long 0x4 "IPR81,Interrupt Priority Register" hide.long 0x8 "IPR82,Interrupt Priority Register" hide.long 0xC "IPR83,Interrupt Priority Register" hide.long 0x10 "IPR84,Interrupt Priority Register" hide.long 0x14 "IPR85,Interrupt Priority Register" hide.long 0x18 "IPR86,Interrupt Priority Register" hide.long 0x1C "IPR87,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x560++0x1F line.long 0x0 "IPR88,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_355 ,Interrupt 355 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_354 ,Interrupt 354 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_353 ,Interrupt 353 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_352 ,Interrupt 352 Priority" line.long 0x4 "IPR89,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_359 ,Interrupt 359 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_358 ,Interrupt 358 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_357 ,Interrupt 357 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_356 ,Interrupt 356 Priority" line.long 0x8 "IPR90,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_363 ,Interrupt 363 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_362 ,Interrupt 362 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_361 ,Interrupt 361 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_360 ,Interrupt 360 Priority" line.long 0xC "IPR91,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_367 ,Interrupt 367 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_366 ,Interrupt 366 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_365 ,Interrupt 365 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_364 ,Interrupt 364 Priority" line.long 0x10 "IPR92,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_371 ,Interrupt 371 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_370 ,Interrupt 370 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_369 ,Interrupt 369 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_368 ,Interrupt 368 Priority" line.long 0x14 "IPR93,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_375 ,Interrupt 375 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_374 ,Interrupt 374 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_373 ,Interrupt 373 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_372 ,Interrupt 372 Priority" line.long 0x18 "IPR94,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_379 ,Interrupt 379 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_378 ,Interrupt 378 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_377 ,Interrupt 377 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_376 ,Interrupt 376 Priority" line.long 0x1C "IPR95,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_383 ,Interrupt 383 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_382 ,Interrupt 382 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_381 ,Interrupt 381 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_380 ,Interrupt 380 Priority" else hgroup.long 0x560++0x1F hide.long 0x0 "IPR88,Interrupt Priority Register" hide.long 0x4 "IPR89,Interrupt Priority Register" hide.long 0x8 "IPR90,Interrupt Priority Register" hide.long 0xC "IPR91,Interrupt Priority Register" hide.long 0x10 "IPR92,Interrupt Priority Register" hide.long 0x14 "IPR93,Interrupt Priority Register" hide.long 0x18 "IPR94,Interrupt Priority Register" hide.long 0x1C "IPR95,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x580++0x1F line.long 0x0 "IPR96,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_387 ,Interrupt 387 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_386 ,Interrupt 386 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_385 ,Interrupt 385 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_384 ,Interrupt 384 Priority" line.long 0x4 "IPR97,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_391 ,Interrupt 391 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_390 ,Interrupt 390 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_389 ,Interrupt 389 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_388 ,Interrupt 388 Priority" line.long 0x8 "IPR98,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_395 ,Interrupt 395 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_394 ,Interrupt 394 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_393 ,Interrupt 393 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_392 ,Interrupt 392 Priority" line.long 0xC "IPR99,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_399 ,Interrupt 399 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_398 ,Interrupt 398 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_397 ,Interrupt 397 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_396 ,Interrupt 396 Priority" line.long 0x10 "IPR100,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_403 ,Interrupt 403 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_402 ,Interrupt 402 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_401 ,Interrupt 401 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_400 ,Interrupt 400 Priority" line.long 0x14 "IPR101,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_407 ,Interrupt 407 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_406 ,Interrupt 406 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_405 ,Interrupt 405 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_404 ,Interrupt 404 Priority" line.long 0x18 "IPR102,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_411 ,Interrupt 411 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_410 ,Interrupt 410 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_409 ,Interrupt 409 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_408 ,Interrupt 408 Priority" line.long 0x1C "IPR103,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_415 ,Interrupt 415 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_414 ,Interrupt 414 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_413 ,Interrupt 413 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_412 ,Interrupt 412 Priority" else hgroup.long 0x580++0x1F hide.long 0x0 "IPR96,Interrupt Priority Register" hide.long 0x4 "IPR97,Interrupt Priority Register" hide.long 0x8 "IPR98,Interrupt Priority Register" hide.long 0xC "IPR99,Interrupt Priority Register" hide.long 0x10 "IPR100,Interrupt Priority Register" hide.long 0x14 "IPR101,Interrupt Priority Register" hide.long 0x18 "IPR102,Interrupt Priority Register" hide.long 0x1C "IPR103,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x5A0++0x1F line.long 0x0 "IPR104,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_419 ,Interrupt 419 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_418 ,Interrupt 418 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_417 ,Interrupt 417 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_416 ,Interrupt 416 Priority" line.long 0x4 "IPR105,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_423 ,Interrupt 423 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_422 ,Interrupt 422 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_421 ,Interrupt 421 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_420 ,Interrupt 420 Priority" line.long 0x8 "IPR106,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_427 ,Interrupt 427 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_426 ,Interrupt 426 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_425 ,Interrupt 425 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_424 ,Interrupt 424 Priority" line.long 0xC "IPR107,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_431 ,Interrupt 431 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_430 ,Interrupt 430 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_429 ,Interrupt 429 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_428 ,Interrupt 428 Priority" line.long 0x10 "IPR108,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_435 ,Interrupt 435 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_434 ,Interrupt 434 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_433 ,Interrupt 433 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_432 ,Interrupt 432 Priority" line.long 0x14 "IPR109,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_439 ,Interrupt 439 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_438 ,Interrupt 438 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_437 ,Interrupt 437 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_436 ,Interrupt 436 Priority" line.long 0x18 "IPR110,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_443 ,Interrupt 443 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_442 ,Interrupt 442 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_441 ,Interrupt 441 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_440 ,Interrupt 440 Priority" line.long 0x1C "IPR111,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_447 ,Interrupt 447 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_446 ,Interrupt 446 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_445 ,Interrupt 445 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_444 ,Interrupt 444 Priority" else hgroup.long 0x5A0++0x1F hide.long 0x0 "IPR104,Interrupt Priority Register" hide.long 0x4 "IPR105,Interrupt Priority Register" hide.long 0x8 "IPR106,Interrupt Priority Register" hide.long 0xC "IPR107,Interrupt Priority Register" hide.long 0x10 "IPR108,Interrupt Priority Register" hide.long 0x14 "IPR109,Interrupt Priority Register" hide.long 0x18 "IPR110,Interrupt Priority Register" hide.long 0x1C "IPR111,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x5C0++0x1F line.long 0x0 "IPR112,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_451 ,Interrupt 451 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_450 ,Interrupt 450 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_449 ,Interrupt 449 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_448 ,Interrupt 448 Priority" line.long 0x4 "IPR113,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_455 ,Interrupt 455 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_454 ,Interrupt 454 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_453 ,Interrupt 453 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_452 ,Interrupt 452 Priority" line.long 0x8 "IPR114,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_459 ,Interrupt 459 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_458 ,Interrupt 458 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_457 ,Interrupt 457 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_456 ,Interrupt 456 Priority" line.long 0xC "IPR115,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_463 ,Interrupt 463 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_462 ,Interrupt 462 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_461 ,Interrupt 461 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_460 ,Interrupt 460 Priority" line.long 0x10 "IPR116,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_467 ,Interrupt 467 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_466 ,Interrupt 466 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_465 ,Interrupt 465 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_464 ,Interrupt 464 Priority" line.long 0x14 "IPR117,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_471 ,Interrupt 471 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_470 ,Interrupt 470 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_469 ,Interrupt 469 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_468 ,Interrupt 468 Priority" line.long 0x18 "IPR118,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_475 ,Interrupt 475 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_474 ,Interrupt 474 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_473 ,Interrupt 473 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_472 ,Interrupt 472 Priority" line.long 0x1C "IPR119,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_479 ,Interrupt 479 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_478 ,Interrupt 478 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_477 ,Interrupt 477 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_476 ,Interrupt 476 Priority" else hgroup.long 0x5C0++0x1F hide.long 0x0 "IPR112,Interrupt Priority Register" hide.long 0x4 "IPR113,Interrupt Priority Register" hide.long 0x8 "IPR114,Interrupt Priority Register" hide.long 0xC "IPR115,Interrupt Priority Register" hide.long 0x10 "IPR116,Interrupt Priority Register" hide.long 0x14 "IPR117,Interrupt Priority Register" hide.long 0x18 "IPR118,Interrupt Priority Register" hide.long 0x1C "IPR119,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end sif (CORENAME()=="CORTEXM33F") tree "Floating-point Unit (FPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 8. group.long 0xF34++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 29. " LSPENS ,This bit controls whether the LSPEN bit is writeable from the Non-secure state" "Writeable,Write ignored" newline bitfld.long 0x00 28. " CLRONRET ,Clear floating point caller saved registers on exception return" "Disabled,Enabled" bitfld.long 0x00 27. " CLRONRETS ,Clear on return Secure only" "Both states,Secure only" bitfld.long 0x00 26. " TS ,Treat as Secure" "Disabled,Enabled" newline bitfld.long 0x00 10. " UFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the UsageFault exception to pending" "Not able,Able" bitfld.long 0x00 9. " SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" newline bitfld.long 0x00 7. " SFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able" bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" newline bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 2. " S ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure" newline bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" newline bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" rgroup.long 0xF40++0x0B line.long 0x00 "MVFR0,Media and FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..." bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..." bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..." newline bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..." bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media and FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..." newline bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Fully denormalized,?..." line.long 0x08 "MVFR2,Media and FP Feature Register 2" bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..." width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end endif tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 13. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" newline eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" newline hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in newline wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register" group.long 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" newline bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" newline bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif newline group.long 0xE04++0x07 line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register" bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN" bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN" line.long 0x04 "DSCSR,Debug Security Control and Status Register" bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure" bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure" bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled" rgroup.long 0xFB8++0x03 line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented" bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1" bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented" bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1" newline bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented" bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1" bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented" bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 12. group.long 0x00++0x03 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,?..." rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" textline " " if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x04))&0x20000000)==0x20000000) rgroup.long 0x04++0x03 line.long 0x00 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported" hexmask.long 0x00 5.--28. 0x20 " REMAP ,Remap address" else rgroup.long 0x04++0x03 line.long 0x00 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif tree "CoreSight Identification Registers" width 12. rgroup.long 0xFCC++0x03 line.long 0x00 "FP_DEVTYPE,FPB CoreSight Device Type Register" hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type" hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFE0++0x0F line.long 0x00 "FP_PIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "FP_PIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "FP_PIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "FP_PIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "FP_CIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "FP_CIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "FP_CIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0b else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 16. group.long 0x00++0x03 line.long 0x00 "DWT_CTRL,Control Register" rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,?..." rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" textline " " rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" textline " " bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x1000000)==0x0000000) group.long 0x04++0x03 line.long 0x00 "DWT_CYCCNT,Cycle Count register" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x0000000) group.long 0x08++0x17 line.long 0x00 "DWT_CPICNT,CPI Count register" hexmask.long.byte 0x00 0.--7. 1. " CPICNT ,Base instruction overhead counter" line.long 0x04 "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x04 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x08 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x10 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x10 0.--7. 1. " LSUCNT ,Load-store overhead counter" line.long 0x14 "DWT_FOLDCNT,Folded-instruction Count register" hexmask.long.byte 0x14 0.--7. 1. " FOLDCNT ,Folded-instruction counter" endif rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" textline " " if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" endif group.long (0x20+0x08)++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" endif group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" endif group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" endif group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" tree "CoreSight Identification Registers" width 13. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFCC++0x03 line.long 0x00 "DWT_DEVTYPE,Device Type Identifier register" hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type" hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type" rgroup.long 0xFE0++0x0F line.long 0x00 "DWT_PIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "DWT_PIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "DWT_PIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "DWT_PIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "DWT_CIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "DWT_CIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "DWT_CIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0b else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end tree "AAR (Accelerated Address Resolver)" base ad:0x0 tree "GLOBAL_AAR00_NS" base ad:0x40046000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start resolving addresses based on IRKs specified in the IRK data structure" bitfld.long 0x0 0. "TASKS_START,Start resolving addresses based on IRKs specified in the IRK data structure" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop resolving addresses" bitfld.long 0x4 0. "TASKS_STOP,Stop resolving addresses" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0xF line.long 0x0 "EVENTS_END,Address resolution procedure complete or ended due to an error" bitfld.long 0x0 0. "EVENTS_END,Address resolution procedure complete or ended due to an error" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RESOLVED,Address resolved" bitfld.long 0x4 0. "EVENTS_RESOLVED,Address resolved" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_NOTRESOLVED,Address not resolved" bitfld.long 0x8 0. "EVENTS_NOTRESOLVED,Address not resolved" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_ERROR,Operation aborted because of a STOP task or due to an error This event does not generate an interrupt" bitfld.long 0xC 0. "EVENTS_ERROR,Operation aborted because of a STOP task or due to an error This event does not generate an interrupt" "0: Event not generated,1: Event generated" group.long 0x180++0xF line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "PUBLISH_RESOLVED,Publish configuration for event RESOLVED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event RESOLVED will publish to" line.long 0x8 "PUBLISH_NOTRESOLVED,Publish configuration for event NOTRESOLVED" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event NOTRESOLVED will publish to" line.long 0xC "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 3. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x0 2. "NOTRESOLVED,Write '1' to enable interrupt for event NOTRESOLVED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "RESOLVED,Write '1' to enable interrupt for event RESOLVED" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 3. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x4 2. "NOTRESOLVED,Write '1' to disable interrupt for event NOTRESOLVED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "RESOLVED,Write '1' to disable interrupt for event RESOLVED" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x404++0x3 line.long 0x0 "ERRORSTATUS,Error status" bitfld.long 0x0 0.--2. "ERRORSTATUS,Error status when the ERROR event is generated" "0: No errors have occurred,1: End of INPTR job list before data structure was..,?,?,4: Bus error during DMA access.,?,?,?" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable AAR" bitfld.long 0x0 0.--1. "ENABLE,Enable or disable AAR" "0: Disable,?,?,3: Enable" group.long 0x508++0x3 line.long 0x0 "MAXRESOLVED,Maximum number of IRKs to resolve" hexmask.long.word 0x0 0.--11. 1. "MAXRESOLVED,The maximum number of IRKs to resolve" tree "IN" base ad:0x40046530 group.long 0x0++0x3 line.long 0x0 "PTR,Input pointer" hexmask.long 0x0 0.--31. 1. "PTR,Points to a job list containing AAR data structure" tree.end tree "OUT" base ad:0x40046538 group.long 0x0++0x3 line.long 0x0 "PTR,Output pointer" hexmask.long 0x0 0.--31. 1. "PTR,Output pointer" rgroup.long 0x4++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction" hexmask.long.byte 0x0 0.--7. 1. "AMOUNT,Number of bytes written to memory after triggering the START task." tree.end tree.end tree "GLOBAL_AAR00_S" base ad:0x50046000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start resolving addresses based on IRKs specified in the IRK data structure" bitfld.long 0x0 0. "TASKS_START,Start resolving addresses based on IRKs specified in the IRK data structure" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop resolving addresses" bitfld.long 0x4 0. "TASKS_STOP,Stop resolving addresses" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0xF line.long 0x0 "EVENTS_END,Address resolution procedure complete or ended due to an error" bitfld.long 0x0 0. "EVENTS_END,Address resolution procedure complete or ended due to an error" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RESOLVED,Address resolved" bitfld.long 0x4 0. "EVENTS_RESOLVED,Address resolved" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_NOTRESOLVED,Address not resolved" bitfld.long 0x8 0. "EVENTS_NOTRESOLVED,Address not resolved" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_ERROR,Operation aborted because of a STOP task or due to an error This event does not generate an interrupt" bitfld.long 0xC 0. "EVENTS_ERROR,Operation aborted because of a STOP task or due to an error This event does not generate an interrupt" "0: Event not generated,1: Event generated" group.long 0x180++0xF line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "PUBLISH_RESOLVED,Publish configuration for event RESOLVED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event RESOLVED will publish to" line.long 0x8 "PUBLISH_NOTRESOLVED,Publish configuration for event NOTRESOLVED" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event NOTRESOLVED will publish to" line.long 0xC "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 3. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x0 2. "NOTRESOLVED,Write '1' to enable interrupt for event NOTRESOLVED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "RESOLVED,Write '1' to enable interrupt for event RESOLVED" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 3. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x4 2. "NOTRESOLVED,Write '1' to disable interrupt for event NOTRESOLVED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "RESOLVED,Write '1' to disable interrupt for event RESOLVED" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x404++0x3 line.long 0x0 "ERRORSTATUS,Error status" bitfld.long 0x0 0.--2. "ERRORSTATUS,Error status when the ERROR event is generated" "0: No errors have occurred,1: End of INPTR job list before data structure was..,?,?,4: Bus error during DMA access.,?,?,?" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable AAR" bitfld.long 0x0 0.--1. "ENABLE,Enable or disable AAR" "0: Disable,?,?,3: Enable" group.long 0x508++0x3 line.long 0x0 "MAXRESOLVED,Maximum number of IRKs to resolve" hexmask.long.word 0x0 0.--11. 1. "MAXRESOLVED,The maximum number of IRKs to resolve" tree "IN" base ad:0x50046000 group.long 0x0++0x3 line.long 0x0 "PTR,Input pointer" hexmask.long 0x0 0.--31. 1. "PTR,Points to a job list containing AAR data structure" tree.end tree "OUT" base ad:0x50046000 group.long 0x0++0x3 line.long 0x0 "PTR,Output pointer" hexmask.long 0x0 0.--31. 1. "PTR,Output pointer" rgroup.long 0x4++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction" hexmask.long.byte 0x0 0.--7. 1. "AMOUNT,Number of bytes written to memory after triggering the START task." tree.end tree.end tree.end tree "CACHE" base ad:0x0 tree "ICACHE_S" base ad:0xE0082000 wgroup.long 0x8++0x3 line.long 0x0 "TASKS_INVALIDATECACHE,Invalidate the cache." bitfld.long 0x0 0. "TASKS_INVALIDATECACHE,Invalidate the cache." "?,1: Trigger task" wgroup.long 0x14++0x3 line.long 0x0 "TASKS_INVALIDATELINE,Invalidate the line." bitfld.long 0x0 0. "TASKS_INVALIDATELINE,Invalidate the line." "?,1: Trigger task" wgroup.long 0x20++0x3 line.long 0x0 "TASKS_ERASE,Erase the cache." bitfld.long 0x0 0. "TASKS_ERASE,Erase the cache." "?,1: Trigger task" rgroup.long 0x400++0x3 line.long 0x0 "STATUS,Status of the cache activities." bitfld.long 0x0 0. "READY,Ready status." "0: Activity is done and ready for the next activity.,1: Activity is in progress." group.long 0x404++0x3 line.long 0x0 "ENABLE,Enable cache." bitfld.long 0x0 0. "ENABLE,Enable cache" "0: Disable cache,1: Enable cache" group.long 0x410++0x3 line.long 0x0 "LINEADDR,Memory address covered by the line to be maintained." hexmask.long 0x0 0.--31. 1. "ADDR,Address." tree "PROFILING" base ad:0xE0082414 group.long 0x0++0x3 line.long 0x0 "ENABLE,Enable the profiling counters." bitfld.long 0x0 0. "ENABLE,Enable the profiling counters" "0: Disable profiling,1: Enable profiling" wgroup.long 0x4++0x3 line.long 0x0 "CLEAR,Clear the profiling counters." bitfld.long 0x0 0. "CLEAR,Clearing the profiling counters" "?,1: Clear the profiling counters" rgroup.long 0x8++0x13 line.long 0x0 "HIT,The cache hit counter for cache region." hexmask.long 0x0 0.--31. 1. "HITS,Number of cache hits" line.long 0x4 "MISS,The cache miss counter for cache region." hexmask.long 0x4 0.--31. 1. "MISSES,Number of cache misses" line.long 0x8 "LMISS,The cache line miss counter for cache region." hexmask.long 0x8 0.--31. 1. "LMISSES,Number of cache line misses" line.long 0xC "READS,Number of reads for cache region." hexmask.long 0xC 0.--31. 1. "READS,Number of reads for cache region." line.long 0x10 "WRITES,Number of writes for cache region." hexmask.long 0x10 0.--31. 1. "WRITES,Number of writes for cache region." tree.end base ad:0xE0082000 newline group.long 0x430++0x7 newline line.long 0x0 "DEBUGLOCK,Lock debug mode." bitfld.long 0x0 0. "DEBUGLOCK,Lock debug mode" "0: Debug mode unlocked,1: Debug mode locked. Ignores any other value.." line.long 0x4 "WRITELOCK,Lock cache updates." bitfld.long 0x4 0. "WRITELOCK,Lock cache updates" "0: Cache updates unlocked,1: Cache updates locked" tree.end tree.end tree "CACHEDATA" base ad:0x0 tree "ICACHEDATA_S" base ad:0x2F00000 repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x2F00000 ad:0x2F00040 ad:0x2F00080 ad:0x2F000C0 ad:0x2F00100 ad:0x2F00140 ad:0x2F00180 ad:0x2F001C0 ad:0x2F00200 ad:0x2F00240 ad:0x2F00280 ad:0x2F002C0 ad:0x2F00300 ad:0x2F00340 ad:0x2F00380 ad:0x2F003C0) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x20) tree "WAY[$1]" repeat 4. (list 0x0 0x1 0x2 0x3)(list 0x0 0x8 0x10 0x18) tree "DU[$1]" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "DATA[$1],Description collection: Cache data bits for DATA[q] in DU[p] (DataUnit) of SET[n]. WAY[o]." hexmask.long 0x0 0.--31. 1. "Data,Data" repeat.end tree.end repeat.end tree.end repeat.end tree.end repeat.end repeat 16. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F)(list ad:0x2F00400 ad:0x2F00440 ad:0x2F00480 ad:0x2F004C0 ad:0x2F00500 ad:0x2F00540 ad:0x2F00580 ad:0x2F005C0 ad:0x2F00600 ad:0x2F00640 ad:0x2F00680 ad:0x2F006C0 ad:0x2F00700 ad:0x2F00740 ad:0x2F00780 ad:0x2F007C0) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x20) tree "WAY[$1]" repeat 4. (list 0x0 0x1 0x2 0x3)(list 0x0 0x8 0x10 0x18) tree "DU[$1]" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "DATA[$1],Description collection: Cache data bits for DATA[q] in DU[p] (DataUnit) of SET[n]. WAY[o]." hexmask.long 0x0 0.--31. 1. "Data,Data" repeat.end tree.end repeat.end tree.end repeat.end tree.end repeat.end repeat 16. (list 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F)(list ad:0x2F00800 ad:0x2F00840 ad:0x2F00880 ad:0x2F008C0 ad:0x2F00900 ad:0x2F00940 ad:0x2F00980 ad:0x2F009C0 ad:0x2F00A00 ad:0x2F00A40 ad:0x2F00A80 ad:0x2F00AC0 ad:0x2F00B00 ad:0x2F00B40 ad:0x2F00B80 ad:0x2F00BC0) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x20) tree "WAY[$1]" repeat 4. (list 0x0 0x1 0x2 0x3)(list 0x0 0x8 0x10 0x18) tree "DU[$1]" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "DATA[$1],Description collection: Cache data bits for DATA[q] in DU[p] (DataUnit) of SET[n]. WAY[o]." hexmask.long 0x0 0.--31. 1. "Data,Data" repeat.end tree.end repeat.end tree.end repeat.end tree.end repeat.end repeat 16. (list 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F)(list ad:0x2F00C00 ad:0x2F00C40 ad:0x2F00C80 ad:0x2F00CC0 ad:0x2F00D00 ad:0x2F00D40 ad:0x2F00D80 ad:0x2F00DC0 ad:0x2F00E00 ad:0x2F00E40 ad:0x2F00E80 ad:0x2F00EC0 ad:0x2F00F00 ad:0x2F00F40 ad:0x2F00F80 ad:0x2F00FC0) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x20) tree "WAY[$1]" repeat 4. (list 0x0 0x1 0x2 0x3)(list 0x0 0x8 0x10 0x18) tree "DU[$1]" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "DATA[$1],Description collection: Cache data bits for DATA[q] in DU[p] (DataUnit) of SET[n]. WAY[o]." hexmask.long 0x0 0.--31. 1. "Data,Data" repeat.end tree.end repeat.end tree.end repeat.end tree.end repeat.end repeat 16. (list 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F)(list ad:0x2F01000 ad:0x2F01040 ad:0x2F01080 ad:0x2F010C0 ad:0x2F01100 ad:0x2F01140 ad:0x2F01180 ad:0x2F011C0 ad:0x2F01200 ad:0x2F01240 ad:0x2F01280 ad:0x2F012C0 ad:0x2F01300 ad:0x2F01340 ad:0x2F01380 ad:0x2F013C0) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x20) tree "WAY[$1]" repeat 4. (list 0x0 0x1 0x2 0x3)(list 0x0 0x8 0x10 0x18) tree "DU[$1]" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "DATA[$1],Description collection: Cache data bits for DATA[q] in DU[p] (DataUnit) of SET[n]. WAY[o]." hexmask.long 0x0 0.--31. 1. "Data,Data" repeat.end tree.end repeat.end tree.end repeat.end tree.end repeat.end repeat 16. (list 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5A 0x5B 0x5C 0x5D 0x5E 0x5F)(list ad:0x2F01400 ad:0x2F01440 ad:0x2F01480 ad:0x2F014C0 ad:0x2F01500 ad:0x2F01540 ad:0x2F01580 ad:0x2F015C0 ad:0x2F01600 ad:0x2F01640 ad:0x2F01680 ad:0x2F016C0 ad:0x2F01700 ad:0x2F01740 ad:0x2F01780 ad:0x2F017C0) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x20) tree "WAY[$1]" repeat 4. (list 0x0 0x1 0x2 0x3)(list 0x0 0x8 0x10 0x18) tree "DU[$1]" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "DATA[$1],Description collection: Cache data bits for DATA[q] in DU[p] (DataUnit) of SET[n]. WAY[o]." hexmask.long 0x0 0.--31. 1. "Data,Data" repeat.end tree.end repeat.end tree.end repeat.end tree.end repeat.end repeat 16. (list 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6A 0x6B 0x6C 0x6D 0x6E 0x6F)(list ad:0x2F01800 ad:0x2F01840 ad:0x2F01880 ad:0x2F018C0 ad:0x2F01900 ad:0x2F01940 ad:0x2F01980 ad:0x2F019C0 ad:0x2F01A00 ad:0x2F01A40 ad:0x2F01A80 ad:0x2F01AC0 ad:0x2F01B00 ad:0x2F01B40 ad:0x2F01B80 ad:0x2F01BC0) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x20) tree "WAY[$1]" repeat 4. (list 0x0 0x1 0x2 0x3)(list 0x0 0x8 0x10 0x18) tree "DU[$1]" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "DATA[$1],Description collection: Cache data bits for DATA[q] in DU[p] (DataUnit) of SET[n]. WAY[o]." hexmask.long 0x0 0.--31. 1. "Data,Data" repeat.end tree.end repeat.end tree.end repeat.end tree.end repeat.end repeat 16. (list 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7A 0x7B 0x7C 0x7D 0x7E 0x7F)(list ad:0x2F01C00 ad:0x2F01C40 ad:0x2F01C80 ad:0x2F01CC0 ad:0x2F01D00 ad:0x2F01D40 ad:0x2F01D80 ad:0x2F01DC0 ad:0x2F01E00 ad:0x2F01E40 ad:0x2F01E80 ad:0x2F01EC0 ad:0x2F01F00 ad:0x2F01F40 ad:0x2F01F80 ad:0x2F01FC0) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x20) tree "WAY[$1]" repeat 4. (list 0x0 0x1 0x2 0x3)(list 0x0 0x8 0x10 0x18) tree "DU[$1]" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2)++0x3 line.long 0x0 "DATA[$1],Description collection: Cache data bits for DATA[q] in DU[p] (DataUnit) of SET[n]. WAY[o]." hexmask.long 0x0 0.--31. 1. "Data,Data" repeat.end tree.end repeat.end tree.end repeat.end tree.end repeat.end tree.end tree.end tree "CACHEINFO" base ad:0x0 tree "ICACHEINFO_S" base ad:0x2F10000 repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x2F10000 ad:0x2F10008 ad:0x2F10010 ad:0x2F10018 ad:0x2F10020 ad:0x2F10028 ad:0x2F10030 ad:0x2F10038 ad:0x2F10040 ad:0x2F10048 ad:0x2F10050 ad:0x2F10058 ad:0x2F10060 ad:0x2F10068 ad:0x2F10070 ad:0x2F10078) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x4) tree "WAY[$1]" rgroup.long ($2)++0x3 line.long 0x0 "INFO,Description cluster: Cache information for SET[n]. WAY[o]." bitfld.long 0x0 31. "MRU,Most recently used way." "0: Way0 was most recently used,1: Way1 was most recently used" bitfld.long 0x0 30. "V,Line valid bit." "0: Invalid cache line,1: Valid cache line" bitfld.long 0x0 27. "DUV_3,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 26. "DUV_2,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 25. "DUV_1,Data unit valid info." "0: Invalid data unit,1: Valid data unit" newline bitfld.long 0x0 24. "DUV_0,Data unit valid info." "0: Invalid data unit,1: Valid data unit" hexmask.long.tbyte 0x0 0.--23. 1. "TAG,Cache tag." tree.end repeat.end tree.end repeat.end repeat 16. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F)(list ad:0x2F10080 ad:0x2F10088 ad:0x2F10090 ad:0x2F10098 ad:0x2F100A0 ad:0x2F100A8 ad:0x2F100B0 ad:0x2F100B8 ad:0x2F100C0 ad:0x2F100C8 ad:0x2F100D0 ad:0x2F100D8 ad:0x2F100E0 ad:0x2F100E8 ad:0x2F100F0 ad:0x2F100F8) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x4) tree "WAY[$1]" rgroup.long ($2)++0x3 line.long 0x0 "INFO,Description cluster: Cache information for SET[n]. WAY[o]." bitfld.long 0x0 31. "MRU,Most recently used way." "0: Way0 was most recently used,1: Way1 was most recently used" bitfld.long 0x0 30. "V,Line valid bit." "0: Invalid cache line,1: Valid cache line" bitfld.long 0x0 27. "DUV_3,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 26. "DUV_2,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 25. "DUV_1,Data unit valid info." "0: Invalid data unit,1: Valid data unit" newline bitfld.long 0x0 24. "DUV_0,Data unit valid info." "0: Invalid data unit,1: Valid data unit" hexmask.long.tbyte 0x0 0.--23. 1. "TAG,Cache tag." tree.end repeat.end tree.end repeat.end repeat 16. (list 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F)(list ad:0x2F10100 ad:0x2F10108 ad:0x2F10110 ad:0x2F10118 ad:0x2F10120 ad:0x2F10128 ad:0x2F10130 ad:0x2F10138 ad:0x2F10140 ad:0x2F10148 ad:0x2F10150 ad:0x2F10158 ad:0x2F10160 ad:0x2F10168 ad:0x2F10170 ad:0x2F10178) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x4) tree "WAY[$1]" rgroup.long ($2)++0x3 line.long 0x0 "INFO,Description cluster: Cache information for SET[n]. WAY[o]." bitfld.long 0x0 31. "MRU,Most recently used way." "0: Way0 was most recently used,1: Way1 was most recently used" bitfld.long 0x0 30. "V,Line valid bit." "0: Invalid cache line,1: Valid cache line" bitfld.long 0x0 27. "DUV_3,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 26. "DUV_2,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 25. "DUV_1,Data unit valid info." "0: Invalid data unit,1: Valid data unit" newline bitfld.long 0x0 24. "DUV_0,Data unit valid info." "0: Invalid data unit,1: Valid data unit" hexmask.long.tbyte 0x0 0.--23. 1. "TAG,Cache tag." tree.end repeat.end tree.end repeat.end repeat 16. (list 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F)(list ad:0x2F10180 ad:0x2F10188 ad:0x2F10190 ad:0x2F10198 ad:0x2F101A0 ad:0x2F101A8 ad:0x2F101B0 ad:0x2F101B8 ad:0x2F101C0 ad:0x2F101C8 ad:0x2F101D0 ad:0x2F101D8 ad:0x2F101E0 ad:0x2F101E8 ad:0x2F101F0 ad:0x2F101F8) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x4) tree "WAY[$1]" rgroup.long ($2)++0x3 line.long 0x0 "INFO,Description cluster: Cache information for SET[n]. WAY[o]." bitfld.long 0x0 31. "MRU,Most recently used way." "0: Way0 was most recently used,1: Way1 was most recently used" bitfld.long 0x0 30. "V,Line valid bit." "0: Invalid cache line,1: Valid cache line" bitfld.long 0x0 27. "DUV_3,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 26. "DUV_2,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 25. "DUV_1,Data unit valid info." "0: Invalid data unit,1: Valid data unit" newline bitfld.long 0x0 24. "DUV_0,Data unit valid info." "0: Invalid data unit,1: Valid data unit" hexmask.long.tbyte 0x0 0.--23. 1. "TAG,Cache tag." tree.end repeat.end tree.end repeat.end repeat 16. (list 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F)(list ad:0x2F10200 ad:0x2F10208 ad:0x2F10210 ad:0x2F10218 ad:0x2F10220 ad:0x2F10228 ad:0x2F10230 ad:0x2F10238 ad:0x2F10240 ad:0x2F10248 ad:0x2F10250 ad:0x2F10258 ad:0x2F10260 ad:0x2F10268 ad:0x2F10270 ad:0x2F10278) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x4) tree "WAY[$1]" rgroup.long ($2)++0x3 line.long 0x0 "INFO,Description cluster: Cache information for SET[n]. WAY[o]." bitfld.long 0x0 31. "MRU,Most recently used way." "0: Way0 was most recently used,1: Way1 was most recently used" bitfld.long 0x0 30. "V,Line valid bit." "0: Invalid cache line,1: Valid cache line" bitfld.long 0x0 27. "DUV_3,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 26. "DUV_2,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 25. "DUV_1,Data unit valid info." "0: Invalid data unit,1: Valid data unit" newline bitfld.long 0x0 24. "DUV_0,Data unit valid info." "0: Invalid data unit,1: Valid data unit" hexmask.long.tbyte 0x0 0.--23. 1. "TAG,Cache tag." tree.end repeat.end tree.end repeat.end repeat 16. (list 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5A 0x5B 0x5C 0x5D 0x5E 0x5F)(list ad:0x2F10280 ad:0x2F10288 ad:0x2F10290 ad:0x2F10298 ad:0x2F102A0 ad:0x2F102A8 ad:0x2F102B0 ad:0x2F102B8 ad:0x2F102C0 ad:0x2F102C8 ad:0x2F102D0 ad:0x2F102D8 ad:0x2F102E0 ad:0x2F102E8 ad:0x2F102F0 ad:0x2F102F8) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x4) tree "WAY[$1]" rgroup.long ($2)++0x3 line.long 0x0 "INFO,Description cluster: Cache information for SET[n]. WAY[o]." bitfld.long 0x0 31. "MRU,Most recently used way." "0: Way0 was most recently used,1: Way1 was most recently used" bitfld.long 0x0 30. "V,Line valid bit." "0: Invalid cache line,1: Valid cache line" bitfld.long 0x0 27. "DUV_3,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 26. "DUV_2,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 25. "DUV_1,Data unit valid info." "0: Invalid data unit,1: Valid data unit" newline bitfld.long 0x0 24. "DUV_0,Data unit valid info." "0: Invalid data unit,1: Valid data unit" hexmask.long.tbyte 0x0 0.--23. 1. "TAG,Cache tag." tree.end repeat.end tree.end repeat.end repeat 16. (list 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6A 0x6B 0x6C 0x6D 0x6E 0x6F)(list ad:0x2F10300 ad:0x2F10308 ad:0x2F10310 ad:0x2F10318 ad:0x2F10320 ad:0x2F10328 ad:0x2F10330 ad:0x2F10338 ad:0x2F10340 ad:0x2F10348 ad:0x2F10350 ad:0x2F10358 ad:0x2F10360 ad:0x2F10368 ad:0x2F10370 ad:0x2F10378) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x4) tree "WAY[$1]" rgroup.long ($2)++0x3 line.long 0x0 "INFO,Description cluster: Cache information for SET[n]. WAY[o]." bitfld.long 0x0 31. "MRU,Most recently used way." "0: Way0 was most recently used,1: Way1 was most recently used" bitfld.long 0x0 30. "V,Line valid bit." "0: Invalid cache line,1: Valid cache line" bitfld.long 0x0 27. "DUV_3,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 26. "DUV_2,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 25. "DUV_1,Data unit valid info." "0: Invalid data unit,1: Valid data unit" newline bitfld.long 0x0 24. "DUV_0,Data unit valid info." "0: Invalid data unit,1: Valid data unit" hexmask.long.tbyte 0x0 0.--23. 1. "TAG,Cache tag." tree.end repeat.end tree.end repeat.end repeat 16. (list 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7A 0x7B 0x7C 0x7D 0x7E 0x7F)(list ad:0x2F10380 ad:0x2F10388 ad:0x2F10390 ad:0x2F10398 ad:0x2F103A0 ad:0x2F103A8 ad:0x2F103B0 ad:0x2F103B8 ad:0x2F103C0 ad:0x2F103C8 ad:0x2F103D0 ad:0x2F103D8 ad:0x2F103E0 ad:0x2F103E8 ad:0x2F103F0 ad:0x2F103F8) tree "SET[$1]" base $2 repeat 2. (list 0x0 0x1)(list 0x0 0x4) tree "WAY[$1]" rgroup.long ($2)++0x3 line.long 0x0 "INFO,Description cluster: Cache information for SET[n]. WAY[o]." bitfld.long 0x0 31. "MRU,Most recently used way." "0: Way0 was most recently used,1: Way1 was most recently used" bitfld.long 0x0 30. "V,Line valid bit." "0: Invalid cache line,1: Valid cache line" bitfld.long 0x0 27. "DUV_3,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 26. "DUV_2,Data unit valid info." "0: Invalid data unit,1: Valid data unit" bitfld.long 0x0 25. "DUV_1,Data unit valid info." "0: Invalid data unit,1: Valid data unit" newline bitfld.long 0x0 24. "DUV_0,Data unit valid info." "0: Invalid data unit,1: Valid data unit" hexmask.long.tbyte 0x0 0.--23. 1. "TAG,Cache tag." tree.end repeat.end tree.end repeat.end tree.end tree.end tree "CCM (AES CCM Mode Encryption)" base ad:0x0 tree "GLOBAL_CCM00_NS" base ad:0x40046000 wgroup.long 0x0++0xB line.long 0x0 "TASKS_START,Start encryption/decryption. This operation will stop by itself when completed." bitfld.long 0x0 0. "TASKS_START,Start encryption/decryption. This operation will stop by itself when completed." "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop encryption/decryption" bitfld.long 0x4 0. "TASKS_STOP,Stop encryption/decryption" "?,1: Trigger task" line.long 0x8 "TASKS_RATEOVERRIDE,Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption" bitfld.long 0x8 0. "TASKS_RATEOVERRIDE,Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption" "?,1: Trigger task" group.long 0x80++0xB line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_RATEOVERRIDE,Subscribe configuration for task RATEOVERRIDE" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task RATEOVERRIDE will subscribe to" group.long 0x104++0x7 line.long 0x0 "EVENTS_END,Encrypt/decrypt complete or ended because of an error" bitfld.long 0x0 0. "EVENTS_END,Encrypt/decrypt complete or ended because of an error" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_ERROR,CCM error event" bitfld.long 0x4 0. "EVENTS_ERROR,CCM error event" "0: Event not generated,1: Event generated" group.long 0x184++0x7 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 2. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 2. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x7 line.long 0x0 "MACSTATUS,MAC check result" bitfld.long 0x0 0. "MACSTATUS,The result of the MAC check performed during the previous decryption operation" "0: MAC check failed,1: MAC check passed" line.long 0x4 "ERRORSTATUS,Error status" bitfld.long 0x4 0.--2. "ERRORSTATUS,Error status when the ERROR event is generated" "0: No errors have occurred,1: End of INPTR job list before CCM data structure..,2: End of OUTPTR job list before CCM data structure..,3: Encryption of the unencrypted CCM data structure..,4: Bus error during DMA access.,?,?,?" group.long 0x500++0x7 line.long 0x0 "ENABLE,Enable" bitfld.long 0x0 0.--1. "ENABLE,Enable or disable CCM" "0: Disable,?,2: Enable,?" line.long 0x4 "MODE,Operation mode" bitfld.long 0x4 24.--26. "MACLEN,CCM MAC length (bytes)" "0: M = 0 This is a special case for CCM* where..,1: M = 4,2: M = 6,3: M = 8,4: M = 10,5: M = 12,6: M = 14,7: M = 16" newline bitfld.long 0x4 16.--18. "DATARATE,Radio data rate that the CCM shall run synchronous with" "0: 125 Kbps,1: 250 Kbps,2: 500 Kbps,3: 1 Mbps,4: 2 Mbps,5: 4 Mbps,?,?" newline bitfld.long 0x4 8.--9. "PROTOCOL,Protocol and packet format selection" "0: Bluetooth Low Energy packet format,1: 802.15.4 packet format,?,?" newline bitfld.long 0x4 0.--1. "MODE,The mode of operation to be used. The settings in this register apply when the CRYPT task is triggered." "0: AES CCM packet encryption mode,1: Deprecated enumerator - This mode will run CCM..,2: AES CCM decryption mode.,?" tree "IN" base ad:0x40046530 group.long 0x0++0x3 line.long 0x0 "PTR,Input pointer Points to a job list containing unencrypted CCM data structure in Encryption mode Points to a job list containing encrypted CCM data structure in Decryption mode" hexmask.long 0x0 0.--31. 1. "PTR,Input pointer" tree.end tree "KEY" base ad:0x40046510 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "VALUE[$1],Description collection: 128-bit AES key" hexmask.long 0x0 0.--31. 1. "VALUE,AES 128-bit key value bits (32*(i+1))-1 : (32*i)" repeat.end tree.end tree "NONCE" base ad:0x40046520 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "VALUE[$1],Description collection: 13-byte NONCE vector Only the lower 13 bytes are used" hexmask.long 0x0 0.--31. 1. "VALUE,NONCE value bits (32*(n+1))-1 : (32*n)" repeat.end tree.end tree "OUT" base ad:0x40046538 group.long 0x0++0x3 line.long 0x0 "PTR,Output pointer Points to a job list containing encrypted CCM data structure in Encryption mode Points to a job list containing decrypted CCM data structure in Decryption mode" hexmask.long 0x0 0.--31. 1. "PTR,Output pointer" tree.end base ad:0x40046000 newline group.long 0x544++0x7 newline line.long 0x0 "RATEOVERRIDE,Data rate override setting." bitfld.long 0x0 0.--2. "RATEOVERRIDE,Data rate override setting." "0: 125 Kbps,?,2: 500 Kbps,3: 1 Mbps,4: 2 Mbps,5: 4 Mbps,?,?" line.long 0x4 "ADATAMASK,CCM adata mask." hexmask.long.byte 0x4 0.--7. 1. "ADATAMASK,CCM adata mask." tree.end tree "GLOBAL_CCM00_S" base ad:0x50046000 wgroup.long 0x0++0xB line.long 0x0 "TASKS_START,Start encryption/decryption. This operation will stop by itself when completed." bitfld.long 0x0 0. "TASKS_START,Start encryption/decryption. This operation will stop by itself when completed." "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop encryption/decryption" bitfld.long 0x4 0. "TASKS_STOP,Stop encryption/decryption" "?,1: Trigger task" line.long 0x8 "TASKS_RATEOVERRIDE,Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption" bitfld.long 0x8 0. "TASKS_RATEOVERRIDE,Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption" "?,1: Trigger task" group.long 0x80++0xB line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_RATEOVERRIDE,Subscribe configuration for task RATEOVERRIDE" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task RATEOVERRIDE will subscribe to" group.long 0x104++0x7 line.long 0x0 "EVENTS_END,Encrypt/decrypt complete or ended because of an error" bitfld.long 0x0 0. "EVENTS_END,Encrypt/decrypt complete or ended because of an error" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_ERROR,CCM error event" bitfld.long 0x4 0. "EVENTS_ERROR,CCM error event" "0: Event not generated,1: Event generated" group.long 0x184++0x7 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 2. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 2. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x7 line.long 0x0 "MACSTATUS,MAC check result" bitfld.long 0x0 0. "MACSTATUS,The result of the MAC check performed during the previous decryption operation" "0: MAC check failed,1: MAC check passed" line.long 0x4 "ERRORSTATUS,Error status" bitfld.long 0x4 0.--2. "ERRORSTATUS,Error status when the ERROR event is generated" "0: No errors have occurred,1: End of INPTR job list before CCM data structure..,2: End of OUTPTR job list before CCM data structure..,3: Encryption of the unencrypted CCM data structure..,4: Bus error during DMA access.,?,?,?" group.long 0x500++0x7 line.long 0x0 "ENABLE,Enable" bitfld.long 0x0 0.--1. "ENABLE,Enable or disable CCM" "0: Disable,?,2: Enable,?" line.long 0x4 "MODE,Operation mode" bitfld.long 0x4 24.--26. "MACLEN,CCM MAC length (bytes)" "0: M = 0 This is a special case for CCM* where..,1: M = 4,2: M = 6,3: M = 8,4: M = 10,5: M = 12,6: M = 14,7: M = 16" newline bitfld.long 0x4 16.--18. "DATARATE,Radio data rate that the CCM shall run synchronous with" "0: 125 Kbps,1: 250 Kbps,2: 500 Kbps,3: 1 Mbps,4: 2 Mbps,5: 4 Mbps,?,?" newline bitfld.long 0x4 8.--9. "PROTOCOL,Protocol and packet format selection" "0: Bluetooth Low Energy packet format,1: 802.15.4 packet format,?,?" newline bitfld.long 0x4 0.--1. "MODE,The mode of operation to be used. The settings in this register apply when the CRYPT task is triggered." "0: AES CCM packet encryption mode,1: Deprecated enumerator - This mode will run CCM..,2: AES CCM decryption mode.,?" tree "IN" base ad:0x50046000 group.long 0x0++0x3 line.long 0x0 "PTR,Input pointer Points to a job list containing unencrypted CCM data structure in Encryption mode Points to a job list containing encrypted CCM data structure in Decryption mode" hexmask.long 0x0 0.--31. 1. "PTR,Input pointer" tree.end tree "KEY" base ad:0x50046000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "VALUE[$1],Description collection: 128-bit AES key" hexmask.long 0x0 0.--31. 1. "VALUE,AES 128-bit key value bits (32*(i+1))-1 : (32*i)" repeat.end tree.end tree "NONCE" base ad:0x50046000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "VALUE[$1],Description collection: 13-byte NONCE vector Only the lower 13 bytes are used" hexmask.long 0x0 0.--31. 1. "VALUE,NONCE value bits (32*(n+1))-1 : (32*n)" repeat.end tree.end tree "OUT" base ad:0x50046000 group.long 0x0++0x3 line.long 0x0 "PTR,Output pointer Points to a job list containing encrypted CCM data structure in Encryption mode Points to a job list containing decrypted CCM data structure in Decryption mode" hexmask.long 0x0 0.--31. 1. "PTR,Output pointer" tree.end base ad:0x50046000 newline group.long 0x544++0x7 newline line.long 0x0 "RATEOVERRIDE,Data rate override setting." bitfld.long 0x0 0.--2. "RATEOVERRIDE,Data rate override setting." "0: 125 Kbps,?,2: 500 Kbps,3: 1 Mbps,4: 2 Mbps,5: 4 Mbps,?,?" line.long 0x4 "ADATAMASK,CCM adata mask." hexmask.long.byte 0x4 0.--7. 1. "ADATAMASK,CCM adata mask." tree.end tree.end tree "CLOCK (Clock Management)" base ad:0x0 tree "GLOBAL_CLOCK_NS" base ad:0x4010E000 wgroup.long 0x0++0x23 line.long 0x0 "TASKS_XOSTART,Start crystal oscillator (HFXO)" bitfld.long 0x0 0. "TASKS_XOSTART,Start crystal oscillator (HFXO)" "?,1: Trigger task" line.long 0x4 "TASKS_XOSTOP,Stop crystal oscillator (HFXO)" bitfld.long 0x4 0. "TASKS_XOSTOP,Stop crystal oscillator (HFXO)" "?,1: Trigger task" line.long 0x8 "TASKS_PLLSTART,Start PLL and keep it running. regardless of the automatic clock requests" bitfld.long 0x8 0. "TASKS_PLLSTART,Start PLL and keep it running regardless of the automatic clock requests" "?,1: Trigger task" line.long 0xC "TASKS_PLLSTOP,Stop PLL" bitfld.long 0xC 0. "TASKS_PLLSTOP,Stop PLL" "?,1: Trigger task" line.long 0x10 "TASKS_LFCLKSTART,Start LFCLK source as selected in LFCLK.SRC" bitfld.long 0x10 0. "TASKS_LFCLKSTART,Start LFCLK source as selected in LFCLK.SRC" "?,1: Trigger task" line.long 0x14 "TASKS_LFCLKSTOP,Stop LFCLK source" bitfld.long 0x14 0. "TASKS_LFCLKSTOP,Stop LFCLK source" "?,1: Trigger task" line.long 0x18 "TASKS_CAL,Start calibration of LFRC oscillator" bitfld.long 0x18 0. "TASKS_CAL,Start calibration of LFRC oscillator" "?,1: Trigger task" line.long 0x1C "TASKS_XOTUNE,Request tuning for HFXO" bitfld.long 0x1C 0. "TASKS_XOTUNE,Request tuning for HFXO" "?,1: Trigger task" line.long 0x20 "TASKS_XOTUNEABORT,Abort tuning for HFXO" bitfld.long 0x20 0. "TASKS_XOTUNEABORT,Abort tuning for HFXO" "?,1: Trigger task" group.long 0x80++0x1B line.long 0x0 "SUBSCRIBE_XOSTART,Subscribe configuration for task XOSTART" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task XOSTART will subscribe to" line.long 0x4 "SUBSCRIBE_XOSTOP,Subscribe configuration for task XOSTOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task XOSTOP will subscribe to" line.long 0x8 "SUBSCRIBE_PLLSTART,Subscribe configuration for task PLLSTART" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task PLLSTART will subscribe to" line.long 0xC "SUBSCRIBE_PLLSTOP,Subscribe configuration for task PLLSTOP" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task PLLSTOP will subscribe to" line.long 0x10 "SUBSCRIBE_LFCLKSTART,Subscribe configuration for task LFCLKSTART" bitfld.long 0x10 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that task LFCLKSTART will subscribe to" line.long 0x14 "SUBSCRIBE_LFCLKSTOP,Subscribe configuration for task LFCLKSTOP" bitfld.long 0x14 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x14 0.--7. 1. "CHIDX,DPPI channel that task LFCLKSTOP will subscribe to" line.long 0x18 "SUBSCRIBE_CAL,Subscribe configuration for task CAL" bitfld.long 0x18 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x18 0.--7. 1. "CHIDX,DPPI channel that task CAL will subscribe to" group.long 0x100++0x1B line.long 0x0 "EVENTS_XOSTARTED,Crystal oscillator has started" bitfld.long 0x0 0. "EVENTS_XOSTARTED,Crystal oscillator has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_PLLSTARTED,PLL started" bitfld.long 0x4 0. "EVENTS_PLLSTARTED,PLL started" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_LFCLKSTARTED,LFCLK source started" bitfld.long 0x8 0. "EVENTS_LFCLKSTARTED,LFCLK source started" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_DONE,Calibration of LFRC oscillator complete event" bitfld.long 0xC 0. "EVENTS_DONE,Calibration of LFRC oscillator complete event" "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_XOTUNED,HFXO tuning is done. XOTUNED is generated after TASKS_XOSTART or after TASKS_XOTUNE has completed" bitfld.long 0x10 0. "EVENTS_XOTUNED,HFXO tuning is done. XOTUNED is generated after TASKS_XOSTART or after TASKS_XOTUNE has completed" "0: Event not generated,1: Event generated" line.long 0x14 "EVENTS_XOTUNEERROR,HFXO quality issue detected. XOTUNE is needed" bitfld.long 0x14 0. "EVENTS_XOTUNEERROR,HFXO quality issue detected XOTUNE is needed" "0: Event not generated,1: Event generated" line.long 0x18 "EVENTS_XOTUNEFAILED,HFXO tuning could not be completed" bitfld.long 0x18 0. "EVENTS_XOTUNEFAILED,HFXO tuning could not be completed" "0: Event not generated,1: Event generated" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 6. "XOTUNEFAILED,Enable or disable interrupt for event XOTUNEFAILED" "0: Disable,1: Enable" bitfld.long 0x0 5. "XOTUNEERROR,Enable or disable interrupt for event XOTUNEERROR" "0: Disable,1: Enable" bitfld.long 0x0 4. "XOTUNED,Enable or disable interrupt for event XOTUNED" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "DONE,Enable or disable interrupt for event DONE" "0: Disable,1: Enable" bitfld.long 0x0 2. "LFCLKSTARTED,Enable or disable interrupt for event LFCLKSTARTED" "0: Disable,1: Enable" bitfld.long 0x0 1. "PLLSTARTED,Enable or disable interrupt for event PLLSTARTED" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "XOSTARTED,Enable or disable interrupt for event XOSTARTED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 6. "XOTUNEFAILED,Write '1' to enable interrupt for event XOTUNEFAILED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "XOTUNEERROR,Write '1' to enable interrupt for event XOTUNEERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 4. "XOTUNED,Write '1' to enable interrupt for event XOTUNED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "DONE,Write '1' to enable interrupt for event DONE" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "LFCLKSTARTED,Write '1' to enable interrupt for event LFCLKSTARTED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "PLLSTARTED,Write '1' to enable interrupt for event PLLSTARTED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "XOSTARTED,Write '1' to enable interrupt for event XOSTARTED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 6. "XOTUNEFAILED,Write '1' to disable interrupt for event XOTUNEFAILED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "XOTUNEERROR,Write '1' to disable interrupt for event XOTUNEERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 4. "XOTUNED,Write '1' to disable interrupt for event XOTUNED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "DONE,Write '1' to disable interrupt for event DONE" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "LFCLKSTARTED,Write '1' to disable interrupt for event LFCLKSTARTED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "PLLSTARTED,Write '1' to disable interrupt for event PLLSTARTED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "XOSTARTED,Write '1' to disable interrupt for event XOSTARTED" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 6. "XOTUNEFAILED,Read pending status of interrupt for event XOTUNEFAILED" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 5. "XOTUNEERROR,Read pending status of interrupt for event XOTUNEERROR" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 4. "XOTUNED,Read pending status of interrupt for event XOTUNED" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "DONE,Read pending status of interrupt for event DONE" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 2. "LFCLKSTARTED,Read pending status of interrupt for event LFCLKSTARTED" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 1. "PLLSTARTED,Read pending status of interrupt for event PLLSTARTED" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "XOSTARTED,Read pending status of interrupt for event XOSTARTED" "0: Read: Not pending,1: Read: Pending" tree "LFCLK" base ad:0x4010E440 group.long 0x0++0x3 line.long 0x0 "SRC,Clock source for LFCLK" bitfld.long 0x0 0.--1. "SRC,Select which LFCLK source is started by the LFCLKSTART task" "0: 32.768 kHz RC oscillator,1: 32.768 kHz crystal oscillator,2: 32.768 kHz synthesized from HFCLK,?" rgroup.long 0x8++0x7 line.long 0x0 "RUN,Indicates that LFCLKSTART task was triggered" bitfld.long 0x0 0. "STATUS,LFCLKSTART task triggered or not" "0: Task not triggered,1: Task triggered" line.long 0x4 "STAT,Copy of LFCLK.SRCCOPY register. set when LFCLKSTARTED event is triggered." bitfld.long 0x4 16. "STATE,LFCLK state (Running between START task and STOPPED event)" "0: LFCLK not running,1: LFCLK running" bitfld.long 0x4 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running" bitfld.long 0x4 0.--1. "SRC,Value of LFCLK.SRCCOPY register when LFCLKSTARTED event was triggered" "0: 32.768 kHz RC oscillator,1: 32.768 kHz crystal oscillator,2: 32.768 kHz synthesized from HFCLK,?" group.long 0x10++0x3 line.long 0x0 "SRCCOPY,Copy of LFCLK.SRC register. set when LFCLKSTART task is triggered" bitfld.long 0x0 0.--1. "SRC,Value of LFCLK.SRC register when LFCLKSTART task was triggered" "0: 32.768 kHz RC oscillator,1: 32.768 kHz crystal oscillator,2: 32.768 kHz synthesized from HFCLK,?" tree.end tree "PLL" base ad:0x4010E420 rgroup.long 0x8++0x7 line.long 0x0 "RUN,Indicates that PLLSTART task was triggered" bitfld.long 0x0 0. "STATUS,PLLSTART task triggered or not" "0: Task not triggered,1: Task triggered" line.long 0x4 "STAT,Which PLL settings were selected when triggering START task" bitfld.long 0x4 16. "STATE,PLL state (Running between START task and STOPPED event)" "0: PLL is not running,1: PLL is running" tree.end tree "XO" base ad:0x4010E400 rgroup.long 0x8++0x7 line.long 0x0 "RUN,Indicates that XOSTART task was triggered" bitfld.long 0x0 0. "STATUS,XOSTART task triggered or not" "0: Task not triggered,1: Task triggered" line.long 0x4 "STAT,XO status" bitfld.long 0x4 16. "STATE,XO state (Running between START task and STOPPED event)" "0: XO is not running,1: XO is running" tree.end tree.end tree "GLOBAL_CLOCK_S" base ad:0x5010E000 wgroup.long 0x0++0x23 line.long 0x0 "TASKS_XOSTART,Start crystal oscillator (HFXO)" bitfld.long 0x0 0. "TASKS_XOSTART,Start crystal oscillator (HFXO)" "?,1: Trigger task" line.long 0x4 "TASKS_XOSTOP,Stop crystal oscillator (HFXO)" bitfld.long 0x4 0. "TASKS_XOSTOP,Stop crystal oscillator (HFXO)" "?,1: Trigger task" line.long 0x8 "TASKS_PLLSTART,Start PLL and keep it running. regardless of the automatic clock requests" bitfld.long 0x8 0. "TASKS_PLLSTART,Start PLL and keep it running regardless of the automatic clock requests" "?,1: Trigger task" line.long 0xC "TASKS_PLLSTOP,Stop PLL" bitfld.long 0xC 0. "TASKS_PLLSTOP,Stop PLL" "?,1: Trigger task" line.long 0x10 "TASKS_LFCLKSTART,Start LFCLK source as selected in LFCLK.SRC" bitfld.long 0x10 0. "TASKS_LFCLKSTART,Start LFCLK source as selected in LFCLK.SRC" "?,1: Trigger task" line.long 0x14 "TASKS_LFCLKSTOP,Stop LFCLK source" bitfld.long 0x14 0. "TASKS_LFCLKSTOP,Stop LFCLK source" "?,1: Trigger task" line.long 0x18 "TASKS_CAL,Start calibration of LFRC oscillator" bitfld.long 0x18 0. "TASKS_CAL,Start calibration of LFRC oscillator" "?,1: Trigger task" line.long 0x1C "TASKS_XOTUNE,Request tuning for HFXO" bitfld.long 0x1C 0. "TASKS_XOTUNE,Request tuning for HFXO" "?,1: Trigger task" line.long 0x20 "TASKS_XOTUNEABORT,Abort tuning for HFXO" bitfld.long 0x20 0. "TASKS_XOTUNEABORT,Abort tuning for HFXO" "?,1: Trigger task" group.long 0x80++0x1B line.long 0x0 "SUBSCRIBE_XOSTART,Subscribe configuration for task XOSTART" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task XOSTART will subscribe to" line.long 0x4 "SUBSCRIBE_XOSTOP,Subscribe configuration for task XOSTOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task XOSTOP will subscribe to" line.long 0x8 "SUBSCRIBE_PLLSTART,Subscribe configuration for task PLLSTART" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task PLLSTART will subscribe to" line.long 0xC "SUBSCRIBE_PLLSTOP,Subscribe configuration for task PLLSTOP" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task PLLSTOP will subscribe to" line.long 0x10 "SUBSCRIBE_LFCLKSTART,Subscribe configuration for task LFCLKSTART" bitfld.long 0x10 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that task LFCLKSTART will subscribe to" line.long 0x14 "SUBSCRIBE_LFCLKSTOP,Subscribe configuration for task LFCLKSTOP" bitfld.long 0x14 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x14 0.--7. 1. "CHIDX,DPPI channel that task LFCLKSTOP will subscribe to" line.long 0x18 "SUBSCRIBE_CAL,Subscribe configuration for task CAL" bitfld.long 0x18 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x18 0.--7. 1. "CHIDX,DPPI channel that task CAL will subscribe to" group.long 0x100++0x1B line.long 0x0 "EVENTS_XOSTARTED,Crystal oscillator has started" bitfld.long 0x0 0. "EVENTS_XOSTARTED,Crystal oscillator has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_PLLSTARTED,PLL started" bitfld.long 0x4 0. "EVENTS_PLLSTARTED,PLL started" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_LFCLKSTARTED,LFCLK source started" bitfld.long 0x8 0. "EVENTS_LFCLKSTARTED,LFCLK source started" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_DONE,Calibration of LFRC oscillator complete event" bitfld.long 0xC 0. "EVENTS_DONE,Calibration of LFRC oscillator complete event" "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_XOTUNED,HFXO tuning is done. XOTUNED is generated after TASKS_XOSTART or after TASKS_XOTUNE has completed" bitfld.long 0x10 0. "EVENTS_XOTUNED,HFXO tuning is done. XOTUNED is generated after TASKS_XOSTART or after TASKS_XOTUNE has completed" "0: Event not generated,1: Event generated" line.long 0x14 "EVENTS_XOTUNEERROR,HFXO quality issue detected. XOTUNE is needed" bitfld.long 0x14 0. "EVENTS_XOTUNEERROR,HFXO quality issue detected XOTUNE is needed" "0: Event not generated,1: Event generated" line.long 0x18 "EVENTS_XOTUNEFAILED,HFXO tuning could not be completed" bitfld.long 0x18 0. "EVENTS_XOTUNEFAILED,HFXO tuning could not be completed" "0: Event not generated,1: Event generated" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 6. "XOTUNEFAILED,Enable or disable interrupt for event XOTUNEFAILED" "0: Disable,1: Enable" bitfld.long 0x0 5. "XOTUNEERROR,Enable or disable interrupt for event XOTUNEERROR" "0: Disable,1: Enable" bitfld.long 0x0 4. "XOTUNED,Enable or disable interrupt for event XOTUNED" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "DONE,Enable or disable interrupt for event DONE" "0: Disable,1: Enable" bitfld.long 0x0 2. "LFCLKSTARTED,Enable or disable interrupt for event LFCLKSTARTED" "0: Disable,1: Enable" bitfld.long 0x0 1. "PLLSTARTED,Enable or disable interrupt for event PLLSTARTED" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "XOSTARTED,Enable or disable interrupt for event XOSTARTED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 6. "XOTUNEFAILED,Write '1' to enable interrupt for event XOTUNEFAILED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "XOTUNEERROR,Write '1' to enable interrupt for event XOTUNEERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 4. "XOTUNED,Write '1' to enable interrupt for event XOTUNED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "DONE,Write '1' to enable interrupt for event DONE" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "LFCLKSTARTED,Write '1' to enable interrupt for event LFCLKSTARTED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "PLLSTARTED,Write '1' to enable interrupt for event PLLSTARTED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "XOSTARTED,Write '1' to enable interrupt for event XOSTARTED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 6. "XOTUNEFAILED,Write '1' to disable interrupt for event XOTUNEFAILED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "XOTUNEERROR,Write '1' to disable interrupt for event XOTUNEERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 4. "XOTUNED,Write '1' to disable interrupt for event XOTUNED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "DONE,Write '1' to disable interrupt for event DONE" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "LFCLKSTARTED,Write '1' to disable interrupt for event LFCLKSTARTED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "PLLSTARTED,Write '1' to disable interrupt for event PLLSTARTED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "XOSTARTED,Write '1' to disable interrupt for event XOSTARTED" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 6. "XOTUNEFAILED,Read pending status of interrupt for event XOTUNEFAILED" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 5. "XOTUNEERROR,Read pending status of interrupt for event XOTUNEERROR" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 4. "XOTUNED,Read pending status of interrupt for event XOTUNED" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "DONE,Read pending status of interrupt for event DONE" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 2. "LFCLKSTARTED,Read pending status of interrupt for event LFCLKSTARTED" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 1. "PLLSTARTED,Read pending status of interrupt for event PLLSTARTED" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "XOSTARTED,Read pending status of interrupt for event XOSTARTED" "0: Read: Not pending,1: Read: Pending" tree "LFCLK" base ad:0x5010E000 group.long 0x0++0x3 line.long 0x0 "SRC,Clock source for LFCLK" bitfld.long 0x0 0.--1. "SRC,Select which LFCLK source is started by the LFCLKSTART task" "0: 32.768 kHz RC oscillator,1: 32.768 kHz crystal oscillator,2: 32.768 kHz synthesized from HFCLK,?" rgroup.long 0x8++0x7 line.long 0x0 "RUN,Indicates that LFCLKSTART task was triggered" bitfld.long 0x0 0. "STATUS,LFCLKSTART task triggered or not" "0: Task not triggered,1: Task triggered" line.long 0x4 "STAT,Copy of LFCLK.SRCCOPY register. set when LFCLKSTARTED event is triggered." bitfld.long 0x4 16. "STATE,LFCLK state (Running between START task and STOPPED event)" "0: LFCLK not running,1: LFCLK running" bitfld.long 0x4 4. "ALWAYSRUNNING,ALWAYSRUN activated" "0: Automatic clock control enabled,1: Oscillator is always running" bitfld.long 0x4 0.--1. "SRC,Value of LFCLK.SRCCOPY register when LFCLKSTARTED event was triggered" "0: 32.768 kHz RC oscillator,1: 32.768 kHz crystal oscillator,2: 32.768 kHz synthesized from HFCLK,?" group.long 0x10++0x3 line.long 0x0 "SRCCOPY,Copy of LFCLK.SRC register. set when LFCLKSTART task is triggered" bitfld.long 0x0 0.--1. "SRC,Value of LFCLK.SRC register when LFCLKSTART task was triggered" "0: 32.768 kHz RC oscillator,1: 32.768 kHz crystal oscillator,2: 32.768 kHz synthesized from HFCLK,?" tree.end tree "PLL" base ad:0x5010E000 rgroup.long 0x8++0x7 line.long 0x0 "RUN,Indicates that PLLSTART task was triggered" bitfld.long 0x0 0. "STATUS,PLLSTART task triggered or not" "0: Task not triggered,1: Task triggered" line.long 0x4 "STAT,Which PLL settings were selected when triggering START task" bitfld.long 0x4 16. "STATE,PLL state (Running between START task and STOPPED event)" "0: PLL is not running,1: PLL is running" tree.end tree "XO" base ad:0x5010E000 rgroup.long 0x8++0x7 line.long 0x0 "RUN,Indicates that XOSTART task was triggered" bitfld.long 0x0 0. "STATUS,XOSTART task triggered or not" "0: Task not triggered,1: Task triggered" line.long 0x4 "STAT,XO status" bitfld.long 0x4 16. "STATE,XO state (Running between START task and STOPPED event)" "0: XO is not running,1: XO is running" tree.end tree.end tree.end tree "COMP (Comparator)" base ad:0x0 tree "GLOBAL_COMP_NS" base ad:0x40106000 wgroup.long 0x0++0xB line.long 0x0 "TASKS_START,Start comparator" bitfld.long 0x0 0. "TASKS_START,Start comparator" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop comparator" bitfld.long 0x4 0. "TASKS_STOP,Stop comparator" "?,1: Trigger task" line.long 0x8 "TASKS_SAMPLE,Sample comparator value. This task requires that COMP has been started by the START Task." bitfld.long 0x8 0. "TASKS_SAMPLE,Sample comparator value. This task requires that COMP has been started by the START Task." "?,1: Trigger task" group.long 0x80++0xB line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_SAMPLE,Subscribe configuration for task SAMPLE" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task SAMPLE will subscribe to" group.long 0x100++0xF line.long 0x0 "EVENTS_READY,COMP is ready and output is valid" bitfld.long 0x0 0. "EVENTS_READY,COMP is ready and output is valid" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_DOWN,Downward crossing" bitfld.long 0x4 0. "EVENTS_DOWN,Downward crossing" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_UP,Upward crossing" bitfld.long 0x8 0. "EVENTS_UP,Upward crossing" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_CROSS,Downward or upward crossing" bitfld.long 0xC 0. "EVENTS_CROSS,Downward or upward crossing" "0: Event not generated,1: Event generated" group.long 0x180++0xF line.long 0x0 "PUBLISH_READY,Publish configuration for event READY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x4 "PUBLISH_DOWN,Publish configuration for event DOWN" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event DOWN will publish to" line.long 0x8 "PUBLISH_UP,Publish configuration for event UP" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event UP will publish to" line.long 0xC "PUBLISH_CROSS,Publish configuration for event CROSS" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event CROSS will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 4. "CROSS_STOP,Shortcut between event CROSS and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 3. "UP_STOP,Shortcut between event UP and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "DOWN_STOP,Shortcut between event DOWN and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "READY_STOP,Shortcut between event READY and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "READY_SAMPLE,Shortcut between event READY and task SAMPLE" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 3. "CROSS,Enable or disable interrupt for event CROSS" "0: Disable,1: Enable" bitfld.long 0x0 2. "UP,Enable or disable interrupt for event UP" "0: Disable,1: Enable" bitfld.long 0x0 1. "DOWN,Enable or disable interrupt for event DOWN" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "READY,Enable or disable interrupt for event READY" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 3. "CROSS,Write '1' to enable interrupt for event CROSS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "UP,Write '1' to enable interrupt for event UP" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "DOWN,Write '1' to enable interrupt for event DOWN" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 3. "CROSS,Write '1' to disable interrupt for event CROSS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "UP,Write '1' to disable interrupt for event UP" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "DOWN,Write '1' to disable interrupt for event DOWN" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 3. "CROSS,Read pending status of interrupt for event CROSS" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 2. "UP,Read pending status of interrupt for event UP" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 1. "DOWN,Read pending status of interrupt for event DOWN" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "READY,Read pending status of interrupt for event READY" "0: Read: Not pending,1: Read: Pending" rgroup.long 0x400++0x3 line.long 0x0 "RESULT,Compare result" bitfld.long 0x0 0. "RESULT,Result of last compare. Decision point SAMPLE task." "0: Input voltage is below the threshold (VIN+ <..,1: Input voltage is above the threshold (VIN+ >.." group.long 0x500++0xF line.long 0x0 "ENABLE,COMP enable" bitfld.long 0x0 0.--1. "ENABLE,Enable or disable COMP" "0: Disable,?,2: Enable,?" line.long 0x4 "PSEL,Pin select" hexmask.long.byte 0x4 8.--11. 1. "PORT,GPIO Port selection" hexmask.long.byte 0x4 0.--4. 1. "PIN,Analog pin select" line.long 0x8 "REFSEL,Reference source select for single-ended mode" bitfld.long 0x8 0.--2. "REFSEL,Reference select" "0: VREF = internal 1.2 V reference,?,?,?,4: VREF = VDD,5: VREF = AREF,?,?" line.long 0xC "EXTREFSEL,External reference select" hexmask.long.byte 0xC 8.--11. 1. "PORT,GPIO Port selection" hexmask.long.byte 0xC 0.--4. 1. "PIN,External analog reference pin select" group.long 0x530++0xF line.long 0x0 "TH,Threshold configuration for hysteresis unit" hexmask.long.byte 0x0 8.--13. 1. "THUP,VUP = (THUP+1)/64*VREF" hexmask.long.byte 0x0 0.--5. 1. "THDOWN,VDOWN = (THDOWN+1)/64*VREF" line.long 0x4 "MODE,Mode configuration" bitfld.long 0x4 8. "MAIN,Main operation modes" "0: Single-ended mode,1: Differential mode" bitfld.long 0x4 0.--1. "SP,Speed and power modes" "0: Low-power mode,1: Normal mode,2: High-speed mode,?" line.long 0x8 "HYST,Comparator hysteresis enable" bitfld.long 0x8 0. "HYST,Comparator hysteresis" "0: Comparator hysteresis disabled,1: Comparator hysteresis enabled" line.long 0xC "ISOURCE,Current source select on analog input" bitfld.long 0xC 0.--1. "ISOURCE,Current source select on analog input" "0: Current source disabled,1: Current source enabled (+/- 2.5 uA),2: Current source enabled (+/- 5 uA),3: Current source enabled (+/- 10 uA)" tree.end tree "GLOBAL_COMP_S" base ad:0x50106000 wgroup.long 0x0++0xB line.long 0x0 "TASKS_START,Start comparator" bitfld.long 0x0 0. "TASKS_START,Start comparator" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop comparator" bitfld.long 0x4 0. "TASKS_STOP,Stop comparator" "?,1: Trigger task" line.long 0x8 "TASKS_SAMPLE,Sample comparator value. This task requires that COMP has been started by the START Task." bitfld.long 0x8 0. "TASKS_SAMPLE,Sample comparator value. This task requires that COMP has been started by the START Task." "?,1: Trigger task" group.long 0x80++0xB line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_SAMPLE,Subscribe configuration for task SAMPLE" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task SAMPLE will subscribe to" group.long 0x100++0xF line.long 0x0 "EVENTS_READY,COMP is ready and output is valid" bitfld.long 0x0 0. "EVENTS_READY,COMP is ready and output is valid" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_DOWN,Downward crossing" bitfld.long 0x4 0. "EVENTS_DOWN,Downward crossing" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_UP,Upward crossing" bitfld.long 0x8 0. "EVENTS_UP,Upward crossing" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_CROSS,Downward or upward crossing" bitfld.long 0xC 0. "EVENTS_CROSS,Downward or upward crossing" "0: Event not generated,1: Event generated" group.long 0x180++0xF line.long 0x0 "PUBLISH_READY,Publish configuration for event READY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x4 "PUBLISH_DOWN,Publish configuration for event DOWN" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event DOWN will publish to" line.long 0x8 "PUBLISH_UP,Publish configuration for event UP" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event UP will publish to" line.long 0xC "PUBLISH_CROSS,Publish configuration for event CROSS" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event CROSS will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 4. "CROSS_STOP,Shortcut between event CROSS and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 3. "UP_STOP,Shortcut between event UP and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "DOWN_STOP,Shortcut between event DOWN and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "READY_STOP,Shortcut between event READY and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "READY_SAMPLE,Shortcut between event READY and task SAMPLE" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 3. "CROSS,Enable or disable interrupt for event CROSS" "0: Disable,1: Enable" bitfld.long 0x0 2. "UP,Enable or disable interrupt for event UP" "0: Disable,1: Enable" bitfld.long 0x0 1. "DOWN,Enable or disable interrupt for event DOWN" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "READY,Enable or disable interrupt for event READY" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 3. "CROSS,Write '1' to enable interrupt for event CROSS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "UP,Write '1' to enable interrupt for event UP" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "DOWN,Write '1' to enable interrupt for event DOWN" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 3. "CROSS,Write '1' to disable interrupt for event CROSS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "UP,Write '1' to disable interrupt for event UP" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "DOWN,Write '1' to disable interrupt for event DOWN" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 3. "CROSS,Read pending status of interrupt for event CROSS" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 2. "UP,Read pending status of interrupt for event UP" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 1. "DOWN,Read pending status of interrupt for event DOWN" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "READY,Read pending status of interrupt for event READY" "0: Read: Not pending,1: Read: Pending" rgroup.long 0x400++0x3 line.long 0x0 "RESULT,Compare result" bitfld.long 0x0 0. "RESULT,Result of last compare. Decision point SAMPLE task." "0: Input voltage is below the threshold (VIN+ <..,1: Input voltage is above the threshold (VIN+ >.." group.long 0x500++0xF line.long 0x0 "ENABLE,COMP enable" bitfld.long 0x0 0.--1. "ENABLE,Enable or disable COMP" "0: Disable,?,2: Enable,?" line.long 0x4 "PSEL,Pin select" hexmask.long.byte 0x4 8.--11. 1. "PORT,GPIO Port selection" hexmask.long.byte 0x4 0.--4. 1. "PIN,Analog pin select" line.long 0x8 "REFSEL,Reference source select for single-ended mode" bitfld.long 0x8 0.--2. "REFSEL,Reference select" "0: VREF = internal 1.2 V reference,?,?,?,4: VREF = VDD,5: VREF = AREF,?,?" line.long 0xC "EXTREFSEL,External reference select" hexmask.long.byte 0xC 8.--11. 1. "PORT,GPIO Port selection" hexmask.long.byte 0xC 0.--4. 1. "PIN,External analog reference pin select" group.long 0x530++0xF line.long 0x0 "TH,Threshold configuration for hysteresis unit" hexmask.long.byte 0x0 8.--13. 1. "THUP,VUP = (THUP+1)/64*VREF" hexmask.long.byte 0x0 0.--5. 1. "THDOWN,VDOWN = (THDOWN+1)/64*VREF" line.long 0x4 "MODE,Mode configuration" bitfld.long 0x4 8. "MAIN,Main operation modes" "0: Single-ended mode,1: Differential mode" bitfld.long 0x4 0.--1. "SP,Speed and power modes" "0: Low-power mode,1: Normal mode,2: High-speed mode,?" line.long 0x8 "HYST,Comparator hysteresis enable" bitfld.long 0x8 0. "HYST,Comparator hysteresis" "0: Comparator hysteresis disabled,1: Comparator hysteresis enabled" line.long 0xC "ISOURCE,Current source select on analog input" bitfld.long 0xC 0.--1. "ISOURCE,Current source select on analog input" "0: Current source disabled,1: Current source enabled (+/- 2.5 uA),2: Current source enabled (+/- 5 uA),3: Current source enabled (+/- 10 uA)" tree.end tree.end tree "CPUC (CPU Control)" base ad:0x0 tree "CPUC_S" base ad:0xE0080000 group.long 0x100++0x17 line.long 0x0 "EVENTS_FPUIOC,An invalid operation exception has occurred in the FPU." bitfld.long 0x0 0. "EVENTS_FPUIOC,An invalid operation exception has occurred in the FPU." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_FPUDZC,A floating-point divide-by-zero exception has occurred in the FPU." bitfld.long 0x4 0. "EVENTS_FPUDZC,A floating-point divide-by-zero exception has occurred in the FPU." "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_FPUOFC,A floating-point overflow exception has occurred in the FPU." bitfld.long 0x8 0. "EVENTS_FPUOFC,A floating-point overflow exception has occurred in the FPU." "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_FPUUFC,A floating-point underflow exception has occurred in the FPU." bitfld.long 0xC 0. "EVENTS_FPUUFC,A floating-point underflow exception has occurred in the FPU." "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_FPUIXC,A floating-point inexact exception has occurred in the FPU." bitfld.long 0x10 0. "EVENTS_FPUIXC,A floating-point inexact exception has occurred in the FPU." "0: Event not generated,1: Event generated" line.long 0x14 "EVENTS_FPUIDC,A floating-point input denormal exception has occurred in the FPU." bitfld.long 0x14 0. "EVENTS_FPUIDC,A floating-point input denormal exception has occurred in the FPU." "0: Event not generated,1: Event generated" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 5. "FPUIDC,Enable or disable interrupt for event FPUIDC" "0: Disable,1: Enable" bitfld.long 0x0 4. "FPUIXC,Enable or disable interrupt for event FPUIXC" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "FPUUFC,Enable or disable interrupt for event FPUUFC" "0: Disable,1: Enable" bitfld.long 0x0 2. "FPUOFC,Enable or disable interrupt for event FPUOFC" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "FPUDZC,Enable or disable interrupt for event FPUDZC" "0: Disable,1: Enable" bitfld.long 0x0 0. "FPUIOC,Enable or disable interrupt for event FPUIOC" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 5. "FPUIDC,Write '1' to enable interrupt for event FPUIDC" "0: Read: Disabled,1: Enable" bitfld.long 0x4 4. "FPUIXC,Write '1' to enable interrupt for event FPUIXC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "FPUUFC,Write '1' to enable interrupt for event FPUUFC" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "FPUOFC,Write '1' to enable interrupt for event FPUOFC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "FPUDZC,Write '1' to enable interrupt for event FPUDZC" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "FPUIOC,Write '1' to enable interrupt for event FPUIOC" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 5. "FPUIDC,Write '1' to disable interrupt for event FPUIDC" "0: Read: Disabled,1: Disable" bitfld.long 0x8 4. "FPUIXC,Write '1' to disable interrupt for event FPUIXC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "FPUUFC,Write '1' to disable interrupt for event FPUUFC" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "FPUOFC,Write '1' to disable interrupt for event FPUOFC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "FPUDZC,Write '1' to disable interrupt for event FPUDZC" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "FPUIOC,Write '1' to disable interrupt for event FPUIOC" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "LOCK,Register to lock the certain parts of the CPU from being modified." bitfld.long 0x0 4. "LOCKSAU,Locks the Security Attribution Unit (SAU)" "0: SAU registers can be changed.,1: Prevents changes to SAU registers." bitfld.long 0x0 3. "LOCKMPUNS,Locks the Memory Protection Unit (MPU) for non secure mode." "0: MPU registers can be changed.,1: Prevents changes to MPU registers." newline bitfld.long 0x0 2. "LOCKMPUS,Locks the Memory Protection Unit (MPU) for secure mode." "0: MPU registers can be changed.,1: Prevents changes to MPU registers." bitfld.long 0x0 1. "LOCKVTORNS,Locks the Vector table Offset Register (VTOR) for non-secure mode." "0: VTOR can be changed.,1: Prevents changes to VTOR." newline bitfld.long 0x0 0. "LOCKVTORAIRCRS,Locks both the Vector table Offset Register (VTOR) and" "0: Both VTOR and AIRCR can be changed.,1: Prevents changes to both VTOR and AIRCR." rgroup.long 0x504++0x3 line.long 0x0 "CPUID,The identifier for the CPU in this subsystem." hexmask.long 0x0 0.--31. 1. "CPUID,The CPU identifier." tree.end tree.end tree "CRACEN (Crypto Accelerator)" base ad:0x0 tree "GLOBAL_CRACEN_S" base ad:0x50048000 group.long 0x100++0xB line.long 0x0 "EVENTS_CRYPTOMASTER,Event indicating that interrupt triggered at Cryptomaster" bitfld.long 0x0 0. "EVENTS_CRYPTOMASTER,Event indicating that interrupt triggered at Cryptomaster" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RNG,Event indicating that interrupt triggered at RNG" bitfld.long 0x4 0. "EVENTS_RNG,Event indicating that interrupt triggered at RNG" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_PKEIKG,Event indicating that interrupt triggered at PKE or IKG" bitfld.long 0x8 0. "EVENTS_PKEIKG,Event indicating that interrupt triggered at PKE or IKG" "0: Event not generated,1: Event generated" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 2. "PKEIKG,Enable or disable interrupt for event PKEIKG" "0: Disable,1: Enable" bitfld.long 0x0 1. "RNG,Enable or disable interrupt for event RNG" "0: Disable,1: Enable" bitfld.long 0x0 0. "CRYPTOMASTER,Enable or disable interrupt for event CRYPTOMASTER" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 2. "PKEIKG,Write '1' to enable interrupt for event PKEIKG" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "RNG,Write '1' to enable interrupt for event RNG" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "CRYPTOMASTER,Write '1' to enable interrupt for event CRYPTOMASTER" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 2. "PKEIKG,Write '1' to disable interrupt for event PKEIKG" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "RNG,Write '1' to disable interrupt for event RNG" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "CRYPTOMASTER,Write '1' to disable interrupt for event CRYPTOMASTER" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 2. "PKEIKG,Read pending status of interrupt for event PKEIKG" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 1. "RNG,Read pending status of interrupt for event RNG" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 0. "CRYPTOMASTER,Read pending status of interrupt for event CRYPTOMASTER" "0: Read: Not pending,1: Read: Pending" group.long 0x400++0x7 line.long 0x0 "ENABLE,Enable CRACEN peripheral modules." bitfld.long 0x0 2. "PKEIKG,Enable PKE and IKG" "0: PKE and IKG disabled.,1: PKE and IKG enabled." bitfld.long 0x0 1. "RNG,Enable RNG" "0: RNG disabled.,1: RNG enabled." bitfld.long 0x0 0. "CRYPTOMASTER,Enable cryptomaster" "0: Cryptomaster disabled.,1: Cryptomaster enabled." line.long 0x4 "SEEDVALID,Marks the SEED register as valid." bitfld.long 0x4 0. "VALID,Marks the SEED as valid" "0: Valid disabled.,1: Valid enabled." repeat 12. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x410)++0x3 line.long 0x0 "SEED[$1],Description collection: Seed word [n] for symmetric and asymmetric key generation. This register is only writable from KMU." hexmask.long 0x0 0.--31. 1. "VAL,Seed value" repeat.end group.long 0x440++0x7 line.long 0x0 "SEEDLOCK,Lock the access to the SEED register." bitfld.long 0x0 0. "ENABLE,Enable the lock" "0: Lock disabled.,1: Lock enabled." line.long 0x4 "PROTECTEDRAMLOCK,Lock the access to the protected RAM." bitfld.long 0x4 0. "ENABLE,Enable the lock" "0: Lock disabled.,1: Lock enabled." tree.end tree.end tree "CRACENCORE" base ad:0x0 tree "GLOBAL_CRACENCORE_S" base ad:0x51800000 tree "CRYPTMSTRDMA" group.long 0x0++0x1F line.long 0x0 "FETCHADDRLSB,Fetch Address Least Significant Bit" hexmask.long 0x0 0.--31. 1. "FETCHADDRLSB" line.long 0x4 "FETCHADDRMSB,Fetch Address Most Significant Bit" hexmask.long 0x4 0.--31. 1. "FETCHADDRMSB" line.long 0x8 "FETCHLEN,Fetch Length" bitfld.long 0x8 30. "FETCHZPADDING" "0,1" bitfld.long 0x8 29. "FETCHREALIGN" "0,1" bitfld.long 0x8 28. "FETCHCSTADDR" "0,1" hexmask.long 0x8 0.--27. 1. "FETCHLEN" line.long 0xC "FETCHTAG,Fetch Tag" hexmask.long 0xC 0.--31. 1. "FETCHTAG" line.long 0x10 "PUSHADDRLSB,Push Address Least Significant Bit" hexmask.long 0x10 0.--31. 1. "PUSHADDRLSB" line.long 0x14 "PUSHADDRMSB,Push Address Most Significant Bit" hexmask.long 0x14 0.--31. 1. "PUSHADDRMSB" line.long 0x18 "PUSHLEN,Push Length" bitfld.long 0x18 30. "PUSHDISCARD" "0,1" bitfld.long 0x18 29. "PUSHREALIGN" "0,1" bitfld.long 0x18 28. "PUSHCSTADDR" "0,1" hexmask.long 0x18 0.--27. 1. "PUSHLEN" line.long 0x1C "INTEN,Interrupt Enable" hexmask.long.byte 0x1C 0.--5. 1. "INTEN" wgroup.long 0x20++0x7 line.long 0x0 "INTENSET,Interrupt Set" hexmask.long.byte 0x0 0.--5. 1. "INTENSET" line.long 0x4 "INTENCLR,Interrupt Clear" hexmask.long.byte 0x4 0.--5. 1. "INTENCLR" rgroup.long 0x28++0x7 line.long 0x0 "INTSTATRAW,Interrupt Status Raw" hexmask.long 0x0 0.--31. 1. "INTSTATRAW" line.long 0x4 "INTSTAT,Interrupt Status" hexmask.long 0x4 0.--31. 1. "INTSTAT" wgroup.long 0x30++0x3 line.long 0x0 "INTSTATCLR,Interrupt Status Clear" hexmask.long 0x0 0.--31. 1. "INTSTATCLR" group.long 0x34++0x3 line.long 0x0 "CONFIG,Configuration" bitfld.long 0x0 4. "SOFTRST" "0,1" bitfld.long 0x0 3. "PUSHSTOP" "0,1" bitfld.long 0x0 2. "FETCHSTOP" "0,1" bitfld.long 0x0 1. "PUSHCTRLINDIRECT" "0,1" bitfld.long 0x0 0. "FETCHCTRLINDIRECT" "0,1" wgroup.long 0x38++0x3 line.long 0x0 "START,Start" bitfld.long 0x0 1. "STARTPUSH" "0,1" bitfld.long 0x0 0. "STARTFETCH" "0,1" rgroup.long 0x3C++0x3 line.long 0x0 "STATUS,Status" hexmask.long.word 0x0 16.--31. 1. "PUSHNBDATA" bitfld.long 0x0 6. "SOFTRSTBUSY" "0,1" bitfld.long 0x0 5. "PUSHWAITINGFIFO" "0,1" bitfld.long 0x0 4. "FETCHNOTEMPTY" "0,1" bitfld.long 0x0 1. "PUSHBUSY" "0,1" newline bitfld.long 0x0 0. "FETCHBUSY" "0,1" tree.end tree "CRYPTMSTRHW" base ad:0x51800400 rgroup.long 0x0++0x1B line.long 0x0 "INCLIPSHWCFG,Incuded IPs Hardware configuration" bitfld.long 0x0 13. "BA422KASUMIINCLUDED,Generic g_IncludeKasumi value." "0,1" bitfld.long 0x0 12. "BA423SNOW3GINCLUDED,Generic g_IncludeSnow3G value." "0,1" bitfld.long 0x0 11. "BA420HPCHACHAPOLYINCLUDED,Generic g_IncludeHPChachaPoly value." "0,1" bitfld.long 0x0 10. "BA431NDRNGINCLUDED,Generic g_IncludeNDRNG value." "0,1" newline bitfld.long 0x0 9. "BA414EPPKEINCLUDED,Generic g_IncludePKE value." "0,1" bitfld.long 0x0 8. "BA419SM4INCLUDED,Generic g_IncludeSM4 value." "0,1" bitfld.long 0x0 7. "BA421ZUCINCLUDED,Generic g_IncludeZUC value." "0,1" bitfld.long 0x0 6. "BA418SHA3INCLUDED,Generic g_IncludeSHA3 value." "0,1" newline bitfld.long 0x0 5. "BA417CHACHAPOLYINCLUDED,Generic g_IncludeChachaPoly value." "0,1" bitfld.long 0x0 4. "BA413HASHINCLUDED,Generic g_IncludeHASH value." "0,1" bitfld.long 0x0 3. "BA412DESINCLUDED,Generic g_IncludeDES value." "0,1" bitfld.long 0x0 2. "BA416HPAESXTSINCLUDED,Generic g_IncludeAESXTS value." "0,1" newline bitfld.long 0x0 1. "BA415HPAESGCMINCLUDED,Generic g_IncludeAESGCM value." "0,1" bitfld.long 0x0 0. "BA411AESINCLUDED,Generic g_IncludeAES value." "0,1" line.long 0x4 "BA411EAESHWCFG1,Generic g_AesModesPoss value." bitfld.long 0x4 24.--26. "BA411EAESHWCFGKEYSIZE,Generic g_Keysize value." "0,1,2,3,4,5,6,7" bitfld.long 0x4 17. "BA411EAESHWCFGMASKING,Generic g_UseMasking value." "0,1" bitfld.long 0x4 16. "BA411EAESHWCFGCS,Generic g_CS value." "0,1" hexmask.long.word 0x4 0.--8. 1. "BA411EAESHWCFGMODE,Generic g_AesModesPoss value." line.long 0x8 "BA411EAESHWCFG2,Generic g_CtrSize value." hexmask.long.word 0x8 0.--15. 1. "BA411EAESHWCFG2,Generic g_CtrSize value." line.long 0xC "BA413HASHHWCFG,Generic g_Hash value" bitfld.long 0xC 18. "BA413HASHHWCFGVERIFYDIGEST,Generic g_HashVerifyDigest value." "0,1" bitfld.long 0xC 17. "BA413HASHHWCFGHMAC,Generic g_HMAC_enabled value." "0,1" bitfld.long 0xC 16. "BA413HASHHWCFGPADDING,Generic g_HashPadding value." "0,1" hexmask.long.byte 0xC 0.--6. 1. "BA413HASHHWCFGMASK,Generic g_HashMaskFunc value." line.long 0x10 "BA418SHA3HWCFG,Generic g_Sha3CtxtEn value." bitfld.long 0x10 0. "BA418SHA3HWCFG,Generic g_Sha3CtxtEn value." "0,1" line.long 0x14 "BA419SM4HWCFG,Generic g_SM4ModesPoss value." bitfld.long 0x14 17. "USEMASKING,Generic g_sm4UseMasking value." "0,1" hexmask.long.word 0x14 0.--9. 1. "BA419SM4HWCFG,Generic g_SM4ModesPoss value." line.long 0x18 "BA424ARIAHWCFG,Generic g_aria_modePoss value." hexmask.long.word 0x18 0.--8. 1. "BA424ARIAHWCFG,Generic g_aria_modePoss value." tree.end tree "IKG" base ad:0x51803000 wgroup.long 0x0++0x3 line.long 0x0 "START,Start register." bitfld.long 0x0 0. "START,Start the Isolated Key Generation." "0,1" rgroup.long 0x4++0x3 line.long 0x0 "STATUS,Status register." bitfld.long 0x0 7. "PRIVKEYSTORED,Private Keys are stored." "0,1" bitfld.long 0x0 6. "SYMKEYSTORED,Symmetric Keys are stored." "0,1" newline bitfld.long 0x0 5. "CATASTROPHICERROR,Catastrophic error during CTR_DRBG health test (only when g_hw_health_test = true)." "0,1" bitfld.long 0x0 4. "CTRDRBGBUSY,CTR_DRBG health test is busy (only when g_hw_health_test = true)." "0,1" newline bitfld.long 0x0 2. "OKAY,Isolated Key Generation is okay." "0,1" bitfld.long 0x0 1. "ENTROPYERROR,Entropy Error during Isolated Key Generation." "0,1" newline bitfld.long 0x0 0. "SEEDERROR,Seed Error during Isolated Key Generation." "0,1" wgroup.long 0x8++0x3 line.long 0x0 "INITDATA,InitData register." bitfld.long 0x0 0. "INITDATA,Writing a 1 initialise Nonce and Personalisation_String registers counters i.e. start writing from the 32 LSB." "0,1" group.long 0xC++0xF line.long 0x0 "NONCE,Nonce register." hexmask.long 0x0 0.--31. 1. "NONCE,Nonce (write/read value 32-bit by 32-bit)." line.long 0x4 "PERSONALISATIONSTRING,Personalisation String register." hexmask.long 0x4 0.--31. 1. "PERSONALISATIONSTRING,Personalisation String (write/read value 32-bit by 32-bit)." line.long 0x8 "RESEEDINTERVALLSB,Reseed Interval LSB register." hexmask.long 0x8 0.--31. 1. "RESEEDINTERVALLSB,Reseed Interval LSB." line.long 0xC "RESEEDINTERVALMSB,Reseed Interval MSB register." hexmask.long.word 0xC 0.--15. 1. "RESEEDINTERVALMSB,Reseed Interval MSB." wgroup.long 0x1C++0x3 line.long 0x0 "PKECONTROL,PKE Control register." bitfld.long 0x0 1. "CLEARIRQ,Clear the IRQ output." "0,1" bitfld.long 0x0 0. "PKESTART,Start the PKE operation or trigger for Secure mode exit." "0,1" group.long 0x20++0x3 line.long 0x0 "PKECOMMAND,PKE Command register." bitfld.long 0x0 8.--9. "OPSEL,Select PKE operation with Isolated Key" "0: Public Key Generation,1: ECDSA Signature,2: Point Multiplication,?" hexmask.long.byte 0x0 4.--7. 1. "SELECTEDKEY,Select Generated Private Key for PKE operation." newline bitfld.long 0x0 0. "SECUREMODE,Secure mode." "0: Unspecified,1: Unspecified" rgroup.long 0x24++0x3 line.long 0x0 "PKESTATUS,PKE Status register." bitfld.long 0x0 18. "ERASEBUSY,The PKE Data RAM is being erased." "0,1" bitfld.long 0x0 17. "IRQSTATUS,IRQ set when the operation is finished and cleared when the CPU writes the bit 1 of PKE_Control Register or a new operation is started." "0,1" newline bitfld.long 0x0 16. "IKGPKBUSY,Busy set when the operation starts and cleared when the operation is finished." "0,1" bitfld.long 0x0 1. "STARTERROR,Error because a new operation is started while the previous one is still busy." "0,1" newline bitfld.long 0x0 0. "ERROR,Error because either Private Keys are not stored or the operation is not defined." "0,1" group.long 0x28++0x3 line.long 0x0 "SOFTRST,SoftRst register." bitfld.long 0x0 0. "SOFTRST,Software reset:" "0: Normal mode.,1: The Isolated Key Generation logic and the keys.." rgroup.long 0x2C++0x3 line.long 0x0 "HWCONFIG,HwConfig register." hexmask.long.byte 0x0 28.--31. 1. "ADDITIONALINPUTLENGTH,Value of g_additional_input_length/32." hexmask.long.byte 0x0 24.--27. 1. "PERSONALIZATIONSTRINGLENGTH,Value of g_personalization_string_length/32." newline hexmask.long.byte 0x0 20.--23. 1. "NONCELENGTH,Value of g_nonce_length/32." hexmask.long.byte 0x0 16.--19. 1. "ENTROPYINPUTLENGTH,Value of g_entropy_input_length/32." newline bitfld.long 0x0 13.--15. "KEYSIZE,AES Key Size support for the AES Core embedded in the CTR_DRBG." "?,1: supports AES128,2: supports AES192,?,4: supports AES256,?,?,?" bitfld.long 0x0 12. "DF,Derivation function is implemented in the CTR_DRBG when 1." "0,1" newline bitfld.long 0x0 10.--11. "CURVE,ECC curve for IKG (input)." "0: P256.,1: P384.,2: P521.,?" bitfld.long 0x0 9. "HWHEALTHTEST,CTR_DRBG health test is implemented when 1." "0,1" newline bitfld.long 0x0 8. "IKGCM,Countermeasures for IKG operations are implemented when 1." "0,1" hexmask.long.byte 0x0 4.--7. 1. "NBPRIVKEYS,Number of Private Keys generated." newline hexmask.long.byte 0x0 0.--3. 1. "NBSYMKEYS,Number of Symmetric Keys generated." tree.end tree "PK" base ad:0x51802000 group.long 0x0++0x7 line.long 0x0 "POINTERS,Pointers register." hexmask.long.byte 0x0 24.--27. 1. "OPPTRN,When executing primitive arithmetic operations this pointer defines the location where the modulus is located in memory (location 0x0 to 0xF)." hexmask.long.byte 0x0 16.--19. 1. "OPPTRC,When executing primitive arithmetic operations this pointer defines the location (0x0 to 0xF) where the result will be stored in memory." newline hexmask.long.byte 0x0 8.--11. 1. "OPPTRB,When executing primitive arithmetic operations this pointer defines where operand B is located in memory (location 0x0 to 0xF)." hexmask.long.byte 0x0 0.--3. 1. "OPPTRA,When executing primitive arithmetic operations this pointer defines where operand A is located in memory (location 0x0 to 0xF)." line.long 0x4 "COMMAND,Command register." bitfld.long 0x4 31. "CALCR2,This bit indicates if the IP has to calculate R**2 mod N for the next operation." "0: don't recalculate R² mod N,1: re-calculate R² mod N" bitfld.long 0x4 30. "FLAGB,Flag B." "0,1" newline bitfld.long 0x4 29. "FLAGA,Flag A." "0,1" bitfld.long 0x4 28. "SWAPBYTES,Swap the bytes on AHB interface:" "0: Native format (little endian).,1: Byte swapped (big endian)." newline bitfld.long 0x4 26. "EDWARDS,Enable Edwards curve." "0,1" bitfld.long 0x4 25. "RANDPROJ,Enable randomization of projective coordinates (counter-measure)." "0,1" newline bitfld.long 0x4 24. "RANDKE,Enable randomization of exponent/scalar (counter-measure)." "0,1" bitfld.long 0x4 20.--22. "SELCURVE,Enable accelerator for specific curve modulus:" "0: Unspecified,1: Unspecified,2: Unspecified,3: Unspecified,4: Unspecified,5: Unspecified,6: Unspecified,?" newline bitfld.long 0x4 19. "RANDMOD,Enable randomization of modulus (counter-measure)." "0,1" hexmask.long.word 0x4 8.--17. 1. "OPBYTESM1,This field defines the size (= number of bytes minus one) of the operands for the current operation." newline bitfld.long 0x4 7. "FIELDF,0: Field is GF(p) 1: Field is GF(2**m)" "0: Field is GF,1: Field is GF" hexmask.long.byte 0x4 0.--6. 1. "OPEADDR,This field defines the operation to be performed." wgroup.long 0x8++0x3 line.long 0x0 "CONTROL,Command register." bitfld.long 0x0 1. "CLEARIRQ,Writing a 1 clears the IRQ output." "0,1" bitfld.long 0x0 0. "START,Writing a 1 starts the processing." "0,1" rgroup.long 0xC++0x3 line.long 0x0 "STATUS,Status register." hexmask.long.byte 0x0 24.--28. 1. "FAILPTR,These bits indicate which data location generated the error flag." bitfld.long 0x0 17. "INTRPTSTATUS,This bit reflects the IRQ output value." "0,1" newline bitfld.long 0x0 16. "PKBUSY,This bit reflects the BUSY output value." "0,1" hexmask.long.word 0x0 4.--15. 1. "ERRORFLAGS,These bits indicate an error condition." group.long 0x14++0x3 line.long 0x0 "TIMER,Timer register." hexmask.long 0x0 0.--31. 1. "TIMER,Number of core clock cycles." rgroup.long 0x18++0x3 line.long 0x0 "HWCONFIG,Hardware configuration register." bitfld.long 0x0 31. "DISABLECM,State of DisableCM input (high when counter-measures are disabled)." "0,1" bitfld.long 0x0 30. "DISABLECLRMEM,State of DisableClrMem input (high when automatic clear of the RAM after reset is disabled)." "0,1" newline bitfld.long 0x0 29. "DISABLESMX,State of DisableSMx input (high when SM2/SM9 operations are disabled)." "0,1" bitfld.long 0x0 25. "AHBMASTER,Memory access" "0: Memory access through AHB Slave and internally..,1: Memory access through AHB Master outside the PKE." newline bitfld.long 0x0 24. "X25519,Support Curve25519/Ed25519 acceleration." "0,1" bitfld.long 0x0 23. "P192,Support ECC P192 acceleration." "0,1" newline bitfld.long 0x0 22. "P521,Support ECC P521 acceleration." "0,1" bitfld.long 0x0 21. "P384,Support ECC P384 acceleration." "0,1" newline bitfld.long 0x0 20. "P256,Support ECC P256 acceleration." "0,1" bitfld.long 0x0 18. "ECC,Support error correction." "0,1" newline bitfld.long 0x0 17. "BINARYFIELD,Support binary field." "0,1" bitfld.long 0x0 16. "PRIMEFIELD,Support prime field." "0,1" newline hexmask.long.byte 0x0 12.--15. 1. "NBMULT,Number of multipliers:" hexmask.long.word 0x0 0.--11. 1. "MAXOPSIZE,Maximum operand size (number of bytes)." group.long 0x1C++0x3 line.long 0x0 "OPSIZE,Operand size register." hexmask.long.word 0x0 0.--12. 1. "OPSIZE,Operand size (number of bytes):" group.long 0x40++0x3 line.long 0x0 "RAMERRORINJECT,RAM error injection register." hexmask.long.word 0x0 16.--25. 1. "BITERROR2,Bit position of second error" hexmask.long.word 0x0 0.--9. 1. "BITERROR1,Bit position of first error" rgroup.long 0x44++0x3 line.long 0x0 "RAMERRORSTATUS,RAM error status register." bitfld.long 0x0 1. "RAMFAILURE,This bit indicates that an uncorrectable error has been detected on the data RAM interface" "0,1" bitfld.long 0x0 0. "RAMCORRECTION,This bit indicates that a 1-bit error has been detected and corrected on RAM interface" "0,1" tree.end tree "RNGCONTROL" base ad:0x51801000 group.long 0x0++0xB line.long 0x0 "CONTROL,Control register" bitfld.long 0x0 20. "FIFOWRITESTARTUP,Enable write of the samples in the FIFO during start-up." "0,1" newline hexmask.long.byte 0x0 16.--19. 1. "NB128BITBLOCKS,Number of 128 bit blocks used in AES-CBCMAC post-processing." newline bitfld.long 0x0 15. "AIS31TESTSEL,Select input to the AIS31 test module:" "0: Before conditioning.,1: After conditioning." newline bitfld.long 0x0 14. "HEALTHTESTSEL,Select input to health test module:" "0: Before conditioning.,1: After conditioning." newline bitfld.long 0x0 13. "AIS31BYPASS,Bypass AIS31 tests such that the results of the start-up and online tests do not affect the FSM state." "0,1" newline bitfld.long 0x0 12. "HEALTHTESTBYPASS,Bypass NIST tests such that the results of the start-up and online test do not affect the FSM state." "0,1" newline bitfld.long 0x0 11. "FORCEACTIVEROS,Force oscillators to run when FIFO is full." "0,1" newline bitfld.long 0x0 10. "INTENALM,Interrupt enable for AIS31 noise alarm." "0,1" newline bitfld.long 0x0 9. "INTENPRE,Interrupt enable for AIS31 preliminary noise alarm." "0,1" newline bitfld.long 0x0 8. "SOFTRST,Software reset:" "0: Normal mode.,1: The continuous test the conditioning function.." newline bitfld.long 0x0 7. "INTENFULL,Interrupt enable for FIFO full." "0,1" newline bitfld.long 0x0 5. "INTENPROP,Interrupt enable for Adaptive Proportion Test failure (1024-sample window)." "0,1" newline bitfld.long 0x0 4. "INTENREP,Interrupt enable for Repetition Count Test failure." "0,1" newline bitfld.long 0x0 3. "CONDBYPASS,Conditioning function bypass." "0: the conditioning function is used (normal mode).,1: the conditioning function is bypassed (to.." newline bitfld.long 0x0 2. "TESTEN,Select input for conditioning function and continuous tests:" "0: Noise source (normal mode).,1: Test data register (test mode)." newline bitfld.long 0x0 1. "LFSREN,Select between the NDRNG with asynchronous free running oscillators (when 0) and the Pseudo-Random generator with synchronous oscillators for simulation purpose (when 1)." "0,1" newline bitfld.long 0x0 0. "ENABLE,Enable the NDRNG." "0,1" line.long 0x4 "FIFOLEVEL,FIFO level register." hexmask.long 0x4 0.--31. 1. "FIFOLEVEL,Number of 32 bits words of random values available in the FIFO." line.long 0x8 "FIFOTHRESHOLD,FIFO threshold register." bitfld.long 0x8 0.--2. "FIFOTHRESHOLD,FIFO level below which the module leaves the idle state to refill the FIFO expressed in number of 128bit blocks." "0,1,2,3,4,5,6,7" rgroup.long 0xC++0x3 line.long 0x0 "FIFODEPTH,FIFO depth register." hexmask.long 0x0 0.--31. 1. "FIFODEPTH,Maximum number of 32 bits words that can be stored in the FIFO: 2**g_fifodepth." repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "KEY[$1],Description collection: Key register." hexmask.long 0x0 0.--31. 1. "KEY,Key register." repeat.end wgroup.long 0x20++0x3 line.long 0x0 "TESTDATA,Test data register." hexmask.long 0x0 0.--31. 1. "TESTDATA,Test data register." group.long 0x24++0x7 line.long 0x0 "REPEATTHRESHOLD,Repetition Test Count Cut-Off value." hexmask.long.byte 0x0 0.--5. 1. "REPEATTHRESHOLD,Repetition Test Count Cut-Off value." line.long 0x4 "PROPTHRESHOLD,Adaptive Proportion Test (1024-sample window) Cut-Off value." hexmask.long.word 0x4 0.--9. 1. "PROPTHRESHOLD,Adaptive Proportion Test (1024-sample window) Cut-Off value." group.long 0x30++0x7 line.long 0x0 "STATUS,Status register." bitfld.long 0x0 11. "FIFOACCFAIL,Set when a FIFO data read is performed while the NDRNG is disabled AND has its FIFO empty (FIFOLevel = 0)." "0,1" newline rbitfld.long 0x0 10. "STARTUPFAIL,Start-up test failure." "0,1" newline bitfld.long 0x0 9. "ALMINT,AIS31 noise alarm interrupt status." "0,1" newline bitfld.long 0x0 8. "PREINT,AIS31 preliminary noise alarm interrupt status." "0,1" newline bitfld.long 0x0 7. "FULLINT,FIFO full status." "0,1" newline bitfld.long 0x0 5. "PROPFAIL,NIST-800-90B adaptive Proportion Test (1024-sample window) interrupt status." "0,1" newline bitfld.long 0x0 4. "REPFAIL,NIST-800-90B repetition Count Test interrupt status." "0,1" newline rbitfld.long 0x0 1.--3. "STATE,State of the control FSM:" "0: Reset,1: Startup,2: Idle (Rings On),3: Idle (Rings Off),4: Fill FIFO,5: Error,?,?" newline rbitfld.long 0x0 0. "TESTDATABUSY,High when data written to TestData register is being processed." "0,1" line.long 0x4 "INITWAITVAL,Initial wait counter value." hexmask.long.word 0x4 0.--15. 1. "INITWAITVAL,Number of clock cycles to wait before sampling data from the noise source." repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x38)++0x3 line.long 0x0 "DISABLEOSC[$1],Description collection: Disable oscillator rings #n*32 to #((n+1)*32)-1." hexmask.long 0x0 0.--31. 1. "DISABLEOSC,Disable oscillator rings #n*32 to #((n+1)*32)-1." repeat.end group.long 0x40++0x17 line.long 0x0 "SWOFFTMRVAL,Switch off timer value." hexmask.long.word 0x0 0.--15. 1. "SWOFFTMRVAL,Number of clk cycles to wait before stopping the rings after the FIFO is full." line.long 0x4 "CLKDIV,Sample clock divider." hexmask.long.byte 0x4 0.--7. 1. "CLKDIV,Sample clock divider." line.long 0x8 "AIS31CONF0,AIS31 configuration register 0." hexmask.long.word 0x8 16.--30. 1. "ONLINETHRESHOLD,Online threshold." newline hexmask.long.word 0x8 0.--14. 1. "STARTUPTHRESHOLD,Start-up test threshold." line.long 0xC "AIS31CONF1,AIS31 configuration register 1." hexmask.long.word 0xC 16.--30. 1. "HEXPECTEDVALUE,Expected history value." newline hexmask.long.word 0xC 0.--14. 1. "ONLINEREPTHRESHOLD,Online repeat threshold." line.long 0x10 "AIS31CONF2,AIS31 configuration register 2." hexmask.long.word 0x10 16.--30. 1. "HMAX,Maximum allowed history value." newline hexmask.long.word 0x10 0.--14. 1. "HMIN,Minimum allowed history value." line.long 0x14 "AIS31STATUS,AIS31 status register." bitfld.long 0x14 17. "PRELIMNOISEALARMREP,Last preliminary noise alarm occurred due to consecutive high Χ**2." "0,1" newline bitfld.long 0x14 16. "PRELIMNOISEALARMRNG,Last preliminary noise alarm occurred due to history value out of range." "0,1" newline hexmask.long.word 0x14 0.--15. 1. "NUMPRELIMALARMS,Number of preliminary noise alarms since counter was last cleared." rgroup.long 0x58++0x3 line.long 0x0 "HWCONFIG,Hardware configuration register." bitfld.long 0x0 9. "AIS31FULL,Generic g_AIS31Full value." "0,1" newline bitfld.long 0x0 8. "AIS31,Generic g_AIS31 value." "0,1" newline hexmask.long.byte 0x0 0.--7. 1. "NUMBOFRINGS,Generic g_NumRings value." repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x80)++0x3 line.long 0x0 "FIFO[$1],Description collection: FIFO data" hexmask.long 0x0 0.--31. 1. "DATA,FIFO data" repeat.end tree.end tree.end tree.end tree "CTRLAPPERI (Control Access Port)" base ad:0x0 tree "GLOBAL_CTRLAP_NS" base ad:0x40052000 group.long 0x100++0x7 line.long 0x0 "EVENTS_RXREADY,RXSTATUS is changed to DataPending." bitfld.long 0x0 0. "EVENTS_RXREADY,RXSTATUS is changed to DataPending." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_TXDONE,TXSTATUS is changed to NoDataPending." bitfld.long 0x4 0. "EVENTS_TXDONE,TXSTATUS is changed to NoDataPending." "0: Event not generated,1: Event generated" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 1. "TXDONE,Enable or disable interrupt for event TXDONE" "0: Disable,1: Enable" bitfld.long 0x0 0. "RXREADY,Enable or disable interrupt for event RXREADY" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 1. "TXDONE,Write '1' to enable interrupt for event TXDONE" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "RXREADY,Write '1' to enable interrupt for event RXREADY" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 1. "TXDONE,Write '1' to disable interrupt for event TXDONE" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "RXREADY,Write '1' to disable interrupt for event RXREADY" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 1. "TXDONE,Read pending status of interrupt for event TXDONE" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 0. "RXREADY,Read pending status of interrupt for event RXREADY" "0: Read: Not pending,1: Read: Pending" tree "ERASEPROTECT" base ad:0x40052500 group.long 0x0++0x3 line.long 0x0 "LOCK,This register locks the ERASEPROTECT.DISABLE register from being written until next reset." bitfld.long 0x0 0. "LOCK,Lock ERASEPROTECT.DISABLE register from being written until next reset." "0: Register ERASEPROTECT.DISABLE is writeable.,1: Register ERASEPROTECT.DISABLE is read-only." group.long 0x4++0x3 line.long 0x0 "DISABLE,This register disables the ERASEPROTECT register and performs an ERASEALL operation." hexmask.long 0x0 0.--31. 1. "KEY,The ERASEALL sequence is initiated if the value of the KEY fields are non-zero and the KEY fields match on both the CPU and debugger sides." tree.end tree "MAILBOX" base ad:0x40052400 rgroup.long 0x0++0x7 line.long 0x0 "RXDATA,Data sent from the debugger to the CPU." hexmask.long 0x0 0.--31. 1. "RXDATA,Data received from debugger." line.long 0x4 "RXSTATUS,Status to indicate if data sent from the debugger to the CPU has been read." bitfld.long 0x4 0. "RXSTATUS,Status of data in register RXDATA." "0: No data is pending in register RXDATA.,1: Data is pending in register RXDATA." group.long 0x80++0x3 line.long 0x0 "TXDATA,Data sent from the CPU to the debugger." hexmask.long 0x0 0.--31. 1. "TXDATA,Data sent to debugger." rgroup.long 0x84++0x3 line.long 0x0 "TXSTATUS,Status to indicate if data sent from the CPU to the debugger has been read." bitfld.long 0x0 0. "TXSTATUS,Status of data in register TXDATA." "0: No data is pending in register TXDATA.,1: Data is pending in register TXDATA." tree.end base ad:0x40052000 newline wgroup.long 0x520++0x3 newline line.long 0x0 "RESET,System reset request." bitfld.long 0x0 0.--2. "RESET,Reset request" "0: No reset is generated,1: Perform a device soft reset,2: Perform a device hard reset,?,4: Perform a device pin reset,?,?,?" tree.end tree "GLOBAL_CTRLAP_S" base ad:0x50052000 group.long 0x100++0x7 line.long 0x0 "EVENTS_RXREADY,RXSTATUS is changed to DataPending." bitfld.long 0x0 0. "EVENTS_RXREADY,RXSTATUS is changed to DataPending." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_TXDONE,TXSTATUS is changed to NoDataPending." bitfld.long 0x4 0. "EVENTS_TXDONE,TXSTATUS is changed to NoDataPending." "0: Event not generated,1: Event generated" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 1. "TXDONE,Enable or disable interrupt for event TXDONE" "0: Disable,1: Enable" bitfld.long 0x0 0. "RXREADY,Enable or disable interrupt for event RXREADY" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 1. "TXDONE,Write '1' to enable interrupt for event TXDONE" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "RXREADY,Write '1' to enable interrupt for event RXREADY" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 1. "TXDONE,Write '1' to disable interrupt for event TXDONE" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "RXREADY,Write '1' to disable interrupt for event RXREADY" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 1. "TXDONE,Read pending status of interrupt for event TXDONE" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 0. "RXREADY,Read pending status of interrupt for event RXREADY" "0: Read: Not pending,1: Read: Pending" tree "ERASEPROTECT" base ad:0x50052000 group.long 0x0++0x3 line.long 0x0 "LOCK,This register locks the ERASEPROTECT.DISABLE register from being written until next reset." bitfld.long 0x0 0. "LOCK,Lock ERASEPROTECT.DISABLE register from being written until next reset." "0: Register ERASEPROTECT.DISABLE is writeable.,1: Register ERASEPROTECT.DISABLE is read-only." group.long 0x4++0x3 line.long 0x0 "DISABLE,This register disables the ERASEPROTECT register and performs an ERASEALL operation." hexmask.long 0x0 0.--31. 1. "KEY,The ERASEALL sequence is initiated if the value of the KEY fields are non-zero and the KEY fields match on both the CPU and debugger sides." tree.end tree "MAILBOX" base ad:0x50052000 rgroup.long 0x0++0x7 line.long 0x0 "RXDATA,Data sent from the debugger to the CPU." hexmask.long 0x0 0.--31. 1. "RXDATA,Data received from debugger." line.long 0x4 "RXSTATUS,Status to indicate if data sent from the debugger to the CPU has been read." bitfld.long 0x4 0. "RXSTATUS,Status of data in register RXDATA." "0: No data is pending in register RXDATA.,1: Data is pending in register RXDATA." group.long 0x80++0x3 line.long 0x0 "TXDATA,Data sent from the CPU to the debugger." hexmask.long 0x0 0.--31. 1. "TXDATA,Data sent to debugger." rgroup.long 0x84++0x3 line.long 0x0 "TXSTATUS,Status to indicate if data sent from the CPU to the debugger has been read." bitfld.long 0x0 0. "TXSTATUS,Status of data in register TXDATA." "0: No data is pending in register TXDATA.,1: Data is pending in register TXDATA." tree.end base ad:0x50052000 newline wgroup.long 0x520++0x3 newline line.long 0x0 "RESET,System reset request." bitfld.long 0x0 0.--2. "RESET,Reset request" "0: No reset is generated,1: Perform a device soft reset,2: Perform a device hard reset,?,4: Perform a device pin reset,?,?,?" tree.end tree.end tree "DPPIC (Distributed Programmable Peripheral Pnterconnect Controller)" base ad:0x0 tree "GLOBAL_DPPIC00_NS" base ad:0x40042000 repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x40042000 ad:0x40042008 ad:0x40042010 ad:0x40042018 ad:0x40042020 ad:0x40042028) tree "TASKS_CHG[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Enable channel group n" bitfld.long 0x0 0. "EN,Enable channel group n" "?,1: Trigger task" line.long 0x4 "DIS,Description cluster: Disable channel group n" bitfld.long 0x4 0. "DIS,Disable channel group n" "?,1: Trigger task" tree.end repeat.end repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x40042080 ad:0x40042088 ad:0x40042090 ad:0x40042098 ad:0x400420A0 ad:0x400420A8) tree "SUBSCRIBE_CHG[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Subscribe configuration for task CHG[n].EN" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].EN will subscribe to" line.long 0x4 "DIS,Description cluster: Subscribe configuration for task CHG[n].DIS" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].DIS will subscribe to" tree.end repeat.end base ad:0x40042000 newline group.long 0x500++0xB line.long 0x0 "CHEN,Channel enable register" bitfld.long 0x0 23. "CH23,Enable or disable channel 23" "0: Disable channel,1: Enable channel" bitfld.long 0x0 22. "CH22,Enable or disable channel 22" "0: Disable channel,1: Enable channel" bitfld.long 0x0 21. "CH21,Enable or disable channel 21" "0: Disable channel,1: Enable channel" bitfld.long 0x0 20. "CH20,Enable or disable channel 20" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 19. "CH19,Enable or disable channel 19" "0: Disable channel,1: Enable channel" bitfld.long 0x0 18. "CH18,Enable or disable channel 18" "0: Disable channel,1: Enable channel" bitfld.long 0x0 17. "CH17,Enable or disable channel 17" "0: Disable channel,1: Enable channel" bitfld.long 0x0 16. "CH16,Enable or disable channel 16" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 15. "CH15,Enable or disable channel 15" "0: Disable channel,1: Enable channel" bitfld.long 0x0 14. "CH14,Enable or disable channel 14" "0: Disable channel,1: Enable channel" bitfld.long 0x0 13. "CH13,Enable or disable channel 13" "0: Disable channel,1: Enable channel" bitfld.long 0x0 12. "CH12,Enable or disable channel 12" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 11. "CH11,Enable or disable channel 11" "0: Disable channel,1: Enable channel" bitfld.long 0x0 10. "CH10,Enable or disable channel 10" "0: Disable channel,1: Enable channel" bitfld.long 0x0 9. "CH9,Enable or disable channel 9" "0: Disable channel,1: Enable channel" bitfld.long 0x0 8. "CH8,Enable or disable channel 8" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 7. "CH7,Enable or disable channel 7" "0: Disable channel,1: Enable channel" bitfld.long 0x0 6. "CH6,Enable or disable channel 6" "0: Disable channel,1: Enable channel" bitfld.long 0x0 5. "CH5,Enable or disable channel 5" "0: Disable channel,1: Enable channel" bitfld.long 0x0 4. "CH4,Enable or disable channel 4" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 3. "CH3,Enable or disable channel 3" "0: Disable channel,1: Enable channel" bitfld.long 0x0 2. "CH2,Enable or disable channel 2" "0: Disable channel,1: Enable channel" bitfld.long 0x0 1. "CH1,Enable or disable channel 1" "0: Disable channel,1: Enable channel" bitfld.long 0x0 0. "CH0,Enable or disable channel 0" "0: Disable channel,1: Enable channel" line.long 0x4 "CHENSET,Channel enable set register" bitfld.long 0x4 23. "CH23,Channel 23 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 22. "CH22,Channel 22 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 21. "CH21,Channel 21 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 20. "CH20,Channel 20 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 19. "CH19,Channel 19 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 18. "CH18,Channel 18 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 17. "CH17,Channel 17 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 16. "CH16,Channel 16 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 15. "CH15,Channel 15 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 14. "CH14,Channel 14 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 13. "CH13,Channel 13 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 12. "CH12,Channel 12 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 11. "CH11,Channel 11 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 10. "CH10,Channel 10 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 9. "CH9,Channel 9 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 8. "CH8,Channel 8 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 7. "CH7,Channel 7 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 6. "CH6,Channel 6 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 5. "CH5,Channel 5 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 4. "CH4,Channel 4 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 3. "CH3,Channel 3 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 2. "CH2,Channel 2 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 1. "CH1,Channel 1 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 0. "CH0,Channel 0 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" line.long 0x8 "CHENCLR,Channel enable clear register" bitfld.long 0x8 23. "CH23,Channel 23 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 22. "CH22,Channel 22 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 21. "CH21,Channel 21 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 20. "CH20,Channel 20 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 19. "CH19,Channel 19 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 18. "CH18,Channel 18 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 17. "CH17,Channel 17 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 16. "CH16,Channel 16 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 15. "CH15,Channel 15 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 14. "CH14,Channel 14 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 13. "CH13,Channel 13 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 12. "CH12,Channel 12 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 11. "CH11,Channel 11 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 10. "CH10,Channel 10 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 9. "CH9,Channel 9 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 8. "CH8,Channel 8 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 7. "CH7,Channel 7 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 6. "CH6,Channel 6 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 5. "CH5,Channel 5 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 4. "CH4,Channel 4 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 3. "CH3,Channel 3 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 2. "CH2,Channel 2 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 1. "CH1,Channel 1 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 0. "CH0,Channel 0 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x800)++0x3 line.long 0x0 "CHG[$1],Description collection: Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled" bitfld.long 0x0 23. "CH23,Include or exclude channel 23" "0: Exclude,1: Include" bitfld.long 0x0 22. "CH22,Include or exclude channel 22" "0: Exclude,1: Include" bitfld.long 0x0 21. "CH21,Include or exclude channel 21" "0: Exclude,1: Include" bitfld.long 0x0 20. "CH20,Include or exclude channel 20" "0: Exclude,1: Include" newline bitfld.long 0x0 19. "CH19,Include or exclude channel 19" "0: Exclude,1: Include" bitfld.long 0x0 18. "CH18,Include or exclude channel 18" "0: Exclude,1: Include" bitfld.long 0x0 17. "CH17,Include or exclude channel 17" "0: Exclude,1: Include" bitfld.long 0x0 16. "CH16,Include or exclude channel 16" "0: Exclude,1: Include" newline bitfld.long 0x0 15. "CH15,Include or exclude channel 15" "0: Exclude,1: Include" bitfld.long 0x0 14. "CH14,Include or exclude channel 14" "0: Exclude,1: Include" bitfld.long 0x0 13. "CH13,Include or exclude channel 13" "0: Exclude,1: Include" bitfld.long 0x0 12. "CH12,Include or exclude channel 12" "0: Exclude,1: Include" newline bitfld.long 0x0 11. "CH11,Include or exclude channel 11" "0: Exclude,1: Include" bitfld.long 0x0 10. "CH10,Include or exclude channel 10" "0: Exclude,1: Include" bitfld.long 0x0 9. "CH9,Include or exclude channel 9" "0: Exclude,1: Include" bitfld.long 0x0 8. "CH8,Include or exclude channel 8" "0: Exclude,1: Include" newline bitfld.long 0x0 7. "CH7,Include or exclude channel 7" "0: Exclude,1: Include" bitfld.long 0x0 6. "CH6,Include or exclude channel 6" "0: Exclude,1: Include" bitfld.long 0x0 5. "CH5,Include or exclude channel 5" "0: Exclude,1: Include" bitfld.long 0x0 4. "CH4,Include or exclude channel 4" "0: Exclude,1: Include" newline bitfld.long 0x0 3. "CH3,Include or exclude channel 3" "0: Exclude,1: Include" bitfld.long 0x0 2. "CH2,Include or exclude channel 2" "0: Exclude,1: Include" bitfld.long 0x0 1. "CH1,Include or exclude channel 1" "0: Exclude,1: Include" bitfld.long 0x0 0. "CH0,Include or exclude channel 0" "0: Exclude,1: Include" repeat.end tree.end tree "GLOBAL_DPPIC00_S" base ad:0x50042000 repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x50042000 ad:0x50042008 ad:0x50042010 ad:0x50042018 ad:0x50042020 ad:0x50042028) tree "TASKS_CHG[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Enable channel group n" bitfld.long 0x0 0. "EN,Enable channel group n" "?,1: Trigger task" line.long 0x4 "DIS,Description cluster: Disable channel group n" bitfld.long 0x4 0. "DIS,Disable channel group n" "?,1: Trigger task" tree.end repeat.end repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x50042080 ad:0x50042088 ad:0x50042090 ad:0x50042098 ad:0x500420A0 ad:0x500420A8) tree "SUBSCRIBE_CHG[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Subscribe configuration for task CHG[n].EN" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].EN will subscribe to" line.long 0x4 "DIS,Description cluster: Subscribe configuration for task CHG[n].DIS" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].DIS will subscribe to" tree.end repeat.end base ad:0x50042000 newline group.long 0x500++0xB line.long 0x0 "CHEN,Channel enable register" bitfld.long 0x0 23. "CH23,Enable or disable channel 23" "0: Disable channel,1: Enable channel" bitfld.long 0x0 22. "CH22,Enable or disable channel 22" "0: Disable channel,1: Enable channel" bitfld.long 0x0 21. "CH21,Enable or disable channel 21" "0: Disable channel,1: Enable channel" bitfld.long 0x0 20. "CH20,Enable or disable channel 20" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 19. "CH19,Enable or disable channel 19" "0: Disable channel,1: Enable channel" bitfld.long 0x0 18. "CH18,Enable or disable channel 18" "0: Disable channel,1: Enable channel" bitfld.long 0x0 17. "CH17,Enable or disable channel 17" "0: Disable channel,1: Enable channel" bitfld.long 0x0 16. "CH16,Enable or disable channel 16" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 15. "CH15,Enable or disable channel 15" "0: Disable channel,1: Enable channel" bitfld.long 0x0 14. "CH14,Enable or disable channel 14" "0: Disable channel,1: Enable channel" bitfld.long 0x0 13. "CH13,Enable or disable channel 13" "0: Disable channel,1: Enable channel" bitfld.long 0x0 12. "CH12,Enable or disable channel 12" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 11. "CH11,Enable or disable channel 11" "0: Disable channel,1: Enable channel" bitfld.long 0x0 10. "CH10,Enable or disable channel 10" "0: Disable channel,1: Enable channel" bitfld.long 0x0 9. "CH9,Enable or disable channel 9" "0: Disable channel,1: Enable channel" bitfld.long 0x0 8. "CH8,Enable or disable channel 8" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 7. "CH7,Enable or disable channel 7" "0: Disable channel,1: Enable channel" bitfld.long 0x0 6. "CH6,Enable or disable channel 6" "0: Disable channel,1: Enable channel" bitfld.long 0x0 5. "CH5,Enable or disable channel 5" "0: Disable channel,1: Enable channel" bitfld.long 0x0 4. "CH4,Enable or disable channel 4" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 3. "CH3,Enable or disable channel 3" "0: Disable channel,1: Enable channel" bitfld.long 0x0 2. "CH2,Enable or disable channel 2" "0: Disable channel,1: Enable channel" bitfld.long 0x0 1. "CH1,Enable or disable channel 1" "0: Disable channel,1: Enable channel" bitfld.long 0x0 0. "CH0,Enable or disable channel 0" "0: Disable channel,1: Enable channel" line.long 0x4 "CHENSET,Channel enable set register" bitfld.long 0x4 23. "CH23,Channel 23 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 22. "CH22,Channel 22 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 21. "CH21,Channel 21 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 20. "CH20,Channel 20 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 19. "CH19,Channel 19 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 18. "CH18,Channel 18 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 17. "CH17,Channel 17 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 16. "CH16,Channel 16 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 15. "CH15,Channel 15 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 14. "CH14,Channel 14 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 13. "CH13,Channel 13 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 12. "CH12,Channel 12 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 11. "CH11,Channel 11 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 10. "CH10,Channel 10 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 9. "CH9,Channel 9 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 8. "CH8,Channel 8 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 7. "CH7,Channel 7 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 6. "CH6,Channel 6 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 5. "CH5,Channel 5 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 4. "CH4,Channel 4 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 3. "CH3,Channel 3 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 2. "CH2,Channel 2 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 1. "CH1,Channel 1 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 0. "CH0,Channel 0 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" line.long 0x8 "CHENCLR,Channel enable clear register" bitfld.long 0x8 23. "CH23,Channel 23 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 22. "CH22,Channel 22 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 21. "CH21,Channel 21 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 20. "CH20,Channel 20 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 19. "CH19,Channel 19 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 18. "CH18,Channel 18 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 17. "CH17,Channel 17 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 16. "CH16,Channel 16 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 15. "CH15,Channel 15 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 14. "CH14,Channel 14 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 13. "CH13,Channel 13 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 12. "CH12,Channel 12 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 11. "CH11,Channel 11 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 10. "CH10,Channel 10 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 9. "CH9,Channel 9 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 8. "CH8,Channel 8 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 7. "CH7,Channel 7 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 6. "CH6,Channel 6 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 5. "CH5,Channel 5 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 4. "CH4,Channel 4 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 3. "CH3,Channel 3 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 2. "CH2,Channel 2 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 1. "CH1,Channel 1 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 0. "CH0,Channel 0 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x800)++0x3 line.long 0x0 "CHG[$1],Description collection: Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled" bitfld.long 0x0 23. "CH23,Include or exclude channel 23" "0: Exclude,1: Include" bitfld.long 0x0 22. "CH22,Include or exclude channel 22" "0: Exclude,1: Include" bitfld.long 0x0 21. "CH21,Include or exclude channel 21" "0: Exclude,1: Include" bitfld.long 0x0 20. "CH20,Include or exclude channel 20" "0: Exclude,1: Include" newline bitfld.long 0x0 19. "CH19,Include or exclude channel 19" "0: Exclude,1: Include" bitfld.long 0x0 18. "CH18,Include or exclude channel 18" "0: Exclude,1: Include" bitfld.long 0x0 17. "CH17,Include or exclude channel 17" "0: Exclude,1: Include" bitfld.long 0x0 16. "CH16,Include or exclude channel 16" "0: Exclude,1: Include" newline bitfld.long 0x0 15. "CH15,Include or exclude channel 15" "0: Exclude,1: Include" bitfld.long 0x0 14. "CH14,Include or exclude channel 14" "0: Exclude,1: Include" bitfld.long 0x0 13. "CH13,Include or exclude channel 13" "0: Exclude,1: Include" bitfld.long 0x0 12. "CH12,Include or exclude channel 12" "0: Exclude,1: Include" newline bitfld.long 0x0 11. "CH11,Include or exclude channel 11" "0: Exclude,1: Include" bitfld.long 0x0 10. "CH10,Include or exclude channel 10" "0: Exclude,1: Include" bitfld.long 0x0 9. "CH9,Include or exclude channel 9" "0: Exclude,1: Include" bitfld.long 0x0 8. "CH8,Include or exclude channel 8" "0: Exclude,1: Include" newline bitfld.long 0x0 7. "CH7,Include or exclude channel 7" "0: Exclude,1: Include" bitfld.long 0x0 6. "CH6,Include or exclude channel 6" "0: Exclude,1: Include" bitfld.long 0x0 5. "CH5,Include or exclude channel 5" "0: Exclude,1: Include" bitfld.long 0x0 4. "CH4,Include or exclude channel 4" "0: Exclude,1: Include" newline bitfld.long 0x0 3. "CH3,Include or exclude channel 3" "0: Exclude,1: Include" bitfld.long 0x0 2. "CH2,Include or exclude channel 2" "0: Exclude,1: Include" bitfld.long 0x0 1. "CH1,Include or exclude channel 1" "0: Exclude,1: Include" bitfld.long 0x0 0. "CH0,Include or exclude channel 0" "0: Exclude,1: Include" repeat.end tree.end tree "GLOBAL_DPPIC10_NS" base ad:0x40082000 repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x40082000 ad:0x40082008 ad:0x40082010 ad:0x40082018 ad:0x40082020 ad:0x40082028) tree "TASKS_CHG[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Enable channel group n" bitfld.long 0x0 0. "EN,Enable channel group n" "?,1: Trigger task" line.long 0x4 "DIS,Description cluster: Disable channel group n" bitfld.long 0x4 0. "DIS,Disable channel group n" "?,1: Trigger task" tree.end repeat.end repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x40082080 ad:0x40082088 ad:0x40082090 ad:0x40082098 ad:0x400820A0 ad:0x400820A8) tree "SUBSCRIBE_CHG[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Subscribe configuration for task CHG[n].EN" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].EN will subscribe to" line.long 0x4 "DIS,Description cluster: Subscribe configuration for task CHG[n].DIS" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].DIS will subscribe to" tree.end repeat.end base ad:0x40082000 newline group.long 0x500++0xB line.long 0x0 "CHEN,Channel enable register" bitfld.long 0x0 23. "CH23,Enable or disable channel 23" "0: Disable channel,1: Enable channel" bitfld.long 0x0 22. "CH22,Enable or disable channel 22" "0: Disable channel,1: Enable channel" bitfld.long 0x0 21. "CH21,Enable or disable channel 21" "0: Disable channel,1: Enable channel" bitfld.long 0x0 20. "CH20,Enable or disable channel 20" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 19. "CH19,Enable or disable channel 19" "0: Disable channel,1: Enable channel" bitfld.long 0x0 18. "CH18,Enable or disable channel 18" "0: Disable channel,1: Enable channel" bitfld.long 0x0 17. "CH17,Enable or disable channel 17" "0: Disable channel,1: Enable channel" bitfld.long 0x0 16. "CH16,Enable or disable channel 16" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 15. "CH15,Enable or disable channel 15" "0: Disable channel,1: Enable channel" bitfld.long 0x0 14. "CH14,Enable or disable channel 14" "0: Disable channel,1: Enable channel" bitfld.long 0x0 13. "CH13,Enable or disable channel 13" "0: Disable channel,1: Enable channel" bitfld.long 0x0 12. "CH12,Enable or disable channel 12" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 11. "CH11,Enable or disable channel 11" "0: Disable channel,1: Enable channel" bitfld.long 0x0 10. "CH10,Enable or disable channel 10" "0: Disable channel,1: Enable channel" bitfld.long 0x0 9. "CH9,Enable or disable channel 9" "0: Disable channel,1: Enable channel" bitfld.long 0x0 8. "CH8,Enable or disable channel 8" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 7. "CH7,Enable or disable channel 7" "0: Disable channel,1: Enable channel" bitfld.long 0x0 6. "CH6,Enable or disable channel 6" "0: Disable channel,1: Enable channel" bitfld.long 0x0 5. "CH5,Enable or disable channel 5" "0: Disable channel,1: Enable channel" bitfld.long 0x0 4. "CH4,Enable or disable channel 4" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 3. "CH3,Enable or disable channel 3" "0: Disable channel,1: Enable channel" bitfld.long 0x0 2. "CH2,Enable or disable channel 2" "0: Disable channel,1: Enable channel" bitfld.long 0x0 1. "CH1,Enable or disable channel 1" "0: Disable channel,1: Enable channel" bitfld.long 0x0 0. "CH0,Enable or disable channel 0" "0: Disable channel,1: Enable channel" line.long 0x4 "CHENSET,Channel enable set register" bitfld.long 0x4 23. "CH23,Channel 23 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 22. "CH22,Channel 22 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 21. "CH21,Channel 21 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 20. "CH20,Channel 20 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 19. "CH19,Channel 19 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 18. "CH18,Channel 18 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 17. "CH17,Channel 17 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 16. "CH16,Channel 16 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 15. "CH15,Channel 15 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 14. "CH14,Channel 14 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 13. "CH13,Channel 13 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 12. "CH12,Channel 12 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 11. "CH11,Channel 11 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 10. "CH10,Channel 10 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 9. "CH9,Channel 9 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 8. "CH8,Channel 8 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 7. "CH7,Channel 7 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 6. "CH6,Channel 6 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 5. "CH5,Channel 5 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 4. "CH4,Channel 4 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 3. "CH3,Channel 3 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 2. "CH2,Channel 2 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 1. "CH1,Channel 1 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 0. "CH0,Channel 0 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" line.long 0x8 "CHENCLR,Channel enable clear register" bitfld.long 0x8 23. "CH23,Channel 23 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 22. "CH22,Channel 22 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 21. "CH21,Channel 21 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 20. "CH20,Channel 20 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 19. "CH19,Channel 19 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 18. "CH18,Channel 18 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 17. "CH17,Channel 17 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 16. "CH16,Channel 16 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 15. "CH15,Channel 15 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 14. "CH14,Channel 14 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 13. "CH13,Channel 13 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 12. "CH12,Channel 12 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 11. "CH11,Channel 11 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 10. "CH10,Channel 10 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 9. "CH9,Channel 9 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 8. "CH8,Channel 8 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 7. "CH7,Channel 7 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 6. "CH6,Channel 6 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 5. "CH5,Channel 5 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 4. "CH4,Channel 4 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 3. "CH3,Channel 3 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 2. "CH2,Channel 2 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 1. "CH1,Channel 1 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 0. "CH0,Channel 0 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x800)++0x3 line.long 0x0 "CHG[$1],Description collection: Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled" bitfld.long 0x0 23. "CH23,Include or exclude channel 23" "0: Exclude,1: Include" bitfld.long 0x0 22. "CH22,Include or exclude channel 22" "0: Exclude,1: Include" bitfld.long 0x0 21. "CH21,Include or exclude channel 21" "0: Exclude,1: Include" bitfld.long 0x0 20. "CH20,Include or exclude channel 20" "0: Exclude,1: Include" newline bitfld.long 0x0 19. "CH19,Include or exclude channel 19" "0: Exclude,1: Include" bitfld.long 0x0 18. "CH18,Include or exclude channel 18" "0: Exclude,1: Include" bitfld.long 0x0 17. "CH17,Include or exclude channel 17" "0: Exclude,1: Include" bitfld.long 0x0 16. "CH16,Include or exclude channel 16" "0: Exclude,1: Include" newline bitfld.long 0x0 15. "CH15,Include or exclude channel 15" "0: Exclude,1: Include" bitfld.long 0x0 14. "CH14,Include or exclude channel 14" "0: Exclude,1: Include" bitfld.long 0x0 13. "CH13,Include or exclude channel 13" "0: Exclude,1: Include" bitfld.long 0x0 12. "CH12,Include or exclude channel 12" "0: Exclude,1: Include" newline bitfld.long 0x0 11. "CH11,Include or exclude channel 11" "0: Exclude,1: Include" bitfld.long 0x0 10. "CH10,Include or exclude channel 10" "0: Exclude,1: Include" bitfld.long 0x0 9. "CH9,Include or exclude channel 9" "0: Exclude,1: Include" bitfld.long 0x0 8. "CH8,Include or exclude channel 8" "0: Exclude,1: Include" newline bitfld.long 0x0 7. "CH7,Include or exclude channel 7" "0: Exclude,1: Include" bitfld.long 0x0 6. "CH6,Include or exclude channel 6" "0: Exclude,1: Include" bitfld.long 0x0 5. "CH5,Include or exclude channel 5" "0: Exclude,1: Include" bitfld.long 0x0 4. "CH4,Include or exclude channel 4" "0: Exclude,1: Include" newline bitfld.long 0x0 3. "CH3,Include or exclude channel 3" "0: Exclude,1: Include" bitfld.long 0x0 2. "CH2,Include or exclude channel 2" "0: Exclude,1: Include" bitfld.long 0x0 1. "CH1,Include or exclude channel 1" "0: Exclude,1: Include" bitfld.long 0x0 0. "CH0,Include or exclude channel 0" "0: Exclude,1: Include" repeat.end tree.end tree "GLOBAL_DPPIC10_S" base ad:0x50082000 repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x50082000 ad:0x50082008 ad:0x50082010 ad:0x50082018 ad:0x50082020 ad:0x50082028) tree "TASKS_CHG[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Enable channel group n" bitfld.long 0x0 0. "EN,Enable channel group n" "?,1: Trigger task" line.long 0x4 "DIS,Description cluster: Disable channel group n" bitfld.long 0x4 0. "DIS,Disable channel group n" "?,1: Trigger task" tree.end repeat.end repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x50082080 ad:0x50082088 ad:0x50082090 ad:0x50082098 ad:0x500820A0 ad:0x500820A8) tree "SUBSCRIBE_CHG[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Subscribe configuration for task CHG[n].EN" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].EN will subscribe to" line.long 0x4 "DIS,Description cluster: Subscribe configuration for task CHG[n].DIS" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].DIS will subscribe to" tree.end repeat.end base ad:0x50082000 newline group.long 0x500++0xB line.long 0x0 "CHEN,Channel enable register" bitfld.long 0x0 23. "CH23,Enable or disable channel 23" "0: Disable channel,1: Enable channel" bitfld.long 0x0 22. "CH22,Enable or disable channel 22" "0: Disable channel,1: Enable channel" bitfld.long 0x0 21. "CH21,Enable or disable channel 21" "0: Disable channel,1: Enable channel" bitfld.long 0x0 20. "CH20,Enable or disable channel 20" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 19. "CH19,Enable or disable channel 19" "0: Disable channel,1: Enable channel" bitfld.long 0x0 18. "CH18,Enable or disable channel 18" "0: Disable channel,1: Enable channel" bitfld.long 0x0 17. "CH17,Enable or disable channel 17" "0: Disable channel,1: Enable channel" bitfld.long 0x0 16. "CH16,Enable or disable channel 16" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 15. "CH15,Enable or disable channel 15" "0: Disable channel,1: Enable channel" bitfld.long 0x0 14. "CH14,Enable or disable channel 14" "0: Disable channel,1: Enable channel" bitfld.long 0x0 13. "CH13,Enable or disable channel 13" "0: Disable channel,1: Enable channel" bitfld.long 0x0 12. "CH12,Enable or disable channel 12" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 11. "CH11,Enable or disable channel 11" "0: Disable channel,1: Enable channel" bitfld.long 0x0 10. "CH10,Enable or disable channel 10" "0: Disable channel,1: Enable channel" bitfld.long 0x0 9. "CH9,Enable or disable channel 9" "0: Disable channel,1: Enable channel" bitfld.long 0x0 8. "CH8,Enable or disable channel 8" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 7. "CH7,Enable or disable channel 7" "0: Disable channel,1: Enable channel" bitfld.long 0x0 6. "CH6,Enable or disable channel 6" "0: Disable channel,1: Enable channel" bitfld.long 0x0 5. "CH5,Enable or disable channel 5" "0: Disable channel,1: Enable channel" bitfld.long 0x0 4. "CH4,Enable or disable channel 4" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 3. "CH3,Enable or disable channel 3" "0: Disable channel,1: Enable channel" bitfld.long 0x0 2. "CH2,Enable or disable channel 2" "0: Disable channel,1: Enable channel" bitfld.long 0x0 1. "CH1,Enable or disable channel 1" "0: Disable channel,1: Enable channel" bitfld.long 0x0 0. "CH0,Enable or disable channel 0" "0: Disable channel,1: Enable channel" line.long 0x4 "CHENSET,Channel enable set register" bitfld.long 0x4 23. "CH23,Channel 23 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 22. "CH22,Channel 22 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 21. "CH21,Channel 21 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 20. "CH20,Channel 20 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 19. "CH19,Channel 19 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 18. "CH18,Channel 18 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 17. "CH17,Channel 17 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 16. "CH16,Channel 16 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 15. "CH15,Channel 15 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 14. "CH14,Channel 14 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 13. "CH13,Channel 13 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 12. "CH12,Channel 12 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 11. "CH11,Channel 11 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 10. "CH10,Channel 10 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 9. "CH9,Channel 9 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 8. "CH8,Channel 8 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 7. "CH7,Channel 7 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 6. "CH6,Channel 6 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 5. "CH5,Channel 5 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 4. "CH4,Channel 4 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 3. "CH3,Channel 3 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 2. "CH2,Channel 2 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 1. "CH1,Channel 1 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 0. "CH0,Channel 0 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" line.long 0x8 "CHENCLR,Channel enable clear register" bitfld.long 0x8 23. "CH23,Channel 23 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 22. "CH22,Channel 22 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 21. "CH21,Channel 21 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 20. "CH20,Channel 20 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 19. "CH19,Channel 19 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 18. "CH18,Channel 18 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 17. "CH17,Channel 17 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 16. "CH16,Channel 16 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 15. "CH15,Channel 15 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 14. "CH14,Channel 14 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 13. "CH13,Channel 13 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 12. "CH12,Channel 12 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 11. "CH11,Channel 11 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 10. "CH10,Channel 10 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 9. "CH9,Channel 9 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 8. "CH8,Channel 8 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 7. "CH7,Channel 7 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 6. "CH6,Channel 6 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 5. "CH5,Channel 5 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 4. "CH4,Channel 4 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 3. "CH3,Channel 3 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 2. "CH2,Channel 2 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 1. "CH1,Channel 1 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 0. "CH0,Channel 0 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x800)++0x3 line.long 0x0 "CHG[$1],Description collection: Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled" bitfld.long 0x0 23. "CH23,Include or exclude channel 23" "0: Exclude,1: Include" bitfld.long 0x0 22. "CH22,Include or exclude channel 22" "0: Exclude,1: Include" bitfld.long 0x0 21. "CH21,Include or exclude channel 21" "0: Exclude,1: Include" bitfld.long 0x0 20. "CH20,Include or exclude channel 20" "0: Exclude,1: Include" newline bitfld.long 0x0 19. "CH19,Include or exclude channel 19" "0: Exclude,1: Include" bitfld.long 0x0 18. "CH18,Include or exclude channel 18" "0: Exclude,1: Include" bitfld.long 0x0 17. "CH17,Include or exclude channel 17" "0: Exclude,1: Include" bitfld.long 0x0 16. "CH16,Include or exclude channel 16" "0: Exclude,1: Include" newline bitfld.long 0x0 15. "CH15,Include or exclude channel 15" "0: Exclude,1: Include" bitfld.long 0x0 14. "CH14,Include or exclude channel 14" "0: Exclude,1: Include" bitfld.long 0x0 13. "CH13,Include or exclude channel 13" "0: Exclude,1: Include" bitfld.long 0x0 12. "CH12,Include or exclude channel 12" "0: Exclude,1: Include" newline bitfld.long 0x0 11. "CH11,Include or exclude channel 11" "0: Exclude,1: Include" bitfld.long 0x0 10. "CH10,Include or exclude channel 10" "0: Exclude,1: Include" bitfld.long 0x0 9. "CH9,Include or exclude channel 9" "0: Exclude,1: Include" bitfld.long 0x0 8. "CH8,Include or exclude channel 8" "0: Exclude,1: Include" newline bitfld.long 0x0 7. "CH7,Include or exclude channel 7" "0: Exclude,1: Include" bitfld.long 0x0 6. "CH6,Include or exclude channel 6" "0: Exclude,1: Include" bitfld.long 0x0 5. "CH5,Include or exclude channel 5" "0: Exclude,1: Include" bitfld.long 0x0 4. "CH4,Include or exclude channel 4" "0: Exclude,1: Include" newline bitfld.long 0x0 3. "CH3,Include or exclude channel 3" "0: Exclude,1: Include" bitfld.long 0x0 2. "CH2,Include or exclude channel 2" "0: Exclude,1: Include" bitfld.long 0x0 1. "CH1,Include or exclude channel 1" "0: Exclude,1: Include" bitfld.long 0x0 0. "CH0,Include or exclude channel 0" "0: Exclude,1: Include" repeat.end tree.end tree "GLOBAL_DPPIC20_NS" base ad:0x400C2000 repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x400C2000 ad:0x400C2008 ad:0x400C2010 ad:0x400C2018 ad:0x400C2020 ad:0x400C2028) tree "TASKS_CHG[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Enable channel group n" bitfld.long 0x0 0. "EN,Enable channel group n" "?,1: Trigger task" line.long 0x4 "DIS,Description cluster: Disable channel group n" bitfld.long 0x4 0. "DIS,Disable channel group n" "?,1: Trigger task" tree.end repeat.end repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x400C2080 ad:0x400C2088 ad:0x400C2090 ad:0x400C2098 ad:0x400C20A0 ad:0x400C20A8) tree "SUBSCRIBE_CHG[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Subscribe configuration for task CHG[n].EN" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].EN will subscribe to" line.long 0x4 "DIS,Description cluster: Subscribe configuration for task CHG[n].DIS" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].DIS will subscribe to" tree.end repeat.end base ad:0x400C2000 newline group.long 0x500++0xB line.long 0x0 "CHEN,Channel enable register" bitfld.long 0x0 23. "CH23,Enable or disable channel 23" "0: Disable channel,1: Enable channel" bitfld.long 0x0 22. "CH22,Enable or disable channel 22" "0: Disable channel,1: Enable channel" bitfld.long 0x0 21. "CH21,Enable or disable channel 21" "0: Disable channel,1: Enable channel" bitfld.long 0x0 20. "CH20,Enable or disable channel 20" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 19. "CH19,Enable or disable channel 19" "0: Disable channel,1: Enable channel" bitfld.long 0x0 18. "CH18,Enable or disable channel 18" "0: Disable channel,1: Enable channel" bitfld.long 0x0 17. "CH17,Enable or disable channel 17" "0: Disable channel,1: Enable channel" bitfld.long 0x0 16. "CH16,Enable or disable channel 16" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 15. "CH15,Enable or disable channel 15" "0: Disable channel,1: Enable channel" bitfld.long 0x0 14. "CH14,Enable or disable channel 14" "0: Disable channel,1: Enable channel" bitfld.long 0x0 13. "CH13,Enable or disable channel 13" "0: Disable channel,1: Enable channel" bitfld.long 0x0 12. "CH12,Enable or disable channel 12" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 11. "CH11,Enable or disable channel 11" "0: Disable channel,1: Enable channel" bitfld.long 0x0 10. "CH10,Enable or disable channel 10" "0: Disable channel,1: Enable channel" bitfld.long 0x0 9. "CH9,Enable or disable channel 9" "0: Disable channel,1: Enable channel" bitfld.long 0x0 8. "CH8,Enable or disable channel 8" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 7. "CH7,Enable or disable channel 7" "0: Disable channel,1: Enable channel" bitfld.long 0x0 6. "CH6,Enable or disable channel 6" "0: Disable channel,1: Enable channel" bitfld.long 0x0 5. "CH5,Enable or disable channel 5" "0: Disable channel,1: Enable channel" bitfld.long 0x0 4. "CH4,Enable or disable channel 4" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 3. "CH3,Enable or disable channel 3" "0: Disable channel,1: Enable channel" bitfld.long 0x0 2. "CH2,Enable or disable channel 2" "0: Disable channel,1: Enable channel" bitfld.long 0x0 1. "CH1,Enable or disable channel 1" "0: Disable channel,1: Enable channel" bitfld.long 0x0 0. "CH0,Enable or disable channel 0" "0: Disable channel,1: Enable channel" line.long 0x4 "CHENSET,Channel enable set register" bitfld.long 0x4 23. "CH23,Channel 23 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 22. "CH22,Channel 22 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 21. "CH21,Channel 21 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 20. "CH20,Channel 20 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 19. "CH19,Channel 19 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 18. "CH18,Channel 18 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 17. "CH17,Channel 17 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 16. "CH16,Channel 16 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 15. "CH15,Channel 15 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 14. "CH14,Channel 14 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 13. "CH13,Channel 13 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 12. "CH12,Channel 12 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 11. "CH11,Channel 11 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 10. "CH10,Channel 10 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 9. "CH9,Channel 9 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 8. "CH8,Channel 8 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 7. "CH7,Channel 7 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 6. "CH6,Channel 6 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 5. "CH5,Channel 5 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 4. "CH4,Channel 4 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 3. "CH3,Channel 3 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 2. "CH2,Channel 2 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 1. "CH1,Channel 1 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 0. "CH0,Channel 0 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" line.long 0x8 "CHENCLR,Channel enable clear register" bitfld.long 0x8 23. "CH23,Channel 23 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 22. "CH22,Channel 22 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 21. "CH21,Channel 21 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 20. "CH20,Channel 20 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 19. "CH19,Channel 19 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 18. "CH18,Channel 18 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 17. "CH17,Channel 17 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 16. "CH16,Channel 16 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 15. "CH15,Channel 15 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 14. "CH14,Channel 14 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 13. "CH13,Channel 13 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 12. "CH12,Channel 12 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 11. "CH11,Channel 11 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 10. "CH10,Channel 10 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 9. "CH9,Channel 9 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 8. "CH8,Channel 8 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 7. "CH7,Channel 7 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 6. "CH6,Channel 6 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 5. "CH5,Channel 5 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 4. "CH4,Channel 4 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 3. "CH3,Channel 3 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 2. "CH2,Channel 2 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 1. "CH1,Channel 1 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 0. "CH0,Channel 0 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x800)++0x3 line.long 0x0 "CHG[$1],Description collection: Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled" bitfld.long 0x0 23. "CH23,Include or exclude channel 23" "0: Exclude,1: Include" bitfld.long 0x0 22. "CH22,Include or exclude channel 22" "0: Exclude,1: Include" bitfld.long 0x0 21. "CH21,Include or exclude channel 21" "0: Exclude,1: Include" bitfld.long 0x0 20. "CH20,Include or exclude channel 20" "0: Exclude,1: Include" newline bitfld.long 0x0 19. "CH19,Include or exclude channel 19" "0: Exclude,1: Include" bitfld.long 0x0 18. "CH18,Include or exclude channel 18" "0: Exclude,1: Include" bitfld.long 0x0 17. "CH17,Include or exclude channel 17" "0: Exclude,1: Include" bitfld.long 0x0 16. "CH16,Include or exclude channel 16" "0: Exclude,1: Include" newline bitfld.long 0x0 15. "CH15,Include or exclude channel 15" "0: Exclude,1: Include" bitfld.long 0x0 14. "CH14,Include or exclude channel 14" "0: Exclude,1: Include" bitfld.long 0x0 13. "CH13,Include or exclude channel 13" "0: Exclude,1: Include" bitfld.long 0x0 12. "CH12,Include or exclude channel 12" "0: Exclude,1: Include" newline bitfld.long 0x0 11. "CH11,Include or exclude channel 11" "0: Exclude,1: Include" bitfld.long 0x0 10. "CH10,Include or exclude channel 10" "0: Exclude,1: Include" bitfld.long 0x0 9. "CH9,Include or exclude channel 9" "0: Exclude,1: Include" bitfld.long 0x0 8. "CH8,Include or exclude channel 8" "0: Exclude,1: Include" newline bitfld.long 0x0 7. "CH7,Include or exclude channel 7" "0: Exclude,1: Include" bitfld.long 0x0 6. "CH6,Include or exclude channel 6" "0: Exclude,1: Include" bitfld.long 0x0 5. "CH5,Include or exclude channel 5" "0: Exclude,1: Include" bitfld.long 0x0 4. "CH4,Include or exclude channel 4" "0: Exclude,1: Include" newline bitfld.long 0x0 3. "CH3,Include or exclude channel 3" "0: Exclude,1: Include" bitfld.long 0x0 2. "CH2,Include or exclude channel 2" "0: Exclude,1: Include" bitfld.long 0x0 1. "CH1,Include or exclude channel 1" "0: Exclude,1: Include" bitfld.long 0x0 0. "CH0,Include or exclude channel 0" "0: Exclude,1: Include" repeat.end tree.end tree "GLOBAL_DPPIC20_S" base ad:0x500C2000 repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x500C2000 ad:0x500C2008 ad:0x500C2010 ad:0x500C2018 ad:0x500C2020 ad:0x500C2028) tree "TASKS_CHG[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Enable channel group n" bitfld.long 0x0 0. "EN,Enable channel group n" "?,1: Trigger task" line.long 0x4 "DIS,Description cluster: Disable channel group n" bitfld.long 0x4 0. "DIS,Disable channel group n" "?,1: Trigger task" tree.end repeat.end repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x500C2080 ad:0x500C2088 ad:0x500C2090 ad:0x500C2098 ad:0x500C20A0 ad:0x500C20A8) tree "SUBSCRIBE_CHG[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Subscribe configuration for task CHG[n].EN" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].EN will subscribe to" line.long 0x4 "DIS,Description cluster: Subscribe configuration for task CHG[n].DIS" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].DIS will subscribe to" tree.end repeat.end base ad:0x500C2000 newline group.long 0x500++0xB line.long 0x0 "CHEN,Channel enable register" bitfld.long 0x0 23. "CH23,Enable or disable channel 23" "0: Disable channel,1: Enable channel" bitfld.long 0x0 22. "CH22,Enable or disable channel 22" "0: Disable channel,1: Enable channel" bitfld.long 0x0 21. "CH21,Enable or disable channel 21" "0: Disable channel,1: Enable channel" bitfld.long 0x0 20. "CH20,Enable or disable channel 20" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 19. "CH19,Enable or disable channel 19" "0: Disable channel,1: Enable channel" bitfld.long 0x0 18. "CH18,Enable or disable channel 18" "0: Disable channel,1: Enable channel" bitfld.long 0x0 17. "CH17,Enable or disable channel 17" "0: Disable channel,1: Enable channel" bitfld.long 0x0 16. "CH16,Enable or disable channel 16" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 15. "CH15,Enable or disable channel 15" "0: Disable channel,1: Enable channel" bitfld.long 0x0 14. "CH14,Enable or disable channel 14" "0: Disable channel,1: Enable channel" bitfld.long 0x0 13. "CH13,Enable or disable channel 13" "0: Disable channel,1: Enable channel" bitfld.long 0x0 12. "CH12,Enable or disable channel 12" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 11. "CH11,Enable or disable channel 11" "0: Disable channel,1: Enable channel" bitfld.long 0x0 10. "CH10,Enable or disable channel 10" "0: Disable channel,1: Enable channel" bitfld.long 0x0 9. "CH9,Enable or disable channel 9" "0: Disable channel,1: Enable channel" bitfld.long 0x0 8. "CH8,Enable or disable channel 8" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 7. "CH7,Enable or disable channel 7" "0: Disable channel,1: Enable channel" bitfld.long 0x0 6. "CH6,Enable or disable channel 6" "0: Disable channel,1: Enable channel" bitfld.long 0x0 5. "CH5,Enable or disable channel 5" "0: Disable channel,1: Enable channel" bitfld.long 0x0 4. "CH4,Enable or disable channel 4" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 3. "CH3,Enable or disable channel 3" "0: Disable channel,1: Enable channel" bitfld.long 0x0 2. "CH2,Enable or disable channel 2" "0: Disable channel,1: Enable channel" bitfld.long 0x0 1. "CH1,Enable or disable channel 1" "0: Disable channel,1: Enable channel" bitfld.long 0x0 0. "CH0,Enable or disable channel 0" "0: Disable channel,1: Enable channel" line.long 0x4 "CHENSET,Channel enable set register" bitfld.long 0x4 23. "CH23,Channel 23 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 22. "CH22,Channel 22 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 21. "CH21,Channel 21 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 20. "CH20,Channel 20 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 19. "CH19,Channel 19 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 18. "CH18,Channel 18 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 17. "CH17,Channel 17 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 16. "CH16,Channel 16 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 15. "CH15,Channel 15 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 14. "CH14,Channel 14 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 13. "CH13,Channel 13 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 12. "CH12,Channel 12 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 11. "CH11,Channel 11 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 10. "CH10,Channel 10 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 9. "CH9,Channel 9 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 8. "CH8,Channel 8 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 7. "CH7,Channel 7 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 6. "CH6,Channel 6 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 5. "CH5,Channel 5 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 4. "CH4,Channel 4 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 3. "CH3,Channel 3 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 2. "CH2,Channel 2 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 1. "CH1,Channel 1 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 0. "CH0,Channel 0 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" line.long 0x8 "CHENCLR,Channel enable clear register" bitfld.long 0x8 23. "CH23,Channel 23 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 22. "CH22,Channel 22 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 21. "CH21,Channel 21 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 20. "CH20,Channel 20 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 19. "CH19,Channel 19 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 18. "CH18,Channel 18 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 17. "CH17,Channel 17 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 16. "CH16,Channel 16 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 15. "CH15,Channel 15 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 14. "CH14,Channel 14 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 13. "CH13,Channel 13 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 12. "CH12,Channel 12 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 11. "CH11,Channel 11 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 10. "CH10,Channel 10 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 9. "CH9,Channel 9 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 8. "CH8,Channel 8 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 7. "CH7,Channel 7 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 6. "CH6,Channel 6 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 5. "CH5,Channel 5 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 4. "CH4,Channel 4 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 3. "CH3,Channel 3 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 2. "CH2,Channel 2 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 1. "CH1,Channel 1 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 0. "CH0,Channel 0 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x800)++0x3 line.long 0x0 "CHG[$1],Description collection: Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled" bitfld.long 0x0 23. "CH23,Include or exclude channel 23" "0: Exclude,1: Include" bitfld.long 0x0 22. "CH22,Include or exclude channel 22" "0: Exclude,1: Include" bitfld.long 0x0 21. "CH21,Include or exclude channel 21" "0: Exclude,1: Include" bitfld.long 0x0 20. "CH20,Include or exclude channel 20" "0: Exclude,1: Include" newline bitfld.long 0x0 19. "CH19,Include or exclude channel 19" "0: Exclude,1: Include" bitfld.long 0x0 18. "CH18,Include or exclude channel 18" "0: Exclude,1: Include" bitfld.long 0x0 17. "CH17,Include or exclude channel 17" "0: Exclude,1: Include" bitfld.long 0x0 16. "CH16,Include or exclude channel 16" "0: Exclude,1: Include" newline bitfld.long 0x0 15. "CH15,Include or exclude channel 15" "0: Exclude,1: Include" bitfld.long 0x0 14. "CH14,Include or exclude channel 14" "0: Exclude,1: Include" bitfld.long 0x0 13. "CH13,Include or exclude channel 13" "0: Exclude,1: Include" bitfld.long 0x0 12. "CH12,Include or exclude channel 12" "0: Exclude,1: Include" newline bitfld.long 0x0 11. "CH11,Include or exclude channel 11" "0: Exclude,1: Include" bitfld.long 0x0 10. "CH10,Include or exclude channel 10" "0: Exclude,1: Include" bitfld.long 0x0 9. "CH9,Include or exclude channel 9" "0: Exclude,1: Include" bitfld.long 0x0 8. "CH8,Include or exclude channel 8" "0: Exclude,1: Include" newline bitfld.long 0x0 7. "CH7,Include or exclude channel 7" "0: Exclude,1: Include" bitfld.long 0x0 6. "CH6,Include or exclude channel 6" "0: Exclude,1: Include" bitfld.long 0x0 5. "CH5,Include or exclude channel 5" "0: Exclude,1: Include" bitfld.long 0x0 4. "CH4,Include or exclude channel 4" "0: Exclude,1: Include" newline bitfld.long 0x0 3. "CH3,Include or exclude channel 3" "0: Exclude,1: Include" bitfld.long 0x0 2. "CH2,Include or exclude channel 2" "0: Exclude,1: Include" bitfld.long 0x0 1. "CH1,Include or exclude channel 1" "0: Exclude,1: Include" bitfld.long 0x0 0. "CH0,Include or exclude channel 0" "0: Exclude,1: Include" repeat.end tree.end tree "GLOBAL_DPPIC30_NS" base ad:0x40102000 repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x40102000 ad:0x40102008 ad:0x40102010 ad:0x40102018 ad:0x40102020 ad:0x40102028) tree "TASKS_CHG[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Enable channel group n" bitfld.long 0x0 0. "EN,Enable channel group n" "?,1: Trigger task" line.long 0x4 "DIS,Description cluster: Disable channel group n" bitfld.long 0x4 0. "DIS,Disable channel group n" "?,1: Trigger task" tree.end repeat.end repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x40102080 ad:0x40102088 ad:0x40102090 ad:0x40102098 ad:0x401020A0 ad:0x401020A8) tree "SUBSCRIBE_CHG[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Subscribe configuration for task CHG[n].EN" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].EN will subscribe to" line.long 0x4 "DIS,Description cluster: Subscribe configuration for task CHG[n].DIS" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].DIS will subscribe to" tree.end repeat.end base ad:0x40102000 newline group.long 0x500++0xB line.long 0x0 "CHEN,Channel enable register" bitfld.long 0x0 23. "CH23,Enable or disable channel 23" "0: Disable channel,1: Enable channel" bitfld.long 0x0 22. "CH22,Enable or disable channel 22" "0: Disable channel,1: Enable channel" bitfld.long 0x0 21. "CH21,Enable or disable channel 21" "0: Disable channel,1: Enable channel" bitfld.long 0x0 20. "CH20,Enable or disable channel 20" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 19. "CH19,Enable or disable channel 19" "0: Disable channel,1: Enable channel" bitfld.long 0x0 18. "CH18,Enable or disable channel 18" "0: Disable channel,1: Enable channel" bitfld.long 0x0 17. "CH17,Enable or disable channel 17" "0: Disable channel,1: Enable channel" bitfld.long 0x0 16. "CH16,Enable or disable channel 16" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 15. "CH15,Enable or disable channel 15" "0: Disable channel,1: Enable channel" bitfld.long 0x0 14. "CH14,Enable or disable channel 14" "0: Disable channel,1: Enable channel" bitfld.long 0x0 13. "CH13,Enable or disable channel 13" "0: Disable channel,1: Enable channel" bitfld.long 0x0 12. "CH12,Enable or disable channel 12" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 11. "CH11,Enable or disable channel 11" "0: Disable channel,1: Enable channel" bitfld.long 0x0 10. "CH10,Enable or disable channel 10" "0: Disable channel,1: Enable channel" bitfld.long 0x0 9. "CH9,Enable or disable channel 9" "0: Disable channel,1: Enable channel" bitfld.long 0x0 8. "CH8,Enable or disable channel 8" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 7. "CH7,Enable or disable channel 7" "0: Disable channel,1: Enable channel" bitfld.long 0x0 6. "CH6,Enable or disable channel 6" "0: Disable channel,1: Enable channel" bitfld.long 0x0 5. "CH5,Enable or disable channel 5" "0: Disable channel,1: Enable channel" bitfld.long 0x0 4. "CH4,Enable or disable channel 4" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 3. "CH3,Enable or disable channel 3" "0: Disable channel,1: Enable channel" bitfld.long 0x0 2. "CH2,Enable or disable channel 2" "0: Disable channel,1: Enable channel" bitfld.long 0x0 1. "CH1,Enable or disable channel 1" "0: Disable channel,1: Enable channel" bitfld.long 0x0 0. "CH0,Enable or disable channel 0" "0: Disable channel,1: Enable channel" line.long 0x4 "CHENSET,Channel enable set register" bitfld.long 0x4 23. "CH23,Channel 23 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 22. "CH22,Channel 22 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 21. "CH21,Channel 21 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 20. "CH20,Channel 20 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 19. "CH19,Channel 19 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 18. "CH18,Channel 18 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 17. "CH17,Channel 17 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 16. "CH16,Channel 16 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 15. "CH15,Channel 15 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 14. "CH14,Channel 14 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 13. "CH13,Channel 13 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 12. "CH12,Channel 12 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 11. "CH11,Channel 11 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 10. "CH10,Channel 10 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 9. "CH9,Channel 9 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 8. "CH8,Channel 8 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 7. "CH7,Channel 7 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 6. "CH6,Channel 6 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 5. "CH5,Channel 5 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 4. "CH4,Channel 4 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 3. "CH3,Channel 3 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 2. "CH2,Channel 2 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 1. "CH1,Channel 1 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 0. "CH0,Channel 0 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" line.long 0x8 "CHENCLR,Channel enable clear register" bitfld.long 0x8 23. "CH23,Channel 23 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 22. "CH22,Channel 22 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 21. "CH21,Channel 21 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 20. "CH20,Channel 20 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 19. "CH19,Channel 19 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 18. "CH18,Channel 18 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 17. "CH17,Channel 17 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 16. "CH16,Channel 16 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 15. "CH15,Channel 15 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 14. "CH14,Channel 14 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 13. "CH13,Channel 13 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 12. "CH12,Channel 12 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 11. "CH11,Channel 11 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 10. "CH10,Channel 10 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 9. "CH9,Channel 9 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 8. "CH8,Channel 8 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 7. "CH7,Channel 7 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 6. "CH6,Channel 6 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 5. "CH5,Channel 5 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 4. "CH4,Channel 4 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 3. "CH3,Channel 3 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 2. "CH2,Channel 2 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 1. "CH1,Channel 1 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 0. "CH0,Channel 0 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x800)++0x3 line.long 0x0 "CHG[$1],Description collection: Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled" bitfld.long 0x0 23. "CH23,Include or exclude channel 23" "0: Exclude,1: Include" bitfld.long 0x0 22. "CH22,Include or exclude channel 22" "0: Exclude,1: Include" bitfld.long 0x0 21. "CH21,Include or exclude channel 21" "0: Exclude,1: Include" bitfld.long 0x0 20. "CH20,Include or exclude channel 20" "0: Exclude,1: Include" newline bitfld.long 0x0 19. "CH19,Include or exclude channel 19" "0: Exclude,1: Include" bitfld.long 0x0 18. "CH18,Include or exclude channel 18" "0: Exclude,1: Include" bitfld.long 0x0 17. "CH17,Include or exclude channel 17" "0: Exclude,1: Include" bitfld.long 0x0 16. "CH16,Include or exclude channel 16" "0: Exclude,1: Include" newline bitfld.long 0x0 15. "CH15,Include or exclude channel 15" "0: Exclude,1: Include" bitfld.long 0x0 14. "CH14,Include or exclude channel 14" "0: Exclude,1: Include" bitfld.long 0x0 13. "CH13,Include or exclude channel 13" "0: Exclude,1: Include" bitfld.long 0x0 12. "CH12,Include or exclude channel 12" "0: Exclude,1: Include" newline bitfld.long 0x0 11. "CH11,Include or exclude channel 11" "0: Exclude,1: Include" bitfld.long 0x0 10. "CH10,Include or exclude channel 10" "0: Exclude,1: Include" bitfld.long 0x0 9. "CH9,Include or exclude channel 9" "0: Exclude,1: Include" bitfld.long 0x0 8. "CH8,Include or exclude channel 8" "0: Exclude,1: Include" newline bitfld.long 0x0 7. "CH7,Include or exclude channel 7" "0: Exclude,1: Include" bitfld.long 0x0 6. "CH6,Include or exclude channel 6" "0: Exclude,1: Include" bitfld.long 0x0 5. "CH5,Include or exclude channel 5" "0: Exclude,1: Include" bitfld.long 0x0 4. "CH4,Include or exclude channel 4" "0: Exclude,1: Include" newline bitfld.long 0x0 3. "CH3,Include or exclude channel 3" "0: Exclude,1: Include" bitfld.long 0x0 2. "CH2,Include or exclude channel 2" "0: Exclude,1: Include" bitfld.long 0x0 1. "CH1,Include or exclude channel 1" "0: Exclude,1: Include" bitfld.long 0x0 0. "CH0,Include or exclude channel 0" "0: Exclude,1: Include" repeat.end tree.end tree "GLOBAL_DPPIC30_S" base ad:0x50102000 repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x50102000 ad:0x50102008 ad:0x50102010 ad:0x50102018 ad:0x50102020 ad:0x50102028) tree "TASKS_CHG[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Enable channel group n" bitfld.long 0x0 0. "EN,Enable channel group n" "?,1: Trigger task" line.long 0x4 "DIS,Description cluster: Disable channel group n" bitfld.long 0x4 0. "DIS,Disable channel group n" "?,1: Trigger task" tree.end repeat.end repeat 6. (list 0x0 0x1 0x2 0x3 0x4 0x5)(list ad:0x50102080 ad:0x50102088 ad:0x50102090 ad:0x50102098 ad:0x501020A0 ad:0x501020A8) tree "SUBSCRIBE_CHG[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "EN,Description cluster: Subscribe configuration for task CHG[n].EN" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].EN will subscribe to" line.long 0x4 "DIS,Description cluster: Subscribe configuration for task CHG[n].DIS" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task CHG[n].DIS will subscribe to" tree.end repeat.end base ad:0x50102000 newline group.long 0x500++0xB line.long 0x0 "CHEN,Channel enable register" bitfld.long 0x0 23. "CH23,Enable or disable channel 23" "0: Disable channel,1: Enable channel" bitfld.long 0x0 22. "CH22,Enable or disable channel 22" "0: Disable channel,1: Enable channel" bitfld.long 0x0 21. "CH21,Enable or disable channel 21" "0: Disable channel,1: Enable channel" bitfld.long 0x0 20. "CH20,Enable or disable channel 20" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 19. "CH19,Enable or disable channel 19" "0: Disable channel,1: Enable channel" bitfld.long 0x0 18. "CH18,Enable or disable channel 18" "0: Disable channel,1: Enable channel" bitfld.long 0x0 17. "CH17,Enable or disable channel 17" "0: Disable channel,1: Enable channel" bitfld.long 0x0 16. "CH16,Enable or disable channel 16" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 15. "CH15,Enable or disable channel 15" "0: Disable channel,1: Enable channel" bitfld.long 0x0 14. "CH14,Enable or disable channel 14" "0: Disable channel,1: Enable channel" bitfld.long 0x0 13. "CH13,Enable or disable channel 13" "0: Disable channel,1: Enable channel" bitfld.long 0x0 12. "CH12,Enable or disable channel 12" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 11. "CH11,Enable or disable channel 11" "0: Disable channel,1: Enable channel" bitfld.long 0x0 10. "CH10,Enable or disable channel 10" "0: Disable channel,1: Enable channel" bitfld.long 0x0 9. "CH9,Enable or disable channel 9" "0: Disable channel,1: Enable channel" bitfld.long 0x0 8. "CH8,Enable or disable channel 8" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 7. "CH7,Enable or disable channel 7" "0: Disable channel,1: Enable channel" bitfld.long 0x0 6. "CH6,Enable or disable channel 6" "0: Disable channel,1: Enable channel" bitfld.long 0x0 5. "CH5,Enable or disable channel 5" "0: Disable channel,1: Enable channel" bitfld.long 0x0 4. "CH4,Enable or disable channel 4" "0: Disable channel,1: Enable channel" newline bitfld.long 0x0 3. "CH3,Enable or disable channel 3" "0: Disable channel,1: Enable channel" bitfld.long 0x0 2. "CH2,Enable or disable channel 2" "0: Disable channel,1: Enable channel" bitfld.long 0x0 1. "CH1,Enable or disable channel 1" "0: Disable channel,1: Enable channel" bitfld.long 0x0 0. "CH0,Enable or disable channel 0" "0: Disable channel,1: Enable channel" line.long 0x4 "CHENSET,Channel enable set register" bitfld.long 0x4 23. "CH23,Channel 23 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 22. "CH22,Channel 22 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 21. "CH21,Channel 21 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 20. "CH20,Channel 20 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 19. "CH19,Channel 19 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 18. "CH18,Channel 18 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 17. "CH17,Channel 17 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 16. "CH16,Channel 16 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 15. "CH15,Channel 15 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 14. "CH14,Channel 14 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 13. "CH13,Channel 13 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 12. "CH12,Channel 12 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 11. "CH11,Channel 11 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 10. "CH10,Channel 10 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 9. "CH9,Channel 9 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 8. "CH8,Channel 8 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 7. "CH7,Channel 7 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 6. "CH6,Channel 6 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 5. "CH5,Channel 5 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 4. "CH4,Channel 4 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" newline bitfld.long 0x4 3. "CH3,Channel 3 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 2. "CH2,Channel 2 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 1. "CH1,Channel 1 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" bitfld.long 0x4 0. "CH0,Channel 0 enable set register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Enable channel" line.long 0x8 "CHENCLR,Channel enable clear register" bitfld.long 0x8 23. "CH23,Channel 23 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 22. "CH22,Channel 22 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 21. "CH21,Channel 21 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 20. "CH20,Channel 20 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 19. "CH19,Channel 19 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 18. "CH18,Channel 18 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 17. "CH17,Channel 17 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 16. "CH16,Channel 16 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 15. "CH15,Channel 15 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 14. "CH14,Channel 14 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 13. "CH13,Channel 13 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 12. "CH12,Channel 12 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 11. "CH11,Channel 11 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 10. "CH10,Channel 10 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 9. "CH9,Channel 9 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 8. "CH8,Channel 8 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 7. "CH7,Channel 7 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 6. "CH6,Channel 6 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 5. "CH5,Channel 5 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 4. "CH4,Channel 4 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" newline bitfld.long 0x8 3. "CH3,Channel 3 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 2. "CH2,Channel 2 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 1. "CH1,Channel 1 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" bitfld.long 0x8 0. "CH0,Channel 0 enable clear register. Writing 0 has no effect." "0: Read: Channel disabled,1: Write: Disable channel" repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x800)++0x3 line.long 0x0 "CHG[$1],Description collection: Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled" bitfld.long 0x0 23. "CH23,Include or exclude channel 23" "0: Exclude,1: Include" bitfld.long 0x0 22. "CH22,Include or exclude channel 22" "0: Exclude,1: Include" bitfld.long 0x0 21. "CH21,Include or exclude channel 21" "0: Exclude,1: Include" bitfld.long 0x0 20. "CH20,Include or exclude channel 20" "0: Exclude,1: Include" newline bitfld.long 0x0 19. "CH19,Include or exclude channel 19" "0: Exclude,1: Include" bitfld.long 0x0 18. "CH18,Include or exclude channel 18" "0: Exclude,1: Include" bitfld.long 0x0 17. "CH17,Include or exclude channel 17" "0: Exclude,1: Include" bitfld.long 0x0 16. "CH16,Include or exclude channel 16" "0: Exclude,1: Include" newline bitfld.long 0x0 15. "CH15,Include or exclude channel 15" "0: Exclude,1: Include" bitfld.long 0x0 14. "CH14,Include or exclude channel 14" "0: Exclude,1: Include" bitfld.long 0x0 13. "CH13,Include or exclude channel 13" "0: Exclude,1: Include" bitfld.long 0x0 12. "CH12,Include or exclude channel 12" "0: Exclude,1: Include" newline bitfld.long 0x0 11. "CH11,Include or exclude channel 11" "0: Exclude,1: Include" bitfld.long 0x0 10. "CH10,Include or exclude channel 10" "0: Exclude,1: Include" bitfld.long 0x0 9. "CH9,Include or exclude channel 9" "0: Exclude,1: Include" bitfld.long 0x0 8. "CH8,Include or exclude channel 8" "0: Exclude,1: Include" newline bitfld.long 0x0 7. "CH7,Include or exclude channel 7" "0: Exclude,1: Include" bitfld.long 0x0 6. "CH6,Include or exclude channel 6" "0: Exclude,1: Include" bitfld.long 0x0 5. "CH5,Include or exclude channel 5" "0: Exclude,1: Include" bitfld.long 0x0 4. "CH4,Include or exclude channel 4" "0: Exclude,1: Include" newline bitfld.long 0x0 3. "CH3,Include or exclude channel 3" "0: Exclude,1: Include" bitfld.long 0x0 2. "CH2,Include or exclude channel 2" "0: Exclude,1: Include" bitfld.long 0x0 1. "CH1,Include or exclude channel 1" "0: Exclude,1: Include" bitfld.long 0x0 0. "CH0,Include or exclude channel 0" "0: Exclude,1: Include" repeat.end tree.end tree.end tree "ECB (AES ECB Mode Encryption)" base ad:0x0 tree "GLOBAL_ECB00_NS" base ad:0x40047000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start ECB block encrypt" bitfld.long 0x0 0. "TASKS_START,Start ECB block encrypt" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Abort a possible executing ECB operation" bitfld.long 0x4 0. "TASKS_STOP,Abort a possible executing ECB operation" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0x7 line.long 0x0 "EVENTS_END,ECB block encrypt complete" bitfld.long 0x0 0. "EVENTS_END,ECB block encrypt complete" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_ERROR,ECB block encrypt aborted because of a STOP task or due to an error" bitfld.long 0x4 0. "EVENTS_ERROR,ECB block encrypt aborted because of a STOP task or due to an error" "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 1. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 1. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "ERRORSTATUS,Error status" bitfld.long 0x0 0.--2. "ERRORSTATUS,Error status when the ERROR event is generated" "0: No errors have occurred,1: End of INPTR job list before data structure was..,2: End of OUTPTR job list before data structure was..,3: Encryption aborted due to higher priority..,4: Bus error during DMA access.,?,?,?" tree "IN" base ad:0x40047530 group.long 0x0++0x3 line.long 0x0 "PTR,Input pointer" hexmask.long 0x0 0.--31. 1. "PTR,Points to a job list containing unencrypted ECB data structure" tree.end tree "KEY" base ad:0x40047510 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "VALUE[$1],Description collection: 128-bit AES key" hexmask.long 0x0 0.--31. 1. "VALUE,AES 128-bit key value bits (32*(n+1))-1 : (32*n)" repeat.end tree.end tree "OUT" base ad:0x40047538 group.long 0x0++0x3 line.long 0x0 "PTR,Output pointer Points to a job list containing encrypted ECB data structure" hexmask.long 0x0 0.--31. 1. "PTR,Output pointer" tree.end tree.end tree "GLOBAL_ECB00_S" base ad:0x50047000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start ECB block encrypt" bitfld.long 0x0 0. "TASKS_START,Start ECB block encrypt" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Abort a possible executing ECB operation" bitfld.long 0x4 0. "TASKS_STOP,Abort a possible executing ECB operation" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0x7 line.long 0x0 "EVENTS_END,ECB block encrypt complete" bitfld.long 0x0 0. "EVENTS_END,ECB block encrypt complete" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_ERROR,ECB block encrypt aborted because of a STOP task or due to an error" bitfld.long 0x4 0. "EVENTS_ERROR,ECB block encrypt aborted because of a STOP task or due to an error" "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 1. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 1. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "ERRORSTATUS,Error status" bitfld.long 0x0 0.--2. "ERRORSTATUS,Error status when the ERROR event is generated" "0: No errors have occurred,1: End of INPTR job list before data structure was..,2: End of OUTPTR job list before data structure was..,3: Encryption aborted due to higher priority..,4: Bus error during DMA access.,?,?,?" tree "IN" base ad:0x50047000 group.long 0x0++0x3 line.long 0x0 "PTR,Input pointer" hexmask.long 0x0 0.--31. 1. "PTR,Points to a job list containing unencrypted ECB data structure" tree.end tree "KEY" base ad:0x50047000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "VALUE[$1],Description collection: 128-bit AES key" hexmask.long 0x0 0.--31. 1. "VALUE,AES 128-bit key value bits (32*(n+1))-1 : (32*n)" repeat.end tree.end tree "OUT" base ad:0x50047000 group.long 0x0++0x3 line.long 0x0 "PTR,Output pointer Points to a job list containing encrypted ECB data structure" hexmask.long 0x0 0.--31. 1. "PTR,Output pointer" tree.end tree.end tree.end tree "EGU (Event Generator Unit)" base ad:0x0 tree "GLOBAL_EGU10_NS" base ad:0x40087000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event" bitfld.long 0x0 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task" bitfld.long 0x0 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to" repeat.end group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disable,1: Enable" bitfld.long 0x0 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disable,1: Enable" bitfld.long 0x0 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disable,1: Enable" bitfld.long 0x0 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disable,1: Enable" bitfld.long 0x0 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disable,1: Enable" bitfld.long 0x0 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disable,1: Enable" bitfld.long 0x0 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disable,1: Enable" bitfld.long 0x0 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disable,1: Enable" bitfld.long 0x0 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disable,1: Enable" bitfld.long 0x0 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disable,1: Enable" bitfld.long 0x0 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Disable" tree.end tree "GLOBAL_EGU10_S" base ad:0x50087000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event" bitfld.long 0x0 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task" bitfld.long 0x0 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to" repeat.end group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disable,1: Enable" bitfld.long 0x0 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disable,1: Enable" bitfld.long 0x0 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disable,1: Enable" bitfld.long 0x0 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disable,1: Enable" bitfld.long 0x0 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disable,1: Enable" bitfld.long 0x0 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disable,1: Enable" bitfld.long 0x0 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disable,1: Enable" bitfld.long 0x0 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disable,1: Enable" bitfld.long 0x0 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disable,1: Enable" bitfld.long 0x0 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disable,1: Enable" bitfld.long 0x0 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Disable" tree.end tree "GLOBAL_EGU20_NS" base ad:0x400C9000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event" bitfld.long 0x0 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task" bitfld.long 0x0 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to" repeat.end group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disable,1: Enable" bitfld.long 0x0 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disable,1: Enable" bitfld.long 0x0 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disable,1: Enable" bitfld.long 0x0 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disable,1: Enable" bitfld.long 0x0 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disable,1: Enable" bitfld.long 0x0 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disable,1: Enable" bitfld.long 0x0 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disable,1: Enable" bitfld.long 0x0 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disable,1: Enable" bitfld.long 0x0 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disable,1: Enable" bitfld.long 0x0 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disable,1: Enable" bitfld.long 0x0 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Disable" tree.end tree "GLOBAL_EGU20_S" base ad:0x500C9000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_TRIGGER[$1],Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event" bitfld.long 0x0 0. "TASKS_TRIGGER,Trigger n for triggering the corresponding TRIGGERED[n] event" "?,1: Trigger task" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TRIGGER[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task TRIGGER[n] will subscribe to" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_TRIGGERED[$1],Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task" bitfld.long 0x0 0. "EVENTS_TRIGGERED,Event number n generated by triggering the corresponding TRIGGER[n] task" "0: Event not generated,1: Event generated" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event TRIGGERED[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TRIGGERED[n] will publish to" repeat.end group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 15. "TRIGGERED15,Enable or disable interrupt for event TRIGGERED[15]" "0: Disable,1: Enable" bitfld.long 0x0 14. "TRIGGERED14,Enable or disable interrupt for event TRIGGERED[14]" "0: Disable,1: Enable" bitfld.long 0x0 13. "TRIGGERED13,Enable or disable interrupt for event TRIGGERED[13]" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "TRIGGERED12,Enable or disable interrupt for event TRIGGERED[12]" "0: Disable,1: Enable" bitfld.long 0x0 11. "TRIGGERED11,Enable or disable interrupt for event TRIGGERED[11]" "0: Disable,1: Enable" bitfld.long 0x0 10. "TRIGGERED10,Enable or disable interrupt for event TRIGGERED[10]" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "TRIGGERED9,Enable or disable interrupt for event TRIGGERED[9]" "0: Disable,1: Enable" bitfld.long 0x0 8. "TRIGGERED8,Enable or disable interrupt for event TRIGGERED[8]" "0: Disable,1: Enable" bitfld.long 0x0 7. "TRIGGERED7,Enable or disable interrupt for event TRIGGERED[7]" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "TRIGGERED6,Enable or disable interrupt for event TRIGGERED[6]" "0: Disable,1: Enable" bitfld.long 0x0 5. "TRIGGERED5,Enable or disable interrupt for event TRIGGERED[5]" "0: Disable,1: Enable" bitfld.long 0x0 4. "TRIGGERED4,Enable or disable interrupt for event TRIGGERED[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "TRIGGERED3,Enable or disable interrupt for event TRIGGERED[3]" "0: Disable,1: Enable" bitfld.long 0x0 2. "TRIGGERED2,Enable or disable interrupt for event TRIGGERED[2]" "0: Disable,1: Enable" bitfld.long 0x0 1. "TRIGGERED1,Enable or disable interrupt for event TRIGGERED[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "TRIGGERED0,Enable or disable interrupt for event TRIGGERED[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 15. "TRIGGERED15,Write '1' to enable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 14. "TRIGGERED14,Write '1' to enable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "TRIGGERED13,Write '1' to enable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 12. "TRIGGERED12,Write '1' to enable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 11. "TRIGGERED11,Write '1' to enable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 10. "TRIGGERED10,Write '1' to enable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "TRIGGERED9,Write '1' to enable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 8. "TRIGGERED8,Write '1' to enable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 7. "TRIGGERED7,Write '1' to enable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "TRIGGERED6,Write '1' to enable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "TRIGGERED5,Write '1' to enable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 4. "TRIGGERED4,Write '1' to enable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "TRIGGERED3,Write '1' to enable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "TRIGGERED2,Write '1' to enable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "TRIGGERED1,Write '1' to enable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "TRIGGERED0,Write '1' to enable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 15. "TRIGGERED15,Write '1' to disable interrupt for event TRIGGERED[15]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 14. "TRIGGERED14,Write '1' to disable interrupt for event TRIGGERED[14]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "TRIGGERED13,Write '1' to disable interrupt for event TRIGGERED[13]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 12. "TRIGGERED12,Write '1' to disable interrupt for event TRIGGERED[12]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 11. "TRIGGERED11,Write '1' to disable interrupt for event TRIGGERED[11]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 10. "TRIGGERED10,Write '1' to disable interrupt for event TRIGGERED[10]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "TRIGGERED9,Write '1' to disable interrupt for event TRIGGERED[9]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 8. "TRIGGERED8,Write '1' to disable interrupt for event TRIGGERED[8]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 7. "TRIGGERED7,Write '1' to disable interrupt for event TRIGGERED[7]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "TRIGGERED6,Write '1' to disable interrupt for event TRIGGERED[6]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "TRIGGERED5,Write '1' to disable interrupt for event TRIGGERED[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 4. "TRIGGERED4,Write '1' to disable interrupt for event TRIGGERED[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "TRIGGERED3,Write '1' to disable interrupt for event TRIGGERED[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "TRIGGERED2,Write '1' to disable interrupt for event TRIGGERED[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "TRIGGERED1,Write '1' to disable interrupt for event TRIGGERED[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "TRIGGERED0,Write '1' to disable interrupt for event TRIGGERED[0]" "0: Read: Disabled,1: Disable" tree.end tree.end tree "ETM (Embedded Trace Macrocell)" base ad:0x0 tree "ETM_NS" base ad:0xE0041000 group.long 0x4++0xF line.long 0x0 "TRCPRGCTLR,Enables the trace unit." bitfld.long 0x0 0. "EN,Trace unit enable bit" "0: The trace unit is disabled. All trace resources..,1: The trace unit is enabled." line.long 0x4 "TRCPROCSELR,Controls which PE to trace. Might ignore writes when the trace unit is enabled or not idle. Before writing to this register. ensure that TRCSTATR.IDLE == 1 so that the trace unit can synchronize with the chosen PE. Implemented if.." hexmask.long.byte 0x4 0.--4. 1. "PROCSEL,PE select bits that select the PE to trace." line.long 0x8 "TRCSTATR,Idle status bit" bitfld.long 0x8 1. "PMSTABLE,Programmers' model stable bit" "0: The programmers' model is not stable.,1: The programmers' model is stable." newline bitfld.long 0x8 0. "IDLE,Trace unit enable bit" "0: The trace unit is not idle.,1: The trace unit is idle." line.long 0xC "TRCCONFIGR,Controls the tracing options This register must always be programmed as part of trace unit initialization. Might ignore writes when the trace unit is enabled or not idle." bitfld.long 0xC 17. "DV,Data value tracing bit." "0: Data value tracing is disabled.,1: Data value tracing is enabled." newline bitfld.long 0xC 16. "DA,Data address tracing bit." "0: Data address tracing is disabled.,1: Data address tracing is enabled." newline bitfld.long 0xC 15. "VMIDOPT,Control bit to select the Virtual context identifier value used by the trace unit both for trace generation and in the Virtual context identifier comparators." "0: VTTBR_EL2.VMID is used. If the trace unit..,1: CONTEXTIDR_EL2 is used." newline bitfld.long 0xC 13.--14. "QE,Q element enable field." "0: Q elements are disabled.,1: Q elements with instruction counts are enabled.,?,3: Q elements with and without instruction counts.." newline bitfld.long 0xC 12. "RS,Return stack enable bit." "0: Return stack is disabled.,1: Return stack is enabled." newline bitfld.long 0xC 11. "TS,Global timestamp tracing bit." "0: Global timestamp tracing is disabled.,1: Global timestamp tracing is enabled." newline bitfld.long 0xC 8.--10. "COND,Conditional instruction tracing bit." "0: Conditional instruction tracing is disabled.,1: Conditional load instructions are traced.,2: Conditional store instructions are traced.,3: Conditional load and store instructions are..,?,?,?,7: All conditional instructions are traced." newline bitfld.long 0xC 7. "VMID,Virtual context identifier tracing bit." "0: Virtual context identifier tracing is disabled.,1: Virtual context identifier tracing is enabled." newline bitfld.long 0xC 6. "CID,Context ID tracing bit." "0: Context ID tracing is disabled.,1: Context ID tracing is enabled." newline bitfld.long 0xC 4. "CCI,Cycle counting instruction trace bit." "0: Cycle counting in the instruction trace is..,1: Cycle counting in the instruction trace is.." newline bitfld.long 0xC 3. "BB,Branch broadcast mode bit." "0: Branch broadcast mode is disabled.,1: Branch broadcast mode is enabled." newline bitfld.long 0xC 2. "STOREASP0INST,Instruction P0 field. This field controls whether store instructions are traced as P0 instructions." "0: Do not trace store instructions as P0..,1: Trace store instructions as P0 instructions." newline bitfld.long 0xC 1. "LOADASP0INST,Instruction P0 load field. This field controls whether load instructions are traced as P0 instructions." "0: Do not trace load instructions as P0 instructions.,1: Trace load instructions as P0 instructions." group.long 0x20++0x7 line.long 0x0 "TRCEVENTCTL0R,Controls the tracing of arbitrary events. If the selected event occurs a trace element is generated in the trace stream according to the settings in TRCEVENTCTL1R.DATAEN and TRCEVENTCTL1R.INSTEN." hexmask.long.byte 0x0 0.--7. 1. "EVENT,Select which event should generate trace elements." line.long 0x4 "TRCEVENTCTL1R,Controls the behavior of the events that TRCEVENTCTL0R selects. This register must always be programmed as part of trace unit initialization. Might ignore writes when the trace unit is enabled or not idle." bitfld.long 0x4 12. "LPOVERRIDE,Low-power state behavior override bit. Controls how a trace unit behaves in low-power state." "0: Trace unit low-power state behavior is not..,1: Trace unit low-power state behavior is.." newline bitfld.long 0x4 11. "ATB,AMBA Trace Bus (ATB) trigger enable bit." "0: ATB trigger is disabled.,1: ATB trigger is enabled. If a CoreSight ATB.." newline bitfld.long 0x4 4. "DATAEN,Data event enable bit." "0: The trace unit does not generate an Event..,1: The trace unit generates an Event element in the.." newline bitfld.long 0x4 3. "INSTEN_3,Instruction event enable field." "0: The trace unit does not generate an Event element.,1: The trace unit generates an Event element for.." newline bitfld.long 0x4 2. "INSTEN_2,Instruction event enable field." "0: The trace unit does not generate an Event element.,1: The trace unit generates an Event element for.." newline bitfld.long 0x4 1. "INSTEN_1,Instruction event enable field." "0: The trace unit does not generate an Event element.,1: The trace unit generates an Event element for.." newline bitfld.long 0x4 0. "INSTEN_0,Instruction event enable field." "0: The trace unit does not generate an Event element.,1: The trace unit generates an Event element for.." group.long 0x2C++0x1B line.long 0x0 "TRCSTALLCTLR,Enables trace unit functionality that prevents trace unit buffer overflows. Might ignore writes when the trace unit is enabled or not idle. Must be programmed if TRCIDR3.STALLCTL == 1." bitfld.long 0x0 13. "NOOVERFLOW,Trace overflow prevention bit." "0: Trace overflow prevention is disabled.,1: Trace overflow prevention is enabled. This might.." newline bitfld.long 0x0 12. "DATADISCARDSTORE,Data discard field. Controls if a trace unit can discard data trace elements on a store when the data trace buffer space is less than LEVEL." "0: The trace unit must not discard any data trace..,1: The trace unit can discard P1 and P2 elements.." newline bitfld.long 0x0 11. "DATADISCARDLOAD,Data discard field. Controls if a trace unit can discard data trace elements on a load when the data trace buffer space is less than LEVEL." "0: The trace unit must not discard any data trace..,1: The trace unit can discard P1 and P2 elements.." newline bitfld.long 0x0 10. "INSTPRIORITY,Prioritize instruction trace bit. Controls if a trace unit can prioritize instruction trace when the instruction trace buffer space is less than LEVEL." "0: The trace unit must not prioritize instruction..,1: The trace unit can prioritize instruction trace." newline bitfld.long 0x0 9. "DSTALL,Data stall bit. Controls if a trace unit can stall the PE when the data trace buffer space is less than LEVEL." "0: The trace unit must not stall the PE.,1: The trace unit can stall the PE." newline bitfld.long 0x0 8. "ISTALL,Instruction stall bit. Controls if a trace unit can stall the PE when the instruction trace buffer space is less than LEVEL." "0: The trace unit must not stall the PE.,1: The trace unit can stall the PE." newline hexmask.long.byte 0x0 0.--3. 1. "LEVEL,Threshold level field. If LEVEL is nonzero then a trace unit might suppress the generation of: Global timestamps in the instruction trace stream and the data trace stream. Cycle counting in the instruction trace stream although the cumulative.." line.long 0x4 "TRCTSCTLR,Controls the insertion of global timestamps in the trace streams. When the selected event is triggered. the trace unit inserts a global timestamp into the trace streams. Might ignore writes when the trace unit is enabled or not idle. Must be.." hexmask.long.byte 0x4 0.--7. 1. "EVENT,Select which event should generate time stamps." line.long 0x8 "TRCSYNCPR,Controls how often trace synchronization requests occur. Might ignore writes when the trace unit is enabled or not idle. If writes are permitted then the register must be programmed." hexmask.long.byte 0x8 0.--4. 1. "PERIOD,Controls how many bytes of trace the sum of instruction and data that a trace unit can" line.long 0xC "TRCCCCTLR,Sets the threshold value for cycle counting. Might ignore writes when the trace unit is enabled or not idle. Must be programmed if TRCCONFIGR.CCI==1." hexmask.long.word 0xC 0.--11. 1. "THRESHOLD,Sets the threshold value for instruction trace cycle counting." line.long 0x10 "TRCBBCTLR,Controls which regions in the memory map are enabled to use branch broadcasting. Might ignore writes when the trace unit is enabled or not idle. Must be programmed if TRCCONFIGR.BB == 1." bitfld.long 0x10 7. "RANGE_7,Address range field. Selects which address range comparator pairs are in use with branch broadcasting." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x10 6. "RANGE_6,Address range field. Selects which address range comparator pairs are in use with branch broadcasting." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x10 5. "RANGE_5,Address range field. Selects which address range comparator pairs are in use with branch broadcasting." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x10 4. "RANGE_4,Address range field. Selects which address range comparator pairs are in use with branch broadcasting." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x10 3. "RANGE_3,Address range field. Selects which address range comparator pairs are in use with branch broadcasting." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x10 2. "RANGE_2,Address range field. Selects which address range comparator pairs are in use with branch broadcasting." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x10 1. "RANGE_1,Address range field. Selects which address range comparator pairs are in use with branch broadcasting." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x10 0. "RANGE_0,Address range field. Selects which address range comparator pairs are in use with branch broadcasting." "0: The address range that address range comparator..,1: The address range that address range comparator.." line.long 0x14 "TRCTRACEIDR,Sets the trace ID for instruction trace. If data trace is enabled then it also sets the trace ID for data trace. to (trace ID for instruction trace) + 1. This register must always be programmed as part of trace unit initialization. Might.." hexmask.long.byte 0x14 0.--6. 1. "TRACEID,Trace ID field. Sets the trace ID value for instruction trace. Bit[0] must be zero if data trace is enabled. If data trace is enabled then a trace unit sets the trace ID for data trace to TRACEID+1." line.long 0x18 "TRCQCTLR,Controls when Q elements are enabled. Might ignore writes when the trace unit is enabled or not idle. This register must be programmed if it is implemented and TRCCONFIGR.QE is set to any value other than 0b00." bitfld.long 0x18 8. "MODE,Selects whether the address range comparators selected by the RANGE field indicate" "0: Exclude mode. The address range comparators..,1: Include mode. The address range comparators.." newline bitfld.long 0x18 7. "RANGE_7,Specifies the address range comparators to be used for controlling Q elements." "0: Address range comparator 7 is disabled.,1: Address range comparator 7 is selected for use." newline bitfld.long 0x18 6. "RANGE_6,Specifies the address range comparators to be used for controlling Q elements." "0: Address range comparator 6 is disabled.,1: Address range comparator 6 is selected for use." newline bitfld.long 0x18 5. "RANGE_5,Specifies the address range comparators to be used for controlling Q elements." "0: Address range comparator 5 is disabled.,1: Address range comparator 5 is selected for use." newline bitfld.long 0x18 4. "RANGE_4,Specifies the address range comparators to be used for controlling Q elements." "0: Address range comparator 4 is disabled.,1: Address range comparator 4 is selected for use." newline bitfld.long 0x18 3. "RANGE_3,Specifies the address range comparators to be used for controlling Q elements." "0: Address range comparator 3 is disabled.,1: Address range comparator 3 is selected for use." newline bitfld.long 0x18 2. "RANGE_2,Specifies the address range comparators to be used for controlling Q elements." "0: Address range comparator 2 is disabled.,1: Address range comparator 2 is selected for use." newline bitfld.long 0x18 1. "RANGE_1,Specifies the address range comparators to be used for controlling Q elements." "0: Address range comparator 1 is disabled.,1: Address range comparator 1 is selected for use." newline bitfld.long 0x18 0. "RANGE_0,Specifies the address range comparators to be used for controlling Q elements." "0: Address range comparator 0 is disabled.,1: Address range comparator 0 is selected for use." group.long 0x80++0xF line.long 0x0 "TRCVICTLR,Controls instruction trace filtering. Might ignore writes when the trace unit is enabled or not idle. Only returns stable data when TRCSTATR.PMSTABLE == 1. Must be programmed. particularly to set the value of the SSSTATUS bit. which sets the.." bitfld.long 0x0 23. "EXLEVEL3_NS,In Non-secure state each bit controls whether instruction tracing is enabled for the corresponding Exception level 3." "0: The trace unit generates instruction trace in..,1: The trace unit does not generate instruction.." newline bitfld.long 0x0 22. "EXLEVEL2_NS,In Non-secure state each bit controls whether instruction tracing is enabled for the corresponding Exception level 2." "0: The trace unit generates instruction trace in..,1: The trace unit does not generate instruction.." newline bitfld.long 0x0 21. "EXLEVEL1_NS,In Non-secure state each bit controls whether instruction tracing is enabled for the corresponding Exception level 1." "0: The trace unit generates instruction trace in..,1: The trace unit does not generate instruction.." newline bitfld.long 0x0 20. "EXLEVEL0_NS,In Non-secure state each bit controls whether instruction tracing is enabled for the corresponding Exception level 0." "0: The trace unit generates instruction trace in..,1: The trace unit does not generate instruction.." newline bitfld.long 0x0 19. "EXLEVEL3_S,In Secure state each bit controls whether instruction tracing is enabled for the corresponding Exception level 3." "0: The trace unit generates instruction trace in..,1: The trace unit does not generate instruction.." newline bitfld.long 0x0 18. "EXLEVEL2_S,In Secure state each bit controls whether instruction tracing is enabled for the corresponding Exception level 2." "0: The trace unit generates instruction trace in..,1: The trace unit does not generate instruction.." newline bitfld.long 0x0 17. "EXLEVEL1_S,In Secure state each bit controls whether instruction tracing is enabled for the corresponding Exception level 1." "0: The trace unit generates instruction trace in..,1: The trace unit does not generate instruction.." newline bitfld.long 0x0 16. "EXLEVEL0_S,In Secure state each bit controls whether instruction tracing is enabled for the corresponding Exception level 0." "0: The trace unit generates instruction trace in..,1: The trace unit does not generate instruction.." newline bitfld.long 0x0 11. "TRCERR,When TRCIDR3.TRCERR==1 this bit controls whether a trace unit must trace a System error exception." "0: The trace unit does not trace a System error..,1: The trace unit always traces a System error.." newline bitfld.long 0x0 10. "TRCRESET,Controls whether a trace unit must trace a Reset exception." "0: The trace unit does not trace a Reset exception..,1: The trace unit always traces a Reset exception." newline bitfld.long 0x0 9. "SSSTATUS,When TRCIDR4.NUMACPAIRS > 0 or TRCIDR4.NUMPC > 0 this bit returns the status of the start/stop logic." "0: The start/stop logic is in the stopped state.,1: The start/stop logic is in the started state." newline hexmask.long.byte 0x0 0.--4. 1. "EVENT_SEL,Select which resource number should be filtered." line.long 0x4 "TRCVIIECTLR,ViewInst exclude control. Might ignore writes when the trace unit is enabled or not idle. This register must be programmed when one or more address comparators are implemented." bitfld.long 0x4 23. "EXCLUDE_7,Exclude range field. Selects which address range comparator pairs are in use with ViewInst exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 22. "EXCLUDE_6,Exclude range field. Selects which address range comparator pairs are in use with ViewInst exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 21. "EXCLUDE_5,Exclude range field. Selects which address range comparator pairs are in use with ViewInst exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 20. "EXCLUDE_4,Exclude range field. Selects which address range comparator pairs are in use with ViewInst exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 19. "EXCLUDE_3,Exclude range field. Selects which address range comparator pairs are in use with ViewInst exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 18. "EXCLUDE_2,Exclude range field. Selects which address range comparator pairs are in use with ViewInst exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 17. "EXCLUDE_1,Exclude range field. Selects which address range comparator pairs are in use with ViewInst exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 16. "EXCLUDE_0,Exclude range field. Selects which address range comparator pairs are in use with ViewInst exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 7. "INCLUDE_7,Include range field. Selects which address range comparator pairs are in use with ViewInst include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 6. "INCLUDE_6,Include range field. Selects which address range comparator pairs are in use with ViewInst include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 5. "INCLUDE_5,Include range field. Selects which address range comparator pairs are in use with ViewInst include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 4. "INCLUDE_4,Include range field. Selects which address range comparator pairs are in use with ViewInst include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 3. "INCLUDE_3,Include range field. Selects which address range comparator pairs are in use with ViewInst include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 2. "INCLUDE_2,Include range field. Selects which address range comparator pairs are in use with ViewInst include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 1. "INCLUDE_1,Include range field. Selects which address range comparator pairs are in use with ViewInst include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x4 0. "INCLUDE_0,Include range field. Selects which address range comparator pairs are in use with ViewInst include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." line.long 0x8 "TRCVISSCTLR,Use this to set. or read. the single address comparators that control the ViewInst start/stop" bitfld.long 0x8 23. "STOP_7,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of stopping trace" "0: The single address comparator 7 is not selected..,1: The single address comparator 7 is selected as a.." newline bitfld.long 0x8 22. "STOP_6,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of stopping trace" "0: The single address comparator 6 is not selected..,1: The single address comparator 6 is selected as a.." newline bitfld.long 0x8 21. "STOP_5,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of stopping trace" "0: The single address comparator 5 is not selected..,1: The single address comparator 5 is selected as a.." newline bitfld.long 0x8 20. "STOP_4,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of stopping trace" "0: The single address comparator 4 is not selected..,1: The single address comparator 4 is selected as a.." newline bitfld.long 0x8 19. "STOP_3,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of stopping trace" "0: The single address comparator 3 is not selected..,1: The single address comparator 3 is selected as a.." newline bitfld.long 0x8 18. "STOP_2,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of stopping trace" "0: The single address comparator 2 is not selected..,1: The single address comparator 2 is selected as a.." newline bitfld.long 0x8 17. "STOP_1,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of stopping trace" "0: The single address comparator 1 is not selected..,1: The single address comparator 1 is selected as a.." newline bitfld.long 0x8 16. "STOP_0,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of stopping trace" "0: The single address comparator 0 is not selected..,1: The single address comparator 0 is selected as a.." newline bitfld.long 0x8 7. "START_7,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of starting trace." "0: The single address comparator 7 is not selected..,1: The single address comparator 7 is selected as a.." newline bitfld.long 0x8 6. "START_6,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of starting trace." "0: The single address comparator 6 is not selected..,1: The single address comparator 6 is selected as a.." newline bitfld.long 0x8 5. "START_5,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of starting trace." "0: The single address comparator 5 is not selected..,1: The single address comparator 5 is selected as a.." newline bitfld.long 0x8 4. "START_4,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of starting trace." "0: The single address comparator 4 is not selected..,1: The single address comparator 4 is selected as a.." newline bitfld.long 0x8 3. "START_3,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of starting trace." "0: The single address comparator 3 is not selected..,1: The single address comparator 3 is selected as a.." newline bitfld.long 0x8 2. "START_2,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of starting trace." "0: The single address comparator 2 is not selected..,1: The single address comparator 2 is selected as a.." newline bitfld.long 0x8 1. "START_1,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of starting trace." "0: The single address comparator 1 is not selected..,1: The single address comparator 1 is selected as a.." newline bitfld.long 0x8 0. "START_0,Selects which single address comparators are in use with ViewInst start/stop control for the purpose of starting trace." "0: The single address comparator 0 is not selected..,1: The single address comparator 0 is selected as a.." line.long 0xC "TRCVIPCSSCTLR,Use this to set. or read. which PE comparator inputs can control the ViewInst start/stop logic. Might ignore writes when the trace unit is enabled or not idle. If implemented then this register must be programmed." bitfld.long 0xC 23. "STOP_7,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of stopping trace." "0: The single PE comparator input 7 is not selected..,1: The single PE comparator input 7 is selected as.." newline bitfld.long 0xC 22. "STOP_6,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of stopping trace." "0: The single PE comparator input 6 is not selected..,1: The single PE comparator input 6 is selected as.." newline bitfld.long 0xC 21. "STOP_5,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of stopping trace." "0: The single PE comparator input 5 is not selected..,1: The single PE comparator input 5 is selected as.." newline bitfld.long 0xC 20. "STOP_4,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of stopping trace." "0: The single PE comparator input 4 is not selected..,1: The single PE comparator input 4 is selected as.." newline bitfld.long 0xC 19. "STOP_3,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of stopping trace." "0: The single PE comparator input 3 is not selected..,1: The single PE comparator input 3 is selected as.." newline bitfld.long 0xC 18. "STOP_2,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of stopping trace." "0: The single PE comparator input 2 is not selected..,1: The single PE comparator input 2 is selected as.." newline bitfld.long 0xC 17. "STOP_1,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of stopping trace." "0: The single PE comparator input 1 is not selected..,1: The single PE comparator input 1 is selected as.." newline bitfld.long 0xC 16. "STOP_0,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of stopping trace." "0: The single PE comparator input 0 is not selected..,1: The single PE comparator input 0 is selected as.." newline bitfld.long 0xC 7. "START_7,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of starting trace" "0: The single PE comparator input 7 is not selected..,1: The single PE comparator input 7 is selected as.." newline bitfld.long 0xC 6. "START_6,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of starting trace" "0: The single PE comparator input 6 is not selected..,1: The single PE comparator input 6 is selected as.." newline bitfld.long 0xC 5. "START_5,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of starting trace" "0: The single PE comparator input 5 is not selected..,1: The single PE comparator input 5 is selected as.." newline bitfld.long 0xC 4. "START_4,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of starting trace" "0: The single PE comparator input 4 is not selected..,1: The single PE comparator input 4 is selected as.." newline bitfld.long 0xC 3. "START_3,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of starting trace" "0: The single PE comparator input 3 is not selected..,1: The single PE comparator input 3 is selected as.." newline bitfld.long 0xC 2. "START_2,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of starting trace" "0: The single PE comparator input 2 is not selected..,1: The single PE comparator input 2 is selected as.." newline bitfld.long 0xC 1. "START_1,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of starting trace" "0: The single PE comparator input 1 is not selected..,1: The single PE comparator input 1 is selected as.." newline bitfld.long 0xC 0. "START_0,Selects which PE comparator inputs are in use with ViewInst start/stop control for the purpose of starting trace" "0: The single PE comparator input 0 is not selected..,1: The single PE comparator input 0 is selected as.." group.long 0xA0++0xB line.long 0x0 "TRCVDCTLR,Controls data trace filtering. Might ignore writes when the trace unit is enabled or not idle. This register must be programmed when data tracing is enabled. that is. when either TRCCONFIGR.DA == 1 or TRCCONFIGR.DV == 1." bitfld.long 0x0 12. "TRCEXDATA,Controls the tracing of data transfers for exceptions and exception returns on Armv6-M Armv7-M and Armv8-M PEs." "0: Exception and exception return data transfers..,1: Exception and exception return data transfers.." newline bitfld.long 0x0 11. "TBI,Controls which information a trace unit populates in bits[63:56] of the data address." "0: The trace unit assigns bits[63:56] to have the..,1: The trace unit assigns bits[63:56] to have the.." newline bitfld.long 0x0 10. "PCREL,Controls whether a trace unit traces data for transfers that are relative to the Program Counter (PC)." "0: The trace unit does not affect the tracing of..,1: The trace unit does not trace the address or.." newline bitfld.long 0x0 8.--9. "SPREL,Controls whether a trace unit traces data for transfers that are relative to the Stack Pointer (SP)." "0: The trace unit does not affect the tracing of..,?,2: The trace unit does not trace the address..,3: The trace unit does not trace the address or.." newline bitfld.long 0x0 7. "EVENT_7,Event unit enable bit." "0: The trace event is not selected for trace..,1: The trace event is selected for trace filtering." newline bitfld.long 0x0 6. "EVENT_6,Event unit enable bit." "0: The trace event is not selected for trace..,1: The trace event is selected for trace filtering." newline bitfld.long 0x0 5. "EVENT_5,Event unit enable bit." "0: The trace event is not selected for trace..,1: The trace event is selected for trace filtering." newline bitfld.long 0x0 4. "EVENT_4,Event unit enable bit." "0: The trace event is not selected for trace..,1: The trace event is selected for trace filtering." newline bitfld.long 0x0 3. "EVENT_3,Event unit enable bit." "0: The trace event is not selected for trace..,1: The trace event is selected for trace filtering." newline bitfld.long 0x0 2. "EVENT_2,Event unit enable bit." "0: The trace event is not selected for trace..,1: The trace event is selected for trace filtering." newline bitfld.long 0x0 1. "EVENT_1,Event unit enable bit." "0: The trace event is not selected for trace..,1: The trace event is selected for trace filtering." newline bitfld.long 0x0 0. "EVENT_0,Event unit enable bit." "0: The trace event is not selected for trace..,1: The trace event is selected for trace filtering." line.long 0x4 "TRCVDSACCTLR,ViewData include / exclude control. Might ignore writes when the trace unit is enabled or not idle. This register must be programmed when one or more address comparators are implemented." bitfld.long 0x4 23. "EXCLUDE_7,Selects which single address comparators are in use with ViewData exclude control." "0: The single address comparator 7 is not selected..,1: The single address comparator 7 s selected for.." newline bitfld.long 0x4 22. "EXCLUDE_6,Selects which single address comparators are in use with ViewData exclude control." "0: The single address comparator 6 is not selected..,1: The single address comparator 6 s selected for.." newline bitfld.long 0x4 21. "EXCLUDE_5,Selects which single address comparators are in use with ViewData exclude control." "0: The single address comparator 5 is not selected..,1: The single address comparator 5 s selected for.." newline bitfld.long 0x4 20. "EXCLUDE_4,Selects which single address comparators are in use with ViewData exclude control." "0: The single address comparator 4 is not selected..,1: The single address comparator 4 s selected for.." newline bitfld.long 0x4 19. "EXCLUDE_3,Selects which single address comparators are in use with ViewData exclude control." "0: The single address comparator 3 is not selected..,1: The single address comparator 3 s selected for.." newline bitfld.long 0x4 18. "EXCLUDE_2,Selects which single address comparators are in use with ViewData exclude control." "0: The single address comparator 2 is not selected..,1: The single address comparator 2 s selected for.." newline bitfld.long 0x4 17. "EXCLUDE_1,Selects which single address comparators are in use with ViewData exclude control." "0: The single address comparator 1 is not selected..,1: The single address comparator 1 s selected for.." newline bitfld.long 0x4 16. "EXCLUDE_0,Selects which single address comparators are in use with ViewData exclude control." "0: The single address comparator 0 is not selected..,1: The single address comparator 0 s selected for.." newline bitfld.long 0x4 7. "INCLUDE_7,Selects which single address comparators are in use with ViewData include control." "0: The single address comparator 7 is not selected..,1: The single address comparator 7 is selected for.." newline bitfld.long 0x4 6. "INCLUDE_6,Selects which single address comparators are in use with ViewData include control." "0: The single address comparator 6 is not selected..,1: The single address comparator 6 is selected for.." newline bitfld.long 0x4 5. "INCLUDE_5,Selects which single address comparators are in use with ViewData include control." "0: The single address comparator 5 is not selected..,1: The single address comparator 5 is selected for.." newline bitfld.long 0x4 4. "INCLUDE_4,Selects which single address comparators are in use with ViewData include control." "0: The single address comparator 4 is not selected..,1: The single address comparator 4 is selected for.." newline bitfld.long 0x4 3. "INCLUDE_3,Selects which single address comparators are in use with ViewData include control." "0: The single address comparator 3 is not selected..,1: The single address comparator 3 is selected for.." newline bitfld.long 0x4 2. "INCLUDE_2,Selects which single address comparators are in use with ViewData include control." "0: The single address comparator 2 is not selected..,1: The single address comparator 2 is selected for.." newline bitfld.long 0x4 1. "INCLUDE_1,Selects which single address comparators are in use with ViewData include control." "0: The single address comparator 1 is not selected..,1: The single address comparator 1 is selected for.." newline bitfld.long 0x4 0. "INCLUDE_0,Selects which single address comparators are in use with ViewData include control." "0: The single address comparator 0 is not selected..,1: The single address comparator 0 is selected for.." line.long 0x8 "TRCVDARCCTLR,ViewData include / exclude control. Might ignore writes when the trace unit is enabled or not idle. This register must be programmed when one or more address comparators are implemented." bitfld.long 0x8 23. "EXCLUDE_7,Exclude range field. Selects which address range comparator pairs are in use with ViewData exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 22. "EXCLUDE_6,Exclude range field. Selects which address range comparator pairs are in use with ViewData exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 21. "EXCLUDE_5,Exclude range field. Selects which address range comparator pairs are in use with ViewData exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 20. "EXCLUDE_4,Exclude range field. Selects which address range comparator pairs are in use with ViewData exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 19. "EXCLUDE_3,Exclude range field. Selects which address range comparator pairs are in use with ViewData exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 18. "EXCLUDE_2,Exclude range field. Selects which address range comparator pairs are in use with ViewData exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 17. "EXCLUDE_1,Exclude range field. Selects which address range comparator pairs are in use with ViewData exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 16. "EXCLUDE_0,Exclude range field. Selects which address range comparator pairs are in use with ViewData exclude control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 7. "INCLUDE_7,Include range field. Selects which address range comparator pairs are in use with ViewData include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 6. "INCLUDE_6,Include range field. Selects which address range comparator pairs are in use with ViewData include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 5. "INCLUDE_5,Include range field. Selects which address range comparator pairs are in use with ViewData include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 4. "INCLUDE_4,Include range field. Selects which address range comparator pairs are in use with ViewData include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 3. "INCLUDE_3,Include range field. Selects which address range comparator pairs are in use with ViewData include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 2. "INCLUDE_2,Include range field. Selects which address range comparator pairs are in use with ViewData include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 1. "INCLUDE_1,Include range field. Selects which address range comparator pairs are in use with ViewData include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." newline bitfld.long 0x8 0. "INCLUDE_0,Include range field. Selects which address range comparator pairs are in use with ViewData include control." "0: The address range that address range comparator..,1: The address range that address range comparator.." repeat 3. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "TRCSEQEVR[$1],Description collection: Moves the sequencer state according to programmed events. Might ignore writes when the trace unit is enabled or not idle. When the sequencer is used. all sequencer state transitions must be programmed with a valid.." bitfld.long 0x0 15. "B_7,Backward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 14. "B_6,Backward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 13. "B_5,Backward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 12. "B_4,Backward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 11. "B_3,Backward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 10. "B_2,Backward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 9. "B_1,Backward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 8. "B_0,Backward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 7. "F_7,Forward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 6. "F_6,Forward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 5. "F_5,Forward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 4. "F_4,Forward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 3. "F_3,Forward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 2. "F_2,Forward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 1. "F_1,Forward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." newline bitfld.long 0x0 0. "F_0,Forward field." "0: The trace event does not affect the sequencer.,1: When the event occurs then the sequencer state.." repeat.end group.long 0x118++0xB line.long 0x0 "TRCSEQRSTEVR,Moves the sequencer to state 0 when a programmed event occurs. Might ignore writes when the trace unit is enabled or not idle. When the sequencer is used. all sequencer state transitions must be programmed with a valid event." hexmask.long.byte 0x0 0.--7. 1. "EVENT,Select which event should reset the sequencer." line.long 0x4 "TRCSEQSTR,Use this to set. or read. the sequencer state. Might ignore writes when the trace unit is enabled or not idle. Only returns stable data when TRCSTATR.PMSTABLE == 1. When the sequencer is used. all sequencer state transitions must be programmed.." bitfld.long 0x4 0.--1. "STATE,Sets or returns the state of the sequencer." "0: The sequencer is in state 0.,1: The sequencer is in state 1.,2: The sequencer is in state 2.,3: The sequencer is in state 3." line.long 0x8 "TRCEXTINSELR,Use this to set. or read. which external inputs are resources to the trace unit. Might ignore writes when the trace unit is enabled or not idle. Only returns stable data when TRCSTATR.PMSTABLE == 1. When the sequencer is used. all sequencer.." hexmask.long.byte 0x8 24.--31. 1. "SEL_3,Each field in this collection selects an external input as a resource for the trace unit." newline hexmask.long.byte 0x8 16.--23. 1. "SEL_2,Each field in this collection selects an external input as a resource for the trace unit." newline hexmask.long.byte 0x8 8.--15. 1. "SEL_1,Each field in this collection selects an external input as a resource for the trace unit." newline hexmask.long.byte 0x8 0.--7. 1. "SEL_0,Each field in this collection selects an external input as a resource for the trace unit." repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "TRCCNTRLDVR[$1],Description collection: This sets or returns the reload count value for counter n. Might ignore writes when the trace unit is enabled or not idle." hexmask.long.word 0x0 0.--15. 1. "VALUE,Contains the reload value for counter n. When a reload event occurs for counter n then the trace unit copies the VALUEn field into counter n." repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x150)++0x3 line.long 0x0 "TRCCNTCTLR[$1],Description collection: Controls the operation of counter n. Might ignore writes when the trace unit is enabled or not idle." bitfld.long 0x0 17. "CNTCHAIN,For TRCCNTCTLR3 and TRCCNTCTLR1 this bit controls whether counter n decrements when a reload event occurs for counter n-1." "0: Counter n does not decrement when a reload event..,1: Counter n decrements when a reload event for.." newline bitfld.long 0x0 16. "RLDSELF,Controls whether a reload event occurs for counter n when counter n reaches zero." "0: The counter is in Normal mode.,1: The counter is in Self-reload mode." newline hexmask.long.byte 0x0 8.--15. 1. "RLDEVENT,Selects an event that when it occurs causes a reload event for counter n." newline hexmask.long.byte 0x0 0.--7. 1. "CNTEVENT,Selects an event that when it occurs causes counter n to decrement." repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x160)++0x3 line.long 0x0 "TRCCNTVR[$1],Description collection: This sets or returns the value of counter n. The count value is only stable when TRCSTATR.PMSTABLE == 1. If software uses counter n then it must write to this register to set the initial counter value. Might ignore.." hexmask.long.word 0x0 0.--15. 1. "VALUE,Contains the count value of counter n." repeat.end repeat 30. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x200)++0x3 line.long 0x0 "TRCRSCTLR[$1],Description collection: Controls the selection of the resources in the trace unit. Might ignore writes when the trace unit is enabled or not idle. If software selects a non-implemented resource then CONSTRAINED UNPREDICTABLE" bitfld.long 0x0 0. "EN,Trace unit enable bit" "0: The trace unit is disabled. All trace resources..,1: The trace unit is enabled." repeat.end group.long 0x280++0x3 line.long 0x0 "TRCSSCCR0,Controls the single-shot comparator." bitfld.long 0x0 24. "RST,Enables the single-shot comparator resource to be reset when it occurs to enable another comparator match to be detected" "0: Multiple matches can not be detected.,1: Multiple matches can occur." group.long 0x2A0++0x3 line.long 0x0 "TRCSSCSR0,Indicates the status of the single-shot comparators. TRCSSCSR0 is sensitive toinstruction addresses." bitfld.long 0x0 31. "STATUS,Single-shot status. This indicates whether any of the selected comparators have matched." "0: Match has not occurred.,1: Match has occurred at least once." newline bitfld.long 0x0 3. "PC,Process counter value comparator support" "0: Process counter value comparisons not supported.,1: Process counter value comparisons supported." newline bitfld.long 0x0 2. "DV,Data value comparator support" "0: Data value comparisons not supported.,1: Data value comparisons supported." newline bitfld.long 0x0 1. "DA,Data address comparator support" "0: Data address comparisons not supported.,1: Data address comparisons supported." newline bitfld.long 0x0 0. "INST,Instruction address comparator support" "0: Single-shot instruction address comparisons not..,1: Single-shot instruction address comparisons.." group.long 0x2C0++0x3 line.long 0x0 "TRCSSPCICR0,Selects the processor comparator inputs for Single-shot control." bitfld.long 0x0 3. "PC_3,Selects processor comparator 3 inputs for Single-shot control" "0: Processor comparator 3 is not selected for..,1: Processor comparator 3 is selected for.." newline bitfld.long 0x0 2. "PC_2,Selects processor comparator 2 inputs for Single-shot control" "0: Processor comparator 2 is not selected for..,1: Processor comparator 2 is selected for.." newline bitfld.long 0x0 1. "PC_1,Selects processor comparator 1 inputs for Single-shot control" "0: Processor comparator 1 is not selected for..,1: Processor comparator 1 is selected for.." newline bitfld.long 0x0 0. "PC_0,Selects processor comparator 0 inputs for Single-shot control" "0: Processor comparator 0 is not selected for..,1: Processor comparator 0 is selected for.." group.long 0x310++0x7 line.long 0x0 "TRCPDCR,Controls the single-shot comparator." bitfld.long 0x0 24. "PU,Power up request to request that power to ETM and access to the trace registers is maintained." "0: Power not requested.,1: Power requested." line.long 0x4 "TRCPDSR,Indicates the power down status of the ETM." bitfld.long 0x4 1. "STICKYPD,Sticky power down state. This bit is set to 1 when power to the ETM registers is removed to indicate that programming state has been lost. It is cleared after a read of the TRCPDSR" "0: Trace register power has not been removed since..,1: Trace register power has been removed since the.." newline bitfld.long 0x4 0. "POWER,Indicates ETM is powered up" "0: ETM is not powered up. All registers are not..,1: ETM is powered up. All registers are accessible." group.long 0xEE4++0x3 line.long 0x0 "TRCITATBIDR,Sets the state of output pins." bitfld.long 0x0 6. "ID_6,Drives the ATIDMI[6] output pin." "0,1" newline bitfld.long 0x0 5. "ID_5,Drives the ATIDMI[5] output pin." "0,1" newline bitfld.long 0x0 4. "ID_4,Drives the ATIDMI[4] output pin." "0,1" newline bitfld.long 0x0 3. "ID_3,Drives the ATIDMI[3] output pin." "0,1" newline bitfld.long 0x0 2. "ID_2,Drives the ATIDMI[2] output pin." "0,1" newline bitfld.long 0x0 1. "ID_1,Drives the ATIDMI[1] output pin." "0,1" newline bitfld.long 0x0 0. "ID_0,Drives the ATIDMI[0] output pin." "0,1" group.long 0xEF4++0x3 line.long 0x0 "TRCITIATBINR,Reads the state of the input pins." bitfld.long 0x0 1. "AFREADY,Returns the value of the AFREADYMI input pin." "0,1" newline bitfld.long 0x0 0. "ATVALID,Returns the value of the ATVALIDMI input pin." "0,1" group.long 0xEFC++0x7 line.long 0x0 "TRCITIATBOUTR,Sets the state of the output pins." bitfld.long 0x0 1. "AFREADY,Drives the AFREADYMI output pin." "0,1" newline bitfld.long 0x0 0. "ATVALID,Drives the ATVALIDMI output pin." "0,1" line.long 0x4 "TRCITCTRL,Enables topology detection or integration testing. by putting ETM-M33 into integration mode." bitfld.long 0x4 0. "IME,Integration mode enable" "0: ETM is not in integration mode.,1: ETM is in integration mode." group.long 0xFA0++0x7 line.long 0x0 "TRCCLAIMSET,Sets bits in the claim tag and determines the number of claim tag bits implemented." bitfld.long 0x0 3. "SET_3,Claim tag set register" "0: Claim tag 3 is not set.,1: Set claim tag 3." newline bitfld.long 0x0 2. "SET_2,Claim tag set register" "0: Claim tag 2 is not set.,1: Set claim tag 2." newline bitfld.long 0x0 1. "SET_1,Claim tag set register" "0: Claim tag 1 is not set.,1: Set claim tag 1." newline bitfld.long 0x0 0. "SET_0,Claim tag set register" "0: Claim tag 0 is not set.,1: Set claim tag 0." line.long 0x4 "TRCCLAIMCLR,Clears bits in the claim tag and determines the current value of the claim tag." bitfld.long 0x4 3. "CLR_3,Claim tag clear register" "0: Claim tag 3 is not set.,1: Clear claim tag 3." newline bitfld.long 0x4 2. "CLR_2,Claim tag clear register" "0: Claim tag 2 is not set.,1: Clear claim tag 2." newline bitfld.long 0x4 1. "CLR_1,Claim tag clear register" "0: Claim tag 1 is not set.,1: Clear claim tag 1." newline bitfld.long 0x4 0. "CLR_0,Claim tag clear register" "0: Claim tag 0 is not set.,1: Clear claim tag 0." group.long 0xFB8++0x3 line.long 0x0 "TRCAUTHSTATUS,Indicates the current level of tracing permitted by the system" bitfld.long 0x0 6.--7. "SNID,Secure Non-Invasive Debug" "0: The feature is not implemented.,1: The feature is implemented.,?,?" newline bitfld.long 0x0 4.--5. "SID,Secure Invasive Debug" "0: The feature is not implemented.,1: The feature is implemented.,?,?" newline bitfld.long 0x0 2.--3. "NSNID,Non-secure Non-Invasive Debug" "0: The feature is not implemented.,1: The feature is implemented.,?,?" newline bitfld.long 0x0 0.--1. "NSID,Non-secure Invasive Debug" "0: The feature is not implemented.,1: The feature is implemented.,?,?" rgroup.long 0xFBC++0x3 line.long 0x0 "TRCDEVARCH,The TRCDEVARCH identifies ETM-M33 as an ETMv4.2 component" hexmask.long.word 0x0 21.--31. 1. "ARCHITECT,Defines the architect of the component" newline bitfld.long 0x0 20. "PRESENT,This register is implemented" "0: The register is not implemented.,1: The register is implemented." newline hexmask.long.byte 0x0 16.--19. 1. "REVISION,Architecture revision" newline hexmask.long.word 0x0 0.--15. 1. "ARCHID,Architecture ID" rgroup.long 0xFCC++0x3 line.long 0x0 "TRCDEVTYPE,Controls the single-shot comparator." hexmask.long.byte 0x0 4.--7. 1. "SUB,The sub-type of the component" newline hexmask.long.byte 0x0 0.--3. 1. "MAJOR,The main type of the component" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xFD0)++0x3 line.long 0x0 "TRCPIDR[$1],Description collection: Coresight peripheral identification registers." repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xFF0)++0x3 line.long 0x0 "TRCCIDR[$1],Description collection: Coresight component identification registers." repeat.end tree.end tree.end tree "FICR (Factory Information Configuration Registers)" base ad:0x0 tree "GLOBAL_FICR_NS" base ad:0xFFC000 tree "INFO" base ad:0xFFC300 rgroup.long 0x0++0x3 line.long 0x0 "CONFIGID,Configuration identifier" hexmask.long.word 0x0 0.--15. 1. "HWID,Identification number for the HW" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x4)++0x3 line.long 0x0 "DEVICEID[$1],Description collection: Device identifier" hexmask.long 0x0 0.--31. 1. "DEVICEID,64 bit unique device identifier" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "UUID[$1],Description collection: 128-bit Universally Unique IDentifier (UUID)." hexmask.long 0x0 0.--31. 1. "UUID,Device UUID [n]." repeat.end rgroup.long 0x1C++0x13 line.long 0x0 "PART,Part code" hexmask.long 0x0 0.--31. 1. "PART,Part code" line.long 0x4 "VARIANT,Part Variant. Hardware version and Production configuration" hexmask.long 0x4 0.--31. 1. "VARIANT,Part Variant Hardware version and Production configuration encoded as ASCII" line.long 0x8 "PACKAGE,Package option" hexmask.long 0x8 0.--31. 1. "PACKAGE,Package option" line.long 0xC "RAM,RAM size (KB)" hexmask.long 0xC 0.--31. 1. "RAM,RAM size (KB)" line.long 0x10 "RRAM,RRAM size (KB)" hexmask.long 0x10 0.--31. 1. "RRAM,RRAM size (KB)" tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x380)++0x3 line.long 0x0 "ER[$1],Description collection: Common encryption root key. word n" hexmask.long 0x0 0.--31. 1. "ER,Encryption Root word n" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x390)++0x3 line.long 0x0 "IR[$1],Description collection: Common identity root key. word n" hexmask.long 0x0 0.--31. 1. "IR,Identity Root word n" repeat.end rgroup.long 0x3A0++0x3 line.long 0x0 "DEVICEADDRTYPE,Device address type" bitfld.long 0x0 0. "DEVICEADDRTYPE,Device address type" "0: Public address,1: Random address" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x3A4)++0x3 line.long 0x0 "DEVICEADDR[$1],Description collection: Device address n" hexmask.long 0x0 0.--31. 1. "DEVICEADDR,48 bit device address" repeat.end repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0xFFC400 ad:0xFFC408 ad:0xFFC410 ad:0xFFC418 ad:0xFFC420 ad:0xFFC428 ad:0xFFC430 ad:0xFFC438 ad:0xFFC440 ad:0xFFC448 ad:0xFFC450 ad:0xFFC458 ad:0xFFC460 ad:0xFFC468 ad:0xFFC470 ad:0xFFC478) tree "TRIMCNF[$1]" base $2 rgroup.long ($2)++0x7 line.long 0x0 "ADDR,Description cluster: Address of the register which will be written" hexmask.long 0x0 0.--31. 1. "Address,Address" line.long 0x4 "DATA,Description cluster: Data to be written into the register" hexmask.long 0x4 0.--31. 1. "Data,Data" tree.end repeat.end repeat 16. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F)(list ad:0xFFC480 ad:0xFFC488 ad:0xFFC490 ad:0xFFC498 ad:0xFFC4A0 ad:0xFFC4A8 ad:0xFFC4B0 ad:0xFFC4B8 ad:0xFFC4C0 ad:0xFFC4C8 ad:0xFFC4D0 ad:0xFFC4D8 ad:0xFFC4E0 ad:0xFFC4E8 ad:0xFFC4F0 ad:0xFFC4F8) tree "TRIMCNF[$1]" base $2 rgroup.long ($2)++0x7 line.long 0x0 "ADDR,Description cluster: Address of the register which will be written" hexmask.long 0x0 0.--31. 1. "Address,Address" line.long 0x4 "DATA,Description cluster: Data to be written into the register" hexmask.long 0x4 0.--31. 1. "Data,Data" tree.end repeat.end repeat 16. (list 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F)(list ad:0xFFC500 ad:0xFFC508 ad:0xFFC510 ad:0xFFC518 ad:0xFFC520 ad:0xFFC528 ad:0xFFC530 ad:0xFFC538 ad:0xFFC540 ad:0xFFC548 ad:0xFFC550 ad:0xFFC558 ad:0xFFC560 ad:0xFFC568 ad:0xFFC570 ad:0xFFC578) tree "TRIMCNF[$1]" base $2 rgroup.long ($2)++0x7 line.long 0x0 "ADDR,Description cluster: Address of the register which will be written" hexmask.long 0x0 0.--31. 1. "Address,Address" line.long 0x4 "DATA,Description cluster: Data to be written into the register" hexmask.long 0x4 0.--31. 1. "Data,Data" tree.end repeat.end repeat 16. (list 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F)(list ad:0xFFC580 ad:0xFFC588 ad:0xFFC590 ad:0xFFC598 ad:0xFFC5A0 ad:0xFFC5A8 ad:0xFFC5B0 ad:0xFFC5B8 ad:0xFFC5C0 ad:0xFFC5C8 ad:0xFFC5D0 ad:0xFFC5D8 ad:0xFFC5E0 ad:0xFFC5E8 ad:0xFFC5F0 ad:0xFFC5F8) tree "TRIMCNF[$1]" base $2 rgroup.long ($2)++0x7 line.long 0x0 "ADDR,Description cluster: Address of the register which will be written" hexmask.long 0x0 0.--31. 1. "Address,Address" line.long 0x4 "DATA,Description cluster: Data to be written into the register" hexmask.long 0x4 0.--31. 1. "Data,Data" tree.end repeat.end base ad:0xFFC000 tree "NFC" base ad:0xFFC600 rgroup.long 0x0++0xF line.long 0x0 "TAGHEADER0,Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST. NFCID1_2ND_LAST and NFCID1_LAST." hexmask.long.byte 0x0 24.--31. 1. "UD3,Unique identifier byte 3" hexmask.long.byte 0x0 16.--23. 1. "UD2,Unique identifier byte 2" hexmask.long.byte 0x0 8.--15. 1. "UD1,Unique identifier byte 1" hexmask.long.byte 0x0 0.--7. 1. "MFGID,Default Manufacturer ID: Nordic Semiconductor ASA has ICM 0x5F" line.long 0x4 "TAGHEADER1,Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST. NFCID1_2ND_LAST and NFCID1_LAST." hexmask.long.byte 0x4 24.--31. 1. "UD7,Unique identifier byte 7" hexmask.long.byte 0x4 16.--23. 1. "UD6,Unique identifier byte 6" hexmask.long.byte 0x4 8.--15. 1. "UD5,Unique identifier byte 5" hexmask.long.byte 0x4 0.--7. 1. "UD4,Unique identifier byte 4" line.long 0x8 "TAGHEADER2,Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST. NFCID1_2ND_LAST and NFCID1_LAST." hexmask.long.byte 0x8 24.--31. 1. "UD11,Unique identifier byte 11" hexmask.long.byte 0x8 16.--23. 1. "UD10,Unique identifier byte 10" hexmask.long.byte 0x8 8.--15. 1. "UD9,Unique identifier byte 9" hexmask.long.byte 0x8 0.--7. 1. "UD8,Unique identifier byte 8" line.long 0xC "TAGHEADER3,Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST. NFCID1_2ND_LAST and NFCID1_LAST." hexmask.long.byte 0xC 24.--31. 1. "UD15,Unique identifier byte 15" hexmask.long.byte 0xC 16.--23. 1. "UD14,Unique identifier byte 14" hexmask.long.byte 0xC 8.--15. 1. "UD13,Unique identifier byte 13" hexmask.long.byte 0xC 0.--7. 1. "UD12,Unique identifier byte 12" tree.end base ad:0xFFC000 newline rgroup.long 0x620++0x7 newline line.long 0x0 "XOSC32MTRIM,XOSC32M capacitor selection trim values" hexmask.long.word 0x0 16.--25. 1. "OFFSET,Offset trim factor on integer form" hexmask.long.word 0x0 0.--8. 1. "SLOPE,Slope trim factor on twos complement form" line.long 0x4 "XOSC32KTRIM,XOSC32K capacitor selection trim values" hexmask.long.word 0x4 16.--25. 1. "OFFSET,Offset trim factor on integer form" hexmask.long.word 0x4 0.--8. 1. "SLOPE,Slope trim factor on twos complement form" tree.end tree.end tree "GLITCHDET (Voltage Glitch Detectors)" base ad:0x0 tree "GLOBAL_GLITCHDET_S" base ad:0x5004B000 group.long 0x5A0++0x3 line.long 0x0 "CONFIG,Configuration for glitch detector" bitfld.long 0x0 4. "MODE,Glitch detector mode" "0: High pass filter mode,1: Cap divider mode" bitfld.long 0x0 0. "ENABLE,Enable glitch detector" "0: Disable glitch detector,1: Enable glitch detector" tree.end tree.end tree "GPIO" base ad:0x0 tree "GLOBAL_P0_NS" base ad:0x4010A000 group.long 0x0++0xB line.long 0x0 "OUT,Write GPIO port" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin driver is low,1: Pin driver is high" line.long 0x4 "OUTSET,Set individual bits in GPIO port" bitfld.long 0x4 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." line.long 0x8 "OUTCLR,Clear individual bits in GPIO port" bitfld.long 0x8 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." rgroup.long 0xC++0x3 line.long 0x0 "IN,Read GPIO port" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin input is low,1: Pin input is high" group.long 0x10++0xB line.long 0x0 "DIR,Direction of GPIO pins" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin set as input,1: Pin set as output" line.long 0x4 "DIRSET,DIR set register" bitfld.long 0x4 31. "PIN31,Set as output pin 31" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 30. "PIN30,Set as output pin 30" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 29. "PIN29,Set as output pin 29" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 28. "PIN28,Set as output pin 28" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 27. "PIN27,Set as output pin 27" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 26. "PIN26,Set as output pin 26" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 25. "PIN25,Set as output pin 25" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 24. "PIN24,Set as output pin 24" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 23. "PIN23,Set as output pin 23" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 22. "PIN22,Set as output pin 22" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 21. "PIN21,Set as output pin 21" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 20. "PIN20,Set as output pin 20" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 19. "PIN19,Set as output pin 19" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 18. "PIN18,Set as output pin 18" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 17. "PIN17,Set as output pin 17" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 16. "PIN16,Set as output pin 16" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 15. "PIN15,Set as output pin 15" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 14. "PIN14,Set as output pin 14" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 13. "PIN13,Set as output pin 13" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 12. "PIN12,Set as output pin 12" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 11. "PIN11,Set as output pin 11" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 10. "PIN10,Set as output pin 10" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 9. "PIN9,Set as output pin 9" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 8. "PIN8,Set as output pin 8" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 7. "PIN7,Set as output pin 7" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 6. "PIN6,Set as output pin 6" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 5. "PIN5,Set as output pin 5" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 4. "PIN4,Set as output pin 4" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 3. "PIN3,Set as output pin 3" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 2. "PIN2,Set as output pin 2" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 1. "PIN1,Set as output pin 1" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 0. "PIN0,Set as output pin 0" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." line.long 0x8 "DIRCLR,DIR clear register" bitfld.long 0x8 31. "PIN31,Set as input pin 31" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 30. "PIN30,Set as input pin 30" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 29. "PIN29,Set as input pin 29" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 28. "PIN28,Set as input pin 28" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 27. "PIN27,Set as input pin 27" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 26. "PIN26,Set as input pin 26" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 25. "PIN25,Set as input pin 25" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 24. "PIN24,Set as input pin 24" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 23. "PIN23,Set as input pin 23" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 22. "PIN22,Set as input pin 22" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 21. "PIN21,Set as input pin 21" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 20. "PIN20,Set as input pin 20" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 19. "PIN19,Set as input pin 19" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 18. "PIN18,Set as input pin 18" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 17. "PIN17,Set as input pin 17" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 16. "PIN16,Set as input pin 16" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 15. "PIN15,Set as input pin 15" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 14. "PIN14,Set as input pin 14" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 13. "PIN13,Set as input pin 13" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 12. "PIN12,Set as input pin 12" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 11. "PIN11,Set as input pin 11" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 10. "PIN10,Set as input pin 10" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 9. "PIN9,Set as input pin 9" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 8. "PIN8,Set as input pin 8" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 7. "PIN7,Set as input pin 7" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 6. "PIN6,Set as input pin 6" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 5. "PIN5,Set as input pin 5" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 4. "PIN4,Set as input pin 4" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 3. "PIN3,Set as input pin 3" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 2. "PIN2,Set as input pin 2" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 1. "PIN1,Set as input pin 1" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 0. "PIN0,Set as input pin 0" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." group.long 0x20++0x7 line.long 0x0 "LATCH,Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers" bitfld.long 0x0 31. "PIN31,Status on whether PIN31 has met criteria set in PIN_CNF[31].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 30. "PIN30,Status on whether PIN30 has met criteria set in PIN_CNF[30].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 29. "PIN29,Status on whether PIN29 has met criteria set in PIN_CNF[29].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 28. "PIN28,Status on whether PIN28 has met criteria set in PIN_CNF[28].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 27. "PIN27,Status on whether PIN27 has met criteria set in PIN_CNF[27].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 26. "PIN26,Status on whether PIN26 has met criteria set in PIN_CNF[26].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 25. "PIN25,Status on whether PIN25 has met criteria set in PIN_CNF[25].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 24. "PIN24,Status on whether PIN24 has met criteria set in PIN_CNF[24].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 23. "PIN23,Status on whether PIN23 has met criteria set in PIN_CNF[23].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 22. "PIN22,Status on whether PIN22 has met criteria set in PIN_CNF[22].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 21. "PIN21,Status on whether PIN21 has met criteria set in PIN_CNF[21].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 20. "PIN20,Status on whether PIN20 has met criteria set in PIN_CNF[20].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 19. "PIN19,Status on whether PIN19 has met criteria set in PIN_CNF[19].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 18. "PIN18,Status on whether PIN18 has met criteria set in PIN_CNF[18].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 17. "PIN17,Status on whether PIN17 has met criteria set in PIN_CNF[17].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 16. "PIN16,Status on whether PIN16 has met criteria set in PIN_CNF[16].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 15. "PIN15,Status on whether PIN15 has met criteria set in PIN_CNF[15].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 14. "PIN14,Status on whether PIN14 has met criteria set in PIN_CNF[14].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 13. "PIN13,Status on whether PIN13 has met criteria set in PIN_CNF[13].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 12. "PIN12,Status on whether PIN12 has met criteria set in PIN_CNF[12].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 11. "PIN11,Status on whether PIN11 has met criteria set in PIN_CNF[11].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 10. "PIN10,Status on whether PIN10 has met criteria set in PIN_CNF[10].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 9. "PIN9,Status on whether PIN9 has met criteria set in PIN_CNF[9].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 8. "PIN8,Status on whether PIN8 has met criteria set in PIN_CNF[8].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 7. "PIN7,Status on whether PIN7 has met criteria set in PIN_CNF[7].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 6. "PIN6,Status on whether PIN6 has met criteria set in PIN_CNF[6].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 5. "PIN5,Status on whether PIN5 has met criteria set in PIN_CNF[5].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 4. "PIN4,Status on whether PIN4 has met criteria set in PIN_CNF[4].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 3. "PIN3,Status on whether PIN3 has met criteria set in PIN_CNF[3].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 2. "PIN2,Status on whether PIN2 has met criteria set in PIN_CNF[2].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 1. "PIN1,Status on whether PIN1 has met criteria set in PIN_CNF[1].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 0. "PIN0,Status on whether PIN0 has met criteria set in PIN_CNF[0].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" line.long 0x4 "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" bitfld.long 0x4 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior" repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "PIN_CNF[$1],Description collection: Pin n configuration of GPIO pin" bitfld.long 0x0 28.--30. "CTRLSEL,Select which module has direct control over this pin" "0: GPIO or peripherals with PSEL registers,1: VPR processor,?,?,4: GRTC peripheral,?,?,?" bitfld.long 0x0 16.--17. "SENSE,Pin sensing mechanism" "0: Disabled,?,2: Sense for high level,3: Sense for low level" newline bitfld.long 0x0 10.--11. "DRIVE1,Drive configuration for '1'" "0: Standard '1',1: High drive '1',2: Disconnect '1'(normally used for wired-or..,3: Extra high drive '1'" bitfld.long 0x0 8.--9. "DRIVE0,Drive configuration for '0'" "0: Standard '0',1: High drive '0',2: Disconnect '0'(normally used for wired-or..,3: Extra high drive '0'" newline bitfld.long 0x0 2.--3. "PULL,Pull configuration" "0: No pull,1: Pull down on pin,?,3: Pull up on pin" bitfld.long 0x0 1. "INPUT,Connect or disconnect input buffer" "0: Connect input buffer,1: Disconnect input buffer" newline bitfld.long 0x0 0. "DIR,Pin direction. Same physical register as DIR register" "0: Configure pin as an input pin,1: Configure pin as an output pin" repeat.end tree.end tree "GLOBAL_P0_S" base ad:0x5010A000 group.long 0x0++0xB line.long 0x0 "OUT,Write GPIO port" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin driver is low,1: Pin driver is high" line.long 0x4 "OUTSET,Set individual bits in GPIO port" bitfld.long 0x4 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." line.long 0x8 "OUTCLR,Clear individual bits in GPIO port" bitfld.long 0x8 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." rgroup.long 0xC++0x3 line.long 0x0 "IN,Read GPIO port" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin input is low,1: Pin input is high" group.long 0x10++0xB line.long 0x0 "DIR,Direction of GPIO pins" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin set as input,1: Pin set as output" line.long 0x4 "DIRSET,DIR set register" bitfld.long 0x4 31. "PIN31,Set as output pin 31" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 30. "PIN30,Set as output pin 30" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 29. "PIN29,Set as output pin 29" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 28. "PIN28,Set as output pin 28" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 27. "PIN27,Set as output pin 27" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 26. "PIN26,Set as output pin 26" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 25. "PIN25,Set as output pin 25" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 24. "PIN24,Set as output pin 24" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 23. "PIN23,Set as output pin 23" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 22. "PIN22,Set as output pin 22" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 21. "PIN21,Set as output pin 21" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 20. "PIN20,Set as output pin 20" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 19. "PIN19,Set as output pin 19" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 18. "PIN18,Set as output pin 18" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 17. "PIN17,Set as output pin 17" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 16. "PIN16,Set as output pin 16" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 15. "PIN15,Set as output pin 15" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 14. "PIN14,Set as output pin 14" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 13. "PIN13,Set as output pin 13" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 12. "PIN12,Set as output pin 12" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 11. "PIN11,Set as output pin 11" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 10. "PIN10,Set as output pin 10" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 9. "PIN9,Set as output pin 9" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 8. "PIN8,Set as output pin 8" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 7. "PIN7,Set as output pin 7" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 6. "PIN6,Set as output pin 6" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 5. "PIN5,Set as output pin 5" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 4. "PIN4,Set as output pin 4" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 3. "PIN3,Set as output pin 3" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 2. "PIN2,Set as output pin 2" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 1. "PIN1,Set as output pin 1" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 0. "PIN0,Set as output pin 0" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." line.long 0x8 "DIRCLR,DIR clear register" bitfld.long 0x8 31. "PIN31,Set as input pin 31" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 30. "PIN30,Set as input pin 30" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 29. "PIN29,Set as input pin 29" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 28. "PIN28,Set as input pin 28" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 27. "PIN27,Set as input pin 27" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 26. "PIN26,Set as input pin 26" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 25. "PIN25,Set as input pin 25" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 24. "PIN24,Set as input pin 24" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 23. "PIN23,Set as input pin 23" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 22. "PIN22,Set as input pin 22" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 21. "PIN21,Set as input pin 21" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 20. "PIN20,Set as input pin 20" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 19. "PIN19,Set as input pin 19" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 18. "PIN18,Set as input pin 18" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 17. "PIN17,Set as input pin 17" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 16. "PIN16,Set as input pin 16" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 15. "PIN15,Set as input pin 15" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 14. "PIN14,Set as input pin 14" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 13. "PIN13,Set as input pin 13" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 12. "PIN12,Set as input pin 12" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 11. "PIN11,Set as input pin 11" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 10. "PIN10,Set as input pin 10" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 9. "PIN9,Set as input pin 9" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 8. "PIN8,Set as input pin 8" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 7. "PIN7,Set as input pin 7" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 6. "PIN6,Set as input pin 6" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 5. "PIN5,Set as input pin 5" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 4. "PIN4,Set as input pin 4" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 3. "PIN3,Set as input pin 3" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 2. "PIN2,Set as input pin 2" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 1. "PIN1,Set as input pin 1" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 0. "PIN0,Set as input pin 0" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." group.long 0x20++0x7 line.long 0x0 "LATCH,Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers" bitfld.long 0x0 31. "PIN31,Status on whether PIN31 has met criteria set in PIN_CNF[31].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 30. "PIN30,Status on whether PIN30 has met criteria set in PIN_CNF[30].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 29. "PIN29,Status on whether PIN29 has met criteria set in PIN_CNF[29].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 28. "PIN28,Status on whether PIN28 has met criteria set in PIN_CNF[28].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 27. "PIN27,Status on whether PIN27 has met criteria set in PIN_CNF[27].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 26. "PIN26,Status on whether PIN26 has met criteria set in PIN_CNF[26].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 25. "PIN25,Status on whether PIN25 has met criteria set in PIN_CNF[25].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 24. "PIN24,Status on whether PIN24 has met criteria set in PIN_CNF[24].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 23. "PIN23,Status on whether PIN23 has met criteria set in PIN_CNF[23].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 22. "PIN22,Status on whether PIN22 has met criteria set in PIN_CNF[22].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 21. "PIN21,Status on whether PIN21 has met criteria set in PIN_CNF[21].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 20. "PIN20,Status on whether PIN20 has met criteria set in PIN_CNF[20].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 19. "PIN19,Status on whether PIN19 has met criteria set in PIN_CNF[19].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 18. "PIN18,Status on whether PIN18 has met criteria set in PIN_CNF[18].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 17. "PIN17,Status on whether PIN17 has met criteria set in PIN_CNF[17].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 16. "PIN16,Status on whether PIN16 has met criteria set in PIN_CNF[16].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 15. "PIN15,Status on whether PIN15 has met criteria set in PIN_CNF[15].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 14. "PIN14,Status on whether PIN14 has met criteria set in PIN_CNF[14].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 13. "PIN13,Status on whether PIN13 has met criteria set in PIN_CNF[13].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 12. "PIN12,Status on whether PIN12 has met criteria set in PIN_CNF[12].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 11. "PIN11,Status on whether PIN11 has met criteria set in PIN_CNF[11].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 10. "PIN10,Status on whether PIN10 has met criteria set in PIN_CNF[10].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 9. "PIN9,Status on whether PIN9 has met criteria set in PIN_CNF[9].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 8. "PIN8,Status on whether PIN8 has met criteria set in PIN_CNF[8].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 7. "PIN7,Status on whether PIN7 has met criteria set in PIN_CNF[7].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 6. "PIN6,Status on whether PIN6 has met criteria set in PIN_CNF[6].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 5. "PIN5,Status on whether PIN5 has met criteria set in PIN_CNF[5].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 4. "PIN4,Status on whether PIN4 has met criteria set in PIN_CNF[4].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 3. "PIN3,Status on whether PIN3 has met criteria set in PIN_CNF[3].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 2. "PIN2,Status on whether PIN2 has met criteria set in PIN_CNF[2].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 1. "PIN1,Status on whether PIN1 has met criteria set in PIN_CNF[1].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 0. "PIN0,Status on whether PIN0 has met criteria set in PIN_CNF[0].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" line.long 0x4 "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" bitfld.long 0x4 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior" repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "PIN_CNF[$1],Description collection: Pin n configuration of GPIO pin" bitfld.long 0x0 28.--30. "CTRLSEL,Select which module has direct control over this pin" "0: GPIO or peripherals with PSEL registers,1: VPR processor,?,?,4: GRTC peripheral,?,?,?" bitfld.long 0x0 16.--17. "SENSE,Pin sensing mechanism" "0: Disabled,?,2: Sense for high level,3: Sense for low level" newline bitfld.long 0x0 10.--11. "DRIVE1,Drive configuration for '1'" "0: Standard '1',1: High drive '1',2: Disconnect '1'(normally used for wired-or..,3: Extra high drive '1'" bitfld.long 0x0 8.--9. "DRIVE0,Drive configuration for '0'" "0: Standard '0',1: High drive '0',2: Disconnect '0'(normally used for wired-or..,3: Extra high drive '0'" newline bitfld.long 0x0 2.--3. "PULL,Pull configuration" "0: No pull,1: Pull down on pin,?,3: Pull up on pin" bitfld.long 0x0 1. "INPUT,Connect or disconnect input buffer" "0: Connect input buffer,1: Disconnect input buffer" newline bitfld.long 0x0 0. "DIR,Pin direction. Same physical register as DIR register" "0: Configure pin as an input pin,1: Configure pin as an output pin" repeat.end tree.end tree "GLOBAL_P1_NS" base ad:0x400D8200 group.long 0x0++0xB line.long 0x0 "OUT,Write GPIO port" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin driver is low,1: Pin driver is high" line.long 0x4 "OUTSET,Set individual bits in GPIO port" bitfld.long 0x4 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." line.long 0x8 "OUTCLR,Clear individual bits in GPIO port" bitfld.long 0x8 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." rgroup.long 0xC++0x3 line.long 0x0 "IN,Read GPIO port" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin input is low,1: Pin input is high" group.long 0x10++0xB line.long 0x0 "DIR,Direction of GPIO pins" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin set as input,1: Pin set as output" line.long 0x4 "DIRSET,DIR set register" bitfld.long 0x4 31. "PIN31,Set as output pin 31" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 30. "PIN30,Set as output pin 30" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 29. "PIN29,Set as output pin 29" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 28. "PIN28,Set as output pin 28" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 27. "PIN27,Set as output pin 27" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 26. "PIN26,Set as output pin 26" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 25. "PIN25,Set as output pin 25" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 24. "PIN24,Set as output pin 24" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 23. "PIN23,Set as output pin 23" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 22. "PIN22,Set as output pin 22" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 21. "PIN21,Set as output pin 21" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 20. "PIN20,Set as output pin 20" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 19. "PIN19,Set as output pin 19" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 18. "PIN18,Set as output pin 18" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 17. "PIN17,Set as output pin 17" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 16. "PIN16,Set as output pin 16" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 15. "PIN15,Set as output pin 15" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 14. "PIN14,Set as output pin 14" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 13. "PIN13,Set as output pin 13" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 12. "PIN12,Set as output pin 12" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 11. "PIN11,Set as output pin 11" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 10. "PIN10,Set as output pin 10" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 9. "PIN9,Set as output pin 9" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 8. "PIN8,Set as output pin 8" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 7. "PIN7,Set as output pin 7" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 6. "PIN6,Set as output pin 6" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 5. "PIN5,Set as output pin 5" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 4. "PIN4,Set as output pin 4" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 3. "PIN3,Set as output pin 3" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 2. "PIN2,Set as output pin 2" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 1. "PIN1,Set as output pin 1" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 0. "PIN0,Set as output pin 0" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." line.long 0x8 "DIRCLR,DIR clear register" bitfld.long 0x8 31. "PIN31,Set as input pin 31" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 30. "PIN30,Set as input pin 30" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 29. "PIN29,Set as input pin 29" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 28. "PIN28,Set as input pin 28" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 27. "PIN27,Set as input pin 27" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 26. "PIN26,Set as input pin 26" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 25. "PIN25,Set as input pin 25" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 24. "PIN24,Set as input pin 24" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 23. "PIN23,Set as input pin 23" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 22. "PIN22,Set as input pin 22" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 21. "PIN21,Set as input pin 21" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 20. "PIN20,Set as input pin 20" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 19. "PIN19,Set as input pin 19" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 18. "PIN18,Set as input pin 18" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 17. "PIN17,Set as input pin 17" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 16. "PIN16,Set as input pin 16" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 15. "PIN15,Set as input pin 15" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 14. "PIN14,Set as input pin 14" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 13. "PIN13,Set as input pin 13" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 12. "PIN12,Set as input pin 12" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 11. "PIN11,Set as input pin 11" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 10. "PIN10,Set as input pin 10" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 9. "PIN9,Set as input pin 9" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 8. "PIN8,Set as input pin 8" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 7. "PIN7,Set as input pin 7" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 6. "PIN6,Set as input pin 6" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 5. "PIN5,Set as input pin 5" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 4. "PIN4,Set as input pin 4" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 3. "PIN3,Set as input pin 3" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 2. "PIN2,Set as input pin 2" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 1. "PIN1,Set as input pin 1" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 0. "PIN0,Set as input pin 0" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." group.long 0x20++0x7 line.long 0x0 "LATCH,Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers" bitfld.long 0x0 31. "PIN31,Status on whether PIN31 has met criteria set in PIN_CNF[31].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 30. "PIN30,Status on whether PIN30 has met criteria set in PIN_CNF[30].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 29. "PIN29,Status on whether PIN29 has met criteria set in PIN_CNF[29].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 28. "PIN28,Status on whether PIN28 has met criteria set in PIN_CNF[28].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 27. "PIN27,Status on whether PIN27 has met criteria set in PIN_CNF[27].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 26. "PIN26,Status on whether PIN26 has met criteria set in PIN_CNF[26].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 25. "PIN25,Status on whether PIN25 has met criteria set in PIN_CNF[25].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 24. "PIN24,Status on whether PIN24 has met criteria set in PIN_CNF[24].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 23. "PIN23,Status on whether PIN23 has met criteria set in PIN_CNF[23].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 22. "PIN22,Status on whether PIN22 has met criteria set in PIN_CNF[22].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 21. "PIN21,Status on whether PIN21 has met criteria set in PIN_CNF[21].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 20. "PIN20,Status on whether PIN20 has met criteria set in PIN_CNF[20].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 19. "PIN19,Status on whether PIN19 has met criteria set in PIN_CNF[19].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 18. "PIN18,Status on whether PIN18 has met criteria set in PIN_CNF[18].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 17. "PIN17,Status on whether PIN17 has met criteria set in PIN_CNF[17].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 16. "PIN16,Status on whether PIN16 has met criteria set in PIN_CNF[16].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 15. "PIN15,Status on whether PIN15 has met criteria set in PIN_CNF[15].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 14. "PIN14,Status on whether PIN14 has met criteria set in PIN_CNF[14].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 13. "PIN13,Status on whether PIN13 has met criteria set in PIN_CNF[13].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 12. "PIN12,Status on whether PIN12 has met criteria set in PIN_CNF[12].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 11. "PIN11,Status on whether PIN11 has met criteria set in PIN_CNF[11].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 10. "PIN10,Status on whether PIN10 has met criteria set in PIN_CNF[10].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 9. "PIN9,Status on whether PIN9 has met criteria set in PIN_CNF[9].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 8. "PIN8,Status on whether PIN8 has met criteria set in PIN_CNF[8].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 7. "PIN7,Status on whether PIN7 has met criteria set in PIN_CNF[7].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 6. "PIN6,Status on whether PIN6 has met criteria set in PIN_CNF[6].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 5. "PIN5,Status on whether PIN5 has met criteria set in PIN_CNF[5].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 4. "PIN4,Status on whether PIN4 has met criteria set in PIN_CNF[4].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 3. "PIN3,Status on whether PIN3 has met criteria set in PIN_CNF[3].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 2. "PIN2,Status on whether PIN2 has met criteria set in PIN_CNF[2].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 1. "PIN1,Status on whether PIN1 has met criteria set in PIN_CNF[1].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 0. "PIN0,Status on whether PIN0 has met criteria set in PIN_CNF[0].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" line.long 0x4 "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" bitfld.long 0x4 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior" repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "PIN_CNF[$1],Description collection: Pin n configuration of GPIO pin" bitfld.long 0x0 28.--30. "CTRLSEL,Select which module has direct control over this pin" "0: GPIO or peripherals with PSEL registers,1: VPR processor,?,?,4: GRTC peripheral,?,?,?" bitfld.long 0x0 16.--17. "SENSE,Pin sensing mechanism" "0: Disabled,?,2: Sense for high level,3: Sense for low level" newline bitfld.long 0x0 10.--11. "DRIVE1,Drive configuration for '1'" "0: Standard '1',1: High drive '1',2: Disconnect '1'(normally used for wired-or..,3: Extra high drive '1'" bitfld.long 0x0 8.--9. "DRIVE0,Drive configuration for '0'" "0: Standard '0',1: High drive '0',2: Disconnect '0'(normally used for wired-or..,3: Extra high drive '0'" newline bitfld.long 0x0 2.--3. "PULL,Pull configuration" "0: No pull,1: Pull down on pin,?,3: Pull up on pin" bitfld.long 0x0 1. "INPUT,Connect or disconnect input buffer" "0: Connect input buffer,1: Disconnect input buffer" newline bitfld.long 0x0 0. "DIR,Pin direction. Same physical register as DIR register" "0: Configure pin as an input pin,1: Configure pin as an output pin" repeat.end tree.end tree "GLOBAL_P1_S" base ad:0x500D8200 group.long 0x0++0xB line.long 0x0 "OUT,Write GPIO port" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin driver is low,1: Pin driver is high" line.long 0x4 "OUTSET,Set individual bits in GPIO port" bitfld.long 0x4 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." line.long 0x8 "OUTCLR,Clear individual bits in GPIO port" bitfld.long 0x8 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." rgroup.long 0xC++0x3 line.long 0x0 "IN,Read GPIO port" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin input is low,1: Pin input is high" group.long 0x10++0xB line.long 0x0 "DIR,Direction of GPIO pins" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin set as input,1: Pin set as output" line.long 0x4 "DIRSET,DIR set register" bitfld.long 0x4 31. "PIN31,Set as output pin 31" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 30. "PIN30,Set as output pin 30" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 29. "PIN29,Set as output pin 29" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 28. "PIN28,Set as output pin 28" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 27. "PIN27,Set as output pin 27" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 26. "PIN26,Set as output pin 26" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 25. "PIN25,Set as output pin 25" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 24. "PIN24,Set as output pin 24" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 23. "PIN23,Set as output pin 23" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 22. "PIN22,Set as output pin 22" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 21. "PIN21,Set as output pin 21" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 20. "PIN20,Set as output pin 20" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 19. "PIN19,Set as output pin 19" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 18. "PIN18,Set as output pin 18" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 17. "PIN17,Set as output pin 17" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 16. "PIN16,Set as output pin 16" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 15. "PIN15,Set as output pin 15" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 14. "PIN14,Set as output pin 14" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 13. "PIN13,Set as output pin 13" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 12. "PIN12,Set as output pin 12" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 11. "PIN11,Set as output pin 11" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 10. "PIN10,Set as output pin 10" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 9. "PIN9,Set as output pin 9" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 8. "PIN8,Set as output pin 8" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 7. "PIN7,Set as output pin 7" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 6. "PIN6,Set as output pin 6" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 5. "PIN5,Set as output pin 5" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 4. "PIN4,Set as output pin 4" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 3. "PIN3,Set as output pin 3" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 2. "PIN2,Set as output pin 2" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 1. "PIN1,Set as output pin 1" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 0. "PIN0,Set as output pin 0" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." line.long 0x8 "DIRCLR,DIR clear register" bitfld.long 0x8 31. "PIN31,Set as input pin 31" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 30. "PIN30,Set as input pin 30" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 29. "PIN29,Set as input pin 29" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 28. "PIN28,Set as input pin 28" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 27. "PIN27,Set as input pin 27" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 26. "PIN26,Set as input pin 26" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 25. "PIN25,Set as input pin 25" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 24. "PIN24,Set as input pin 24" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 23. "PIN23,Set as input pin 23" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 22. "PIN22,Set as input pin 22" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 21. "PIN21,Set as input pin 21" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 20. "PIN20,Set as input pin 20" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 19. "PIN19,Set as input pin 19" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 18. "PIN18,Set as input pin 18" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 17. "PIN17,Set as input pin 17" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 16. "PIN16,Set as input pin 16" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 15. "PIN15,Set as input pin 15" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 14. "PIN14,Set as input pin 14" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 13. "PIN13,Set as input pin 13" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 12. "PIN12,Set as input pin 12" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 11. "PIN11,Set as input pin 11" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 10. "PIN10,Set as input pin 10" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 9. "PIN9,Set as input pin 9" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 8. "PIN8,Set as input pin 8" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 7. "PIN7,Set as input pin 7" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 6. "PIN6,Set as input pin 6" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 5. "PIN5,Set as input pin 5" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 4. "PIN4,Set as input pin 4" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 3. "PIN3,Set as input pin 3" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 2. "PIN2,Set as input pin 2" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 1. "PIN1,Set as input pin 1" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 0. "PIN0,Set as input pin 0" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." group.long 0x20++0x7 line.long 0x0 "LATCH,Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers" bitfld.long 0x0 31. "PIN31,Status on whether PIN31 has met criteria set in PIN_CNF[31].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 30. "PIN30,Status on whether PIN30 has met criteria set in PIN_CNF[30].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 29. "PIN29,Status on whether PIN29 has met criteria set in PIN_CNF[29].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 28. "PIN28,Status on whether PIN28 has met criteria set in PIN_CNF[28].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 27. "PIN27,Status on whether PIN27 has met criteria set in PIN_CNF[27].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 26. "PIN26,Status on whether PIN26 has met criteria set in PIN_CNF[26].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 25. "PIN25,Status on whether PIN25 has met criteria set in PIN_CNF[25].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 24. "PIN24,Status on whether PIN24 has met criteria set in PIN_CNF[24].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 23. "PIN23,Status on whether PIN23 has met criteria set in PIN_CNF[23].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 22. "PIN22,Status on whether PIN22 has met criteria set in PIN_CNF[22].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 21. "PIN21,Status on whether PIN21 has met criteria set in PIN_CNF[21].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 20. "PIN20,Status on whether PIN20 has met criteria set in PIN_CNF[20].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 19. "PIN19,Status on whether PIN19 has met criteria set in PIN_CNF[19].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 18. "PIN18,Status on whether PIN18 has met criteria set in PIN_CNF[18].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 17. "PIN17,Status on whether PIN17 has met criteria set in PIN_CNF[17].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 16. "PIN16,Status on whether PIN16 has met criteria set in PIN_CNF[16].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 15. "PIN15,Status on whether PIN15 has met criteria set in PIN_CNF[15].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 14. "PIN14,Status on whether PIN14 has met criteria set in PIN_CNF[14].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 13. "PIN13,Status on whether PIN13 has met criteria set in PIN_CNF[13].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 12. "PIN12,Status on whether PIN12 has met criteria set in PIN_CNF[12].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 11. "PIN11,Status on whether PIN11 has met criteria set in PIN_CNF[11].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 10. "PIN10,Status on whether PIN10 has met criteria set in PIN_CNF[10].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 9. "PIN9,Status on whether PIN9 has met criteria set in PIN_CNF[9].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 8. "PIN8,Status on whether PIN8 has met criteria set in PIN_CNF[8].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 7. "PIN7,Status on whether PIN7 has met criteria set in PIN_CNF[7].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 6. "PIN6,Status on whether PIN6 has met criteria set in PIN_CNF[6].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 5. "PIN5,Status on whether PIN5 has met criteria set in PIN_CNF[5].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 4. "PIN4,Status on whether PIN4 has met criteria set in PIN_CNF[4].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 3. "PIN3,Status on whether PIN3 has met criteria set in PIN_CNF[3].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 2. "PIN2,Status on whether PIN2 has met criteria set in PIN_CNF[2].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 1. "PIN1,Status on whether PIN1 has met criteria set in PIN_CNF[1].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 0. "PIN0,Status on whether PIN0 has met criteria set in PIN_CNF[0].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" line.long 0x4 "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" bitfld.long 0x4 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior" repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "PIN_CNF[$1],Description collection: Pin n configuration of GPIO pin" bitfld.long 0x0 28.--30. "CTRLSEL,Select which module has direct control over this pin" "0: GPIO or peripherals with PSEL registers,1: VPR processor,?,?,4: GRTC peripheral,?,?,?" bitfld.long 0x0 16.--17. "SENSE,Pin sensing mechanism" "0: Disabled,?,2: Sense for high level,3: Sense for low level" newline bitfld.long 0x0 10.--11. "DRIVE1,Drive configuration for '1'" "0: Standard '1',1: High drive '1',2: Disconnect '1'(normally used for wired-or..,3: Extra high drive '1'" bitfld.long 0x0 8.--9. "DRIVE0,Drive configuration for '0'" "0: Standard '0',1: High drive '0',2: Disconnect '0'(normally used for wired-or..,3: Extra high drive '0'" newline bitfld.long 0x0 2.--3. "PULL,Pull configuration" "0: No pull,1: Pull down on pin,?,3: Pull up on pin" bitfld.long 0x0 1. "INPUT,Connect or disconnect input buffer" "0: Connect input buffer,1: Disconnect input buffer" newline bitfld.long 0x0 0. "DIR,Pin direction. Same physical register as DIR register" "0: Configure pin as an input pin,1: Configure pin as an output pin" repeat.end tree.end tree "GLOBAL_P2_NS" base ad:0x40050400 group.long 0x0++0xB line.long 0x0 "OUT,Write GPIO port" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin driver is low,1: Pin driver is high" line.long 0x4 "OUTSET,Set individual bits in GPIO port" bitfld.long 0x4 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." line.long 0x8 "OUTCLR,Clear individual bits in GPIO port" bitfld.long 0x8 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." rgroup.long 0xC++0x3 line.long 0x0 "IN,Read GPIO port" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin input is low,1: Pin input is high" group.long 0x10++0xB line.long 0x0 "DIR,Direction of GPIO pins" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin set as input,1: Pin set as output" line.long 0x4 "DIRSET,DIR set register" bitfld.long 0x4 31. "PIN31,Set as output pin 31" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 30. "PIN30,Set as output pin 30" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 29. "PIN29,Set as output pin 29" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 28. "PIN28,Set as output pin 28" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 27. "PIN27,Set as output pin 27" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 26. "PIN26,Set as output pin 26" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 25. "PIN25,Set as output pin 25" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 24. "PIN24,Set as output pin 24" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 23. "PIN23,Set as output pin 23" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 22. "PIN22,Set as output pin 22" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 21. "PIN21,Set as output pin 21" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 20. "PIN20,Set as output pin 20" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 19. "PIN19,Set as output pin 19" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 18. "PIN18,Set as output pin 18" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 17. "PIN17,Set as output pin 17" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 16. "PIN16,Set as output pin 16" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 15. "PIN15,Set as output pin 15" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 14. "PIN14,Set as output pin 14" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 13. "PIN13,Set as output pin 13" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 12. "PIN12,Set as output pin 12" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 11. "PIN11,Set as output pin 11" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 10. "PIN10,Set as output pin 10" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 9. "PIN9,Set as output pin 9" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 8. "PIN8,Set as output pin 8" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 7. "PIN7,Set as output pin 7" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 6. "PIN6,Set as output pin 6" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 5. "PIN5,Set as output pin 5" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 4. "PIN4,Set as output pin 4" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 3. "PIN3,Set as output pin 3" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 2. "PIN2,Set as output pin 2" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 1. "PIN1,Set as output pin 1" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 0. "PIN0,Set as output pin 0" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." line.long 0x8 "DIRCLR,DIR clear register" bitfld.long 0x8 31. "PIN31,Set as input pin 31" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 30. "PIN30,Set as input pin 30" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 29. "PIN29,Set as input pin 29" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 28. "PIN28,Set as input pin 28" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 27. "PIN27,Set as input pin 27" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 26. "PIN26,Set as input pin 26" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 25. "PIN25,Set as input pin 25" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 24. "PIN24,Set as input pin 24" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 23. "PIN23,Set as input pin 23" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 22. "PIN22,Set as input pin 22" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 21. "PIN21,Set as input pin 21" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 20. "PIN20,Set as input pin 20" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 19. "PIN19,Set as input pin 19" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 18. "PIN18,Set as input pin 18" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 17. "PIN17,Set as input pin 17" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 16. "PIN16,Set as input pin 16" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 15. "PIN15,Set as input pin 15" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 14. "PIN14,Set as input pin 14" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 13. "PIN13,Set as input pin 13" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 12. "PIN12,Set as input pin 12" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 11. "PIN11,Set as input pin 11" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 10. "PIN10,Set as input pin 10" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 9. "PIN9,Set as input pin 9" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 8. "PIN8,Set as input pin 8" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 7. "PIN7,Set as input pin 7" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 6. "PIN6,Set as input pin 6" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 5. "PIN5,Set as input pin 5" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 4. "PIN4,Set as input pin 4" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 3. "PIN3,Set as input pin 3" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 2. "PIN2,Set as input pin 2" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 1. "PIN1,Set as input pin 1" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 0. "PIN0,Set as input pin 0" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." group.long 0x20++0x7 line.long 0x0 "LATCH,Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers" bitfld.long 0x0 31. "PIN31,Status on whether PIN31 has met criteria set in PIN_CNF[31].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 30. "PIN30,Status on whether PIN30 has met criteria set in PIN_CNF[30].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 29. "PIN29,Status on whether PIN29 has met criteria set in PIN_CNF[29].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 28. "PIN28,Status on whether PIN28 has met criteria set in PIN_CNF[28].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 27. "PIN27,Status on whether PIN27 has met criteria set in PIN_CNF[27].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 26. "PIN26,Status on whether PIN26 has met criteria set in PIN_CNF[26].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 25. "PIN25,Status on whether PIN25 has met criteria set in PIN_CNF[25].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 24. "PIN24,Status on whether PIN24 has met criteria set in PIN_CNF[24].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 23. "PIN23,Status on whether PIN23 has met criteria set in PIN_CNF[23].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 22. "PIN22,Status on whether PIN22 has met criteria set in PIN_CNF[22].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 21. "PIN21,Status on whether PIN21 has met criteria set in PIN_CNF[21].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 20. "PIN20,Status on whether PIN20 has met criteria set in PIN_CNF[20].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 19. "PIN19,Status on whether PIN19 has met criteria set in PIN_CNF[19].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 18. "PIN18,Status on whether PIN18 has met criteria set in PIN_CNF[18].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 17. "PIN17,Status on whether PIN17 has met criteria set in PIN_CNF[17].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 16. "PIN16,Status on whether PIN16 has met criteria set in PIN_CNF[16].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 15. "PIN15,Status on whether PIN15 has met criteria set in PIN_CNF[15].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 14. "PIN14,Status on whether PIN14 has met criteria set in PIN_CNF[14].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 13. "PIN13,Status on whether PIN13 has met criteria set in PIN_CNF[13].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 12. "PIN12,Status on whether PIN12 has met criteria set in PIN_CNF[12].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 11. "PIN11,Status on whether PIN11 has met criteria set in PIN_CNF[11].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 10. "PIN10,Status on whether PIN10 has met criteria set in PIN_CNF[10].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 9. "PIN9,Status on whether PIN9 has met criteria set in PIN_CNF[9].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 8. "PIN8,Status on whether PIN8 has met criteria set in PIN_CNF[8].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 7. "PIN7,Status on whether PIN7 has met criteria set in PIN_CNF[7].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 6. "PIN6,Status on whether PIN6 has met criteria set in PIN_CNF[6].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 5. "PIN5,Status on whether PIN5 has met criteria set in PIN_CNF[5].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 4. "PIN4,Status on whether PIN4 has met criteria set in PIN_CNF[4].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 3. "PIN3,Status on whether PIN3 has met criteria set in PIN_CNF[3].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 2. "PIN2,Status on whether PIN2 has met criteria set in PIN_CNF[2].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 1. "PIN1,Status on whether PIN1 has met criteria set in PIN_CNF[1].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 0. "PIN0,Status on whether PIN0 has met criteria set in PIN_CNF[0].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" line.long 0x4 "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" bitfld.long 0x4 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior" repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "PIN_CNF[$1],Description collection: Pin n configuration of GPIO pin" bitfld.long 0x0 28.--30. "CTRLSEL,Select which module has direct control over this pin" "0: GPIO or peripherals with PSEL registers,1: VPR processor,?,?,4: GRTC peripheral,?,?,?" bitfld.long 0x0 16.--17. "SENSE,Pin sensing mechanism" "0: Disabled,?,2: Sense for high level,3: Sense for low level" newline bitfld.long 0x0 10.--11. "DRIVE1,Drive configuration for '1'" "0: Standard '1',1: High drive '1',2: Disconnect '1'(normally used for wired-or..,3: Extra high drive '1'" bitfld.long 0x0 8.--9. "DRIVE0,Drive configuration for '0'" "0: Standard '0',1: High drive '0',2: Disconnect '0'(normally used for wired-or..,3: Extra high drive '0'" newline bitfld.long 0x0 2.--3. "PULL,Pull configuration" "0: No pull,1: Pull down on pin,?,3: Pull up on pin" bitfld.long 0x0 1. "INPUT,Connect or disconnect input buffer" "0: Connect input buffer,1: Disconnect input buffer" newline bitfld.long 0x0 0. "DIR,Pin direction. Same physical register as DIR register" "0: Configure pin as an input pin,1: Configure pin as an output pin" repeat.end tree.end tree "GLOBAL_P2_S" base ad:0x50050400 group.long 0x0++0xB line.long 0x0 "OUT,Write GPIO port" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin driver is low,1: Pin driver is high" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin driver is low,1: Pin driver is high" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin driver is low,1: Pin driver is high" line.long 0x4 "OUTSET,Set individual bits in GPIO port" bitfld.long 0x4 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." newline bitfld.long 0x4 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." bitfld.long 0x4 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin high; writing.." line.long 0x8 "OUTCLR,Clear individual bits in GPIO port" bitfld.long 0x8 31. "PIN31,Pin 31" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 30. "PIN30,Pin 30" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 29. "PIN29,Pin 29" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 28. "PIN28,Pin 28" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 27. "PIN27,Pin 27" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 26. "PIN26,Pin 26" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 25. "PIN25,Pin 25" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 24. "PIN24,Pin 24" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 23. "PIN23,Pin 23" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 22. "PIN22,Pin 22" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 21. "PIN21,Pin 21" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 20. "PIN20,Pin 20" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 19. "PIN19,Pin 19" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 18. "PIN18,Pin 18" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 17. "PIN17,Pin 17" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 16. "PIN16,Pin 16" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 15. "PIN15,Pin 15" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 14. "PIN14,Pin 14" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 13. "PIN13,Pin 13" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 12. "PIN12,Pin 12" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 11. "PIN11,Pin 11" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 10. "PIN10,Pin 10" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 9. "PIN9,Pin 9" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 8. "PIN8,Pin 8" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 7. "PIN7,Pin 7" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 6. "PIN6,Pin 6" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 5. "PIN5,Pin 5" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 4. "PIN4,Pin 4" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 3. "PIN3,Pin 3" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 2. "PIN2,Pin 2" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." newline bitfld.long 0x8 1. "PIN1,Pin 1" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." bitfld.long 0x8 0. "PIN0,Pin 0" "0: Read: pin driver is low,1: Write: writing a '1' sets the pin low; writing a.." rgroup.long 0xC++0x3 line.long 0x0 "IN,Read GPIO port" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin input is low,1: Pin input is high" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin input is low,1: Pin input is high" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin input is low,1: Pin input is high" group.long 0x10++0xB line.long 0x0 "DIR,Direction of GPIO pins" bitfld.long 0x0 31. "PIN31,Pin 31" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 30. "PIN30,Pin 30" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 29. "PIN29,Pin 29" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 28. "PIN28,Pin 28" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 27. "PIN27,Pin 27" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 26. "PIN26,Pin 26" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 25. "PIN25,Pin 25" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 24. "PIN24,Pin 24" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 23. "PIN23,Pin 23" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 22. "PIN22,Pin 22" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 21. "PIN21,Pin 21" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 20. "PIN20,Pin 20" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 19. "PIN19,Pin 19" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 18. "PIN18,Pin 18" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 17. "PIN17,Pin 17" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 16. "PIN16,Pin 16" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 15. "PIN15,Pin 15" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 14. "PIN14,Pin 14" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 13. "PIN13,Pin 13" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 12. "PIN12,Pin 12" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 11. "PIN11,Pin 11" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 10. "PIN10,Pin 10" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 9. "PIN9,Pin 9" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 8. "PIN8,Pin 8" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 7. "PIN7,Pin 7" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 6. "PIN6,Pin 6" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 5. "PIN5,Pin 5" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 4. "PIN4,Pin 4" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 3. "PIN3,Pin 3" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 2. "PIN2,Pin 2" "0: Pin set as input,1: Pin set as output" newline bitfld.long 0x0 1. "PIN1,Pin 1" "0: Pin set as input,1: Pin set as output" bitfld.long 0x0 0. "PIN0,Pin 0" "0: Pin set as input,1: Pin set as output" line.long 0x4 "DIRSET,DIR set register" bitfld.long 0x4 31. "PIN31,Set as output pin 31" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 30. "PIN30,Set as output pin 30" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 29. "PIN29,Set as output pin 29" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 28. "PIN28,Set as output pin 28" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 27. "PIN27,Set as output pin 27" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 26. "PIN26,Set as output pin 26" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 25. "PIN25,Set as output pin 25" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 24. "PIN24,Set as output pin 24" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 23. "PIN23,Set as output pin 23" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 22. "PIN22,Set as output pin 22" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 21. "PIN21,Set as output pin 21" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 20. "PIN20,Set as output pin 20" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 19. "PIN19,Set as output pin 19" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 18. "PIN18,Set as output pin 18" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 17. "PIN17,Set as output pin 17" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 16. "PIN16,Set as output pin 16" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 15. "PIN15,Set as output pin 15" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 14. "PIN14,Set as output pin 14" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 13. "PIN13,Set as output pin 13" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 12. "PIN12,Set as output pin 12" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 11. "PIN11,Set as output pin 11" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 10. "PIN10,Set as output pin 10" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 9. "PIN9,Set as output pin 9" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 8. "PIN8,Set as output pin 8" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 7. "PIN7,Set as output pin 7" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 6. "PIN6,Set as output pin 6" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 5. "PIN5,Set as output pin 5" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 4. "PIN4,Set as output pin 4" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 3. "PIN3,Set as output pin 3" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 2. "PIN2,Set as output pin 2" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." newline bitfld.long 0x4 1. "PIN1,Set as output pin 1" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." bitfld.long 0x4 0. "PIN0,Set as output pin 0" "0: Read: pin set as input,1: Write: writing a '1' sets pin to output; writing.." line.long 0x8 "DIRCLR,DIR clear register" bitfld.long 0x8 31. "PIN31,Set as input pin 31" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 30. "PIN30,Set as input pin 30" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 29. "PIN29,Set as input pin 29" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 28. "PIN28,Set as input pin 28" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 27. "PIN27,Set as input pin 27" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 26. "PIN26,Set as input pin 26" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 25. "PIN25,Set as input pin 25" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 24. "PIN24,Set as input pin 24" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 23. "PIN23,Set as input pin 23" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 22. "PIN22,Set as input pin 22" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 21. "PIN21,Set as input pin 21" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 20. "PIN20,Set as input pin 20" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 19. "PIN19,Set as input pin 19" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 18. "PIN18,Set as input pin 18" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 17. "PIN17,Set as input pin 17" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 16. "PIN16,Set as input pin 16" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 15. "PIN15,Set as input pin 15" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 14. "PIN14,Set as input pin 14" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 13. "PIN13,Set as input pin 13" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 12. "PIN12,Set as input pin 12" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 11. "PIN11,Set as input pin 11" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 10. "PIN10,Set as input pin 10" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 9. "PIN9,Set as input pin 9" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 8. "PIN8,Set as input pin 8" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 7. "PIN7,Set as input pin 7" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 6. "PIN6,Set as input pin 6" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 5. "PIN5,Set as input pin 5" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 4. "PIN4,Set as input pin 4" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 3. "PIN3,Set as input pin 3" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 2. "PIN2,Set as input pin 2" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." newline bitfld.long 0x8 1. "PIN1,Set as input pin 1" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." bitfld.long 0x8 0. "PIN0,Set as input pin 0" "0: Read: pin set as input,1: Write: writing a '1' sets pin to input; writing.." group.long 0x20++0x7 line.long 0x0 "LATCH,Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers" bitfld.long 0x0 31. "PIN31,Status on whether PIN31 has met criteria set in PIN_CNF[31].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 30. "PIN30,Status on whether PIN30 has met criteria set in PIN_CNF[30].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 29. "PIN29,Status on whether PIN29 has met criteria set in PIN_CNF[29].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 28. "PIN28,Status on whether PIN28 has met criteria set in PIN_CNF[28].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 27. "PIN27,Status on whether PIN27 has met criteria set in PIN_CNF[27].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 26. "PIN26,Status on whether PIN26 has met criteria set in PIN_CNF[26].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 25. "PIN25,Status on whether PIN25 has met criteria set in PIN_CNF[25].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 24. "PIN24,Status on whether PIN24 has met criteria set in PIN_CNF[24].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 23. "PIN23,Status on whether PIN23 has met criteria set in PIN_CNF[23].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 22. "PIN22,Status on whether PIN22 has met criteria set in PIN_CNF[22].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 21. "PIN21,Status on whether PIN21 has met criteria set in PIN_CNF[21].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 20. "PIN20,Status on whether PIN20 has met criteria set in PIN_CNF[20].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 19. "PIN19,Status on whether PIN19 has met criteria set in PIN_CNF[19].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 18. "PIN18,Status on whether PIN18 has met criteria set in PIN_CNF[18].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 17. "PIN17,Status on whether PIN17 has met criteria set in PIN_CNF[17].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 16. "PIN16,Status on whether PIN16 has met criteria set in PIN_CNF[16].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 15. "PIN15,Status on whether PIN15 has met criteria set in PIN_CNF[15].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 14. "PIN14,Status on whether PIN14 has met criteria set in PIN_CNF[14].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 13. "PIN13,Status on whether PIN13 has met criteria set in PIN_CNF[13].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 12. "PIN12,Status on whether PIN12 has met criteria set in PIN_CNF[12].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 11. "PIN11,Status on whether PIN11 has met criteria set in PIN_CNF[11].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 10. "PIN10,Status on whether PIN10 has met criteria set in PIN_CNF[10].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 9. "PIN9,Status on whether PIN9 has met criteria set in PIN_CNF[9].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 8. "PIN8,Status on whether PIN8 has met criteria set in PIN_CNF[8].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 7. "PIN7,Status on whether PIN7 has met criteria set in PIN_CNF[7].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 6. "PIN6,Status on whether PIN6 has met criteria set in PIN_CNF[6].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 5. "PIN5,Status on whether PIN5 has met criteria set in PIN_CNF[5].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 4. "PIN4,Status on whether PIN4 has met criteria set in PIN_CNF[4].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 3. "PIN3,Status on whether PIN3 has met criteria set in PIN_CNF[3].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 2. "PIN2,Status on whether PIN2 has met criteria set in PIN_CNF[2].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" newline bitfld.long 0x0 1. "PIN1,Status on whether PIN1 has met criteria set in PIN_CNF[1].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" bitfld.long 0x0 0. "PIN0,Status on whether PIN0 has met criteria set in PIN_CNF[0].SENSE register. Write '1' to clear." "0: Criteria has not been met,1: Criteria has been met" line.long 0x4 "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" bitfld.long 0x4 0. "DETECTMODE,Select between default DETECT signal behavior and LDETECT mode" "0: DETECT directly connected to PIN DETECT signals,1: Use the latched LDETECT behavior" repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "PIN_CNF[$1],Description collection: Pin n configuration of GPIO pin" bitfld.long 0x0 28.--30. "CTRLSEL,Select which module has direct control over this pin" "0: GPIO or peripherals with PSEL registers,1: VPR processor,?,?,4: GRTC peripheral,?,?,?" bitfld.long 0x0 16.--17. "SENSE,Pin sensing mechanism" "0: Disabled,?,2: Sense for high level,3: Sense for low level" newline bitfld.long 0x0 10.--11. "DRIVE1,Drive configuration for '1'" "0: Standard '1',1: High drive '1',2: Disconnect '1'(normally used for wired-or..,3: Extra high drive '1'" bitfld.long 0x0 8.--9. "DRIVE0,Drive configuration for '0'" "0: Standard '0',1: High drive '0',2: Disconnect '0'(normally used for wired-or..,3: Extra high drive '0'" newline bitfld.long 0x0 2.--3. "PULL,Pull configuration" "0: No pull,1: Pull down on pin,?,3: Pull up on pin" bitfld.long 0x0 1. "INPUT,Connect or disconnect input buffer" "0: Connect input buffer,1: Disconnect input buffer" newline bitfld.long 0x0 0. "DIR,Pin direction. Same physical register as DIR register" "0: Configure pin as an input pin,1: Configure pin as an output pin" repeat.end tree.end tree.end tree "GPIOTE (GPIO Tasks and Events)" base ad:0x0 tree "GLOBAL_GPIOTE20_NS" base ad:0x400DA000 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_OUT[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY." bitfld.long 0x0 0. "TASKS_OUT,Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY." "?,1: Trigger task" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x30)++0x3 line.long 0x0 "TASKS_SET[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high." bitfld.long 0x0 0. "TASKS_SET,Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high." "?,1: Trigger task" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x60)++0x3 line.long 0x0 "TASKS_CLR[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low." bitfld.long 0x0 0. "TASKS_CLR,Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low." "?,1: Trigger task" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_OUT[$1],Description collection: Subscribe configuration for task OUT[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task OUT[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xB0)++0x3 line.long 0x0 "SUBSCRIBE_SET[$1],Description collection: Subscribe configuration for task SET[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SET[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xE0)++0x3 line.long 0x0 "SUBSCRIBE_CLR[$1],Description collection: Subscribe configuration for task CLR[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CLR[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_IN[$1],Description collection: Event from pin specified in CONFIG[n].PSEL" bitfld.long 0x0 0. "EVENTS_IN,Event from pin specified in CONFIG[n].PSEL" "0: Event not generated,1: Event generated" repeat.end tree "EVENTS_PORT[%s]" base ad:0x400DA140 group.long 0x0++0x7 line.long 0x0 "NONSECURE,Description cluster: Non-secure port event from owner n" bitfld.long 0x0 0. "NONSECURE,Non-secure port event from owner n" "0: Event not generated,1: Event generated" line.long 0x4 "SECURE,Description cluster: Secure port event from owner n" bitfld.long 0x4 0. "SECURE,Secure port event from owner n" "0: Event not generated,1: Event generated" tree.end newline repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_IN[$1],Description collection: Publish configuration for event IN[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event IN[n] will publish to" repeat.end tree "PUBLISH_PORT[%s]" base ad:0x400DA1C0 group.long 0x0++0x7 line.long 0x0 "NONSECURE,Description cluster: Publish configuration for event PORT[n].NONSECURE" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event PORT[n].NONSECURE will publish to" line.long 0x4 "SECURE,Description cluster: Publish configuration for event PORT[n].SECURE" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event PORT[n].SECURE will publish to" tree.end base ad:0x400DA000 newline group.long 0x304++0x7 newline line.long 0x0 "INTENSET0,Enable interrupt" bitfld.long 0x0 17. "PORT0SECURE,Write '1' to enable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Enable" bitfld.long 0x0 16. "PORT0NONSECURE,Write '1' to enable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 7. "IN7,Write '1' to enable interrupt for event IN[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 6. "IN6,Write '1' to enable interrupt for event IN[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 5. "IN5,Write '1' to enable interrupt for event IN[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 4. "IN4,Write '1' to enable interrupt for event IN[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 3. "IN3,Write '1' to enable interrupt for event IN[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 2. "IN2,Write '1' to enable interrupt for event IN[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "IN1,Write '1' to enable interrupt for event IN[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "IN0,Write '1' to enable interrupt for event IN[0]" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR0,Disable interrupt" bitfld.long 0x4 17. "PORT0SECURE,Write '1' to disable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Disable" bitfld.long 0x4 16. "PORT0NONSECURE,Write '1' to disable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 7. "IN7,Write '1' to disable interrupt for event IN[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 6. "IN6,Write '1' to disable interrupt for event IN[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 5. "IN5,Write '1' to disable interrupt for event IN[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 4. "IN4,Write '1' to disable interrupt for event IN[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 3. "IN3,Write '1' to disable interrupt for event IN[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 2. "IN2,Write '1' to disable interrupt for event IN[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "IN1,Write '1' to disable interrupt for event IN[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "IN0,Write '1' to disable interrupt for event IN[0]" "0: Read: Disabled,1: Disable" group.long 0x314++0x7 line.long 0x0 "INTENSET1,Enable interrupt" bitfld.long 0x0 17. "PORT0SECURE,Write '1' to enable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Enable" bitfld.long 0x0 16. "PORT0NONSECURE,Write '1' to enable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 7. "IN7,Write '1' to enable interrupt for event IN[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 6. "IN6,Write '1' to enable interrupt for event IN[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 5. "IN5,Write '1' to enable interrupt for event IN[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 4. "IN4,Write '1' to enable interrupt for event IN[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 3. "IN3,Write '1' to enable interrupt for event IN[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 2. "IN2,Write '1' to enable interrupt for event IN[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "IN1,Write '1' to enable interrupt for event IN[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "IN0,Write '1' to enable interrupt for event IN[0]" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR1,Disable interrupt" bitfld.long 0x4 17. "PORT0SECURE,Write '1' to disable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Disable" bitfld.long 0x4 16. "PORT0NONSECURE,Write '1' to disable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 7. "IN7,Write '1' to disable interrupt for event IN[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 6. "IN6,Write '1' to disable interrupt for event IN[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 5. "IN5,Write '1' to disable interrupt for event IN[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 4. "IN4,Write '1' to disable interrupt for event IN[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 3. "IN3,Write '1' to disable interrupt for event IN[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 2. "IN2,Write '1' to disable interrupt for event IN[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "IN1,Write '1' to disable interrupt for event IN[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "IN0,Write '1' to disable interrupt for event IN[0]" "0: Read: Disabled,1: Disable" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x510)++0x3 line.long 0x0 "CONFIG[$1],Description collection: Configuration for OUT[n]. SET[n]. and CLR[n] tasks and IN[n] event" bitfld.long 0x0 20. "OUTINIT,When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect." "0: Task mode: Initial value of pin before task..,1: Task mode: Initial value of pin before task.." bitfld.long 0x0 16.--17. "POLARITY,When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event." "0: Task mode: No effect on pin from OUT[n] task.,1: Task mode: Set pin from OUT[n] task. Event mode:..,2: Task mode: Clear pin from OUT[n] task. Event..,3: Task mode: Toggle pin from OUT[n]. Event mode:.." newline hexmask.long.byte 0x0 9.--12. 1. "PORT,Port number" hexmask.long.byte 0x0 4.--8. 1. "PSEL,GPIO number associated with SET[n] CLR[n] and OUT[n] tasks and IN[n] event" newline bitfld.long 0x0 0.--1. "MODE,Mode" "0: Disabled. Pin specified by PSEL will not be..,1: Event mode,?,3: Task mode" repeat.end tree.end tree "GLOBAL_GPIOTE20_S" base ad:0x500DA000 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_OUT[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY." bitfld.long 0x0 0. "TASKS_OUT,Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY." "?,1: Trigger task" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x30)++0x3 line.long 0x0 "TASKS_SET[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high." bitfld.long 0x0 0. "TASKS_SET,Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high." "?,1: Trigger task" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x60)++0x3 line.long 0x0 "TASKS_CLR[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low." bitfld.long 0x0 0. "TASKS_CLR,Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low." "?,1: Trigger task" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_OUT[$1],Description collection: Subscribe configuration for task OUT[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task OUT[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xB0)++0x3 line.long 0x0 "SUBSCRIBE_SET[$1],Description collection: Subscribe configuration for task SET[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SET[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xE0)++0x3 line.long 0x0 "SUBSCRIBE_CLR[$1],Description collection: Subscribe configuration for task CLR[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CLR[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_IN[$1],Description collection: Event from pin specified in CONFIG[n].PSEL" bitfld.long 0x0 0. "EVENTS_IN,Event from pin specified in CONFIG[n].PSEL" "0: Event not generated,1: Event generated" repeat.end tree "EVENTS_PORT[%s]" base ad:0x500DA000 group.long 0x0++0x7 line.long 0x0 "NONSECURE,Description cluster: Non-secure port event from owner n" bitfld.long 0x0 0. "NONSECURE,Non-secure port event from owner n" "0: Event not generated,1: Event generated" line.long 0x4 "SECURE,Description cluster: Secure port event from owner n" bitfld.long 0x4 0. "SECURE,Secure port event from owner n" "0: Event not generated,1: Event generated" tree.end newline repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_IN[$1],Description collection: Publish configuration for event IN[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event IN[n] will publish to" repeat.end tree "PUBLISH_PORT[%s]" base ad:0x500DA000 group.long 0x0++0x7 line.long 0x0 "NONSECURE,Description cluster: Publish configuration for event PORT[n].NONSECURE" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event PORT[n].NONSECURE will publish to" line.long 0x4 "SECURE,Description cluster: Publish configuration for event PORT[n].SECURE" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event PORT[n].SECURE will publish to" tree.end base ad:0x500DA000 newline group.long 0x304++0x7 newline line.long 0x0 "INTENSET0,Enable interrupt" bitfld.long 0x0 17. "PORT0SECURE,Write '1' to enable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Enable" bitfld.long 0x0 16. "PORT0NONSECURE,Write '1' to enable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 7. "IN7,Write '1' to enable interrupt for event IN[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 6. "IN6,Write '1' to enable interrupt for event IN[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 5. "IN5,Write '1' to enable interrupt for event IN[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 4. "IN4,Write '1' to enable interrupt for event IN[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 3. "IN3,Write '1' to enable interrupt for event IN[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 2. "IN2,Write '1' to enable interrupt for event IN[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "IN1,Write '1' to enable interrupt for event IN[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "IN0,Write '1' to enable interrupt for event IN[0]" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR0,Disable interrupt" bitfld.long 0x4 17. "PORT0SECURE,Write '1' to disable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Disable" bitfld.long 0x4 16. "PORT0NONSECURE,Write '1' to disable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 7. "IN7,Write '1' to disable interrupt for event IN[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 6. "IN6,Write '1' to disable interrupt for event IN[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 5. "IN5,Write '1' to disable interrupt for event IN[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 4. "IN4,Write '1' to disable interrupt for event IN[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 3. "IN3,Write '1' to disable interrupt for event IN[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 2. "IN2,Write '1' to disable interrupt for event IN[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "IN1,Write '1' to disable interrupt for event IN[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "IN0,Write '1' to disable interrupt for event IN[0]" "0: Read: Disabled,1: Disable" group.long 0x314++0x7 line.long 0x0 "INTENSET1,Enable interrupt" bitfld.long 0x0 17. "PORT0SECURE,Write '1' to enable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Enable" bitfld.long 0x0 16. "PORT0NONSECURE,Write '1' to enable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 7. "IN7,Write '1' to enable interrupt for event IN[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 6. "IN6,Write '1' to enable interrupt for event IN[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 5. "IN5,Write '1' to enable interrupt for event IN[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 4. "IN4,Write '1' to enable interrupt for event IN[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 3. "IN3,Write '1' to enable interrupt for event IN[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 2. "IN2,Write '1' to enable interrupt for event IN[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "IN1,Write '1' to enable interrupt for event IN[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "IN0,Write '1' to enable interrupt for event IN[0]" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR1,Disable interrupt" bitfld.long 0x4 17. "PORT0SECURE,Write '1' to disable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Disable" bitfld.long 0x4 16. "PORT0NONSECURE,Write '1' to disable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 7. "IN7,Write '1' to disable interrupt for event IN[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 6. "IN6,Write '1' to disable interrupt for event IN[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 5. "IN5,Write '1' to disable interrupt for event IN[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 4. "IN4,Write '1' to disable interrupt for event IN[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 3. "IN3,Write '1' to disable interrupt for event IN[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 2. "IN2,Write '1' to disable interrupt for event IN[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "IN1,Write '1' to disable interrupt for event IN[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "IN0,Write '1' to disable interrupt for event IN[0]" "0: Read: Disabled,1: Disable" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x510)++0x3 line.long 0x0 "CONFIG[$1],Description collection: Configuration for OUT[n]. SET[n]. and CLR[n] tasks and IN[n] event" bitfld.long 0x0 20. "OUTINIT,When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect." "0: Task mode: Initial value of pin before task..,1: Task mode: Initial value of pin before task.." bitfld.long 0x0 16.--17. "POLARITY,When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event." "0: Task mode: No effect on pin from OUT[n] task.,1: Task mode: Set pin from OUT[n] task. Event mode:..,2: Task mode: Clear pin from OUT[n] task. Event..,3: Task mode: Toggle pin from OUT[n]. Event mode:.." newline hexmask.long.byte 0x0 9.--12. 1. "PORT,Port number" hexmask.long.byte 0x0 4.--8. 1. "PSEL,GPIO number associated with SET[n] CLR[n] and OUT[n] tasks and IN[n] event" newline bitfld.long 0x0 0.--1. "MODE,Mode" "0: Disabled. Pin specified by PSEL will not be..,1: Event mode,?,3: Task mode" repeat.end tree.end tree "GLOBAL_GPIOTE30_NS" base ad:0x4010C000 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_OUT[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY." bitfld.long 0x0 0. "TASKS_OUT,Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY." "?,1: Trigger task" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x30)++0x3 line.long 0x0 "TASKS_SET[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high." bitfld.long 0x0 0. "TASKS_SET,Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high." "?,1: Trigger task" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x60)++0x3 line.long 0x0 "TASKS_CLR[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low." bitfld.long 0x0 0. "TASKS_CLR,Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low." "?,1: Trigger task" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_OUT[$1],Description collection: Subscribe configuration for task OUT[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task OUT[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xB0)++0x3 line.long 0x0 "SUBSCRIBE_SET[$1],Description collection: Subscribe configuration for task SET[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SET[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xE0)++0x3 line.long 0x0 "SUBSCRIBE_CLR[$1],Description collection: Subscribe configuration for task CLR[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CLR[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_IN[$1],Description collection: Event from pin specified in CONFIG[n].PSEL" bitfld.long 0x0 0. "EVENTS_IN,Event from pin specified in CONFIG[n].PSEL" "0: Event not generated,1: Event generated" repeat.end tree "EVENTS_PORT[%s]" base ad:0x4010C000 group.long 0x0++0x7 line.long 0x0 "NONSECURE,Description cluster: Non-secure port event from owner n" bitfld.long 0x0 0. "NONSECURE,Non-secure port event from owner n" "0: Event not generated,1: Event generated" line.long 0x4 "SECURE,Description cluster: Secure port event from owner n" bitfld.long 0x4 0. "SECURE,Secure port event from owner n" "0: Event not generated,1: Event generated" tree.end newline repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_IN[$1],Description collection: Publish configuration for event IN[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event IN[n] will publish to" repeat.end tree "PUBLISH_PORT[%s]" base ad:0x4010C000 group.long 0x0++0x7 line.long 0x0 "NONSECURE,Description cluster: Publish configuration for event PORT[n].NONSECURE" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event PORT[n].NONSECURE will publish to" line.long 0x4 "SECURE,Description cluster: Publish configuration for event PORT[n].SECURE" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event PORT[n].SECURE will publish to" tree.end base ad:0x4010C000 newline group.long 0x304++0x7 newline line.long 0x0 "INTENSET0,Enable interrupt" bitfld.long 0x0 17. "PORT0SECURE,Write '1' to enable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Enable" bitfld.long 0x0 16. "PORT0NONSECURE,Write '1' to enable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 7. "IN7,Write '1' to enable interrupt for event IN[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 6. "IN6,Write '1' to enable interrupt for event IN[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 5. "IN5,Write '1' to enable interrupt for event IN[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 4. "IN4,Write '1' to enable interrupt for event IN[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 3. "IN3,Write '1' to enable interrupt for event IN[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 2. "IN2,Write '1' to enable interrupt for event IN[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "IN1,Write '1' to enable interrupt for event IN[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "IN0,Write '1' to enable interrupt for event IN[0]" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR0,Disable interrupt" bitfld.long 0x4 17. "PORT0SECURE,Write '1' to disable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Disable" bitfld.long 0x4 16. "PORT0NONSECURE,Write '1' to disable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 7. "IN7,Write '1' to disable interrupt for event IN[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 6. "IN6,Write '1' to disable interrupt for event IN[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 5. "IN5,Write '1' to disable interrupt for event IN[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 4. "IN4,Write '1' to disable interrupt for event IN[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 3. "IN3,Write '1' to disable interrupt for event IN[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 2. "IN2,Write '1' to disable interrupt for event IN[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "IN1,Write '1' to disable interrupt for event IN[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "IN0,Write '1' to disable interrupt for event IN[0]" "0: Read: Disabled,1: Disable" group.long 0x314++0x7 line.long 0x0 "INTENSET1,Enable interrupt" bitfld.long 0x0 17. "PORT0SECURE,Write '1' to enable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Enable" bitfld.long 0x0 16. "PORT0NONSECURE,Write '1' to enable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 7. "IN7,Write '1' to enable interrupt for event IN[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 6. "IN6,Write '1' to enable interrupt for event IN[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 5. "IN5,Write '1' to enable interrupt for event IN[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 4. "IN4,Write '1' to enable interrupt for event IN[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 3. "IN3,Write '1' to enable interrupt for event IN[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 2. "IN2,Write '1' to enable interrupt for event IN[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "IN1,Write '1' to enable interrupt for event IN[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "IN0,Write '1' to enable interrupt for event IN[0]" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR1,Disable interrupt" bitfld.long 0x4 17. "PORT0SECURE,Write '1' to disable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Disable" bitfld.long 0x4 16. "PORT0NONSECURE,Write '1' to disable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 7. "IN7,Write '1' to disable interrupt for event IN[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 6. "IN6,Write '1' to disable interrupt for event IN[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 5. "IN5,Write '1' to disable interrupt for event IN[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 4. "IN4,Write '1' to disable interrupt for event IN[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 3. "IN3,Write '1' to disable interrupt for event IN[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 2. "IN2,Write '1' to disable interrupt for event IN[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "IN1,Write '1' to disable interrupt for event IN[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "IN0,Write '1' to disable interrupt for event IN[0]" "0: Read: Disabled,1: Disable" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x510)++0x3 line.long 0x0 "CONFIG[$1],Description collection: Configuration for OUT[n]. SET[n]. and CLR[n] tasks and IN[n] event" bitfld.long 0x0 20. "OUTINIT,When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect." "0: Task mode: Initial value of pin before task..,1: Task mode: Initial value of pin before task.." bitfld.long 0x0 16.--17. "POLARITY,When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event." "0: Task mode: No effect on pin from OUT[n] task.,1: Task mode: Set pin from OUT[n] task. Event mode:..,2: Task mode: Clear pin from OUT[n] task. Event..,3: Task mode: Toggle pin from OUT[n]. Event mode:.." newline hexmask.long.byte 0x0 9.--12. 1. "PORT,Port number" hexmask.long.byte 0x0 4.--8. 1. "PSEL,GPIO number associated with SET[n] CLR[n] and OUT[n] tasks and IN[n] event" newline bitfld.long 0x0 0.--1. "MODE,Mode" "0: Disabled. Pin specified by PSEL will not be..,1: Event mode,?,3: Task mode" repeat.end tree.end tree "GLOBAL_GPIOTE30_S" base ad:0x5010C000 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_OUT[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY." bitfld.long 0x0 0. "TASKS_OUT,Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY." "?,1: Trigger task" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x30)++0x3 line.long 0x0 "TASKS_SET[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high." bitfld.long 0x0 0. "TASKS_SET,Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high." "?,1: Trigger task" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x60)++0x3 line.long 0x0 "TASKS_CLR[$1],Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low." bitfld.long 0x0 0. "TASKS_CLR,Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low." "?,1: Trigger task" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_OUT[$1],Description collection: Subscribe configuration for task OUT[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task OUT[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xB0)++0x3 line.long 0x0 "SUBSCRIBE_SET[$1],Description collection: Subscribe configuration for task SET[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SET[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xE0)++0x3 line.long 0x0 "SUBSCRIBE_CLR[$1],Description collection: Subscribe configuration for task CLR[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CLR[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_IN[$1],Description collection: Event from pin specified in CONFIG[n].PSEL" bitfld.long 0x0 0. "EVENTS_IN,Event from pin specified in CONFIG[n].PSEL" "0: Event not generated,1: Event generated" repeat.end tree "EVENTS_PORT[%s]" base ad:0x5010C000 group.long 0x0++0x7 line.long 0x0 "NONSECURE,Description cluster: Non-secure port event from owner n" bitfld.long 0x0 0. "NONSECURE,Non-secure port event from owner n" "0: Event not generated,1: Event generated" line.long 0x4 "SECURE,Description cluster: Secure port event from owner n" bitfld.long 0x4 0. "SECURE,Secure port event from owner n" "0: Event not generated,1: Event generated" tree.end newline repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_IN[$1],Description collection: Publish configuration for event IN[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event IN[n] will publish to" repeat.end tree "PUBLISH_PORT[%s]" base ad:0x5010C000 group.long 0x0++0x7 line.long 0x0 "NONSECURE,Description cluster: Publish configuration for event PORT[n].NONSECURE" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event PORT[n].NONSECURE will publish to" line.long 0x4 "SECURE,Description cluster: Publish configuration for event PORT[n].SECURE" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event PORT[n].SECURE will publish to" tree.end base ad:0x5010C000 newline group.long 0x304++0x7 newline line.long 0x0 "INTENSET0,Enable interrupt" bitfld.long 0x0 17. "PORT0SECURE,Write '1' to enable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Enable" bitfld.long 0x0 16. "PORT0NONSECURE,Write '1' to enable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 7. "IN7,Write '1' to enable interrupt for event IN[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 6. "IN6,Write '1' to enable interrupt for event IN[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 5. "IN5,Write '1' to enable interrupt for event IN[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 4. "IN4,Write '1' to enable interrupt for event IN[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 3. "IN3,Write '1' to enable interrupt for event IN[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 2. "IN2,Write '1' to enable interrupt for event IN[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "IN1,Write '1' to enable interrupt for event IN[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "IN0,Write '1' to enable interrupt for event IN[0]" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR0,Disable interrupt" bitfld.long 0x4 17. "PORT0SECURE,Write '1' to disable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Disable" bitfld.long 0x4 16. "PORT0NONSECURE,Write '1' to disable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 7. "IN7,Write '1' to disable interrupt for event IN[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 6. "IN6,Write '1' to disable interrupt for event IN[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 5. "IN5,Write '1' to disable interrupt for event IN[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 4. "IN4,Write '1' to disable interrupt for event IN[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 3. "IN3,Write '1' to disable interrupt for event IN[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 2. "IN2,Write '1' to disable interrupt for event IN[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "IN1,Write '1' to disable interrupt for event IN[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "IN0,Write '1' to disable interrupt for event IN[0]" "0: Read: Disabled,1: Disable" group.long 0x314++0x7 line.long 0x0 "INTENSET1,Enable interrupt" bitfld.long 0x0 17. "PORT0SECURE,Write '1' to enable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Enable" bitfld.long 0x0 16. "PORT0NONSECURE,Write '1' to enable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 7. "IN7,Write '1' to enable interrupt for event IN[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 6. "IN6,Write '1' to enable interrupt for event IN[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 5. "IN5,Write '1' to enable interrupt for event IN[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 4. "IN4,Write '1' to enable interrupt for event IN[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 3. "IN3,Write '1' to enable interrupt for event IN[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 2. "IN2,Write '1' to enable interrupt for event IN[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "IN1,Write '1' to enable interrupt for event IN[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "IN0,Write '1' to enable interrupt for event IN[0]" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR1,Disable interrupt" bitfld.long 0x4 17. "PORT0SECURE,Write '1' to disable interrupt for event PORT0SECURE" "0: Read: Disabled,1: Disable" bitfld.long 0x4 16. "PORT0NONSECURE,Write '1' to disable interrupt for event PORT0NONSECURE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 7. "IN7,Write '1' to disable interrupt for event IN[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 6. "IN6,Write '1' to disable interrupt for event IN[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 5. "IN5,Write '1' to disable interrupt for event IN[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 4. "IN4,Write '1' to disable interrupt for event IN[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 3. "IN3,Write '1' to disable interrupt for event IN[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 2. "IN2,Write '1' to disable interrupt for event IN[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "IN1,Write '1' to disable interrupt for event IN[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "IN0,Write '1' to disable interrupt for event IN[0]" "0: Read: Disabled,1: Disable" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x510)++0x3 line.long 0x0 "CONFIG[$1],Description collection: Configuration for OUT[n]. SET[n]. and CLR[n] tasks and IN[n] event" bitfld.long 0x0 20. "OUTINIT,When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect." "0: Task mode: Initial value of pin before task..,1: Task mode: Initial value of pin before task.." bitfld.long 0x0 16.--17. "POLARITY,When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event." "0: Task mode: No effect on pin from OUT[n] task.,1: Task mode: Set pin from OUT[n] task. Event mode:..,2: Task mode: Clear pin from OUT[n] task. Event..,3: Task mode: Toggle pin from OUT[n]. Event mode:.." newline hexmask.long.byte 0x0 9.--12. 1. "PORT,Port number" hexmask.long.byte 0x0 4.--8. 1. "PSEL,GPIO number associated with SET[n] CLR[n] and OUT[n] tasks and IN[n] event" newline bitfld.long 0x0 0.--1. "MODE,Mode" "0: Disabled. Pin specified by PSEL will not be..,1: Event mode,?,3: Task mode" repeat.end tree.end tree.end tree "GRTC (Global Real-time Counter)" base ad:0x0 tree "GLOBAL_GRTC_NS" base ad:0x400E2000 repeat 12. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture the counter value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture the counter value to CC[n] register" "?,1: Trigger task" repeat.end wgroup.long 0x60++0x13 line.long 0x0 "TASKS_START,Start the counter" bitfld.long 0x0 0. "TASKS_START,Start the counter" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop the counter" bitfld.long 0x4 0. "TASKS_STOP,Stop the counter" "?,1: Trigger task" line.long 0x8 "TASKS_CLEAR,Clear the counter" bitfld.long 0x8 0. "TASKS_CLEAR,Clear the counter" "?,1: Trigger task" line.long 0xC "TASKS_PWMSTART,Start the PWM" bitfld.long 0xC 0. "TASKS_PWMSTART,Start the PWM" "?,1: Trigger task" line.long 0x10 "TASKS_PWMSTOP,Stop the PWM" bitfld.long 0x10 0. "TASKS_PWMSTOP,Stop the PWM" "?,1: Trigger task" repeat 12. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 12. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end group.long 0x164++0x3 line.long 0x0 "EVENTS_RTCOMPARESYNC,The GRTC low frequency timer is synchronized with the SYSCOUNTER" bitfld.long 0x0 0. "EVENTS_RTCOMPARESYNC,The GRTC low frequency timer is synchronized with the SYSCOUNTER" "0: Event not generated,1: Event generated" group.long 0x16C++0x3 line.long 0x0 "EVENTS_PWMPERIODEND,Event on end of each PWM period" bitfld.long 0x0 0. "EVENTS_PWMPERIODEND,Event on end of each PWM period" "0: Event not generated,1: Event generated" repeat 12. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 0. "RTCOMPARE_CLEAR,Shortcut between event RTCOMPARE and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN0,Enable or disable interrupt" bitfld.long 0x0 27. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Enable or disable interrupt for event RTCOMPARESYNC" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "COMPARE11,Enable or disable interrupt for event COMPARE[11]" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "COMPARE10,Enable or disable interrupt for event COMPARE[10]" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "COMPARE9,Enable or disable interrupt for event COMPARE[9]" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "COMPARE8,Enable or disable interrupt for event COMPARE[8]" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET0,Enable interrupt" bitfld.long 0x4 27. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "RTCOMPARESYNC,Write '1' to enable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "COMPARE11,Write '1' to enable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "COMPARE10,Write '1' to enable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "COMPARE9,Write '1' to enable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "COMPARE8,Write '1' to enable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR0,Disable interrupt" bitfld.long 0x8 27. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "RTCOMPARESYNC,Write '1' to disable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "COMPARE11,Write '1' to disable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "COMPARE10,Write '1' to disable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "COMPARE9,Write '1' to disable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "COMPARE8,Write '1' to disable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND0,Pending interrupts" bitfld.long 0x0 27. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Read pending status of interrupt for event RTCOMPARESYNC" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "COMPARE11,Read pending status of interrupt for event COMPARE[11]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "COMPARE10,Read pending status of interrupt for event COMPARE[10]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "COMPARE9,Read pending status of interrupt for event COMPARE[9]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "COMPARE8,Read pending status of interrupt for event COMPARE[8]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "COMPARE7,Read pending status of interrupt for event COMPARE[7]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "COMPARE6,Read pending status of interrupt for event COMPARE[6]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "COMPARE5,Read pending status of interrupt for event COMPARE[5]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "COMPARE4,Read pending status of interrupt for event COMPARE[4]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "COMPARE3,Read pending status of interrupt for event COMPARE[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "COMPARE2,Read pending status of interrupt for event COMPARE[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "COMPARE1,Read pending status of interrupt for event COMPARE[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "COMPARE0,Read pending status of interrupt for event COMPARE[0]" "0: Read: Not pending,1: Read: Pending" group.long 0x310++0xB line.long 0x0 "INTEN1,Enable or disable interrupt" bitfld.long 0x0 27. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Enable or disable interrupt for event RTCOMPARESYNC" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "COMPARE11,Enable or disable interrupt for event COMPARE[11]" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "COMPARE10,Enable or disable interrupt for event COMPARE[10]" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "COMPARE9,Enable or disable interrupt for event COMPARE[9]" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "COMPARE8,Enable or disable interrupt for event COMPARE[8]" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET1,Enable interrupt" bitfld.long 0x4 27. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "RTCOMPARESYNC,Write '1' to enable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "COMPARE11,Write '1' to enable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "COMPARE10,Write '1' to enable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "COMPARE9,Write '1' to enable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "COMPARE8,Write '1' to enable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR1,Disable interrupt" bitfld.long 0x8 27. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "RTCOMPARESYNC,Write '1' to disable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "COMPARE11,Write '1' to disable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "COMPARE10,Write '1' to disable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "COMPARE9,Write '1' to disable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "COMPARE8,Write '1' to disable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" rgroup.long 0x31C++0x3 line.long 0x0 "INTPEND1,Pending interrupts" bitfld.long 0x0 27. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Read pending status of interrupt for event RTCOMPARESYNC" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "COMPARE11,Read pending status of interrupt for event COMPARE[11]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "COMPARE10,Read pending status of interrupt for event COMPARE[10]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "COMPARE9,Read pending status of interrupt for event COMPARE[9]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "COMPARE8,Read pending status of interrupt for event COMPARE[8]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "COMPARE7,Read pending status of interrupt for event COMPARE[7]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "COMPARE6,Read pending status of interrupt for event COMPARE[6]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "COMPARE5,Read pending status of interrupt for event COMPARE[5]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "COMPARE4,Read pending status of interrupt for event COMPARE[4]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "COMPARE3,Read pending status of interrupt for event COMPARE[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "COMPARE2,Read pending status of interrupt for event COMPARE[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "COMPARE1,Read pending status of interrupt for event COMPARE[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "COMPARE0,Read pending status of interrupt for event COMPARE[0]" "0: Read: Not pending,1: Read: Pending" group.long 0x320++0xB line.long 0x0 "INTEN2,Enable or disable interrupt" bitfld.long 0x0 27. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Enable or disable interrupt for event RTCOMPARESYNC" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "COMPARE11,Enable or disable interrupt for event COMPARE[11]" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "COMPARE10,Enable or disable interrupt for event COMPARE[10]" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "COMPARE9,Enable or disable interrupt for event COMPARE[9]" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "COMPARE8,Enable or disable interrupt for event COMPARE[8]" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET2,Enable interrupt" bitfld.long 0x4 27. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "RTCOMPARESYNC,Write '1' to enable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "COMPARE11,Write '1' to enable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "COMPARE10,Write '1' to enable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "COMPARE9,Write '1' to enable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "COMPARE8,Write '1' to enable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR2,Disable interrupt" bitfld.long 0x8 27. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "RTCOMPARESYNC,Write '1' to disable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "COMPARE11,Write '1' to disable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "COMPARE10,Write '1' to disable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "COMPARE9,Write '1' to disable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "COMPARE8,Write '1' to disable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" rgroup.long 0x32C++0x3 line.long 0x0 "INTPEND2,Pending interrupts" bitfld.long 0x0 27. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Read pending status of interrupt for event RTCOMPARESYNC" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "COMPARE11,Read pending status of interrupt for event COMPARE[11]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "COMPARE10,Read pending status of interrupt for event COMPARE[10]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "COMPARE9,Read pending status of interrupt for event COMPARE[9]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "COMPARE8,Read pending status of interrupt for event COMPARE[8]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "COMPARE7,Read pending status of interrupt for event COMPARE[7]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "COMPARE6,Read pending status of interrupt for event COMPARE[6]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "COMPARE5,Read pending status of interrupt for event COMPARE[5]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "COMPARE4,Read pending status of interrupt for event COMPARE[4]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "COMPARE3,Read pending status of interrupt for event COMPARE[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "COMPARE2,Read pending status of interrupt for event COMPARE[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "COMPARE1,Read pending status of interrupt for event COMPARE[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "COMPARE0,Read pending status of interrupt for event COMPARE[0]" "0: Read: Not pending,1: Read: Pending" group.long 0x330++0xB line.long 0x0 "INTEN3,Enable or disable interrupt" bitfld.long 0x0 27. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Enable or disable interrupt for event RTCOMPARESYNC" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "COMPARE11,Enable or disable interrupt for event COMPARE[11]" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "COMPARE10,Enable or disable interrupt for event COMPARE[10]" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "COMPARE9,Enable or disable interrupt for event COMPARE[9]" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "COMPARE8,Enable or disable interrupt for event COMPARE[8]" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET3,Enable interrupt" bitfld.long 0x4 27. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "RTCOMPARESYNC,Write '1' to enable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "COMPARE11,Write '1' to enable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "COMPARE10,Write '1' to enable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "COMPARE9,Write '1' to enable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "COMPARE8,Write '1' to enable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR3,Disable interrupt" bitfld.long 0x8 27. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "RTCOMPARESYNC,Write '1' to disable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "COMPARE11,Write '1' to disable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "COMPARE10,Write '1' to disable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "COMPARE9,Write '1' to disable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "COMPARE8,Write '1' to disable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" rgroup.long 0x33C++0x3 line.long 0x0 "INTPEND3,Pending interrupts" bitfld.long 0x0 27. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Read pending status of interrupt for event RTCOMPARESYNC" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "COMPARE11,Read pending status of interrupt for event COMPARE[11]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "COMPARE10,Read pending status of interrupt for event COMPARE[10]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "COMPARE9,Read pending status of interrupt for event COMPARE[9]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "COMPARE8,Read pending status of interrupt for event COMPARE[8]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "COMPARE7,Read pending status of interrupt for event COMPARE[7]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "COMPARE6,Read pending status of interrupt for event COMPARE[6]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "COMPARE5,Read pending status of interrupt for event COMPARE[5]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "COMPARE4,Read pending status of interrupt for event COMPARE[4]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "COMPARE3,Read pending status of interrupt for event COMPARE[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "COMPARE2,Read pending status of interrupt for event COMPARE[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "COMPARE1,Read pending status of interrupt for event COMPARE[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "COMPARE0,Read pending status of interrupt for event COMPARE[0]" "0: Read: Not pending,1: Read: Pending" group.long 0x400++0xB line.long 0x0 "EVTEN,Enable or disable event routing" bitfld.long 0x0 27. "PWMPERIODEND,Enable or disable event routing for event PWMPERIODEND" "0: Disable,1: Enable" line.long 0x4 "EVTENSET,Enable event routing" bitfld.long 0x4 27. "PWMPERIODEND,Write '1' to enable event routing for event PWMPERIODEND" "0: Read: Disabled,1: Enable" line.long 0x8 "EVTENCLR,Disable event routing" bitfld.long 0x8 27. "PWMPERIODEND,Write '1' to disable event routing for event PWMPERIODEND" "0: Read: Disabled,1: Disable" group.long 0x510++0x3 line.long 0x0 "MODE,Counter mode selection" bitfld.long 0x0 1. "SYSCOUNTEREN,Enable the SYSCOUNTER" "0: SYSCOUNTER disabled,1: SYSCOUNTER enabled" newline bitfld.long 0x0 0. "AUTOEN,Automatic enable to keep the SYSCOUNTER active." "0: Default configuration to keep the SYSCOUNTER..,1: In addition to the above mode any local CPU that.." repeat 12. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB)(list ad:0x400E2520 ad:0x400E2530 ad:0x400E2540 ad:0x400E2550 ad:0x400E2560 ad:0x400E2570 ad:0x400E2580 ad:0x400E2590 ad:0x400E25A0 ad:0x400E25B0 ad:0x400E25C0 ad:0x400E25D0) tree "CC[$1]" base $2 group.long ($2)++0xF line.long 0x0 "CCL,Description cluster: The lower 32-bits of Capture/Compare register CC[n]" hexmask.long 0x0 0.--31. 1. "CCL,Capture/Compare low value in 1 us" line.long 0x4 "CCH,Description cluster: The higher 32-bits of Capture/Compare register CC[n]" hexmask.long.tbyte 0x4 0.--19. 1. "CCH,Capture/Compare high value in 1 us" line.long 0x8 "CCADD,Description cluster: Count to add to CC[n] when this register is written." bitfld.long 0x8 31. "REFERENCE,Configure the Capture/Compare register" "0: Adds SYSCOUNTER value.,1: Adds CC value." hexmask.long 0x8 0.--30. 1. "VALUE,Count to add to CC[n]" line.long 0xC "CCEN,Description cluster: Configure Capture/Compare register CC[n]" bitfld.long 0xC 0. "ACTIVE,Configure the Capture/Compare register" "0: Capture/Compare register CC[n] Disabled.,1: Capture/Compare register CC[n] enabled." tree.end repeat.end base ad:0x400E2000 newline group.long 0x6A4++0xB line.long 0x0 "TIMEOUT,Timeout after all CPUs gone into sleep state to stop the SYSCOUNTER" hexmask.long.word 0x0 0.--15. 1. "VALUE,Number of 32Ki cycles" line.long 0x4 "INTERVAL,Count to add to CC[0] when the event EVENTS_COMPARE[0] triggers." hexmask.long.word 0x4 0.--15. 1. "VALUE,Count to add to CC[0]" line.long 0x8 "WAKETIME,GRTC wake up time." hexmask.long.byte 0x8 0.--7. 1. "VALUE,Number of LFCLK clock cycles to wake up before the next scheduled EVENTS_COMPARE event" group.long 0x710++0xB line.long 0x0 "PWMCONFIG,PWM configuration." hexmask.long.byte 0x0 0.--7. 1. "COMPAREVALUE,The PWM compare value" line.long 0x4 "CLKOUT,Configuration of clock output" bitfld.long 0x4 1. "CLKOUTFAST,Enable fast clock output on pin" "0: Disabled,1: Enabled" newline bitfld.long 0x4 0. "CLKOUT32K,Enable 32Ki clock output on pin" "0: Disabled,1: Enabled" line.long 0x8 "CLKCFG,Clock Configuration" bitfld.long 0x8 16.--17. "CLKSEL,GRTC LFCLK clock source selection" "0: GRTC LFCLK clock source is LFXO,1: GRTC LFCLK clock source is system LFCLK,2: GRTC LFCLK clock source is LFLPRC,?" newline hexmask.long.byte 0x8 0.--7. 1. "CLKFASTDIV,Fast clock divisor value of clock output" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x400E2720 ad:0x400E2730 ad:0x400E2740 ad:0x400E2750) tree "SYSCOUNTER[$1]" base $2 rgroup.long ($2)++0x7 line.long 0x0 "SYSCOUNTERL,Description cluster: The lower 32-bits of the SYSCOUNTER for index [n]" hexmask.long 0x0 0.--31. 1. "VALUE,The lower 32-bits of the SYSCOUNTER value." line.long 0x4 "SYSCOUNTERH,Description cluster: The higher 20-bits of the SYSCOUNTER for index [n]" bitfld.long 0x4 31. "OVERFLOW,The SYSCOUNTERL overflow indication after reading it." "0: SYSCOUNTERL is not overflown,1: SYSCOUNTERL overflown" bitfld.long 0x4 30. "BUSY,SYSCOUNTER busy status" "0: SYSCOUNTER is ready for read,1: SYSCOUNTER is busy so not ready for read (value.." hexmask.long.tbyte 0x4 0.--19. 1. "VALUE,The higher 20-bits of the SYSCOUNTER value." group.long ($2+0x8)++0x3 line.long 0x0 "ACTIVE,Description cluster: Request to keep the SYSCOUNTER in the active state and prevent going to sleep for index [n]" bitfld.long 0x0 0. "ACTIVE,Keep SYSCOUNTER in active state" "0: Allow SYSCOUNTER to go to sleep,1: Keep SYSCOUNTER active" tree.end repeat.end tree.end tree "GLOBAL_GRTC_S" base ad:0x500E2000 repeat 12. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture the counter value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture the counter value to CC[n] register" "?,1: Trigger task" repeat.end wgroup.long 0x60++0x13 line.long 0x0 "TASKS_START,Start the counter" bitfld.long 0x0 0. "TASKS_START,Start the counter" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop the counter" bitfld.long 0x4 0. "TASKS_STOP,Stop the counter" "?,1: Trigger task" line.long 0x8 "TASKS_CLEAR,Clear the counter" bitfld.long 0x8 0. "TASKS_CLEAR,Clear the counter" "?,1: Trigger task" line.long 0xC "TASKS_PWMSTART,Start the PWM" bitfld.long 0xC 0. "TASKS_PWMSTART,Start the PWM" "?,1: Trigger task" line.long 0x10 "TASKS_PWMSTOP,Stop the PWM" bitfld.long 0x10 0. "TASKS_PWMSTOP,Stop the PWM" "?,1: Trigger task" repeat 12. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 12. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end group.long 0x164++0x3 line.long 0x0 "EVENTS_RTCOMPARESYNC,The GRTC low frequency timer is synchronized with the SYSCOUNTER" bitfld.long 0x0 0. "EVENTS_RTCOMPARESYNC,The GRTC low frequency timer is synchronized with the SYSCOUNTER" "0: Event not generated,1: Event generated" group.long 0x16C++0x3 line.long 0x0 "EVENTS_PWMPERIODEND,Event on end of each PWM period" bitfld.long 0x0 0. "EVENTS_PWMPERIODEND,Event on end of each PWM period" "0: Event not generated,1: Event generated" repeat 12. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 0. "RTCOMPARE_CLEAR,Shortcut between event RTCOMPARE and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN0,Enable or disable interrupt" bitfld.long 0x0 27. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Enable or disable interrupt for event RTCOMPARESYNC" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "COMPARE11,Enable or disable interrupt for event COMPARE[11]" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "COMPARE10,Enable or disable interrupt for event COMPARE[10]" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "COMPARE9,Enable or disable interrupt for event COMPARE[9]" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "COMPARE8,Enable or disable interrupt for event COMPARE[8]" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET0,Enable interrupt" bitfld.long 0x4 27. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "RTCOMPARESYNC,Write '1' to enable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "COMPARE11,Write '1' to enable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "COMPARE10,Write '1' to enable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "COMPARE9,Write '1' to enable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "COMPARE8,Write '1' to enable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR0,Disable interrupt" bitfld.long 0x8 27. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "RTCOMPARESYNC,Write '1' to disable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "COMPARE11,Write '1' to disable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "COMPARE10,Write '1' to disable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "COMPARE9,Write '1' to disable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "COMPARE8,Write '1' to disable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND0,Pending interrupts" bitfld.long 0x0 27. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Read pending status of interrupt for event RTCOMPARESYNC" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "COMPARE11,Read pending status of interrupt for event COMPARE[11]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "COMPARE10,Read pending status of interrupt for event COMPARE[10]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "COMPARE9,Read pending status of interrupt for event COMPARE[9]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "COMPARE8,Read pending status of interrupt for event COMPARE[8]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "COMPARE7,Read pending status of interrupt for event COMPARE[7]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "COMPARE6,Read pending status of interrupt for event COMPARE[6]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "COMPARE5,Read pending status of interrupt for event COMPARE[5]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "COMPARE4,Read pending status of interrupt for event COMPARE[4]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "COMPARE3,Read pending status of interrupt for event COMPARE[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "COMPARE2,Read pending status of interrupt for event COMPARE[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "COMPARE1,Read pending status of interrupt for event COMPARE[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "COMPARE0,Read pending status of interrupt for event COMPARE[0]" "0: Read: Not pending,1: Read: Pending" group.long 0x310++0xB line.long 0x0 "INTEN1,Enable or disable interrupt" bitfld.long 0x0 27. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Enable or disable interrupt for event RTCOMPARESYNC" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "COMPARE11,Enable or disable interrupt for event COMPARE[11]" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "COMPARE10,Enable or disable interrupt for event COMPARE[10]" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "COMPARE9,Enable or disable interrupt for event COMPARE[9]" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "COMPARE8,Enable or disable interrupt for event COMPARE[8]" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET1,Enable interrupt" bitfld.long 0x4 27. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "RTCOMPARESYNC,Write '1' to enable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "COMPARE11,Write '1' to enable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "COMPARE10,Write '1' to enable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "COMPARE9,Write '1' to enable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "COMPARE8,Write '1' to enable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR1,Disable interrupt" bitfld.long 0x8 27. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "RTCOMPARESYNC,Write '1' to disable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "COMPARE11,Write '1' to disable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "COMPARE10,Write '1' to disable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "COMPARE9,Write '1' to disable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "COMPARE8,Write '1' to disable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" rgroup.long 0x31C++0x3 line.long 0x0 "INTPEND1,Pending interrupts" bitfld.long 0x0 27. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Read pending status of interrupt for event RTCOMPARESYNC" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "COMPARE11,Read pending status of interrupt for event COMPARE[11]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "COMPARE10,Read pending status of interrupt for event COMPARE[10]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "COMPARE9,Read pending status of interrupt for event COMPARE[9]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "COMPARE8,Read pending status of interrupt for event COMPARE[8]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "COMPARE7,Read pending status of interrupt for event COMPARE[7]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "COMPARE6,Read pending status of interrupt for event COMPARE[6]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "COMPARE5,Read pending status of interrupt for event COMPARE[5]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "COMPARE4,Read pending status of interrupt for event COMPARE[4]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "COMPARE3,Read pending status of interrupt for event COMPARE[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "COMPARE2,Read pending status of interrupt for event COMPARE[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "COMPARE1,Read pending status of interrupt for event COMPARE[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "COMPARE0,Read pending status of interrupt for event COMPARE[0]" "0: Read: Not pending,1: Read: Pending" group.long 0x320++0xB line.long 0x0 "INTEN2,Enable or disable interrupt" bitfld.long 0x0 27. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Enable or disable interrupt for event RTCOMPARESYNC" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "COMPARE11,Enable or disable interrupt for event COMPARE[11]" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "COMPARE10,Enable or disable interrupt for event COMPARE[10]" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "COMPARE9,Enable or disable interrupt for event COMPARE[9]" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "COMPARE8,Enable or disable interrupt for event COMPARE[8]" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET2,Enable interrupt" bitfld.long 0x4 27. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "RTCOMPARESYNC,Write '1' to enable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "COMPARE11,Write '1' to enable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "COMPARE10,Write '1' to enable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "COMPARE9,Write '1' to enable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "COMPARE8,Write '1' to enable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR2,Disable interrupt" bitfld.long 0x8 27. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "RTCOMPARESYNC,Write '1' to disable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "COMPARE11,Write '1' to disable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "COMPARE10,Write '1' to disable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "COMPARE9,Write '1' to disable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "COMPARE8,Write '1' to disable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" rgroup.long 0x32C++0x3 line.long 0x0 "INTPEND2,Pending interrupts" bitfld.long 0x0 27. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Read pending status of interrupt for event RTCOMPARESYNC" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "COMPARE11,Read pending status of interrupt for event COMPARE[11]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "COMPARE10,Read pending status of interrupt for event COMPARE[10]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "COMPARE9,Read pending status of interrupt for event COMPARE[9]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "COMPARE8,Read pending status of interrupt for event COMPARE[8]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "COMPARE7,Read pending status of interrupt for event COMPARE[7]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "COMPARE6,Read pending status of interrupt for event COMPARE[6]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "COMPARE5,Read pending status of interrupt for event COMPARE[5]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "COMPARE4,Read pending status of interrupt for event COMPARE[4]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "COMPARE3,Read pending status of interrupt for event COMPARE[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "COMPARE2,Read pending status of interrupt for event COMPARE[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "COMPARE1,Read pending status of interrupt for event COMPARE[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "COMPARE0,Read pending status of interrupt for event COMPARE[0]" "0: Read: Not pending,1: Read: Pending" group.long 0x330++0xB line.long 0x0 "INTEN3,Enable or disable interrupt" bitfld.long 0x0 27. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Enable or disable interrupt for event RTCOMPARESYNC" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "COMPARE11,Enable or disable interrupt for event COMPARE[11]" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "COMPARE10,Enable or disable interrupt for event COMPARE[10]" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "COMPARE9,Enable or disable interrupt for event COMPARE[9]" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "COMPARE8,Enable or disable interrupt for event COMPARE[8]" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET3,Enable interrupt" bitfld.long 0x4 27. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "RTCOMPARESYNC,Write '1' to enable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "COMPARE11,Write '1' to enable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "COMPARE10,Write '1' to enable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "COMPARE9,Write '1' to enable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "COMPARE8,Write '1' to enable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR3,Disable interrupt" bitfld.long 0x8 27. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "RTCOMPARESYNC,Write '1' to disable interrupt for event RTCOMPARESYNC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "COMPARE11,Write '1' to disable interrupt for event COMPARE[11]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "COMPARE10,Write '1' to disable interrupt for event COMPARE[10]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "COMPARE9,Write '1' to disable interrupt for event COMPARE[9]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "COMPARE8,Write '1' to disable interrupt for event COMPARE[8]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" rgroup.long 0x33C++0x3 line.long 0x0 "INTPEND3,Pending interrupts" bitfld.long 0x0 27. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 25. "RTCOMPARESYNC,Read pending status of interrupt for event RTCOMPARESYNC" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "COMPARE11,Read pending status of interrupt for event COMPARE[11]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "COMPARE10,Read pending status of interrupt for event COMPARE[10]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "COMPARE9,Read pending status of interrupt for event COMPARE[9]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "COMPARE8,Read pending status of interrupt for event COMPARE[8]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "COMPARE7,Read pending status of interrupt for event COMPARE[7]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "COMPARE6,Read pending status of interrupt for event COMPARE[6]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "COMPARE5,Read pending status of interrupt for event COMPARE[5]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "COMPARE4,Read pending status of interrupt for event COMPARE[4]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "COMPARE3,Read pending status of interrupt for event COMPARE[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "COMPARE2,Read pending status of interrupt for event COMPARE[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "COMPARE1,Read pending status of interrupt for event COMPARE[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "COMPARE0,Read pending status of interrupt for event COMPARE[0]" "0: Read: Not pending,1: Read: Pending" group.long 0x400++0xB line.long 0x0 "EVTEN,Enable or disable event routing" bitfld.long 0x0 27. "PWMPERIODEND,Enable or disable event routing for event PWMPERIODEND" "0: Disable,1: Enable" line.long 0x4 "EVTENSET,Enable event routing" bitfld.long 0x4 27. "PWMPERIODEND,Write '1' to enable event routing for event PWMPERIODEND" "0: Read: Disabled,1: Enable" line.long 0x8 "EVTENCLR,Disable event routing" bitfld.long 0x8 27. "PWMPERIODEND,Write '1' to disable event routing for event PWMPERIODEND" "0: Read: Disabled,1: Disable" group.long 0x510++0x3 line.long 0x0 "MODE,Counter mode selection" bitfld.long 0x0 1. "SYSCOUNTEREN,Enable the SYSCOUNTER" "0: SYSCOUNTER disabled,1: SYSCOUNTER enabled" newline bitfld.long 0x0 0. "AUTOEN,Automatic enable to keep the SYSCOUNTER active." "0: Default configuration to keep the SYSCOUNTER..,1: In addition to the above mode any local CPU that.." repeat 12. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB)(list ad:0x500E2520 ad:0x500E2530 ad:0x500E2540 ad:0x500E2550 ad:0x500E2560 ad:0x500E2570 ad:0x500E2580 ad:0x500E2590 ad:0x500E25A0 ad:0x500E25B0 ad:0x500E25C0 ad:0x500E25D0) tree "CC[$1]" base $2 group.long ($2)++0xF line.long 0x0 "CCL,Description cluster: The lower 32-bits of Capture/Compare register CC[n]" hexmask.long 0x0 0.--31. 1. "CCL,Capture/Compare low value in 1 us" line.long 0x4 "CCH,Description cluster: The higher 32-bits of Capture/Compare register CC[n]" hexmask.long.tbyte 0x4 0.--19. 1. "CCH,Capture/Compare high value in 1 us" line.long 0x8 "CCADD,Description cluster: Count to add to CC[n] when this register is written." bitfld.long 0x8 31. "REFERENCE,Configure the Capture/Compare register" "0: Adds SYSCOUNTER value.,1: Adds CC value." hexmask.long 0x8 0.--30. 1. "VALUE,Count to add to CC[n]" line.long 0xC "CCEN,Description cluster: Configure Capture/Compare register CC[n]" bitfld.long 0xC 0. "ACTIVE,Configure the Capture/Compare register" "0: Capture/Compare register CC[n] Disabled.,1: Capture/Compare register CC[n] enabled." tree.end repeat.end base ad:0x500E2000 newline group.long 0x6A4++0xB line.long 0x0 "TIMEOUT,Timeout after all CPUs gone into sleep state to stop the SYSCOUNTER" hexmask.long.word 0x0 0.--15. 1. "VALUE,Number of 32Ki cycles" line.long 0x4 "INTERVAL,Count to add to CC[0] when the event EVENTS_COMPARE[0] triggers." hexmask.long.word 0x4 0.--15. 1. "VALUE,Count to add to CC[0]" line.long 0x8 "WAKETIME,GRTC wake up time." hexmask.long.byte 0x8 0.--7. 1. "VALUE,Number of LFCLK clock cycles to wake up before the next scheduled EVENTS_COMPARE event" group.long 0x710++0xB line.long 0x0 "PWMCONFIG,PWM configuration." hexmask.long.byte 0x0 0.--7. 1. "COMPAREVALUE,The PWM compare value" line.long 0x4 "CLKOUT,Configuration of clock output" bitfld.long 0x4 1. "CLKOUTFAST,Enable fast clock output on pin" "0: Disabled,1: Enabled" newline bitfld.long 0x4 0. "CLKOUT32K,Enable 32Ki clock output on pin" "0: Disabled,1: Enabled" line.long 0x8 "CLKCFG,Clock Configuration" bitfld.long 0x8 16.--17. "CLKSEL,GRTC LFCLK clock source selection" "0: GRTC LFCLK clock source is LFXO,1: GRTC LFCLK clock source is system LFCLK,2: GRTC LFCLK clock source is LFLPRC,?" newline hexmask.long.byte 0x8 0.--7. 1. "CLKFASTDIV,Fast clock divisor value of clock output" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x500E2720 ad:0x500E2730 ad:0x500E2740 ad:0x500E2750) tree "SYSCOUNTER[$1]" base $2 rgroup.long ($2)++0x7 line.long 0x0 "SYSCOUNTERL,Description cluster: The lower 32-bits of the SYSCOUNTER for index [n]" hexmask.long 0x0 0.--31. 1. "VALUE,The lower 32-bits of the SYSCOUNTER value." line.long 0x4 "SYSCOUNTERH,Description cluster: The higher 20-bits of the SYSCOUNTER for index [n]" bitfld.long 0x4 31. "OVERFLOW,The SYSCOUNTERL overflow indication after reading it." "0: SYSCOUNTERL is not overflown,1: SYSCOUNTERL overflown" bitfld.long 0x4 30. "BUSY,SYSCOUNTER busy status" "0: SYSCOUNTER is ready for read,1: SYSCOUNTER is busy so not ready for read (value.." hexmask.long.tbyte 0x4 0.--19. 1. "VALUE,The higher 20-bits of the SYSCOUNTER value." group.long ($2+0x8)++0x3 line.long 0x0 "ACTIVE,Description cluster: Request to keep the SYSCOUNTER in the active state and prevent going to sleep for index [n]" bitfld.long 0x0 0. "ACTIVE,Keep SYSCOUNTER in active state" "0: Allow SYSCOUNTER to go to sleep,1: Keep SYSCOUNTER active" tree.end repeat.end tree.end tree.end tree "I2S (Inter-IC Sound)" base ad:0x0 tree "GLOBAL_I2S20_NS" base ad:0x400DD000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Starts continuous I2S transfer. Also starts MCK generator when this is enabled" bitfld.long 0x0 0. "TASKS_START,Starts continuous I2S transfer. Also starts MCK generator when this is enabled" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stops I2S transfer and MCK generator. Triggering this task will cause the event STOPPED to be generated." bitfld.long 0x4 0. "TASKS_STOP,Stops I2S transfer and MCK generator. Triggering this task will cause the event STOPPED to be generated." "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x104++0x7 line.long 0x0 "EVENTS_RXPTRUPD,The RXD.PTR register has been copied to internal double-buffers." bitfld.long 0x0 0. "EVENTS_RXPTRUPD,The RXD.PTR register has been copied to internal double-buffers." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,I2S transfer stopped." bitfld.long 0x4 0. "EVENTS_STOPPED,I2S transfer stopped." "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_TXPTRUPD,The TDX.PTR register has been copied to internal double-buffers." bitfld.long 0x0 0. "EVENTS_TXPTRUPD,The TDX.PTR register has been copied to internal double-buffers." "0: Event not generated,1: Event generated" group.long 0x11C++0x3 line.long 0x0 "EVENTS_FRAMESTART,Frame start event. generated on the active edge of LRCK" bitfld.long 0x0 0. "EVENTS_FRAMESTART,Frame start event generated on the active edge of LRCK" "0: Event not generated,1: Event generated" group.long 0x184++0x7 line.long 0x0 "PUBLISH_RXPTRUPD,Publish configuration for event RXPTRUPD" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXPTRUPD will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_TXPTRUPD,Publish configuration for event TXPTRUPD" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXPTRUPD will publish to" group.long 0x19C++0x3 line.long 0x0 "PUBLISH_FRAMESTART,Publish configuration for event FRAMESTART" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event FRAMESTART will publish to" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 7. "FRAMESTART,Enable or disable interrupt for event FRAMESTART" "0: Disable,1: Enable" bitfld.long 0x0 5. "TXPTRUPD,Enable or disable interrupt for event TXPTRUPD" "0: Disable,1: Enable" bitfld.long 0x0 2. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "RXPTRUPD,Enable or disable interrupt for event RXPTRUPD" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 7. "FRAMESTART,Write '1' to enable interrupt for event FRAMESTART" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "TXPTRUPD,Write '1' to enable interrupt for event TXPTRUPD" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "RXPTRUPD,Write '1' to enable interrupt for event RXPTRUPD" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 7. "FRAMESTART,Write '1' to disable interrupt for event FRAMESTART" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "TXPTRUPD,Write '1' to disable interrupt for event TXPTRUPD" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "RXPTRUPD,Write '1' to disable interrupt for event RXPTRUPD" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable I2S module" bitfld.long 0x0 0. "ENABLE,Enable I2S module" "0: Disable,1: Enable" tree "CONFIG" base ad:0x400DD504 group.long 0x0++0x27 line.long 0x0 "MODE,I2S mode" bitfld.long 0x0 0. "MODE,I2S mode" "0: Master mode. SCK and LRCK generated from..,1: Slave mode. SCK and LRCK generated by external.." line.long 0x4 "RXEN,Reception (RX) enable" bitfld.long 0x4 0. "RXEN,Reception (RX) enable" "0: Reception disabled and now data will be written..,1: Reception enabled." line.long 0x8 "TXEN,Transmission (TX) enable" bitfld.long 0x8 0. "TXEN,Transmission (TX) enable" "0: Transmission disabled and now data will be read..,1: Transmission enabled." line.long 0xC "MCKEN,Master clock generator enable" bitfld.long 0xC 0. "MCKEN,Master clock generator enable" "0: Master clock generator disabled and PSEL.MCK not..,1: Master clock generator running and MCK output on.." line.long 0x10 "MCKFREQ,I2S clock generator control" hexmask.long 0x10 0.--31. 1. "MCKFREQ,I2S MCK frequency configuration NOTE: Enumerations are deprecated use MCKFREQ equation. NOTE: The 12 least significant bits of the register are ignored and shall be set to zero." line.long 0x14 "RATIO,MCK / LRCK ratio" hexmask.long.byte 0x14 0.--3. 1. "RATIO,MCK / LRCK ratio" line.long 0x18 "SWIDTH,Sample width" bitfld.long 0x18 0.--2. "SWIDTH,Sample and half-frame width" "0: 8 bit sample.,1: 16 bit sample.,2: 24 bit sample.,3: 32 bit sample.,4: 8 bit sample in a 16-bit half-frame.,5: 8 bit sample in a 32-bit half-frame.,6: 16 bit sample in a 32-bit half-frame.,7: 24 bit sample in a 32-bit half-frame." line.long 0x1C "ALIGN,Alignment of sample within a frame" bitfld.long 0x1C 0. "ALIGN,Alignment of sample within a frame" "0: Left-aligned.,1: Right-aligned." line.long 0x20 "FORMAT,Frame format" bitfld.long 0x20 0. "FORMAT,Frame format" "0: Original I2S format.,1: Alternate (left- or right-aligned) format." line.long 0x24 "CHANNELS,Enable channels" bitfld.long 0x24 0.--1. "CHANNELS,Enable channels" "0: Stereo.,1: Left only.,2: Right only.,?" tree.end tree "PSEL" base ad:0x400DD560 group.long 0x0++0x13 line.long 0x0 "MCK,Pin select for MCK signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SCK,Pin select for SCK signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "LRCK,Pin select for LRCK signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "SDIN,Pin select for SDIN signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" line.long 0x10 "SDOUT,Pin select for SDOUT signal" bitfld.long 0x10 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x10 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 0.--4. 1. "PIN,Pin number" tree.end tree "RXD" base ad:0x400DD538 group.long 0x0++0x3 line.long 0x0 "PTR,Receive buffer RAM start address." hexmask.long 0x0 0.--31. 1. "PTR,Receive buffer Data RAM start address. When receiving words containing samples will be written to this address. This address is a word aligned Data RAM address." tree.end tree "RXTXD" base ad:0x400DD550 group.long 0x0++0x3 line.long 0x0 "MAXCNT,Size of RXD and TXD buffers" hexmask.long.word 0x0 0.--13. 1. "MAXCNT,Size of RXD and TXD buffers in number of 32 bit words" tree.end tree "TXD" base ad:0x400DD540 group.long 0x0++0x3 line.long 0x0 "PTR,Transmit buffer RAM start address" hexmask.long 0x0 0.--31. 1. "PTR,Transmit buffer Data RAM start address. When transmitting words containing samples will be fetched from this address. This address is a word aligned Data RAM address." tree.end repeat 2. (list 0x0 0x1)(list ad:0x400DD580 ad:0x400DD588) tree "CHANNEL[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "TERMINATEONBUSERROR,Description cluster: Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long ($2+0x4)++0x3 line.long 0x0 "BUSERRORADDRESS,Description cluster: Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end repeat.end tree.end tree "GLOBAL_I2S20_S" base ad:0x500DD000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Starts continuous I2S transfer. Also starts MCK generator when this is enabled" bitfld.long 0x0 0. "TASKS_START,Starts continuous I2S transfer. Also starts MCK generator when this is enabled" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stops I2S transfer and MCK generator. Triggering this task will cause the event STOPPED to be generated." bitfld.long 0x4 0. "TASKS_STOP,Stops I2S transfer and MCK generator. Triggering this task will cause the event STOPPED to be generated." "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x104++0x7 line.long 0x0 "EVENTS_RXPTRUPD,The RXD.PTR register has been copied to internal double-buffers." bitfld.long 0x0 0. "EVENTS_RXPTRUPD,The RXD.PTR register has been copied to internal double-buffers." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,I2S transfer stopped." bitfld.long 0x4 0. "EVENTS_STOPPED,I2S transfer stopped." "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_TXPTRUPD,The TDX.PTR register has been copied to internal double-buffers." bitfld.long 0x0 0. "EVENTS_TXPTRUPD,The TDX.PTR register has been copied to internal double-buffers." "0: Event not generated,1: Event generated" group.long 0x11C++0x3 line.long 0x0 "EVENTS_FRAMESTART,Frame start event. generated on the active edge of LRCK" bitfld.long 0x0 0. "EVENTS_FRAMESTART,Frame start event generated on the active edge of LRCK" "0: Event not generated,1: Event generated" group.long 0x184++0x7 line.long 0x0 "PUBLISH_RXPTRUPD,Publish configuration for event RXPTRUPD" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXPTRUPD will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_TXPTRUPD,Publish configuration for event TXPTRUPD" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXPTRUPD will publish to" group.long 0x19C++0x3 line.long 0x0 "PUBLISH_FRAMESTART,Publish configuration for event FRAMESTART" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event FRAMESTART will publish to" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 7. "FRAMESTART,Enable or disable interrupt for event FRAMESTART" "0: Disable,1: Enable" bitfld.long 0x0 5. "TXPTRUPD,Enable or disable interrupt for event TXPTRUPD" "0: Disable,1: Enable" bitfld.long 0x0 2. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "RXPTRUPD,Enable or disable interrupt for event RXPTRUPD" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 7. "FRAMESTART,Write '1' to enable interrupt for event FRAMESTART" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "TXPTRUPD,Write '1' to enable interrupt for event TXPTRUPD" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "RXPTRUPD,Write '1' to enable interrupt for event RXPTRUPD" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 7. "FRAMESTART,Write '1' to disable interrupt for event FRAMESTART" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "TXPTRUPD,Write '1' to disable interrupt for event TXPTRUPD" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "RXPTRUPD,Write '1' to disable interrupt for event RXPTRUPD" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable I2S module" bitfld.long 0x0 0. "ENABLE,Enable I2S module" "0: Disable,1: Enable" tree "CONFIG" base ad:0x500DD000 group.long 0x0++0x27 line.long 0x0 "MODE,I2S mode" bitfld.long 0x0 0. "MODE,I2S mode" "0: Master mode. SCK and LRCK generated from..,1: Slave mode. SCK and LRCK generated by external.." line.long 0x4 "RXEN,Reception (RX) enable" bitfld.long 0x4 0. "RXEN,Reception (RX) enable" "0: Reception disabled and now data will be written..,1: Reception enabled." line.long 0x8 "TXEN,Transmission (TX) enable" bitfld.long 0x8 0. "TXEN,Transmission (TX) enable" "0: Transmission disabled and now data will be read..,1: Transmission enabled." line.long 0xC "MCKEN,Master clock generator enable" bitfld.long 0xC 0. "MCKEN,Master clock generator enable" "0: Master clock generator disabled and PSEL.MCK not..,1: Master clock generator running and MCK output on.." line.long 0x10 "MCKFREQ,I2S clock generator control" hexmask.long 0x10 0.--31. 1. "MCKFREQ,I2S MCK frequency configuration NOTE: Enumerations are deprecated use MCKFREQ equation. NOTE: The 12 least significant bits of the register are ignored and shall be set to zero." line.long 0x14 "RATIO,MCK / LRCK ratio" hexmask.long.byte 0x14 0.--3. 1. "RATIO,MCK / LRCK ratio" line.long 0x18 "SWIDTH,Sample width" bitfld.long 0x18 0.--2. "SWIDTH,Sample and half-frame width" "0: 8 bit sample.,1: 16 bit sample.,2: 24 bit sample.,3: 32 bit sample.,4: 8 bit sample in a 16-bit half-frame.,5: 8 bit sample in a 32-bit half-frame.,6: 16 bit sample in a 32-bit half-frame.,7: 24 bit sample in a 32-bit half-frame." line.long 0x1C "ALIGN,Alignment of sample within a frame" bitfld.long 0x1C 0. "ALIGN,Alignment of sample within a frame" "0: Left-aligned.,1: Right-aligned." line.long 0x20 "FORMAT,Frame format" bitfld.long 0x20 0. "FORMAT,Frame format" "0: Original I2S format.,1: Alternate (left- or right-aligned) format." line.long 0x24 "CHANNELS,Enable channels" bitfld.long 0x24 0.--1. "CHANNELS,Enable channels" "0: Stereo.,1: Left only.,2: Right only.,?" tree.end tree "PSEL" base ad:0x500DD000 group.long 0x0++0x13 line.long 0x0 "MCK,Pin select for MCK signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SCK,Pin select for SCK signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "LRCK,Pin select for LRCK signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "SDIN,Pin select for SDIN signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" line.long 0x10 "SDOUT,Pin select for SDOUT signal" bitfld.long 0x10 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x10 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 0.--4. 1. "PIN,Pin number" tree.end tree "RXD" base ad:0x500DD000 group.long 0x0++0x3 line.long 0x0 "PTR,Receive buffer RAM start address." hexmask.long 0x0 0.--31. 1. "PTR,Receive buffer Data RAM start address. When receiving words containing samples will be written to this address. This address is a word aligned Data RAM address." tree.end tree "RXTXD" base ad:0x500DD000 group.long 0x0++0x3 line.long 0x0 "MAXCNT,Size of RXD and TXD buffers" hexmask.long.word 0x0 0.--13. 1. "MAXCNT,Size of RXD and TXD buffers in number of 32 bit words" tree.end tree "TXD" base ad:0x500DD000 group.long 0x0++0x3 line.long 0x0 "PTR,Transmit buffer RAM start address" hexmask.long 0x0 0.--31. 1. "PTR,Transmit buffer Data RAM start address. When transmitting words containing samples will be fetched from this address. This address is a word aligned Data RAM address." tree.end repeat 2. (list 0x0 0x1)(list ad:0x500DD580 ad:0x500DD588) tree "CHANNEL[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "TERMINATEONBUSERROR,Description cluster: Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long ($2+0x4)++0x3 line.long 0x0 "BUSERRORADDRESS,Description cluster: Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end repeat.end tree.end tree.end tree "KMU (Key Management Unit)" base ad:0x0 tree "GLOBAL_KMU_S" base ad:0x50045000 wgroup.long 0x0++0x13 line.long 0x0 "TASKS_PROVISION,Provision key slot" bitfld.long 0x0 0. "TASKS_PROVISION,Provision key slot" "?,1: Trigger task" line.long 0x4 "TASKS_PUSH,Push key slot" bitfld.long 0x4 0. "TASKS_PUSH,Push key slot" "?,1: Trigger task" line.long 0x8 "TASKS_REVOKE,Revoke key slot" bitfld.long 0x8 0. "TASKS_REVOKE,Revoke key slot" "?,1: Trigger task" line.long 0xC "TASKS_READMETADATA,Read key slot metadata into METADATA register" bitfld.long 0xC 0. "TASKS_READMETADATA,Read key slot metadata into METADATA register" "?,1: Trigger task" line.long 0x10 "TASKS_PUSHBLOCK,Block only the PUSH operation of a key slot. preventing the key slot from being PUSHED until next reset. The task is kept for backwards compatibility." bitfld.long 0x10 0. "TASKS_PUSHBLOCK,Block only the PUSH operation of a key slot preventing the key slot from being PUSHED until next reset. The task is kept for backwards compatibility." "?,1: Trigger task" group.long 0x100++0x17 line.long 0x0 "EVENTS_PROVISIONED,Key slot successfully provisioned" bitfld.long 0x0 0. "EVENTS_PROVISIONED,Key slot successfully provisioned" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_PUSHED,Key slot successfully pushed" bitfld.long 0x4 0. "EVENTS_PUSHED,Key slot successfully pushed" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_REVOKED,Key slot has been revoked and can no longer be used" bitfld.long 0x8 0. "EVENTS_REVOKED,Key slot has been revoked and can no longer be used" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_ERROR,Error generated during PROVISION. PUSH. READMETADATA or REVOKE operations. Triggering the PROVISION. PUSH and REVOKE tasks on a BLOCKED keyslot will also generate this event." bitfld.long 0xC 0. "EVENTS_ERROR,Error generated during PROVISION PUSH READMETADATA or REVOKE operations. Triggering the PROVISION PUSH and REVOKE tasks on a BLOCKED keyslot will also generate this event." "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_METADATAREAD,Key slot metadata has been read into METADATA register" bitfld.long 0x10 0. "EVENTS_METADATAREAD,Key slot metadata has been read into METADATA register" "0: Event not generated,1: Event generated" line.long 0x14 "EVENTS_PUSHBLOCKED,The PUSHBLOCK operation was successful. The event is kept for backwards compatibility." bitfld.long 0x14 0. "EVENTS_PUSHBLOCKED,The PUSHBLOCK operation was successful. The event is kept for backwards compatibility." "0: Event not generated,1: Event generated" rgroup.long 0x400++0x3 line.long 0x0 "STATUS,KMU status register" bitfld.long 0x0 0. "STATUS,KMU status" "0: KMU is ready for new operation,1: KMU is busy an operation is in progress" group.long 0x500++0xB line.long 0x0 "KEYSLOT,Select key slot to operate on" hexmask.long.byte 0x0 0.--7. 1. "ID,Select key slot ID to provision push read METADATA revoke or block when the corresponding task is triggered." line.long 0x4 "SRC,Source address for provisioning" hexmask.long 0x4 0.--31. 1. "SRC,Source address for TASKS_PROVISION." line.long 0x8 "METADATA,Key slot metadata as read by TASKS_READMETADATA." hexmask.long 0x8 0.--31. 1. "METADATA,Read metadata." tree.end tree.end tree "LPCOMP (Low-power Comparator)" base ad:0x0 tree "GLOBAL_LPCOMP_NS" base ad:0x40106000 wgroup.long 0x0++0xB line.long 0x0 "TASKS_START,Start comparator" bitfld.long 0x0 0. "TASKS_START,Start comparator" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop comparator" bitfld.long 0x4 0. "TASKS_STOP,Stop comparator" "?,1: Trigger task" line.long 0x8 "TASKS_SAMPLE,Sample comparator value. This task requires that LPCOMP has been started by the START task." bitfld.long 0x8 0. "TASKS_SAMPLE,Sample comparator value. This task requires that LPCOMP has been started by the START task." "?,1: Trigger task" group.long 0x80++0xB line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_SAMPLE,Subscribe configuration for task SAMPLE" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task SAMPLE will subscribe to" group.long 0x100++0xF line.long 0x0 "EVENTS_READY,LPCOMP is ready and output is valid" bitfld.long 0x0 0. "EVENTS_READY,LPCOMP is ready and output is valid" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_DOWN,Downward crossing" bitfld.long 0x4 0. "EVENTS_DOWN,Downward crossing" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_UP,Upward crossing" bitfld.long 0x8 0. "EVENTS_UP,Upward crossing" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_CROSS,Downward or upward crossing" bitfld.long 0xC 0. "EVENTS_CROSS,Downward or upward crossing" "0: Event not generated,1: Event generated" group.long 0x180++0xF line.long 0x0 "PUBLISH_READY,Publish configuration for event READY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x4 "PUBLISH_DOWN,Publish configuration for event DOWN" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event DOWN will publish to" line.long 0x8 "PUBLISH_UP,Publish configuration for event UP" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event UP will publish to" line.long 0xC "PUBLISH_CROSS,Publish configuration for event CROSS" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event CROSS will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 4. "CROSS_STOP,Shortcut between event CROSS and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 3. "UP_STOP,Shortcut between event UP and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "DOWN_STOP,Shortcut between event DOWN and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "READY_STOP,Shortcut between event READY and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "READY_SAMPLE,Shortcut between event READY and task SAMPLE" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 3. "CROSS,Enable or disable interrupt for event CROSS" "0: Disable,1: Enable" bitfld.long 0x0 2. "UP,Enable or disable interrupt for event UP" "0: Disable,1: Enable" bitfld.long 0x0 1. "DOWN,Enable or disable interrupt for event DOWN" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "READY,Enable or disable interrupt for event READY" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 3. "CROSS,Write '1' to enable interrupt for event CROSS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "UP,Write '1' to enable interrupt for event UP" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "DOWN,Write '1' to enable interrupt for event DOWN" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 3. "CROSS,Write '1' to disable interrupt for event CROSS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "UP,Write '1' to disable interrupt for event UP" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "DOWN,Write '1' to disable interrupt for event DOWN" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 3. "CROSS,Read pending status of interrupt for event CROSS" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 2. "UP,Read pending status of interrupt for event UP" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 1. "DOWN,Read pending status of interrupt for event DOWN" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "READY,Read pending status of interrupt for event READY" "0: Read: Not pending,1: Read: Pending" rgroup.long 0x400++0x3 line.long 0x0 "RESULT,Compare result" bitfld.long 0x0 0. "RESULT,Result of last compare. Decision point SAMPLE task." "0: Input voltage is below the reference threshold..,1: Input voltage is above the reference threshold.." group.long 0x500++0xF line.long 0x0 "ENABLE,Enable LPCOMP" bitfld.long 0x0 0.--1. "ENABLE,Enable or disable LPCOMP" "0: Disable,1: Enable,?,?" line.long 0x4 "PSEL,Input pin select" hexmask.long.byte 0x4 8.--11. 1. "PORT,GPIO Port selection" hexmask.long.byte 0x4 0.--4. 1. "PIN,Analog pin select" line.long 0x8 "REFSEL,Reference select" hexmask.long.byte 0x8 0.--3. 1. "REFSEL,Reference select" line.long 0xC "EXTREFSEL,External reference select" hexmask.long.byte 0xC 8.--11. 1. "PORT,GPIO Port selection" hexmask.long.byte 0xC 0.--4. 1. "PIN,External analog reference pin select" group.long 0x520++0x3 line.long 0x0 "ANADETECT,Analog detect configuration" bitfld.long 0x0 0.--1. "ANADETECT,Analog detect configuration" "0: Generate ANADETECT on crossing both upward..,1: Generate ANADETECT on upward crossing only,2: Generate ANADETECT on downward crossing only,?" group.long 0x538++0x3 line.long 0x0 "HYST,Comparator hysteresis enable" bitfld.long 0x0 0. "HYST,Comparator hysteresis enable" "0: Comparator hysteresis disabled,1: Comparator hysteresis enabled" tree.end tree "GLOBAL_LPCOMP_S" base ad:0x50106000 wgroup.long 0x0++0xB line.long 0x0 "TASKS_START,Start comparator" bitfld.long 0x0 0. "TASKS_START,Start comparator" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop comparator" bitfld.long 0x4 0. "TASKS_STOP,Stop comparator" "?,1: Trigger task" line.long 0x8 "TASKS_SAMPLE,Sample comparator value. This task requires that LPCOMP has been started by the START task." bitfld.long 0x8 0. "TASKS_SAMPLE,Sample comparator value. This task requires that LPCOMP has been started by the START task." "?,1: Trigger task" group.long 0x80++0xB line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_SAMPLE,Subscribe configuration for task SAMPLE" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task SAMPLE will subscribe to" group.long 0x100++0xF line.long 0x0 "EVENTS_READY,LPCOMP is ready and output is valid" bitfld.long 0x0 0. "EVENTS_READY,LPCOMP is ready and output is valid" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_DOWN,Downward crossing" bitfld.long 0x4 0. "EVENTS_DOWN,Downward crossing" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_UP,Upward crossing" bitfld.long 0x8 0. "EVENTS_UP,Upward crossing" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_CROSS,Downward or upward crossing" bitfld.long 0xC 0. "EVENTS_CROSS,Downward or upward crossing" "0: Event not generated,1: Event generated" group.long 0x180++0xF line.long 0x0 "PUBLISH_READY,Publish configuration for event READY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x4 "PUBLISH_DOWN,Publish configuration for event DOWN" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event DOWN will publish to" line.long 0x8 "PUBLISH_UP,Publish configuration for event UP" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event UP will publish to" line.long 0xC "PUBLISH_CROSS,Publish configuration for event CROSS" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event CROSS will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 4. "CROSS_STOP,Shortcut between event CROSS and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 3. "UP_STOP,Shortcut between event UP and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "DOWN_STOP,Shortcut between event DOWN and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "READY_STOP,Shortcut between event READY and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "READY_SAMPLE,Shortcut between event READY and task SAMPLE" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 3. "CROSS,Enable or disable interrupt for event CROSS" "0: Disable,1: Enable" bitfld.long 0x0 2. "UP,Enable or disable interrupt for event UP" "0: Disable,1: Enable" bitfld.long 0x0 1. "DOWN,Enable or disable interrupt for event DOWN" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "READY,Enable or disable interrupt for event READY" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 3. "CROSS,Write '1' to enable interrupt for event CROSS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "UP,Write '1' to enable interrupt for event UP" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "DOWN,Write '1' to enable interrupt for event DOWN" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 3. "CROSS,Write '1' to disable interrupt for event CROSS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "UP,Write '1' to disable interrupt for event UP" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "DOWN,Write '1' to disable interrupt for event DOWN" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 3. "CROSS,Read pending status of interrupt for event CROSS" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 2. "UP,Read pending status of interrupt for event UP" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 1. "DOWN,Read pending status of interrupt for event DOWN" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 0. "READY,Read pending status of interrupt for event READY" "0: Read: Not pending,1: Read: Pending" rgroup.long 0x400++0x3 line.long 0x0 "RESULT,Compare result" bitfld.long 0x0 0. "RESULT,Result of last compare. Decision point SAMPLE task." "0: Input voltage is below the reference threshold..,1: Input voltage is above the reference threshold.." group.long 0x500++0xF line.long 0x0 "ENABLE,Enable LPCOMP" bitfld.long 0x0 0.--1. "ENABLE,Enable or disable LPCOMP" "0: Disable,1: Enable,?,?" line.long 0x4 "PSEL,Input pin select" hexmask.long.byte 0x4 8.--11. 1. "PORT,GPIO Port selection" hexmask.long.byte 0x4 0.--4. 1. "PIN,Analog pin select" line.long 0x8 "REFSEL,Reference select" hexmask.long.byte 0x8 0.--3. 1. "REFSEL,Reference select" line.long 0xC "EXTREFSEL,External reference select" hexmask.long.byte 0xC 8.--11. 1. "PORT,GPIO Port selection" hexmask.long.byte 0xC 0.--4. 1. "PIN,External analog reference pin select" group.long 0x520++0x3 line.long 0x0 "ANADETECT,Analog detect configuration" bitfld.long 0x0 0.--1. "ANADETECT,Analog detect configuration" "0: Generate ANADETECT on crossing both upward..,1: Generate ANADETECT on upward crossing only,2: Generate ANADETECT on downward crossing only,?" group.long 0x538++0x3 line.long 0x0 "HYST,Comparator hysteresis enable" bitfld.long 0x0 0. "HYST,Comparator hysteresis enable" "0: Comparator hysteresis disabled,1: Comparator hysteresis enabled" tree.end tree.end tree "MEMCONF (Memory Configuration)" base ad:0x0 tree "GLOBAL_MEMCONF_NS" base ad:0x400CF000 repeat 2. (list 0x0 0x1)(list ad:0x400CF500 ad:0x400CF510) tree "POWER[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "CONTROL,Description cluster: Control memory block power." bitfld.long 0x0 31. "MEM31,Keep the memory block MEM[31] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 30. "MEM30,Keep the memory block MEM[30] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 29. "MEM29,Keep the memory block MEM[29] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 28. "MEM28,Keep the memory block MEM[28] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 27. "MEM27,Keep the memory block MEM[27] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 26. "MEM26,Keep the memory block MEM[26] on or off when in System ON mode." "0: Power down,1: Power up" newline bitfld.long 0x0 25. "MEM25,Keep the memory block MEM[25] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 24. "MEM24,Keep the memory block MEM[24] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 23. "MEM23,Keep the memory block MEM[23] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 22. "MEM22,Keep the memory block MEM[22] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 21. "MEM21,Keep the memory block MEM[21] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 20. "MEM20,Keep the memory block MEM[20] on or off when in System ON mode." "0: Power down,1: Power up" newline bitfld.long 0x0 19. "MEM19,Keep the memory block MEM[19] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 18. "MEM18,Keep the memory block MEM[18] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 17. "MEM17,Keep the memory block MEM[17] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 16. "MEM16,Keep the memory block MEM[16] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 15. "MEM15,Keep the memory block MEM[15] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 14. "MEM14,Keep the memory block MEM[14] on or off when in System ON mode." "0: Power down,1: Power up" newline bitfld.long 0x0 13. "MEM13,Keep the memory block MEM[13] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 12. "MEM12,Keep the memory block MEM[12] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 11. "MEM11,Keep the memory block MEM[11] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 10. "MEM10,Keep the memory block MEM[10] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 9. "MEM9,Keep the memory block MEM[9] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 8. "MEM8,Keep the memory block MEM[8] on or off when in System ON mode." "0: Power down,1: Power up" newline bitfld.long 0x0 7. "MEM7,Keep the memory block MEM[7] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 6. "MEM6,Keep the memory block MEM[6] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 5. "MEM5,Keep the memory block MEM[5] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 4. "MEM4,Keep the memory block MEM[4] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 3. "MEM3,Keep the memory block MEM[3] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 2. "MEM2,Keep the memory block MEM[2] on or off when in System ON mode." "0: Power down,1: Power up" newline bitfld.long 0x0 1. "MEM1,Keep the memory block MEM[1] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 0. "MEM0,Keep the memory block MEM[0] on or off when in System ON mode." "0: Power down,1: Power up" group.long ($2+0x8)++0x7 line.long 0x0 "RET,Description cluster: RAM retention for RAM [n]." bitfld.long 0x0 31. "MEM31,Keep the RAM block MEM[31] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 30. "MEM30,Keep the RAM block MEM[30] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 29. "MEM29,Keep the RAM block MEM[29] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 28. "MEM28,Keep the RAM block MEM[28] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 27. "MEM27,Keep the RAM block MEM[27] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 26. "MEM26,Keep the RAM block MEM[26] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x0 25. "MEM25,Keep the RAM block MEM[25] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 24. "MEM24,Keep the RAM block MEM[24] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 23. "MEM23,Keep the RAM block MEM[23] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 22. "MEM22,Keep the RAM block MEM[22] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 21. "MEM21,Keep the RAM block MEM[21] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 20. "MEM20,Keep the RAM block MEM[20] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x0 19. "MEM19,Keep the RAM block MEM[19] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 18. "MEM18,Keep the RAM block MEM[18] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 17. "MEM17,Keep the RAM block MEM[17] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 16. "MEM16,Keep the RAM block MEM[16] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 15. "MEM15,Keep the RAM block MEM[15] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 14. "MEM14,Keep the RAM block MEM[14] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x0 13. "MEM13,Keep the RAM block MEM[13] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 12. "MEM12,Keep the RAM block MEM[12] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 11. "MEM11,Keep the RAM block MEM[11] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 10. "MEM10,Keep the RAM block MEM[10] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 9. "MEM9,Keep the RAM block MEM[9] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 8. "MEM8,Keep the RAM block MEM[8] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x0 7. "MEM7,Keep the RAM block MEM[7] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 6. "MEM6,Keep the RAM block MEM[6] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 5. "MEM5,Keep the RAM block MEM[5] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 4. "MEM4,Keep the RAM block MEM[4] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 3. "MEM3,Keep the RAM block MEM[3] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 2. "MEM2,Keep the RAM block MEM[2] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x0 1. "MEM1,Keep the RAM block MEM[1] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 0. "MEM0,Keep the RAM block MEM[0] retained when in System OFF mode." "0: Retention off,1: Retention on" line.long 0x4 "RET2,Description cluster: RAM retention for the second bank in the RAM block" bitfld.long 0x4 31. "MEM31,Keep the second bank in RAM block MEM[31] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 30. "MEM30,Keep the second bank in RAM block MEM[30] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 29. "MEM29,Keep the second bank in RAM block MEM[29] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 28. "MEM28,Keep the second bank in RAM block MEM[28] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 27. "MEM27,Keep the second bank in RAM block MEM[27] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 26. "MEM26,Keep the second bank in RAM block MEM[26] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x4 25. "MEM25,Keep the second bank in RAM block MEM[25] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 24. "MEM24,Keep the second bank in RAM block MEM[24] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 23. "MEM23,Keep the second bank in RAM block MEM[23] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 22. "MEM22,Keep the second bank in RAM block MEM[22] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 21. "MEM21,Keep the second bank in RAM block MEM[21] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 20. "MEM20,Keep the second bank in RAM block MEM[20] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x4 19. "MEM19,Keep the second bank in RAM block MEM[19] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 18. "MEM18,Keep the second bank in RAM block MEM[18] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 17. "MEM17,Keep the second bank in RAM block MEM[17] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 16. "MEM16,Keep the second bank in RAM block MEM[16] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 15. "MEM15,Keep the second bank in RAM block MEM[15] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 14. "MEM14,Keep the second bank in RAM block MEM[14] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x4 13. "MEM13,Keep the second bank in RAM block MEM[13] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 12. "MEM12,Keep the second bank in RAM block MEM[12] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 11. "MEM11,Keep the second bank in RAM block MEM[11] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 10. "MEM10,Keep the second bank in RAM block MEM[10] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 9. "MEM9,Keep the second bank in RAM block MEM[9] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 8. "MEM8,Keep the second bank in RAM block MEM[8] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x4 7. "MEM7,Keep the second bank in RAM block MEM[7] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 6. "MEM6,Keep the second bank in RAM block MEM[6] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 5. "MEM5,Keep the second bank in RAM block MEM[5] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 4. "MEM4,Keep the second bank in RAM block MEM[4] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 3. "MEM3,Keep the second bank in RAM block MEM[3] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 2. "MEM2,Keep the second bank in RAM block MEM[2] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x4 1. "MEM1,Keep the second bank in RAM block MEM[1] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 0. "MEM0,Keep the second bank in RAM block MEM[0] retained when in System OFF mode." "0: Retention off,1: Retention on" tree.end repeat.end tree.end tree "GLOBAL_MEMCONF_S" base ad:0x500CF000 repeat 2. (list 0x0 0x1)(list ad:0x500CF500 ad:0x500CF510) tree "POWER[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "CONTROL,Description cluster: Control memory block power." bitfld.long 0x0 31. "MEM31,Keep the memory block MEM[31] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 30. "MEM30,Keep the memory block MEM[30] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 29. "MEM29,Keep the memory block MEM[29] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 28. "MEM28,Keep the memory block MEM[28] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 27. "MEM27,Keep the memory block MEM[27] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 26. "MEM26,Keep the memory block MEM[26] on or off when in System ON mode." "0: Power down,1: Power up" newline bitfld.long 0x0 25. "MEM25,Keep the memory block MEM[25] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 24. "MEM24,Keep the memory block MEM[24] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 23. "MEM23,Keep the memory block MEM[23] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 22. "MEM22,Keep the memory block MEM[22] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 21. "MEM21,Keep the memory block MEM[21] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 20. "MEM20,Keep the memory block MEM[20] on or off when in System ON mode." "0: Power down,1: Power up" newline bitfld.long 0x0 19. "MEM19,Keep the memory block MEM[19] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 18. "MEM18,Keep the memory block MEM[18] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 17. "MEM17,Keep the memory block MEM[17] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 16. "MEM16,Keep the memory block MEM[16] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 15. "MEM15,Keep the memory block MEM[15] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 14. "MEM14,Keep the memory block MEM[14] on or off when in System ON mode." "0: Power down,1: Power up" newline bitfld.long 0x0 13. "MEM13,Keep the memory block MEM[13] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 12. "MEM12,Keep the memory block MEM[12] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 11. "MEM11,Keep the memory block MEM[11] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 10. "MEM10,Keep the memory block MEM[10] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 9. "MEM9,Keep the memory block MEM[9] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 8. "MEM8,Keep the memory block MEM[8] on or off when in System ON mode." "0: Power down,1: Power up" newline bitfld.long 0x0 7. "MEM7,Keep the memory block MEM[7] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 6. "MEM6,Keep the memory block MEM[6] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 5. "MEM5,Keep the memory block MEM[5] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 4. "MEM4,Keep the memory block MEM[4] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 3. "MEM3,Keep the memory block MEM[3] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 2. "MEM2,Keep the memory block MEM[2] on or off when in System ON mode." "0: Power down,1: Power up" newline bitfld.long 0x0 1. "MEM1,Keep the memory block MEM[1] on or off when in System ON mode." "0: Power down,1: Power up" bitfld.long 0x0 0. "MEM0,Keep the memory block MEM[0] on or off when in System ON mode." "0: Power down,1: Power up" group.long ($2+0x8)++0x7 line.long 0x0 "RET,Description cluster: RAM retention for RAM [n]." bitfld.long 0x0 31. "MEM31,Keep the RAM block MEM[31] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 30. "MEM30,Keep the RAM block MEM[30] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 29. "MEM29,Keep the RAM block MEM[29] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 28. "MEM28,Keep the RAM block MEM[28] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 27. "MEM27,Keep the RAM block MEM[27] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 26. "MEM26,Keep the RAM block MEM[26] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x0 25. "MEM25,Keep the RAM block MEM[25] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 24. "MEM24,Keep the RAM block MEM[24] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 23. "MEM23,Keep the RAM block MEM[23] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 22. "MEM22,Keep the RAM block MEM[22] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 21. "MEM21,Keep the RAM block MEM[21] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 20. "MEM20,Keep the RAM block MEM[20] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x0 19. "MEM19,Keep the RAM block MEM[19] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 18. "MEM18,Keep the RAM block MEM[18] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 17. "MEM17,Keep the RAM block MEM[17] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 16. "MEM16,Keep the RAM block MEM[16] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 15. "MEM15,Keep the RAM block MEM[15] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 14. "MEM14,Keep the RAM block MEM[14] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x0 13. "MEM13,Keep the RAM block MEM[13] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 12. "MEM12,Keep the RAM block MEM[12] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 11. "MEM11,Keep the RAM block MEM[11] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 10. "MEM10,Keep the RAM block MEM[10] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 9. "MEM9,Keep the RAM block MEM[9] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 8. "MEM8,Keep the RAM block MEM[8] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x0 7. "MEM7,Keep the RAM block MEM[7] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 6. "MEM6,Keep the RAM block MEM[6] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 5. "MEM5,Keep the RAM block MEM[5] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 4. "MEM4,Keep the RAM block MEM[4] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 3. "MEM3,Keep the RAM block MEM[3] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 2. "MEM2,Keep the RAM block MEM[2] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x0 1. "MEM1,Keep the RAM block MEM[1] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x0 0. "MEM0,Keep the RAM block MEM[0] retained when in System OFF mode." "0: Retention off,1: Retention on" line.long 0x4 "RET2,Description cluster: RAM retention for the second bank in the RAM block" bitfld.long 0x4 31. "MEM31,Keep the second bank in RAM block MEM[31] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 30. "MEM30,Keep the second bank in RAM block MEM[30] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 29. "MEM29,Keep the second bank in RAM block MEM[29] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 28. "MEM28,Keep the second bank in RAM block MEM[28] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 27. "MEM27,Keep the second bank in RAM block MEM[27] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 26. "MEM26,Keep the second bank in RAM block MEM[26] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x4 25. "MEM25,Keep the second bank in RAM block MEM[25] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 24. "MEM24,Keep the second bank in RAM block MEM[24] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 23. "MEM23,Keep the second bank in RAM block MEM[23] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 22. "MEM22,Keep the second bank in RAM block MEM[22] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 21. "MEM21,Keep the second bank in RAM block MEM[21] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 20. "MEM20,Keep the second bank in RAM block MEM[20] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x4 19. "MEM19,Keep the second bank in RAM block MEM[19] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 18. "MEM18,Keep the second bank in RAM block MEM[18] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 17. "MEM17,Keep the second bank in RAM block MEM[17] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 16. "MEM16,Keep the second bank in RAM block MEM[16] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 15. "MEM15,Keep the second bank in RAM block MEM[15] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 14. "MEM14,Keep the second bank in RAM block MEM[14] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x4 13. "MEM13,Keep the second bank in RAM block MEM[13] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 12. "MEM12,Keep the second bank in RAM block MEM[12] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 11. "MEM11,Keep the second bank in RAM block MEM[11] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 10. "MEM10,Keep the second bank in RAM block MEM[10] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 9. "MEM9,Keep the second bank in RAM block MEM[9] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 8. "MEM8,Keep the second bank in RAM block MEM[8] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x4 7. "MEM7,Keep the second bank in RAM block MEM[7] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 6. "MEM6,Keep the second bank in RAM block MEM[6] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 5. "MEM5,Keep the second bank in RAM block MEM[5] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 4. "MEM4,Keep the second bank in RAM block MEM[4] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 3. "MEM3,Keep the second bank in RAM block MEM[3] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 2. "MEM2,Keep the second bank in RAM block MEM[2] retained when in System OFF mode." "0: Retention off,1: Retention on" newline bitfld.long 0x4 1. "MEM1,Keep the second bank in RAM block MEM[1] retained when in System OFF mode." "0: Retention off,1: Retention on" bitfld.long 0x4 0. "MEM0,Keep the second bank in RAM block MEM[0] retained when in System OFF mode." "0: Retention off,1: Retention on" tree.end repeat.end tree.end tree.end tree "MPC (Memory Privilege Controller)" base ad:0x0 tree "GLOBAL_MPC00_S" base ad:0x50041000 group.long 0x100++0x3 line.long 0x0 "EVENTS_MEMACCERR,Memory Access Error event" bitfld.long 0x0 0. "EVENTS_MEMACCERR,Memory Access Error event" "0: Event not generated,1: Event generated" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 0. "MEMACCERR,Enable or disable interrupt for event MEMACCERR" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 0. "MEMACCERR,Write '1' to enable interrupt for event MEMACCERR" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 0. "MEMACCERR,Write '1' to disable interrupt for event MEMACCERR" "0: Read: Disabled,1: Disable" tree "MEMACCERR" base ad:0x50041400 rgroup.long 0x0++0x7 line.long 0x0 "ADDRESS,Target Address of Memory Access Error. Register content won't be changed as long as MEMACCERR event is active." hexmask.long 0x0 0.--31. 1. "ADDRESS,Target address for erroneous access" line.long 0x4 "INFO,Access information for the transaction that triggered a memory access error. Register content won't be changed as long as MEMACCERR event is active." bitfld.long 0x4 16. "ERRORSOURCE,Source of memory access error" "0: Error was triggered by a Subordinate,1: Error was triggered by MPC module" bitfld.long 0x4 15. "SECURE,Secure bit of bus access" "0: Secure access bit was not set,1: Secure access bit was set" bitfld.long 0x4 14. "EXECUTE,Execute bit of bus access" "0: Execute access bit was not set,1: Execute access bit was set" newline bitfld.long 0x4 13. "WRITE,Write bit of bus access" "0: Write access bit was not set,1: Write access bit was set" bitfld.long 0x4 12. "READ,Read bit of bus access" "0: Read access bit was not set,1: Read access bit was set" tree.end repeat 5. (list 0x0 0x1 0x2 0x3 0x4)(list ad:0x50041800 ad:0x50041820 ad:0x50041840 ad:0x50041860 ad:0x50041880) tree "OVERRIDE[$1]" base $2 group.long ($2)++0xB line.long 0x0 "CONFIG,Description cluster: Override region n Configuration register" bitfld.long 0x0 9. "ENABLE,Enable Override region n" "0: Override region n is not used,1: Override region n is used" bitfld.long 0x0 8. "LOCK,Lock Override region n" "0: Override region n settings can be updated,1: Override region n settings can't be updated.." line.long 0x4 "STARTADDR,Description cluster: Override region n Start Address" hexmask.long 0x4 0.--31. 1. "STARTADDR,Start address for override region n" line.long 0x8 "ENDADDR,Description cluster: Override region n End Address" hexmask.long 0x8 0.--31. 1. "ENDADDR,End address for override region n" group.long ($2+0x10)++0x7 line.long 0x0 "PERM,Description cluster: Permission settings for override region n" bitfld.long 0x0 3. "SECATTR,Security mapping" "0: Override region n is mapped in non-secure memory..,1: Override region n is mapped in secure memory.." bitfld.long 0x0 2. "EXECUTE,Software execute" "0: Software execution from override region n is not..,1: Software execution from override region n is.." newline bitfld.long 0x0 1. "WRITE,Write access" "0: Write access to override region n is not allowed,1: Write access to override region n is allowed" bitfld.long 0x0 0. "READ,Read access" "0: Read access to override region n is not allowed,1: Read access to override region n is allowed" line.long 0x4 "PERMMASK,Description cluster: Masks permission setting fields from register OVERRIDE.PERM" bitfld.long 0x4 3. "SECATTR,Security mapping mask" "0: Permission setting SECATTR in OVERRIDE register..,1: Permission setting SECATTR in OVERRIDE register.." bitfld.long 0x4 2. "EXECUTE,Execute mask" "0: Permission setting EXECUTE in OVERRIDE register..,1: Permission setting EXECUTE in OVERRIDE register.." newline bitfld.long 0x4 1. "WRITE,Write mask" "0: Permission setting WRITE in OVERRIDE register..,1: Permission setting WRITE in OVERRIDE register.." bitfld.long 0x4 0. "READ,Read mask" "0: Permission setting READ in OVERRIDE register..,1: Permission setting READ in OVERRIDE register.." tree.end repeat.end tree.end tree.end tree "NFCT (NFC-A Compatible Radio)" base ad:0x0 tree "GLOBAL_NFCT_NS" base ad:0x400D6000 wgroup.long 0x0++0x13 line.long 0x0 "TASKS_ACTIVATE,Activate NFCT peripheral for incoming and outgoing frames. change state to activated" bitfld.long 0x0 0. "TASKS_ACTIVATE,Activate NFCT peripheral for incoming and outgoing frames change state to activated" "?,1: Trigger task" line.long 0x4 "TASKS_DISABLE,Disable NFCT peripheral" bitfld.long 0x4 0. "TASKS_DISABLE,Disable NFCT peripheral" "?,1: Trigger task" line.long 0x8 "TASKS_SENSE,Enable NFC sense field mode. change state to sense mode" bitfld.long 0x8 0. "TASKS_SENSE,Enable NFC sense field mode change state to sense mode" "?,1: Trigger task" line.long 0xC "TASKS_STARTTX,Start transmission of an outgoing frame. change state to transmit" bitfld.long 0xC 0. "TASKS_STARTTX,Start transmission of an outgoing frame change state to transmit" "?,1: Trigger task" line.long 0x10 "TASKS_STOPTX,Stops an issued transmission of a frame" bitfld.long 0x10 0. "TASKS_STOPTX,Stops an issued transmission of a frame" "?,1: Trigger task" wgroup.long 0x1C++0x3 line.long 0x0 "TASKS_ENABLERXDATA,Initializes the EasyDMA for receive." bitfld.long 0x0 0. "TASKS_ENABLERXDATA,Initializes the EasyDMA for receive." "?,1: Trigger task" wgroup.long 0x24++0x7 line.long 0x0 "TASKS_GOIDLE,Force state machine to IDLE state" bitfld.long 0x0 0. "TASKS_GOIDLE,Force state machine to IDLE state" "?,1: Trigger task" line.long 0x4 "TASKS_GOSLEEP,Force state machine to SLEEP_A state" bitfld.long 0x4 0. "TASKS_GOSLEEP,Force state machine to SLEEP_A state" "?,1: Trigger task" group.long 0x80++0x13 line.long 0x0 "SUBSCRIBE_ACTIVATE,Subscribe configuration for task ACTIVATE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ACTIVATE will subscribe to" line.long 0x4 "SUBSCRIBE_DISABLE,Subscribe configuration for task DISABLE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task DISABLE will subscribe to" line.long 0x8 "SUBSCRIBE_SENSE,Subscribe configuration for task SENSE" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task SENSE will subscribe to" line.long 0xC "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to" line.long 0x10 "SUBSCRIBE_STOPTX,Subscribe configuration for task STOPTX" bitfld.long 0x10 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that task STOPTX will subscribe to" group.long 0x9C++0x3 line.long 0x0 "SUBSCRIBE_ENABLERXDATA,Subscribe configuration for task ENABLERXDATA" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLERXDATA will subscribe to" group.long 0xA4++0x7 line.long 0x0 "SUBSCRIBE_GOIDLE,Subscribe configuration for task GOIDLE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task GOIDLE will subscribe to" line.long 0x4 "SUBSCRIBE_GOSLEEP,Subscribe configuration for task GOSLEEP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task GOSLEEP will subscribe to" group.long 0x100++0x1F line.long 0x0 "EVENTS_READY,The NFCT peripheral is ready to receive and send frames" bitfld.long 0x0 0. "EVENTS_READY,The NFCT peripheral is ready to receive and send frames" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_FIELDDETECTED,Remote NFC field detected" bitfld.long 0x4 0. "EVENTS_FIELDDETECTED,Remote NFC field detected" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_FIELDLOST,Remote NFC field lost" bitfld.long 0x8 0. "EVENTS_FIELDLOST,Remote NFC field lost" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_TXFRAMESTART,Marks the start of the first symbol of a transmitted frame" bitfld.long 0xC 0. "EVENTS_TXFRAMESTART,Marks the start of the first symbol of a transmitted frame" "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_TXFRAMEEND,Marks the end of the last transmitted on-air symbol of a frame" bitfld.long 0x10 0. "EVENTS_TXFRAMEEND,Marks the end of the last transmitted on-air symbol of a frame" "0: Event not generated,1: Event generated" line.long 0x14 "EVENTS_RXFRAMESTART,Marks the end of the first symbol of a received frame" bitfld.long 0x14 0. "EVENTS_RXFRAMESTART,Marks the end of the first symbol of a received frame" "0: Event not generated,1: Event generated" line.long 0x18 "EVENTS_RXFRAMEEND,Received data has been checked (CRC. parity) and transferred to RAM. and EasyDMA has ended accessing the RX buffer" bitfld.long 0x18 0. "EVENTS_RXFRAMEEND,Received data has been checked (CRC parity) and transferred to RAM and EasyDMA has ended accessing the RX buffer" "0: Event not generated,1: Event generated" line.long 0x1C "EVENTS_ERROR,NFC error reported. The ERRORSTATUS register contains details on the source of the error." bitfld.long 0x1C 0. "EVENTS_ERROR,NFC error reported. The ERRORSTATUS register contains details on the source of the error." "0: Event not generated,1: Event generated" group.long 0x128++0xB line.long 0x0 "EVENTS_RXERROR,NFC RX frame error reported. The FRAMESTATUS.RX register contains details on the source of the error." bitfld.long 0x0 0. "EVENTS_RXERROR,NFC RX frame error reported. The FRAMESTATUS.RX register contains details on the source of the error." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_ENDRX,RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full." bitfld.long 0x4 0. "EVENTS_ENDRX,RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full." "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ENDTX,Transmission of data in RAM has ended. and EasyDMA has ended accessing the TX buffer" bitfld.long 0x8 0. "EVENTS_ENDTX,Transmission of data in RAM has ended and EasyDMA has ended accessing the TX buffer" "0: Event not generated,1: Event generated" group.long 0x138++0x3 line.long 0x0 "EVENTS_AUTOCOLRESSTARTED,Auto collision resolution process has started" bitfld.long 0x0 0. "EVENTS_AUTOCOLRESSTARTED,Auto collision resolution process has started" "0: Event not generated,1: Event generated" group.long 0x148++0xB line.long 0x0 "EVENTS_COLLISION,NFC auto collision resolution error reported." bitfld.long 0x0 0. "EVENTS_COLLISION,NFC auto collision resolution error reported." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_SELECTED,NFC auto collision resolution successfully completed" bitfld.long 0x4 0. "EVENTS_SELECTED,NFC auto collision resolution successfully completed" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_STARTED,EasyDMA is ready to receive or send frames." bitfld.long 0x8 0. "EVENTS_STARTED,EasyDMA is ready to receive or send frames." "0: Event not generated,1: Event generated" group.long 0x180++0x1F line.long 0x0 "PUBLISH_READY,Publish configuration for event READY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x4 "PUBLISH_FIELDDETECTED,Publish configuration for event FIELDDETECTED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event FIELDDETECTED will publish to" line.long 0x8 "PUBLISH_FIELDLOST,Publish configuration for event FIELDLOST" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event FIELDLOST will publish to" line.long 0xC "PUBLISH_TXFRAMESTART,Publish configuration for event TXFRAMESTART" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event TXFRAMESTART will publish to" line.long 0x10 "PUBLISH_TXFRAMEEND,Publish configuration for event TXFRAMEEND" bitfld.long 0x10 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that event TXFRAMEEND will publish to" line.long 0x14 "PUBLISH_RXFRAMESTART,Publish configuration for event RXFRAMESTART" bitfld.long 0x14 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x14 0.--7. 1. "CHIDX,DPPI channel that event RXFRAMESTART will publish to" line.long 0x18 "PUBLISH_RXFRAMEEND,Publish configuration for event RXFRAMEEND" bitfld.long 0x18 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x18 0.--7. 1. "CHIDX,DPPI channel that event RXFRAMEEND will publish to" line.long 0x1C "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x1C 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x1C 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A8++0xB line.long 0x0 "PUBLISH_RXERROR,Publish configuration for event RXERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXERROR will publish to" line.long 0x4 "PUBLISH_ENDRX,Publish configuration for event ENDRX" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to" line.long 0x8 "PUBLISH_ENDTX,Publish configuration for event ENDTX" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to" group.long 0x1B8++0x3 line.long 0x0 "PUBLISH_AUTOCOLRESSTARTED,Publish configuration for event AUTOCOLRESSTARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event AUTOCOLRESSTARTED will publish to" group.long 0x1C8++0xB line.long 0x0 "PUBLISH_COLLISION,Publish configuration for event COLLISION" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COLLISION will publish to" line.long 0x4 "PUBLISH_SELECTED,Publish configuration for event SELECTED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event SELECTED will publish to" line.long 0x8 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 5. "TXFRAMEEND_ENABLERXDATA,Shortcut between event TXFRAMEEND and task ENABLERXDATA" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "FIELDLOST_SENSE,Shortcut between event FIELDLOST and task SENSE" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "FIELDDETECTED_ACTIVATE,Shortcut between event FIELDDETECTED and task ACTIVATE" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 20. "STARTED,Enable or disable interrupt for event STARTED" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "SELECTED,Enable or disable interrupt for event SELECTED" "0: Disable,1: Enable" newline bitfld.long 0x0 18. "COLLISION,Enable or disable interrupt for event COLLISION" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "AUTOCOLRESSTARTED,Enable or disable interrupt for event AUTOCOLRESSTARTED" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "RXERROR,Enable or disable interrupt for event RXERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "RXFRAMEEND,Enable or disable interrupt for event RXFRAMEEND" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "RXFRAMESTART,Enable or disable interrupt for event RXFRAMESTART" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "TXFRAMEEND,Enable or disable interrupt for event TXFRAMEEND" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "TXFRAMESTART,Enable or disable interrupt for event TXFRAMESTART" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "FIELDLOST,Enable or disable interrupt for event FIELDLOST" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "FIELDDETECTED,Enable or disable interrupt for event FIELDDETECTED" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "READY,Enable or disable interrupt for event READY" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 20. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "SELECTED,Write '1' to enable interrupt for event SELECTED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 18. "COLLISION,Write '1' to enable interrupt for event COLLISION" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "AUTOCOLRESSTARTED,Write '1' to enable interrupt for event AUTOCOLRESSTARTED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 12. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "RXERROR,Write '1' to enable interrupt for event RXERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "RXFRAMEEND,Write '1' to enable interrupt for event RXFRAMEEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "RXFRAMESTART,Write '1' to enable interrupt for event RXFRAMESTART" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "TXFRAMEEND,Write '1' to enable interrupt for event TXFRAMEEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "TXFRAMESTART,Write '1' to enable interrupt for event TXFRAMESTART" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "FIELDLOST,Write '1' to enable interrupt for event FIELDLOST" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "FIELDDETECTED,Write '1' to enable interrupt for event FIELDDETECTED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 20. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "SELECTED,Write '1' to disable interrupt for event SELECTED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 18. "COLLISION,Write '1' to disable interrupt for event COLLISION" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "AUTOCOLRESSTARTED,Write '1' to disable interrupt for event AUTOCOLRESSTARTED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 12. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "RXERROR,Write '1' to disable interrupt for event RXERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "RXFRAMEEND,Write '1' to disable interrupt for event RXFRAMEEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "RXFRAMESTART,Write '1' to disable interrupt for event RXFRAMESTART" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "TXFRAMEEND,Write '1' to disable interrupt for event TXFRAMEEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "TXFRAMESTART,Write '1' to disable interrupt for event TXFRAMESTART" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "FIELDLOST,Write '1' to disable interrupt for event FIELDLOST" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "FIELDDETECTED,Write '1' to disable interrupt for event FIELDDETECTED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Disable" group.long 0x404++0x3 line.long 0x0 "ERRORSTATUS,NFC Error Status register" bitfld.long 0x0 0. "FRAMEDELAYTIMEOUT,No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX" "0,1" tree "FRAMESTATUS" base ad:0x400D640C group.long 0x0++0x3 line.long 0x0 "RX,Result of last incoming frame" bitfld.long 0x0 3. "OVERRUN,Overrun detected" "0: No overrun detected,1: Overrun error" bitfld.long 0x0 2. "PARITYSTATUS,Parity status of received frame" "0: Frame received with parity OK,1: Frame received with parity error" bitfld.long 0x0 0. "CRCERROR,No valid end of frame (EoF) detected" "0: Valid CRC detected,1: CRC received does not match local check" tree.end base ad:0x400D6000 newline rgroup.long 0x410++0x3 newline line.long 0x0 "NFCTAGSTATE,Current operating state of NFC tag" bitfld.long 0x0 0.--2. "NFCTAGSTATE,NfcTag state" "0: Disabled or sense,?,2: RampUp,3: Idle,4: Receive,5: FrameDelay,6: Transmit,?" rgroup.long 0x420++0x3 line.long 0x0 "SLEEPSTATE,Sleep state during automatic collision resolution" bitfld.long 0x0 0. "SLEEPSTATE,Reflects the sleep state during automatic collision resolution. Set to IDLE" "0: State is IDLE.,1: State is SLEEP_A." rgroup.long 0x43C++0x3 line.long 0x0 "FIELDPRESENT,Indicates the presence or not of a valid field" bitfld.long 0x0 1. "LOCKDETECT,Indicates if the low level has locked to the field" "0: Not locked to field,1: Locked to field" newline bitfld.long 0x0 0. "FIELDPRESENT,Indicates if a valid field is present. Available only in the activated state." "0: No valid field detected,1: Valid field detected" group.long 0x504++0x13 line.long 0x0 "FRAMEDELAYMIN,Minimum frame delay" hexmask.long.word 0x0 0.--15. 1. "FRAMEDELAYMIN,Minimum frame delay in number of 13.56 MHz clock cycles" line.long 0x4 "FRAMEDELAYMAX,Maximum frame delay" hexmask.long.tbyte 0x4 0.--19. 1. "FRAMEDELAYMAX,Maximum frame delay in number of 13.56 MHz clock cycles" line.long 0x8 "FRAMEDELAYMODE,Configuration register for the Frame Delay Timer" bitfld.long 0x8 0.--1. "FRAMEDELAYMODE,Configuration register for the Frame Delay Timer" "0: Transmission is independent of frame timer and..,1: Frame is transmitted between FRAMEDELAYMIN and..,2: Frame is transmitted exactly at FRAMEDELAYMAX,3: Frame is transmitted on a bit grid between.." line.long 0xC "PACKETPTR,Packet pointer for TXD and RXD data storage in Data RAM" hexmask.long 0xC 0.--31. 1. "PTR,Packet pointer for TXD and RXD data storage in Data RAM. This address is a byte-aligned RAM address." line.long 0x10 "MAXLEN,Size of the RAM buffer allocated to TXD and RXD data storage each" hexmask.long.word 0x10 0.--8. 1. "MAXLEN,Size of the RAM buffer allocated to TXD and RXD data storage each" tree "NFCID1" base ad:0x400D6590 group.long 0x0++0xB line.long 0x0 "LAST,Last NFCID1 part (4. 7 or 10 bytes ID)" hexmask.long.byte 0x0 24.--31. 1. "W,NFCID1 byte W" hexmask.long.byte 0x0 16.--23. 1. "X,NFCID1 byte X" hexmask.long.byte 0x0 8.--15. 1. "Y,NFCID1 byte Y" hexmask.long.byte 0x0 0.--7. 1. "Z,NFCID1 byte Z (very last byte sent)" line.long 0x4 "SECONDLAST,Second last NFCID1 part (7 or 10 bytes ID)" hexmask.long.byte 0x4 16.--23. 1. "T,NFCID1 byte T" hexmask.long.byte 0x4 8.--15. 1. "U,NFCID1 byte U" hexmask.long.byte 0x4 0.--7. 1. "V,NFCID1 byte V" line.long 0x8 "THIRDLAST,Third last NFCID1 part (10 bytes ID)" hexmask.long.byte 0x8 16.--23. 1. "Q,NFCID1 byte Q" hexmask.long.byte 0x8 8.--15. 1. "R,NFCID1 byte R" hexmask.long.byte 0x8 0.--7. 1. "S,NFCID1 byte S" tree.end tree "RXD" base ad:0x400D6520 group.long 0x0++0x3 line.long 0x0 "FRAMECONFIG,Configuration of incoming frames" bitfld.long 0x0 4. "CRCMODERX,CRC mode for incoming frames" "0: CRC is not expected in RX frames,1: Last 16 bits in RX frame is CRC CRC is checked.." bitfld.long 0x0 2. "SOF,SoF expected or not in RX frames" "0: SoF symbol is not expected in RX frames,1: SoF symbol is expected in RX frames" newline bitfld.long 0x0 0. "PARITY,Indicates if parity expected in RX frame" "0: Parity is not expected in RX frames,1: Parity is expected in RX frames" rgroup.long 0x4++0x3 line.long 0x0 "AMOUNT,Size of last incoming frame" hexmask.long.word 0x0 3.--11. 1. "RXDATABYTES,Number of complete bytes received in the frame (including CRC but excluding parity and SoF/EoF framing)" bitfld.long 0x0 0.--2. "RXDATABITS,Number of bits in the last byte in the frame if less than 8 (including CRC but excluding parity and SoF/EoF framing)." "0,1,2,3,4,5,6,7" tree.end tree "TXD" base ad:0x400D6518 group.long 0x0++0x7 line.long 0x0 "FRAMECONFIG,Configuration of outgoing frames" bitfld.long 0x0 4. "CRCMODETX,CRC mode for outgoing frames" "0: CRC is not added to the frame,1: 16 bit CRC added to the frame based on all the.." bitfld.long 0x0 2. "SOF,Adding SoF or not in TX frames" "0: SoF symbol not added,1: SoF symbol added" newline bitfld.long 0x0 1. "DISCARDMODE,Discarding unused bits at start or end of a frame" "0: Unused bits are discarded at end of frame (EoF),1: Unused bits are discarded at start of frame (SoF)" bitfld.long 0x0 0. "PARITY,Indicates if parity is added to the frame" "0: Parity is not added to TX frames,1: Parity is added to TX frames" line.long 0x4 "AMOUNT,Size of outgoing frame" hexmask.long.word 0x4 3.--11. 1. "TXDATABYTES,Number of complete bytes that shall be included in the frame excluding CRC parity and framing." bitfld.long 0x4 0.--2. "TXDATABITS,Number of bits in the last or first byte read from RAM that shall be included in the frame (excluding parity bit)." "0,1,2,3,4,5,6,7" tree.end base ad:0x400D6000 newline group.long 0x52C++0x3 newline line.long 0x0 "MODULATIONCTRL,Enables the modulation output to a GPIO pin which can be connected to a second external antenna." bitfld.long 0x0 0.--1. "MODULATIONCTRL,Configuration of modulation control." "0: Invalid defaults to same behaviour as for Internal,1: Use internal modulator only,2: Output digital modulation signal to a GPIO pin.,3: Use internal modulator and output digital.." group.long 0x538++0x3 line.long 0x0 "MODULATIONPSEL,Pin select for Modulation control" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" newline bitfld.long 0x0 5.--6. "PORT,Port number" "0,1,2,3" newline hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" group.long 0x550++0x3 line.long 0x0 "MODE,Configure EasyDMA mode" bitfld.long 0x0 0.--1. "LPOP,Enable low-power operation or use low-latency" "0: Low-latency operation,1: Low-power operation,?,3: Full Low-power operation" group.long 0x59C++0xB line.long 0x0 "AUTOCOLRESCONFIG,Controls the auto collision resolution function. This setting must be done before the NFCT peripheral is activated." bitfld.long 0x0 0. "MODE,Enables/disables auto collision resolution" "0: Auto collision resolution enabled,1: Auto collision resolution disabled" line.long 0x4 "SENSRES,NFC-A SENS_RES auto-response settings" hexmask.long.byte 0x4 12.--15. 1. "RFU74,Reserved for future use. Shall be 0." newline hexmask.long.byte 0x4 8.--11. 1. "PLATFCONFIG,Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in the NFC Forum NFC Digital Protocol Technical Specification" newline bitfld.long 0x4 6.--7. "NFCIDSIZE,NFCID1 size. This value is used by the auto collision resolution engine." "0: NFCID1 size: single (4 bytes),1: NFCID1 size: double (7 bytes),2: NFCID1 size: triple (10 bytes),?" newline bitfld.long 0x4 5. "RFU5,Reserved for future use. Shall be 0." "0,1" newline hexmask.long.byte 0x4 0.--4. 1. "BITFRAMESDD,Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum NFC Digital Protocol Technical Specification" line.long 0x8 "SELRES,NFC-A SEL_RES auto-response settings" bitfld.long 0x8 7. "RFU7,Reserved for future use. Shall be 0." "0,1" newline bitfld.long 0x8 5.--6. "PROTOCOL,Protocol as defined by the b7:b6 of SEL_RES response in the NFC Forum NFC Digital Protocol Technical Specification" "0,1,2,3" newline bitfld.long 0x8 3.--4. "RFU43,Reserved for future use. Shall be 0." "0,1,2,3" newline bitfld.long 0x8 2. "CASCADE,Cascade as defined by the b3 of SEL_RES response in the NFC Forum NFC Digital Protocol Technical Specification (controlled by hardware shall be 0)" "0,1" newline bitfld.long 0x8 0.--1. "RFU10,Reserved for future use. Shall be 0." "0,1,2,3" group.long 0x6D4++0x3 line.long 0x0 "PADCONFIG,NFC pad configuration" bitfld.long 0x0 0. "ENABLE,Enable NFC pads" "0: NFC pads are used as GPIO pins,1: The NFC pads are configured as NFC antenna pins" tree.end tree "GLOBAL_NFCT_S" base ad:0x500D6000 wgroup.long 0x0++0x13 line.long 0x0 "TASKS_ACTIVATE,Activate NFCT peripheral for incoming and outgoing frames. change state to activated" bitfld.long 0x0 0. "TASKS_ACTIVATE,Activate NFCT peripheral for incoming and outgoing frames change state to activated" "?,1: Trigger task" line.long 0x4 "TASKS_DISABLE,Disable NFCT peripheral" bitfld.long 0x4 0. "TASKS_DISABLE,Disable NFCT peripheral" "?,1: Trigger task" line.long 0x8 "TASKS_SENSE,Enable NFC sense field mode. change state to sense mode" bitfld.long 0x8 0. "TASKS_SENSE,Enable NFC sense field mode change state to sense mode" "?,1: Trigger task" line.long 0xC "TASKS_STARTTX,Start transmission of an outgoing frame. change state to transmit" bitfld.long 0xC 0. "TASKS_STARTTX,Start transmission of an outgoing frame change state to transmit" "?,1: Trigger task" line.long 0x10 "TASKS_STOPTX,Stops an issued transmission of a frame" bitfld.long 0x10 0. "TASKS_STOPTX,Stops an issued transmission of a frame" "?,1: Trigger task" wgroup.long 0x1C++0x3 line.long 0x0 "TASKS_ENABLERXDATA,Initializes the EasyDMA for receive." bitfld.long 0x0 0. "TASKS_ENABLERXDATA,Initializes the EasyDMA for receive." "?,1: Trigger task" wgroup.long 0x24++0x7 line.long 0x0 "TASKS_GOIDLE,Force state machine to IDLE state" bitfld.long 0x0 0. "TASKS_GOIDLE,Force state machine to IDLE state" "?,1: Trigger task" line.long 0x4 "TASKS_GOSLEEP,Force state machine to SLEEP_A state" bitfld.long 0x4 0. "TASKS_GOSLEEP,Force state machine to SLEEP_A state" "?,1: Trigger task" group.long 0x80++0x13 line.long 0x0 "SUBSCRIBE_ACTIVATE,Subscribe configuration for task ACTIVATE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ACTIVATE will subscribe to" line.long 0x4 "SUBSCRIBE_DISABLE,Subscribe configuration for task DISABLE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task DISABLE will subscribe to" line.long 0x8 "SUBSCRIBE_SENSE,Subscribe configuration for task SENSE" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task SENSE will subscribe to" line.long 0xC "SUBSCRIBE_STARTTX,Subscribe configuration for task STARTTX" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task STARTTX will subscribe to" line.long 0x10 "SUBSCRIBE_STOPTX,Subscribe configuration for task STOPTX" bitfld.long 0x10 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that task STOPTX will subscribe to" group.long 0x9C++0x3 line.long 0x0 "SUBSCRIBE_ENABLERXDATA,Subscribe configuration for task ENABLERXDATA" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLERXDATA will subscribe to" group.long 0xA4++0x7 line.long 0x0 "SUBSCRIBE_GOIDLE,Subscribe configuration for task GOIDLE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task GOIDLE will subscribe to" line.long 0x4 "SUBSCRIBE_GOSLEEP,Subscribe configuration for task GOSLEEP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task GOSLEEP will subscribe to" group.long 0x100++0x1F line.long 0x0 "EVENTS_READY,The NFCT peripheral is ready to receive and send frames" bitfld.long 0x0 0. "EVENTS_READY,The NFCT peripheral is ready to receive and send frames" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_FIELDDETECTED,Remote NFC field detected" bitfld.long 0x4 0. "EVENTS_FIELDDETECTED,Remote NFC field detected" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_FIELDLOST,Remote NFC field lost" bitfld.long 0x8 0. "EVENTS_FIELDLOST,Remote NFC field lost" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_TXFRAMESTART,Marks the start of the first symbol of a transmitted frame" bitfld.long 0xC 0. "EVENTS_TXFRAMESTART,Marks the start of the first symbol of a transmitted frame" "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_TXFRAMEEND,Marks the end of the last transmitted on-air symbol of a frame" bitfld.long 0x10 0. "EVENTS_TXFRAMEEND,Marks the end of the last transmitted on-air symbol of a frame" "0: Event not generated,1: Event generated" line.long 0x14 "EVENTS_RXFRAMESTART,Marks the end of the first symbol of a received frame" bitfld.long 0x14 0. "EVENTS_RXFRAMESTART,Marks the end of the first symbol of a received frame" "0: Event not generated,1: Event generated" line.long 0x18 "EVENTS_RXFRAMEEND,Received data has been checked (CRC. parity) and transferred to RAM. and EasyDMA has ended accessing the RX buffer" bitfld.long 0x18 0. "EVENTS_RXFRAMEEND,Received data has been checked (CRC parity) and transferred to RAM and EasyDMA has ended accessing the RX buffer" "0: Event not generated,1: Event generated" line.long 0x1C "EVENTS_ERROR,NFC error reported. The ERRORSTATUS register contains details on the source of the error." bitfld.long 0x1C 0. "EVENTS_ERROR,NFC error reported. The ERRORSTATUS register contains details on the source of the error." "0: Event not generated,1: Event generated" group.long 0x128++0xB line.long 0x0 "EVENTS_RXERROR,NFC RX frame error reported. The FRAMESTATUS.RX register contains details on the source of the error." bitfld.long 0x0 0. "EVENTS_RXERROR,NFC RX frame error reported. The FRAMESTATUS.RX register contains details on the source of the error." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_ENDRX,RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full." bitfld.long 0x4 0. "EVENTS_ENDRX,RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full." "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ENDTX,Transmission of data in RAM has ended. and EasyDMA has ended accessing the TX buffer" bitfld.long 0x8 0. "EVENTS_ENDTX,Transmission of data in RAM has ended and EasyDMA has ended accessing the TX buffer" "0: Event not generated,1: Event generated" group.long 0x138++0x3 line.long 0x0 "EVENTS_AUTOCOLRESSTARTED,Auto collision resolution process has started" bitfld.long 0x0 0. "EVENTS_AUTOCOLRESSTARTED,Auto collision resolution process has started" "0: Event not generated,1: Event generated" group.long 0x148++0xB line.long 0x0 "EVENTS_COLLISION,NFC auto collision resolution error reported." bitfld.long 0x0 0. "EVENTS_COLLISION,NFC auto collision resolution error reported." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_SELECTED,NFC auto collision resolution successfully completed" bitfld.long 0x4 0. "EVENTS_SELECTED,NFC auto collision resolution successfully completed" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_STARTED,EasyDMA is ready to receive or send frames." bitfld.long 0x8 0. "EVENTS_STARTED,EasyDMA is ready to receive or send frames." "0: Event not generated,1: Event generated" group.long 0x180++0x1F line.long 0x0 "PUBLISH_READY,Publish configuration for event READY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x4 "PUBLISH_FIELDDETECTED,Publish configuration for event FIELDDETECTED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event FIELDDETECTED will publish to" line.long 0x8 "PUBLISH_FIELDLOST,Publish configuration for event FIELDLOST" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event FIELDLOST will publish to" line.long 0xC "PUBLISH_TXFRAMESTART,Publish configuration for event TXFRAMESTART" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event TXFRAMESTART will publish to" line.long 0x10 "PUBLISH_TXFRAMEEND,Publish configuration for event TXFRAMEEND" bitfld.long 0x10 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that event TXFRAMEEND will publish to" line.long 0x14 "PUBLISH_RXFRAMESTART,Publish configuration for event RXFRAMESTART" bitfld.long 0x14 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x14 0.--7. 1. "CHIDX,DPPI channel that event RXFRAMESTART will publish to" line.long 0x18 "PUBLISH_RXFRAMEEND,Publish configuration for event RXFRAMEEND" bitfld.long 0x18 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x18 0.--7. 1. "CHIDX,DPPI channel that event RXFRAMEEND will publish to" line.long 0x1C "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x1C 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x1C 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A8++0xB line.long 0x0 "PUBLISH_RXERROR,Publish configuration for event RXERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXERROR will publish to" line.long 0x4 "PUBLISH_ENDRX,Publish configuration for event ENDRX" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event ENDRX will publish to" line.long 0x8 "PUBLISH_ENDTX,Publish configuration for event ENDTX" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ENDTX will publish to" group.long 0x1B8++0x3 line.long 0x0 "PUBLISH_AUTOCOLRESSTARTED,Publish configuration for event AUTOCOLRESSTARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event AUTOCOLRESSTARTED will publish to" group.long 0x1C8++0xB line.long 0x0 "PUBLISH_COLLISION,Publish configuration for event COLLISION" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COLLISION will publish to" line.long 0x4 "PUBLISH_SELECTED,Publish configuration for event SELECTED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event SELECTED will publish to" line.long 0x8 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 5. "TXFRAMEEND_ENABLERXDATA,Shortcut between event TXFRAMEEND and task ENABLERXDATA" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "FIELDLOST_SENSE,Shortcut between event FIELDLOST and task SENSE" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "FIELDDETECTED_ACTIVATE,Shortcut between event FIELDDETECTED and task ACTIVATE" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 20. "STARTED,Enable or disable interrupt for event STARTED" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "SELECTED,Enable or disable interrupt for event SELECTED" "0: Disable,1: Enable" newline bitfld.long 0x0 18. "COLLISION,Enable or disable interrupt for event COLLISION" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "AUTOCOLRESSTARTED,Enable or disable interrupt for event AUTOCOLRESSTARTED" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "ENDTX,Enable or disable interrupt for event ENDTX" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "ENDRX,Enable or disable interrupt for event ENDRX" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "RXERROR,Enable or disable interrupt for event RXERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "RXFRAMEEND,Enable or disable interrupt for event RXFRAMEEND" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "RXFRAMESTART,Enable or disable interrupt for event RXFRAMESTART" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "TXFRAMEEND,Enable or disable interrupt for event TXFRAMEEND" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "TXFRAMESTART,Enable or disable interrupt for event TXFRAMESTART" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "FIELDLOST,Enable or disable interrupt for event FIELDLOST" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "FIELDDETECTED,Enable or disable interrupt for event FIELDDETECTED" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "READY,Enable or disable interrupt for event READY" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 20. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "SELECTED,Write '1' to enable interrupt for event SELECTED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 18. "COLLISION,Write '1' to enable interrupt for event COLLISION" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "AUTOCOLRESSTARTED,Write '1' to enable interrupt for event AUTOCOLRESSTARTED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 12. "ENDTX,Write '1' to enable interrupt for event ENDTX" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "ENDRX,Write '1' to enable interrupt for event ENDRX" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "RXERROR,Write '1' to enable interrupt for event RXERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "RXFRAMEEND,Write '1' to enable interrupt for event RXFRAMEEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "RXFRAMESTART,Write '1' to enable interrupt for event RXFRAMESTART" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "TXFRAMEEND,Write '1' to enable interrupt for event TXFRAMEEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "TXFRAMESTART,Write '1' to enable interrupt for event TXFRAMESTART" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "FIELDLOST,Write '1' to enable interrupt for event FIELDLOST" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "FIELDDETECTED,Write '1' to enable interrupt for event FIELDDETECTED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 20. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "SELECTED,Write '1' to disable interrupt for event SELECTED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 18. "COLLISION,Write '1' to disable interrupt for event COLLISION" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "AUTOCOLRESSTARTED,Write '1' to disable interrupt for event AUTOCOLRESSTARTED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 12. "ENDTX,Write '1' to disable interrupt for event ENDTX" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "ENDRX,Write '1' to disable interrupt for event ENDRX" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "RXERROR,Write '1' to disable interrupt for event RXERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "RXFRAMEEND,Write '1' to disable interrupt for event RXFRAMEEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "RXFRAMESTART,Write '1' to disable interrupt for event RXFRAMESTART" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "TXFRAMEEND,Write '1' to disable interrupt for event TXFRAMEEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "TXFRAMESTART,Write '1' to disable interrupt for event TXFRAMESTART" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "FIELDLOST,Write '1' to disable interrupt for event FIELDLOST" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "FIELDDETECTED,Write '1' to disable interrupt for event FIELDDETECTED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Disable" group.long 0x404++0x3 line.long 0x0 "ERRORSTATUS,NFC Error Status register" bitfld.long 0x0 0. "FRAMEDELAYTIMEOUT,No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX" "0,1" tree "FRAMESTATUS" base ad:0x500D6000 group.long 0x0++0x3 line.long 0x0 "RX,Result of last incoming frame" bitfld.long 0x0 3. "OVERRUN,Overrun detected" "0: No overrun detected,1: Overrun error" bitfld.long 0x0 2. "PARITYSTATUS,Parity status of received frame" "0: Frame received with parity OK,1: Frame received with parity error" bitfld.long 0x0 0. "CRCERROR,No valid end of frame (EoF) detected" "0: Valid CRC detected,1: CRC received does not match local check" tree.end base ad:0x500D6000 newline rgroup.long 0x410++0x3 newline line.long 0x0 "NFCTAGSTATE,Current operating state of NFC tag" bitfld.long 0x0 0.--2. "NFCTAGSTATE,NfcTag state" "0: Disabled or sense,?,2: RampUp,3: Idle,4: Receive,5: FrameDelay,6: Transmit,?" rgroup.long 0x420++0x3 line.long 0x0 "SLEEPSTATE,Sleep state during automatic collision resolution" bitfld.long 0x0 0. "SLEEPSTATE,Reflects the sleep state during automatic collision resolution. Set to IDLE" "0: State is IDLE.,1: State is SLEEP_A." rgroup.long 0x43C++0x3 line.long 0x0 "FIELDPRESENT,Indicates the presence or not of a valid field" bitfld.long 0x0 1. "LOCKDETECT,Indicates if the low level has locked to the field" "0: Not locked to field,1: Locked to field" newline bitfld.long 0x0 0. "FIELDPRESENT,Indicates if a valid field is present. Available only in the activated state." "0: No valid field detected,1: Valid field detected" group.long 0x504++0x13 line.long 0x0 "FRAMEDELAYMIN,Minimum frame delay" hexmask.long.word 0x0 0.--15. 1. "FRAMEDELAYMIN,Minimum frame delay in number of 13.56 MHz clock cycles" line.long 0x4 "FRAMEDELAYMAX,Maximum frame delay" hexmask.long.tbyte 0x4 0.--19. 1. "FRAMEDELAYMAX,Maximum frame delay in number of 13.56 MHz clock cycles" line.long 0x8 "FRAMEDELAYMODE,Configuration register for the Frame Delay Timer" bitfld.long 0x8 0.--1. "FRAMEDELAYMODE,Configuration register for the Frame Delay Timer" "0: Transmission is independent of frame timer and..,1: Frame is transmitted between FRAMEDELAYMIN and..,2: Frame is transmitted exactly at FRAMEDELAYMAX,3: Frame is transmitted on a bit grid between.." line.long 0xC "PACKETPTR,Packet pointer for TXD and RXD data storage in Data RAM" hexmask.long 0xC 0.--31. 1. "PTR,Packet pointer for TXD and RXD data storage in Data RAM. This address is a byte-aligned RAM address." line.long 0x10 "MAXLEN,Size of the RAM buffer allocated to TXD and RXD data storage each" hexmask.long.word 0x10 0.--8. 1. "MAXLEN,Size of the RAM buffer allocated to TXD and RXD data storage each" tree "NFCID1" base ad:0x500D6000 group.long 0x0++0xB line.long 0x0 "LAST,Last NFCID1 part (4. 7 or 10 bytes ID)" hexmask.long.byte 0x0 24.--31. 1. "W,NFCID1 byte W" hexmask.long.byte 0x0 16.--23. 1. "X,NFCID1 byte X" hexmask.long.byte 0x0 8.--15. 1. "Y,NFCID1 byte Y" hexmask.long.byte 0x0 0.--7. 1. "Z,NFCID1 byte Z (very last byte sent)" line.long 0x4 "SECONDLAST,Second last NFCID1 part (7 or 10 bytes ID)" hexmask.long.byte 0x4 16.--23. 1. "T,NFCID1 byte T" hexmask.long.byte 0x4 8.--15. 1. "U,NFCID1 byte U" hexmask.long.byte 0x4 0.--7. 1. "V,NFCID1 byte V" line.long 0x8 "THIRDLAST,Third last NFCID1 part (10 bytes ID)" hexmask.long.byte 0x8 16.--23. 1. "Q,NFCID1 byte Q" hexmask.long.byte 0x8 8.--15. 1. "R,NFCID1 byte R" hexmask.long.byte 0x8 0.--7. 1. "S,NFCID1 byte S" tree.end tree "RXD" base ad:0x500D6000 group.long 0x0++0x3 line.long 0x0 "FRAMECONFIG,Configuration of incoming frames" bitfld.long 0x0 4. "CRCMODERX,CRC mode for incoming frames" "0: CRC is not expected in RX frames,1: Last 16 bits in RX frame is CRC CRC is checked.." bitfld.long 0x0 2. "SOF,SoF expected or not in RX frames" "0: SoF symbol is not expected in RX frames,1: SoF symbol is expected in RX frames" newline bitfld.long 0x0 0. "PARITY,Indicates if parity expected in RX frame" "0: Parity is not expected in RX frames,1: Parity is expected in RX frames" rgroup.long 0x4++0x3 line.long 0x0 "AMOUNT,Size of last incoming frame" hexmask.long.word 0x0 3.--11. 1. "RXDATABYTES,Number of complete bytes received in the frame (including CRC but excluding parity and SoF/EoF framing)" bitfld.long 0x0 0.--2. "RXDATABITS,Number of bits in the last byte in the frame if less than 8 (including CRC but excluding parity and SoF/EoF framing)." "0,1,2,3,4,5,6,7" tree.end tree "TXD" base ad:0x500D6000 group.long 0x0++0x7 line.long 0x0 "FRAMECONFIG,Configuration of outgoing frames" bitfld.long 0x0 4. "CRCMODETX,CRC mode for outgoing frames" "0: CRC is not added to the frame,1: 16 bit CRC added to the frame based on all the.." bitfld.long 0x0 2. "SOF,Adding SoF or not in TX frames" "0: SoF symbol not added,1: SoF symbol added" newline bitfld.long 0x0 1. "DISCARDMODE,Discarding unused bits at start or end of a frame" "0: Unused bits are discarded at end of frame (EoF),1: Unused bits are discarded at start of frame (SoF)" bitfld.long 0x0 0. "PARITY,Indicates if parity is added to the frame" "0: Parity is not added to TX frames,1: Parity is added to TX frames" line.long 0x4 "AMOUNT,Size of outgoing frame" hexmask.long.word 0x4 3.--11. 1. "TXDATABYTES,Number of complete bytes that shall be included in the frame excluding CRC parity and framing." bitfld.long 0x4 0.--2. "TXDATABITS,Number of bits in the last or first byte read from RAM that shall be included in the frame (excluding parity bit)." "0,1,2,3,4,5,6,7" tree.end base ad:0x500D6000 newline group.long 0x52C++0x3 newline line.long 0x0 "MODULATIONCTRL,Enables the modulation output to a GPIO pin which can be connected to a second external antenna." bitfld.long 0x0 0.--1. "MODULATIONCTRL,Configuration of modulation control." "0: Invalid defaults to same behaviour as for Internal,1: Use internal modulator only,2: Output digital modulation signal to a GPIO pin.,3: Use internal modulator and output digital.." group.long 0x538++0x3 line.long 0x0 "MODULATIONPSEL,Pin select for Modulation control" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" newline bitfld.long 0x0 5.--6. "PORT,Port number" "0,1,2,3" newline hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" group.long 0x550++0x3 line.long 0x0 "MODE,Configure EasyDMA mode" bitfld.long 0x0 0.--1. "LPOP,Enable low-power operation or use low-latency" "0: Low-latency operation,1: Low-power operation,?,3: Full Low-power operation" group.long 0x59C++0xB line.long 0x0 "AUTOCOLRESCONFIG,Controls the auto collision resolution function. This setting must be done before the NFCT peripheral is activated." bitfld.long 0x0 0. "MODE,Enables/disables auto collision resolution" "0: Auto collision resolution enabled,1: Auto collision resolution disabled" line.long 0x4 "SENSRES,NFC-A SENS_RES auto-response settings" hexmask.long.byte 0x4 12.--15. 1. "RFU74,Reserved for future use. Shall be 0." newline hexmask.long.byte 0x4 8.--11. 1. "PLATFCONFIG,Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in the NFC Forum NFC Digital Protocol Technical Specification" newline bitfld.long 0x4 6.--7. "NFCIDSIZE,NFCID1 size. This value is used by the auto collision resolution engine." "0: NFCID1 size: single (4 bytes),1: NFCID1 size: double (7 bytes),2: NFCID1 size: triple (10 bytes),?" newline bitfld.long 0x4 5. "RFU5,Reserved for future use. Shall be 0." "0,1" newline hexmask.long.byte 0x4 0.--4. 1. "BITFRAMESDD,Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum NFC Digital Protocol Technical Specification" line.long 0x8 "SELRES,NFC-A SEL_RES auto-response settings" bitfld.long 0x8 7. "RFU7,Reserved for future use. Shall be 0." "0,1" newline bitfld.long 0x8 5.--6. "PROTOCOL,Protocol as defined by the b7:b6 of SEL_RES response in the NFC Forum NFC Digital Protocol Technical Specification" "0,1,2,3" newline bitfld.long 0x8 3.--4. "RFU43,Reserved for future use. Shall be 0." "0,1,2,3" newline bitfld.long 0x8 2. "CASCADE,Cascade as defined by the b3 of SEL_RES response in the NFC Forum NFC Digital Protocol Technical Specification (controlled by hardware shall be 0)" "0,1" newline bitfld.long 0x8 0.--1. "RFU10,Reserved for future use. Shall be 0." "0,1,2,3" group.long 0x6D4++0x3 line.long 0x0 "PADCONFIG,NFC pad configuration" bitfld.long 0x0 0. "ENABLE,Enable NFC pads" "0: NFC pads are used as GPIO pins,1: The NFC pads are configured as NFC antenna pins" tree.end tree.end tree "OSCILLATORS" base ad:0x0 tree "GLOBAL_OSCILLATORS_NS" base ad:0x40120000 tree "PLL" base ad:0x40120800 group.long 0x0++0x3 line.long 0x0 "FREQ,Set speed of MCU power domain. including CPU" bitfld.long 0x0 0.--1. "FREQ,Select CPU speed" "?,1: 128 MHz,?,3: 64 MHz" rgroup.long 0x4++0x3 line.long 0x0 "CURRENTFREQ,Current speed of MCU power domain. including CPU" bitfld.long 0x0 0.--1. "CURRENTFREQ,Active CPU speed" "?,1: 128 MHz,?,3: 64 MHz" tree.end tree "XOSC32KI" base ad:0x40120900 group.long 0x4++0x3 line.long 0x0 "INTCAP,Programmable capacitance of XL1 and XL2" hexmask.long.byte 0x0 0.--4. 1. "VAL,Crystal load capacitor as seen by the crystal across its terminals including pin capacitance but excluding PCB stray capacitance." tree.end tree "XOSC32M" base ad:0x40120700 tree "CONFIG (Unspecified)" base ad:0x40120714 group.long 0x8++0x3 line.long 0x0 "INTCAP,Crystal load capacitor as seen by the crystal across its terminals. including pin capacitance but excluding PCB stray capacitance." hexmask.long.byte 0x0 0.--5. 1. "VAL,Crystal load capacitor value" tree.end tree.end tree.end tree "GLOBAL_OSCILLATORS_S" base ad:0x50120000 tree "PLL" base ad:0x50120000 group.long 0x0++0x3 line.long 0x0 "FREQ,Set speed of MCU power domain. including CPU" bitfld.long 0x0 0.--1. "FREQ,Select CPU speed" "?,1: 128 MHz,?,3: 64 MHz" rgroup.long 0x4++0x3 line.long 0x0 "CURRENTFREQ,Current speed of MCU power domain. including CPU" bitfld.long 0x0 0.--1. "CURRENTFREQ,Active CPU speed" "?,1: 128 MHz,?,3: 64 MHz" tree.end tree "XOSC32KI" base ad:0x50120000 group.long 0x4++0x3 line.long 0x0 "INTCAP,Programmable capacitance of XL1 and XL2" hexmask.long.byte 0x0 0.--4. 1. "VAL,Crystal load capacitor as seen by the crystal across its terminals including pin capacitance but excluding PCB stray capacitance." tree.end tree "XOSC32M" base ad:0x50120000 tree "CONFIG (Unspecified)" base ad:0x40120714 group.long 0x8++0x3 line.long 0x0 "INTCAP,Crystal load capacitor as seen by the crystal across its terminals. including pin capacitance but excluding PCB stray capacitance." hexmask.long.byte 0x0 0.--5. 1. "VAL,Crystal load capacitor value" tree.end tree.end tree.end tree.end tree "PDM (Pulse Density Modulation Interface)" base ad:0x0 tree "GLOBAL_PDM20_NS" base ad:0x400D0000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Starts continuous PDM transfer" bitfld.long 0x0 0. "TASKS_START,Starts continuous PDM transfer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stops PDM transfer" bitfld.long 0x4 0. "TASKS_STOP,Stops PDM transfer" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0xB line.long 0x0 "EVENTS_STARTED,PDM transfer has started" bitfld.long 0x0 0. "EVENTS_STARTED,PDM transfer has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,PDM transfer has finished" bitfld.long 0x4 0. "EVENTS_STOPPED,PDM transfer has finished" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM" bitfld.long 0x8 0. "EVENTS_END,The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400D0110 group.long 0x0++0x3 line.long 0x0 "BUSERROR,This event is generated if an error occurs during the bus transfer." bitfld.long 0x0 0. "BUSERROR,This event is generated if an error occurs during the bus transfer." "0: Event not generated,1: Event generated" tree.end base ad:0x400D0000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x400D0190 group.long 0x0++0x3 line.long 0x0 "BUSERROR,Publish configuration for event DMA.BUSERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event DMA.BUSERROR will publish to" tree.end base ad:0x400D0000 newline group.long 0x300++0xB newline line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 4. "DMABUSERROR,Enable or disable interrupt for event DMABUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 2. "END,Enable or disable interrupt for event END" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" bitfld.long 0x0 0. "STARTED,Enable or disable interrupt for event STARTED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 4. "DMABUSERROR,Write '1' to enable interrupt for event DMABUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 4. "DMABUSERROR,Write '1' to disable interrupt for event DMABUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 4. "DMABUSERROR,Read pending status of interrupt for event DMABUSERROR" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 2. "END,Read pending status of interrupt for event END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "STOPPED,Read pending status of interrupt for event STOPPED" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 0. "STARTED,Read pending status of interrupt for event STARTED" "0: Read: Not pending,1: Read: Pending" group.long 0x500++0x3 line.long 0x0 "ENABLE,PDM module enable register" bitfld.long 0x0 0. "ENABLE,Enable or disable PDM module" "0: Disable,1: Enable" group.long 0x508++0x3 line.long 0x0 "MODE,Defines the routing of the connected PDM microphone signals" bitfld.long 0x0 1. "EDGE,Defines on which PDM_CLK edge left (or mono) is sampled." "0: Left (or mono) is sampled on rising edge of..,1: Left (or mono) is sampled on falling edge of.." bitfld.long 0x0 0. "OPERATION,Mono or stereo operation" "0: Sample and store one pair (left + right) of..,1: Sample and store two successive left samples (16.." group.long 0x518++0xB line.long 0x0 "GAINL,Left output gain adjustment" hexmask.long.byte 0x0 0.--6. 1. "GAINL,Left output gain adjustment in 0.5 dB steps around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust.." line.long 0x4 "GAINR,Right output gain adjustment" hexmask.long.byte 0x4 0.--6. 1. "GAINR,Right output gain adjustment in 0.5 dB steps around the default module gain (see electrical parameters)" line.long 0x8 "RATIO,Selects the decimation ratio between PDM_CLK and output sample rate. Change PRESCALER accordingly." bitfld.long 0x8 0.--2. "RATIO,Selects the decimation ratio between PDM_CLK and output sample rate" "0: Ratio of 32,1: Ratio of 48,2: Ratio of 50,3: Ratio of 64,4: Ratio of 80,5: Ratio of 96,6: Ratio of 100,7: Ratio of 128" tree "PSEL" base ad:0x400D0540 group.long 0x0++0x7 line.long 0x0 "CLK,Pin number configuration for PDM CLK signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "DIN,Pin number configuration for PDM DIN signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree "SAMPLE" base ad:0x400D0560 group.long 0x0++0x7 line.long 0x0 "PTR,RAM address pointer to write samples to with EasyDMA" hexmask.long 0x0 0.--31. 1. "SAMPLEPTR,Address to write PCM samples to over DMA" line.long 0x4 "MAXCNT,Number of bytes to allocate memory for in EasyDMA mode" hexmask.long.word 0x4 0.--14. 1. "BUFFSIZE,Length of DMA RAM allocation in number of bytes" tree.end base ad:0x400D0000 newline group.long 0x580++0x3 newline line.long 0x0 "PRESCALER,The prescaler is used to set the PDM frequency" hexmask.long.byte 0x0 0.--7. 1. "DIVISOR,Core clock to PDM divisor" tree "DMA" base ad:0x400D0700 group.long 0x0++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x4++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "GLOBAL_PDM20_S" base ad:0x500D0000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Starts continuous PDM transfer" bitfld.long 0x0 0. "TASKS_START,Starts continuous PDM transfer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stops PDM transfer" bitfld.long 0x4 0. "TASKS_STOP,Stops PDM transfer" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0xB line.long 0x0 "EVENTS_STARTED,PDM transfer has started" bitfld.long 0x0 0. "EVENTS_STARTED,PDM transfer has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,PDM transfer has finished" bitfld.long 0x4 0. "EVENTS_STOPPED,PDM transfer has finished" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM" bitfld.long 0x8 0. "EVENTS_END,The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500D0000 group.long 0x0++0x3 line.long 0x0 "BUSERROR,This event is generated if an error occurs during the bus transfer." bitfld.long 0x0 0. "BUSERROR,This event is generated if an error occurs during the bus transfer." "0: Event not generated,1: Event generated" tree.end base ad:0x500D0000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x500D0000 group.long 0x0++0x3 line.long 0x0 "BUSERROR,Publish configuration for event DMA.BUSERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event DMA.BUSERROR will publish to" tree.end base ad:0x500D0000 newline group.long 0x300++0xB newline line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 4. "DMABUSERROR,Enable or disable interrupt for event DMABUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 2. "END,Enable or disable interrupt for event END" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" bitfld.long 0x0 0. "STARTED,Enable or disable interrupt for event STARTED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 4. "DMABUSERROR,Write '1' to enable interrupt for event DMABUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 4. "DMABUSERROR,Write '1' to disable interrupt for event DMABUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 4. "DMABUSERROR,Read pending status of interrupt for event DMABUSERROR" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 2. "END,Read pending status of interrupt for event END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "STOPPED,Read pending status of interrupt for event STOPPED" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 0. "STARTED,Read pending status of interrupt for event STARTED" "0: Read: Not pending,1: Read: Pending" group.long 0x500++0x3 line.long 0x0 "ENABLE,PDM module enable register" bitfld.long 0x0 0. "ENABLE,Enable or disable PDM module" "0: Disable,1: Enable" group.long 0x508++0x3 line.long 0x0 "MODE,Defines the routing of the connected PDM microphone signals" bitfld.long 0x0 1. "EDGE,Defines on which PDM_CLK edge left (or mono) is sampled." "0: Left (or mono) is sampled on rising edge of..,1: Left (or mono) is sampled on falling edge of.." bitfld.long 0x0 0. "OPERATION,Mono or stereo operation" "0: Sample and store one pair (left + right) of..,1: Sample and store two successive left samples (16.." group.long 0x518++0xB line.long 0x0 "GAINL,Left output gain adjustment" hexmask.long.byte 0x0 0.--6. 1. "GAINL,Left output gain adjustment in 0.5 dB steps around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust.." line.long 0x4 "GAINR,Right output gain adjustment" hexmask.long.byte 0x4 0.--6. 1. "GAINR,Right output gain adjustment in 0.5 dB steps around the default module gain (see electrical parameters)" line.long 0x8 "RATIO,Selects the decimation ratio between PDM_CLK and output sample rate. Change PRESCALER accordingly." bitfld.long 0x8 0.--2. "RATIO,Selects the decimation ratio between PDM_CLK and output sample rate" "0: Ratio of 32,1: Ratio of 48,2: Ratio of 50,3: Ratio of 64,4: Ratio of 80,5: Ratio of 96,6: Ratio of 100,7: Ratio of 128" tree "PSEL" base ad:0x500D0000 group.long 0x0++0x7 line.long 0x0 "CLK,Pin number configuration for PDM CLK signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "DIN,Pin number configuration for PDM DIN signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree "SAMPLE" base ad:0x500D0000 group.long 0x0++0x7 line.long 0x0 "PTR,RAM address pointer to write samples to with EasyDMA" hexmask.long 0x0 0.--31. 1. "SAMPLEPTR,Address to write PCM samples to over DMA" line.long 0x4 "MAXCNT,Number of bytes to allocate memory for in EasyDMA mode" hexmask.long.word 0x4 0.--14. 1. "BUFFSIZE,Length of DMA RAM allocation in number of bytes" tree.end base ad:0x500D0000 newline group.long 0x580++0x3 newline line.long 0x0 "PRESCALER,The prescaler is used to set the PDM frequency" hexmask.long.byte 0x0 0.--7. 1. "DIVISOR,Core clock to PDM divisor" tree "DMA" base ad:0x500D0000 group.long 0x0++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x4++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "GLOBAL_PDM21_NS" base ad:0x400D1000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Starts continuous PDM transfer" bitfld.long 0x0 0. "TASKS_START,Starts continuous PDM transfer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stops PDM transfer" bitfld.long 0x4 0. "TASKS_STOP,Stops PDM transfer" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0xB line.long 0x0 "EVENTS_STARTED,PDM transfer has started" bitfld.long 0x0 0. "EVENTS_STARTED,PDM transfer has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,PDM transfer has finished" bitfld.long 0x4 0. "EVENTS_STOPPED,PDM transfer has finished" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM" bitfld.long 0x8 0. "EVENTS_END,The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400D1000 group.long 0x0++0x3 line.long 0x0 "BUSERROR,This event is generated if an error occurs during the bus transfer." bitfld.long 0x0 0. "BUSERROR,This event is generated if an error occurs during the bus transfer." "0: Event not generated,1: Event generated" tree.end base ad:0x400D1000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x400D1000 group.long 0x0++0x3 line.long 0x0 "BUSERROR,Publish configuration for event DMA.BUSERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event DMA.BUSERROR will publish to" tree.end base ad:0x400D1000 newline group.long 0x300++0xB newline line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 4. "DMABUSERROR,Enable or disable interrupt for event DMABUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 2. "END,Enable or disable interrupt for event END" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" bitfld.long 0x0 0. "STARTED,Enable or disable interrupt for event STARTED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 4. "DMABUSERROR,Write '1' to enable interrupt for event DMABUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 4. "DMABUSERROR,Write '1' to disable interrupt for event DMABUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 4. "DMABUSERROR,Read pending status of interrupt for event DMABUSERROR" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 2. "END,Read pending status of interrupt for event END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "STOPPED,Read pending status of interrupt for event STOPPED" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 0. "STARTED,Read pending status of interrupt for event STARTED" "0: Read: Not pending,1: Read: Pending" group.long 0x500++0x3 line.long 0x0 "ENABLE,PDM module enable register" bitfld.long 0x0 0. "ENABLE,Enable or disable PDM module" "0: Disable,1: Enable" group.long 0x508++0x3 line.long 0x0 "MODE,Defines the routing of the connected PDM microphone signals" bitfld.long 0x0 1. "EDGE,Defines on which PDM_CLK edge left (or mono) is sampled." "0: Left (or mono) is sampled on rising edge of..,1: Left (or mono) is sampled on falling edge of.." bitfld.long 0x0 0. "OPERATION,Mono or stereo operation" "0: Sample and store one pair (left + right) of..,1: Sample and store two successive left samples (16.." group.long 0x518++0xB line.long 0x0 "GAINL,Left output gain adjustment" hexmask.long.byte 0x0 0.--6. 1. "GAINL,Left output gain adjustment in 0.5 dB steps around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust.." line.long 0x4 "GAINR,Right output gain adjustment" hexmask.long.byte 0x4 0.--6. 1. "GAINR,Right output gain adjustment in 0.5 dB steps around the default module gain (see electrical parameters)" line.long 0x8 "RATIO,Selects the decimation ratio between PDM_CLK and output sample rate. Change PRESCALER accordingly." bitfld.long 0x8 0.--2. "RATIO,Selects the decimation ratio between PDM_CLK and output sample rate" "0: Ratio of 32,1: Ratio of 48,2: Ratio of 50,3: Ratio of 64,4: Ratio of 80,5: Ratio of 96,6: Ratio of 100,7: Ratio of 128" tree "PSEL" base ad:0x400D1000 group.long 0x0++0x7 line.long 0x0 "CLK,Pin number configuration for PDM CLK signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "DIN,Pin number configuration for PDM DIN signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree "SAMPLE" base ad:0x400D1000 group.long 0x0++0x7 line.long 0x0 "PTR,RAM address pointer to write samples to with EasyDMA" hexmask.long 0x0 0.--31. 1. "SAMPLEPTR,Address to write PCM samples to over DMA" line.long 0x4 "MAXCNT,Number of bytes to allocate memory for in EasyDMA mode" hexmask.long.word 0x4 0.--14. 1. "BUFFSIZE,Length of DMA RAM allocation in number of bytes" tree.end base ad:0x400D1000 newline group.long 0x580++0x3 newline line.long 0x0 "PRESCALER,The prescaler is used to set the PDM frequency" hexmask.long.byte 0x0 0.--7. 1. "DIVISOR,Core clock to PDM divisor" tree "DMA" base ad:0x400D1000 group.long 0x0++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x4++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "GLOBAL_PDM21_S" base ad:0x500D1000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Starts continuous PDM transfer" bitfld.long 0x0 0. "TASKS_START,Starts continuous PDM transfer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stops PDM transfer" bitfld.long 0x4 0. "TASKS_STOP,Stops PDM transfer" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0xB line.long 0x0 "EVENTS_STARTED,PDM transfer has started" bitfld.long 0x0 0. "EVENTS_STARTED,PDM transfer has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,PDM transfer has finished" bitfld.long 0x4 0. "EVENTS_STOPPED,PDM transfer has finished" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM" bitfld.long 0x8 0. "EVENTS_END,The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500D1000 group.long 0x0++0x3 line.long 0x0 "BUSERROR,This event is generated if an error occurs during the bus transfer." bitfld.long 0x0 0. "BUSERROR,This event is generated if an error occurs during the bus transfer." "0: Event not generated,1: Event generated" tree.end base ad:0x500D1000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x500D1000 group.long 0x0++0x3 line.long 0x0 "BUSERROR,Publish configuration for event DMA.BUSERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event DMA.BUSERROR will publish to" tree.end base ad:0x500D1000 newline group.long 0x300++0xB newline line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 4. "DMABUSERROR,Enable or disable interrupt for event DMABUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 2. "END,Enable or disable interrupt for event END" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" bitfld.long 0x0 0. "STARTED,Enable or disable interrupt for event STARTED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 4. "DMABUSERROR,Write '1' to enable interrupt for event DMABUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 4. "DMABUSERROR,Write '1' to disable interrupt for event DMABUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 4. "DMABUSERROR,Read pending status of interrupt for event DMABUSERROR" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 2. "END,Read pending status of interrupt for event END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "STOPPED,Read pending status of interrupt for event STOPPED" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 0. "STARTED,Read pending status of interrupt for event STARTED" "0: Read: Not pending,1: Read: Pending" group.long 0x500++0x3 line.long 0x0 "ENABLE,PDM module enable register" bitfld.long 0x0 0. "ENABLE,Enable or disable PDM module" "0: Disable,1: Enable" group.long 0x508++0x3 line.long 0x0 "MODE,Defines the routing of the connected PDM microphone signals" bitfld.long 0x0 1. "EDGE,Defines on which PDM_CLK edge left (or mono) is sampled." "0: Left (or mono) is sampled on rising edge of..,1: Left (or mono) is sampled on falling edge of.." bitfld.long 0x0 0. "OPERATION,Mono or stereo operation" "0: Sample and store one pair (left + right) of..,1: Sample and store two successive left samples (16.." group.long 0x518++0xB line.long 0x0 "GAINL,Left output gain adjustment" hexmask.long.byte 0x0 0.--6. 1. "GAINL,Left output gain adjustment in 0.5 dB steps around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust.." line.long 0x4 "GAINR,Right output gain adjustment" hexmask.long.byte 0x4 0.--6. 1. "GAINR,Right output gain adjustment in 0.5 dB steps around the default module gain (see electrical parameters)" line.long 0x8 "RATIO,Selects the decimation ratio between PDM_CLK and output sample rate. Change PRESCALER accordingly." bitfld.long 0x8 0.--2. "RATIO,Selects the decimation ratio between PDM_CLK and output sample rate" "0: Ratio of 32,1: Ratio of 48,2: Ratio of 50,3: Ratio of 64,4: Ratio of 80,5: Ratio of 96,6: Ratio of 100,7: Ratio of 128" tree "PSEL" base ad:0x500D1000 group.long 0x0++0x7 line.long 0x0 "CLK,Pin number configuration for PDM CLK signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "DIN,Pin number configuration for PDM DIN signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree "SAMPLE" base ad:0x500D1000 group.long 0x0++0x7 line.long 0x0 "PTR,RAM address pointer to write samples to with EasyDMA" hexmask.long 0x0 0.--31. 1. "SAMPLEPTR,Address to write PCM samples to over DMA" line.long 0x4 "MAXCNT,Number of bytes to allocate memory for in EasyDMA mode" hexmask.long.word 0x4 0.--14. 1. "BUFFSIZE,Length of DMA RAM allocation in number of bytes" tree.end base ad:0x500D1000 newline group.long 0x580++0x3 newline line.long 0x0 "PRESCALER,The prescaler is used to set the PDM frequency" hexmask.long.byte 0x0 0.--7. 1. "DIVISOR,Core clock to PDM divisor" tree "DMA" base ad:0x500D1000 group.long 0x0++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x4++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree.end tree "POWER" base ad:0x0 tree "GLOBAL_POWER_NS" base ad:0x4010E000 wgroup.long 0x30++0x7 line.long 0x0 "TASKS_CONSTLAT,Enable Constant Latency mode" bitfld.long 0x0 0. "TASKS_CONSTLAT,Enable Constant Latency mode" "?,1: Trigger task" line.long 0x4 "TASKS_LOWPWR,Enable Low-power mode (variable latency)" bitfld.long 0x4 0. "TASKS_LOWPWR,Enable Low-power mode (variable latency)" "?,1: Trigger task" group.long 0xB0++0x7 line.long 0x0 "SUBSCRIBE_CONSTLAT,Subscribe configuration for task CONSTLAT" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CONSTLAT will subscribe to" line.long 0x4 "SUBSCRIBE_LOWPWR,Subscribe configuration for task LOWPWR" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task LOWPWR will subscribe to" group.long 0x130++0xB line.long 0x0 "EVENTS_POFWARN,Power failure warning" bitfld.long 0x0 0. "EVENTS_POFWARN,Power failure warning" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_SLEEPENTER,CPU entered WFI/WFE sleep" bitfld.long 0x4 0. "EVENTS_SLEEPENTER,CPU entered WFI/WFE sleep" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_SLEEPEXIT,CPU exited WFI/WFE sleep" bitfld.long 0x8 0. "EVENTS_SLEEPEXIT,CPU exited WFI/WFE sleep" "0: Event not generated,1: Event generated" group.long 0x1B4++0x7 line.long 0x0 "PUBLISH_SLEEPENTER,Publish configuration for event SLEEPENTER" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SLEEPENTER will publish to" line.long 0x4 "PUBLISH_SLEEPEXIT,Publish configuration for event SLEEPEXIT" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event SLEEPEXIT will publish to" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 14. "SLEEPEXIT,Enable or disable interrupt for event SLEEPEXIT" "0: Disable,1: Enable" bitfld.long 0x0 13. "SLEEPENTER,Enable or disable interrupt for event SLEEPENTER" "0: Disable,1: Enable" bitfld.long 0x0 12. "POFWARN,Enable or disable interrupt for event POFWARN" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 14. "SLEEPEXIT,Write '1' to enable interrupt for event SLEEPEXIT" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "SLEEPENTER,Write '1' to enable interrupt for event SLEEPENTER" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "POFWARN,Write '1' to enable interrupt for event POFWARN" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 14. "SLEEPEXIT,Write '1' to disable interrupt for event SLEEPEXIT" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "SLEEPENTER,Write '1' to disable interrupt for event SLEEPENTER" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "POFWARN,Write '1' to disable interrupt for event POFWARN" "0: Read: Disabled,1: Disable" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x500)++0x3 line.long 0x0 "GPREGRET[$1],Description collection: General purpose retention register" hexmask.long.byte 0x0 0.--7. 1. "GPREGRET,General purpose retention register" repeat.end rgroup.long 0x520++0x3 line.long 0x0 "CONSTLATSTAT,Status of constant latency" bitfld.long 0x0 0. "STATUS,Status" "0: Constant latency disabled,1: Constant latency enabled" tree.end tree "GLOBAL_POWER_S" base ad:0x5010E000 wgroup.long 0x30++0x7 line.long 0x0 "TASKS_CONSTLAT,Enable Constant Latency mode" bitfld.long 0x0 0. "TASKS_CONSTLAT,Enable Constant Latency mode" "?,1: Trigger task" line.long 0x4 "TASKS_LOWPWR,Enable Low-power mode (variable latency)" bitfld.long 0x4 0. "TASKS_LOWPWR,Enable Low-power mode (variable latency)" "?,1: Trigger task" group.long 0xB0++0x7 line.long 0x0 "SUBSCRIBE_CONSTLAT,Subscribe configuration for task CONSTLAT" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CONSTLAT will subscribe to" line.long 0x4 "SUBSCRIBE_LOWPWR,Subscribe configuration for task LOWPWR" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task LOWPWR will subscribe to" group.long 0x130++0xB line.long 0x0 "EVENTS_POFWARN,Power failure warning" bitfld.long 0x0 0. "EVENTS_POFWARN,Power failure warning" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_SLEEPENTER,CPU entered WFI/WFE sleep" bitfld.long 0x4 0. "EVENTS_SLEEPENTER,CPU entered WFI/WFE sleep" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_SLEEPEXIT,CPU exited WFI/WFE sleep" bitfld.long 0x8 0. "EVENTS_SLEEPEXIT,CPU exited WFI/WFE sleep" "0: Event not generated,1: Event generated" group.long 0x1B4++0x7 line.long 0x0 "PUBLISH_SLEEPENTER,Publish configuration for event SLEEPENTER" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SLEEPENTER will publish to" line.long 0x4 "PUBLISH_SLEEPEXIT,Publish configuration for event SLEEPEXIT" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event SLEEPEXIT will publish to" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 14. "SLEEPEXIT,Enable or disable interrupt for event SLEEPEXIT" "0: Disable,1: Enable" bitfld.long 0x0 13. "SLEEPENTER,Enable or disable interrupt for event SLEEPENTER" "0: Disable,1: Enable" bitfld.long 0x0 12. "POFWARN,Enable or disable interrupt for event POFWARN" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 14. "SLEEPEXIT,Write '1' to enable interrupt for event SLEEPEXIT" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "SLEEPENTER,Write '1' to enable interrupt for event SLEEPENTER" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "POFWARN,Write '1' to enable interrupt for event POFWARN" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 14. "SLEEPEXIT,Write '1' to disable interrupt for event SLEEPEXIT" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "SLEEPENTER,Write '1' to disable interrupt for event SLEEPENTER" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "POFWARN,Write '1' to disable interrupt for event POFWARN" "0: Read: Disabled,1: Disable" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x500)++0x3 line.long 0x0 "GPREGRET[$1],Description collection: General purpose retention register" hexmask.long.byte 0x0 0.--7. 1. "GPREGRET,General purpose retention register" repeat.end rgroup.long 0x520++0x3 line.long 0x0 "CONSTLATSTAT,Status of constant latency" bitfld.long 0x0 0. "STATUS,Status" "0: Constant latency disabled,1: Constant latency enabled" tree.end tree.end tree "PPIB (PPI Bridge)" base ad:0x0 tree "GLOBAL_PPIB00_NS" base ad:0x40043000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x40043400 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB00_S" base ad:0x50043000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x50043000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB01_NS" base ad:0x40044000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x40044000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB01_S" base ad:0x50044000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x50044000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB10_NS" base ad:0x40083000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x40083000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB10_S" base ad:0x50083000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x50083000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB11_NS" base ad:0x40084000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x40084000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB11_S" base ad:0x50084000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x50084000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB20_NS" base ad:0x400C3000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x400C3000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB20_S" base ad:0x500C3000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x500C3000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB21_NS" base ad:0x400C4000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x400C4000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB21_S" base ad:0x500C4000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x500C4000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB22_NS" base ad:0x400C5000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x400C5000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB22_S" base ad:0x500C5000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x500C5000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB30_NS" base ad:0x40103000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x40103000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree "GLOBAL_PPIB30_S" base ad:0x50103000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_SEND[$1],Description collection: This task is unused. but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." bitfld.long 0x0 0. "TASKS_SEND,This task is unused but the PPIB provides the SUBSCRIBE task to connect SEND [n] task." "?,1: Trigger task" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_SEND[$1],Description collection: Subscribe configuration for task SEND[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SEND[n] will subscribe to" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_RECEIVE[$1],Description collection: This event is unused. but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." bitfld.long 0x0 0. "EVENTS_RECEIVE,This event is unused but the PPIB provides the PUBLISH event to connect RECEIVE [n] event." "0: Event not generated,1: Event generated" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_RECEIVE[$1],Description collection: Publish configuration for event RECEIVE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RECEIVE[n] will publish to" repeat.end tree "OVERFLOW" base ad:0x50103000 group.long 0x0++0x3 line.long 0x0 "SEND,The task overflow for SEND tasks using SUBSCRIBE_SEND. Write 0 to clear." bitfld.long 0x0 31. "SEND_31,The status for tasks overflow at SUBSCRIBE_SEND[31]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 30. "SEND_30,The status for tasks overflow at SUBSCRIBE_SEND[30]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 29. "SEND_29,The status for tasks overflow at SUBSCRIBE_SEND[29]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 28. "SEND_28,The status for tasks overflow at SUBSCRIBE_SEND[28]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 27. "SEND_27,The status for tasks overflow at SUBSCRIBE_SEND[27]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 26. "SEND_26,The status for tasks overflow at SUBSCRIBE_SEND[26]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 25. "SEND_25,The status for tasks overflow at SUBSCRIBE_SEND[25]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 24. "SEND_24,The status for tasks overflow at SUBSCRIBE_SEND[24]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 23. "SEND_23,The status for tasks overflow at SUBSCRIBE_SEND[23]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 22. "SEND_22,The status for tasks overflow at SUBSCRIBE_SEND[22]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 21. "SEND_21,The status for tasks overflow at SUBSCRIBE_SEND[21]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 20. "SEND_20,The status for tasks overflow at SUBSCRIBE_SEND[20]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 19. "SEND_19,The status for tasks overflow at SUBSCRIBE_SEND[19]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 18. "SEND_18,The status for tasks overflow at SUBSCRIBE_SEND[18]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 17. "SEND_17,The status for tasks overflow at SUBSCRIBE_SEND[17]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 16. "SEND_16,The status for tasks overflow at SUBSCRIBE_SEND[16]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 15. "SEND_15,The status for tasks overflow at SUBSCRIBE_SEND[15]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 14. "SEND_14,The status for tasks overflow at SUBSCRIBE_SEND[14]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 13. "SEND_13,The status for tasks overflow at SUBSCRIBE_SEND[13]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 12. "SEND_12,The status for tasks overflow at SUBSCRIBE_SEND[12]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 11. "SEND_11,The status for tasks overflow at SUBSCRIBE_SEND[11]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 10. "SEND_10,The status for tasks overflow at SUBSCRIBE_SEND[10]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 9. "SEND_9,The status for tasks overflow at SUBSCRIBE_SEND[9]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 8. "SEND_8,The status for tasks overflow at SUBSCRIBE_SEND[8]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 7. "SEND_7,The status for tasks overflow at SUBSCRIBE_SEND[7]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 6. "SEND_6,The status for tasks overflow at SUBSCRIBE_SEND[6]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 5. "SEND_5,The status for tasks overflow at SUBSCRIBE_SEND[5]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 4. "SEND_4,The status for tasks overflow at SUBSCRIBE_SEND[4]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 3. "SEND_3,The status for tasks overflow at SUBSCRIBE_SEND[3]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 2. "SEND_2,The status for tasks overflow at SUBSCRIBE_SEND[2]." "0: Task overflow is not happened.,1: Task overflow is happened." newline bitfld.long 0x0 1. "SEND_1,The status for tasks overflow at SUBSCRIBE_SEND[1]." "0: Task overflow is not happened.,1: Task overflow is happened." bitfld.long 0x0 0. "SEND_0,The status for tasks overflow at SUBSCRIBE_SEND[0]." "0: Task overflow is not happened.,1: Task overflow is happened." tree.end tree.end tree.end tree "PWM (Pulse Width Modulation)" base ad:0x0 tree "GLOBAL_PWM20_NS" base ad:0x400D2000 wgroup.long 0x4++0x7 line.long 0x0 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period. and stops sequence playback" bitfld.long 0x0 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task" line.long 0x4 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running." bitfld.long 0x4 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running." "?,1: Trigger task" tree "TASKS_DMA" base ad:0x400D2010 repeat 2. (list 0x0 0x1)(list ad:0x400D2010 ad:0x400D2018) tree "SEQ[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "START,Description cluster: Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Description cluster: Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end repeat.end tree.end base ad:0x400D2000 newline group.long 0x84++0x7 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x4 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x400D2090 repeat 2. (list 0x0 0x1)(list ad:0x400D2090 ad:0x400D2098) tree "SEQ[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "START,Description cluster: Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Description cluster: Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end repeat.end tree.end base ad:0x400D2000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,Response to STOP task. emitted when PWM pulses are no longer generated" bitfld.long 0x0 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x108)++0x3 line.long 0x0 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n" bitfld.long 0x0 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x110)++0x3 line.long 0x0 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n. when last value from RAM has been applied to wave counter" bitfld.long 0x0 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated" repeat.end group.long 0x118++0xB line.long 0x0 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" bitfld.long 0x0 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" bitfld.long 0x4 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_RAMUNDERFLOW,Emitted when retrieving from RAM does not complete in time for the PWM module" bitfld.long 0x8 0. "EVENTS_RAMUNDERFLOW,Emitted when retrieving from RAM does not complete in time for the PWM module" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400D2124 repeat 2. (list 0x0 0x1)(list ad:0x400D2124 ad:0x400D2130) tree "SEQ[$1]" base $2 group.long ($2)++0xB line.long 0x0 "END,Description cluster: Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Description cluster: Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,Description cluster: An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end repeat.end tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x13C)++0x3 line.long 0x0 "EVENTS_COMPAREMATCH[$1],Description collection: This event is generated when the compare matches for the compare channel [n]." bitfld.long 0x0 0. "EVENTS_COMPAREMATCH,This event is generated when the compare matches for the compare channel [n]." "0: Event not generated,1: Event generated" repeat.end group.long 0x184++0x3 line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x188)++0x3 line.long 0x0 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x190)++0x3 line.long 0x0 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to" repeat.end group.long 0x198++0xB line.long 0x0 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to" line.long 0x4 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to" line.long 0x8 "PUBLISH_RAMUNDERFLOW,Publish configuration for event RAMUNDERFLOW" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event RAMUNDERFLOW will publish to" tree "PUBLISH_DMA" base ad:0x400D21A4 repeat 2. (list 0x0 0x1)(list ad:0x400D21A4 ad:0x400D21B0) tree "SEQ[$1]" base $2 group.long ($2)++0xB line.long 0x0 "END,Description cluster: Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Description cluster: Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Description cluster: Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end repeat.end tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1BC)++0x3 line.long 0x0 "PUBLISH_COMPAREMATCH[$1],Description collection: Publish configuration for event COMPAREMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPAREMATCH[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 7. "DMA_SEQ1_BUSERROR_STOP,Shortcut between event DMA.SEQ[n].BUSERROR and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_SEQ0_BUSERROR_STOP,Shortcut between event DMA.SEQ[n].BUSERROR and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "RAMUNDERFLOW_STOP,Shortcut between event RAMUNDERFLOW and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "LOOPSDONE_DMA_SEQ1_START,Shortcut between event LOOPSDONE and task DMA.SEQ[n].START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "LOOPSDONE_DMA_SEQ0_START,Shortcut between event LOOPSDONE and task DMA.SEQ[n].START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "SEQEND1_STOP,Shortcut between event SEQEND[n] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "SEQEND0_STOP,Shortcut between event SEQEND[n] and task STOP" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 18. "COMPAREMATCH3,Enable or disable interrupt for event COMPAREMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPAREMATCH2,Enable or disable interrupt for event COMPAREMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "COMPAREMATCH1,Enable or disable interrupt for event COMPAREMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "COMPAREMATCH0,Enable or disable interrupt for event COMPAREMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "DMASEQ1BUSERROR,Enable or disable interrupt for event DMASEQ1BUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "DMASEQ1READY,Enable or disable interrupt for event DMASEQ1READY" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "DMASEQ1END,Enable or disable interrupt for event DMASEQ1END" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "DMASEQ0BUSERROR,Enable or disable interrupt for event DMASEQ0BUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "DMASEQ0READY,Enable or disable interrupt for event DMASEQ0READY" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "DMASEQ0END,Enable or disable interrupt for event DMASEQ0END" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "RAMUNDERFLOW,Enable or disable interrupt for event RAMUNDERFLOW" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 18. "COMPAREMATCH3,Write '1' to enable interrupt for event COMPAREMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPAREMATCH2,Write '1' to enable interrupt for event COMPAREMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "COMPAREMATCH1,Write '1' to enable interrupt for event COMPAREMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 15. "COMPAREMATCH0,Write '1' to enable interrupt for event COMPAREMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "DMASEQ1BUSERROR,Write '1' to enable interrupt for event DMASEQ1BUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 13. "DMASEQ1READY,Write '1' to enable interrupt for event DMASEQ1READY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 12. "DMASEQ1END,Write '1' to enable interrupt for event DMASEQ1END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "DMASEQ0BUSERROR,Write '1' to enable interrupt for event DMASEQ0BUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "DMASEQ0READY,Write '1' to enable interrupt for event DMASEQ0READY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "DMASEQ0END,Write '1' to enable interrupt for event DMASEQ0END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "RAMUNDERFLOW,Write '1' to enable interrupt for event RAMUNDERFLOW" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 18. "COMPAREMATCH3,Write '1' to disable interrupt for event COMPAREMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPAREMATCH2,Write '1' to disable interrupt for event COMPAREMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "COMPAREMATCH1,Write '1' to disable interrupt for event COMPAREMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 15. "COMPAREMATCH0,Write '1' to disable interrupt for event COMPAREMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "DMASEQ1BUSERROR,Write '1' to disable interrupt for event DMASEQ1BUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 13. "DMASEQ1READY,Write '1' to disable interrupt for event DMASEQ1READY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 12. "DMASEQ1END,Write '1' to disable interrupt for event DMASEQ1END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "DMASEQ0BUSERROR,Write '1' to disable interrupt for event DMASEQ0BUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "DMASEQ0READY,Write '1' to disable interrupt for event DMASEQ0READY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "DMASEQ0END,Write '1' to disable interrupt for event DMASEQ0END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "RAMUNDERFLOW,Write '1' to disable interrupt for event RAMUNDERFLOW" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 18. "COMPAREMATCH3,Read pending status of interrupt for event COMPAREMATCH[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 17. "COMPAREMATCH2,Read pending status of interrupt for event COMPAREMATCH[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 16. "COMPAREMATCH1,Read pending status of interrupt for event COMPAREMATCH[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 15. "COMPAREMATCH0,Read pending status of interrupt for event COMPAREMATCH[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 14. "DMASEQ1BUSERROR,Read pending status of interrupt for event DMASEQ1BUSERROR" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 13. "DMASEQ1READY,Read pending status of interrupt for event DMASEQ1READY" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 12. "DMASEQ1END,Read pending status of interrupt for event DMASEQ1END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "DMASEQ0BUSERROR,Read pending status of interrupt for event DMASEQ0BUSERROR" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "DMASEQ0READY,Read pending status of interrupt for event DMASEQ0READY" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "DMASEQ0END,Read pending status of interrupt for event DMASEQ0END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "RAMUNDERFLOW,Read pending status of interrupt for event RAMUNDERFLOW" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "LOOPSDONE,Read pending status of interrupt for event LOOPSDONE" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "SEQEND1,Read pending status of interrupt for event SEQEND[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "SEQEND0,Read pending status of interrupt for event SEQEND[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "SEQSTARTED1,Read pending status of interrupt for event SEQSTARTED[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "SEQSTARTED0,Read pending status of interrupt for event SEQSTARTED[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "STOPPED,Read pending status of interrupt for event STOPPED" "0: Read: Not pending,1: Read: Pending" group.long 0x500++0x1B line.long 0x0 "ENABLE,PWM module enable register" bitfld.long 0x0 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enable" line.long 0x4 "MODE,Selects operating mode of the wave counter" bitfld.long 0x4 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty cycle" line.long 0x8 "COUNTERTOP,Value up to which the pulse generator counter counts" hexmask.long.word 0x8 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used." line.long 0xC "PRESCALER,Configuration for PWM_CLK" bitfld.long 0xC 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)" line.long 0x10 "DECODER,Configuration of the decoder" bitfld.long 0x10 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded to.." newline bitfld.long 0x10 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM channels..,1: 1st half word (16-bit) used in channel 0..1; 2nd..,2: 1st half word (16-bit) in ch.0; 2nd in ch.1;..,3: 1st half word (16-bit) in ch.0; 2nd in ch.1;.." line.long 0x14 "LOOP,Number of playbacks of a loop" hexmask.long.word 0x14 0.--15. 1. "CNT,Number of playbacks of pattern cycles" line.long 0x18 "IDLEOUT,Configure the output value on the PWM channel during idle" bitfld.long 0x18 3. "VAL_3,Idle output value for PWM channel [3]" "0,1" newline bitfld.long 0x18 2. "VAL_2,Idle output value for PWM channel [2]" "0,1" newline bitfld.long 0x18 1. "VAL_1,Idle output value for PWM channel [1]" "0,1" newline bitfld.long 0x18 0. "VAL_0,Idle output value for PWM channel [0]" "0,1" repeat 2. (list 0x0 0x1)(list ad:0x400D2520 ad:0x400D2540) tree "SEQ[$1]" base $2 group.long ($2+0x8)++0x7 line.long 0x0 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register" hexmask.long.tbyte 0x0 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)" line.long 0x4 "ENDDELAY,Description cluster: Time added after the sequence" hexmask.long.tbyte 0x4 0.--23. 1. "CNT,Time added after the sequence in PWM periods" tree.end repeat.end base ad:0x400D2000 tree "DMA" base ad:0x400D2700 repeat 2. (list 0x0 0x1)(list ad:0x400D2700 ad:0x400D2724) tree "SEQ[$1]" base $2 group.long ($2+0x4)++0x7 line.long 0x0 "PTR,Description cluster: RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Description cluster: Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--14. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long ($2+0xC)++0x7 line.long 0x0 "AMOUNT,Description cluster: Number of bytes transferred in the last transaction. updated after the END event." hexmask.long.word 0x0 0.--14. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." line.long 0x4 "CURRENTAMOUNT,Description cluster: Number of bytes transferred in the current transaction" hexmask.long.word 0x4 0.--14. 1. "AMOUNT,Number of bytes transferred in the current transaction. Continuously updated." group.long ($2+0x1C)++0x3 line.long 0x0 "TERMINATEONBUSERROR,Description cluster: Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long ($2+0x20)++0x3 line.long 0x0 "BUSERRORADDRESS,Description cluster: Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end repeat.end tree.end tree "PSEL" base ad:0x400D2560 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "OUT[$1],Description collection: Output pin select for PWM channel n" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" repeat.end tree.end tree.end tree "GLOBAL_PWM20_S" base ad:0x500D2000 wgroup.long 0x4++0x7 line.long 0x0 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period. and stops sequence playback" bitfld.long 0x0 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task" line.long 0x4 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running." bitfld.long 0x4 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running." "?,1: Trigger task" tree "TASKS_DMA" base ad:0x500D2000 repeat 2. (list 0x0 0x1)(list ad:0x400D2010 ad:0x400D2018) tree "SEQ[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "START,Description cluster: Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Description cluster: Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end repeat.end tree.end base ad:0x500D2000 newline group.long 0x84++0x7 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x4 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x500D2000 repeat 2. (list 0x0 0x1)(list ad:0x400D2090 ad:0x400D2098) tree "SEQ[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "START,Description cluster: Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Description cluster: Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end repeat.end tree.end base ad:0x500D2000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,Response to STOP task. emitted when PWM pulses are no longer generated" bitfld.long 0x0 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x108)++0x3 line.long 0x0 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n" bitfld.long 0x0 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x110)++0x3 line.long 0x0 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n. when last value from RAM has been applied to wave counter" bitfld.long 0x0 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated" repeat.end group.long 0x118++0xB line.long 0x0 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" bitfld.long 0x0 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" bitfld.long 0x4 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_RAMUNDERFLOW,Emitted when retrieving from RAM does not complete in time for the PWM module" bitfld.long 0x8 0. "EVENTS_RAMUNDERFLOW,Emitted when retrieving from RAM does not complete in time for the PWM module" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500D2000 repeat 2. (list 0x0 0x1)(list ad:0x400D2124 ad:0x400D2130) tree "SEQ[$1]" base $2 group.long ($2)++0xB line.long 0x0 "END,Description cluster: Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Description cluster: Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,Description cluster: An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end repeat.end tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x13C)++0x3 line.long 0x0 "EVENTS_COMPAREMATCH[$1],Description collection: This event is generated when the compare matches for the compare channel [n]." bitfld.long 0x0 0. "EVENTS_COMPAREMATCH,This event is generated when the compare matches for the compare channel [n]." "0: Event not generated,1: Event generated" repeat.end group.long 0x184++0x3 line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x188)++0x3 line.long 0x0 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x190)++0x3 line.long 0x0 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to" repeat.end group.long 0x198++0xB line.long 0x0 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to" line.long 0x4 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to" line.long 0x8 "PUBLISH_RAMUNDERFLOW,Publish configuration for event RAMUNDERFLOW" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event RAMUNDERFLOW will publish to" tree "PUBLISH_DMA" base ad:0x500D2000 repeat 2. (list 0x0 0x1)(list ad:0x400D21A4 ad:0x400D21B0) tree "SEQ[$1]" base $2 group.long ($2)++0xB line.long 0x0 "END,Description cluster: Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Description cluster: Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Description cluster: Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end repeat.end tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1BC)++0x3 line.long 0x0 "PUBLISH_COMPAREMATCH[$1],Description collection: Publish configuration for event COMPAREMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPAREMATCH[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 7. "DMA_SEQ1_BUSERROR_STOP,Shortcut between event DMA.SEQ[n].BUSERROR and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_SEQ0_BUSERROR_STOP,Shortcut between event DMA.SEQ[n].BUSERROR and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "RAMUNDERFLOW_STOP,Shortcut between event RAMUNDERFLOW and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "LOOPSDONE_DMA_SEQ1_START,Shortcut between event LOOPSDONE and task DMA.SEQ[n].START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "LOOPSDONE_DMA_SEQ0_START,Shortcut between event LOOPSDONE and task DMA.SEQ[n].START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "SEQEND1_STOP,Shortcut between event SEQEND[n] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "SEQEND0_STOP,Shortcut between event SEQEND[n] and task STOP" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 18. "COMPAREMATCH3,Enable or disable interrupt for event COMPAREMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPAREMATCH2,Enable or disable interrupt for event COMPAREMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "COMPAREMATCH1,Enable or disable interrupt for event COMPAREMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "COMPAREMATCH0,Enable or disable interrupt for event COMPAREMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "DMASEQ1BUSERROR,Enable or disable interrupt for event DMASEQ1BUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "DMASEQ1READY,Enable or disable interrupt for event DMASEQ1READY" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "DMASEQ1END,Enable or disable interrupt for event DMASEQ1END" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "DMASEQ0BUSERROR,Enable or disable interrupt for event DMASEQ0BUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "DMASEQ0READY,Enable or disable interrupt for event DMASEQ0READY" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "DMASEQ0END,Enable or disable interrupt for event DMASEQ0END" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "RAMUNDERFLOW,Enable or disable interrupt for event RAMUNDERFLOW" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 18. "COMPAREMATCH3,Write '1' to enable interrupt for event COMPAREMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPAREMATCH2,Write '1' to enable interrupt for event COMPAREMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "COMPAREMATCH1,Write '1' to enable interrupt for event COMPAREMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 15. "COMPAREMATCH0,Write '1' to enable interrupt for event COMPAREMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "DMASEQ1BUSERROR,Write '1' to enable interrupt for event DMASEQ1BUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 13. "DMASEQ1READY,Write '1' to enable interrupt for event DMASEQ1READY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 12. "DMASEQ1END,Write '1' to enable interrupt for event DMASEQ1END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "DMASEQ0BUSERROR,Write '1' to enable interrupt for event DMASEQ0BUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "DMASEQ0READY,Write '1' to enable interrupt for event DMASEQ0READY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "DMASEQ0END,Write '1' to enable interrupt for event DMASEQ0END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "RAMUNDERFLOW,Write '1' to enable interrupt for event RAMUNDERFLOW" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 18. "COMPAREMATCH3,Write '1' to disable interrupt for event COMPAREMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPAREMATCH2,Write '1' to disable interrupt for event COMPAREMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "COMPAREMATCH1,Write '1' to disable interrupt for event COMPAREMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 15. "COMPAREMATCH0,Write '1' to disable interrupt for event COMPAREMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "DMASEQ1BUSERROR,Write '1' to disable interrupt for event DMASEQ1BUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 13. "DMASEQ1READY,Write '1' to disable interrupt for event DMASEQ1READY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 12. "DMASEQ1END,Write '1' to disable interrupt for event DMASEQ1END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "DMASEQ0BUSERROR,Write '1' to disable interrupt for event DMASEQ0BUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "DMASEQ0READY,Write '1' to disable interrupt for event DMASEQ0READY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "DMASEQ0END,Write '1' to disable interrupt for event DMASEQ0END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "RAMUNDERFLOW,Write '1' to disable interrupt for event RAMUNDERFLOW" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 18. "COMPAREMATCH3,Read pending status of interrupt for event COMPAREMATCH[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 17. "COMPAREMATCH2,Read pending status of interrupt for event COMPAREMATCH[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 16. "COMPAREMATCH1,Read pending status of interrupt for event COMPAREMATCH[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 15. "COMPAREMATCH0,Read pending status of interrupt for event COMPAREMATCH[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 14. "DMASEQ1BUSERROR,Read pending status of interrupt for event DMASEQ1BUSERROR" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 13. "DMASEQ1READY,Read pending status of interrupt for event DMASEQ1READY" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 12. "DMASEQ1END,Read pending status of interrupt for event DMASEQ1END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "DMASEQ0BUSERROR,Read pending status of interrupt for event DMASEQ0BUSERROR" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "DMASEQ0READY,Read pending status of interrupt for event DMASEQ0READY" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "DMASEQ0END,Read pending status of interrupt for event DMASEQ0END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "RAMUNDERFLOW,Read pending status of interrupt for event RAMUNDERFLOW" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "LOOPSDONE,Read pending status of interrupt for event LOOPSDONE" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "SEQEND1,Read pending status of interrupt for event SEQEND[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "SEQEND0,Read pending status of interrupt for event SEQEND[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "SEQSTARTED1,Read pending status of interrupt for event SEQSTARTED[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "SEQSTARTED0,Read pending status of interrupt for event SEQSTARTED[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "STOPPED,Read pending status of interrupt for event STOPPED" "0: Read: Not pending,1: Read: Pending" group.long 0x500++0x1B line.long 0x0 "ENABLE,PWM module enable register" bitfld.long 0x0 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enable" line.long 0x4 "MODE,Selects operating mode of the wave counter" bitfld.long 0x4 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty cycle" line.long 0x8 "COUNTERTOP,Value up to which the pulse generator counter counts" hexmask.long.word 0x8 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used." line.long 0xC "PRESCALER,Configuration for PWM_CLK" bitfld.long 0xC 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)" line.long 0x10 "DECODER,Configuration of the decoder" bitfld.long 0x10 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded to.." newline bitfld.long 0x10 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM channels..,1: 1st half word (16-bit) used in channel 0..1; 2nd..,2: 1st half word (16-bit) in ch.0; 2nd in ch.1;..,3: 1st half word (16-bit) in ch.0; 2nd in ch.1;.." line.long 0x14 "LOOP,Number of playbacks of a loop" hexmask.long.word 0x14 0.--15. 1. "CNT,Number of playbacks of pattern cycles" line.long 0x18 "IDLEOUT,Configure the output value on the PWM channel during idle" bitfld.long 0x18 3. "VAL_3,Idle output value for PWM channel [3]" "0,1" newline bitfld.long 0x18 2. "VAL_2,Idle output value for PWM channel [2]" "0,1" newline bitfld.long 0x18 1. "VAL_1,Idle output value for PWM channel [1]" "0,1" newline bitfld.long 0x18 0. "VAL_0,Idle output value for PWM channel [0]" "0,1" repeat 2. (list 0x0 0x1)(list ad:0x500D2520 ad:0x500D2540) tree "SEQ[$1]" base $2 group.long ($2+0x8)++0x7 line.long 0x0 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register" hexmask.long.tbyte 0x0 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)" line.long 0x4 "ENDDELAY,Description cluster: Time added after the sequence" hexmask.long.tbyte 0x4 0.--23. 1. "CNT,Time added after the sequence in PWM periods" tree.end repeat.end base ad:0x500D2000 tree "DMA" base ad:0x500D2000 repeat 2. (list 0x0 0x1)(list ad:0x400D2700 ad:0x400D2724) tree "SEQ[$1]" base $2 group.long ($2+0x4)++0x7 line.long 0x0 "PTR,Description cluster: RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Description cluster: Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--14. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long ($2+0xC)++0x7 line.long 0x0 "AMOUNT,Description cluster: Number of bytes transferred in the last transaction. updated after the END event." hexmask.long.word 0x0 0.--14. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." line.long 0x4 "CURRENTAMOUNT,Description cluster: Number of bytes transferred in the current transaction" hexmask.long.word 0x4 0.--14. 1. "AMOUNT,Number of bytes transferred in the current transaction. Continuously updated." group.long ($2+0x1C)++0x3 line.long 0x0 "TERMINATEONBUSERROR,Description cluster: Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long ($2+0x20)++0x3 line.long 0x0 "BUSERRORADDRESS,Description cluster: Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end repeat.end tree.end tree "PSEL" base ad:0x500D2000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "OUT[$1],Description collection: Output pin select for PWM channel n" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" repeat.end tree.end tree.end tree "GLOBAL_PWM21_NS" base ad:0x400D3000 wgroup.long 0x4++0x7 line.long 0x0 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period. and stops sequence playback" bitfld.long 0x0 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task" line.long 0x4 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running." bitfld.long 0x4 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running." "?,1: Trigger task" tree "TASKS_DMA" base ad:0x400D3000 repeat 2. (list 0x0 0x1)(list ad:0x400D2010 ad:0x400D2018) tree "SEQ[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "START,Description cluster: Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Description cluster: Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end repeat.end tree.end base ad:0x400D3000 newline group.long 0x84++0x7 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x4 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x400D3000 repeat 2. (list 0x0 0x1)(list ad:0x400D2090 ad:0x400D2098) tree "SEQ[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "START,Description cluster: Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Description cluster: Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end repeat.end tree.end base ad:0x400D3000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,Response to STOP task. emitted when PWM pulses are no longer generated" bitfld.long 0x0 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x108)++0x3 line.long 0x0 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n" bitfld.long 0x0 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x110)++0x3 line.long 0x0 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n. when last value from RAM has been applied to wave counter" bitfld.long 0x0 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated" repeat.end group.long 0x118++0xB line.long 0x0 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" bitfld.long 0x0 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" bitfld.long 0x4 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_RAMUNDERFLOW,Emitted when retrieving from RAM does not complete in time for the PWM module" bitfld.long 0x8 0. "EVENTS_RAMUNDERFLOW,Emitted when retrieving from RAM does not complete in time for the PWM module" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400D3000 repeat 2. (list 0x0 0x1)(list ad:0x400D2124 ad:0x400D2130) tree "SEQ[$1]" base $2 group.long ($2)++0xB line.long 0x0 "END,Description cluster: Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Description cluster: Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,Description cluster: An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end repeat.end tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x13C)++0x3 line.long 0x0 "EVENTS_COMPAREMATCH[$1],Description collection: This event is generated when the compare matches for the compare channel [n]." bitfld.long 0x0 0. "EVENTS_COMPAREMATCH,This event is generated when the compare matches for the compare channel [n]." "0: Event not generated,1: Event generated" repeat.end group.long 0x184++0x3 line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x188)++0x3 line.long 0x0 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x190)++0x3 line.long 0x0 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to" repeat.end group.long 0x198++0xB line.long 0x0 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to" line.long 0x4 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to" line.long 0x8 "PUBLISH_RAMUNDERFLOW,Publish configuration for event RAMUNDERFLOW" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event RAMUNDERFLOW will publish to" tree "PUBLISH_DMA" base ad:0x400D3000 repeat 2. (list 0x0 0x1)(list ad:0x400D21A4 ad:0x400D21B0) tree "SEQ[$1]" base $2 group.long ($2)++0xB line.long 0x0 "END,Description cluster: Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Description cluster: Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Description cluster: Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end repeat.end tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1BC)++0x3 line.long 0x0 "PUBLISH_COMPAREMATCH[$1],Description collection: Publish configuration for event COMPAREMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPAREMATCH[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 7. "DMA_SEQ1_BUSERROR_STOP,Shortcut between event DMA.SEQ[n].BUSERROR and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_SEQ0_BUSERROR_STOP,Shortcut between event DMA.SEQ[n].BUSERROR and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "RAMUNDERFLOW_STOP,Shortcut between event RAMUNDERFLOW and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "LOOPSDONE_DMA_SEQ1_START,Shortcut between event LOOPSDONE and task DMA.SEQ[n].START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "LOOPSDONE_DMA_SEQ0_START,Shortcut between event LOOPSDONE and task DMA.SEQ[n].START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "SEQEND1_STOP,Shortcut between event SEQEND[n] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "SEQEND0_STOP,Shortcut between event SEQEND[n] and task STOP" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 18. "COMPAREMATCH3,Enable or disable interrupt for event COMPAREMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPAREMATCH2,Enable or disable interrupt for event COMPAREMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "COMPAREMATCH1,Enable or disable interrupt for event COMPAREMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "COMPAREMATCH0,Enable or disable interrupt for event COMPAREMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "DMASEQ1BUSERROR,Enable or disable interrupt for event DMASEQ1BUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "DMASEQ1READY,Enable or disable interrupt for event DMASEQ1READY" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "DMASEQ1END,Enable or disable interrupt for event DMASEQ1END" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "DMASEQ0BUSERROR,Enable or disable interrupt for event DMASEQ0BUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "DMASEQ0READY,Enable or disable interrupt for event DMASEQ0READY" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "DMASEQ0END,Enable or disable interrupt for event DMASEQ0END" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "RAMUNDERFLOW,Enable or disable interrupt for event RAMUNDERFLOW" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 18. "COMPAREMATCH3,Write '1' to enable interrupt for event COMPAREMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPAREMATCH2,Write '1' to enable interrupt for event COMPAREMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "COMPAREMATCH1,Write '1' to enable interrupt for event COMPAREMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 15. "COMPAREMATCH0,Write '1' to enable interrupt for event COMPAREMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "DMASEQ1BUSERROR,Write '1' to enable interrupt for event DMASEQ1BUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 13. "DMASEQ1READY,Write '1' to enable interrupt for event DMASEQ1READY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 12. "DMASEQ1END,Write '1' to enable interrupt for event DMASEQ1END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "DMASEQ0BUSERROR,Write '1' to enable interrupt for event DMASEQ0BUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "DMASEQ0READY,Write '1' to enable interrupt for event DMASEQ0READY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "DMASEQ0END,Write '1' to enable interrupt for event DMASEQ0END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "RAMUNDERFLOW,Write '1' to enable interrupt for event RAMUNDERFLOW" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 18. "COMPAREMATCH3,Write '1' to disable interrupt for event COMPAREMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPAREMATCH2,Write '1' to disable interrupt for event COMPAREMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "COMPAREMATCH1,Write '1' to disable interrupt for event COMPAREMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 15. "COMPAREMATCH0,Write '1' to disable interrupt for event COMPAREMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "DMASEQ1BUSERROR,Write '1' to disable interrupt for event DMASEQ1BUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 13. "DMASEQ1READY,Write '1' to disable interrupt for event DMASEQ1READY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 12. "DMASEQ1END,Write '1' to disable interrupt for event DMASEQ1END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "DMASEQ0BUSERROR,Write '1' to disable interrupt for event DMASEQ0BUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "DMASEQ0READY,Write '1' to disable interrupt for event DMASEQ0READY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "DMASEQ0END,Write '1' to disable interrupt for event DMASEQ0END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "RAMUNDERFLOW,Write '1' to disable interrupt for event RAMUNDERFLOW" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 18. "COMPAREMATCH3,Read pending status of interrupt for event COMPAREMATCH[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 17. "COMPAREMATCH2,Read pending status of interrupt for event COMPAREMATCH[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 16. "COMPAREMATCH1,Read pending status of interrupt for event COMPAREMATCH[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 15. "COMPAREMATCH0,Read pending status of interrupt for event COMPAREMATCH[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 14. "DMASEQ1BUSERROR,Read pending status of interrupt for event DMASEQ1BUSERROR" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 13. "DMASEQ1READY,Read pending status of interrupt for event DMASEQ1READY" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 12. "DMASEQ1END,Read pending status of interrupt for event DMASEQ1END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "DMASEQ0BUSERROR,Read pending status of interrupt for event DMASEQ0BUSERROR" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "DMASEQ0READY,Read pending status of interrupt for event DMASEQ0READY" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "DMASEQ0END,Read pending status of interrupt for event DMASEQ0END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "RAMUNDERFLOW,Read pending status of interrupt for event RAMUNDERFLOW" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "LOOPSDONE,Read pending status of interrupt for event LOOPSDONE" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "SEQEND1,Read pending status of interrupt for event SEQEND[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "SEQEND0,Read pending status of interrupt for event SEQEND[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "SEQSTARTED1,Read pending status of interrupt for event SEQSTARTED[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "SEQSTARTED0,Read pending status of interrupt for event SEQSTARTED[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "STOPPED,Read pending status of interrupt for event STOPPED" "0: Read: Not pending,1: Read: Pending" group.long 0x500++0x1B line.long 0x0 "ENABLE,PWM module enable register" bitfld.long 0x0 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enable" line.long 0x4 "MODE,Selects operating mode of the wave counter" bitfld.long 0x4 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty cycle" line.long 0x8 "COUNTERTOP,Value up to which the pulse generator counter counts" hexmask.long.word 0x8 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used." line.long 0xC "PRESCALER,Configuration for PWM_CLK" bitfld.long 0xC 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)" line.long 0x10 "DECODER,Configuration of the decoder" bitfld.long 0x10 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded to.." newline bitfld.long 0x10 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM channels..,1: 1st half word (16-bit) used in channel 0..1; 2nd..,2: 1st half word (16-bit) in ch.0; 2nd in ch.1;..,3: 1st half word (16-bit) in ch.0; 2nd in ch.1;.." line.long 0x14 "LOOP,Number of playbacks of a loop" hexmask.long.word 0x14 0.--15. 1. "CNT,Number of playbacks of pattern cycles" line.long 0x18 "IDLEOUT,Configure the output value on the PWM channel during idle" bitfld.long 0x18 3. "VAL_3,Idle output value for PWM channel [3]" "0,1" newline bitfld.long 0x18 2. "VAL_2,Idle output value for PWM channel [2]" "0,1" newline bitfld.long 0x18 1. "VAL_1,Idle output value for PWM channel [1]" "0,1" newline bitfld.long 0x18 0. "VAL_0,Idle output value for PWM channel [0]" "0,1" repeat 2. (list 0x0 0x1)(list ad:0x400D3520 ad:0x400D3540) tree "SEQ[$1]" base $2 group.long ($2+0x8)++0x7 line.long 0x0 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register" hexmask.long.tbyte 0x0 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)" line.long 0x4 "ENDDELAY,Description cluster: Time added after the sequence" hexmask.long.tbyte 0x4 0.--23. 1. "CNT,Time added after the sequence in PWM periods" tree.end repeat.end base ad:0x400D3000 tree "DMA" base ad:0x400D3000 repeat 2. (list 0x0 0x1)(list ad:0x400D2700 ad:0x400D2724) tree "SEQ[$1]" base $2 group.long ($2+0x4)++0x7 line.long 0x0 "PTR,Description cluster: RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Description cluster: Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--14. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long ($2+0xC)++0x7 line.long 0x0 "AMOUNT,Description cluster: Number of bytes transferred in the last transaction. updated after the END event." hexmask.long.word 0x0 0.--14. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." line.long 0x4 "CURRENTAMOUNT,Description cluster: Number of bytes transferred in the current transaction" hexmask.long.word 0x4 0.--14. 1. "AMOUNT,Number of bytes transferred in the current transaction. Continuously updated." group.long ($2+0x1C)++0x3 line.long 0x0 "TERMINATEONBUSERROR,Description cluster: Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long ($2+0x20)++0x3 line.long 0x0 "BUSERRORADDRESS,Description cluster: Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end repeat.end tree.end tree "PSEL" base ad:0x400D3000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "OUT[$1],Description collection: Output pin select for PWM channel n" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" repeat.end tree.end tree.end tree "GLOBAL_PWM21_S" base ad:0x500D3000 wgroup.long 0x4++0x7 line.long 0x0 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period. and stops sequence playback" bitfld.long 0x0 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task" line.long 0x4 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running." bitfld.long 0x4 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running." "?,1: Trigger task" tree "TASKS_DMA" base ad:0x500D3000 repeat 2. (list 0x0 0x1)(list ad:0x400D2010 ad:0x400D2018) tree "SEQ[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "START,Description cluster: Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Description cluster: Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end repeat.end tree.end base ad:0x500D3000 newline group.long 0x84++0x7 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x4 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x500D3000 repeat 2. (list 0x0 0x1)(list ad:0x400D2090 ad:0x400D2098) tree "SEQ[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "START,Description cluster: Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Description cluster: Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end repeat.end tree.end base ad:0x500D3000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,Response to STOP task. emitted when PWM pulses are no longer generated" bitfld.long 0x0 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x108)++0x3 line.long 0x0 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n" bitfld.long 0x0 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x110)++0x3 line.long 0x0 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n. when last value from RAM has been applied to wave counter" bitfld.long 0x0 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated" repeat.end group.long 0x118++0xB line.long 0x0 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" bitfld.long 0x0 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" bitfld.long 0x4 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_RAMUNDERFLOW,Emitted when retrieving from RAM does not complete in time for the PWM module" bitfld.long 0x8 0. "EVENTS_RAMUNDERFLOW,Emitted when retrieving from RAM does not complete in time for the PWM module" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500D3000 repeat 2. (list 0x0 0x1)(list ad:0x400D2124 ad:0x400D2130) tree "SEQ[$1]" base $2 group.long ($2)++0xB line.long 0x0 "END,Description cluster: Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Description cluster: Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,Description cluster: An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end repeat.end tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x13C)++0x3 line.long 0x0 "EVENTS_COMPAREMATCH[$1],Description collection: This event is generated when the compare matches for the compare channel [n]." bitfld.long 0x0 0. "EVENTS_COMPAREMATCH,This event is generated when the compare matches for the compare channel [n]." "0: Event not generated,1: Event generated" repeat.end group.long 0x184++0x3 line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x188)++0x3 line.long 0x0 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x190)++0x3 line.long 0x0 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to" repeat.end group.long 0x198++0xB line.long 0x0 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to" line.long 0x4 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to" line.long 0x8 "PUBLISH_RAMUNDERFLOW,Publish configuration for event RAMUNDERFLOW" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event RAMUNDERFLOW will publish to" tree "PUBLISH_DMA" base ad:0x500D3000 repeat 2. (list 0x0 0x1)(list ad:0x400D21A4 ad:0x400D21B0) tree "SEQ[$1]" base $2 group.long ($2)++0xB line.long 0x0 "END,Description cluster: Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Description cluster: Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Description cluster: Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end repeat.end tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1BC)++0x3 line.long 0x0 "PUBLISH_COMPAREMATCH[$1],Description collection: Publish configuration for event COMPAREMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPAREMATCH[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 7. "DMA_SEQ1_BUSERROR_STOP,Shortcut between event DMA.SEQ[n].BUSERROR and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_SEQ0_BUSERROR_STOP,Shortcut between event DMA.SEQ[n].BUSERROR and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "RAMUNDERFLOW_STOP,Shortcut between event RAMUNDERFLOW and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "LOOPSDONE_DMA_SEQ1_START,Shortcut between event LOOPSDONE and task DMA.SEQ[n].START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "LOOPSDONE_DMA_SEQ0_START,Shortcut between event LOOPSDONE and task DMA.SEQ[n].START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "SEQEND1_STOP,Shortcut between event SEQEND[n] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "SEQEND0_STOP,Shortcut between event SEQEND[n] and task STOP" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 18. "COMPAREMATCH3,Enable or disable interrupt for event COMPAREMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPAREMATCH2,Enable or disable interrupt for event COMPAREMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "COMPAREMATCH1,Enable or disable interrupt for event COMPAREMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "COMPAREMATCH0,Enable or disable interrupt for event COMPAREMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "DMASEQ1BUSERROR,Enable or disable interrupt for event DMASEQ1BUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "DMASEQ1READY,Enable or disable interrupt for event DMASEQ1READY" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "DMASEQ1END,Enable or disable interrupt for event DMASEQ1END" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "DMASEQ0BUSERROR,Enable or disable interrupt for event DMASEQ0BUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "DMASEQ0READY,Enable or disable interrupt for event DMASEQ0READY" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "DMASEQ0END,Enable or disable interrupt for event DMASEQ0END" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "RAMUNDERFLOW,Enable or disable interrupt for event RAMUNDERFLOW" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 18. "COMPAREMATCH3,Write '1' to enable interrupt for event COMPAREMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPAREMATCH2,Write '1' to enable interrupt for event COMPAREMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "COMPAREMATCH1,Write '1' to enable interrupt for event COMPAREMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 15. "COMPAREMATCH0,Write '1' to enable interrupt for event COMPAREMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "DMASEQ1BUSERROR,Write '1' to enable interrupt for event DMASEQ1BUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 13. "DMASEQ1READY,Write '1' to enable interrupt for event DMASEQ1READY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 12. "DMASEQ1END,Write '1' to enable interrupt for event DMASEQ1END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "DMASEQ0BUSERROR,Write '1' to enable interrupt for event DMASEQ0BUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "DMASEQ0READY,Write '1' to enable interrupt for event DMASEQ0READY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "DMASEQ0END,Write '1' to enable interrupt for event DMASEQ0END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "RAMUNDERFLOW,Write '1' to enable interrupt for event RAMUNDERFLOW" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 18. "COMPAREMATCH3,Write '1' to disable interrupt for event COMPAREMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPAREMATCH2,Write '1' to disable interrupt for event COMPAREMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "COMPAREMATCH1,Write '1' to disable interrupt for event COMPAREMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 15. "COMPAREMATCH0,Write '1' to disable interrupt for event COMPAREMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "DMASEQ1BUSERROR,Write '1' to disable interrupt for event DMASEQ1BUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 13. "DMASEQ1READY,Write '1' to disable interrupt for event DMASEQ1READY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 12. "DMASEQ1END,Write '1' to disable interrupt for event DMASEQ1END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "DMASEQ0BUSERROR,Write '1' to disable interrupt for event DMASEQ0BUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "DMASEQ0READY,Write '1' to disable interrupt for event DMASEQ0READY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "DMASEQ0END,Write '1' to disable interrupt for event DMASEQ0END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "RAMUNDERFLOW,Write '1' to disable interrupt for event RAMUNDERFLOW" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 18. "COMPAREMATCH3,Read pending status of interrupt for event COMPAREMATCH[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 17. "COMPAREMATCH2,Read pending status of interrupt for event COMPAREMATCH[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 16. "COMPAREMATCH1,Read pending status of interrupt for event COMPAREMATCH[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 15. "COMPAREMATCH0,Read pending status of interrupt for event COMPAREMATCH[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 14. "DMASEQ1BUSERROR,Read pending status of interrupt for event DMASEQ1BUSERROR" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 13. "DMASEQ1READY,Read pending status of interrupt for event DMASEQ1READY" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 12. "DMASEQ1END,Read pending status of interrupt for event DMASEQ1END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "DMASEQ0BUSERROR,Read pending status of interrupt for event DMASEQ0BUSERROR" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "DMASEQ0READY,Read pending status of interrupt for event DMASEQ0READY" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "DMASEQ0END,Read pending status of interrupt for event DMASEQ0END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "RAMUNDERFLOW,Read pending status of interrupt for event RAMUNDERFLOW" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "LOOPSDONE,Read pending status of interrupt for event LOOPSDONE" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "SEQEND1,Read pending status of interrupt for event SEQEND[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "SEQEND0,Read pending status of interrupt for event SEQEND[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "SEQSTARTED1,Read pending status of interrupt for event SEQSTARTED[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "SEQSTARTED0,Read pending status of interrupt for event SEQSTARTED[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "STOPPED,Read pending status of interrupt for event STOPPED" "0: Read: Not pending,1: Read: Pending" group.long 0x500++0x1B line.long 0x0 "ENABLE,PWM module enable register" bitfld.long 0x0 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enable" line.long 0x4 "MODE,Selects operating mode of the wave counter" bitfld.long 0x4 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty cycle" line.long 0x8 "COUNTERTOP,Value up to which the pulse generator counter counts" hexmask.long.word 0x8 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used." line.long 0xC "PRESCALER,Configuration for PWM_CLK" bitfld.long 0xC 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)" line.long 0x10 "DECODER,Configuration of the decoder" bitfld.long 0x10 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded to.." newline bitfld.long 0x10 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM channels..,1: 1st half word (16-bit) used in channel 0..1; 2nd..,2: 1st half word (16-bit) in ch.0; 2nd in ch.1;..,3: 1st half word (16-bit) in ch.0; 2nd in ch.1;.." line.long 0x14 "LOOP,Number of playbacks of a loop" hexmask.long.word 0x14 0.--15. 1. "CNT,Number of playbacks of pattern cycles" line.long 0x18 "IDLEOUT,Configure the output value on the PWM channel during idle" bitfld.long 0x18 3. "VAL_3,Idle output value for PWM channel [3]" "0,1" newline bitfld.long 0x18 2. "VAL_2,Idle output value for PWM channel [2]" "0,1" newline bitfld.long 0x18 1. "VAL_1,Idle output value for PWM channel [1]" "0,1" newline bitfld.long 0x18 0. "VAL_0,Idle output value for PWM channel [0]" "0,1" repeat 2. (list 0x0 0x1)(list ad:0x500D3520 ad:0x500D3540) tree "SEQ[$1]" base $2 group.long ($2+0x8)++0x7 line.long 0x0 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register" hexmask.long.tbyte 0x0 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)" line.long 0x4 "ENDDELAY,Description cluster: Time added after the sequence" hexmask.long.tbyte 0x4 0.--23. 1. "CNT,Time added after the sequence in PWM periods" tree.end repeat.end base ad:0x500D3000 tree "DMA" base ad:0x500D3000 repeat 2. (list 0x0 0x1)(list ad:0x400D2700 ad:0x400D2724) tree "SEQ[$1]" base $2 group.long ($2+0x4)++0x7 line.long 0x0 "PTR,Description cluster: RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Description cluster: Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--14. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long ($2+0xC)++0x7 line.long 0x0 "AMOUNT,Description cluster: Number of bytes transferred in the last transaction. updated after the END event." hexmask.long.word 0x0 0.--14. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." line.long 0x4 "CURRENTAMOUNT,Description cluster: Number of bytes transferred in the current transaction" hexmask.long.word 0x4 0.--14. 1. "AMOUNT,Number of bytes transferred in the current transaction. Continuously updated." group.long ($2+0x1C)++0x3 line.long 0x0 "TERMINATEONBUSERROR,Description cluster: Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long ($2+0x20)++0x3 line.long 0x0 "BUSERRORADDRESS,Description cluster: Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end repeat.end tree.end tree "PSEL" base ad:0x500D3000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "OUT[$1],Description collection: Output pin select for PWM channel n" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" repeat.end tree.end tree.end tree "GLOBAL_PWM22_NS" base ad:0x400D4000 wgroup.long 0x4++0x7 line.long 0x0 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period. and stops sequence playback" bitfld.long 0x0 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task" line.long 0x4 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running." bitfld.long 0x4 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running." "?,1: Trigger task" tree "TASKS_DMA" base ad:0x400D4000 repeat 2. (list 0x0 0x1)(list ad:0x400D2010 ad:0x400D2018) tree "SEQ[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "START,Description cluster: Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Description cluster: Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end repeat.end tree.end base ad:0x400D4000 newline group.long 0x84++0x7 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x4 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x400D4000 repeat 2. (list 0x0 0x1)(list ad:0x400D2090 ad:0x400D2098) tree "SEQ[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "START,Description cluster: Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Description cluster: Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end repeat.end tree.end base ad:0x400D4000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,Response to STOP task. emitted when PWM pulses are no longer generated" bitfld.long 0x0 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x108)++0x3 line.long 0x0 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n" bitfld.long 0x0 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x110)++0x3 line.long 0x0 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n. when last value from RAM has been applied to wave counter" bitfld.long 0x0 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated" repeat.end group.long 0x118++0xB line.long 0x0 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" bitfld.long 0x0 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" bitfld.long 0x4 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_RAMUNDERFLOW,Emitted when retrieving from RAM does not complete in time for the PWM module" bitfld.long 0x8 0. "EVENTS_RAMUNDERFLOW,Emitted when retrieving from RAM does not complete in time for the PWM module" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400D4000 repeat 2. (list 0x0 0x1)(list ad:0x400D2124 ad:0x400D2130) tree "SEQ[$1]" base $2 group.long ($2)++0xB line.long 0x0 "END,Description cluster: Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Description cluster: Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,Description cluster: An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end repeat.end tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x13C)++0x3 line.long 0x0 "EVENTS_COMPAREMATCH[$1],Description collection: This event is generated when the compare matches for the compare channel [n]." bitfld.long 0x0 0. "EVENTS_COMPAREMATCH,This event is generated when the compare matches for the compare channel [n]." "0: Event not generated,1: Event generated" repeat.end group.long 0x184++0x3 line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x188)++0x3 line.long 0x0 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x190)++0x3 line.long 0x0 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to" repeat.end group.long 0x198++0xB line.long 0x0 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to" line.long 0x4 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to" line.long 0x8 "PUBLISH_RAMUNDERFLOW,Publish configuration for event RAMUNDERFLOW" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event RAMUNDERFLOW will publish to" tree "PUBLISH_DMA" base ad:0x400D4000 repeat 2. (list 0x0 0x1)(list ad:0x400D21A4 ad:0x400D21B0) tree "SEQ[$1]" base $2 group.long ($2)++0xB line.long 0x0 "END,Description cluster: Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Description cluster: Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Description cluster: Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end repeat.end tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1BC)++0x3 line.long 0x0 "PUBLISH_COMPAREMATCH[$1],Description collection: Publish configuration for event COMPAREMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPAREMATCH[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 7. "DMA_SEQ1_BUSERROR_STOP,Shortcut between event DMA.SEQ[n].BUSERROR and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_SEQ0_BUSERROR_STOP,Shortcut between event DMA.SEQ[n].BUSERROR and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "RAMUNDERFLOW_STOP,Shortcut between event RAMUNDERFLOW and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "LOOPSDONE_DMA_SEQ1_START,Shortcut between event LOOPSDONE and task DMA.SEQ[n].START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "LOOPSDONE_DMA_SEQ0_START,Shortcut between event LOOPSDONE and task DMA.SEQ[n].START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "SEQEND1_STOP,Shortcut between event SEQEND[n] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "SEQEND0_STOP,Shortcut between event SEQEND[n] and task STOP" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 18. "COMPAREMATCH3,Enable or disable interrupt for event COMPAREMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPAREMATCH2,Enable or disable interrupt for event COMPAREMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "COMPAREMATCH1,Enable or disable interrupt for event COMPAREMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "COMPAREMATCH0,Enable or disable interrupt for event COMPAREMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "DMASEQ1BUSERROR,Enable or disable interrupt for event DMASEQ1BUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "DMASEQ1READY,Enable or disable interrupt for event DMASEQ1READY" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "DMASEQ1END,Enable or disable interrupt for event DMASEQ1END" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "DMASEQ0BUSERROR,Enable or disable interrupt for event DMASEQ0BUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "DMASEQ0READY,Enable or disable interrupt for event DMASEQ0READY" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "DMASEQ0END,Enable or disable interrupt for event DMASEQ0END" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "RAMUNDERFLOW,Enable or disable interrupt for event RAMUNDERFLOW" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 18. "COMPAREMATCH3,Write '1' to enable interrupt for event COMPAREMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPAREMATCH2,Write '1' to enable interrupt for event COMPAREMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "COMPAREMATCH1,Write '1' to enable interrupt for event COMPAREMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 15. "COMPAREMATCH0,Write '1' to enable interrupt for event COMPAREMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "DMASEQ1BUSERROR,Write '1' to enable interrupt for event DMASEQ1BUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 13. "DMASEQ1READY,Write '1' to enable interrupt for event DMASEQ1READY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 12. "DMASEQ1END,Write '1' to enable interrupt for event DMASEQ1END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "DMASEQ0BUSERROR,Write '1' to enable interrupt for event DMASEQ0BUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "DMASEQ0READY,Write '1' to enable interrupt for event DMASEQ0READY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "DMASEQ0END,Write '1' to enable interrupt for event DMASEQ0END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "RAMUNDERFLOW,Write '1' to enable interrupt for event RAMUNDERFLOW" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 18. "COMPAREMATCH3,Write '1' to disable interrupt for event COMPAREMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPAREMATCH2,Write '1' to disable interrupt for event COMPAREMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "COMPAREMATCH1,Write '1' to disable interrupt for event COMPAREMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 15. "COMPAREMATCH0,Write '1' to disable interrupt for event COMPAREMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "DMASEQ1BUSERROR,Write '1' to disable interrupt for event DMASEQ1BUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 13. "DMASEQ1READY,Write '1' to disable interrupt for event DMASEQ1READY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 12. "DMASEQ1END,Write '1' to disable interrupt for event DMASEQ1END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "DMASEQ0BUSERROR,Write '1' to disable interrupt for event DMASEQ0BUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "DMASEQ0READY,Write '1' to disable interrupt for event DMASEQ0READY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "DMASEQ0END,Write '1' to disable interrupt for event DMASEQ0END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "RAMUNDERFLOW,Write '1' to disable interrupt for event RAMUNDERFLOW" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 18. "COMPAREMATCH3,Read pending status of interrupt for event COMPAREMATCH[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 17. "COMPAREMATCH2,Read pending status of interrupt for event COMPAREMATCH[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 16. "COMPAREMATCH1,Read pending status of interrupt for event COMPAREMATCH[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 15. "COMPAREMATCH0,Read pending status of interrupt for event COMPAREMATCH[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 14. "DMASEQ1BUSERROR,Read pending status of interrupt for event DMASEQ1BUSERROR" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 13. "DMASEQ1READY,Read pending status of interrupt for event DMASEQ1READY" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 12. "DMASEQ1END,Read pending status of interrupt for event DMASEQ1END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "DMASEQ0BUSERROR,Read pending status of interrupt for event DMASEQ0BUSERROR" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "DMASEQ0READY,Read pending status of interrupt for event DMASEQ0READY" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "DMASEQ0END,Read pending status of interrupt for event DMASEQ0END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "RAMUNDERFLOW,Read pending status of interrupt for event RAMUNDERFLOW" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "LOOPSDONE,Read pending status of interrupt for event LOOPSDONE" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "SEQEND1,Read pending status of interrupt for event SEQEND[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "SEQEND0,Read pending status of interrupt for event SEQEND[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "SEQSTARTED1,Read pending status of interrupt for event SEQSTARTED[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "SEQSTARTED0,Read pending status of interrupt for event SEQSTARTED[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "STOPPED,Read pending status of interrupt for event STOPPED" "0: Read: Not pending,1: Read: Pending" group.long 0x500++0x1B line.long 0x0 "ENABLE,PWM module enable register" bitfld.long 0x0 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enable" line.long 0x4 "MODE,Selects operating mode of the wave counter" bitfld.long 0x4 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty cycle" line.long 0x8 "COUNTERTOP,Value up to which the pulse generator counter counts" hexmask.long.word 0x8 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used." line.long 0xC "PRESCALER,Configuration for PWM_CLK" bitfld.long 0xC 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)" line.long 0x10 "DECODER,Configuration of the decoder" bitfld.long 0x10 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded to.." newline bitfld.long 0x10 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM channels..,1: 1st half word (16-bit) used in channel 0..1; 2nd..,2: 1st half word (16-bit) in ch.0; 2nd in ch.1;..,3: 1st half word (16-bit) in ch.0; 2nd in ch.1;.." line.long 0x14 "LOOP,Number of playbacks of a loop" hexmask.long.word 0x14 0.--15. 1. "CNT,Number of playbacks of pattern cycles" line.long 0x18 "IDLEOUT,Configure the output value on the PWM channel during idle" bitfld.long 0x18 3. "VAL_3,Idle output value for PWM channel [3]" "0,1" newline bitfld.long 0x18 2. "VAL_2,Idle output value for PWM channel [2]" "0,1" newline bitfld.long 0x18 1. "VAL_1,Idle output value for PWM channel [1]" "0,1" newline bitfld.long 0x18 0. "VAL_0,Idle output value for PWM channel [0]" "0,1" repeat 2. (list 0x0 0x1)(list ad:0x400D4520 ad:0x400D4540) tree "SEQ[$1]" base $2 group.long ($2+0x8)++0x7 line.long 0x0 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register" hexmask.long.tbyte 0x0 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)" line.long 0x4 "ENDDELAY,Description cluster: Time added after the sequence" hexmask.long.tbyte 0x4 0.--23. 1. "CNT,Time added after the sequence in PWM periods" tree.end repeat.end base ad:0x400D4000 tree "DMA" base ad:0x400D4000 repeat 2. (list 0x0 0x1)(list ad:0x400D2700 ad:0x400D2724) tree "SEQ[$1]" base $2 group.long ($2+0x4)++0x7 line.long 0x0 "PTR,Description cluster: RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Description cluster: Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--14. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long ($2+0xC)++0x7 line.long 0x0 "AMOUNT,Description cluster: Number of bytes transferred in the last transaction. updated after the END event." hexmask.long.word 0x0 0.--14. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." line.long 0x4 "CURRENTAMOUNT,Description cluster: Number of bytes transferred in the current transaction" hexmask.long.word 0x4 0.--14. 1. "AMOUNT,Number of bytes transferred in the current transaction. Continuously updated." group.long ($2+0x1C)++0x3 line.long 0x0 "TERMINATEONBUSERROR,Description cluster: Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long ($2+0x20)++0x3 line.long 0x0 "BUSERRORADDRESS,Description cluster: Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end repeat.end tree.end tree "PSEL" base ad:0x400D4000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "OUT[$1],Description collection: Output pin select for PWM channel n" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" repeat.end tree.end tree.end tree "GLOBAL_PWM22_S" base ad:0x500D4000 wgroup.long 0x4++0x7 line.long 0x0 "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period. and stops sequence playback" bitfld.long 0x0 0. "TASKS_STOP,Stops PWM pulse generation on all channels at the end of current PWM period and stops sequence playback" "?,1: Trigger task" line.long 0x4 "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running." bitfld.long 0x4 0. "TASKS_NEXTSTEP,Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running." "?,1: Trigger task" tree "TASKS_DMA" base ad:0x500D4000 repeat 2. (list 0x0 0x1)(list ad:0x400D2010 ad:0x400D2018) tree "SEQ[$1]" base $2 wgroup.long ($2)++0x7 line.long 0x0 "START,Description cluster: Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Description cluster: Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end repeat.end tree.end base ad:0x500D4000 newline group.long 0x84++0x7 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x4 "SUBSCRIBE_NEXTSTEP,Subscribe configuration for task NEXTSTEP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task NEXTSTEP will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x500D4000 repeat 2. (list 0x0 0x1)(list ad:0x400D2090 ad:0x400D2098) tree "SEQ[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "START,Description cluster: Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Description cluster: Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end repeat.end tree.end base ad:0x500D4000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,Response to STOP task. emitted when PWM pulses are no longer generated" bitfld.long 0x0 0. "EVENTS_STOPPED,Response to STOP task emitted when PWM pulses are no longer generated" "0: Event not generated,1: Event generated" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x108)++0x3 line.long 0x0 "EVENTS_SEQSTARTED[$1],Description collection: First PWM period started on sequence n" bitfld.long 0x0 0. "EVENTS_SEQSTARTED,First PWM period started on sequence n" "0: Event not generated,1: Event generated" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x110)++0x3 line.long 0x0 "EVENTS_SEQEND[$1],Description collection: Emitted at end of every sequence n. when last value from RAM has been applied to wave counter" bitfld.long 0x0 0. "EVENTS_SEQEND,Emitted at end of every sequence n when last value from RAM has been applied to wave counter" "0: Event not generated,1: Event generated" repeat.end group.long 0x118++0xB line.long 0x0 "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" bitfld.long 0x0 0. "EVENTS_PWMPERIODEND,Emitted at the end of each PWM period" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" bitfld.long 0x4 0. "EVENTS_LOOPSDONE,Concatenated sequences have been played the amount of times defined in LOOP.CNT" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_RAMUNDERFLOW,Emitted when retrieving from RAM does not complete in time for the PWM module" bitfld.long 0x8 0. "EVENTS_RAMUNDERFLOW,Emitted when retrieving from RAM does not complete in time for the PWM module" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500D4000 repeat 2. (list 0x0 0x1)(list ad:0x400D2124 ad:0x400D2130) tree "SEQ[$1]" base $2 group.long ($2)++0xB line.long 0x0 "END,Description cluster: Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Description cluster: Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,Description cluster: An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end repeat.end tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x13C)++0x3 line.long 0x0 "EVENTS_COMPAREMATCH[$1],Description collection: This event is generated when the compare matches for the compare channel [n]." bitfld.long 0x0 0. "EVENTS_COMPAREMATCH,This event is generated when the compare matches for the compare channel [n]." "0: Event not generated,1: Event generated" repeat.end group.long 0x184++0x3 line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x188)++0x3 line.long 0x0 "PUBLISH_SEQSTARTED[$1],Description collection: Publish configuration for event SEQSTARTED[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SEQSTARTED[n] will publish to" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x190)++0x3 line.long 0x0 "PUBLISH_SEQEND[$1],Description collection: Publish configuration for event SEQEND[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SEQEND[n] will publish to" repeat.end group.long 0x198++0xB line.long 0x0 "PUBLISH_PWMPERIODEND,Publish configuration for event PWMPERIODEND" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event PWMPERIODEND will publish to" line.long 0x4 "PUBLISH_LOOPSDONE,Publish configuration for event LOOPSDONE" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LOOPSDONE will publish to" line.long 0x8 "PUBLISH_RAMUNDERFLOW,Publish configuration for event RAMUNDERFLOW" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event RAMUNDERFLOW will publish to" tree "PUBLISH_DMA" base ad:0x500D4000 repeat 2. (list 0x0 0x1)(list ad:0x400D21A4 ad:0x400D21B0) tree "SEQ[$1]" base $2 group.long ($2)++0xB line.long 0x0 "END,Description cluster: Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Description cluster: Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Description cluster: Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end repeat.end tree.end newline repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1BC)++0x3 line.long 0x0 "PUBLISH_COMPAREMATCH[$1],Description collection: Publish configuration for event COMPAREMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPAREMATCH[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 7. "DMA_SEQ1_BUSERROR_STOP,Shortcut between event DMA.SEQ[n].BUSERROR and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_SEQ0_BUSERROR_STOP,Shortcut between event DMA.SEQ[n].BUSERROR and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "RAMUNDERFLOW_STOP,Shortcut between event RAMUNDERFLOW and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 4. "LOOPSDONE_STOP,Shortcut between event LOOPSDONE and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "LOOPSDONE_DMA_SEQ1_START,Shortcut between event LOOPSDONE and task DMA.SEQ[n].START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "LOOPSDONE_DMA_SEQ0_START,Shortcut between event LOOPSDONE and task DMA.SEQ[n].START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "SEQEND1_STOP,Shortcut between event SEQEND[n] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "SEQEND0_STOP,Shortcut between event SEQEND[n] and task STOP" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 18. "COMPAREMATCH3,Enable or disable interrupt for event COMPAREMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPAREMATCH2,Enable or disable interrupt for event COMPAREMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "COMPAREMATCH1,Enable or disable interrupt for event COMPAREMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "COMPAREMATCH0,Enable or disable interrupt for event COMPAREMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "DMASEQ1BUSERROR,Enable or disable interrupt for event DMASEQ1BUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "DMASEQ1READY,Enable or disable interrupt for event DMASEQ1READY" "0: Disable,1: Enable" newline bitfld.long 0x0 12. "DMASEQ1END,Enable or disable interrupt for event DMASEQ1END" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "DMASEQ0BUSERROR,Enable or disable interrupt for event DMASEQ0BUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "DMASEQ0READY,Enable or disable interrupt for event DMASEQ0READY" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "DMASEQ0END,Enable or disable interrupt for event DMASEQ0END" "0: Disable,1: Enable" newline bitfld.long 0x0 8. "RAMUNDERFLOW,Enable or disable interrupt for event RAMUNDERFLOW" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "LOOPSDONE,Enable or disable interrupt for event LOOPSDONE" "0: Disable,1: Enable" newline bitfld.long 0x0 6. "PWMPERIODEND,Enable or disable interrupt for event PWMPERIODEND" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "SEQEND1,Enable or disable interrupt for event SEQEND[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "SEQEND0,Enable or disable interrupt for event SEQEND[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "SEQSTARTED1,Enable or disable interrupt for event SEQSTARTED[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "SEQSTARTED0,Enable or disable interrupt for event SEQSTARTED[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 18. "COMPAREMATCH3,Write '1' to enable interrupt for event COMPAREMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPAREMATCH2,Write '1' to enable interrupt for event COMPAREMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "COMPAREMATCH1,Write '1' to enable interrupt for event COMPAREMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 15. "COMPAREMATCH0,Write '1' to enable interrupt for event COMPAREMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "DMASEQ1BUSERROR,Write '1' to enable interrupt for event DMASEQ1BUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 13. "DMASEQ1READY,Write '1' to enable interrupt for event DMASEQ1READY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 12. "DMASEQ1END,Write '1' to enable interrupt for event DMASEQ1END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "DMASEQ0BUSERROR,Write '1' to enable interrupt for event DMASEQ0BUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "DMASEQ0READY,Write '1' to enable interrupt for event DMASEQ0READY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "DMASEQ0END,Write '1' to enable interrupt for event DMASEQ0END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 8. "RAMUNDERFLOW,Write '1' to enable interrupt for event RAMUNDERFLOW" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "LOOPSDONE,Write '1' to enable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 6. "PWMPERIODEND,Write '1' to enable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "SEQEND1,Write '1' to enable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "SEQEND0,Write '1' to enable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "SEQSTARTED1,Write '1' to enable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 2. "SEQSTARTED0,Write '1' to enable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 18. "COMPAREMATCH3,Write '1' to disable interrupt for event COMPAREMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPAREMATCH2,Write '1' to disable interrupt for event COMPAREMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "COMPAREMATCH1,Write '1' to disable interrupt for event COMPAREMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 15. "COMPAREMATCH0,Write '1' to disable interrupt for event COMPAREMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "DMASEQ1BUSERROR,Write '1' to disable interrupt for event DMASEQ1BUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 13. "DMASEQ1READY,Write '1' to disable interrupt for event DMASEQ1READY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 12. "DMASEQ1END,Write '1' to disable interrupt for event DMASEQ1END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "DMASEQ0BUSERROR,Write '1' to disable interrupt for event DMASEQ0BUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "DMASEQ0READY,Write '1' to disable interrupt for event DMASEQ0READY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "DMASEQ0END,Write '1' to disable interrupt for event DMASEQ0END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 8. "RAMUNDERFLOW,Write '1' to disable interrupt for event RAMUNDERFLOW" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "LOOPSDONE,Write '1' to disable interrupt for event LOOPSDONE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 6. "PWMPERIODEND,Write '1' to disable interrupt for event PWMPERIODEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "SEQEND1,Write '1' to disable interrupt for event SEQEND[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "SEQEND0,Write '1' to disable interrupt for event SEQEND[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "SEQSTARTED1,Write '1' to disable interrupt for event SEQSTARTED[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 2. "SEQSTARTED0,Write '1' to disable interrupt for event SEQSTARTED[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 18. "COMPAREMATCH3,Read pending status of interrupt for event COMPAREMATCH[3]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 17. "COMPAREMATCH2,Read pending status of interrupt for event COMPAREMATCH[2]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 16. "COMPAREMATCH1,Read pending status of interrupt for event COMPAREMATCH[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 15. "COMPAREMATCH0,Read pending status of interrupt for event COMPAREMATCH[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 14. "DMASEQ1BUSERROR,Read pending status of interrupt for event DMASEQ1BUSERROR" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 13. "DMASEQ1READY,Read pending status of interrupt for event DMASEQ1READY" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 12. "DMASEQ1END,Read pending status of interrupt for event DMASEQ1END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 11. "DMASEQ0BUSERROR,Read pending status of interrupt for event DMASEQ0BUSERROR" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 10. "DMASEQ0READY,Read pending status of interrupt for event DMASEQ0READY" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 9. "DMASEQ0END,Read pending status of interrupt for event DMASEQ0END" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 8. "RAMUNDERFLOW,Read pending status of interrupt for event RAMUNDERFLOW" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 7. "LOOPSDONE,Read pending status of interrupt for event LOOPSDONE" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 6. "PWMPERIODEND,Read pending status of interrupt for event PWMPERIODEND" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 5. "SEQEND1,Read pending status of interrupt for event SEQEND[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 4. "SEQEND0,Read pending status of interrupt for event SEQEND[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 3. "SEQSTARTED1,Read pending status of interrupt for event SEQSTARTED[1]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 2. "SEQSTARTED0,Read pending status of interrupt for event SEQSTARTED[0]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "STOPPED,Read pending status of interrupt for event STOPPED" "0: Read: Not pending,1: Read: Pending" group.long 0x500++0x1B line.long 0x0 "ENABLE,PWM module enable register" bitfld.long 0x0 0. "ENABLE,Enable or disable PWM module" "0: Disabled,1: Enable" line.long 0x4 "MODE,Selects operating mode of the wave counter" bitfld.long 0x4 0. "UPDOWN,Selects up mode or up-and-down mode for the counter" "0: Up counter edge-aligned PWM duty cycle,1: Up and down counter center-aligned PWM duty cycle" line.long 0x8 "COUNTERTOP,Value up to which the pulse generator counter counts" hexmask.long.word 0x8 0.--14. 1. "COUNTERTOP,Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used." line.long 0xC "PRESCALER,Configuration for PWM_CLK" bitfld.long 0xC 0.--2. "PRESCALER,Prescaler of PWM_CLK" "0: Divide by 1 (16 MHz),1: Divide by 2 (8 MHz),2: Divide by 4 (4 MHz),3: Divide by 8 (2 MHz),4: Divide by 16 (1 MHz),5: Divide by 32 (500 kHz),6: Divide by 64 (250 kHz),7: Divide by 128 (125 kHz)" line.long 0x10 "DECODER,Configuration of the decoder" bitfld.long 0x10 8. "MODE,Selects source for advancing the active sequence" "0: SEQ[n].REFRESH is used to determine loading..,1: NEXTSTEP task causes a new value to be loaded to.." newline bitfld.long 0x10 0.--1. "LOAD,How a sequence is read from RAM and spread to the compare register" "0: 1st half word (16-bit) used in all PWM channels..,1: 1st half word (16-bit) used in channel 0..1; 2nd..,2: 1st half word (16-bit) in ch.0; 2nd in ch.1;..,3: 1st half word (16-bit) in ch.0; 2nd in ch.1;.." line.long 0x14 "LOOP,Number of playbacks of a loop" hexmask.long.word 0x14 0.--15. 1. "CNT,Number of playbacks of pattern cycles" line.long 0x18 "IDLEOUT,Configure the output value on the PWM channel during idle" bitfld.long 0x18 3. "VAL_3,Idle output value for PWM channel [3]" "0,1" newline bitfld.long 0x18 2. "VAL_2,Idle output value for PWM channel [2]" "0,1" newline bitfld.long 0x18 1. "VAL_1,Idle output value for PWM channel [1]" "0,1" newline bitfld.long 0x18 0. "VAL_0,Idle output value for PWM channel [0]" "0,1" repeat 2. (list 0x0 0x1)(list ad:0x500D4520 ad:0x500D4540) tree "SEQ[$1]" base $2 group.long ($2+0x8)++0x7 line.long 0x0 "REFRESH,Description cluster: Number of additional PWM periods between samples loaded into compare register" hexmask.long.tbyte 0x0 0.--23. 1. "CNT,Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)" line.long 0x4 "ENDDELAY,Description cluster: Time added after the sequence" hexmask.long.tbyte 0x4 0.--23. 1. "CNT,Time added after the sequence in PWM periods" tree.end repeat.end base ad:0x500D4000 tree "DMA" base ad:0x500D4000 repeat 2. (list 0x0 0x1)(list ad:0x400D2700 ad:0x400D2724) tree "SEQ[$1]" base $2 group.long ($2+0x4)++0x7 line.long 0x0 "PTR,Description cluster: RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Description cluster: Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--14. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long ($2+0xC)++0x7 line.long 0x0 "AMOUNT,Description cluster: Number of bytes transferred in the last transaction. updated after the END event." hexmask.long.word 0x0 0.--14. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." line.long 0x4 "CURRENTAMOUNT,Description cluster: Number of bytes transferred in the current transaction" hexmask.long.word 0x4 0.--14. 1. "AMOUNT,Number of bytes transferred in the current transaction. Continuously updated." group.long ($2+0x1C)++0x3 line.long 0x0 "TERMINATEONBUSERROR,Description cluster: Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long ($2+0x20)++0x3 line.long 0x0 "BUSERRORADDRESS,Description cluster: Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end repeat.end tree.end tree "PSEL" base ad:0x500D4000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "OUT[$1],Description collection: Output pin select for PWM channel n" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" repeat.end tree.end tree.end tree.end tree "QDEC (Quadrature Decoder)" base ad:0x0 tree "GLOBAL_QDEC20_NS" base ad:0x400E0000 wgroup.long 0x0++0x13 line.long 0x0 "TASKS_START,Task starting the quadrature decoder" bitfld.long 0x0 0. "TASKS_START,Task starting the quadrature decoder" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Task stopping the quadrature decoder" bitfld.long 0x4 0. "TASKS_STOP,Task stopping the quadrature decoder" "?,1: Trigger task" line.long 0x8 "TASKS_READCLRACC,Read and clear ACC and ACCDBL" bitfld.long 0x8 0. "TASKS_READCLRACC,Read and clear ACC and ACCDBL" "?,1: Trigger task" line.long 0xC "TASKS_RDCLRACC,Read and clear ACC" bitfld.long 0xC 0. "TASKS_RDCLRACC,Read and clear ACC" "?,1: Trigger task" line.long 0x10 "TASKS_RDCLRDBL,Read and clear ACCDBL" bitfld.long 0x10 0. "TASKS_RDCLRDBL,Read and clear ACCDBL" "?,1: Trigger task" group.long 0x80++0x13 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_READCLRACC,Subscribe configuration for task READCLRACC" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task READCLRACC will subscribe to" line.long 0xC "SUBSCRIBE_RDCLRACC,Subscribe configuration for task RDCLRACC" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task RDCLRACC will subscribe to" line.long 0x10 "SUBSCRIBE_RDCLRDBL,Subscribe configuration for task RDCLRDBL" bitfld.long 0x10 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that task RDCLRDBL will subscribe to" group.long 0x100++0x13 line.long 0x0 "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register" bitfld.long 0x0 0. "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_REPORTRDY,Non-null report ready" bitfld.long 0x4 0. "EVENTS_REPORTRDY,Non-null report ready" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ACCOF,ACC or ACCDBL register overflow" bitfld.long 0x8 0. "EVENTS_ACCOF,ACC or ACCDBL register overflow" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_DBLRDY,Double displacement(s) detected" bitfld.long 0xC 0. "EVENTS_DBLRDY,Double displacement(s) detected" "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_STOPPED,QDEC has been stopped" bitfld.long 0x10 0. "EVENTS_STOPPED,QDEC has been stopped" "0: Event not generated,1: Event generated" group.long 0x180++0x13 line.long 0x0 "PUBLISH_SAMPLERDY,Publish configuration for event SAMPLERDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SAMPLERDY will publish to" line.long 0x4 "PUBLISH_REPORTRDY,Publish configuration for event REPORTRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event REPORTRDY will publish to" line.long 0x8 "PUBLISH_ACCOF,Publish configuration for event ACCOF" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ACCOF will publish to" line.long 0xC "PUBLISH_DBLRDY,Publish configuration for event DBLRDY" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event DBLRDY will publish to" line.long 0x10 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x10 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 6. "SAMPLERDY_READCLRACC,Shortcut between event SAMPLERDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DBLRDY_STOP,Shortcut between event DBLRDY and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 4. "DBLRDY_RDCLRDBL,Shortcut between event DBLRDY and task RDCLRDBL" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 3. "REPORTRDY_STOP,Shortcut between event REPORTRDY and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "REPORTRDY_RDCLRACC,Shortcut between event REPORTRDY and task RDCLRACC" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 1. "SAMPLERDY_STOP,Shortcut between event SAMPLERDY and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "REPORTRDY_READCLRACC,Shortcut between event REPORTRDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 4. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x0 3. "DBLRDY,Write '1' to enable interrupt for event DBLRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "ACCOF,Write '1' to enable interrupt for event ACCOF" "0: Read: Disabled,1: Enable" bitfld.long 0x0 1. "REPORTRDY,Write '1' to enable interrupt for event REPORTRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "SAMPLERDY,Write '1' to enable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 4. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x4 3. "DBLRDY,Write '1' to disable interrupt for event DBLRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "ACCOF,Write '1' to disable interrupt for event ACCOF" "0: Read: Disabled,1: Disable" bitfld.long 0x4 1. "REPORTRDY,Write '1' to disable interrupt for event REPORTRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "SAMPLERDY,Write '1' to disable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Disable" group.long 0x500++0xB line.long 0x0 "ENABLE,Enable the quadrature decoder" bitfld.long 0x0 0. "ENABLE,Enable or disable the quadrature decoder" "0: Disable,1: Enable" line.long 0x4 "LEDPOL,LED output pin polarity" bitfld.long 0x4 0. "LEDPOL,LED output pin polarity" "0: Led active on output pin low,1: Led active on output pin high" line.long 0x8 "SAMPLEPER,Sample period" hexmask.long.byte 0x8 0.--3. 1. "SAMPLEPER,Sample period. The SAMPLE register will be updated for every new sample" rgroup.long 0x50C++0x3 line.long 0x0 "SAMPLE,Motion sample value" hexmask.long 0x0 0.--31. 1. "SAMPLE,Last motion sample" group.long 0x510++0x3 line.long 0x0 "REPORTPER,Number of samples to be taken before REPORTRDY and DBLRDY events can be generated" hexmask.long.byte 0x0 0.--3. 1. "REPORTPER,Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated." rgroup.long 0x514++0x7 line.long 0x0 "ACC,Register accumulating the valid transitions" hexmask.long 0x0 0.--31. 1. "ACC,Register accumulating all valid samples (not double transition) read from the SAMPLE register." line.long 0x4 "ACCREAD,Snapshot of the ACC register. updated by the READCLRACC or RDCLRACC task" hexmask.long 0x4 0.--31. 1. "ACCREAD,Snapshot of the ACC register." tree "PSEL" base ad:0x400E051C group.long 0x0++0xB line.long 0x0 "LED,Pin select for LED signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "A,Pin select for A signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "B,Pin select for B signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" tree.end base ad:0x400E0000 newline group.long 0x528++0x3 newline line.long 0x0 "DBFEN,Enable input debounce filters" bitfld.long 0x0 0. "DBFEN,Enable input debounce filters" "0: Debounce input filters disabled,1: Debounce input filters enabled" group.long 0x540++0x3 line.long 0x0 "LEDPRE,Time period the LED is switched ON prior to sampling" hexmask.long.word 0x0 0.--8. 1. "LEDPRE,Period in us the LED is switched on prior to sampling" rgroup.long 0x544++0x7 line.long 0x0 "ACCDBL,Register accumulating the number of detected double transitions" hexmask.long.byte 0x0 0.--3. 1. "ACCDBL,Register accumulating the number of detected double or illegal transitions. ( SAMPLE = 2 )." line.long 0x4 "ACCDBLREAD,Snapshot of the ACCDBL. updated by the READCLRACC or RDCLRDBL task" hexmask.long.byte 0x4 0.--3. 1. "ACCDBLREAD,Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDBL task is triggered." tree.end tree "GLOBAL_QDEC20_S" base ad:0x500E0000 wgroup.long 0x0++0x13 line.long 0x0 "TASKS_START,Task starting the quadrature decoder" bitfld.long 0x0 0. "TASKS_START,Task starting the quadrature decoder" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Task stopping the quadrature decoder" bitfld.long 0x4 0. "TASKS_STOP,Task stopping the quadrature decoder" "?,1: Trigger task" line.long 0x8 "TASKS_READCLRACC,Read and clear ACC and ACCDBL" bitfld.long 0x8 0. "TASKS_READCLRACC,Read and clear ACC and ACCDBL" "?,1: Trigger task" line.long 0xC "TASKS_RDCLRACC,Read and clear ACC" bitfld.long 0xC 0. "TASKS_RDCLRACC,Read and clear ACC" "?,1: Trigger task" line.long 0x10 "TASKS_RDCLRDBL,Read and clear ACCDBL" bitfld.long 0x10 0. "TASKS_RDCLRDBL,Read and clear ACCDBL" "?,1: Trigger task" group.long 0x80++0x13 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_READCLRACC,Subscribe configuration for task READCLRACC" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task READCLRACC will subscribe to" line.long 0xC "SUBSCRIBE_RDCLRACC,Subscribe configuration for task RDCLRACC" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task RDCLRACC will subscribe to" line.long 0x10 "SUBSCRIBE_RDCLRDBL,Subscribe configuration for task RDCLRDBL" bitfld.long 0x10 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that task RDCLRDBL will subscribe to" group.long 0x100++0x13 line.long 0x0 "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register" bitfld.long 0x0 0. "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_REPORTRDY,Non-null report ready" bitfld.long 0x4 0. "EVENTS_REPORTRDY,Non-null report ready" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ACCOF,ACC or ACCDBL register overflow" bitfld.long 0x8 0. "EVENTS_ACCOF,ACC or ACCDBL register overflow" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_DBLRDY,Double displacement(s) detected" bitfld.long 0xC 0. "EVENTS_DBLRDY,Double displacement(s) detected" "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_STOPPED,QDEC has been stopped" bitfld.long 0x10 0. "EVENTS_STOPPED,QDEC has been stopped" "0: Event not generated,1: Event generated" group.long 0x180++0x13 line.long 0x0 "PUBLISH_SAMPLERDY,Publish configuration for event SAMPLERDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SAMPLERDY will publish to" line.long 0x4 "PUBLISH_REPORTRDY,Publish configuration for event REPORTRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event REPORTRDY will publish to" line.long 0x8 "PUBLISH_ACCOF,Publish configuration for event ACCOF" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ACCOF will publish to" line.long 0xC "PUBLISH_DBLRDY,Publish configuration for event DBLRDY" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event DBLRDY will publish to" line.long 0x10 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x10 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 6. "SAMPLERDY_READCLRACC,Shortcut between event SAMPLERDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DBLRDY_STOP,Shortcut between event DBLRDY and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 4. "DBLRDY_RDCLRDBL,Shortcut between event DBLRDY and task RDCLRDBL" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 3. "REPORTRDY_STOP,Shortcut between event REPORTRDY and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "REPORTRDY_RDCLRACC,Shortcut between event REPORTRDY and task RDCLRACC" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 1. "SAMPLERDY_STOP,Shortcut between event SAMPLERDY and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "REPORTRDY_READCLRACC,Shortcut between event REPORTRDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 4. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x0 3. "DBLRDY,Write '1' to enable interrupt for event DBLRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "ACCOF,Write '1' to enable interrupt for event ACCOF" "0: Read: Disabled,1: Enable" bitfld.long 0x0 1. "REPORTRDY,Write '1' to enable interrupt for event REPORTRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "SAMPLERDY,Write '1' to enable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 4. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x4 3. "DBLRDY,Write '1' to disable interrupt for event DBLRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "ACCOF,Write '1' to disable interrupt for event ACCOF" "0: Read: Disabled,1: Disable" bitfld.long 0x4 1. "REPORTRDY,Write '1' to disable interrupt for event REPORTRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "SAMPLERDY,Write '1' to disable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Disable" group.long 0x500++0xB line.long 0x0 "ENABLE,Enable the quadrature decoder" bitfld.long 0x0 0. "ENABLE,Enable or disable the quadrature decoder" "0: Disable,1: Enable" line.long 0x4 "LEDPOL,LED output pin polarity" bitfld.long 0x4 0. "LEDPOL,LED output pin polarity" "0: Led active on output pin low,1: Led active on output pin high" line.long 0x8 "SAMPLEPER,Sample period" hexmask.long.byte 0x8 0.--3. 1. "SAMPLEPER,Sample period. The SAMPLE register will be updated for every new sample" rgroup.long 0x50C++0x3 line.long 0x0 "SAMPLE,Motion sample value" hexmask.long 0x0 0.--31. 1. "SAMPLE,Last motion sample" group.long 0x510++0x3 line.long 0x0 "REPORTPER,Number of samples to be taken before REPORTRDY and DBLRDY events can be generated" hexmask.long.byte 0x0 0.--3. 1. "REPORTPER,Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated." rgroup.long 0x514++0x7 line.long 0x0 "ACC,Register accumulating the valid transitions" hexmask.long 0x0 0.--31. 1. "ACC,Register accumulating all valid samples (not double transition) read from the SAMPLE register." line.long 0x4 "ACCREAD,Snapshot of the ACC register. updated by the READCLRACC or RDCLRACC task" hexmask.long 0x4 0.--31. 1. "ACCREAD,Snapshot of the ACC register." tree "PSEL" base ad:0x500E0000 group.long 0x0++0xB line.long 0x0 "LED,Pin select for LED signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "A,Pin select for A signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "B,Pin select for B signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" tree.end base ad:0x500E0000 newline group.long 0x528++0x3 newline line.long 0x0 "DBFEN,Enable input debounce filters" bitfld.long 0x0 0. "DBFEN,Enable input debounce filters" "0: Debounce input filters disabled,1: Debounce input filters enabled" group.long 0x540++0x3 line.long 0x0 "LEDPRE,Time period the LED is switched ON prior to sampling" hexmask.long.word 0x0 0.--8. 1. "LEDPRE,Period in us the LED is switched on prior to sampling" rgroup.long 0x544++0x7 line.long 0x0 "ACCDBL,Register accumulating the number of detected double transitions" hexmask.long.byte 0x0 0.--3. 1. "ACCDBL,Register accumulating the number of detected double or illegal transitions. ( SAMPLE = 2 )." line.long 0x4 "ACCDBLREAD,Snapshot of the ACCDBL. updated by the READCLRACC or RDCLRDBL task" hexmask.long.byte 0x4 0.--3. 1. "ACCDBLREAD,Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDBL task is triggered." tree.end tree "GLOBAL_QDEC21_NS" base ad:0x400E1000 wgroup.long 0x0++0x13 line.long 0x0 "TASKS_START,Task starting the quadrature decoder" bitfld.long 0x0 0. "TASKS_START,Task starting the quadrature decoder" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Task stopping the quadrature decoder" bitfld.long 0x4 0. "TASKS_STOP,Task stopping the quadrature decoder" "?,1: Trigger task" line.long 0x8 "TASKS_READCLRACC,Read and clear ACC and ACCDBL" bitfld.long 0x8 0. "TASKS_READCLRACC,Read and clear ACC and ACCDBL" "?,1: Trigger task" line.long 0xC "TASKS_RDCLRACC,Read and clear ACC" bitfld.long 0xC 0. "TASKS_RDCLRACC,Read and clear ACC" "?,1: Trigger task" line.long 0x10 "TASKS_RDCLRDBL,Read and clear ACCDBL" bitfld.long 0x10 0. "TASKS_RDCLRDBL,Read and clear ACCDBL" "?,1: Trigger task" group.long 0x80++0x13 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_READCLRACC,Subscribe configuration for task READCLRACC" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task READCLRACC will subscribe to" line.long 0xC "SUBSCRIBE_RDCLRACC,Subscribe configuration for task RDCLRACC" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task RDCLRACC will subscribe to" line.long 0x10 "SUBSCRIBE_RDCLRDBL,Subscribe configuration for task RDCLRDBL" bitfld.long 0x10 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that task RDCLRDBL will subscribe to" group.long 0x100++0x13 line.long 0x0 "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register" bitfld.long 0x0 0. "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_REPORTRDY,Non-null report ready" bitfld.long 0x4 0. "EVENTS_REPORTRDY,Non-null report ready" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ACCOF,ACC or ACCDBL register overflow" bitfld.long 0x8 0. "EVENTS_ACCOF,ACC or ACCDBL register overflow" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_DBLRDY,Double displacement(s) detected" bitfld.long 0xC 0. "EVENTS_DBLRDY,Double displacement(s) detected" "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_STOPPED,QDEC has been stopped" bitfld.long 0x10 0. "EVENTS_STOPPED,QDEC has been stopped" "0: Event not generated,1: Event generated" group.long 0x180++0x13 line.long 0x0 "PUBLISH_SAMPLERDY,Publish configuration for event SAMPLERDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SAMPLERDY will publish to" line.long 0x4 "PUBLISH_REPORTRDY,Publish configuration for event REPORTRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event REPORTRDY will publish to" line.long 0x8 "PUBLISH_ACCOF,Publish configuration for event ACCOF" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ACCOF will publish to" line.long 0xC "PUBLISH_DBLRDY,Publish configuration for event DBLRDY" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event DBLRDY will publish to" line.long 0x10 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x10 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 6. "SAMPLERDY_READCLRACC,Shortcut between event SAMPLERDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DBLRDY_STOP,Shortcut between event DBLRDY and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 4. "DBLRDY_RDCLRDBL,Shortcut between event DBLRDY and task RDCLRDBL" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 3. "REPORTRDY_STOP,Shortcut between event REPORTRDY and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "REPORTRDY_RDCLRACC,Shortcut between event REPORTRDY and task RDCLRACC" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 1. "SAMPLERDY_STOP,Shortcut between event SAMPLERDY and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "REPORTRDY_READCLRACC,Shortcut between event REPORTRDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 4. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x0 3. "DBLRDY,Write '1' to enable interrupt for event DBLRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "ACCOF,Write '1' to enable interrupt for event ACCOF" "0: Read: Disabled,1: Enable" bitfld.long 0x0 1. "REPORTRDY,Write '1' to enable interrupt for event REPORTRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "SAMPLERDY,Write '1' to enable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 4. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x4 3. "DBLRDY,Write '1' to disable interrupt for event DBLRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "ACCOF,Write '1' to disable interrupt for event ACCOF" "0: Read: Disabled,1: Disable" bitfld.long 0x4 1. "REPORTRDY,Write '1' to disable interrupt for event REPORTRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "SAMPLERDY,Write '1' to disable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Disable" group.long 0x500++0xB line.long 0x0 "ENABLE,Enable the quadrature decoder" bitfld.long 0x0 0. "ENABLE,Enable or disable the quadrature decoder" "0: Disable,1: Enable" line.long 0x4 "LEDPOL,LED output pin polarity" bitfld.long 0x4 0. "LEDPOL,LED output pin polarity" "0: Led active on output pin low,1: Led active on output pin high" line.long 0x8 "SAMPLEPER,Sample period" hexmask.long.byte 0x8 0.--3. 1. "SAMPLEPER,Sample period. The SAMPLE register will be updated for every new sample" rgroup.long 0x50C++0x3 line.long 0x0 "SAMPLE,Motion sample value" hexmask.long 0x0 0.--31. 1. "SAMPLE,Last motion sample" group.long 0x510++0x3 line.long 0x0 "REPORTPER,Number of samples to be taken before REPORTRDY and DBLRDY events can be generated" hexmask.long.byte 0x0 0.--3. 1. "REPORTPER,Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated." rgroup.long 0x514++0x7 line.long 0x0 "ACC,Register accumulating the valid transitions" hexmask.long 0x0 0.--31. 1. "ACC,Register accumulating all valid samples (not double transition) read from the SAMPLE register." line.long 0x4 "ACCREAD,Snapshot of the ACC register. updated by the READCLRACC or RDCLRACC task" hexmask.long 0x4 0.--31. 1. "ACCREAD,Snapshot of the ACC register." tree "PSEL" base ad:0x400E1000 group.long 0x0++0xB line.long 0x0 "LED,Pin select for LED signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "A,Pin select for A signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "B,Pin select for B signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" tree.end base ad:0x400E1000 newline group.long 0x528++0x3 newline line.long 0x0 "DBFEN,Enable input debounce filters" bitfld.long 0x0 0. "DBFEN,Enable input debounce filters" "0: Debounce input filters disabled,1: Debounce input filters enabled" group.long 0x540++0x3 line.long 0x0 "LEDPRE,Time period the LED is switched ON prior to sampling" hexmask.long.word 0x0 0.--8. 1. "LEDPRE,Period in us the LED is switched on prior to sampling" rgroup.long 0x544++0x7 line.long 0x0 "ACCDBL,Register accumulating the number of detected double transitions" hexmask.long.byte 0x0 0.--3. 1. "ACCDBL,Register accumulating the number of detected double or illegal transitions. ( SAMPLE = 2 )." line.long 0x4 "ACCDBLREAD,Snapshot of the ACCDBL. updated by the READCLRACC or RDCLRDBL task" hexmask.long.byte 0x4 0.--3. 1. "ACCDBLREAD,Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDBL task is triggered." tree.end tree "GLOBAL_QDEC21_S" base ad:0x500E1000 wgroup.long 0x0++0x13 line.long 0x0 "TASKS_START,Task starting the quadrature decoder" bitfld.long 0x0 0. "TASKS_START,Task starting the quadrature decoder" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Task stopping the quadrature decoder" bitfld.long 0x4 0. "TASKS_STOP,Task stopping the quadrature decoder" "?,1: Trigger task" line.long 0x8 "TASKS_READCLRACC,Read and clear ACC and ACCDBL" bitfld.long 0x8 0. "TASKS_READCLRACC,Read and clear ACC and ACCDBL" "?,1: Trigger task" line.long 0xC "TASKS_RDCLRACC,Read and clear ACC" bitfld.long 0xC 0. "TASKS_RDCLRACC,Read and clear ACC" "?,1: Trigger task" line.long 0x10 "TASKS_RDCLRDBL,Read and clear ACCDBL" bitfld.long 0x10 0. "TASKS_RDCLRDBL,Read and clear ACCDBL" "?,1: Trigger task" group.long 0x80++0x13 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_READCLRACC,Subscribe configuration for task READCLRACC" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task READCLRACC will subscribe to" line.long 0xC "SUBSCRIBE_RDCLRACC,Subscribe configuration for task RDCLRACC" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task RDCLRACC will subscribe to" line.long 0x10 "SUBSCRIBE_RDCLRDBL,Subscribe configuration for task RDCLRDBL" bitfld.long 0x10 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that task RDCLRDBL will subscribe to" group.long 0x100++0x13 line.long 0x0 "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register" bitfld.long 0x0 0. "EVENTS_SAMPLERDY,Event being generated for every new sample value written to the SAMPLE register" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_REPORTRDY,Non-null report ready" bitfld.long 0x4 0. "EVENTS_REPORTRDY,Non-null report ready" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ACCOF,ACC or ACCDBL register overflow" bitfld.long 0x8 0. "EVENTS_ACCOF,ACC or ACCDBL register overflow" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_DBLRDY,Double displacement(s) detected" bitfld.long 0xC 0. "EVENTS_DBLRDY,Double displacement(s) detected" "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_STOPPED,QDEC has been stopped" bitfld.long 0x10 0. "EVENTS_STOPPED,QDEC has been stopped" "0: Event not generated,1: Event generated" group.long 0x180++0x13 line.long 0x0 "PUBLISH_SAMPLERDY,Publish configuration for event SAMPLERDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SAMPLERDY will publish to" line.long 0x4 "PUBLISH_REPORTRDY,Publish configuration for event REPORTRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event REPORTRDY will publish to" line.long 0x8 "PUBLISH_ACCOF,Publish configuration for event ACCOF" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ACCOF will publish to" line.long 0xC "PUBLISH_DBLRDY,Publish configuration for event DBLRDY" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event DBLRDY will publish to" line.long 0x10 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x10 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 6. "SAMPLERDY_READCLRACC,Shortcut between event SAMPLERDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DBLRDY_STOP,Shortcut between event DBLRDY and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 4. "DBLRDY_RDCLRDBL,Shortcut between event DBLRDY and task RDCLRDBL" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 3. "REPORTRDY_STOP,Shortcut between event REPORTRDY and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "REPORTRDY_RDCLRACC,Shortcut between event REPORTRDY and task RDCLRACC" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 1. "SAMPLERDY_STOP,Shortcut between event SAMPLERDY and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "REPORTRDY_READCLRACC,Shortcut between event REPORTRDY and task READCLRACC" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 4. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x0 3. "DBLRDY,Write '1' to enable interrupt for event DBLRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "ACCOF,Write '1' to enable interrupt for event ACCOF" "0: Read: Disabled,1: Enable" bitfld.long 0x0 1. "REPORTRDY,Write '1' to enable interrupt for event REPORTRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "SAMPLERDY,Write '1' to enable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 4. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x4 3. "DBLRDY,Write '1' to disable interrupt for event DBLRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "ACCOF,Write '1' to disable interrupt for event ACCOF" "0: Read: Disabled,1: Disable" bitfld.long 0x4 1. "REPORTRDY,Write '1' to disable interrupt for event REPORTRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "SAMPLERDY,Write '1' to disable interrupt for event SAMPLERDY" "0: Read: Disabled,1: Disable" group.long 0x500++0xB line.long 0x0 "ENABLE,Enable the quadrature decoder" bitfld.long 0x0 0. "ENABLE,Enable or disable the quadrature decoder" "0: Disable,1: Enable" line.long 0x4 "LEDPOL,LED output pin polarity" bitfld.long 0x4 0. "LEDPOL,LED output pin polarity" "0: Led active on output pin low,1: Led active on output pin high" line.long 0x8 "SAMPLEPER,Sample period" hexmask.long.byte 0x8 0.--3. 1. "SAMPLEPER,Sample period. The SAMPLE register will be updated for every new sample" rgroup.long 0x50C++0x3 line.long 0x0 "SAMPLE,Motion sample value" hexmask.long 0x0 0.--31. 1. "SAMPLE,Last motion sample" group.long 0x510++0x3 line.long 0x0 "REPORTPER,Number of samples to be taken before REPORTRDY and DBLRDY events can be generated" hexmask.long.byte 0x0 0.--3. 1. "REPORTPER,Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated." rgroup.long 0x514++0x7 line.long 0x0 "ACC,Register accumulating the valid transitions" hexmask.long 0x0 0.--31. 1. "ACC,Register accumulating all valid samples (not double transition) read from the SAMPLE register." line.long 0x4 "ACCREAD,Snapshot of the ACC register. updated by the READCLRACC or RDCLRACC task" hexmask.long 0x4 0.--31. 1. "ACCREAD,Snapshot of the ACC register." tree "PSEL" base ad:0x500E1000 group.long 0x0++0xB line.long 0x0 "LED,Pin select for LED signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "A,Pin select for A signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "B,Pin select for B signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" tree.end base ad:0x500E1000 newline group.long 0x528++0x3 newline line.long 0x0 "DBFEN,Enable input debounce filters" bitfld.long 0x0 0. "DBFEN,Enable input debounce filters" "0: Debounce input filters disabled,1: Debounce input filters enabled" group.long 0x540++0x3 line.long 0x0 "LEDPRE,Time period the LED is switched ON prior to sampling" hexmask.long.word 0x0 0.--8. 1. "LEDPRE,Period in us the LED is switched on prior to sampling" rgroup.long 0x544++0x7 line.long 0x0 "ACCDBL,Register accumulating the number of detected double transitions" hexmask.long.byte 0x0 0.--3. 1. "ACCDBL,Register accumulating the number of detected double or illegal transitions. ( SAMPLE = 2 )." line.long 0x4 "ACCDBLREAD,Snapshot of the ACCDBL. updated by the READCLRACC or RDCLRDBL task" hexmask.long.byte 0x4 0.--3. 1. "ACCDBLREAD,Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDBL task is triggered." tree.end tree.end tree "RADIO (2.4 GHz Radio)" base ad:0x0 tree "GLOBAL_RADIO_NS" base ad:0x4008A000 wgroup.long 0x0++0x2F line.long 0x0 "TASKS_TXEN,Enable RADIO in TX mode" bitfld.long 0x0 0. "TASKS_TXEN,Enable RADIO in TX mode" "?,1: Trigger task" line.long 0x4 "TASKS_RXEN,Enable RADIO in RX mode" bitfld.long 0x4 0. "TASKS_RXEN,Enable RADIO in RX mode" "?,1: Trigger task" line.long 0x8 "TASKS_START,Start RADIO" bitfld.long 0x8 0. "TASKS_START,Start RADIO" "?,1: Trigger task" line.long 0xC "TASKS_STOP,Stop RADIO" bitfld.long 0xC 0. "TASKS_STOP,Stop RADIO" "?,1: Trigger task" line.long 0x10 "TASKS_DISABLE,Disable RADIO" bitfld.long 0x10 0. "TASKS_DISABLE,Disable RADIO" "?,1: Trigger task" line.long 0x14 "TASKS_RSSISTART,Start the RSSI and take one single sample of the receive signal strength" bitfld.long 0x14 0. "TASKS_RSSISTART,Start the RSSI and take one single sample of the receive signal strength" "?,1: Trigger task" line.long 0x18 "TASKS_BCSTART,Start the bit counter" bitfld.long 0x18 0. "TASKS_BCSTART,Start the bit counter" "?,1: Trigger task" line.long 0x1C "TASKS_BCSTOP,Stop the bit counter" bitfld.long 0x1C 0. "TASKS_BCSTOP,Stop the bit counter" "?,1: Trigger task" line.long 0x20 "TASKS_EDSTART,Start the energy detect measurement used in IEEE 802.15.4 mode" bitfld.long 0x20 0. "TASKS_EDSTART,Start the energy detect measurement used in IEEE 802.15.4 mode" "?,1: Trigger task" line.long 0x24 "TASKS_EDSTOP,Stop the energy detect measurement" bitfld.long 0x24 0. "TASKS_EDSTOP,Stop the energy detect measurement" "?,1: Trigger task" line.long 0x28 "TASKS_CCASTART,Start the clear channel assessment used in IEEE 802.15.4 mode" bitfld.long 0x28 0. "TASKS_CCASTART,Start the clear channel assessment used in IEEE 802.15.4 mode" "?,1: Trigger task" line.long 0x2C "TASKS_CCASTOP,Stop the clear channel assessment" bitfld.long 0x2C 0. "TASKS_CCASTOP,Stop the clear channel assessment" "?,1: Trigger task" wgroup.long 0xA4++0x3 line.long 0x0 "TASKS_SOFTRESET,Reset all public registers. but with these exceptions: DMA registers and EVENT/INTEN/SUBSCRIBE/PUBLISH registers. Only to be used in DISABLED state." bitfld.long 0x0 0. "TASKS_SOFTRESET,Reset all public registers but with these exceptions: DMA registers and EVENT/INTEN/SUBSCRIBE/PUBLISH registers. Only to be used in DISABLED state." "?,1: Trigger task" group.long 0x100++0x2F line.long 0x0 "SUBSCRIBE_TXEN,Subscribe configuration for task TXEN" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task TXEN will subscribe to" line.long 0x4 "SUBSCRIBE_RXEN,Subscribe configuration for task RXEN" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RXEN will subscribe to" line.long 0x8 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0xC "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x10 "SUBSCRIBE_DISABLE,Subscribe configuration for task DISABLE" bitfld.long 0x10 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that task DISABLE will subscribe to" line.long 0x14 "SUBSCRIBE_RSSISTART,Subscribe configuration for task RSSISTART" bitfld.long 0x14 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x14 0.--7. 1. "CHIDX,DPPI channel that task RSSISTART will subscribe to" line.long 0x18 "SUBSCRIBE_BCSTART,Subscribe configuration for task BCSTART" bitfld.long 0x18 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x18 0.--7. 1. "CHIDX,DPPI channel that task BCSTART will subscribe to" line.long 0x1C "SUBSCRIBE_BCSTOP,Subscribe configuration for task BCSTOP" bitfld.long 0x1C 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x1C 0.--7. 1. "CHIDX,DPPI channel that task BCSTOP will subscribe to" line.long 0x20 "SUBSCRIBE_EDSTART,Subscribe configuration for task EDSTART" bitfld.long 0x20 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x20 0.--7. 1. "CHIDX,DPPI channel that task EDSTART will subscribe to" line.long 0x24 "SUBSCRIBE_EDSTOP,Subscribe configuration for task EDSTOP" bitfld.long 0x24 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x24 0.--7. 1. "CHIDX,DPPI channel that task EDSTOP will subscribe to" line.long 0x28 "SUBSCRIBE_CCASTART,Subscribe configuration for task CCASTART" bitfld.long 0x28 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x28 0.--7. 1. "CHIDX,DPPI channel that task CCASTART will subscribe to" line.long 0x2C "SUBSCRIBE_CCASTOP,Subscribe configuration for task CCASTOP" bitfld.long 0x2C 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x2C 0.--7. 1. "CHIDX,DPPI channel that task CCASTOP will subscribe to" group.long 0x1A4++0x3 line.long 0x0 "SUBSCRIBE_SOFTRESET,Subscribe configuration for task SOFTRESET" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SOFTRESET will subscribe to" group.long 0x200++0x33 line.long 0x0 "EVENTS_READY,RADIO has ramped up and is ready to be started" bitfld.long 0x0 0. "EVENTS_READY,RADIO has ramped up and is ready to be started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_TXREADY,RADIO has ramped up and is ready to be started TX path" bitfld.long 0x4 0. "EVENTS_TXREADY,RADIO has ramped up and is ready to be started TX path" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_RXREADY,RADIO has ramped up and is ready to be started RX path" bitfld.long 0x8 0. "EVENTS_RXREADY,RADIO has ramped up and is ready to be started RX path" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_ADDRESS,Address sent or received" bitfld.long 0xC 0. "EVENTS_ADDRESS,Address sent or received" "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_FRAMESTART,IEEE 802.15.4 length field received" bitfld.long 0x10 0. "EVENTS_FRAMESTART,IEEE 802.15.4 length field received" "0: Event not generated,1: Event generated" line.long 0x14 "EVENTS_PAYLOAD,Packet payload sent or received" bitfld.long 0x14 0. "EVENTS_PAYLOAD,Packet payload sent or received" "0: Event not generated,1: Event generated" line.long 0x18 "EVENTS_END,Memory access for packet data has been completed" bitfld.long 0x18 0. "EVENTS_END,Memory access for packet data has been completed" "0: Event not generated,1: Event generated" line.long 0x1C "EVENTS_PHYEND,The last bit is sent on air or last bit is received" bitfld.long 0x1C 0. "EVENTS_PHYEND,The last bit is sent on air or last bit is received" "0: Event not generated,1: Event generated" line.long 0x20 "EVENTS_DISABLED,RADIO has been disabled" bitfld.long 0x20 0. "EVENTS_DISABLED,RADIO has been disabled" "0: Event not generated,1: Event generated" line.long 0x24 "EVENTS_DEVMATCH,A device address match occurred on the last received packet" bitfld.long 0x24 0. "EVENTS_DEVMATCH,A device address match occurred on the last received packet" "0: Event not generated,1: Event generated" line.long 0x28 "EVENTS_DEVMISS,No device address match occurred on the last received packet" bitfld.long 0x28 0. "EVENTS_DEVMISS,No device address match occurred on the last received packet" "0: Event not generated,1: Event generated" line.long 0x2C "EVENTS_CRCOK,Packet received with CRC ok" bitfld.long 0x2C 0. "EVENTS_CRCOK,Packet received with CRC ok" "0: Event not generated,1: Event generated" line.long 0x30 "EVENTS_CRCERROR,Packet received with CRC error" bitfld.long 0x30 0. "EVENTS_CRCERROR,Packet received with CRC error" "0: Event not generated,1: Event generated" group.long 0x238++0x27 line.long 0x0 "EVENTS_BCMATCH,Bit counter reached bit count value" bitfld.long 0x0 0. "EVENTS_BCMATCH,Bit counter reached bit count value" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_EDEND,Sampling of energy detection complete (a new ED sample is ready for readout from the RADIO.EDSAMPLE register)" bitfld.long 0x4 0. "EVENTS_EDEND,Sampling of energy detection complete (a new ED sample is ready for readout from the RADIO.EDSAMPLE register)" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_EDSTOPPED,The sampling of energy detection has stopped" bitfld.long 0x8 0. "EVENTS_EDSTOPPED,The sampling of energy detection has stopped" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_CCAIDLE,Wireless medium in idle - clear to send" bitfld.long 0xC 0. "EVENTS_CCAIDLE,Wireless medium in idle - clear to send" "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_CCABUSY,Wireless medium busy - do not send" bitfld.long 0x10 0. "EVENTS_CCABUSY,Wireless medium busy - do not send" "0: Event not generated,1: Event generated" line.long 0x14 "EVENTS_CCASTOPPED,The CCA has stopped" bitfld.long 0x14 0. "EVENTS_CCASTOPPED,The CCA has stopped" "0: Event not generated,1: Event generated" line.long 0x18 "EVENTS_RATEBOOST,Ble_LR CI field received. receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit" bitfld.long 0x18 0. "EVENTS_RATEBOOST,Ble_LR CI field received receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit" "0: Event not generated,1: Event generated" line.long 0x1C "EVENTS_MHRMATCH,MAC header match found" bitfld.long 0x1C 0. "EVENTS_MHRMATCH,MAC header match found" "0: Event not generated,1: Event generated" line.long 0x20 "EVENTS_SYNC,Initial sync detected" bitfld.long 0x20 0. "EVENTS_SYNC,Initial sync detected" "0: Event not generated,1: Event generated" line.long 0x24 "EVENTS_CTEPRESENT,CTEInfo byte is received" bitfld.long 0x24 0. "EVENTS_CTEPRESENT,CTEInfo byte is received" "0: Event not generated,1: Event generated" group.long 0x300++0x33 line.long 0x0 "PUBLISH_READY,Publish configuration for event READY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x4 "PUBLISH_TXREADY,Publish configuration for event TXREADY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event TXREADY will publish to" line.long 0x8 "PUBLISH_RXREADY,Publish configuration for event RXREADY" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event RXREADY will publish to" line.long 0xC "PUBLISH_ADDRESS,Publish configuration for event ADDRESS" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event ADDRESS will publish to" line.long 0x10 "PUBLISH_FRAMESTART,Publish configuration for event FRAMESTART" bitfld.long 0x10 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that event FRAMESTART will publish to" line.long 0x14 "PUBLISH_PAYLOAD,Publish configuration for event PAYLOAD" bitfld.long 0x14 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x14 0.--7. 1. "CHIDX,DPPI channel that event PAYLOAD will publish to" line.long 0x18 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x18 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x18 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x1C "PUBLISH_PHYEND,Publish configuration for event PHYEND" bitfld.long 0x1C 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x1C 0.--7. 1. "CHIDX,DPPI channel that event PHYEND will publish to" line.long 0x20 "PUBLISH_DISABLED,Publish configuration for event DISABLED" bitfld.long 0x20 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x20 0.--7. 1. "CHIDX,DPPI channel that event DISABLED will publish to" line.long 0x24 "PUBLISH_DEVMATCH,Publish configuration for event DEVMATCH" bitfld.long 0x24 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x24 0.--7. 1. "CHIDX,DPPI channel that event DEVMATCH will publish to" line.long 0x28 "PUBLISH_DEVMISS,Publish configuration for event DEVMISS" bitfld.long 0x28 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x28 0.--7. 1. "CHIDX,DPPI channel that event DEVMISS will publish to" line.long 0x2C "PUBLISH_CRCOK,Publish configuration for event CRCOK" bitfld.long 0x2C 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x2C 0.--7. 1. "CHIDX,DPPI channel that event CRCOK will publish to" line.long 0x30 "PUBLISH_CRCERROR,Publish configuration for event CRCERROR" bitfld.long 0x30 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x30 0.--7. 1. "CHIDX,DPPI channel that event CRCERROR will publish to" group.long 0x338++0x27 line.long 0x0 "PUBLISH_BCMATCH,Publish configuration for event BCMATCH" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event BCMATCH will publish to" line.long 0x4 "PUBLISH_EDEND,Publish configuration for event EDEND" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event EDEND will publish to" line.long 0x8 "PUBLISH_EDSTOPPED,Publish configuration for event EDSTOPPED" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event EDSTOPPED will publish to" line.long 0xC "PUBLISH_CCAIDLE,Publish configuration for event CCAIDLE" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event CCAIDLE will publish to" line.long 0x10 "PUBLISH_CCABUSY,Publish configuration for event CCABUSY" bitfld.long 0x10 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that event CCABUSY will publish to" line.long 0x14 "PUBLISH_CCASTOPPED,Publish configuration for event CCASTOPPED" bitfld.long 0x14 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x14 0.--7. 1. "CHIDX,DPPI channel that event CCASTOPPED will publish to" line.long 0x18 "PUBLISH_RATEBOOST,Publish configuration for event RATEBOOST" bitfld.long 0x18 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x18 0.--7. 1. "CHIDX,DPPI channel that event RATEBOOST will publish to" line.long 0x1C "PUBLISH_MHRMATCH,Publish configuration for event MHRMATCH" bitfld.long 0x1C 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x1C 0.--7. 1. "CHIDX,DPPI channel that event MHRMATCH will publish to" line.long 0x20 "PUBLISH_SYNC,Publish configuration for event SYNC" bitfld.long 0x20 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x20 0.--7. 1. "CHIDX,DPPI channel that event SYNC will publish to" line.long 0x24 "PUBLISH_CTEPRESENT,Publish configuration for event CTEPRESENT" bitfld.long 0x24 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x24 0.--7. 1. "CHIDX,DPPI channel that event CTEPRESENT will publish to" group.long 0x400++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 20. "PHYEND_START,Shortcut between event PHYEND and task START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "PHYEND_DISABLE,Shortcut between event PHYEND and task DISABLE" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 18. "RXREADY_START,Shortcut between event RXREADY and task START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "TXREADY_START,Shortcut between event TXREADY and task START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 16. "CCAIDLE_STOP,Shortcut between event CCAIDLE and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 15. "EDEND_DISABLE,Shortcut between event EDEND and task DISABLE" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 14. "READY_EDSTART,Shortcut between event READY and task EDSTART" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 13. "FRAMESTART_BCSTART,Shortcut between event FRAMESTART and task BCSTART" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 12. "CCABUSY_DISABLE,Shortcut between event CCABUSY and task DISABLE" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 11. "CCAIDLE_TXEN,Shortcut between event CCAIDLE and task TXEN" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 10. "RXREADY_CCASTART,Shortcut between event RXREADY and task CCASTART" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "ADDRESS_BCSTART,Shortcut between event ADDRESS and task BCSTART" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 4. "ADDRESS_RSSISTART,Shortcut between event ADDRESS and task RSSISTART" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "DISABLED_RXEN,Shortcut between event DISABLED and task RXEN" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "DISABLED_TXEN,Shortcut between event DISABLED and task TXEN" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "READY_START,Shortcut between event READY and task START" "0: Disable shortcut,1: Enable shortcut" group.long 0x488++0x3 line.long 0x0 "INTENSET00,Enable interrupt" bitfld.long 0x0 23. "CTEPRESENT,Write '1' to enable interrupt for event CTEPRESENT" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "SYNC,Write '1' to enable interrupt for event SYNC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "MHRMATCH,Write '1' to enable interrupt for event MHRMATCH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "RATEBOOST,Write '1' to enable interrupt for event RATEBOOST" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "CCASTOPPED,Write '1' to enable interrupt for event CCASTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 18. "CCABUSY,Write '1' to enable interrupt for event CCABUSY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 17. "CCAIDLE,Write '1' to enable interrupt for event CCAIDLE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 16. "EDSTOPPED,Write '1' to enable interrupt for event EDSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 15. "EDEND,Write '1' to enable interrupt for event EDEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 14. "BCMATCH,Write '1' to enable interrupt for event BCMATCH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 12. "CRCERROR,Write '1' to enable interrupt for event CRCERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 11. "CRCOK,Write '1' to enable interrupt for event CRCOK" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 10. "DEVMISS,Write '1' to enable interrupt for event DEVMISS" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 9. "DEVMATCH,Write '1' to enable interrupt for event DEVMATCH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 8. "DISABLED,Write '1' to enable interrupt for event DISABLED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 7. "PHYEND,Write '1' to enable interrupt for event PHYEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 5. "PAYLOAD,Write '1' to enable interrupt for event PAYLOAD" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 4. "FRAMESTART,Write '1' to enable interrupt for event FRAMESTART" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 3. "ADDRESS,Write '1' to enable interrupt for event ADDRESS" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "RXREADY,Write '1' to enable interrupt for event RXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "TXREADY,Write '1' to enable interrupt for event TXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Enable" group.long 0x490++0x3 line.long 0x0 "INTENCLR00,Disable interrupt" bitfld.long 0x0 23. "CTEPRESENT,Write '1' to disable interrupt for event CTEPRESENT" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 22. "SYNC,Write '1' to disable interrupt for event SYNC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 21. "MHRMATCH,Write '1' to disable interrupt for event MHRMATCH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 20. "RATEBOOST,Write '1' to disable interrupt for event RATEBOOST" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 19. "CCASTOPPED,Write '1' to disable interrupt for event CCASTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 18. "CCABUSY,Write '1' to disable interrupt for event CCABUSY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 17. "CCAIDLE,Write '1' to disable interrupt for event CCAIDLE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 16. "EDSTOPPED,Write '1' to disable interrupt for event EDSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 15. "EDEND,Write '1' to disable interrupt for event EDEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 14. "BCMATCH,Write '1' to disable interrupt for event BCMATCH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 12. "CRCERROR,Write '1' to disable interrupt for event CRCERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 11. "CRCOK,Write '1' to disable interrupt for event CRCOK" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 10. "DEVMISS,Write '1' to disable interrupt for event DEVMISS" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 9. "DEVMATCH,Write '1' to disable interrupt for event DEVMATCH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 8. "DISABLED,Write '1' to disable interrupt for event DISABLED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 7. "PHYEND,Write '1' to disable interrupt for event PHYEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 5. "PAYLOAD,Write '1' to disable interrupt for event PAYLOAD" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 4. "FRAMESTART,Write '1' to disable interrupt for event FRAMESTART" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 3. "ADDRESS,Write '1' to disable interrupt for event ADDRESS" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 2. "RXREADY,Write '1' to disable interrupt for event RXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 1. "TXREADY,Write '1' to disable interrupt for event TXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Disable" group.long 0x4A8++0x3 line.long 0x0 "INTENSET10,Enable interrupt" bitfld.long 0x0 23. "CTEPRESENT,Write '1' to enable interrupt for event CTEPRESENT" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "SYNC,Write '1' to enable interrupt for event SYNC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "MHRMATCH,Write '1' to enable interrupt for event MHRMATCH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "RATEBOOST,Write '1' to enable interrupt for event RATEBOOST" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "CCASTOPPED,Write '1' to enable interrupt for event CCASTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 18. "CCABUSY,Write '1' to enable interrupt for event CCABUSY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 17. "CCAIDLE,Write '1' to enable interrupt for event CCAIDLE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 16. "EDSTOPPED,Write '1' to enable interrupt for event EDSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 15. "EDEND,Write '1' to enable interrupt for event EDEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 14. "BCMATCH,Write '1' to enable interrupt for event BCMATCH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 12. "CRCERROR,Write '1' to enable interrupt for event CRCERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 11. "CRCOK,Write '1' to enable interrupt for event CRCOK" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 10. "DEVMISS,Write '1' to enable interrupt for event DEVMISS" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 9. "DEVMATCH,Write '1' to enable interrupt for event DEVMATCH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 8. "DISABLED,Write '1' to enable interrupt for event DISABLED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 7. "PHYEND,Write '1' to enable interrupt for event PHYEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 5. "PAYLOAD,Write '1' to enable interrupt for event PAYLOAD" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 4. "FRAMESTART,Write '1' to enable interrupt for event FRAMESTART" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 3. "ADDRESS,Write '1' to enable interrupt for event ADDRESS" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "RXREADY,Write '1' to enable interrupt for event RXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "TXREADY,Write '1' to enable interrupt for event TXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Enable" group.long 0x4B0++0x3 line.long 0x0 "INTENCLR10,Disable interrupt" bitfld.long 0x0 23. "CTEPRESENT,Write '1' to disable interrupt for event CTEPRESENT" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 22. "SYNC,Write '1' to disable interrupt for event SYNC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 21. "MHRMATCH,Write '1' to disable interrupt for event MHRMATCH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 20. "RATEBOOST,Write '1' to disable interrupt for event RATEBOOST" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 19. "CCASTOPPED,Write '1' to disable interrupt for event CCASTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 18. "CCABUSY,Write '1' to disable interrupt for event CCABUSY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 17. "CCAIDLE,Write '1' to disable interrupt for event CCAIDLE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 16. "EDSTOPPED,Write '1' to disable interrupt for event EDSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 15. "EDEND,Write '1' to disable interrupt for event EDEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 14. "BCMATCH,Write '1' to disable interrupt for event BCMATCH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 12. "CRCERROR,Write '1' to disable interrupt for event CRCERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 11. "CRCOK,Write '1' to disable interrupt for event CRCOK" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 10. "DEVMISS,Write '1' to disable interrupt for event DEVMISS" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 9. "DEVMATCH,Write '1' to disable interrupt for event DEVMATCH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 8. "DISABLED,Write '1' to disable interrupt for event DISABLED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 7. "PHYEND,Write '1' to disable interrupt for event PHYEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 5. "PAYLOAD,Write '1' to disable interrupt for event PAYLOAD" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 4. "FRAMESTART,Write '1' to disable interrupt for event FRAMESTART" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 3. "ADDRESS,Write '1' to disable interrupt for event ADDRESS" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 2. "RXREADY,Write '1' to disable interrupt for event RXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 1. "TXREADY,Write '1' to disable interrupt for event TXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "MODE,Data rate and modulation" hexmask.long.byte 0x0 0.--3. 1. "MODE,Radio data rate and modulation setting. The radio supports frequency-shift keying (FSK) modulation." rgroup.long 0x520++0x3 line.long 0x0 "STATE,Current radio state" hexmask.long.byte 0x0 0.--3. 1. "STATE,Current radio state" group.long 0x530++0x3 line.long 0x0 "EDCTRL,IEEE 802.15.4 energy detect control" hexmask.long.byte 0x0 24.--29. 1. "EDPERIOD,IEEE 802.15.4 energy detect period 4us resolution no averaging except the IEEE 802.15.4 ED range 128us (32)" newline hexmask.long.tbyte 0x0 0.--20. 1. "EDCNT,IEEE 802.15.4 energy detect loop count" rgroup.long 0x534++0x3 line.long 0x0 "EDSAMPLE,IEEE 802.15.4 energy detect level" hexmask.long.byte 0x0 0.--7. 1. "EDLVL,IEEE 802.15.4 energy detect level" group.long 0x538++0x3 line.long 0x0 "CCACTRL,IEEE 802.15.4 clear channel assessment control" hexmask.long.byte 0x0 24.--31. 1. "CCACORRCNT,Limit for occurances above CCACORRTHRES. When not equal to zero the corrolator based signal detect is enabled." newline hexmask.long.byte 0x0 16.--23. 1. "CCACORRTHRES,CCA correlator busy threshold. Only relevant to CarrierMode CarrierAndEdMode and CarrierOrEdMode." newline hexmask.long.byte 0x0 8.--15. 1. "CCAEDTHRES,CCA energy busy threshold. Used in all the CCA modes except CarrierMode." newline bitfld.long 0x0 0.--2. "CCAMODE,CCA mode of operation" "0: Energy above threshold,1: Carrier seen,2: Energy above threshold AND carrier seen,3: Energy above threshold OR carrier seen,4: Energy above threshold test mode that will abort..,?,?,?" group.long 0x540++0x3 line.long 0x0 "DATAWHITE,Data whitening configuration" hexmask.long.word 0x0 16.--25. 1. "POLY,Whitening polynomial" newline hexmask.long.word 0x0 0.--8. 1. "IV,Whitening initial value" group.long 0x704++0x7 line.long 0x0 "TIMING,Timing" bitfld.long 0x0 0. "RU,Ramp-up time" "0: Legacy ramp-up time,1: Fast ramp-up (default)" line.long 0x4 "FREQUENCY,Frequency" bitfld.long 0x4 8. "MAP,Channel map selection. 0: Channel map between 2400 MHZ to 2500 MHz Frequency = 2400 + FREQUENCY (MHz). 1: Channel map between 2360 MHZ to 2460 MHz Frequency = 2360 + FREQUENCY (MHz)." "0: Channel map between 2400 MHZ to 2500 MHz,1: Channel map between 2360 MHZ to 2460 MHz" newline hexmask.long.byte 0x4 0.--6. 1. "FREQUENCY,Radio channel frequency. Frequency = 2400 + FREQUENCY (MHz)." group.long 0x710++0x7 line.long 0x0 "TXPOWER,Output power" hexmask.long.word 0x0 0.--10. 1. "TXPOWER,RADIO output power" line.long 0x4 "TIFS,Interframe spacing in us" hexmask.long.word 0x4 0.--9. 1. "TIFS,Interframe spacing in us. Interframe space is the time interval between two consecutive packets. It is defined as the time in microseconds from the end of the last bit of the previous packet to the start of the first bit of the subsequent packet." rgroup.long 0x718++0x3 line.long 0x0 "RSSISAMPLE,RSSI sample" hexmask.long.byte 0x0 0.--6. 1. "RSSISAMPLE,RSSI sample result. The value of this register is read as a positive value while the actual received signal strength is a negative value. Actual received signal strength is therefore as follows: received signal strength = -A dBm." group.long 0x908++0x3 line.long 0x0 "FECONFIG,Config register" bitfld.long 0x0 20. "SCALERMODE,Mode for narrow scaling output." "0: Classic log based scaling mode.,1: LUT based scaling mode." group.long 0xD00++0x3 line.long 0x0 "DFEMODE,Whether to use Angle-of-Arrival (AOA) or Angle-of-Departure (AOD)" bitfld.long 0x0 0.--1. "DFEOPMODE,Direction finding operation mode" "0: Direction finding mode disabled,?,2: Direction finding mode set to AoD,3: Direction finding mode set to AoA" rgroup.long 0xD04++0x3 line.long 0x0 "DFESTATUS,DFE status information" bitfld.long 0x0 4. "SAMPLINGSTATE,Internal state of sampling state machine" "0: Sampling state Idle,1: Sampling state Sampling" newline bitfld.long 0x0 0.--2. "SWITCHINGSTATE,Internal state of switching state machine" "0: Switching state Idle,1: Switching state Offset,2: Switching state Guard,3: Switching state Ref,4: Switching state Switching,5: Switching state Ending,?,?" group.long 0xD10++0x7 line.long 0x0 "DFECTRL1,Various configuration for Direction finding" hexmask.long.byte 0x0 24.--27. 1. "AGCBACKOFFGAIN,Gain will be lowered by the specified number of gain steps at the start of CTE" newline hexmask.long.byte 0x0 20.--23. 1. "REPEATPATTERN,Repeat every antenna pattern N times." newline bitfld.long 0x0 16.--18. "TSAMPLESPACING,Interval between samples in the SWITCHING period when CTEINLINECTRLEN is 0" "?,1: 4us,2: 2us,3: 1us,4: 0.5us,5: 0.25us,6: 0.125us,?" newline bitfld.long 0x0 15. "SAMPLETYPE,Whether to sample I/Q or magnitude/phase" "0: Complex samples in I and Q,1: Complex samples as magnitude and phase" newline bitfld.long 0x0 12.--14. "TSAMPLESPACINGREF,Interval between samples in the REFERENCE period" "?,1: 4us,2: 2us,3: 1us,4: 0.5us,5: 0.25us,6: 0.125us,?" newline bitfld.long 0x0 8.--10. "TSWITCHSPACING,Interval between every time the antenna is changed in the SWITCHING state" "?,1: 4us,2: 2us,3: 1us,?,?,?,?" newline bitfld.long 0x0 7. "DFEINEXTENSION,Add CTE extension and do antenna switching/sampling in this extension" "0: Antenna switching/sampling is done in the packet..,1: AoA/AoD procedure triggered at end of CRC" newline hexmask.long.byte 0x0 0.--5. 1. "NUMBEROF8US,Length of the AoA/AoD procedure in number of 8 us units" line.long 0x4 "DFECTRL2,Start offset for Direction finding" hexmask.long.word 0x4 16.--27. 1. "TSAMPLEOFFSET,Signed value offset before starting sampling in number of 16M cycles relative to the beginning of the REFERENCE state - 12 us after switching start" newline hexmask.long.word 0x4 0.--12. 1. "TSWITCHOFFSET,Signed value offset after the end of the CRC before starting switching in number of 16M cycles" group.long 0xD28++0x3 line.long 0x0 "SWITCHPATTERN,GPIO patterns to be used for each antenna" hexmask.long.byte 0x0 0.--7. 1. "SWITCHPATTERN,Fill array of GPIO patterns for antenna control" wgroup.long 0xD2C++0x3 line.long 0x0 "CLEARPATTERN,Clear the GPIO pattern array for antenna control" bitfld.long 0x0 0. "CLEARPATTERN,Clear the GPIO pattern array for antenna control Behaves as a task register but does not have PPI nor IRQ" "0,1" tree "DFEPACKET" base ad:0x4008AD50 group.long 0x0++0x7 line.long 0x0 "PTR,Data pointer" hexmask.long 0x0 0.--31. 1. "PTR,Data pointer" line.long 0x4 "MAXCNT,Maximum number of bytes to transfer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes to transfer" rgroup.long 0x8++0x7 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction" hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction" line.long 0x4 "CURRENTAMOUNT,Number of bytes transferred in the current transaction" hexmask.long.word 0x4 0.--15. 1. "AMOUNT,Number of bytes transferred in the current transaction. Continuously updated." tree.end tree "PSEL" base ad:0x4008AD30 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "DFEGPIO[$1],Description collection: Pin select for DFE pin n" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" hexmask.long.byte 0x0 5.--8. 1. "PORT,Port number" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" repeat.end tree.end base ad:0x4008A000 newline rgroup.long 0xE0C++0x13 newline line.long 0x0 "CRCSTATUS,CRC status" bitfld.long 0x0 0. "CRCSTATUS,CRC status of packet received" "0: Packet received with CRC error,1: Packet received with CRC ok" line.long 0x4 "RXMATCH,Received address" bitfld.long 0x4 0.--2. "RXMATCH,Received address" "0,1,2,3,4,5,6,7" line.long 0x8 "RXCRC,CRC field of previously received packet" hexmask.long.tbyte 0x8 0.--23. 1. "RXCRC,CRC field of previously received packet" line.long 0xC "DAI,Device address match index" bitfld.long 0xC 0.--2. "DAI,Device address match index" "0,1,2,3,4,5,6,7" line.long 0x10 "PDUSTAT,Payload status" bitfld.long 0x10 1.--2. "CISTAT,Status on what rate packet is received with in Long Range" "0: Frame is received at 125 kbps,1: Frame is received at 500 kbps,?,?" newline bitfld.long 0x10 0. "PDUSTAT,Status on payload length vs. PCNF1.MAXLEN" "0: Payload less than PCNF1.MAXLEN,1: Payload greater than PCNF1.MAXLEN" group.long 0xE20++0x3 line.long 0x0 "PCNF0,Packet configuration register 0" bitfld.long 0x0 29.--30. "TERMLEN,Length of TERM field in Long Range operation" "0,1,2,3" newline bitfld.long 0x0 26. "CRCINC,Indicates if LENGTH field contains CRC or not" "0: LENGTH does not contain CRC,1: LENGTH includes CRC" newline bitfld.long 0x0 24.--25. "PLEN,Length of preamble on air. Decision point: TASKS_START task" "0: 8-bit preamble,1: 16-bit preamble,2: 32-bit zero preamble - used for IEEE 802.15.4,3: Preamble - used for BLE long range" newline bitfld.long 0x0 22.--23. "CILEN,Length of code indicator - long range" "0,1,2,3" newline bitfld.long 0x0 20.--21. "S1INCL,Include or exclude S1 field in RAM" "0: Include S1 field in RAM only if S1LEN > 0,1: Always include S1 field in RAM independent of..,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "S1LEN,Length on air of S1 field in number of bits." newline bitfld.long 0x0 8. "S0LEN,Length on air of S0 field in number of bytes." "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "LFLEN,Length on air of LENGTH field in number of bits." group.long 0xE28++0x27 line.long 0x0 "PCNF1,Packet configuration register 1" bitfld.long 0x0 26. "WHITEOFFSET,If whitening is enabled S0 can be configured to be excluded from whitening" "0: S0 included in whitening,1: S0 excluded from whitening" newline bitfld.long 0x0 25. "WHITEEN,Enable or disable packet whitening" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "ENDIAN,On-air endianness of packet this applies to the S0 LENGTH S1 and the PAYLOAD fields." "0: Least significant bit on air first,1: Most significant bit on air first" newline bitfld.long 0x0 16.--18. "BALEN,Base address length in number of bytes" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 8.--15. 1. "STATLEN,Static length in number of bytes" newline hexmask.long.byte 0x0 0.--7. 1. "MAXLEN,Maximum length of packet payload. If the packet payload is larger than MAXLEN the radio will truncate the payload to MAXLEN." line.long 0x4 "BASE0,Base address 0" hexmask.long 0x4 0.--31. 1. "BASE0,Base address 0" line.long 0x8 "BASE1,Base address 1" hexmask.long 0x8 0.--31. 1. "BASE1,Base address 1" line.long 0xC "PREFIX0,Prefixes bytes for logical addresses 0-3" hexmask.long.byte 0xC 24.--31. 1. "AP3,Address prefix 3" newline hexmask.long.byte 0xC 16.--23. 1. "AP2,Address prefix 2" newline hexmask.long.byte 0xC 8.--15. 1. "AP1,Address prefix 1" newline hexmask.long.byte 0xC 0.--7. 1. "AP0,Address prefix 0" line.long 0x10 "PREFIX1,Prefixes bytes for logical addresses 4-7" hexmask.long.byte 0x10 24.--31. 1. "AP7,Address prefix 7" newline hexmask.long.byte 0x10 16.--23. 1. "AP6,Address prefix 6" newline hexmask.long.byte 0x10 8.--15. 1. "AP5,Address prefix 5" newline hexmask.long.byte 0x10 0.--7. 1. "AP4,Address prefix 4" line.long 0x14 "TXADDRESS,Transmit address select" bitfld.long 0x14 0.--2. "TXADDRESS,Transmit address select" "0,1,2,3,4,5,6,7" line.long 0x18 "RXADDRESSES,Receive address select" bitfld.long 0x18 7. "ADDR7,Enable or disable reception on logical address 7" "0: Disable,1: Enable" newline bitfld.long 0x18 6. "ADDR6,Enable or disable reception on logical address 6" "0: Disable,1: Enable" newline bitfld.long 0x18 5. "ADDR5,Enable or disable reception on logical address 5" "0: Disable,1: Enable" newline bitfld.long 0x18 4. "ADDR4,Enable or disable reception on logical address 4" "0: Disable,1: Enable" newline bitfld.long 0x18 3. "ADDR3,Enable or disable reception on logical address 3" "0: Disable,1: Enable" newline bitfld.long 0x18 2. "ADDR2,Enable or disable reception on logical address 2" "0: Disable,1: Enable" newline bitfld.long 0x18 1. "ADDR1,Enable or disable reception on logical address 1" "0: Disable,1: Enable" newline bitfld.long 0x18 0. "ADDR0,Enable or disable reception on logical address 0" "0: Disable,1: Enable" line.long 0x1C "CRCCNF,CRC configuration" bitfld.long 0x1C 8.--10. "SKIPADDR,Control whether CRC calculation skips the address field. Other fields can also be skipped." "0: CRC calculation includes address field,1: CRC calculation starting at first byte after..,2: CRC calculation starting at first byte after..,3: CRC calculation starting at first byte after S0..,4: CRC calculation starting at first byte after S1..,?,?,?" newline bitfld.long 0x1C 0.--1. "LEN,CRC length in number of bytes." "0: CRC length is zero and CRC calculation is disabled,1: CRC length is one byte and CRC calculation is..,2: CRC length is two bytes and CRC calculation is..,3: CRC length is three bytes and CRC calculation is.." line.long 0x20 "CRCPOLY,CRC polynomial" hexmask.long.tbyte 0x20 0.--23. 1. "CRCPOLY,CRC polynomial" line.long 0x24 "CRCINIT,CRC initial value" hexmask.long.tbyte 0x24 0.--23. 1. "CRCINIT,CRC initial value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xE50)++0x3 line.long 0x0 "DAB[$1],Description collection: Device address base segment n" hexmask.long 0x0 0.--31. 1. "DAB,Device address base segment n" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xE70)++0x3 line.long 0x0 "DAP[$1],Description collection: Device address prefix n" hexmask.long.word 0x0 0.--15. 1. "DAP,Device address prefix n" repeat.end group.long 0xE90++0x7 line.long 0x0 "DACNF,Device address match configuration" bitfld.long 0x0 15. "TXADD7,TxAdd for device address 7" "0,1" newline bitfld.long 0x0 14. "TXADD6,TxAdd for device address 6" "0,1" newline bitfld.long 0x0 13. "TXADD5,TxAdd for device address 5" "0,1" newline bitfld.long 0x0 12. "TXADD4,TxAdd for device address 4" "0,1" newline bitfld.long 0x0 11. "TXADD3,TxAdd for device address 3" "0,1" newline bitfld.long 0x0 10. "TXADD2,TxAdd for device address 2" "0,1" newline bitfld.long 0x0 9. "TXADD1,TxAdd for device address 1" "0,1" newline bitfld.long 0x0 8. "TXADD0,TxAdd for device address 0" "0,1" newline bitfld.long 0x0 7. "ENA7,Enable or disable device address matching using device address 7" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "ENA6,Enable or disable device address matching using device address 6" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "ENA5,Enable or disable device address matching using device address 5" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "ENA4,Enable or disable device address matching using device address 4" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "ENA3,Enable or disable device address matching using device address 3" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "ENA2,Enable or disable device address matching using device address 2" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "ENA1,Enable or disable device address matching using device address 1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "ENA0,Enable or disable device address matching using device address 0" "0: Disabled,1: Enabled" line.long 0x4 "BCC,Bit counter compare" hexmask.long 0x4 0.--31. 1. "BCC,Bit counter compare" rgroup.long 0xEA4++0x3 line.long 0x0 "CTESTATUS,CTEInfo parsed from received packet" bitfld.long 0x0 6.--7. "CTETYPE,CTEType parsed from packet" "0,1,2,3" newline bitfld.long 0x0 5. "RFU,RFU parsed from packet" "0,1" newline hexmask.long.byte 0x0 0.--4. 1. "CTETIME,CTETime parsed from packet" group.long 0xEB4++0xF line.long 0x0 "MHRMATCHCONF,Search pattern configuration" hexmask.long 0x0 0.--31. 1. "MHRMATCHCONF,Search pattern configuration" line.long 0x4 "MHRMATCHMASK,Pattern mask" hexmask.long 0x4 0.--31. 1. "MHRMATCHMASK,Pattern mask" line.long 0x8 "SFD,IEEE 802.15.4 start of frame delimiter" hexmask.long.byte 0x8 0.--7. 1. "SFD,IEEE 802.15.4 start of frame delimiter. Note: the least significant 4 bits of the SFD cannot all be zeros." line.long 0xC "CTEINLINECONF,Configuration for CTE inline mode" hexmask.long.byte 0xC 24.--31. 1. "S0MASK,S0 bit mask to set which bit to match" newline hexmask.long.byte 0xC 16.--23. 1. "S0CONF,S0 bit pattern to match" newline bitfld.long 0xC 13.--15. "CTEINLINERXMODE2US,Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set" "?,1: 4us,2: 2us,3: 1us,4: 0.5us,5: 0.25us,6: 0.125us,?" newline bitfld.long 0xC 10.--12. "CTEINLINERXMODE1US,Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set" "?,1: 4us,2: 2us,3: 1us,4: 0.5us,5: 0.25us,6: 0.125us,?" newline bitfld.long 0xC 6.--7. "CTETIMEVALIDRANGE,Max range of CTETime" "0: 20 in 8us unit (default) Set to 20 if parsed..,1: 31 in 8us unit,2: 63 in 8us unit,?" newline bitfld.long 0xC 4. "CTEERRORHANDLING,Sampling/switching if CRC is not OK" "0: No sampling and antenna switching when CRC is..,1: Sampling and antenna switching also when CRC is.." newline bitfld.long 0xC 3. "CTEINFOINS1,CTEInfo is S1 byte or not" "0: CTEInfo is NOT in S1 byte (advertising PDU),1: CTEInfo is in S1 byte (data PDU)" newline bitfld.long 0xC 0. "CTEINLINECTRLEN,Enable parsing of CTEInfo from received packet in BLE modes" "0: Parsing of CTEInfo is disabled,1: Parsing of CTEInfo is enabled" group.long 0xED0++0x3 line.long 0x0 "PACKETPTR,Packet pointer" hexmask.long 0x0 0.--31. 1. "PTR,Data pointer" tree "CSTONES" base ad:0x4008B000 group.long 0x0++0x1F line.long 0x0 "MODE,Selects the mode(s) that are activated on the start signal" bitfld.long 0x0 1. "TFM,Enable or disable TFM" "0: TFM is disabled,1: TFM is enabled" bitfld.long 0x0 0. "TPM,Enable or disable TPM" "0: TPM is disabled,1: TPM is enabled" line.long 0x4 "NUMSAMPLES,Number of input samples at 2MHz sample rate" hexmask.long.byte 0x4 0.--7. 1. "NUMSAMPLES,Maximum value supported is 160" line.long 0x8 "NEXTFREQUENCY,The value of FREQUENCY that will be used in the next step" hexmask.long.byte 0x8 0.--6. 1. "NEXTFREQUENCY,Frequency = 2400 + FREQUENCY (MHz)" line.long 0xC "FFOIN,Override value of FFO (Fractional Frequency Offset) if not to be based on the frequency estimate derived from CnAcc (autocorrelation of the scaled input signal) value" hexmask.long.word 0xC 0.--11. 1. "FFFIN,Units 62.5 ppb. Max range +/-100 ppm plus margin." line.long 0x10 "FFOSOURCE,Source of FFO" bitfld.long 0x10 0. "FFOSOURCE,Use external or internal FFOSOURCE" "0: Use FFOIN,1: Calc FFO from CnAcc" line.long 0x14 "FAEPEER,FAEPEER (Frequency Actuation Error) of peer if known. Used during Mode 0 steps." hexmask.long.byte 0x14 0.--7. 1. "FAEPEER,Units 31.25 ppb." line.long 0x18 "PHASESHIFT,Parameter used in TPM. provided by software" hexmask.long.word 0x18 0.--15. 1. "PHASESHIFT,Phase shift used in TPM calculation" line.long 0x1C "NUMSAMPLESCOEFF,Parameter used in TPM. provided by software" hexmask.long.word 0x1C 0.--15. 1. "NUMSAMPLESCOEFF,Coefficient 2**16/(numSamples/16) in Q1.15 format (Default numsamples value is 160)" rgroup.long 0x20++0x17 line.long 0x0 "PCT16,Mean magnitude and mean phase converted to IQ" hexmask.long.word 0x0 16.--31. 1. "PCT16Q,Quadrature" hexmask.long.word 0x0 0.--15. 1. "PCT16I,Inphase" line.long 0x4 "MAGPHASEMEAN,Mean magnitude and phase of the signal before it is converted to PCT16" hexmask.long.word 0x4 16.--31. 1. "MAG,Mean magnitude" hexmask.long.word 0x4 0.--15. 1. "PHASE,Mean phase" line.long 0x8 "IQRAWMEAN,Mean of IQ values" hexmask.long.word 0x8 16.--31. 1. "IQRAWMEANQ,Quadrature" hexmask.long.word 0x8 0.--15. 1. "IQRAWMEANI,Inphase" line.long 0xC "MAGSTD,Magnitude standard deviation approximation" hexmask.long.word 0xC 0.--15. 1. "MAGSTD,Magnitude standard deviation approximation" line.long 0x10 "CNACC,Output of the autocorrelation of the accumulated IQ signal" hexmask.long.word 0x10 16.--31. 1. "CNACCQ" hexmask.long.word 0x10 0.--15. 1. "CNACCI" line.long 0x14 "FFOEST,FFO estimate" hexmask.long.word 0x14 0.--11. 1. "FFOEST,Units 62.5 ppb. Max range +/-100 ppm plus margin." group.long 0x38++0x3 line.long 0x0 "DOWNSAMPLE,Turn on/off down sample of input IQ-signals" bitfld.long 0x0 1. "RATE,Indicating if BLE1M or BLE2M is used" "0: Radio mode BLE1M is used,1: Radio mode BLE2M is used" bitfld.long 0x0 0. "ENABLEFILTER,Turn on/off down sample of input IQ-signals" "0: Disable filter,1: Enable filter" rgroup.long 0x3C++0x13 line.long 0x0 "FINETUNENEXT,Number of full ADPLL finetune steps" hexmask.long.word 0x0 0.--12. 1. "FINETUNENEXT,Units of 488.28125 Hz" line.long 0x4 "CFOPHASE,Cordic output of CnAcc" hexmask.long.word 0x4 0.--15. 1. "CFOPHASE" line.long 0x8 "FREQOFFSET,Frequency offset estimate" hexmask.long.word 0x8 0.--13. 1. "FREQOFFSET" line.long 0xC "PCT11,Mean magnitude and mean phase converted to IQ. IQ values limited to [-1024.1023]." hexmask.long.word 0xC 11.--21. 1. "PCT11Q,Quadrature" hexmask.long.word 0xC 0.--10. 1. "PCT11I,Inphase" line.long 0x10 "LFAENEXT,Quantization error between ADPLL frequency and the desired value of FFO * RF Frequency. Values limited to [-64.63] with units 7.6294 Hz." hexmask.long.byte 0x10 0.--6. 1. "LFAENEXT,Inphase" tree.end tree "RTT" base ad:0x4008B050 group.long 0x0++0x13 line.long 0x0 "CONFIG,RTT Config." hexmask.long.word 0x0 8.--16. 1. "EFSDELAY,Early Frame Sync Delay i.e. number of cycles to wait for access address to anchor correctly. For 2MBPSBLE mode the EFSDELAY value is 64 (2us) and for 1MBPSBLE mode it can be 256 (8us)." hexmask.long.byte 0x0 3.--6. 1. "NUMSEGMENTS,Number of 16bit payload segments available for ToA detection. Allowed values are 0 2 4 6 and 8." bitfld.long 0x0 2. "ROLE,Role as a Initiator or Reflector." "0: Initiator,1: Reflector" newline bitfld.long 0x0 1. "ENFULLAA,Enabling/Disable ping over the entire access address." "0: Disable ping over the entire access address i.e.,1: Enable ping over the entire access address" bitfld.long 0x0 0. "EN,Enable RTT Functionality. Only valid for BLE 1MBPS and 2MBPS mode" "0: Disable RTT Block,1: Enable RTT Block" line.long 0x4 "SEGMENT01,RTT segments 0 and 1" hexmask.long 0x4 0.--31. 1. "DATA,Data Bits 31 - 0" line.long 0x8 "SEGMENT23,RTT segments 2 and 3" hexmask.long 0x8 0.--31. 1. "DATA,Data Bits 63 - 32" line.long 0xC "SEGMENT45,RTT segments 4 and 5" hexmask.long 0xC 0.--31. 1. "DATA,Data Bits 95 - 64" line.long 0x10 "SEGMENT67,RTT segments 6 and 7" hexmask.long 0x10 0.--31. 1. "DATA,Data Bits 127 - 96" tree.end tree.end tree "GLOBAL_RADIO_S" base ad:0x5008A000 wgroup.long 0x0++0x2F line.long 0x0 "TASKS_TXEN,Enable RADIO in TX mode" bitfld.long 0x0 0. "TASKS_TXEN,Enable RADIO in TX mode" "?,1: Trigger task" line.long 0x4 "TASKS_RXEN,Enable RADIO in RX mode" bitfld.long 0x4 0. "TASKS_RXEN,Enable RADIO in RX mode" "?,1: Trigger task" line.long 0x8 "TASKS_START,Start RADIO" bitfld.long 0x8 0. "TASKS_START,Start RADIO" "?,1: Trigger task" line.long 0xC "TASKS_STOP,Stop RADIO" bitfld.long 0xC 0. "TASKS_STOP,Stop RADIO" "?,1: Trigger task" line.long 0x10 "TASKS_DISABLE,Disable RADIO" bitfld.long 0x10 0. "TASKS_DISABLE,Disable RADIO" "?,1: Trigger task" line.long 0x14 "TASKS_RSSISTART,Start the RSSI and take one single sample of the receive signal strength" bitfld.long 0x14 0. "TASKS_RSSISTART,Start the RSSI and take one single sample of the receive signal strength" "?,1: Trigger task" line.long 0x18 "TASKS_BCSTART,Start the bit counter" bitfld.long 0x18 0. "TASKS_BCSTART,Start the bit counter" "?,1: Trigger task" line.long 0x1C "TASKS_BCSTOP,Stop the bit counter" bitfld.long 0x1C 0. "TASKS_BCSTOP,Stop the bit counter" "?,1: Trigger task" line.long 0x20 "TASKS_EDSTART,Start the energy detect measurement used in IEEE 802.15.4 mode" bitfld.long 0x20 0. "TASKS_EDSTART,Start the energy detect measurement used in IEEE 802.15.4 mode" "?,1: Trigger task" line.long 0x24 "TASKS_EDSTOP,Stop the energy detect measurement" bitfld.long 0x24 0. "TASKS_EDSTOP,Stop the energy detect measurement" "?,1: Trigger task" line.long 0x28 "TASKS_CCASTART,Start the clear channel assessment used in IEEE 802.15.4 mode" bitfld.long 0x28 0. "TASKS_CCASTART,Start the clear channel assessment used in IEEE 802.15.4 mode" "?,1: Trigger task" line.long 0x2C "TASKS_CCASTOP,Stop the clear channel assessment" bitfld.long 0x2C 0. "TASKS_CCASTOP,Stop the clear channel assessment" "?,1: Trigger task" wgroup.long 0xA4++0x3 line.long 0x0 "TASKS_SOFTRESET,Reset all public registers. but with these exceptions: DMA registers and EVENT/INTEN/SUBSCRIBE/PUBLISH registers. Only to be used in DISABLED state." bitfld.long 0x0 0. "TASKS_SOFTRESET,Reset all public registers but with these exceptions: DMA registers and EVENT/INTEN/SUBSCRIBE/PUBLISH registers. Only to be used in DISABLED state." "?,1: Trigger task" group.long 0x100++0x2F line.long 0x0 "SUBSCRIBE_TXEN,Subscribe configuration for task TXEN" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task TXEN will subscribe to" line.long 0x4 "SUBSCRIBE_RXEN,Subscribe configuration for task RXEN" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RXEN will subscribe to" line.long 0x8 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0xC "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x10 "SUBSCRIBE_DISABLE,Subscribe configuration for task DISABLE" bitfld.long 0x10 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that task DISABLE will subscribe to" line.long 0x14 "SUBSCRIBE_RSSISTART,Subscribe configuration for task RSSISTART" bitfld.long 0x14 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x14 0.--7. 1. "CHIDX,DPPI channel that task RSSISTART will subscribe to" line.long 0x18 "SUBSCRIBE_BCSTART,Subscribe configuration for task BCSTART" bitfld.long 0x18 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x18 0.--7. 1. "CHIDX,DPPI channel that task BCSTART will subscribe to" line.long 0x1C "SUBSCRIBE_BCSTOP,Subscribe configuration for task BCSTOP" bitfld.long 0x1C 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x1C 0.--7. 1. "CHIDX,DPPI channel that task BCSTOP will subscribe to" line.long 0x20 "SUBSCRIBE_EDSTART,Subscribe configuration for task EDSTART" bitfld.long 0x20 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x20 0.--7. 1. "CHIDX,DPPI channel that task EDSTART will subscribe to" line.long 0x24 "SUBSCRIBE_EDSTOP,Subscribe configuration for task EDSTOP" bitfld.long 0x24 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x24 0.--7. 1. "CHIDX,DPPI channel that task EDSTOP will subscribe to" line.long 0x28 "SUBSCRIBE_CCASTART,Subscribe configuration for task CCASTART" bitfld.long 0x28 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x28 0.--7. 1. "CHIDX,DPPI channel that task CCASTART will subscribe to" line.long 0x2C "SUBSCRIBE_CCASTOP,Subscribe configuration for task CCASTOP" bitfld.long 0x2C 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x2C 0.--7. 1. "CHIDX,DPPI channel that task CCASTOP will subscribe to" group.long 0x1A4++0x3 line.long 0x0 "SUBSCRIBE_SOFTRESET,Subscribe configuration for task SOFTRESET" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SOFTRESET will subscribe to" group.long 0x200++0x33 line.long 0x0 "EVENTS_READY,RADIO has ramped up and is ready to be started" bitfld.long 0x0 0. "EVENTS_READY,RADIO has ramped up and is ready to be started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_TXREADY,RADIO has ramped up and is ready to be started TX path" bitfld.long 0x4 0. "EVENTS_TXREADY,RADIO has ramped up and is ready to be started TX path" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_RXREADY,RADIO has ramped up and is ready to be started RX path" bitfld.long 0x8 0. "EVENTS_RXREADY,RADIO has ramped up and is ready to be started RX path" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_ADDRESS,Address sent or received" bitfld.long 0xC 0. "EVENTS_ADDRESS,Address sent or received" "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_FRAMESTART,IEEE 802.15.4 length field received" bitfld.long 0x10 0. "EVENTS_FRAMESTART,IEEE 802.15.4 length field received" "0: Event not generated,1: Event generated" line.long 0x14 "EVENTS_PAYLOAD,Packet payload sent or received" bitfld.long 0x14 0. "EVENTS_PAYLOAD,Packet payload sent or received" "0: Event not generated,1: Event generated" line.long 0x18 "EVENTS_END,Memory access for packet data has been completed" bitfld.long 0x18 0. "EVENTS_END,Memory access for packet data has been completed" "0: Event not generated,1: Event generated" line.long 0x1C "EVENTS_PHYEND,The last bit is sent on air or last bit is received" bitfld.long 0x1C 0. "EVENTS_PHYEND,The last bit is sent on air or last bit is received" "0: Event not generated,1: Event generated" line.long 0x20 "EVENTS_DISABLED,RADIO has been disabled" bitfld.long 0x20 0. "EVENTS_DISABLED,RADIO has been disabled" "0: Event not generated,1: Event generated" line.long 0x24 "EVENTS_DEVMATCH,A device address match occurred on the last received packet" bitfld.long 0x24 0. "EVENTS_DEVMATCH,A device address match occurred on the last received packet" "0: Event not generated,1: Event generated" line.long 0x28 "EVENTS_DEVMISS,No device address match occurred on the last received packet" bitfld.long 0x28 0. "EVENTS_DEVMISS,No device address match occurred on the last received packet" "0: Event not generated,1: Event generated" line.long 0x2C "EVENTS_CRCOK,Packet received with CRC ok" bitfld.long 0x2C 0. "EVENTS_CRCOK,Packet received with CRC ok" "0: Event not generated,1: Event generated" line.long 0x30 "EVENTS_CRCERROR,Packet received with CRC error" bitfld.long 0x30 0. "EVENTS_CRCERROR,Packet received with CRC error" "0: Event not generated,1: Event generated" group.long 0x238++0x27 line.long 0x0 "EVENTS_BCMATCH,Bit counter reached bit count value" bitfld.long 0x0 0. "EVENTS_BCMATCH,Bit counter reached bit count value" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_EDEND,Sampling of energy detection complete (a new ED sample is ready for readout from the RADIO.EDSAMPLE register)" bitfld.long 0x4 0. "EVENTS_EDEND,Sampling of energy detection complete (a new ED sample is ready for readout from the RADIO.EDSAMPLE register)" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_EDSTOPPED,The sampling of energy detection has stopped" bitfld.long 0x8 0. "EVENTS_EDSTOPPED,The sampling of energy detection has stopped" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_CCAIDLE,Wireless medium in idle - clear to send" bitfld.long 0xC 0. "EVENTS_CCAIDLE,Wireless medium in idle - clear to send" "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_CCABUSY,Wireless medium busy - do not send" bitfld.long 0x10 0. "EVENTS_CCABUSY,Wireless medium busy - do not send" "0: Event not generated,1: Event generated" line.long 0x14 "EVENTS_CCASTOPPED,The CCA has stopped" bitfld.long 0x14 0. "EVENTS_CCASTOPPED,The CCA has stopped" "0: Event not generated,1: Event generated" line.long 0x18 "EVENTS_RATEBOOST,Ble_LR CI field received. receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit" bitfld.long 0x18 0. "EVENTS_RATEBOOST,Ble_LR CI field received receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit" "0: Event not generated,1: Event generated" line.long 0x1C "EVENTS_MHRMATCH,MAC header match found" bitfld.long 0x1C 0. "EVENTS_MHRMATCH,MAC header match found" "0: Event not generated,1: Event generated" line.long 0x20 "EVENTS_SYNC,Initial sync detected" bitfld.long 0x20 0. "EVENTS_SYNC,Initial sync detected" "0: Event not generated,1: Event generated" line.long 0x24 "EVENTS_CTEPRESENT,CTEInfo byte is received" bitfld.long 0x24 0. "EVENTS_CTEPRESENT,CTEInfo byte is received" "0: Event not generated,1: Event generated" group.long 0x300++0x33 line.long 0x0 "PUBLISH_READY,Publish configuration for event READY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x4 "PUBLISH_TXREADY,Publish configuration for event TXREADY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event TXREADY will publish to" line.long 0x8 "PUBLISH_RXREADY,Publish configuration for event RXREADY" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event RXREADY will publish to" line.long 0xC "PUBLISH_ADDRESS,Publish configuration for event ADDRESS" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event ADDRESS will publish to" line.long 0x10 "PUBLISH_FRAMESTART,Publish configuration for event FRAMESTART" bitfld.long 0x10 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that event FRAMESTART will publish to" line.long 0x14 "PUBLISH_PAYLOAD,Publish configuration for event PAYLOAD" bitfld.long 0x14 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x14 0.--7. 1. "CHIDX,DPPI channel that event PAYLOAD will publish to" line.long 0x18 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x18 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x18 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x1C "PUBLISH_PHYEND,Publish configuration for event PHYEND" bitfld.long 0x1C 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x1C 0.--7. 1. "CHIDX,DPPI channel that event PHYEND will publish to" line.long 0x20 "PUBLISH_DISABLED,Publish configuration for event DISABLED" bitfld.long 0x20 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x20 0.--7. 1. "CHIDX,DPPI channel that event DISABLED will publish to" line.long 0x24 "PUBLISH_DEVMATCH,Publish configuration for event DEVMATCH" bitfld.long 0x24 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x24 0.--7. 1. "CHIDX,DPPI channel that event DEVMATCH will publish to" line.long 0x28 "PUBLISH_DEVMISS,Publish configuration for event DEVMISS" bitfld.long 0x28 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x28 0.--7. 1. "CHIDX,DPPI channel that event DEVMISS will publish to" line.long 0x2C "PUBLISH_CRCOK,Publish configuration for event CRCOK" bitfld.long 0x2C 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x2C 0.--7. 1. "CHIDX,DPPI channel that event CRCOK will publish to" line.long 0x30 "PUBLISH_CRCERROR,Publish configuration for event CRCERROR" bitfld.long 0x30 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x30 0.--7. 1. "CHIDX,DPPI channel that event CRCERROR will publish to" group.long 0x338++0x27 line.long 0x0 "PUBLISH_BCMATCH,Publish configuration for event BCMATCH" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event BCMATCH will publish to" line.long 0x4 "PUBLISH_EDEND,Publish configuration for event EDEND" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event EDEND will publish to" line.long 0x8 "PUBLISH_EDSTOPPED,Publish configuration for event EDSTOPPED" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event EDSTOPPED will publish to" line.long 0xC "PUBLISH_CCAIDLE,Publish configuration for event CCAIDLE" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event CCAIDLE will publish to" line.long 0x10 "PUBLISH_CCABUSY,Publish configuration for event CCABUSY" bitfld.long 0x10 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that event CCABUSY will publish to" line.long 0x14 "PUBLISH_CCASTOPPED,Publish configuration for event CCASTOPPED" bitfld.long 0x14 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x14 0.--7. 1. "CHIDX,DPPI channel that event CCASTOPPED will publish to" line.long 0x18 "PUBLISH_RATEBOOST,Publish configuration for event RATEBOOST" bitfld.long 0x18 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x18 0.--7. 1. "CHIDX,DPPI channel that event RATEBOOST will publish to" line.long 0x1C "PUBLISH_MHRMATCH,Publish configuration for event MHRMATCH" bitfld.long 0x1C 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x1C 0.--7. 1. "CHIDX,DPPI channel that event MHRMATCH will publish to" line.long 0x20 "PUBLISH_SYNC,Publish configuration for event SYNC" bitfld.long 0x20 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x20 0.--7. 1. "CHIDX,DPPI channel that event SYNC will publish to" line.long 0x24 "PUBLISH_CTEPRESENT,Publish configuration for event CTEPRESENT" bitfld.long 0x24 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x24 0.--7. 1. "CHIDX,DPPI channel that event CTEPRESENT will publish to" group.long 0x400++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 20. "PHYEND_START,Shortcut between event PHYEND and task START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "PHYEND_DISABLE,Shortcut between event PHYEND and task DISABLE" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 18. "RXREADY_START,Shortcut between event RXREADY and task START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "TXREADY_START,Shortcut between event TXREADY and task START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 16. "CCAIDLE_STOP,Shortcut between event CCAIDLE and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 15. "EDEND_DISABLE,Shortcut between event EDEND and task DISABLE" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 14. "READY_EDSTART,Shortcut between event READY and task EDSTART" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 13. "FRAMESTART_BCSTART,Shortcut between event FRAMESTART and task BCSTART" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 12. "CCABUSY_DISABLE,Shortcut between event CCABUSY and task DISABLE" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 11. "CCAIDLE_TXEN,Shortcut between event CCAIDLE and task TXEN" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 10. "RXREADY_CCASTART,Shortcut between event RXREADY and task CCASTART" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "ADDRESS_BCSTART,Shortcut between event ADDRESS and task BCSTART" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 4. "ADDRESS_RSSISTART,Shortcut between event ADDRESS and task RSSISTART" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "DISABLED_RXEN,Shortcut between event DISABLED and task RXEN" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "DISABLED_TXEN,Shortcut between event DISABLED and task TXEN" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 0. "READY_START,Shortcut between event READY and task START" "0: Disable shortcut,1: Enable shortcut" group.long 0x488++0x3 line.long 0x0 "INTENSET00,Enable interrupt" bitfld.long 0x0 23. "CTEPRESENT,Write '1' to enable interrupt for event CTEPRESENT" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "SYNC,Write '1' to enable interrupt for event SYNC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "MHRMATCH,Write '1' to enable interrupt for event MHRMATCH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "RATEBOOST,Write '1' to enable interrupt for event RATEBOOST" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "CCASTOPPED,Write '1' to enable interrupt for event CCASTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 18. "CCABUSY,Write '1' to enable interrupt for event CCABUSY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 17. "CCAIDLE,Write '1' to enable interrupt for event CCAIDLE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 16. "EDSTOPPED,Write '1' to enable interrupt for event EDSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 15. "EDEND,Write '1' to enable interrupt for event EDEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 14. "BCMATCH,Write '1' to enable interrupt for event BCMATCH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 12. "CRCERROR,Write '1' to enable interrupt for event CRCERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 11. "CRCOK,Write '1' to enable interrupt for event CRCOK" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 10. "DEVMISS,Write '1' to enable interrupt for event DEVMISS" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 9. "DEVMATCH,Write '1' to enable interrupt for event DEVMATCH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 8. "DISABLED,Write '1' to enable interrupt for event DISABLED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 7. "PHYEND,Write '1' to enable interrupt for event PHYEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 5. "PAYLOAD,Write '1' to enable interrupt for event PAYLOAD" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 4. "FRAMESTART,Write '1' to enable interrupt for event FRAMESTART" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 3. "ADDRESS,Write '1' to enable interrupt for event ADDRESS" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "RXREADY,Write '1' to enable interrupt for event RXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "TXREADY,Write '1' to enable interrupt for event TXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Enable" group.long 0x490++0x3 line.long 0x0 "INTENCLR00,Disable interrupt" bitfld.long 0x0 23. "CTEPRESENT,Write '1' to disable interrupt for event CTEPRESENT" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 22. "SYNC,Write '1' to disable interrupt for event SYNC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 21. "MHRMATCH,Write '1' to disable interrupt for event MHRMATCH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 20. "RATEBOOST,Write '1' to disable interrupt for event RATEBOOST" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 19. "CCASTOPPED,Write '1' to disable interrupt for event CCASTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 18. "CCABUSY,Write '1' to disable interrupt for event CCABUSY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 17. "CCAIDLE,Write '1' to disable interrupt for event CCAIDLE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 16. "EDSTOPPED,Write '1' to disable interrupt for event EDSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 15. "EDEND,Write '1' to disable interrupt for event EDEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 14. "BCMATCH,Write '1' to disable interrupt for event BCMATCH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 12. "CRCERROR,Write '1' to disable interrupt for event CRCERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 11. "CRCOK,Write '1' to disable interrupt for event CRCOK" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 10. "DEVMISS,Write '1' to disable interrupt for event DEVMISS" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 9. "DEVMATCH,Write '1' to disable interrupt for event DEVMATCH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 8. "DISABLED,Write '1' to disable interrupt for event DISABLED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 7. "PHYEND,Write '1' to disable interrupt for event PHYEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 5. "PAYLOAD,Write '1' to disable interrupt for event PAYLOAD" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 4. "FRAMESTART,Write '1' to disable interrupt for event FRAMESTART" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 3. "ADDRESS,Write '1' to disable interrupt for event ADDRESS" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 2. "RXREADY,Write '1' to disable interrupt for event RXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 1. "TXREADY,Write '1' to disable interrupt for event TXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Disable" group.long 0x4A8++0x3 line.long 0x0 "INTENSET10,Enable interrupt" bitfld.long 0x0 23. "CTEPRESENT,Write '1' to enable interrupt for event CTEPRESENT" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "SYNC,Write '1' to enable interrupt for event SYNC" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "MHRMATCH,Write '1' to enable interrupt for event MHRMATCH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "RATEBOOST,Write '1' to enable interrupt for event RATEBOOST" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "CCASTOPPED,Write '1' to enable interrupt for event CCASTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 18. "CCABUSY,Write '1' to enable interrupt for event CCABUSY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 17. "CCAIDLE,Write '1' to enable interrupt for event CCAIDLE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 16. "EDSTOPPED,Write '1' to enable interrupt for event EDSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 15. "EDEND,Write '1' to enable interrupt for event EDEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 14. "BCMATCH,Write '1' to enable interrupt for event BCMATCH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 12. "CRCERROR,Write '1' to enable interrupt for event CRCERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 11. "CRCOK,Write '1' to enable interrupt for event CRCOK" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 10. "DEVMISS,Write '1' to enable interrupt for event DEVMISS" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 9. "DEVMATCH,Write '1' to enable interrupt for event DEVMATCH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 8. "DISABLED,Write '1' to enable interrupt for event DISABLED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 7. "PHYEND,Write '1' to enable interrupt for event PHYEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 5. "PAYLOAD,Write '1' to enable interrupt for event PAYLOAD" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 4. "FRAMESTART,Write '1' to enable interrupt for event FRAMESTART" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 3. "ADDRESS,Write '1' to enable interrupt for event ADDRESS" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "RXREADY,Write '1' to enable interrupt for event RXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "TXREADY,Write '1' to enable interrupt for event TXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Enable" group.long 0x4B0++0x3 line.long 0x0 "INTENCLR10,Disable interrupt" bitfld.long 0x0 23. "CTEPRESENT,Write '1' to disable interrupt for event CTEPRESENT" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 22. "SYNC,Write '1' to disable interrupt for event SYNC" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 21. "MHRMATCH,Write '1' to disable interrupt for event MHRMATCH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 20. "RATEBOOST,Write '1' to disable interrupt for event RATEBOOST" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 19. "CCASTOPPED,Write '1' to disable interrupt for event CCASTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 18. "CCABUSY,Write '1' to disable interrupt for event CCABUSY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 17. "CCAIDLE,Write '1' to disable interrupt for event CCAIDLE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 16. "EDSTOPPED,Write '1' to disable interrupt for event EDSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 15. "EDEND,Write '1' to disable interrupt for event EDEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 14. "BCMATCH,Write '1' to disable interrupt for event BCMATCH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 12. "CRCERROR,Write '1' to disable interrupt for event CRCERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 11. "CRCOK,Write '1' to disable interrupt for event CRCOK" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 10. "DEVMISS,Write '1' to disable interrupt for event DEVMISS" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 9. "DEVMATCH,Write '1' to disable interrupt for event DEVMATCH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 8. "DISABLED,Write '1' to disable interrupt for event DISABLED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 7. "PHYEND,Write '1' to disable interrupt for event PHYEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 6. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 5. "PAYLOAD,Write '1' to disable interrupt for event PAYLOAD" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 4. "FRAMESTART,Write '1' to disable interrupt for event FRAMESTART" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 3. "ADDRESS,Write '1' to disable interrupt for event ADDRESS" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 2. "RXREADY,Write '1' to disable interrupt for event RXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 1. "TXREADY,Write '1' to disable interrupt for event TXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x0 0. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "MODE,Data rate and modulation" hexmask.long.byte 0x0 0.--3. 1. "MODE,Radio data rate and modulation setting. The radio supports frequency-shift keying (FSK) modulation." rgroup.long 0x520++0x3 line.long 0x0 "STATE,Current radio state" hexmask.long.byte 0x0 0.--3. 1. "STATE,Current radio state" group.long 0x530++0x3 line.long 0x0 "EDCTRL,IEEE 802.15.4 energy detect control" hexmask.long.byte 0x0 24.--29. 1. "EDPERIOD,IEEE 802.15.4 energy detect period 4us resolution no averaging except the IEEE 802.15.4 ED range 128us (32)" newline hexmask.long.tbyte 0x0 0.--20. 1. "EDCNT,IEEE 802.15.4 energy detect loop count" rgroup.long 0x534++0x3 line.long 0x0 "EDSAMPLE,IEEE 802.15.4 energy detect level" hexmask.long.byte 0x0 0.--7. 1. "EDLVL,IEEE 802.15.4 energy detect level" group.long 0x538++0x3 line.long 0x0 "CCACTRL,IEEE 802.15.4 clear channel assessment control" hexmask.long.byte 0x0 24.--31. 1. "CCACORRCNT,Limit for occurances above CCACORRTHRES. When not equal to zero the corrolator based signal detect is enabled." newline hexmask.long.byte 0x0 16.--23. 1. "CCACORRTHRES,CCA correlator busy threshold. Only relevant to CarrierMode CarrierAndEdMode and CarrierOrEdMode." newline hexmask.long.byte 0x0 8.--15. 1. "CCAEDTHRES,CCA energy busy threshold. Used in all the CCA modes except CarrierMode." newline bitfld.long 0x0 0.--2. "CCAMODE,CCA mode of operation" "0: Energy above threshold,1: Carrier seen,2: Energy above threshold AND carrier seen,3: Energy above threshold OR carrier seen,4: Energy above threshold test mode that will abort..,?,?,?" group.long 0x540++0x3 line.long 0x0 "DATAWHITE,Data whitening configuration" hexmask.long.word 0x0 16.--25. 1. "POLY,Whitening polynomial" newline hexmask.long.word 0x0 0.--8. 1. "IV,Whitening initial value" group.long 0x704++0x7 line.long 0x0 "TIMING,Timing" bitfld.long 0x0 0. "RU,Ramp-up time" "0: Legacy ramp-up time,1: Fast ramp-up (default)" line.long 0x4 "FREQUENCY,Frequency" bitfld.long 0x4 8. "MAP,Channel map selection. 0: Channel map between 2400 MHZ to 2500 MHz Frequency = 2400 + FREQUENCY (MHz). 1: Channel map between 2360 MHZ to 2460 MHz Frequency = 2360 + FREQUENCY (MHz)." "0: Channel map between 2400 MHZ to 2500 MHz,1: Channel map between 2360 MHZ to 2460 MHz" newline hexmask.long.byte 0x4 0.--6. 1. "FREQUENCY,Radio channel frequency. Frequency = 2400 + FREQUENCY (MHz)." group.long 0x710++0x7 line.long 0x0 "TXPOWER,Output power" hexmask.long.word 0x0 0.--10. 1. "TXPOWER,RADIO output power" line.long 0x4 "TIFS,Interframe spacing in us" hexmask.long.word 0x4 0.--9. 1. "TIFS,Interframe spacing in us. Interframe space is the time interval between two consecutive packets. It is defined as the time in microseconds from the end of the last bit of the previous packet to the start of the first bit of the subsequent packet." rgroup.long 0x718++0x3 line.long 0x0 "RSSISAMPLE,RSSI sample" hexmask.long.byte 0x0 0.--6. 1. "RSSISAMPLE,RSSI sample result. The value of this register is read as a positive value while the actual received signal strength is a negative value. Actual received signal strength is therefore as follows: received signal strength = -A dBm." group.long 0x908++0x3 line.long 0x0 "FECONFIG,Config register" bitfld.long 0x0 20. "SCALERMODE,Mode for narrow scaling output." "0: Classic log based scaling mode.,1: LUT based scaling mode." group.long 0xD00++0x3 line.long 0x0 "DFEMODE,Whether to use Angle-of-Arrival (AOA) or Angle-of-Departure (AOD)" bitfld.long 0x0 0.--1. "DFEOPMODE,Direction finding operation mode" "0: Direction finding mode disabled,?,2: Direction finding mode set to AoD,3: Direction finding mode set to AoA" rgroup.long 0xD04++0x3 line.long 0x0 "DFESTATUS,DFE status information" bitfld.long 0x0 4. "SAMPLINGSTATE,Internal state of sampling state machine" "0: Sampling state Idle,1: Sampling state Sampling" newline bitfld.long 0x0 0.--2. "SWITCHINGSTATE,Internal state of switching state machine" "0: Switching state Idle,1: Switching state Offset,2: Switching state Guard,3: Switching state Ref,4: Switching state Switching,5: Switching state Ending,?,?" group.long 0xD10++0x7 line.long 0x0 "DFECTRL1,Various configuration for Direction finding" hexmask.long.byte 0x0 24.--27. 1. "AGCBACKOFFGAIN,Gain will be lowered by the specified number of gain steps at the start of CTE" newline hexmask.long.byte 0x0 20.--23. 1. "REPEATPATTERN,Repeat every antenna pattern N times." newline bitfld.long 0x0 16.--18. "TSAMPLESPACING,Interval between samples in the SWITCHING period when CTEINLINECTRLEN is 0" "?,1: 4us,2: 2us,3: 1us,4: 0.5us,5: 0.25us,6: 0.125us,?" newline bitfld.long 0x0 15. "SAMPLETYPE,Whether to sample I/Q or magnitude/phase" "0: Complex samples in I and Q,1: Complex samples as magnitude and phase" newline bitfld.long 0x0 12.--14. "TSAMPLESPACINGREF,Interval between samples in the REFERENCE period" "?,1: 4us,2: 2us,3: 1us,4: 0.5us,5: 0.25us,6: 0.125us,?" newline bitfld.long 0x0 8.--10. "TSWITCHSPACING,Interval between every time the antenna is changed in the SWITCHING state" "?,1: 4us,2: 2us,3: 1us,?,?,?,?" newline bitfld.long 0x0 7. "DFEINEXTENSION,Add CTE extension and do antenna switching/sampling in this extension" "0: Antenna switching/sampling is done in the packet..,1: AoA/AoD procedure triggered at end of CRC" newline hexmask.long.byte 0x0 0.--5. 1. "NUMBEROF8US,Length of the AoA/AoD procedure in number of 8 us units" line.long 0x4 "DFECTRL2,Start offset for Direction finding" hexmask.long.word 0x4 16.--27. 1. "TSAMPLEOFFSET,Signed value offset before starting sampling in number of 16M cycles relative to the beginning of the REFERENCE state - 12 us after switching start" newline hexmask.long.word 0x4 0.--12. 1. "TSWITCHOFFSET,Signed value offset after the end of the CRC before starting switching in number of 16M cycles" group.long 0xD28++0x3 line.long 0x0 "SWITCHPATTERN,GPIO patterns to be used for each antenna" hexmask.long.byte 0x0 0.--7. 1. "SWITCHPATTERN,Fill array of GPIO patterns for antenna control" wgroup.long 0xD2C++0x3 line.long 0x0 "CLEARPATTERN,Clear the GPIO pattern array for antenna control" bitfld.long 0x0 0. "CLEARPATTERN,Clear the GPIO pattern array for antenna control Behaves as a task register but does not have PPI nor IRQ" "0,1" tree "DFEPACKET" base ad:0x5008A000 group.long 0x0++0x7 line.long 0x0 "PTR,Data pointer" hexmask.long 0x0 0.--31. 1. "PTR,Data pointer" line.long 0x4 "MAXCNT,Maximum number of bytes to transfer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes to transfer" rgroup.long 0x8++0x7 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction" hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction" line.long 0x4 "CURRENTAMOUNT,Number of bytes transferred in the current transaction" hexmask.long.word 0x4 0.--15. 1. "AMOUNT,Number of bytes transferred in the current transaction. Continuously updated." tree.end tree "PSEL" base ad:0x5008A000 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "DFEGPIO[$1],Description collection: Pin select for DFE pin n" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" hexmask.long.byte 0x0 5.--8. 1. "PORT,Port number" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" repeat.end tree.end base ad:0x5008A000 newline rgroup.long 0xE0C++0x13 newline line.long 0x0 "CRCSTATUS,CRC status" bitfld.long 0x0 0. "CRCSTATUS,CRC status of packet received" "0: Packet received with CRC error,1: Packet received with CRC ok" line.long 0x4 "RXMATCH,Received address" bitfld.long 0x4 0.--2. "RXMATCH,Received address" "0,1,2,3,4,5,6,7" line.long 0x8 "RXCRC,CRC field of previously received packet" hexmask.long.tbyte 0x8 0.--23. 1. "RXCRC,CRC field of previously received packet" line.long 0xC "DAI,Device address match index" bitfld.long 0xC 0.--2. "DAI,Device address match index" "0,1,2,3,4,5,6,7" line.long 0x10 "PDUSTAT,Payload status" bitfld.long 0x10 1.--2. "CISTAT,Status on what rate packet is received with in Long Range" "0: Frame is received at 125 kbps,1: Frame is received at 500 kbps,?,?" newline bitfld.long 0x10 0. "PDUSTAT,Status on payload length vs. PCNF1.MAXLEN" "0: Payload less than PCNF1.MAXLEN,1: Payload greater than PCNF1.MAXLEN" group.long 0xE20++0x3 line.long 0x0 "PCNF0,Packet configuration register 0" bitfld.long 0x0 29.--30. "TERMLEN,Length of TERM field in Long Range operation" "0,1,2,3" newline bitfld.long 0x0 26. "CRCINC,Indicates if LENGTH field contains CRC or not" "0: LENGTH does not contain CRC,1: LENGTH includes CRC" newline bitfld.long 0x0 24.--25. "PLEN,Length of preamble on air. Decision point: TASKS_START task" "0: 8-bit preamble,1: 16-bit preamble,2: 32-bit zero preamble - used for IEEE 802.15.4,3: Preamble - used for BLE long range" newline bitfld.long 0x0 22.--23. "CILEN,Length of code indicator - long range" "0,1,2,3" newline bitfld.long 0x0 20.--21. "S1INCL,Include or exclude S1 field in RAM" "0: Include S1 field in RAM only if S1LEN > 0,1: Always include S1 field in RAM independent of..,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "S1LEN,Length on air of S1 field in number of bits." newline bitfld.long 0x0 8. "S0LEN,Length on air of S0 field in number of bytes." "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "LFLEN,Length on air of LENGTH field in number of bits." group.long 0xE28++0x27 line.long 0x0 "PCNF1,Packet configuration register 1" bitfld.long 0x0 26. "WHITEOFFSET,If whitening is enabled S0 can be configured to be excluded from whitening" "0: S0 included in whitening,1: S0 excluded from whitening" newline bitfld.long 0x0 25. "WHITEEN,Enable or disable packet whitening" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "ENDIAN,On-air endianness of packet this applies to the S0 LENGTH S1 and the PAYLOAD fields." "0: Least significant bit on air first,1: Most significant bit on air first" newline bitfld.long 0x0 16.--18. "BALEN,Base address length in number of bytes" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 8.--15. 1. "STATLEN,Static length in number of bytes" newline hexmask.long.byte 0x0 0.--7. 1. "MAXLEN,Maximum length of packet payload. If the packet payload is larger than MAXLEN the radio will truncate the payload to MAXLEN." line.long 0x4 "BASE0,Base address 0" hexmask.long 0x4 0.--31. 1. "BASE0,Base address 0" line.long 0x8 "BASE1,Base address 1" hexmask.long 0x8 0.--31. 1. "BASE1,Base address 1" line.long 0xC "PREFIX0,Prefixes bytes for logical addresses 0-3" hexmask.long.byte 0xC 24.--31. 1. "AP3,Address prefix 3" newline hexmask.long.byte 0xC 16.--23. 1. "AP2,Address prefix 2" newline hexmask.long.byte 0xC 8.--15. 1. "AP1,Address prefix 1" newline hexmask.long.byte 0xC 0.--7. 1. "AP0,Address prefix 0" line.long 0x10 "PREFIX1,Prefixes bytes for logical addresses 4-7" hexmask.long.byte 0x10 24.--31. 1. "AP7,Address prefix 7" newline hexmask.long.byte 0x10 16.--23. 1. "AP6,Address prefix 6" newline hexmask.long.byte 0x10 8.--15. 1. "AP5,Address prefix 5" newline hexmask.long.byte 0x10 0.--7. 1. "AP4,Address prefix 4" line.long 0x14 "TXADDRESS,Transmit address select" bitfld.long 0x14 0.--2. "TXADDRESS,Transmit address select" "0,1,2,3,4,5,6,7" line.long 0x18 "RXADDRESSES,Receive address select" bitfld.long 0x18 7. "ADDR7,Enable or disable reception on logical address 7" "0: Disable,1: Enable" newline bitfld.long 0x18 6. "ADDR6,Enable or disable reception on logical address 6" "0: Disable,1: Enable" newline bitfld.long 0x18 5. "ADDR5,Enable or disable reception on logical address 5" "0: Disable,1: Enable" newline bitfld.long 0x18 4. "ADDR4,Enable or disable reception on logical address 4" "0: Disable,1: Enable" newline bitfld.long 0x18 3. "ADDR3,Enable or disable reception on logical address 3" "0: Disable,1: Enable" newline bitfld.long 0x18 2. "ADDR2,Enable or disable reception on logical address 2" "0: Disable,1: Enable" newline bitfld.long 0x18 1. "ADDR1,Enable or disable reception on logical address 1" "0: Disable,1: Enable" newline bitfld.long 0x18 0. "ADDR0,Enable or disable reception on logical address 0" "0: Disable,1: Enable" line.long 0x1C "CRCCNF,CRC configuration" bitfld.long 0x1C 8.--10. "SKIPADDR,Control whether CRC calculation skips the address field. Other fields can also be skipped." "0: CRC calculation includes address field,1: CRC calculation starting at first byte after..,2: CRC calculation starting at first byte after..,3: CRC calculation starting at first byte after S0..,4: CRC calculation starting at first byte after S1..,?,?,?" newline bitfld.long 0x1C 0.--1. "LEN,CRC length in number of bytes." "0: CRC length is zero and CRC calculation is disabled,1: CRC length is one byte and CRC calculation is..,2: CRC length is two bytes and CRC calculation is..,3: CRC length is three bytes and CRC calculation is.." line.long 0x20 "CRCPOLY,CRC polynomial" hexmask.long.tbyte 0x20 0.--23. 1. "CRCPOLY,CRC polynomial" line.long 0x24 "CRCINIT,CRC initial value" hexmask.long.tbyte 0x24 0.--23. 1. "CRCINIT,CRC initial value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xE50)++0x3 line.long 0x0 "DAB[$1],Description collection: Device address base segment n" hexmask.long 0x0 0.--31. 1. "DAB,Device address base segment n" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xE70)++0x3 line.long 0x0 "DAP[$1],Description collection: Device address prefix n" hexmask.long.word 0x0 0.--15. 1. "DAP,Device address prefix n" repeat.end group.long 0xE90++0x7 line.long 0x0 "DACNF,Device address match configuration" bitfld.long 0x0 15. "TXADD7,TxAdd for device address 7" "0,1" newline bitfld.long 0x0 14. "TXADD6,TxAdd for device address 6" "0,1" newline bitfld.long 0x0 13. "TXADD5,TxAdd for device address 5" "0,1" newline bitfld.long 0x0 12. "TXADD4,TxAdd for device address 4" "0,1" newline bitfld.long 0x0 11. "TXADD3,TxAdd for device address 3" "0,1" newline bitfld.long 0x0 10. "TXADD2,TxAdd for device address 2" "0,1" newline bitfld.long 0x0 9. "TXADD1,TxAdd for device address 1" "0,1" newline bitfld.long 0x0 8. "TXADD0,TxAdd for device address 0" "0,1" newline bitfld.long 0x0 7. "ENA7,Enable or disable device address matching using device address 7" "0: Disabled,1: Enabled" newline bitfld.long 0x0 6. "ENA6,Enable or disable device address matching using device address 6" "0: Disabled,1: Enabled" newline bitfld.long 0x0 5. "ENA5,Enable or disable device address matching using device address 5" "0: Disabled,1: Enabled" newline bitfld.long 0x0 4. "ENA4,Enable or disable device address matching using device address 4" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "ENA3,Enable or disable device address matching using device address 3" "0: Disabled,1: Enabled" newline bitfld.long 0x0 2. "ENA2,Enable or disable device address matching using device address 2" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "ENA1,Enable or disable device address matching using device address 1" "0: Disabled,1: Enabled" newline bitfld.long 0x0 0. "ENA0,Enable or disable device address matching using device address 0" "0: Disabled,1: Enabled" line.long 0x4 "BCC,Bit counter compare" hexmask.long 0x4 0.--31. 1. "BCC,Bit counter compare" rgroup.long 0xEA4++0x3 line.long 0x0 "CTESTATUS,CTEInfo parsed from received packet" bitfld.long 0x0 6.--7. "CTETYPE,CTEType parsed from packet" "0,1,2,3" newline bitfld.long 0x0 5. "RFU,RFU parsed from packet" "0,1" newline hexmask.long.byte 0x0 0.--4. 1. "CTETIME,CTETime parsed from packet" group.long 0xEB4++0xF line.long 0x0 "MHRMATCHCONF,Search pattern configuration" hexmask.long 0x0 0.--31. 1. "MHRMATCHCONF,Search pattern configuration" line.long 0x4 "MHRMATCHMASK,Pattern mask" hexmask.long 0x4 0.--31. 1. "MHRMATCHMASK,Pattern mask" line.long 0x8 "SFD,IEEE 802.15.4 start of frame delimiter" hexmask.long.byte 0x8 0.--7. 1. "SFD,IEEE 802.15.4 start of frame delimiter. Note: the least significant 4 bits of the SFD cannot all be zeros." line.long 0xC "CTEINLINECONF,Configuration for CTE inline mode" hexmask.long.byte 0xC 24.--31. 1. "S0MASK,S0 bit mask to set which bit to match" newline hexmask.long.byte 0xC 16.--23. 1. "S0CONF,S0 bit pattern to match" newline bitfld.long 0xC 13.--15. "CTEINLINERXMODE2US,Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set" "?,1: 4us,2: 2us,3: 1us,4: 0.5us,5: 0.25us,6: 0.125us,?" newline bitfld.long 0xC 10.--12. "CTEINLINERXMODE1US,Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set" "?,1: 4us,2: 2us,3: 1us,4: 0.5us,5: 0.25us,6: 0.125us,?" newline bitfld.long 0xC 6.--7. "CTETIMEVALIDRANGE,Max range of CTETime" "0: 20 in 8us unit (default) Set to 20 if parsed..,1: 31 in 8us unit,2: 63 in 8us unit,?" newline bitfld.long 0xC 4. "CTEERRORHANDLING,Sampling/switching if CRC is not OK" "0: No sampling and antenna switching when CRC is..,1: Sampling and antenna switching also when CRC is.." newline bitfld.long 0xC 3. "CTEINFOINS1,CTEInfo is S1 byte or not" "0: CTEInfo is NOT in S1 byte (advertising PDU),1: CTEInfo is in S1 byte (data PDU)" newline bitfld.long 0xC 0. "CTEINLINECTRLEN,Enable parsing of CTEInfo from received packet in BLE modes" "0: Parsing of CTEInfo is disabled,1: Parsing of CTEInfo is enabled" group.long 0xED0++0x3 line.long 0x0 "PACKETPTR,Packet pointer" hexmask.long 0x0 0.--31. 1. "PTR,Data pointer" tree "CSTONES" base ad:0x5008A000 group.long 0x0++0x1F line.long 0x0 "MODE,Selects the mode(s) that are activated on the start signal" bitfld.long 0x0 1. "TFM,Enable or disable TFM" "0: TFM is disabled,1: TFM is enabled" bitfld.long 0x0 0. "TPM,Enable or disable TPM" "0: TPM is disabled,1: TPM is enabled" line.long 0x4 "NUMSAMPLES,Number of input samples at 2MHz sample rate" hexmask.long.byte 0x4 0.--7. 1. "NUMSAMPLES,Maximum value supported is 160" line.long 0x8 "NEXTFREQUENCY,The value of FREQUENCY that will be used in the next step" hexmask.long.byte 0x8 0.--6. 1. "NEXTFREQUENCY,Frequency = 2400 + FREQUENCY (MHz)" line.long 0xC "FFOIN,Override value of FFO (Fractional Frequency Offset) if not to be based on the frequency estimate derived from CnAcc (autocorrelation of the scaled input signal) value" hexmask.long.word 0xC 0.--11. 1. "FFFIN,Units 62.5 ppb. Max range +/-100 ppm plus margin." line.long 0x10 "FFOSOURCE,Source of FFO" bitfld.long 0x10 0. "FFOSOURCE,Use external or internal FFOSOURCE" "0: Use FFOIN,1: Calc FFO from CnAcc" line.long 0x14 "FAEPEER,FAEPEER (Frequency Actuation Error) of peer if known. Used during Mode 0 steps." hexmask.long.byte 0x14 0.--7. 1. "FAEPEER,Units 31.25 ppb." line.long 0x18 "PHASESHIFT,Parameter used in TPM. provided by software" hexmask.long.word 0x18 0.--15. 1. "PHASESHIFT,Phase shift used in TPM calculation" line.long 0x1C "NUMSAMPLESCOEFF,Parameter used in TPM. provided by software" hexmask.long.word 0x1C 0.--15. 1. "NUMSAMPLESCOEFF,Coefficient 2**16/(numSamples/16) in Q1.15 format (Default numsamples value is 160)" rgroup.long 0x20++0x17 line.long 0x0 "PCT16,Mean magnitude and mean phase converted to IQ" hexmask.long.word 0x0 16.--31. 1. "PCT16Q,Quadrature" hexmask.long.word 0x0 0.--15. 1. "PCT16I,Inphase" line.long 0x4 "MAGPHASEMEAN,Mean magnitude and phase of the signal before it is converted to PCT16" hexmask.long.word 0x4 16.--31. 1. "MAG,Mean magnitude" hexmask.long.word 0x4 0.--15. 1. "PHASE,Mean phase" line.long 0x8 "IQRAWMEAN,Mean of IQ values" hexmask.long.word 0x8 16.--31. 1. "IQRAWMEANQ,Quadrature" hexmask.long.word 0x8 0.--15. 1. "IQRAWMEANI,Inphase" line.long 0xC "MAGSTD,Magnitude standard deviation approximation" hexmask.long.word 0xC 0.--15. 1. "MAGSTD,Magnitude standard deviation approximation" line.long 0x10 "CNACC,Output of the autocorrelation of the accumulated IQ signal" hexmask.long.word 0x10 16.--31. 1. "CNACCQ" hexmask.long.word 0x10 0.--15. 1. "CNACCI" line.long 0x14 "FFOEST,FFO estimate" hexmask.long.word 0x14 0.--11. 1. "FFOEST,Units 62.5 ppb. Max range +/-100 ppm plus margin." group.long 0x38++0x3 line.long 0x0 "DOWNSAMPLE,Turn on/off down sample of input IQ-signals" bitfld.long 0x0 1. "RATE,Indicating if BLE1M or BLE2M is used" "0: Radio mode BLE1M is used,1: Radio mode BLE2M is used" bitfld.long 0x0 0. "ENABLEFILTER,Turn on/off down sample of input IQ-signals" "0: Disable filter,1: Enable filter" rgroup.long 0x3C++0x13 line.long 0x0 "FINETUNENEXT,Number of full ADPLL finetune steps" hexmask.long.word 0x0 0.--12. 1. "FINETUNENEXT,Units of 488.28125 Hz" line.long 0x4 "CFOPHASE,Cordic output of CnAcc" hexmask.long.word 0x4 0.--15. 1. "CFOPHASE" line.long 0x8 "FREQOFFSET,Frequency offset estimate" hexmask.long.word 0x8 0.--13. 1. "FREQOFFSET" line.long 0xC "PCT11,Mean magnitude and mean phase converted to IQ. IQ values limited to [-1024.1023]." hexmask.long.word 0xC 11.--21. 1. "PCT11Q,Quadrature" hexmask.long.word 0xC 0.--10. 1. "PCT11I,Inphase" line.long 0x10 "LFAENEXT,Quantization error between ADPLL frequency and the desired value of FFO * RF Frequency. Values limited to [-64.63] with units 7.6294 Hz." hexmask.long.byte 0x10 0.--6. 1. "LFAENEXT,Inphase" tree.end tree "RTT" base ad:0x5008A000 group.long 0x0++0x13 line.long 0x0 "CONFIG,RTT Config." hexmask.long.word 0x0 8.--16. 1. "EFSDELAY,Early Frame Sync Delay i.e. number of cycles to wait for access address to anchor correctly. For 2MBPSBLE mode the EFSDELAY value is 64 (2us) and for 1MBPSBLE mode it can be 256 (8us)." hexmask.long.byte 0x0 3.--6. 1. "NUMSEGMENTS,Number of 16bit payload segments available for ToA detection. Allowed values are 0 2 4 6 and 8." bitfld.long 0x0 2. "ROLE,Role as a Initiator or Reflector." "0: Initiator,1: Reflector" newline bitfld.long 0x0 1. "ENFULLAA,Enabling/Disable ping over the entire access address." "0: Disable ping over the entire access address i.e.,1: Enable ping over the entire access address" bitfld.long 0x0 0. "EN,Enable RTT Functionality. Only valid for BLE 1MBPS and 2MBPS mode" "0: Disable RTT Block,1: Enable RTT Block" line.long 0x4 "SEGMENT01,RTT segments 0 and 1" hexmask.long 0x4 0.--31. 1. "DATA,Data Bits 31 - 0" line.long 0x8 "SEGMENT23,RTT segments 2 and 3" hexmask.long 0x8 0.--31. 1. "DATA,Data Bits 63 - 32" line.long 0xC "SEGMENT45,RTT segments 4 and 5" hexmask.long 0xC 0.--31. 1. "DATA,Data Bits 95 - 64" line.long 0x10 "SEGMENT67,RTT segments 6 and 7" hexmask.long 0x10 0.--31. 1. "DATA,Data Bits 127 - 96" tree.end tree.end tree.end tree "REGULATORS (Voltage Regulator)" base ad:0x0 tree "GLOBAL_REGULATORS_NS" base ad:0x40120000 wgroup.long 0x500++0x3 line.long 0x0 "SYSTEMOFF,System OFF register" bitfld.long 0x0 0. "SYSTEMOFF,Enable System OFF mode" "?,1: Enable System OFF mode" group.long 0x530++0x3 line.long 0x0 "POFCON,Power-fail comparator configuration" bitfld.long 0x0 7. "EVENTDISABLE,Disable the POFWARN power-fail warning event" "0: POFWARN event is generated,1: POFWARN event is not generated" hexmask.long.byte 0x0 1.--4. 1. "THRESHOLD,Power-fail comparator threshold setting" bitfld.long 0x0 0. "POF,Enable or disable power-fail comparator" "0: Disable,1: Enable" rgroup.long 0x534++0x3 line.long 0x0 "POFSTAT,Power-fail comparator status register" bitfld.long 0x0 0. "COMPARATOR,Power-fail comparator status" "0: Voltage detected above VPOF threshold,1: Voltage detected below VPOF threshold" tree "VREGMAIN" base ad:0x40120600 group.long 0x0++0x3 line.long 0x0 "DCDCEN,Enable DC/DC converter for better power efficiency" bitfld.long 0x0 0. "VAL,Enable DC/DC buck converter" "0: Disable DC/DC converter and use LDO,1: Enable DC/DC converter" rgroup.long 0x4++0x3 line.long 0x0 "INDUCTORDET,VREGMAIN inductor detection" bitfld.long 0x0 0. "DETECTED" "0: VREGMAIN inductor not detected,1: VREGMAIN inductor detected" tree.end tree.end tree "GLOBAL_REGULATORS_S" base ad:0x50120000 wgroup.long 0x500++0x3 line.long 0x0 "SYSTEMOFF,System OFF register" bitfld.long 0x0 0. "SYSTEMOFF,Enable System OFF mode" "?,1: Enable System OFF mode" group.long 0x530++0x3 line.long 0x0 "POFCON,Power-fail comparator configuration" bitfld.long 0x0 7. "EVENTDISABLE,Disable the POFWARN power-fail warning event" "0: POFWARN event is generated,1: POFWARN event is not generated" hexmask.long.byte 0x0 1.--4. 1. "THRESHOLD,Power-fail comparator threshold setting" bitfld.long 0x0 0. "POF,Enable or disable power-fail comparator" "0: Disable,1: Enable" rgroup.long 0x534++0x3 line.long 0x0 "POFSTAT,Power-fail comparator status register" bitfld.long 0x0 0. "COMPARATOR,Power-fail comparator status" "0: Voltage detected above VPOF threshold,1: Voltage detected below VPOF threshold" tree "VREGMAIN" base ad:0x50120000 group.long 0x0++0x3 line.long 0x0 "DCDCEN,Enable DC/DC converter for better power efficiency" bitfld.long 0x0 0. "VAL,Enable DC/DC buck converter" "0: Disable DC/DC converter and use LDO,1: Enable DC/DC converter" rgroup.long 0x4++0x3 line.long 0x0 "INDUCTORDET,VREGMAIN inductor detection" bitfld.long 0x0 0. "DETECTED" "0: VREGMAIN inductor not detected,1: VREGMAIN inductor detected" tree.end tree.end tree.end tree "RESET (Reset Control)" base ad:0x0 tree "GLOBAL_RESET_NS" base ad:0x4010E000 group.long 0x600++0x3 line.long 0x0 "RESETREAS,Reset reason" bitfld.long 0x0 13. "SECTAMPER,Reset due to illegal tampering of the device" "0: Not detected,1: Detected" bitfld.long 0x0 12. "NFC,Reset after wakeup from System OFF mode due to NFC field being detected" "0: Not detected,1: Detected" bitfld.long 0x0 11. "GRTC,Reset due to wakeup from GRTC" "0: Not detected,1: Detected" bitfld.long 0x0 10. "DIF,Reset triggered by Debug Interface" "0: Not detected,1: Detected" bitfld.long 0x0 9. "LPCOMP,Reset due to wakeup from System OFF mode when wakeup is triggered by ANADETECT signal from LPCOMP" "0: Not detected,1: Detected" newline bitfld.long 0x0 8. "OFF,Reset due to wakeup from System OFF mode when wakeup is triggered by DETECT signal from GPIO" "0: Not detected,1: Detected" bitfld.long 0x0 7. "LOCKUP,Reset from CPU lockup detected" "0: Not detected,1: Detected" bitfld.long 0x0 6. "SREQ,Reset from soft reset detected" "0: Not detected,1: Detected" bitfld.long 0x0 5. "CTRLAPPIN,Reset due to CTRL-AP pin reset" "0: Not detected,1: Detected" bitfld.long 0x0 4. "CTRLAPHARD,Reset due to CTRL-AP hard reset" "0: Not detected,1: Detected" newline bitfld.long 0x0 3. "CTRLAPSOFT,Soft reset from CTRL-AP detected" "0: Not detected,1: Detected" bitfld.long 0x0 2. "DOG1,Reset from watchdog timer 1 detected" "0: Not detected,1: Detected" bitfld.long 0x0 1. "DOG0,Reset from watchdog timer 0 detected" "0: Not detected,1: Detected" bitfld.long 0x0 0. "RESETPIN,Reset from pin reset detected" "0: Not detected,1: Detected" tree.end tree "GLOBAL_RESET_S" base ad:0x5010E000 group.long 0x600++0x3 line.long 0x0 "RESETREAS,Reset reason" bitfld.long 0x0 13. "SECTAMPER,Reset due to illegal tampering of the device" "0: Not detected,1: Detected" bitfld.long 0x0 12. "NFC,Reset after wakeup from System OFF mode due to NFC field being detected" "0: Not detected,1: Detected" bitfld.long 0x0 11. "GRTC,Reset due to wakeup from GRTC" "0: Not detected,1: Detected" bitfld.long 0x0 10. "DIF,Reset triggered by Debug Interface" "0: Not detected,1: Detected" bitfld.long 0x0 9. "LPCOMP,Reset due to wakeup from System OFF mode when wakeup is triggered by ANADETECT signal from LPCOMP" "0: Not detected,1: Detected" newline bitfld.long 0x0 8. "OFF,Reset due to wakeup from System OFF mode when wakeup is triggered by DETECT signal from GPIO" "0: Not detected,1: Detected" bitfld.long 0x0 7. "LOCKUP,Reset from CPU lockup detected" "0: Not detected,1: Detected" bitfld.long 0x0 6. "SREQ,Reset from soft reset detected" "0: Not detected,1: Detected" bitfld.long 0x0 5. "CTRLAPPIN,Reset due to CTRL-AP pin reset" "0: Not detected,1: Detected" bitfld.long 0x0 4. "CTRLAPHARD,Reset due to CTRL-AP hard reset" "0: Not detected,1: Detected" newline bitfld.long 0x0 3. "CTRLAPSOFT,Soft reset from CTRL-AP detected" "0: Not detected,1: Detected" bitfld.long 0x0 2. "DOG1,Reset from watchdog timer 1 detected" "0: Not detected,1: Detected" bitfld.long 0x0 1. "DOG0,Reset from watchdog timer 0 detected" "0: Not detected,1: Detected" bitfld.long 0x0 0. "RESETPIN,Reset from pin reset detected" "0: Not detected,1: Detected" tree.end tree.end tree "RRAMC (RRAM Controller)" base ad:0x0 tree "GLOBAL_RRAMC_S" base ad:0x5004B000 wgroup.long 0x0++0x3 line.long 0x0 "TASKS_WAKEUP,Wakeup the RRAM from low power mode" bitfld.long 0x0 0. "TASKS_WAKEUP,Wakeup the RRAM from low power mode" "?,1: Trigger task" wgroup.long 0x8++0x3 line.long 0x0 "TASKS_COMMITWRITEBUF,Commits the data stored in internal write-buffer to RRAM" bitfld.long 0x0 0. "TASKS_COMMITWRITEBUF,Commits the data stored in internal write-buffer to RRAM" "?,1: Trigger task" group.long 0x80++0x3 line.long 0x0 "SUBSCRIBE_WAKEUP,Subscribe configuration for task WAKEUP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task WAKEUP will subscribe to" group.long 0x88++0x3 line.long 0x0 "SUBSCRIBE_COMMITWRITEBUF,Subscribe configuration for task COMMITWRITEBUF" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task COMMITWRITEBUF will subscribe to" group.long 0x100++0xF line.long 0x0 "EVENTS_WOKENUP,RRAMC is woken up from low power mode" bitfld.long 0x0 0. "EVENTS_WOKENUP,RRAMC is woken up from low power mode" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_READY,RRAMC is ready" bitfld.long 0x4 0. "EVENTS_READY,RRAMC is ready" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_READYNEXT,Ready to accept a new write operation" bitfld.long 0x8 0. "EVENTS_READYNEXT,Ready to accept a new write operation" "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_ACCESSERROR,RRAM access error" bitfld.long 0xC 0. "EVENTS_ACCESSERROR,RRAM access error" "0: Event not generated,1: Event generated" group.long 0x180++0x3 line.long 0x0 "PUBLISH_WOKENUP,Publish configuration for event WOKENUP" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event WOKENUP will publish to" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 3. "ACCESSERROR,Enable or disable interrupt for event ACCESSERROR" "0: Disable,1: Enable" bitfld.long 0x0 2. "READYNEXT,Enable or disable interrupt for event READYNEXT" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "READY,Enable or disable interrupt for event READY" "0: Disable,1: Enable" bitfld.long 0x0 0. "WOKENUP,Enable or disable interrupt for event WOKENUP" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 3. "ACCESSERROR,Write '1' to enable interrupt for event ACCESSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "READYNEXT,Write '1' to enable interrupt for event READYNEXT" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "READY,Write '1' to enable interrupt for event READY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "WOKENUP,Write '1' to enable interrupt for event WOKENUP" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 3. "ACCESSERROR,Write '1' to disable interrupt for event ACCESSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "READYNEXT,Write '1' to disable interrupt for event READYNEXT" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "READY,Write '1' to disable interrupt for event READY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "WOKENUP,Write '1' to disable interrupt for event WOKENUP" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 3. "ACCESSERROR,Read pending status of interrupt for event ACCESSERROR" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 2. "READYNEXT,Read pending status of interrupt for event READYNEXT" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 1. "READY,Read pending status of interrupt for event READY" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 0. "WOKENUP,Read pending status of interrupt for event WOKENUP" "0: Read: Not pending,1: Read: Pending" rgroup.long 0x400++0xB line.long 0x0 "READY,RRAMC ready status" bitfld.long 0x0 0. "READY,RRAMC is ready or busy" "0: RRAMC is busy,1: The current RRAMC operation is completed and.." line.long 0x4 "READYNEXT,Ready next flag" bitfld.long 0x4 0. "READYNEXT,RRAMC can accept a new write operation" "0: RRAMC cannot accept any write operation now,1: RRAMC is ready to accept a new write operation" line.long 0x8 "ACCESSERRORADDR,Address of the first access error" hexmask.long 0x8 0.--31. 1. "ADDRESS,Access error address" tree "BUFSTATUS" base ad:0x5004B410 rgroup.long 0x8++0x3 line.long 0x0 "WRITEBUFEMPTY,Internal write-buffer is empty" bitfld.long 0x0 0. "EMPTY" "0: The internal write-buffer has data that needs..,1: The internal write-buffer is empty and has no.." tree.end tree "ECC" base ad:0x5004B420 rgroup.long 0x0++0x3 line.long 0x0 "ERRORADDR,Address of the first ECC error that could not be corrected" hexmask.long 0x0 0.--31. 1. "ADDRESS,ECC error address" tree.end base ad:0x5004B000 newline group.long 0x500++0x3 newline line.long 0x0 "CONFIG,Configuration register" hexmask.long.byte 0x0 8.--13. 1. "WRITEBUFSIZE,write-buffer size in number of 128-bit words" bitfld.long 0x0 0. "WEN,Write enable" "0: Write is disabled,1: Write is enabled" group.long 0x50C++0x3 line.long 0x0 "READYNEXTTIMEOUT,Configuration for ready next timeout counter. in units of AXI clock frequency" bitfld.long 0x0 31. "EN,Enable ready next timeout" "0: Disable ready next timeout,1: Enable ready next timeout" hexmask.long.word 0x0 0.--11. 1. "VALUE,Preload value for waiting for a next write" tree "ERASE" base ad:0x5004B540 group.long 0x0++0x3 line.long 0x0 "ERASEALL,Register for erasing whole RRAM main block. that includes the SICR and the UICR" bitfld.long 0x0 0. "ERASE,Erase whole RRAM main block" "0: No operation,1: Start erase of chip" tree.end tree "POWER" base ad:0x5004B510 group.long 0x0++0x3 line.long 0x0 "CONFIG,Power configuration" bitfld.long 0x0 16. "POF,Power on failure warning handling configuration" "0: Wait until the current RRAM write finishes,1: Abort the current RRAM write" hexmask.long.word 0x0 0.--15. 1. "ACCESSTIMEOUT,Access timeout in 31.25 ns units used for going into standby power mode or remain active on wake up" group.long 0x8++0x3 line.long 0x0 "LOWPOWERCONFIG,Low power mode configuration" bitfld.long 0x0 0.--1. "MODE,RRAM low power mode" "0: The RRAM goes into power down mode,1: The RRAM automatically goes into standby mode..,2: The RRAM goes into NAP mode,3: The RRAM is powered Off" tree.end repeat 5. (list 0x0 0x1 0x2 0x3 0x4)(list ad:0x5004B550 ad:0x5004B558 ad:0x5004B560 ad:0x5004B568 ad:0x5004B570) tree "REGION[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "ADDRESS,Description cluster: Region address" hexmask.long 0x0 0.--31. 1. "STARTADDR,Start address of the region [n]" line.long 0x4 "CONFIG,Description cluster: Region configuration" hexmask.long.byte 0x4 16.--20. 1. "SIZE,Size in KBytes of region [n]" bitfld.long 0x4 13. "LOCK,Enable lock" "0: Lock disabled for region [n],1: Lock enabled for region [n]" newline bitfld.long 0x4 12. "WRITEONCE,Write-once" "0: Write-once disabled,1: Write-once enabled" hexmask.long.byte 0x4 4.--7. 1. "OWNER,Owner ID" newline bitfld.long 0x4 3. "SECURE,Secure access" "0: Both Secure and non-Secure access to override..,1: Only secure access to override region [n] is.." bitfld.long 0x4 2. "EXECUTE,Execute access" "0: Execute access to override region [n] is not..,1: Execute access to override region [n] is allowed" newline bitfld.long 0x4 1. "WRITE,Write access" "0: Write access to override region [n] is not allowed,1: Write access to override region [n] is allowed" bitfld.long 0x4 0. "READ,Read access" "0: Read access to override region [n] is not allowed,1: Read access to override region [n] is allowed" tree.end repeat.end tree.end tree.end tree "SAADC (Analog to Digital Converter)" base ad:0x0 tree "GLOBAL_SAADC_NS" base ad:0x400D5000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start the ADC and prepare the result buffer in RAM" bitfld.long 0x0 0. "TASKS_START,Start the ADC and prepare the result buffer in RAM" "?,1: Trigger task" line.long 0x4 "TASKS_SAMPLE,Take one ADC sample. if scan is enabled all channels are sampled. This task requires that SAADC has started. i.e. EVENTS_STARTED was set and EVENTS_STOPPED was not." bitfld.long 0x4 0. "TASKS_SAMPLE,Take one ADC sample if scan is enabled all channels are sampled. This task requires that SAADC has started i.e. EVENTS_STARTED was set and EVENTS_STOPPED was not." "?,1: Trigger task" line.long 0x8 "TASKS_STOP,Stop the ADC and terminate any on-going conversion" bitfld.long 0x8 0. "TASKS_STOP,Stop the ADC and terminate any on-going conversion" "?,1: Trigger task" line.long 0xC "TASKS_CALIBRATEOFFSET,Starts offset auto-calibration" bitfld.long 0xC 0. "TASKS_CALIBRATEOFFSET,Starts offset auto-calibration" "?,1: Trigger task" group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_SAMPLE,Subscribe configuration for task SAMPLE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task SAMPLE will subscribe to" line.long 0x8 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0xC "SUBSCRIBE_CALIBRATEOFFSET,Subscribe configuration for task CALIBRATEOFFSET" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CALIBRATEOFFSET will subscribe to" group.long 0x100++0x17 line.long 0x0 "EVENTS_STARTED,The ADC has started" bitfld.long 0x0 0. "EVENTS_STARTED,The ADC has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_END,The ADC has filled up the Result buffer" bitfld.long 0x4 0. "EVENTS_END,The ADC has filled up the Result buffer" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_DONE,A conversion task has been completed. Depending on the mode. multiple conversions might be needed for a result to be transferred to RAM." bitfld.long 0x8 0. "EVENTS_DONE,A conversion task has been completed. Depending on the mode multiple conversions might be needed for a result to be transferred to RAM." "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_RESULTDONE,A result is ready to get transferred to RAM." bitfld.long 0xC 0. "EVENTS_RESULTDONE,A result is ready to get transferred to RAM." "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_CALIBRATEDONE,Calibration is complete" bitfld.long 0x10 0. "EVENTS_CALIBRATEDONE,Calibration is complete" "0: Event not generated,1: Event generated" line.long 0x14 "EVENTS_STOPPED,The ADC has stopped" bitfld.long 0x14 0. "EVENTS_STOPPED,The ADC has stopped" "0: Event not generated,1: Event generated" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x400D5118 ad:0x400D5120 ad:0x400D5128 ad:0x400D5130 ad:0x400D5138 ad:0x400D5140 ad:0x400D5148 ad:0x400D5150) tree "EVENTS_CH[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "LIMITH,Description cluster: Last results is equal or above CH[n].LIMIT.HIGH" bitfld.long 0x0 0. "LIMITH,Last results is equal or above CH[n].LIMIT.HIGH" "0: Event not generated,1: Event generated" line.long 0x4 "LIMITL,Description cluster: Last results is equal or below CH[n].LIMIT.LOW" bitfld.long 0x4 0. "LIMITL,Last results is equal or below CH[n].LIMIT.LOW" "0: Event not generated,1: Event generated" tree.end repeat.end base ad:0x400D5000 newline group.long 0x180++0x17 line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x8 "PUBLISH_DONE,Publish configuration for event DONE" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event DONE will publish to" line.long 0xC "PUBLISH_RESULTDONE,Publish configuration for event RESULTDONE" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event RESULTDONE will publish to" line.long 0x10 "PUBLISH_CALIBRATEDONE,Publish configuration for event CALIBRATEDONE" bitfld.long 0x10 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that event CALIBRATEDONE will publish to" line.long 0x14 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x14 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x14 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x400D5198 ad:0x400D51A0 ad:0x400D51A8 ad:0x400D51B0 ad:0x400D51B8 ad:0x400D51C0 ad:0x400D51C8 ad:0x400D51D0) tree "PUBLISH_CH[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "LIMITH,Description cluster: Publish configuration for event CH[n].LIMITH" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event CH[n].LIMITH will publish to" line.long 0x4 "LIMITL,Description cluster: Publish configuration for event CH[n].LIMITL" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event CH[n].LIMITL will publish to" tree.end repeat.end base ad:0x400D5000 newline group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 21. "CH7LIMITL,Enable or disable interrupt for event CH7LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 20. "CH7LIMITH,Enable or disable interrupt for event CH7LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "CH6LIMITL,Enable or disable interrupt for event CH6LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 18. "CH6LIMITH,Enable or disable interrupt for event CH6LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "CH5LIMITL,Enable or disable interrupt for event CH5LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 16. "CH5LIMITH,Enable or disable interrupt for event CH5LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "CH4LIMITL,Enable or disable interrupt for event CH4LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 14. "CH4LIMITH,Enable or disable interrupt for event CH4LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "CH3LIMITL,Enable or disable interrupt for event CH3LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 12. "CH3LIMITH,Enable or disable interrupt for event CH3LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "CH2LIMITL,Enable or disable interrupt for event CH2LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 10. "CH2LIMITH,Enable or disable interrupt for event CH2LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "CH1LIMITL,Enable or disable interrupt for event CH1LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 8. "CH1LIMITH,Enable or disable interrupt for event CH1LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "CH0LIMITL,Enable or disable interrupt for event CH0LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 6. "CH0LIMITH,Enable or disable interrupt for event CH0LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" bitfld.long 0x0 4. "CALIBRATEDONE,Enable or disable interrupt for event CALIBRATEDONE" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "RESULTDONE,Enable or disable interrupt for event RESULTDONE" "0: Disable,1: Enable" bitfld.long 0x0 2. "DONE,Enable or disable interrupt for event DONE" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "END,Enable or disable interrupt for event END" "0: Disable,1: Enable" bitfld.long 0x0 0. "STARTED,Enable or disable interrupt for event STARTED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 21. "CH7LIMITL,Write '1' to enable interrupt for event CH7LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "CH7LIMITH,Write '1' to enable interrupt for event CH7LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "CH6LIMITL,Write '1' to enable interrupt for event CH6LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "CH6LIMITH,Write '1' to enable interrupt for event CH6LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "CH5LIMITL,Write '1' to enable interrupt for event CH5LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "CH5LIMITH,Write '1' to enable interrupt for event CH5LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 15. "CH4LIMITL,Write '1' to enable interrupt for event CH4LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 14. "CH4LIMITH,Write '1' to enable interrupt for event CH4LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 13. "CH3LIMITL,Write '1' to enable interrupt for event CH3LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "CH3LIMITH,Write '1' to enable interrupt for event CH3LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "CH2LIMITL,Write '1' to enable interrupt for event CH2LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 10. "CH2LIMITH,Write '1' to enable interrupt for event CH2LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "CH1LIMITL,Write '1' to enable interrupt for event CH1LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 8. "CH1LIMITH,Write '1' to enable interrupt for event CH1LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "CH0LIMITL,Write '1' to enable interrupt for event CH0LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 6. "CH0LIMITH,Write '1' to enable interrupt for event CH0LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 4. "CALIBRATEDONE,Write '1' to enable interrupt for event CALIBRATEDONE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "RESULTDONE,Write '1' to enable interrupt for event RESULTDONE" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "DONE,Write '1' to enable interrupt for event DONE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 21. "CH7LIMITL,Write '1' to disable interrupt for event CH7LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "CH7LIMITH,Write '1' to disable interrupt for event CH7LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "CH6LIMITL,Write '1' to disable interrupt for event CH6LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "CH6LIMITH,Write '1' to disable interrupt for event CH6LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "CH5LIMITL,Write '1' to disable interrupt for event CH5LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "CH5LIMITH,Write '1' to disable interrupt for event CH5LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 15. "CH4LIMITL,Write '1' to disable interrupt for event CH4LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 14. "CH4LIMITH,Write '1' to disable interrupt for event CH4LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 13. "CH3LIMITL,Write '1' to disable interrupt for event CH3LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "CH3LIMITH,Write '1' to disable interrupt for event CH3LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "CH2LIMITL,Write '1' to disable interrupt for event CH2LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 10. "CH2LIMITH,Write '1' to disable interrupt for event CH2LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "CH1LIMITL,Write '1' to disable interrupt for event CH1LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 8. "CH1LIMITH,Write '1' to disable interrupt for event CH1LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "CH0LIMITL,Write '1' to disable interrupt for event CH0LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 6. "CH0LIMITH,Write '1' to disable interrupt for event CH0LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 4. "CALIBRATEDONE,Write '1' to disable interrupt for event CALIBRATEDONE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "RESULTDONE,Write '1' to disable interrupt for event RESULTDONE" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "DONE,Write '1' to disable interrupt for event DONE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "STATUS,Status" bitfld.long 0x0 0. "STATUS,Status" "0: ADC is ready. No on-going conversion.,1: ADC is busy. Single conversion in progress." tree "TRIM" base ad:0x400D5440 repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "LINCALCOEFF[$1],Description collection: Linearity calibration coefficient" hexmask.long.word 0x0 0.--15. 1. "VAL,value" repeat.end tree.end base ad:0x400D5000 newline group.long 0x500++0x3 newline line.long 0x0 "ENABLE,Enable or disable ADC" bitfld.long 0x0 0. "ENABLE,Enable or disable ADC" "0: Disable ADC,1: Enable ADC" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x400D5510 ad:0x400D5520 ad:0x400D5530 ad:0x400D5540 ad:0x400D5550 ad:0x400D5560 ad:0x400D5570 ad:0x400D5580) tree "CH[$1]" base $2 group.long ($2)++0xF line.long 0x0 "PSELP,Description cluster: Input positive pin selection for CH[n]" bitfld.long 0x0 30.--31. "CONNECT,Connection" "0: Not connected,1: Select analog input,2: Selects internal inputs.,?" bitfld.long 0x0 12.--13. "INTERNAL,Internal input selection for analog positive input when CH[n].PSELP.CONNECT = Internal" "0: Connected to the internal 0.9V analog supply rail,1: Connected to the internal 0.9V digital supply rail,2: Connected to VDD,?" newline hexmask.long.byte 0x0 8.--11. 1. "PORT,GPIO port selection" hexmask.long.byte 0x0 0.--4. 1. "PIN,GPIO pin selection." line.long 0x4 "PSELN,Description cluster: Input negative pin selection for CH[n]" bitfld.long 0x4 30.--31. "CONNECT,Connection" "0: Not connected,1: Select analog input,?,?" hexmask.long.byte 0x4 8.--11. 1. "PORT,GPIO Port selection" newline hexmask.long.byte 0x4 0.--4. 1. "PIN,GPIO pin selection." line.long 0x8 "CONFIG,Description cluster: Input configuration for CH[n]" bitfld.long 0x8 28.--30. "TCONV,Conversion time. Resulting conversion time is ((TCONV+1) x 250 ns)" "0,1,2,3,4,5,6,7" hexmask.long.word 0x8 16.--24. 1. "TACQ,Acquisition time the time the ADC uses to sample the input voltage. Resulting acquistion time is ((TACQ+1) x 125 ns)" newline bitfld.long 0x8 15. "MODE,Enable differential mode" "0: Single ended PSELN will be ignored negative..,1: Differential" bitfld.long 0x8 12. "REFSEL,Reference control" "0: Internal reference (0.9 V),1: External reference given at PADC_EXT_REF_1V2" newline bitfld.long 0x8 11. "BURST,Enable burst mode" "0: Burst mode is disabled (normal operation),1: Burst mode is enabled. SAADC takes 2^OVERSAMPLE.." bitfld.long 0x8 8.--10. "GAIN,Gain control" "0: 2,1: 1,2: 2/3,3: 2/4,4: 2/5,5: 2/6,6: 2/7,7: 2/8" line.long 0xC "LIMIT,Description cluster: High/low limits for event monitoring a channel" hexmask.long.word 0xC 16.--31. 1. "HIGH,High level limit" hexmask.long.word 0xC 0.--15. 1. "LOW,Low level limit" tree.end repeat.end base ad:0x400D5000 newline group.long 0x5F0++0xB line.long 0x0 "RESOLUTION,Resolution configuration" bitfld.long 0x0 0.--2. "VAL,Set the resolution" "0: 8 bit,1: 10 bit,2: 12 bit,3: 14 bit,?,?,?,?" line.long 0x4 "OVERSAMPLE,Oversampling configuration. OVERSAMPLE should not be combined with SCAN. The RESOLUTION is applied before averaging. thus for high OVERSAMPLE a higher RESOLUTION should be used." hexmask.long.byte 0x4 0.--3. 1. "OVERSAMPLE,Oversample control" line.long 0x8 "SAMPLERATE,Controls normal or continuous sample rate" bitfld.long 0x8 12. "MODE,Select mode for sample rate control" "0: Rate is controlled from SAMPLE task,1: Rate is controlled from local timer (use CC to.." hexmask.long.word 0x8 0.--10. 1. "CC,Capture and compare value. Sample rate is 16 MHz/CC" tree "RESULT" base ad:0x400D5628 group.long 0x4++0x7 line.long 0x0 "PTR,Data pointer" hexmask.long 0x0 0.--31. 1. "PTR,Data pointer" line.long 0x4 "MAXCNT,Maximum number of buffer bytes to transfer" hexmask.long.word 0x4 0.--14. 1. "MAXCNT,Maximum number of buffer bytes to transfer" rgroup.long 0xC++0x7 line.long 0x0 "AMOUNT,Number of buffer bytes transferred since last START. updated after the END or STOPPED events" hexmask.long.word 0x0 0.--14. 1. "AMOUNT,Number of buffer bytes transferred since last START updated after the END or STOPPED events." line.long 0x4 "CURRENTAMOUNT,Number of buffer bytes transferred since last START. continuously updated" hexmask.long.word 0x4 0.--14. 1. "AMOUNT,Number of buffer bytes transferred since last START continuously updated." tree.end base ad:0x400D5000 newline group.long 0x654++0x3 newline line.long 0x0 "NOISESHAPE,Enable noise shaping" bitfld.long 0x0 0.--1. "NOISESHAPE,Enable noise shaping" "0: Disable noiseshaping. Oversampling based on..,1: Noiseshaping and decimating. Larger passband.,2: Noiseshaping and decimating. Smaller passband.,?" tree.end tree "GLOBAL_SAADC_S" base ad:0x500D5000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start the ADC and prepare the result buffer in RAM" bitfld.long 0x0 0. "TASKS_START,Start the ADC and prepare the result buffer in RAM" "?,1: Trigger task" line.long 0x4 "TASKS_SAMPLE,Take one ADC sample. if scan is enabled all channels are sampled. This task requires that SAADC has started. i.e. EVENTS_STARTED was set and EVENTS_STOPPED was not." bitfld.long 0x4 0. "TASKS_SAMPLE,Take one ADC sample if scan is enabled all channels are sampled. This task requires that SAADC has started i.e. EVENTS_STARTED was set and EVENTS_STOPPED was not." "?,1: Trigger task" line.long 0x8 "TASKS_STOP,Stop the ADC and terminate any on-going conversion" bitfld.long 0x8 0. "TASKS_STOP,Stop the ADC and terminate any on-going conversion" "?,1: Trigger task" line.long 0xC "TASKS_CALIBRATEOFFSET,Starts offset auto-calibration" bitfld.long 0xC 0. "TASKS_CALIBRATEOFFSET,Starts offset auto-calibration" "?,1: Trigger task" group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_SAMPLE,Subscribe configuration for task SAMPLE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task SAMPLE will subscribe to" line.long 0x8 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0xC "SUBSCRIBE_CALIBRATEOFFSET,Subscribe configuration for task CALIBRATEOFFSET" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CALIBRATEOFFSET will subscribe to" group.long 0x100++0x17 line.long 0x0 "EVENTS_STARTED,The ADC has started" bitfld.long 0x0 0. "EVENTS_STARTED,The ADC has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_END,The ADC has filled up the Result buffer" bitfld.long 0x4 0. "EVENTS_END,The ADC has filled up the Result buffer" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_DONE,A conversion task has been completed. Depending on the mode. multiple conversions might be needed for a result to be transferred to RAM." bitfld.long 0x8 0. "EVENTS_DONE,A conversion task has been completed. Depending on the mode multiple conversions might be needed for a result to be transferred to RAM." "0: Event not generated,1: Event generated" line.long 0xC "EVENTS_RESULTDONE,A result is ready to get transferred to RAM." bitfld.long 0xC 0. "EVENTS_RESULTDONE,A result is ready to get transferred to RAM." "0: Event not generated,1: Event generated" line.long 0x10 "EVENTS_CALIBRATEDONE,Calibration is complete" bitfld.long 0x10 0. "EVENTS_CALIBRATEDONE,Calibration is complete" "0: Event not generated,1: Event generated" line.long 0x14 "EVENTS_STOPPED,The ADC has stopped" bitfld.long 0x14 0. "EVENTS_STOPPED,The ADC has stopped" "0: Event not generated,1: Event generated" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x500D5118 ad:0x500D5120 ad:0x500D5128 ad:0x500D5130 ad:0x500D5138 ad:0x500D5140 ad:0x500D5148 ad:0x500D5150) tree "EVENTS_CH[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "LIMITH,Description cluster: Last results is equal or above CH[n].LIMIT.HIGH" bitfld.long 0x0 0. "LIMITH,Last results is equal or above CH[n].LIMIT.HIGH" "0: Event not generated,1: Event generated" line.long 0x4 "LIMITL,Description cluster: Last results is equal or below CH[n].LIMIT.LOW" bitfld.long 0x4 0. "LIMITL,Last results is equal or below CH[n].LIMIT.LOW" "0: Event not generated,1: Event generated" tree.end repeat.end base ad:0x500D5000 newline group.long 0x180++0x17 line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x8 "PUBLISH_DONE,Publish configuration for event DONE" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event DONE will publish to" line.long 0xC "PUBLISH_RESULTDONE,Publish configuration for event RESULTDONE" bitfld.long 0xC 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that event RESULTDONE will publish to" line.long 0x10 "PUBLISH_CALIBRATEDONE,Publish configuration for event CALIBRATEDONE" bitfld.long 0x10 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x10 0.--7. 1. "CHIDX,DPPI channel that event CALIBRATEDONE will publish to" line.long 0x14 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x14 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x14 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x500D5198 ad:0x500D51A0 ad:0x500D51A8 ad:0x500D51B0 ad:0x500D51B8 ad:0x500D51C0 ad:0x500D51C8 ad:0x500D51D0) tree "PUBLISH_CH[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "LIMITH,Description cluster: Publish configuration for event CH[n].LIMITH" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event CH[n].LIMITH will publish to" line.long 0x4 "LIMITL,Description cluster: Publish configuration for event CH[n].LIMITL" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event CH[n].LIMITL will publish to" tree.end repeat.end base ad:0x500D5000 newline group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 21. "CH7LIMITL,Enable or disable interrupt for event CH7LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 20. "CH7LIMITH,Enable or disable interrupt for event CH7LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "CH6LIMITL,Enable or disable interrupt for event CH6LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 18. "CH6LIMITH,Enable or disable interrupt for event CH6LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "CH5LIMITL,Enable or disable interrupt for event CH5LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 16. "CH5LIMITH,Enable or disable interrupt for event CH5LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "CH4LIMITL,Enable or disable interrupt for event CH4LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 14. "CH4LIMITH,Enable or disable interrupt for event CH4LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "CH3LIMITL,Enable or disable interrupt for event CH3LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 12. "CH3LIMITH,Enable or disable interrupt for event CH3LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 11. "CH2LIMITL,Enable or disable interrupt for event CH2LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 10. "CH2LIMITH,Enable or disable interrupt for event CH2LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "CH1LIMITL,Enable or disable interrupt for event CH1LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 8. "CH1LIMITH,Enable or disable interrupt for event CH1LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 7. "CH0LIMITL,Enable or disable interrupt for event CH0LIMITL" "0: Disable,1: Enable" bitfld.long 0x0 6. "CH0LIMITH,Enable or disable interrupt for event CH0LIMITH" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" bitfld.long 0x0 4. "CALIBRATEDONE,Enable or disable interrupt for event CALIBRATEDONE" "0: Disable,1: Enable" newline bitfld.long 0x0 3. "RESULTDONE,Enable or disable interrupt for event RESULTDONE" "0: Disable,1: Enable" bitfld.long 0x0 2. "DONE,Enable or disable interrupt for event DONE" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "END,Enable or disable interrupt for event END" "0: Disable,1: Enable" bitfld.long 0x0 0. "STARTED,Enable or disable interrupt for event STARTED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 21. "CH7LIMITL,Write '1' to enable interrupt for event CH7LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "CH7LIMITH,Write '1' to enable interrupt for event CH7LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "CH6LIMITL,Write '1' to enable interrupt for event CH6LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "CH6LIMITH,Write '1' to enable interrupt for event CH6LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "CH5LIMITL,Write '1' to enable interrupt for event CH5LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "CH5LIMITH,Write '1' to enable interrupt for event CH5LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 15. "CH4LIMITL,Write '1' to enable interrupt for event CH4LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 14. "CH4LIMITH,Write '1' to enable interrupt for event CH4LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 13. "CH3LIMITL,Write '1' to enable interrupt for event CH3LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "CH3LIMITH,Write '1' to enable interrupt for event CH3LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 11. "CH2LIMITL,Write '1' to enable interrupt for event CH2LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 10. "CH2LIMITH,Write '1' to enable interrupt for event CH2LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "CH1LIMITL,Write '1' to enable interrupt for event CH1LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 8. "CH1LIMITH,Write '1' to enable interrupt for event CH1LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 7. "CH0LIMITL,Write '1' to enable interrupt for event CH0LIMITL" "0: Read: Disabled,1: Enable" bitfld.long 0x4 6. "CH0LIMITH,Write '1' to enable interrupt for event CH0LIMITH" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 4. "CALIBRATEDONE,Write '1' to enable interrupt for event CALIBRATEDONE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 3. "RESULTDONE,Write '1' to enable interrupt for event RESULTDONE" "0: Read: Disabled,1: Enable" bitfld.long 0x4 2. "DONE,Write '1' to enable interrupt for event DONE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 21. "CH7LIMITL,Write '1' to disable interrupt for event CH7LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "CH7LIMITH,Write '1' to disable interrupt for event CH7LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "CH6LIMITL,Write '1' to disable interrupt for event CH6LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "CH6LIMITH,Write '1' to disable interrupt for event CH6LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "CH5LIMITL,Write '1' to disable interrupt for event CH5LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "CH5LIMITH,Write '1' to disable interrupt for event CH5LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 15. "CH4LIMITL,Write '1' to disable interrupt for event CH4LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 14. "CH4LIMITH,Write '1' to disable interrupt for event CH4LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 13. "CH3LIMITL,Write '1' to disable interrupt for event CH3LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "CH3LIMITH,Write '1' to disable interrupt for event CH3LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 11. "CH2LIMITL,Write '1' to disable interrupt for event CH2LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 10. "CH2LIMITH,Write '1' to disable interrupt for event CH2LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "CH1LIMITL,Write '1' to disable interrupt for event CH1LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 8. "CH1LIMITH,Write '1' to disable interrupt for event CH1LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 7. "CH0LIMITL,Write '1' to disable interrupt for event CH0LIMITL" "0: Read: Disabled,1: Disable" bitfld.long 0x8 6. "CH0LIMITH,Write '1' to disable interrupt for event CH0LIMITH" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 4. "CALIBRATEDONE,Write '1' to disable interrupt for event CALIBRATEDONE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 3. "RESULTDONE,Write '1' to disable interrupt for event RESULTDONE" "0: Read: Disabled,1: Disable" bitfld.long 0x8 2. "DONE,Write '1' to disable interrupt for event DONE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "STATUS,Status" bitfld.long 0x0 0. "STATUS,Status" "0: ADC is ready. No on-going conversion.,1: ADC is busy. Single conversion in progress." tree "TRIM" base ad:0x500D5000 repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "LINCALCOEFF[$1],Description collection: Linearity calibration coefficient" hexmask.long.word 0x0 0.--15. 1. "VAL,value" repeat.end tree.end base ad:0x500D5000 newline group.long 0x500++0x3 newline line.long 0x0 "ENABLE,Enable or disable ADC" bitfld.long 0x0 0. "ENABLE,Enable or disable ADC" "0: Disable ADC,1: Enable ADC" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x500D5510 ad:0x500D5520 ad:0x500D5530 ad:0x500D5540 ad:0x500D5550 ad:0x500D5560 ad:0x500D5570 ad:0x500D5580) tree "CH[$1]" base $2 group.long ($2)++0xF line.long 0x0 "PSELP,Description cluster: Input positive pin selection for CH[n]" bitfld.long 0x0 30.--31. "CONNECT,Connection" "0: Not connected,1: Select analog input,2: Selects internal inputs.,?" bitfld.long 0x0 12.--13. "INTERNAL,Internal input selection for analog positive input when CH[n].PSELP.CONNECT = Internal" "0: Connected to the internal 0.9V analog supply rail,1: Connected to the internal 0.9V digital supply rail,2: Connected to VDD,?" newline hexmask.long.byte 0x0 8.--11. 1. "PORT,GPIO port selection" hexmask.long.byte 0x0 0.--4. 1. "PIN,GPIO pin selection." line.long 0x4 "PSELN,Description cluster: Input negative pin selection for CH[n]" bitfld.long 0x4 30.--31. "CONNECT,Connection" "0: Not connected,1: Select analog input,?,?" hexmask.long.byte 0x4 8.--11. 1. "PORT,GPIO Port selection" newline hexmask.long.byte 0x4 0.--4. 1. "PIN,GPIO pin selection." line.long 0x8 "CONFIG,Description cluster: Input configuration for CH[n]" bitfld.long 0x8 28.--30. "TCONV,Conversion time. Resulting conversion time is ((TCONV+1) x 250 ns)" "0,1,2,3,4,5,6,7" hexmask.long.word 0x8 16.--24. 1. "TACQ,Acquisition time the time the ADC uses to sample the input voltage. Resulting acquistion time is ((TACQ+1) x 125 ns)" newline bitfld.long 0x8 15. "MODE,Enable differential mode" "0: Single ended PSELN will be ignored negative..,1: Differential" bitfld.long 0x8 12. "REFSEL,Reference control" "0: Internal reference (0.9 V),1: External reference given at PADC_EXT_REF_1V2" newline bitfld.long 0x8 11. "BURST,Enable burst mode" "0: Burst mode is disabled (normal operation),1: Burst mode is enabled. SAADC takes 2^OVERSAMPLE.." bitfld.long 0x8 8.--10. "GAIN,Gain control" "0: 2,1: 1,2: 2/3,3: 2/4,4: 2/5,5: 2/6,6: 2/7,7: 2/8" line.long 0xC "LIMIT,Description cluster: High/low limits for event monitoring a channel" hexmask.long.word 0xC 16.--31. 1. "HIGH,High level limit" hexmask.long.word 0xC 0.--15. 1. "LOW,Low level limit" tree.end repeat.end base ad:0x500D5000 newline group.long 0x5F0++0xB line.long 0x0 "RESOLUTION,Resolution configuration" bitfld.long 0x0 0.--2. "VAL,Set the resolution" "0: 8 bit,1: 10 bit,2: 12 bit,3: 14 bit,?,?,?,?" line.long 0x4 "OVERSAMPLE,Oversampling configuration. OVERSAMPLE should not be combined with SCAN. The RESOLUTION is applied before averaging. thus for high OVERSAMPLE a higher RESOLUTION should be used." hexmask.long.byte 0x4 0.--3. 1. "OVERSAMPLE,Oversample control" line.long 0x8 "SAMPLERATE,Controls normal or continuous sample rate" bitfld.long 0x8 12. "MODE,Select mode for sample rate control" "0: Rate is controlled from SAMPLE task,1: Rate is controlled from local timer (use CC to.." hexmask.long.word 0x8 0.--10. 1. "CC,Capture and compare value. Sample rate is 16 MHz/CC" tree "RESULT" base ad:0x500D5000 group.long 0x4++0x7 line.long 0x0 "PTR,Data pointer" hexmask.long 0x0 0.--31. 1. "PTR,Data pointer" line.long 0x4 "MAXCNT,Maximum number of buffer bytes to transfer" hexmask.long.word 0x4 0.--14. 1. "MAXCNT,Maximum number of buffer bytes to transfer" rgroup.long 0xC++0x7 line.long 0x0 "AMOUNT,Number of buffer bytes transferred since last START. updated after the END or STOPPED events" hexmask.long.word 0x0 0.--14. 1. "AMOUNT,Number of buffer bytes transferred since last START updated after the END or STOPPED events." line.long 0x4 "CURRENTAMOUNT,Number of buffer bytes transferred since last START. continuously updated" hexmask.long.word 0x4 0.--14. 1. "AMOUNT,Number of buffer bytes transferred since last START continuously updated." tree.end base ad:0x500D5000 newline group.long 0x654++0x3 newline line.long 0x0 "NOISESHAPE,Enable noise shaping" bitfld.long 0x0 0.--1. "NOISESHAPE,Enable noise shaping" "0: Disable noiseshaping. Oversampling based on..,1: Noiseshaping and decimating. Larger passband.,2: Noiseshaping and decimating. Smaller passband.,?" tree.end tree.end tree "SICR (Secure Information Configuration Region)" base ad:0x0 tree "GLOBAL_SICR_S" base ad:0xFFE000 rgroup.long 0x0++0x3 line.long 0x0 "UNUSED,Unused." tree.end tree.end tree "SPIM (Serial Peripheral Interface - Master)" base ad:0x0 tree "GLOBAL_SPIM00_NS" base ad:0x4004A000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start SPI transaction" bitfld.long 0x0 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop SPI transaction" bitfld.long 0x4 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend SPI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume SPI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x4004A028 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x4004A000 newline group.long 0x80++0x7 newline line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x4004A0A8 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x4004A000 newline group.long 0x100++0xB newline line.long 0x0 "EVENTS_STARTED,SPI transaction has started" bitfld.long 0x0 0. "EVENTS_STARTED,SPI transaction has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,SPI transaction has stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,End of RXD buffer and TXD buffer reached" bitfld.long 0x8 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x4004A14C tree "RX (Peripheral events.)" group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x4004A000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x4004A1CC tree "RX (Publish configuration for events)" group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x4004A000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[3] and task DMA.RX.DISABLEMATCH[3]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[2] and task DMA.RX.DISABLEMATCH[2]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[1] and task DMA.RX.DISABLEMATCH[1]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[0] and task DMA.RX.DISABLEMATCH[0]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPIM" group.long 0x52C++0x3 line.long 0x0 "PRESCALER,The prescaler is used to set the SPI frequency." hexmask.long.byte 0x0 0.--6. 1. "DIVISOR,Core clock to SCK divisor" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" tree "IFTIMING" base ad:0x4004A5AC group.long 0x0++0x7 line.long 0x0 "RXDELAY,Sample delay for input serial data on SDI" bitfld.long 0x0 0.--2. "RXDELAY,Sample delay for input serial data on SDI. The value specifies the number of SPIM core clock cycles delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0 trailing edge for CONFIG.CPHA = 1) until the input serial data is.." "0,1,2,3,4,5,6,7" line.long 0x4 "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used. this is also the minimum duration CSN must stay high between transactions." hexmask.long.byte 0x4 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used this is the minimum duration CSN must stay high between transactions. The value is specified in number of SPIM core clock cycles." tree.end base ad:0x4004A000 newline group.long 0x5B4++0x7 newline line.long 0x0 "DCXCNT,DCX configuration" hexmask.long.byte 0x0 0.--3. 1. "DCXCNT,This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes." line.long 0x4 "CSNPOL,Polarity of CSN output" bitfld.long 0x4 0. "CSNPOL_0,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)" group.long 0x5C0++0x3 line.long 0x0 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT" hexmask.long.byte 0x0 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT." tree "DMA" base ad:0x4004A700 tree "RX (Unspecified)" group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x4004A600 group.long 0x0++0x13 line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MOSI,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MISO,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "DCX,Pin select for DCX signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" line.long 0x10 "CSN,Pin select for CSN" bitfld.long 0x10 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x10 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIM00_S" base ad:0x5004A000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start SPI transaction" bitfld.long 0x0 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop SPI transaction" bitfld.long 0x4 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend SPI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume SPI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x5004A000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x5004A000 newline group.long 0x80++0x7 newline line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x5004A000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x5004A000 newline group.long 0x100++0xB newline line.long 0x0 "EVENTS_STARTED,SPI transaction has started" bitfld.long 0x0 0. "EVENTS_STARTED,SPI transaction has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,SPI transaction has stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,End of RXD buffer and TXD buffer reached" bitfld.long 0x8 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x5004A000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x5004A000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x5004A000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x5004A000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[3] and task DMA.RX.DISABLEMATCH[3]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[2] and task DMA.RX.DISABLEMATCH[2]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[1] and task DMA.RX.DISABLEMATCH[1]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[0] and task DMA.RX.DISABLEMATCH[0]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPIM" group.long 0x52C++0x3 line.long 0x0 "PRESCALER,The prescaler is used to set the SPI frequency." hexmask.long.byte 0x0 0.--6. 1. "DIVISOR,Core clock to SCK divisor" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" tree "IFTIMING" base ad:0x5004A000 group.long 0x0++0x7 line.long 0x0 "RXDELAY,Sample delay for input serial data on SDI" bitfld.long 0x0 0.--2. "RXDELAY,Sample delay for input serial data on SDI. The value specifies the number of SPIM core clock cycles delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0 trailing edge for CONFIG.CPHA = 1) until the input serial data is.." "0,1,2,3,4,5,6,7" line.long 0x4 "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used. this is also the minimum duration CSN must stay high between transactions." hexmask.long.byte 0x4 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used this is the minimum duration CSN must stay high between transactions. The value is specified in number of SPIM core clock cycles." tree.end base ad:0x5004A000 newline group.long 0x5B4++0x7 newline line.long 0x0 "DCXCNT,DCX configuration" hexmask.long.byte 0x0 0.--3. 1. "DCXCNT,This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes." line.long 0x4 "CSNPOL,Polarity of CSN output" bitfld.long 0x4 0. "CSNPOL_0,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)" group.long 0x5C0++0x3 line.long 0x0 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT" hexmask.long.byte 0x0 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT." tree "DMA" base ad:0x5004A000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x5004A000 group.long 0x0++0x13 line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MOSI,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MISO,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "DCX,Pin select for DCX signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" line.long 0x10 "CSN,Pin select for CSN" bitfld.long 0x10 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x10 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIM20_NS" base ad:0x400C6000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start SPI transaction" bitfld.long 0x0 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop SPI transaction" bitfld.long 0x4 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend SPI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume SPI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x400C6000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x400C6000 newline group.long 0x80++0x7 newline line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x400C6000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x400C6000 newline group.long 0x100++0xB newline line.long 0x0 "EVENTS_STARTED,SPI transaction has started" bitfld.long 0x0 0. "EVENTS_STARTED,SPI transaction has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,SPI transaction has stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,End of RXD buffer and TXD buffer reached" bitfld.long 0x8 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400C6000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x400C6000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x400C6000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x400C6000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[3] and task DMA.RX.DISABLEMATCH[3]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[2] and task DMA.RX.DISABLEMATCH[2]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[1] and task DMA.RX.DISABLEMATCH[1]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[0] and task DMA.RX.DISABLEMATCH[0]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPIM" group.long 0x52C++0x3 line.long 0x0 "PRESCALER,The prescaler is used to set the SPI frequency." hexmask.long.byte 0x0 0.--6. 1. "DIVISOR,Core clock to SCK divisor" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" tree "IFTIMING" base ad:0x400C6000 group.long 0x0++0x7 line.long 0x0 "RXDELAY,Sample delay for input serial data on SDI" bitfld.long 0x0 0.--2. "RXDELAY,Sample delay for input serial data on SDI. The value specifies the number of SPIM core clock cycles delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0 trailing edge for CONFIG.CPHA = 1) until the input serial data is.." "0,1,2,3,4,5,6,7" line.long 0x4 "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used. this is also the minimum duration CSN must stay high between transactions." hexmask.long.byte 0x4 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used this is the minimum duration CSN must stay high between transactions. The value is specified in number of SPIM core clock cycles." tree.end base ad:0x400C6000 newline group.long 0x5B4++0x7 newline line.long 0x0 "DCXCNT,DCX configuration" hexmask.long.byte 0x0 0.--3. 1. "DCXCNT,This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes." line.long 0x4 "CSNPOL,Polarity of CSN output" bitfld.long 0x4 0. "CSNPOL_0,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)" group.long 0x5C0++0x3 line.long 0x0 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT" hexmask.long.byte 0x0 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT." tree "DMA" base ad:0x400C6000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C6000 group.long 0x0++0x13 line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MOSI,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MISO,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "DCX,Pin select for DCX signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" line.long 0x10 "CSN,Pin select for CSN" bitfld.long 0x10 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x10 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIM20_S" base ad:0x500C6000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start SPI transaction" bitfld.long 0x0 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop SPI transaction" bitfld.long 0x4 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend SPI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume SPI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x500C6000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x500C6000 newline group.long 0x80++0x7 newline line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x500C6000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x500C6000 newline group.long 0x100++0xB newline line.long 0x0 "EVENTS_STARTED,SPI transaction has started" bitfld.long 0x0 0. "EVENTS_STARTED,SPI transaction has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,SPI transaction has stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,End of RXD buffer and TXD buffer reached" bitfld.long 0x8 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500C6000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x500C6000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x500C6000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x500C6000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[3] and task DMA.RX.DISABLEMATCH[3]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[2] and task DMA.RX.DISABLEMATCH[2]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[1] and task DMA.RX.DISABLEMATCH[1]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[0] and task DMA.RX.DISABLEMATCH[0]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPIM" group.long 0x52C++0x3 line.long 0x0 "PRESCALER,The prescaler is used to set the SPI frequency." hexmask.long.byte 0x0 0.--6. 1. "DIVISOR,Core clock to SCK divisor" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" tree "IFTIMING" base ad:0x500C6000 group.long 0x0++0x7 line.long 0x0 "RXDELAY,Sample delay for input serial data on SDI" bitfld.long 0x0 0.--2. "RXDELAY,Sample delay for input serial data on SDI. The value specifies the number of SPIM core clock cycles delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0 trailing edge for CONFIG.CPHA = 1) until the input serial data is.." "0,1,2,3,4,5,6,7" line.long 0x4 "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used. this is also the minimum duration CSN must stay high between transactions." hexmask.long.byte 0x4 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used this is the minimum duration CSN must stay high between transactions. The value is specified in number of SPIM core clock cycles." tree.end base ad:0x500C6000 newline group.long 0x5B4++0x7 newline line.long 0x0 "DCXCNT,DCX configuration" hexmask.long.byte 0x0 0.--3. 1. "DCXCNT,This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes." line.long 0x4 "CSNPOL,Polarity of CSN output" bitfld.long 0x4 0. "CSNPOL_0,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)" group.long 0x5C0++0x3 line.long 0x0 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT" hexmask.long.byte 0x0 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT." tree "DMA" base ad:0x500C6000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C6000 group.long 0x0++0x13 line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MOSI,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MISO,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "DCX,Pin select for DCX signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" line.long 0x10 "CSN,Pin select for CSN" bitfld.long 0x10 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x10 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIM21_NS" base ad:0x400C7000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start SPI transaction" bitfld.long 0x0 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop SPI transaction" bitfld.long 0x4 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend SPI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume SPI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x400C7000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x400C7000 newline group.long 0x80++0x7 newline line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x400C7000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x400C7000 newline group.long 0x100++0xB newline line.long 0x0 "EVENTS_STARTED,SPI transaction has started" bitfld.long 0x0 0. "EVENTS_STARTED,SPI transaction has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,SPI transaction has stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,End of RXD buffer and TXD buffer reached" bitfld.long 0x8 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400C7000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x400C7000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x400C7000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x400C7000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[3] and task DMA.RX.DISABLEMATCH[3]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[2] and task DMA.RX.DISABLEMATCH[2]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[1] and task DMA.RX.DISABLEMATCH[1]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[0] and task DMA.RX.DISABLEMATCH[0]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPIM" group.long 0x52C++0x3 line.long 0x0 "PRESCALER,The prescaler is used to set the SPI frequency." hexmask.long.byte 0x0 0.--6. 1. "DIVISOR,Core clock to SCK divisor" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" tree "IFTIMING" base ad:0x400C7000 group.long 0x0++0x7 line.long 0x0 "RXDELAY,Sample delay for input serial data on SDI" bitfld.long 0x0 0.--2. "RXDELAY,Sample delay for input serial data on SDI. The value specifies the number of SPIM core clock cycles delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0 trailing edge for CONFIG.CPHA = 1) until the input serial data is.." "0,1,2,3,4,5,6,7" line.long 0x4 "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used. this is also the minimum duration CSN must stay high between transactions." hexmask.long.byte 0x4 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used this is the minimum duration CSN must stay high between transactions. The value is specified in number of SPIM core clock cycles." tree.end base ad:0x400C7000 newline group.long 0x5B4++0x7 newline line.long 0x0 "DCXCNT,DCX configuration" hexmask.long.byte 0x0 0.--3. 1. "DCXCNT,This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes." line.long 0x4 "CSNPOL,Polarity of CSN output" bitfld.long 0x4 0. "CSNPOL_0,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)" group.long 0x5C0++0x3 line.long 0x0 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT" hexmask.long.byte 0x0 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT." tree "DMA" base ad:0x400C7000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C7000 group.long 0x0++0x13 line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MOSI,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MISO,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "DCX,Pin select for DCX signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" line.long 0x10 "CSN,Pin select for CSN" bitfld.long 0x10 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x10 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIM21_S" base ad:0x500C7000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start SPI transaction" bitfld.long 0x0 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop SPI transaction" bitfld.long 0x4 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend SPI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume SPI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x500C7000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x500C7000 newline group.long 0x80++0x7 newline line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x500C7000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x500C7000 newline group.long 0x100++0xB newline line.long 0x0 "EVENTS_STARTED,SPI transaction has started" bitfld.long 0x0 0. "EVENTS_STARTED,SPI transaction has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,SPI transaction has stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,End of RXD buffer and TXD buffer reached" bitfld.long 0x8 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500C7000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x500C7000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x500C7000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x500C7000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[3] and task DMA.RX.DISABLEMATCH[3]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[2] and task DMA.RX.DISABLEMATCH[2]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[1] and task DMA.RX.DISABLEMATCH[1]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[0] and task DMA.RX.DISABLEMATCH[0]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPIM" group.long 0x52C++0x3 line.long 0x0 "PRESCALER,The prescaler is used to set the SPI frequency." hexmask.long.byte 0x0 0.--6. 1. "DIVISOR,Core clock to SCK divisor" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" tree "IFTIMING" base ad:0x500C7000 group.long 0x0++0x7 line.long 0x0 "RXDELAY,Sample delay for input serial data on SDI" bitfld.long 0x0 0.--2. "RXDELAY,Sample delay for input serial data on SDI. The value specifies the number of SPIM core clock cycles delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0 trailing edge for CONFIG.CPHA = 1) until the input serial data is.." "0,1,2,3,4,5,6,7" line.long 0x4 "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used. this is also the minimum duration CSN must stay high between transactions." hexmask.long.byte 0x4 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used this is the minimum duration CSN must stay high between transactions. The value is specified in number of SPIM core clock cycles." tree.end base ad:0x500C7000 newline group.long 0x5B4++0x7 newline line.long 0x0 "DCXCNT,DCX configuration" hexmask.long.byte 0x0 0.--3. 1. "DCXCNT,This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes." line.long 0x4 "CSNPOL,Polarity of CSN output" bitfld.long 0x4 0. "CSNPOL_0,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)" group.long 0x5C0++0x3 line.long 0x0 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT" hexmask.long.byte 0x0 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT." tree "DMA" base ad:0x500C7000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C7000 group.long 0x0++0x13 line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MOSI,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MISO,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "DCX,Pin select for DCX signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" line.long 0x10 "CSN,Pin select for CSN" bitfld.long 0x10 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x10 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIM22_NS" base ad:0x400C8000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start SPI transaction" bitfld.long 0x0 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop SPI transaction" bitfld.long 0x4 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend SPI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume SPI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x400C8000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x400C8000 newline group.long 0x80++0x7 newline line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x400C8000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x400C8000 newline group.long 0x100++0xB newline line.long 0x0 "EVENTS_STARTED,SPI transaction has started" bitfld.long 0x0 0. "EVENTS_STARTED,SPI transaction has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,SPI transaction has stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,End of RXD buffer and TXD buffer reached" bitfld.long 0x8 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400C8000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x400C8000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x400C8000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x400C8000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[3] and task DMA.RX.DISABLEMATCH[3]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[2] and task DMA.RX.DISABLEMATCH[2]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[1] and task DMA.RX.DISABLEMATCH[1]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[0] and task DMA.RX.DISABLEMATCH[0]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPIM" group.long 0x52C++0x3 line.long 0x0 "PRESCALER,The prescaler is used to set the SPI frequency." hexmask.long.byte 0x0 0.--6. 1. "DIVISOR,Core clock to SCK divisor" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" tree "IFTIMING" base ad:0x400C8000 group.long 0x0++0x7 line.long 0x0 "RXDELAY,Sample delay for input serial data on SDI" bitfld.long 0x0 0.--2. "RXDELAY,Sample delay for input serial data on SDI. The value specifies the number of SPIM core clock cycles delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0 trailing edge for CONFIG.CPHA = 1) until the input serial data is.." "0,1,2,3,4,5,6,7" line.long 0x4 "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used. this is also the minimum duration CSN must stay high between transactions." hexmask.long.byte 0x4 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used this is the minimum duration CSN must stay high between transactions. The value is specified in number of SPIM core clock cycles." tree.end base ad:0x400C8000 newline group.long 0x5B4++0x7 newline line.long 0x0 "DCXCNT,DCX configuration" hexmask.long.byte 0x0 0.--3. 1. "DCXCNT,This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes." line.long 0x4 "CSNPOL,Polarity of CSN output" bitfld.long 0x4 0. "CSNPOL_0,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)" group.long 0x5C0++0x3 line.long 0x0 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT" hexmask.long.byte 0x0 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT." tree "DMA" base ad:0x400C8000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C8000 group.long 0x0++0x13 line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MOSI,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MISO,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "DCX,Pin select for DCX signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" line.long 0x10 "CSN,Pin select for CSN" bitfld.long 0x10 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x10 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIM22_S" base ad:0x500C8000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start SPI transaction" bitfld.long 0x0 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop SPI transaction" bitfld.long 0x4 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend SPI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume SPI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x500C8000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x500C8000 newline group.long 0x80++0x7 newline line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x500C8000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x500C8000 newline group.long 0x100++0xB newline line.long 0x0 "EVENTS_STARTED,SPI transaction has started" bitfld.long 0x0 0. "EVENTS_STARTED,SPI transaction has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,SPI transaction has stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,End of RXD buffer and TXD buffer reached" bitfld.long 0x8 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500C8000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x500C8000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x500C8000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x500C8000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[3] and task DMA.RX.DISABLEMATCH[3]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[2] and task DMA.RX.DISABLEMATCH[2]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[1] and task DMA.RX.DISABLEMATCH[1]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[0] and task DMA.RX.DISABLEMATCH[0]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPIM" group.long 0x52C++0x3 line.long 0x0 "PRESCALER,The prescaler is used to set the SPI frequency." hexmask.long.byte 0x0 0.--6. 1. "DIVISOR,Core clock to SCK divisor" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" tree "IFTIMING" base ad:0x500C8000 group.long 0x0++0x7 line.long 0x0 "RXDELAY,Sample delay for input serial data on SDI" bitfld.long 0x0 0.--2. "RXDELAY,Sample delay for input serial data on SDI. The value specifies the number of SPIM core clock cycles delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0 trailing edge for CONFIG.CPHA = 1) until the input serial data is.." "0,1,2,3,4,5,6,7" line.long 0x4 "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used. this is also the minimum duration CSN must stay high between transactions." hexmask.long.byte 0x4 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used this is the minimum duration CSN must stay high between transactions. The value is specified in number of SPIM core clock cycles." tree.end base ad:0x500C8000 newline group.long 0x5B4++0x7 newline line.long 0x0 "DCXCNT,DCX configuration" hexmask.long.byte 0x0 0.--3. 1. "DCXCNT,This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes." line.long 0x4 "CSNPOL,Polarity of CSN output" bitfld.long 0x4 0. "CSNPOL_0,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)" group.long 0x5C0++0x3 line.long 0x0 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT" hexmask.long.byte 0x0 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT." tree "DMA" base ad:0x500C8000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C8000 group.long 0x0++0x13 line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MOSI,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MISO,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "DCX,Pin select for DCX signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" line.long 0x10 "CSN,Pin select for CSN" bitfld.long 0x10 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x10 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIM30_NS" base ad:0x40104000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start SPI transaction" bitfld.long 0x0 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop SPI transaction" bitfld.long 0x4 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend SPI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume SPI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x40104000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x40104000 newline group.long 0x80++0x7 newline line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x40104000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x40104000 newline group.long 0x100++0xB newline line.long 0x0 "EVENTS_STARTED,SPI transaction has started" bitfld.long 0x0 0. "EVENTS_STARTED,SPI transaction has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,SPI transaction has stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,End of RXD buffer and TXD buffer reached" bitfld.long 0x8 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x40104000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x40104000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x40104000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x40104000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[3] and task DMA.RX.DISABLEMATCH[3]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[2] and task DMA.RX.DISABLEMATCH[2]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[1] and task DMA.RX.DISABLEMATCH[1]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[0] and task DMA.RX.DISABLEMATCH[0]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPIM" group.long 0x52C++0x3 line.long 0x0 "PRESCALER,The prescaler is used to set the SPI frequency." hexmask.long.byte 0x0 0.--6. 1. "DIVISOR,Core clock to SCK divisor" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" tree "IFTIMING" base ad:0x40104000 group.long 0x0++0x7 line.long 0x0 "RXDELAY,Sample delay for input serial data on SDI" bitfld.long 0x0 0.--2. "RXDELAY,Sample delay for input serial data on SDI. The value specifies the number of SPIM core clock cycles delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0 trailing edge for CONFIG.CPHA = 1) until the input serial data is.." "0,1,2,3,4,5,6,7" line.long 0x4 "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used. this is also the minimum duration CSN must stay high between transactions." hexmask.long.byte 0x4 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used this is the minimum duration CSN must stay high between transactions. The value is specified in number of SPIM core clock cycles." tree.end base ad:0x40104000 newline group.long 0x5B4++0x7 newline line.long 0x0 "DCXCNT,DCX configuration" hexmask.long.byte 0x0 0.--3. 1. "DCXCNT,This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes." line.long 0x4 "CSNPOL,Polarity of CSN output" bitfld.long 0x4 0. "CSNPOL_0,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)" group.long 0x5C0++0x3 line.long 0x0 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT" hexmask.long.byte 0x0 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT." tree "DMA" base ad:0x40104000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x40104000 group.long 0x0++0x13 line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MOSI,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MISO,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "DCX,Pin select for DCX signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" line.long 0x10 "CSN,Pin select for CSN" bitfld.long 0x10 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x10 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIM30_S" base ad:0x50104000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start SPI transaction" bitfld.long 0x0 0. "TASKS_START,Start SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop SPI transaction" bitfld.long 0x4 0. "TASKS_STOP,Stop SPI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend SPI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend SPI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume SPI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume SPI transaction" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x50104000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x50104000 newline group.long 0x80++0x7 newline line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x50104000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x50104000 newline group.long 0x100++0xB newline line.long 0x0 "EVENTS_STARTED,SPI transaction has started" bitfld.long 0x0 0. "EVENTS_STARTED,SPI transaction has started" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,SPI transaction has stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,SPI transaction has stopped" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_END,End of RXD buffer and TXD buffer reached" bitfld.long 0x8 0. "EVENTS_END,End of RXD buffer and TXD buffer reached" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x50104000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x50104000 newline group.long 0x180++0xB newline line.long 0x0 "PUBLISH_STARTED,Publish configuration for event STARTED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STARTED will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" line.long 0x8 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" tree "PUBLISH_DMA" base ad:0x50104000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x50104000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[3] and task DMA.RX.DISABLEMATCH[3]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[2] and task DMA.RX.DISABLEMATCH[2]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[1] and task DMA.RX.DISABLEMATCH[1]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[0] and task DMA.RX.DISABLEMATCH[0]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "END_START,Shortcut between event END and task START" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 2. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 0. "STARTED,Write '1' to enable interrupt for event STARTED" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 2. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 0. "STARTED,Write '1' to disable interrupt for event STARTED" "0: Read: Disabled,1: Disable" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPIM" group.long 0x52C++0x3 line.long 0x0 "PRESCALER,The prescaler is used to set the SPI frequency." hexmask.long.byte 0x0 0.--6. 1. "DIVISOR,Core clock to SCK divisor" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" tree "IFTIMING" base ad:0x50104000 group.long 0x0++0x7 line.long 0x0 "RXDELAY,Sample delay for input serial data on SDI" bitfld.long 0x0 0.--2. "RXDELAY,Sample delay for input serial data on SDI. The value specifies the number of SPIM core clock cycles delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0 trailing edge for CONFIG.CPHA = 1) until the input serial data is.." "0,1,2,3,4,5,6,7" line.long 0x4 "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used. this is also the minimum duration CSN must stay high between transactions." hexmask.long.byte 0x4 0.--7. 1. "CSNDUR,Minimum duration between edge of CSN and edge of SCK. When SHORTS.END_START is used this is the minimum duration CSN must stay high between transactions. The value is specified in number of SPIM core clock cycles." tree.end base ad:0x50104000 newline group.long 0x5B4++0x7 newline line.long 0x0 "DCXCNT,DCX configuration" hexmask.long.byte 0x0 0.--3. 1. "DCXCNT,This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes." line.long 0x4 "CSNPOL,Polarity of CSN output" bitfld.long 0x4 0. "CSNPOL_0,Polarity of CSN output" "0: Active low (idle state high),1: Active high (idle state low)" group.long 0x5C0++0x3 line.long 0x0 "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT" hexmask.long.byte 0x0 0.--7. 1. "ORC,Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT." tree "DMA" base ad:0x50104000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x14++0x3 line.long 0x0 "LIST,EasyDMA list type" bitfld.long 0x0 0.--2. "TYPE,List type" "0: Disable EasyDMA list,1: Use array list,?,?,?,?,?,?" group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x50104000 group.long 0x0++0x13 line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MOSI,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MISO,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "DCX,Pin select for DCX signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" line.long 0x10 "CSN,Pin select for CSN" bitfld.long 0x10 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x10 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 0.--4. 1. "PIN,Pin number" tree.end tree.end tree.end tree "SPIS (Serial Peripheral Interface - Slave)" base ad:0x0 tree "GLOBAL_SPIS00_NS" base ad:0x4004A000 wgroup.long 0x14++0x7 line.long 0x0 "TASKS_ACQUIRE,Acquire SPI semaphore" bitfld.long 0x0 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task" line.long 0x4 "TASKS_RELEASE,Release SPI semaphore. enabling the SPI slave to acquire it" bitfld.long 0x4 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task" tree "EVENTS_DMA" base ad:0x4004A14C tree "RX (Peripheral events.)" group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end tree "PUBLISH_DMA" base ad:0x4004A1CC tree "RX (Publish configuration for events)" group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end tree "SUBSCRIBE_DMA" base ad:0x4004A0A8 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end tree "TASKS_DMA" base ad:0x4004A028 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x4004A000 newline group.long 0x94++0x7 newline line.long 0x0 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to" line.long 0x4 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_END,Granted transaction completed" bitfld.long 0x0 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated" group.long 0x118++0x3 line.long 0x0 "EVENTS_ACQUIRED,Semaphore acquired" bitfld.long 0x0 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated" group.long 0x184++0x3 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" group.long 0x198++0x3 line.long 0x0 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 6. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "SEMSTAT,Semaphore status register" bitfld.long 0x0 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover to.." group.long 0x440++0x3 line.long 0x0 "STATUS,Status from last transaction" bitfld.long 0x0 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" newline bitfld.long 0x0 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPI slave" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPI slave" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" group.long 0x55C++0x3 line.long 0x0 "DEF,Default character. Character clocked out in case of an ignored transaction." hexmask.long.byte 0x0 0.--7. 1. "DEF,Default character. Character clocked out in case of an ignored transaction." group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character" hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character clocked out after an over-read of the transmit buffer." tree "DMA" base ad:0x4004A700 tree "RX (Unspecified)" group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x4004A600 group.long 0x0++0xB line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MISO,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MOSI,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" group.long 0x10++0x3 line.long 0x0 "CSN,Pin select for CSN signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIS00_S" base ad:0x5004A000 wgroup.long 0x14++0x7 line.long 0x0 "TASKS_ACQUIRE,Acquire SPI semaphore" bitfld.long 0x0 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task" line.long 0x4 "TASKS_RELEASE,Release SPI semaphore. enabling the SPI slave to acquire it" bitfld.long 0x4 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task" tree "EVENTS_DMA" base ad:0x5004A000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end tree "PUBLISH_DMA" base ad:0x5004A000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end tree "SUBSCRIBE_DMA" base ad:0x5004A000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end tree "TASKS_DMA" base ad:0x5004A000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x5004A000 newline group.long 0x94++0x7 newline line.long 0x0 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to" line.long 0x4 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_END,Granted transaction completed" bitfld.long 0x0 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated" group.long 0x118++0x3 line.long 0x0 "EVENTS_ACQUIRED,Semaphore acquired" bitfld.long 0x0 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated" group.long 0x184++0x3 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" group.long 0x198++0x3 line.long 0x0 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 6. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "SEMSTAT,Semaphore status register" bitfld.long 0x0 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover to.." group.long 0x440++0x3 line.long 0x0 "STATUS,Status from last transaction" bitfld.long 0x0 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" newline bitfld.long 0x0 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPI slave" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPI slave" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" group.long 0x55C++0x3 line.long 0x0 "DEF,Default character. Character clocked out in case of an ignored transaction." hexmask.long.byte 0x0 0.--7. 1. "DEF,Default character. Character clocked out in case of an ignored transaction." group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character" hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character clocked out after an over-read of the transmit buffer." tree "DMA" base ad:0x5004A000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x5004A000 group.long 0x0++0xB line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MISO,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MOSI,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" group.long 0x10++0x3 line.long 0x0 "CSN,Pin select for CSN signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIS20_NS" base ad:0x400C6000 wgroup.long 0x14++0x7 line.long 0x0 "TASKS_ACQUIRE,Acquire SPI semaphore" bitfld.long 0x0 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task" line.long 0x4 "TASKS_RELEASE,Release SPI semaphore. enabling the SPI slave to acquire it" bitfld.long 0x4 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task" tree "EVENTS_DMA" base ad:0x400C6000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end tree "PUBLISH_DMA" base ad:0x400C6000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end tree "SUBSCRIBE_DMA" base ad:0x400C6000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end tree "TASKS_DMA" base ad:0x400C6000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x400C6000 newline group.long 0x94++0x7 newline line.long 0x0 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to" line.long 0x4 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_END,Granted transaction completed" bitfld.long 0x0 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated" group.long 0x118++0x3 line.long 0x0 "EVENTS_ACQUIRED,Semaphore acquired" bitfld.long 0x0 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated" group.long 0x184++0x3 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" group.long 0x198++0x3 line.long 0x0 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 6. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "SEMSTAT,Semaphore status register" bitfld.long 0x0 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover to.." group.long 0x440++0x3 line.long 0x0 "STATUS,Status from last transaction" bitfld.long 0x0 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" newline bitfld.long 0x0 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPI slave" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPI slave" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" group.long 0x55C++0x3 line.long 0x0 "DEF,Default character. Character clocked out in case of an ignored transaction." hexmask.long.byte 0x0 0.--7. 1. "DEF,Default character. Character clocked out in case of an ignored transaction." group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character" hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character clocked out after an over-read of the transmit buffer." tree "DMA" base ad:0x400C6000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C6000 group.long 0x0++0xB line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MISO,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MOSI,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" group.long 0x10++0x3 line.long 0x0 "CSN,Pin select for CSN signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIS20_S" base ad:0x500C6000 wgroup.long 0x14++0x7 line.long 0x0 "TASKS_ACQUIRE,Acquire SPI semaphore" bitfld.long 0x0 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task" line.long 0x4 "TASKS_RELEASE,Release SPI semaphore. enabling the SPI slave to acquire it" bitfld.long 0x4 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task" tree "EVENTS_DMA" base ad:0x500C6000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end tree "PUBLISH_DMA" base ad:0x500C6000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end tree "SUBSCRIBE_DMA" base ad:0x500C6000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end tree "TASKS_DMA" base ad:0x500C6000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x500C6000 newline group.long 0x94++0x7 newline line.long 0x0 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to" line.long 0x4 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_END,Granted transaction completed" bitfld.long 0x0 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated" group.long 0x118++0x3 line.long 0x0 "EVENTS_ACQUIRED,Semaphore acquired" bitfld.long 0x0 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated" group.long 0x184++0x3 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" group.long 0x198++0x3 line.long 0x0 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 6. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "SEMSTAT,Semaphore status register" bitfld.long 0x0 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover to.." group.long 0x440++0x3 line.long 0x0 "STATUS,Status from last transaction" bitfld.long 0x0 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" newline bitfld.long 0x0 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPI slave" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPI slave" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" group.long 0x55C++0x3 line.long 0x0 "DEF,Default character. Character clocked out in case of an ignored transaction." hexmask.long.byte 0x0 0.--7. 1. "DEF,Default character. Character clocked out in case of an ignored transaction." group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character" hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character clocked out after an over-read of the transmit buffer." tree "DMA" base ad:0x500C6000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C6000 group.long 0x0++0xB line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MISO,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MOSI,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" group.long 0x10++0x3 line.long 0x0 "CSN,Pin select for CSN signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIS21_NS" base ad:0x400C7000 wgroup.long 0x14++0x7 line.long 0x0 "TASKS_ACQUIRE,Acquire SPI semaphore" bitfld.long 0x0 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task" line.long 0x4 "TASKS_RELEASE,Release SPI semaphore. enabling the SPI slave to acquire it" bitfld.long 0x4 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task" tree "EVENTS_DMA" base ad:0x400C7000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end tree "PUBLISH_DMA" base ad:0x400C7000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end tree "SUBSCRIBE_DMA" base ad:0x400C7000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end tree "TASKS_DMA" base ad:0x400C7000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x400C7000 newline group.long 0x94++0x7 newline line.long 0x0 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to" line.long 0x4 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_END,Granted transaction completed" bitfld.long 0x0 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated" group.long 0x118++0x3 line.long 0x0 "EVENTS_ACQUIRED,Semaphore acquired" bitfld.long 0x0 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated" group.long 0x184++0x3 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" group.long 0x198++0x3 line.long 0x0 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 6. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "SEMSTAT,Semaphore status register" bitfld.long 0x0 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover to.." group.long 0x440++0x3 line.long 0x0 "STATUS,Status from last transaction" bitfld.long 0x0 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" newline bitfld.long 0x0 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPI slave" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPI slave" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" group.long 0x55C++0x3 line.long 0x0 "DEF,Default character. Character clocked out in case of an ignored transaction." hexmask.long.byte 0x0 0.--7. 1. "DEF,Default character. Character clocked out in case of an ignored transaction." group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character" hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character clocked out after an over-read of the transmit buffer." tree "DMA" base ad:0x400C7000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C7000 group.long 0x0++0xB line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MISO,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MOSI,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" group.long 0x10++0x3 line.long 0x0 "CSN,Pin select for CSN signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIS21_S" base ad:0x500C7000 wgroup.long 0x14++0x7 line.long 0x0 "TASKS_ACQUIRE,Acquire SPI semaphore" bitfld.long 0x0 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task" line.long 0x4 "TASKS_RELEASE,Release SPI semaphore. enabling the SPI slave to acquire it" bitfld.long 0x4 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task" tree "EVENTS_DMA" base ad:0x500C7000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end tree "PUBLISH_DMA" base ad:0x500C7000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end tree "SUBSCRIBE_DMA" base ad:0x500C7000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end tree "TASKS_DMA" base ad:0x500C7000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x500C7000 newline group.long 0x94++0x7 newline line.long 0x0 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to" line.long 0x4 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_END,Granted transaction completed" bitfld.long 0x0 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated" group.long 0x118++0x3 line.long 0x0 "EVENTS_ACQUIRED,Semaphore acquired" bitfld.long 0x0 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated" group.long 0x184++0x3 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" group.long 0x198++0x3 line.long 0x0 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 6. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "SEMSTAT,Semaphore status register" bitfld.long 0x0 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover to.." group.long 0x440++0x3 line.long 0x0 "STATUS,Status from last transaction" bitfld.long 0x0 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" newline bitfld.long 0x0 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPI slave" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPI slave" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" group.long 0x55C++0x3 line.long 0x0 "DEF,Default character. Character clocked out in case of an ignored transaction." hexmask.long.byte 0x0 0.--7. 1. "DEF,Default character. Character clocked out in case of an ignored transaction." group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character" hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character clocked out after an over-read of the transmit buffer." tree "DMA" base ad:0x500C7000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C7000 group.long 0x0++0xB line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MISO,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MOSI,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" group.long 0x10++0x3 line.long 0x0 "CSN,Pin select for CSN signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIS22_NS" base ad:0x400C8000 wgroup.long 0x14++0x7 line.long 0x0 "TASKS_ACQUIRE,Acquire SPI semaphore" bitfld.long 0x0 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task" line.long 0x4 "TASKS_RELEASE,Release SPI semaphore. enabling the SPI slave to acquire it" bitfld.long 0x4 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task" tree "EVENTS_DMA" base ad:0x400C8000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end tree "PUBLISH_DMA" base ad:0x400C8000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end tree "SUBSCRIBE_DMA" base ad:0x400C8000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end tree "TASKS_DMA" base ad:0x400C8000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x400C8000 newline group.long 0x94++0x7 newline line.long 0x0 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to" line.long 0x4 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_END,Granted transaction completed" bitfld.long 0x0 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated" group.long 0x118++0x3 line.long 0x0 "EVENTS_ACQUIRED,Semaphore acquired" bitfld.long 0x0 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated" group.long 0x184++0x3 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" group.long 0x198++0x3 line.long 0x0 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 6. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "SEMSTAT,Semaphore status register" bitfld.long 0x0 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover to.." group.long 0x440++0x3 line.long 0x0 "STATUS,Status from last transaction" bitfld.long 0x0 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" newline bitfld.long 0x0 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPI slave" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPI slave" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" group.long 0x55C++0x3 line.long 0x0 "DEF,Default character. Character clocked out in case of an ignored transaction." hexmask.long.byte 0x0 0.--7. 1. "DEF,Default character. Character clocked out in case of an ignored transaction." group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character" hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character clocked out after an over-read of the transmit buffer." tree "DMA" base ad:0x400C8000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C8000 group.long 0x0++0xB line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MISO,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MOSI,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" group.long 0x10++0x3 line.long 0x0 "CSN,Pin select for CSN signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIS22_S" base ad:0x500C8000 wgroup.long 0x14++0x7 line.long 0x0 "TASKS_ACQUIRE,Acquire SPI semaphore" bitfld.long 0x0 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task" line.long 0x4 "TASKS_RELEASE,Release SPI semaphore. enabling the SPI slave to acquire it" bitfld.long 0x4 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task" tree "EVENTS_DMA" base ad:0x500C8000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end tree "PUBLISH_DMA" base ad:0x500C8000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end tree "SUBSCRIBE_DMA" base ad:0x500C8000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end tree "TASKS_DMA" base ad:0x500C8000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x500C8000 newline group.long 0x94++0x7 newline line.long 0x0 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to" line.long 0x4 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_END,Granted transaction completed" bitfld.long 0x0 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated" group.long 0x118++0x3 line.long 0x0 "EVENTS_ACQUIRED,Semaphore acquired" bitfld.long 0x0 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated" group.long 0x184++0x3 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" group.long 0x198++0x3 line.long 0x0 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 6. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "SEMSTAT,Semaphore status register" bitfld.long 0x0 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover to.." group.long 0x440++0x3 line.long 0x0 "STATUS,Status from last transaction" bitfld.long 0x0 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" newline bitfld.long 0x0 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPI slave" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPI slave" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" group.long 0x55C++0x3 line.long 0x0 "DEF,Default character. Character clocked out in case of an ignored transaction." hexmask.long.byte 0x0 0.--7. 1. "DEF,Default character. Character clocked out in case of an ignored transaction." group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character" hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character clocked out after an over-read of the transmit buffer." tree "DMA" base ad:0x500C8000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C8000 group.long 0x0++0xB line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MISO,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MOSI,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" group.long 0x10++0x3 line.long 0x0 "CSN,Pin select for CSN signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIS30_NS" base ad:0x40104000 wgroup.long 0x14++0x7 line.long 0x0 "TASKS_ACQUIRE,Acquire SPI semaphore" bitfld.long 0x0 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task" line.long 0x4 "TASKS_RELEASE,Release SPI semaphore. enabling the SPI slave to acquire it" bitfld.long 0x4 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task" tree "EVENTS_DMA" base ad:0x40104000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end tree "PUBLISH_DMA" base ad:0x40104000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end tree "SUBSCRIBE_DMA" base ad:0x40104000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end tree "TASKS_DMA" base ad:0x40104000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x40104000 newline group.long 0x94++0x7 newline line.long 0x0 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to" line.long 0x4 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_END,Granted transaction completed" bitfld.long 0x0 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated" group.long 0x118++0x3 line.long 0x0 "EVENTS_ACQUIRED,Semaphore acquired" bitfld.long 0x0 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated" group.long 0x184++0x3 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" group.long 0x198++0x3 line.long 0x0 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 6. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "SEMSTAT,Semaphore status register" bitfld.long 0x0 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover to.." group.long 0x440++0x3 line.long 0x0 "STATUS,Status from last transaction" bitfld.long 0x0 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" newline bitfld.long 0x0 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPI slave" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPI slave" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" group.long 0x55C++0x3 line.long 0x0 "DEF,Default character. Character clocked out in case of an ignored transaction." hexmask.long.byte 0x0 0.--7. 1. "DEF,Default character. Character clocked out in case of an ignored transaction." group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character" hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character clocked out after an over-read of the transmit buffer." tree "DMA" base ad:0x40104000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x40104000 group.long 0x0++0xB line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MISO,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MOSI,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" group.long 0x10++0x3 line.long 0x0 "CSN,Pin select for CSN signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_SPIS30_S" base ad:0x50104000 wgroup.long 0x14++0x7 line.long 0x0 "TASKS_ACQUIRE,Acquire SPI semaphore" bitfld.long 0x0 0. "TASKS_ACQUIRE,Acquire SPI semaphore" "?,1: Trigger task" line.long 0x4 "TASKS_RELEASE,Release SPI semaphore. enabling the SPI slave to acquire it" bitfld.long 0x4 0. "TASKS_RELEASE,Release SPI semaphore enabling the SPI slave to acquire it" "?,1: Trigger task" tree "EVENTS_DMA" base ad:0x50104000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end tree "PUBLISH_DMA" base ad:0x50104000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end tree "SUBSCRIBE_DMA" base ad:0x50104000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end tree "TASKS_DMA" base ad:0x50104000 tree "RX (Peripheral tasks.)" base ad:0x4004A030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x50104000 newline group.long 0x94++0x7 newline line.long 0x0 "SUBSCRIBE_ACQUIRE,Subscribe configuration for task ACQUIRE" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ACQUIRE will subscribe to" line.long 0x4 "SUBSCRIBE_RELEASE,Subscribe configuration for task RELEASE" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" newline hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RELEASE will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_END,Granted transaction completed" bitfld.long 0x0 0. "EVENTS_END,Granted transaction completed" "0: Event not generated,1: Event generated" group.long 0x118++0x3 line.long 0x0 "EVENTS_ACQUIRED,Semaphore acquired" bitfld.long 0x0 0. "EVENTS_ACQUIRED,Semaphore acquired" "0: Event not generated,1: Event generated" group.long 0x184++0x3 line.long 0x0 "PUBLISH_END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" group.long 0x198++0x3 line.long 0x0 "PUBLISH_ACQUIRED,Publish configuration for event ACQUIRED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" newline hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ACQUIRED will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 2. "END_ACQUIRE,Shortcut between event END and task ACQUIRE" "0: Disable shortcut,1: Enable shortcut" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 6. "ACQUIRED,Write '1' to enable interrupt for event ACQUIRED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x0 1. "END,Write '1' to enable interrupt for event END" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 6. "ACQUIRED,Write '1' to disable interrupt for event ACQUIRED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x4 1. "END,Write '1' to disable interrupt for event END" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x3 line.long 0x0 "SEMSTAT,Semaphore status register" bitfld.long 0x0 0.--1. "SEMSTAT,Semaphore status" "0: Semaphore is free,1: Semaphore is assigned to CPU,2: Semaphore is assigned to SPI slave,3: Semaphore is assigned to SPI but a handover to.." group.long 0x440++0x3 line.long 0x0 "STATUS,Status from last transaction" bitfld.long 0x0 1. "OVERFLOW,RX buffer overflow detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" newline bitfld.long 0x0 0. "OVERREAD,TX buffer over-read detected and prevented" "0: Read: error not present,1: Write: clear error on writing '1'" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable SPI slave" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable SPI slave" group.long 0x554++0x3 line.long 0x0 "CONFIG,Configuration register" bitfld.long 0x0 2. "CPOL,Serial clock (SCK) polarity" "0: Active high,1: Active low" newline bitfld.long 0x0 1. "CPHA,Serial clock (SCK) phase" "0: Sample on leading edge of clock shift serial..,1: Sample on trailing edge of clock shift serial.." newline bitfld.long 0x0 0. "ORDER,Bit order" "0: Most significant bit shifted out first,1: Least significant bit shifted out first" group.long 0x55C++0x3 line.long 0x0 "DEF,Default character. Character clocked out in case of an ignored transaction." hexmask.long.byte 0x0 0.--7. 1. "DEF,Default character. Character clocked out in case of an ignored transaction." group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character" hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character clocked out after an over-read of the transmit buffer." tree "DMA" base ad:0x50104000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x50104000 group.long 0x0++0xB line.long 0x0 "SCK,Pin select for SCK" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "MISO,Pin select for SDO signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "MOSI,Pin select for SDI signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" group.long 0x10++0x3 line.long 0x0 "CSN,Pin select for CSN signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" tree.end tree.end tree.end tree "SPU (System Protection Unit)" base ad:0x0 tree "GLOBAL_SPU00_S" base ad:0x50040000 group.long 0x100++0x3 line.long 0x0 "EVENTS_PERIPHACCERR,A security violation has been detected on one or several peripherals" bitfld.long 0x0 0. "EVENTS_PERIPHACCERR,A security violation has been detected on one or several peripherals" "0: Event not generated,1: Event generated" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 0. "PERIPHACCERR,Enable or disable interrupt for event PERIPHACCERR" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 0. "PERIPHACCERR,Write '1' to enable interrupt for event PERIPHACCERR" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 0. "PERIPHACCERR,Write '1' to disable interrupt for event PERIPHACCERR" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 0. "PERIPHACCERR,Read pending status of interrupt for event PERIPHACCERR" "0: Read: Not pending,1: Read: Pending" tree "PERIPHACCERR" base ad:0x50040404 rgroup.long 0x0++0x3 line.long 0x0 "ADDRESS,Address of the transaction that caused first error." hexmask.long.word 0x0 0.--15. 1. "ADDRESS,Address" tree.end repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x50040500 ad:0x50040504 ad:0x50040508 ad:0x5004050C ad:0x50040510 ad:0x50040514 ad:0x50040518 ad:0x5004051C ad:0x50040520 ad:0x50040524 ad:0x50040528 ad:0x5004052C ad:0x50040530 ad:0x50040534 ad:0x50040538 ad:0x5004053C) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end repeat 16. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F)(list ad:0x50040540 ad:0x50040544 ad:0x50040548 ad:0x5004054C ad:0x50040550 ad:0x50040554 ad:0x50040558 ad:0x5004055C ad:0x50040560 ad:0x50040564 ad:0x50040568 ad:0x5004056C ad:0x50040570 ad:0x50040574 ad:0x50040578 ad:0x5004057C) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end repeat 16. (list 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F)(list ad:0x50040580 ad:0x50040584 ad:0x50040588 ad:0x5004058C ad:0x50040590 ad:0x50040594 ad:0x50040598 ad:0x5004059C ad:0x500405A0 ad:0x500405A4 ad:0x500405A8 ad:0x500405AC ad:0x500405B0 ad:0x500405B4 ad:0x500405B8 ad:0x500405BC) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end repeat 16. (list 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F)(list ad:0x500405C0 ad:0x500405C4 ad:0x500405C8 ad:0x500405CC ad:0x500405D0 ad:0x500405D4 ad:0x500405D8 ad:0x500405DC ad:0x500405E0 ad:0x500405E4 ad:0x500405E8 ad:0x500405EC ad:0x500405F0 ad:0x500405F4 ad:0x500405F8 ad:0x500405FC) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end tree "FEATURE" base ad:0x50040600 tree "DPPIC (Unspecified)" base ad:0x50040680 repeat 24. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "CH[$1],Description collection: Configuration of features for channel n of DPPIC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "CHG[$1],Description collection: Configuration of features for channel group n of DPPIC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end repeat 2. (list 0x0 0x1)(list ad:0x50040700 ad:0x50040740) tree "GPIOTE[$1]" base $2 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "CH[$1],Description collection: Configuration of features for channel o of GPIOTE[n]" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x20)++0x3 line.long 0x0 "INTERRUPT[$1],Description collection: Configuration of features for interrupt o of GPIOTE[n]" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end repeat.end repeat 3. (list 0x0 0x1 0x2)(list ad:0x50040800 ad:0x50040880 ad:0x50040900) tree "GPIO[$1]" base $2 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "PIN[$1],Description collection: Configuration of features for GPIO[n] PIN[o]" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end repeat.end base ad:0x50040600 tree "CRACEN (Unspecified)" base ad:0x50040800 group.long 0x180++0x3 line.long 0x0 "SEED,Configuration for CRACEN SEED" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" tree.end tree "GRTC (Unspecified)" base ad:0x50040D00 repeat 24. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "CC[$1],Description collection: Configuration of features for CC n of GRTC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end group.long 0x74++0xB line.long 0x0 "PWMCONFIG,Configuration of feature for PWMCONFIG of GRTC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" line.long 0x4 "CLK,Configuration of features for CLKOUT/CLKCFG of GRTC" bitfld.long 0x4 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x4 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" line.long 0x8 "SYSCOUNTER,Configuration of features for SYSCOUNTERL/SYSCOUNTERH of GRTC" bitfld.long 0x8 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x8 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "INTERRUPT[$1],Description collection: Configuration of features for interrupt n of GRTC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end tree.end tree.end tree "GLOBAL_SPU10_S" base ad:0x50080000 group.long 0x100++0x3 line.long 0x0 "EVENTS_PERIPHACCERR,A security violation has been detected on one or several peripherals" bitfld.long 0x0 0. "EVENTS_PERIPHACCERR,A security violation has been detected on one or several peripherals" "0: Event not generated,1: Event generated" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 0. "PERIPHACCERR,Enable or disable interrupt for event PERIPHACCERR" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 0. "PERIPHACCERR,Write '1' to enable interrupt for event PERIPHACCERR" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 0. "PERIPHACCERR,Write '1' to disable interrupt for event PERIPHACCERR" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 0. "PERIPHACCERR,Read pending status of interrupt for event PERIPHACCERR" "0: Read: Not pending,1: Read: Pending" tree "PERIPHACCERR" base ad:0x50080000 rgroup.long 0x0++0x3 line.long 0x0 "ADDRESS,Address of the transaction that caused first error." hexmask.long.word 0x0 0.--15. 1. "ADDRESS,Address" tree.end repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x50080500 ad:0x50080504 ad:0x50080508 ad:0x5008050C ad:0x50080510 ad:0x50080514 ad:0x50080518 ad:0x5008051C ad:0x50080520 ad:0x50080524 ad:0x50080528 ad:0x5008052C ad:0x50080530 ad:0x50080534 ad:0x50080538 ad:0x5008053C) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end repeat 16. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F)(list ad:0x50080540 ad:0x50080544 ad:0x50080548 ad:0x5008054C ad:0x50080550 ad:0x50080554 ad:0x50080558 ad:0x5008055C ad:0x50080560 ad:0x50080564 ad:0x50080568 ad:0x5008056C ad:0x50080570 ad:0x50080574 ad:0x50080578 ad:0x5008057C) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end repeat 16. (list 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F)(list ad:0x50080580 ad:0x50080584 ad:0x50080588 ad:0x5008058C ad:0x50080590 ad:0x50080594 ad:0x50080598 ad:0x5008059C ad:0x500805A0 ad:0x500805A4 ad:0x500805A8 ad:0x500805AC ad:0x500805B0 ad:0x500805B4 ad:0x500805B8 ad:0x500805BC) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end repeat 16. (list 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F)(list ad:0x500805C0 ad:0x500805C4 ad:0x500805C8 ad:0x500805CC ad:0x500805D0 ad:0x500805D4 ad:0x500805D8 ad:0x500805DC ad:0x500805E0 ad:0x500805E4 ad:0x500805E8 ad:0x500805EC ad:0x500805F0 ad:0x500805F4 ad:0x500805F8 ad:0x500805FC) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end tree "FEATURE" base ad:0x50080000 tree "DPPIC (Unspecified)" base ad:0x50040680 repeat 24. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "CH[$1],Description collection: Configuration of features for channel n of DPPIC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "CHG[$1],Description collection: Configuration of features for channel group n of DPPIC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end repeat 2. (list 0x0 0x1)(list ad:0x50040700 ad:0x50040740) tree "GPIOTE[$1]" base $2 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "CH[$1],Description collection: Configuration of features for channel o of GPIOTE[n]" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x20)++0x3 line.long 0x0 "INTERRUPT[$1],Description collection: Configuration of features for interrupt o of GPIOTE[n]" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end repeat.end repeat 3. (list 0x0 0x1 0x2)(list ad:0x50040800 ad:0x50040880 ad:0x50040900) tree "GPIO[$1]" base $2 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "PIN[$1],Description collection: Configuration of features for GPIO[n] PIN[o]" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end repeat.end base ad:0x50080600 tree "CRACEN (Unspecified)" base ad:0x50040800 group.long 0x180++0x3 line.long 0x0 "SEED,Configuration for CRACEN SEED" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" tree.end tree "GRTC (Unspecified)" base ad:0x50040D00 repeat 24. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "CC[$1],Description collection: Configuration of features for CC n of GRTC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end group.long 0x74++0xB line.long 0x0 "PWMCONFIG,Configuration of feature for PWMCONFIG of GRTC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" line.long 0x4 "CLK,Configuration of features for CLKOUT/CLKCFG of GRTC" bitfld.long 0x4 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x4 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" line.long 0x8 "SYSCOUNTER,Configuration of features for SYSCOUNTERL/SYSCOUNTERH of GRTC" bitfld.long 0x8 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x8 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "INTERRUPT[$1],Description collection: Configuration of features for interrupt n of GRTC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end tree.end tree.end tree "GLOBAL_SPU20_S" base ad:0x500C0000 group.long 0x100++0x3 line.long 0x0 "EVENTS_PERIPHACCERR,A security violation has been detected on one or several peripherals" bitfld.long 0x0 0. "EVENTS_PERIPHACCERR,A security violation has been detected on one or several peripherals" "0: Event not generated,1: Event generated" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 0. "PERIPHACCERR,Enable or disable interrupt for event PERIPHACCERR" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 0. "PERIPHACCERR,Write '1' to enable interrupt for event PERIPHACCERR" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 0. "PERIPHACCERR,Write '1' to disable interrupt for event PERIPHACCERR" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 0. "PERIPHACCERR,Read pending status of interrupt for event PERIPHACCERR" "0: Read: Not pending,1: Read: Pending" tree "PERIPHACCERR" base ad:0x500C0000 rgroup.long 0x0++0x3 line.long 0x0 "ADDRESS,Address of the transaction that caused first error." hexmask.long.word 0x0 0.--15. 1. "ADDRESS,Address" tree.end repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x500C0500 ad:0x500C0504 ad:0x500C0508 ad:0x500C050C ad:0x500C0510 ad:0x500C0514 ad:0x500C0518 ad:0x500C051C ad:0x500C0520 ad:0x500C0524 ad:0x500C0528 ad:0x500C052C ad:0x500C0530 ad:0x500C0534 ad:0x500C0538 ad:0x500C053C) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end repeat 16. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F)(list ad:0x500C0540 ad:0x500C0544 ad:0x500C0548 ad:0x500C054C ad:0x500C0550 ad:0x500C0554 ad:0x500C0558 ad:0x500C055C ad:0x500C0560 ad:0x500C0564 ad:0x500C0568 ad:0x500C056C ad:0x500C0570 ad:0x500C0574 ad:0x500C0578 ad:0x500C057C) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end repeat 16. (list 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F)(list ad:0x500C0580 ad:0x500C0584 ad:0x500C0588 ad:0x500C058C ad:0x500C0590 ad:0x500C0594 ad:0x500C0598 ad:0x500C059C ad:0x500C05A0 ad:0x500C05A4 ad:0x500C05A8 ad:0x500C05AC ad:0x500C05B0 ad:0x500C05B4 ad:0x500C05B8 ad:0x500C05BC) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end repeat 16. (list 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F)(list ad:0x500C05C0 ad:0x500C05C4 ad:0x500C05C8 ad:0x500C05CC ad:0x500C05D0 ad:0x500C05D4 ad:0x500C05D8 ad:0x500C05DC ad:0x500C05E0 ad:0x500C05E4 ad:0x500C05E8 ad:0x500C05EC ad:0x500C05F0 ad:0x500C05F4 ad:0x500C05F8 ad:0x500C05FC) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end tree "FEATURE" base ad:0x500C0000 tree "DPPIC (Unspecified)" base ad:0x50040680 repeat 24. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "CH[$1],Description collection: Configuration of features for channel n of DPPIC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "CHG[$1],Description collection: Configuration of features for channel group n of DPPIC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end repeat 2. (list 0x0 0x1)(list ad:0x50040700 ad:0x50040740) tree "GPIOTE[$1]" base $2 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "CH[$1],Description collection: Configuration of features for channel o of GPIOTE[n]" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x20)++0x3 line.long 0x0 "INTERRUPT[$1],Description collection: Configuration of features for interrupt o of GPIOTE[n]" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end repeat.end repeat 3. (list 0x0 0x1 0x2)(list ad:0x50040800 ad:0x50040880 ad:0x50040900) tree "GPIO[$1]" base $2 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "PIN[$1],Description collection: Configuration of features for GPIO[n] PIN[o]" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end repeat.end base ad:0x500C0600 tree "CRACEN (Unspecified)" base ad:0x50040800 group.long 0x180++0x3 line.long 0x0 "SEED,Configuration for CRACEN SEED" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" tree.end tree "GRTC (Unspecified)" base ad:0x50040D00 repeat 24. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "CC[$1],Description collection: Configuration of features for CC n of GRTC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end group.long 0x74++0xB line.long 0x0 "PWMCONFIG,Configuration of feature for PWMCONFIG of GRTC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" line.long 0x4 "CLK,Configuration of features for CLKOUT/CLKCFG of GRTC" bitfld.long 0x4 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x4 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" line.long 0x8 "SYSCOUNTER,Configuration of features for SYSCOUNTERL/SYSCOUNTERH of GRTC" bitfld.long 0x8 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x8 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "INTERRUPT[$1],Description collection: Configuration of features for interrupt n of GRTC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end tree.end tree.end tree "GLOBAL_SPU30_S" base ad:0x50100000 group.long 0x100++0x3 line.long 0x0 "EVENTS_PERIPHACCERR,A security violation has been detected on one or several peripherals" bitfld.long 0x0 0. "EVENTS_PERIPHACCERR,A security violation has been detected on one or several peripherals" "0: Event not generated,1: Event generated" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 0. "PERIPHACCERR,Enable or disable interrupt for event PERIPHACCERR" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 0. "PERIPHACCERR,Write '1' to enable interrupt for event PERIPHACCERR" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 0. "PERIPHACCERR,Write '1' to disable interrupt for event PERIPHACCERR" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 0. "PERIPHACCERR,Read pending status of interrupt for event PERIPHACCERR" "0: Read: Not pending,1: Read: Pending" tree "PERIPHACCERR" base ad:0x50100000 rgroup.long 0x0++0x3 line.long 0x0 "ADDRESS,Address of the transaction that caused first error." hexmask.long.word 0x0 0.--15. 1. "ADDRESS,Address" tree.end repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x50100500 ad:0x50100504 ad:0x50100508 ad:0x5010050C ad:0x50100510 ad:0x50100514 ad:0x50100518 ad:0x5010051C ad:0x50100520 ad:0x50100524 ad:0x50100528 ad:0x5010052C ad:0x50100530 ad:0x50100534 ad:0x50100538 ad:0x5010053C) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end repeat 16. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F)(list ad:0x50100540 ad:0x50100544 ad:0x50100548 ad:0x5010054C ad:0x50100550 ad:0x50100554 ad:0x50100558 ad:0x5010055C ad:0x50100560 ad:0x50100564 ad:0x50100568 ad:0x5010056C ad:0x50100570 ad:0x50100574 ad:0x50100578 ad:0x5010057C) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end repeat 16. (list 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F)(list ad:0x50100580 ad:0x50100584 ad:0x50100588 ad:0x5010058C ad:0x50100590 ad:0x50100594 ad:0x50100598 ad:0x5010059C ad:0x501005A0 ad:0x501005A4 ad:0x501005A8 ad:0x501005AC ad:0x501005B0 ad:0x501005B4 ad:0x501005B8 ad:0x501005BC) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end repeat 16. (list 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F)(list ad:0x501005C0 ad:0x501005C4 ad:0x501005C8 ad:0x501005CC ad:0x501005D0 ad:0x501005D4 ad:0x501005D8 ad:0x501005DC ad:0x501005E0 ad:0x501005E4 ad:0x501005E8 ad:0x501005EC ad:0x501005F0 ad:0x501005F4 ad:0x501005F8 ad:0x501005FC) tree "PERIPH[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "PERM,Description cluster: Get and set the applicable access permissions for the peripheral slave index n" rbitfld.long 0x0 31. "PRESENT,Indicates if a peripheral is present with peripheral slave index n" "0: Peripheral is not present,1: Peripheral is present" bitfld.long 0x0 8. "LOCK,Register lock" "0: This register can be updated,1: The content of this register can not be changed.." newline bitfld.long 0x0 5. "DMASEC,Security attribution for the DMA transfer" "0: DMA transfers initiated by this peripheral have..,1: DMA transfers initiated by this peripheral have.." bitfld.long 0x0 4. "SECATTR,Peripheral security mapping" "0: If SECUREMAPPING == UserSelectable: Peripheral..,1: Peripheral is mapped in secure peripheral.." newline rbitfld.long 0x0 2.--3. "DMA,Read the peripheral DMA capabilities" "0: Peripheral has no DMA capability,1: Peripheral has DMA and DMA transfers always have..,2: Peripheral has DMA and DMA transfers can have a..,?" rbitfld.long 0x0 0.--1. "SECUREMAPPING,Read capabilities for TrustZone Cortex-M secure attribute" "0: This peripheral is always accessible as a..,1: This peripheral is always accessible as a secure..,2: Non-secure or secure attribute for this..,3: This peripheral implements the split security.." tree.end repeat.end tree "FEATURE" base ad:0x50100000 tree "DPPIC (Unspecified)" base ad:0x50040680 repeat 24. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "CH[$1],Description collection: Configuration of features for channel n of DPPIC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x60)++0x3 line.long 0x0 "CHG[$1],Description collection: Configuration of features for channel group n of DPPIC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end repeat 2. (list 0x0 0x1)(list ad:0x50040700 ad:0x50040740) tree "GPIOTE[$1]" base $2 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "CH[$1],Description collection: Configuration of features for channel o of GPIOTE[n]" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x20)++0x3 line.long 0x0 "INTERRUPT[$1],Description collection: Configuration of features for interrupt o of GPIOTE[n]" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end repeat.end repeat 3. (list 0x0 0x1 0x2)(list ad:0x50040800 ad:0x50040880 ad:0x50040900) tree "GPIO[$1]" base $2 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "PIN[$1],Description collection: Configuration of features for GPIO[n] PIN[o]" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end repeat.end base ad:0x50100600 tree "CRACEN (Unspecified)" base ad:0x50040800 group.long 0x180++0x3 line.long 0x0 "SEED,Configuration for CRACEN SEED" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" tree.end tree "GRTC (Unspecified)" base ad:0x50040D00 repeat 24. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "CC[$1],Description collection: Configuration of features for CC n of GRTC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end group.long 0x74++0xB line.long 0x0 "PWMCONFIG,Configuration of feature for PWMCONFIG of GRTC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" line.long 0x4 "CLK,Configuration of features for CLKOUT/CLKCFG of GRTC" bitfld.long 0x4 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x4 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" line.long 0x8 "SYSCOUNTER,Configuration of features for SYSCOUNTERL/SYSCOUNTERH of GRTC" bitfld.long 0x8 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x8 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "INTERRUPT[$1],Description collection: Configuration of features for interrupt n of GRTC" bitfld.long 0x0 8. "LOCK,LOCK feature" "0: Feature permissions can be updated,1: Feature permissions can not be changed until the.." bitfld.long 0x0 4. "SECATTR,SECATTR feature" "0: Feature is available for non-secure usage,1: Feature is reserved for secure usage" repeat.end tree.end tree.end tree.end tree.end tree "SWI (Software Interrupt)" base ad:0x0 tree "SWI00_S" base ad:0x5001C000 rgroup.long 0x0++0x3 line.long 0x0 "UNUSED,Unused." tree.end tree "SWI01_S" base ad:0x5001D000 rgroup.long 0x0++0x3 line.long 0x0 "UNUSED,Unused." tree.end tree "SWI02_S" base ad:0x5001E000 rgroup.long 0x0++0x3 line.long 0x0 "UNUSED,Unused." tree.end tree "SWI03_S" base ad:0x5001F000 rgroup.long 0x0++0x3 line.long 0x0 "UNUSED,Unused." tree.end tree.end tree "TAD (Trace and Debug Control)" base ad:0x0 tree "GLOBAL_TAD_NS" base ad:0x40053000 group.long 0x400++0x7 line.long 0x0 "SYSPWRUPREQ,System power-up request" bitfld.long 0x0 0. "ACTIVE,Activate power-up request" "0: Power-up request not active,1: Power-up request active" line.long 0x4 "DBGPWRUPREQ,Debug power-up request" bitfld.long 0x4 0. "ACTIVE,Activate power-up request" "0: Power-up request not active,1: Power-up request active" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable debug domain and aquire selected GPIOs" bitfld.long 0x0 0. "ENABLE" "0: Disable debug domain and release selected GPIOs,1: Enable debug domain and aquire selected GPIOs" group.long 0x518++0x3 line.long 0x0 "TRACEPORTSPEED,Trace port speed" bitfld.long 0x0 0.--1. "TRACEPORTSPEED,Trace port speed is divided from CPU clock. The TRACECLK pin output will be divided again by two from the trace port clock." "0: Trace port speed equals CPU clock,1: Trace port speed equals CPU clock divided by 2,2: Trace port speed equals CPU clock divided by 4,3: Trace port speed equals CPU clock divided by 32" group.long 0x520++0x3 line.long 0x0 "TINSTANCE,SW-DP Target instance" hexmask.long.byte 0x0 0.--3. 1. "TINSTANCE,TINSTANCE bits are used in the SW-DP DLPIDR.TINSTANCE field." tree.end tree "GLOBAL_TAD_S" base ad:0x50053000 group.long 0x400++0x7 line.long 0x0 "SYSPWRUPREQ,System power-up request" bitfld.long 0x0 0. "ACTIVE,Activate power-up request" "0: Power-up request not active,1: Power-up request active" line.long 0x4 "DBGPWRUPREQ,Debug power-up request" bitfld.long 0x4 0. "ACTIVE,Activate power-up request" "0: Power-up request not active,1: Power-up request active" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable debug domain and aquire selected GPIOs" bitfld.long 0x0 0. "ENABLE" "0: Disable debug domain and release selected GPIOs,1: Enable debug domain and aquire selected GPIOs" group.long 0x518++0x3 line.long 0x0 "TRACEPORTSPEED,Trace port speed" bitfld.long 0x0 0.--1. "TRACEPORTSPEED,Trace port speed is divided from CPU clock. The TRACECLK pin output will be divided again by two from the trace port clock." "0: Trace port speed equals CPU clock,1: Trace port speed equals CPU clock divided by 2,2: Trace port speed equals CPU clock divided by 4,3: Trace port speed equals CPU clock divided by 32" group.long 0x520++0x3 line.long 0x0 "TINSTANCE,SW-DP Target instance" hexmask.long.byte 0x0 0.--3. 1. "TINSTANCE,TINSTANCE bits are used in the SW-DP DLPIDR.TINSTANCE field." tree.end tree.end tree "TAMPC (Tamper Controller)" base ad:0x0 tree "GLOBAL_TAMPC_S" base ad:0x500DC000 group.long 0x100++0x7 line.long 0x0 "EVENTS_TAMPER,Tamper controller detected an error." bitfld.long 0x0 0. "EVENTS_TAMPER,Tamper controller detected an error." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_WRITEERROR,Attempt to write a VALUE in PROTECT registers without clearing the WRITEPROTECT." bitfld.long 0x4 0. "EVENTS_WRITEERROR,Attempt to write a VALUE in PROTECT registers without clearing the WRITEPROTECT." "0: Event not generated,1: Event generated" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 1. "WRITEERROR,Enable or disable interrupt for event WRITEERROR" "0: Disable,1: Enable" bitfld.long 0x0 0. "TAMPER,Enable or disable interrupt for event TAMPER" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 1. "WRITEERROR,Write '1' to enable interrupt for event WRITEERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "TAMPER,Write '1' to enable interrupt for event TAMPER" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 1. "WRITEERROR,Write '1' to disable interrupt for event WRITEERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "TAMPER,Write '1' to disable interrupt for event TAMPER" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 1. "WRITEERROR,Read pending status of interrupt for event WRITEERROR" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 0. "TAMPER,Read pending status of interrupt for event TAMPER" "0: Read: Not pending,1: Read: Pending" group.long 0x400++0x3 line.long 0x0 "STATUS,The tamper controller status." bitfld.long 0x0 15. "GLITCHFASTDOMAIN_3,Fast domain glitch detector 3 detected an error." "0: Not detected.,1: Detected." bitfld.long 0x0 14. "GLITCHFASTDOMAIN_2,Fast domain glitch detector 2 detected an error." "0: Not detected.,1: Detected." bitfld.long 0x0 13. "GLITCHFASTDOMAIN_1,Fast domain glitch detector 1 detected an error." "0: Not detected.,1: Detected." newline bitfld.long 0x0 12. "GLITCHFASTDOMAIN_0,Fast domain glitch detector 0 detected an error." "0: Not detected.,1: Detected." bitfld.long 0x0 8. "GLITCHSLOWDOMAIN_0,Slow domain glitch detector 0 detected an error." "0: Not detected.,1: Detected." bitfld.long 0x0 5. "CRACENTAMP,CRACEN detected an error." "0: Not detected.,1: Detected." newline bitfld.long 0x0 4. "PROTECT,Error detected for the protected signals." "0: Not detected.,1: Detected." bitfld.long 0x0 0. "ACTIVESHIELD,Active shield detector detected an error." "0: Not detected.,1: Detected." tree "ACTIVESHIELD" base ad:0x500DC404 group.long 0x0++0x3 line.long 0x0 "CHEN,Active shield detector channel enable register." bitfld.long 0x0 3. "CH_3,Enable or disable active shield channel 3." "0: Disable channel.,1: Enable channel." bitfld.long 0x0 2. "CH_2,Enable or disable active shield channel 2." "0: Disable channel.,1: Enable channel." bitfld.long 0x0 1. "CH_1,Enable or disable active shield channel 1." "0: Disable channel.,1: Enable channel." bitfld.long 0x0 0. "CH_0,Enable or disable active shield channel 0." "0: Disable channel.,1: Enable channel." tree.end tree "PROTECT" base ad:0x500DC500 tree "ACTIVESHIELD (Enable active shield detector.)" base ad:0x500DC900 group.long 0x0++0x7 line.long 0x0 "CTRL,Control register for active shield detector enable signal." hexmask.long.word 0x0 16.--31. 1. "KEY,Required write key for upper 16 bits. Must be included in all register write operations." hexmask.long.byte 0x0 4.--7. 1. "WRITEPROTECTION,The write protection must be cleared to allow updates to the VALUE field." eventfld.long 0x0 1. "LOCK,Lock this register to prevent changes to the VALUE field until next reset." "0: Lock disabled.,1: Lock enabled." bitfld.long 0x0 0. "VALUE,Set value of active shield enable signal." "0: Signal is logic 0.,1: Signal is logic 1." line.long 0x4 "STATUS,Status register for active shield detector enable signal." bitfld.long 0x4 0. "ERROR,Error detection status." "0: No error detected.,1: Error detected." tree.end tree "AP[%s] (Unspecified)" base ad:0x500DC700 tree "DBGEN (Unspecified)" group.long 0x0++0x7 line.long 0x0 "CTRL,Description cluster: Control register to enable invasive (halting) debug in domain n's access port." hexmask.long.word 0x0 16.--31. 1. "KEY,Required write key for upper 16 bits. Must be included in all register write operations." hexmask.long.byte 0x0 4.--7. 1. "WRITEPROTECTION,The write protection must be cleared to allow updates to the VALUE field." eventfld.long 0x0 1. "LOCK,Lock this register to prevent changes to the VALUE field until next reset." "0: Lock disabled.,1: Lock enabled." bitfld.long 0x0 0. "VALUE,Set value of dbgen signal." "0: Signal is logic 0.,1: Signal is logic 1." line.long 0x4 "STATUS,Description cluster: Status register for invasive (halting) debug enable for domain n's access port." bitfld.long 0x4 0. "ERROR,Error detection status." "0: No error detected.,1: Error detected." tree.end tree.end tree "CRACENTAMP (Enable tamper detector from CRACEN.)" base ad:0x500DC938 group.long 0x0++0x7 line.long 0x0 "CTRL,Control register for CRACEN tamper detector enable signal." hexmask.long.word 0x0 16.--31. 1. "KEY,Required write key for upper 16 bits. Must be included in all register write operations." hexmask.long.byte 0x0 4.--7. 1. "WRITEPROTECTION,The write protection must be cleared to allow updates to the VALUE field." eventfld.long 0x0 1. "LOCK,Lock this register to prevent changes to the VALUE field until next reset." "0: Lock disabled.,1: Lock enabled." bitfld.long 0x0 0. "VALUE,Set value of CRACEN tamper detector enable signal." "0: Signal is logic 0.,1: Signal is logic 1." line.long 0x4 "STATUS,Status register for CRACEN tamper detector enable signal." bitfld.long 0x4 0. "ERROR,Error detection status." "0: No error detected.,1: Error detected." tree.end base ad:0x500DC500 tree "DOMAIN[%s] (Unspecified)" tree "DBGEN (Unspecified)" group.long 0x0++0x7 line.long 0x0 "CTRL,Description cluster: Control register for invasive (halting) debug enable for the local debug components within domain n." hexmask.long.word 0x0 16.--31. 1. "KEY,Required write key for upper 16 bits. Must be included in all register write operations." hexmask.long.byte 0x0 4.--7. 1. "WRITEPROTECTION,The write protection must be cleared to allow updates to the VALUE field." eventfld.long 0x0 1. "LOCK,Lock this register to prevent changes to the VALUE field until next reset." "0: Lock disabled.,1: Lock enabled." bitfld.long 0x0 0. "VALUE,Set value of dbgen signal." "0: Signal is logic 0.,1: Signal is logic 1." line.long 0x4 "STATUS,Description cluster: Status register for invasive (halting) debug enable for domain n." bitfld.long 0x4 0. "ERROR,Error detection status." "0: No error detected.,1: Error detected." tree.end tree "NIDEN (Unspecified)" base ad:0x500DC508 group.long 0x0++0x7 line.long 0x0 "CTRL,Description cluster: Control register for non-invasive debug enable for the local debug components within domain n." hexmask.long.word 0x0 16.--31. 1. "KEY,Required write key for upper 16 bits. Must be included in all register write operations." hexmask.long.byte 0x0 4.--7. 1. "WRITEPROTECTION,The write protection must be cleared to allow updates to the VALUE field." eventfld.long 0x0 1. "LOCK,Lock this register to prevent changes to the VALUE field until next reset." "0: Lock disabled.,1: Lock enabled." bitfld.long 0x0 0. "VALUE,Set value of niden signal." "0: Signal is logic 0.,1: Signal is logic 1." line.long 0x4 "STATUS,Description cluster: Status register for non-invasive debug enable for domain n." bitfld.long 0x4 0. "ERROR,Error detection status." "0: No error detected.,1: Error detected." tree.end tree "SPIDEN (Unspecified)" base ad:0x500DC510 group.long 0x0++0x7 line.long 0x0 "CTRL,Description cluster: Control register for secure priviliged invasive (halting) debug enable for the local debug components within domain n." hexmask.long.word 0x0 16.--31. 1. "KEY,Required write key for upper 16 bits. Must be included in all register write operations." hexmask.long.byte 0x0 4.--7. 1. "WRITEPROTECTION,The write protection must be cleared to allow updates to the VALUE field." eventfld.long 0x0 1. "LOCK,Lock this register to prevent changes to the VALUE field until next reset." "0: Lock disabled.,1: Lock enabled." bitfld.long 0x0 0. "VALUE,Set value of spiden signal." "0: Signal is logic 0.,1: Signal is logic 1." line.long 0x4 "STATUS,Description cluster: Status register for secure priviliged invasive (halting) debug enable for domain n." bitfld.long 0x4 0. "ERROR,Error detection status." "0: No error detected.,1: Error detected." tree.end tree "SPNIDEN (Unspecified)" base ad:0x500DC518 group.long 0x0++0x7 line.long 0x0 "CTRL,Description cluster: Control register for secure priviliged non-invasive debug enable for the local debug components within domain n." hexmask.long.word 0x0 16.--31. 1. "KEY,Required write key for upper 16 bits. Must be included in all register write operations." hexmask.long.byte 0x0 4.--7. 1. "WRITEPROTECTION,The write protection must be cleared to allow updates to the VALUE field." eventfld.long 0x0 1. "LOCK,Lock this register to prevent changes to the VALUE field until next reset." "0: Lock disabled.,1: Lock enabled." bitfld.long 0x0 0. "VALUE,Set value of spniden signal." "0: Signal is logic 0.,1: Signal is logic 1." line.long 0x4 "STATUS,Description cluster: Status register for secure priviliged non-invasive debug enable for domain n." bitfld.long 0x4 0. "ERROR,Error detection status." "0: No error detected.,1: Error detected." tree.end tree.end tree "ERASEPROTECT (Device erase protection.)" base ad:0x500DC980 group.long 0x0++0x7 line.long 0x0 "CTRL,Control register for erase protection." hexmask.long.word 0x0 16.--31. 1. "KEY,Required write key for upper 16 bits. Must be included in all register write operations." hexmask.long.byte 0x0 4.--7. 1. "WRITEPROTECTION,The write protection must be cleared to allow updates to the VALUE field." eventfld.long 0x0 1. "LOCK,Lock this register to prevent changes to the VALUE field until next reset." "0: Lock disabled.,1: Lock enabled." bitfld.long 0x0 0. "VALUE,Set value of eraseprotect signal." "0: Signal is logic 0.,1: Signal is logic 1." line.long 0x4 "STATUS,Status register for eraseprotect." bitfld.long 0x4 0. "ERROR,Error detection status." "0: No error detected.,1: Error detected." tree.end tree "EXTRESETEN (Trigger a reset when tamper is detected by the external tamper detectors.)" base ad:0x500DC970 group.long 0x0++0x7 line.long 0x0 "CTRL,Control register for external tamper reset enable signal." hexmask.long.word 0x0 16.--31. 1. "KEY,Required write key for upper 16 bits. Must be included in all register write operations." hexmask.long.byte 0x0 4.--7. 1. "WRITEPROTECTION,The write protection must be cleared to allow updates to the VALUE field." eventfld.long 0x0 1. "LOCK,Lock this register to prevent changes to the VALUE field until next reset." "0: Lock disabled.,1: Lock enabled." bitfld.long 0x0 0. "VALUE,Set value of external tamper reset enable signal." "0: Signal is logic 0.,1: Signal is logic 1." line.long 0x4 "STATUS,Status register for external tamper reset enable signal." bitfld.long 0x4 0. "ERROR,Error detection status." "0: No error detected.,1: Error detected." tree.end tree "GLITCHFASTDOMAIN (Enable fast domain glitch detectors.)" base ad:0x500DC948 group.long 0x0++0x7 line.long 0x0 "CTRL,Control register for fast domain glitch detectors enable signal." hexmask.long.word 0x0 16.--31. 1. "KEY,Required write key for upper 16 bits. Must be included in all register write operations." hexmask.long.byte 0x0 4.--7. 1. "WRITEPROTECTION,The write protection must be cleared to allow updates to the VALUE field." eventfld.long 0x0 1. "LOCK,Lock this register to prevent changes to the VALUE field until next reset." "0: Lock disabled.,1: Lock enabled." bitfld.long 0x0 0. "VALUE,Set value of fast domain glitch detector's enable signal." "0: Signal is logic 0.,1: Signal is logic 1." line.long 0x4 "STATUS,Status register for fast domain glitch detectors enable signal." bitfld.long 0x4 0. "ERROR,Error detection status." "0: No error detected.,1: Error detected." tree.end tree "GLITCHSLOWDOMAIN (Enable slow domain glitch detectors.)" base ad:0x500DC940 group.long 0x0++0x7 line.long 0x0 "CTRL,Control register for slow domain glitch detectors enable signal." hexmask.long.word 0x0 16.--31. 1. "KEY,Required write key for upper 16 bits. Must be included in all register write operations." hexmask.long.byte 0x0 4.--7. 1. "WRITEPROTECTION,The write protection must be cleared to allow updates to the VALUE field." eventfld.long 0x0 1. "LOCK,Lock this register to prevent changes to the VALUE field until next reset." "0: Lock disabled.,1: Lock enabled." bitfld.long 0x0 0. "VALUE,Set value of slow domain glitch detectors enable signal." "0: Signal is logic 0.,1: Signal is logic 1." line.long 0x4 "STATUS,Status register for slow domain glitch detectors enable signal." bitfld.long 0x4 0. "ERROR,Error detection status." "0: No error detected.,1: Error detected." tree.end tree "INTRESETEN (Trigger a reset when tamper is detected by the glitch detectors signal protector or CRACEN tamper detector.)" base ad:0x500DC978 group.long 0x0++0x7 line.long 0x0 "CTRL,Control register for internal tamper reset enable signal." hexmask.long.word 0x0 16.--31. 1. "KEY,Required write key for upper 16 bits. Must be included in all register write operations." hexmask.long.byte 0x0 4.--7. 1. "WRITEPROTECTION,The write protection must be cleared to allow updates to the VALUE field." eventfld.long 0x0 1. "LOCK,Lock this register to prevent changes to the VALUE field until next reset." "0: Lock disabled.,1: Lock enabled." bitfld.long 0x0 0. "VALUE,Set value of internal tamper reset enable signal." "0: Signal is logic 0.,1: Signal is logic 1." line.long 0x4 "STATUS,Status register for internal tamper reset enable signal." bitfld.long 0x4 0. "ERROR,Error detection status." "0: No error detected.,1: Error detected." tree.end tree.end tree.end tree.end tree "TEMP (Temperature Sensor)" base ad:0x0 tree "GLOBAL_TEMP_NS" base ad:0x400D7000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start temperature measurement" bitfld.long 0x0 0. "TASKS_START,Start temperature measurement" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop temperature measurement" bitfld.long 0x4 0. "TASKS_STOP,Stop temperature measurement" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0x3 line.long 0x0 "EVENTS_DATARDY,Temperature measurement complete. data ready" bitfld.long 0x0 0. "EVENTS_DATARDY,Temperature measurement complete data ready" "0: Event not generated,1: Event generated" group.long 0x180++0x3 line.long 0x0 "PUBLISH_DATARDY,Publish configuration for event DATARDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event DATARDY will publish to" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 0. "DATARDY,Write '1' to enable interrupt for event DATARDY" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 0. "DATARDY,Write '1' to disable interrupt for event DATARDY" "0: Read: Disabled,1: Disable" rgroup.long 0x508++0x3 line.long 0x0 "TEMP,Temperature in degC (0.25deg steps)" hexmask.long 0x0 0.--31. 1. "TEMP,Temperature in degC (0.25deg steps)" group.long 0x520++0x1B line.long 0x0 "A0,Slope of 1st piece wise linear function" hexmask.long.word 0x0 0.--11. 1. "A0,Slope of 1st piece wise linear function" line.long 0x4 "A1,Slope of 2nd piece wise linear function" hexmask.long.word 0x4 0.--11. 1. "A1,Slope of 2nd piece wise linear function" line.long 0x8 "A2,Slope of 3rd piece wise linear function" hexmask.long.word 0x8 0.--11. 1. "A2,Slope of 3rd piece wise linear function" line.long 0xC "A3,Slope of 4th piece wise linear function" hexmask.long.word 0xC 0.--11. 1. "A3,Slope of 4th piece wise linear function" line.long 0x10 "A4,Slope of 5th piece wise linear function" hexmask.long.word 0x10 0.--11. 1. "A4,Slope of 5th piece wise linear function" line.long 0x14 "A5,Slope of 6th piece wise linear function" hexmask.long.word 0x14 0.--11. 1. "A5,Slope of 6th piece wise linear function" line.long 0x18 "A6,Slope of 7th piece wise linear function" hexmask.long.word 0x18 0.--11. 1. "A6,Slope of 7th piece wise linear function" group.long 0x540++0x1B line.long 0x0 "B0,y-intercept of 1st piece wise linear function" hexmask.long.word 0x0 0.--11. 1. "B0,y-intercept of 1st piece wise linear function" line.long 0x4 "B1,y-intercept of 2nd piece wise linear function" hexmask.long.word 0x4 0.--11. 1. "B1,y-intercept of 2nd piece wise linear function" line.long 0x8 "B2,y-intercept of 3rd piece wise linear function" hexmask.long.word 0x8 0.--11. 1. "B2,y-intercept of 3rd piece wise linear function" line.long 0xC "B3,y-intercept of 4th piece wise linear function" hexmask.long.word 0xC 0.--11. 1. "B3,y-intercept of 4th piece wise linear function" line.long 0x10 "B4,y-intercept of 5th piece wise linear function" hexmask.long.word 0x10 0.--11. 1. "B4,y-intercept of 5th piece wise linear function" line.long 0x14 "B5,y-intercept of 6th piece wise linear function" hexmask.long.word 0x14 0.--11. 1. "B5,y-intercept of 6th piece wise linear function" line.long 0x18 "B6,y-intercept of 7th piece wise linear function" hexmask.long.word 0x18 0.--11. 1. "B6,y-intercept of 7th piece wise linear function" group.long 0x560++0x17 line.long 0x0 "T0,End point of 1st piece wise linear function" hexmask.long.byte 0x0 0.--7. 1. "T0,End point of 1st piece wise linear function" line.long 0x4 "T1,End point of 2nd piece wise linear function" hexmask.long.byte 0x4 0.--7. 1. "T1,End point of 2nd piece wise linear function" line.long 0x8 "T2,End point of 3rd piece wise linear function" hexmask.long.byte 0x8 0.--7. 1. "T2,End point of 3rd piece wise linear function" line.long 0xC "T3,End point of 4th piece wise linear function" hexmask.long.byte 0xC 0.--7. 1. "T3,End point of 4th piece wise linear function" line.long 0x10 "T4,End point of 5th piece wise linear function" hexmask.long.byte 0x10 0.--7. 1. "T4,End point of 5th piece wise linear function" line.long 0x14 "T5,End point of 6th piece wise linear function" hexmask.long.byte 0x14 0.--7. 1. "T5,End point of 6th piece wise linear function" tree.end tree "GLOBAL_TEMP_S" base ad:0x500D7000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start temperature measurement" bitfld.long 0x0 0. "TASKS_START,Start temperature measurement" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop temperature measurement" bitfld.long 0x4 0. "TASKS_STOP,Stop temperature measurement" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0x3 line.long 0x0 "EVENTS_DATARDY,Temperature measurement complete. data ready" bitfld.long 0x0 0. "EVENTS_DATARDY,Temperature measurement complete data ready" "0: Event not generated,1: Event generated" group.long 0x180++0x3 line.long 0x0 "PUBLISH_DATARDY,Publish configuration for event DATARDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event DATARDY will publish to" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 0. "DATARDY,Write '1' to enable interrupt for event DATARDY" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 0. "DATARDY,Write '1' to disable interrupt for event DATARDY" "0: Read: Disabled,1: Disable" rgroup.long 0x508++0x3 line.long 0x0 "TEMP,Temperature in degC (0.25deg steps)" hexmask.long 0x0 0.--31. 1. "TEMP,Temperature in degC (0.25deg steps)" group.long 0x520++0x1B line.long 0x0 "A0,Slope of 1st piece wise linear function" hexmask.long.word 0x0 0.--11. 1. "A0,Slope of 1st piece wise linear function" line.long 0x4 "A1,Slope of 2nd piece wise linear function" hexmask.long.word 0x4 0.--11. 1. "A1,Slope of 2nd piece wise linear function" line.long 0x8 "A2,Slope of 3rd piece wise linear function" hexmask.long.word 0x8 0.--11. 1. "A2,Slope of 3rd piece wise linear function" line.long 0xC "A3,Slope of 4th piece wise linear function" hexmask.long.word 0xC 0.--11. 1. "A3,Slope of 4th piece wise linear function" line.long 0x10 "A4,Slope of 5th piece wise linear function" hexmask.long.word 0x10 0.--11. 1. "A4,Slope of 5th piece wise linear function" line.long 0x14 "A5,Slope of 6th piece wise linear function" hexmask.long.word 0x14 0.--11. 1. "A5,Slope of 6th piece wise linear function" line.long 0x18 "A6,Slope of 7th piece wise linear function" hexmask.long.word 0x18 0.--11. 1. "A6,Slope of 7th piece wise linear function" group.long 0x540++0x1B line.long 0x0 "B0,y-intercept of 1st piece wise linear function" hexmask.long.word 0x0 0.--11. 1. "B0,y-intercept of 1st piece wise linear function" line.long 0x4 "B1,y-intercept of 2nd piece wise linear function" hexmask.long.word 0x4 0.--11. 1. "B1,y-intercept of 2nd piece wise linear function" line.long 0x8 "B2,y-intercept of 3rd piece wise linear function" hexmask.long.word 0x8 0.--11. 1. "B2,y-intercept of 3rd piece wise linear function" line.long 0xC "B3,y-intercept of 4th piece wise linear function" hexmask.long.word 0xC 0.--11. 1. "B3,y-intercept of 4th piece wise linear function" line.long 0x10 "B4,y-intercept of 5th piece wise linear function" hexmask.long.word 0x10 0.--11. 1. "B4,y-intercept of 5th piece wise linear function" line.long 0x14 "B5,y-intercept of 6th piece wise linear function" hexmask.long.word 0x14 0.--11. 1. "B5,y-intercept of 6th piece wise linear function" line.long 0x18 "B6,y-intercept of 7th piece wise linear function" hexmask.long.word 0x18 0.--11. 1. "B6,y-intercept of 7th piece wise linear function" group.long 0x560++0x17 line.long 0x0 "T0,End point of 1st piece wise linear function" hexmask.long.byte 0x0 0.--7. 1. "T0,End point of 1st piece wise linear function" line.long 0x4 "T1,End point of 2nd piece wise linear function" hexmask.long.byte 0x4 0.--7. 1. "T1,End point of 2nd piece wise linear function" line.long 0x8 "T2,End point of 3rd piece wise linear function" hexmask.long.byte 0x8 0.--7. 1. "T2,End point of 3rd piece wise linear function" line.long 0xC "T3,End point of 4th piece wise linear function" hexmask.long.byte 0xC 0.--7. 1. "T3,End point of 4th piece wise linear function" line.long 0x10 "T4,End point of 5th piece wise linear function" hexmask.long.byte 0x10 0.--7. 1. "T4,End point of 5th piece wise linear function" line.long 0x14 "T5,End point of 6th piece wise linear function" hexmask.long.byte 0x14 0.--7. 1. "T5,End point of 6th piece wise linear function" tree.end tree.end tree "TIMER" base ad:0x0 tree "GLOBAL_TIMER00_NS" base ad:0x40055000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER00_S" base ad:0x50055000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER10_NS" base ad:0x40085000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER10_S" base ad:0x50085000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER20_NS" base ad:0x400CA000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER20_S" base ad:0x500CA000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER21_NS" base ad:0x400CB000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER21_S" base ad:0x500CB000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER22_NS" base ad:0x400CC000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER22_S" base ad:0x500CC000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER23_NS" base ad:0x400CD000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER23_S" base ad:0x500CD000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER24_NS" base ad:0x400CE000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree "GLOBAL_TIMER24_S" base ad:0x500CE000 wgroup.long 0x0++0xF line.long 0x0 "TASKS_START,Start Timer" bitfld.long 0x0 0. "TASKS_START,Start Timer" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop Timer" bitfld.long 0x4 0. "TASKS_STOP,Stop Timer" "?,1: Trigger task" line.long 0x8 "TASKS_COUNT,Increment Timer (Counter mode only)" bitfld.long 0x8 0. "TASKS_COUNT,Increment Timer (Counter mode only)" "?,1: Trigger task" line.long 0xC "TASKS_CLEAR,Clear time" bitfld.long 0xC 0. "TASKS_CLEAR,Clear time" "?,1: Trigger task" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "TASKS_CAPTURE[$1],Description collection: Capture Timer value to CC[n] register" bitfld.long 0x0 0. "TASKS_CAPTURE,Capture Timer value to CC[n] register" "?,1: Trigger task" repeat.end group.long 0x80++0xF line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" line.long 0x8 "SUBSCRIBE_COUNT,Subscribe configuration for task COUNT" bitfld.long 0x8 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that task COUNT will subscribe to" line.long 0xC "SUBSCRIBE_CLEAR,Subscribe configuration for task CLEAR" bitfld.long 0xC 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0xC 0.--7. 1. "CHIDX,DPPI channel that task CLEAR will subscribe to" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "SUBSCRIBE_CAPTURE[$1],Description collection: Subscribe configuration for task CAPTURE[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task CAPTURE[n] will subscribe to" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "EVENTS_COMPARE[$1],Description collection: Compare event on CC[n] match" bitfld.long 0x0 0. "EVENTS_COMPARE,Compare event on CC[n] match" "0: Event not generated,1: Event generated" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "PUBLISH_COMPARE[$1],Description collection: Publish configuration for event COMPARE[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event COMPARE[n] will publish to" repeat.end group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 23. "COMPARE7_STOP,Shortcut between event COMPARE[7] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "COMPARE6_STOP,Shortcut between event COMPARE[6] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "COMPARE5_STOP,Shortcut between event COMPARE[5] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 20. "COMPARE4_STOP,Shortcut between event COMPARE[4] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 19. "COMPARE3_STOP,Shortcut between event COMPARE[3] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "COMPARE2_STOP,Shortcut between event COMPARE[2] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 17. "COMPARE1_STOP,Shortcut between event COMPARE[1] and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 16. "COMPARE0_STOP,Shortcut between event COMPARE[0] and task STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "COMPARE7_CLEAR,Shortcut between event COMPARE[7] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 6. "COMPARE6_CLEAR,Shortcut between event COMPARE[6] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 5. "COMPARE5_CLEAR,Shortcut between event COMPARE[5] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 4. "COMPARE4_CLEAR,Shortcut between event COMPARE[4] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 3. "COMPARE3_CLEAR,Shortcut between event COMPARE[3] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 2. "COMPARE2_CLEAR,Shortcut between event COMPARE[2] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 1. "COMPARE1_CLEAR,Shortcut between event COMPARE[1] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 0. "COMPARE0_CLEAR,Shortcut between event COMPARE[0] and task CLEAR" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 23. "COMPARE7,Enable or disable interrupt for event COMPARE[7]" "0: Disable,1: Enable" bitfld.long 0x0 22. "COMPARE6,Enable or disable interrupt for event COMPARE[6]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "COMPARE5,Enable or disable interrupt for event COMPARE[5]" "0: Disable,1: Enable" bitfld.long 0x0 20. "COMPARE4,Enable or disable interrupt for event COMPARE[4]" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "COMPARE3,Enable or disable interrupt for event COMPARE[3]" "0: Disable,1: Enable" bitfld.long 0x0 18. "COMPARE2,Enable or disable interrupt for event COMPARE[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "COMPARE1,Enable or disable interrupt for event COMPARE[1]" "0: Disable,1: Enable" bitfld.long 0x0 16. "COMPARE0,Enable or disable interrupt for event COMPARE[0]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 23. "COMPARE7,Write '1' to enable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "COMPARE6,Write '1' to enable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "COMPARE5,Write '1' to enable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "COMPARE4,Write '1' to enable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "COMPARE3,Write '1' to enable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 18. "COMPARE2,Write '1' to enable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 17. "COMPARE1,Write '1' to enable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 16. "COMPARE0,Write '1' to enable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 23. "COMPARE7,Write '1' to disable interrupt for event COMPARE[7]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "COMPARE6,Write '1' to disable interrupt for event COMPARE[6]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "COMPARE5,Write '1' to disable interrupt for event COMPARE[5]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "COMPARE4,Write '1' to disable interrupt for event COMPARE[4]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "COMPARE3,Write '1' to disable interrupt for event COMPARE[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 18. "COMPARE2,Write '1' to disable interrupt for event COMPARE[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 17. "COMPARE1,Write '1' to disable interrupt for event COMPARE[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 16. "COMPARE0,Write '1' to disable interrupt for event COMPARE[0]" "0: Read: Disabled,1: Disable" group.long 0x504++0x7 line.long 0x0 "MODE,Timer mode selection" bitfld.long 0x0 0.--1. "MODE,Timer mode" "0: Select Timer mode,1: Deprecated enumerator - Select Counter mode,2: Select Low Power Counter mode,?" line.long 0x4 "BITMODE,Configure the number of bits used by the TIMER" bitfld.long 0x4 0.--1. "BITMODE,Timer bit width" "0: 16 bit timer bit width,1: 8 bit timer bit width,2: 24 bit timer bit width,3: 32 bit timer bit width" group.long 0x510++0x3 line.long 0x0 "PRESCALER,Timer prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PRESCALER,Prescaler value" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x540)++0x3 line.long 0x0 "CC[$1],Description collection: Capture/Compare register n" hexmask.long 0x0 0.--31. 1. "CC,Capture/Compare value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x580)++0x3 line.long 0x0 "ONESHOTEN[$1],Description collection: Enable one-shot operation for Capture/Compare channel n" bitfld.long 0x0 0. "ONESHOTEN,Enable one-shot operation" "0: Disable one-shot operation,1: Enable one-shot operation" repeat.end tree.end tree.end tree "TPIU (Trace Port Interface Unit)" base ad:0x0 tree "TPIU_NS" base ad:0xE0040000 rgroup.long 0x0++0x3 line.long 0x0 "UNUSED,Unused." tree.end tree.end tree "TWIM (Two-Wire Interface - Master)" base ad:0x0 tree "GLOBAL_TWIM20_NS" base ad:0x400C6000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" tree "SUBSCRIBE_DMA" base ad:0x400C60A8 tree "RX (Subscribe configuration for tasks)" group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x400C60D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end tree "TASKS_DMA" base ad:0x400C6028 tree "RX (Peripheral tasks.)" wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x400C6050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x400C6000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x128++0x3 line.long 0x0 "EVENTS_SUSPENDED,SUSPEND task has been issued. TWI traffic is now suspended." bitfld.long 0x0 0. "EVENTS_SUSPENDED,SUSPEND task has been issued TWI traffic is now suspended." "0: Event not generated,1: Event generated" group.long 0x134++0x7 line.long 0x0 "EVENTS_LASTRX,Byte boundary. starting to receive the last byte" bitfld.long 0x0 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LASTTX,Byte boundary. starting to transmit the last byte" bitfld.long 0x4 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400C614C tree "RX (Peripheral events.)" group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x400C6000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A8++0x3 line.long 0x0 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to" group.long 0x1B4++0x7 line.long 0x0 "PUBLISH_LASTRX,Publish configuration for event LASTRX" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to" line.long 0x4 "PUBLISH_LASTTX,Publish configuration for event LASTTX" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to" tree "PUBLISH_DMA" base ad:0x400C61CC tree "RX (Publish configuration for events)" group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x400C6000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 10. "LASTRX_DMA_TX_START,Shortcut between event LASTRX and task DMA.TX.START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "LASTTX_DMA_RX_START,Shortcut between event LASTTX and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disable,1: Enable" bitfld.long 0x0 13. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4C4++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIM" group.long 0x524++0x3 line.long 0x0 "FREQUENCY,TWI frequency. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "FREQUENCY,TWI master clock frequency" group.long 0x588++0x3 line.long 0x0 "ADDRESS,Address used in the TWI transfer" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,Address used in the TWI transfer" tree "DMA" base ad:0x400C6700 tree "RX (Unspecified)" group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C6600 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIM20_S" base ad:0x500C6000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" tree "SUBSCRIBE_DMA" base ad:0x500C6000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x400C60D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end tree "TASKS_DMA" base ad:0x500C6000 tree "RX (Peripheral tasks.)" base ad:0x400C6028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x400C6050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x500C6000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x128++0x3 line.long 0x0 "EVENTS_SUSPENDED,SUSPEND task has been issued. TWI traffic is now suspended." bitfld.long 0x0 0. "EVENTS_SUSPENDED,SUSPEND task has been issued TWI traffic is now suspended." "0: Event not generated,1: Event generated" group.long 0x134++0x7 line.long 0x0 "EVENTS_LASTRX,Byte boundary. starting to receive the last byte" bitfld.long 0x0 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LASTTX,Byte boundary. starting to transmit the last byte" bitfld.long 0x4 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500C6000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x500C6000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A8++0x3 line.long 0x0 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to" group.long 0x1B4++0x7 line.long 0x0 "PUBLISH_LASTRX,Publish configuration for event LASTRX" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to" line.long 0x4 "PUBLISH_LASTTX,Publish configuration for event LASTTX" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to" tree "PUBLISH_DMA" base ad:0x500C6000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x500C6000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 10. "LASTRX_DMA_TX_START,Shortcut between event LASTRX and task DMA.TX.START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "LASTTX_DMA_RX_START,Shortcut between event LASTTX and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disable,1: Enable" bitfld.long 0x0 13. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4C4++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIM" group.long 0x524++0x3 line.long 0x0 "FREQUENCY,TWI frequency. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "FREQUENCY,TWI master clock frequency" group.long 0x588++0x3 line.long 0x0 "ADDRESS,Address used in the TWI transfer" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,Address used in the TWI transfer" tree "DMA" base ad:0x500C6000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C6000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIM21_NS" base ad:0x400C7000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" tree "SUBSCRIBE_DMA" base ad:0x400C7000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x400C60D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end tree "TASKS_DMA" base ad:0x400C7000 tree "RX (Peripheral tasks.)" base ad:0x400C6028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x400C6050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x400C7000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x128++0x3 line.long 0x0 "EVENTS_SUSPENDED,SUSPEND task has been issued. TWI traffic is now suspended." bitfld.long 0x0 0. "EVENTS_SUSPENDED,SUSPEND task has been issued TWI traffic is now suspended." "0: Event not generated,1: Event generated" group.long 0x134++0x7 line.long 0x0 "EVENTS_LASTRX,Byte boundary. starting to receive the last byte" bitfld.long 0x0 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LASTTX,Byte boundary. starting to transmit the last byte" bitfld.long 0x4 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400C7000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x400C7000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A8++0x3 line.long 0x0 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to" group.long 0x1B4++0x7 line.long 0x0 "PUBLISH_LASTRX,Publish configuration for event LASTRX" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to" line.long 0x4 "PUBLISH_LASTTX,Publish configuration for event LASTTX" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to" tree "PUBLISH_DMA" base ad:0x400C7000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x400C7000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 10. "LASTRX_DMA_TX_START,Shortcut between event LASTRX and task DMA.TX.START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "LASTTX_DMA_RX_START,Shortcut between event LASTTX and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disable,1: Enable" bitfld.long 0x0 13. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4C4++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIM" group.long 0x524++0x3 line.long 0x0 "FREQUENCY,TWI frequency. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "FREQUENCY,TWI master clock frequency" group.long 0x588++0x3 line.long 0x0 "ADDRESS,Address used in the TWI transfer" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,Address used in the TWI transfer" tree "DMA" base ad:0x400C7000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C7000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIM21_S" base ad:0x500C7000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" tree "SUBSCRIBE_DMA" base ad:0x500C7000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x400C60D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end tree "TASKS_DMA" base ad:0x500C7000 tree "RX (Peripheral tasks.)" base ad:0x400C6028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x400C6050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x500C7000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x128++0x3 line.long 0x0 "EVENTS_SUSPENDED,SUSPEND task has been issued. TWI traffic is now suspended." bitfld.long 0x0 0. "EVENTS_SUSPENDED,SUSPEND task has been issued TWI traffic is now suspended." "0: Event not generated,1: Event generated" group.long 0x134++0x7 line.long 0x0 "EVENTS_LASTRX,Byte boundary. starting to receive the last byte" bitfld.long 0x0 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LASTTX,Byte boundary. starting to transmit the last byte" bitfld.long 0x4 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500C7000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x500C7000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A8++0x3 line.long 0x0 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to" group.long 0x1B4++0x7 line.long 0x0 "PUBLISH_LASTRX,Publish configuration for event LASTRX" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to" line.long 0x4 "PUBLISH_LASTTX,Publish configuration for event LASTTX" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to" tree "PUBLISH_DMA" base ad:0x500C7000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x500C7000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 10. "LASTRX_DMA_TX_START,Shortcut between event LASTRX and task DMA.TX.START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "LASTTX_DMA_RX_START,Shortcut between event LASTTX and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disable,1: Enable" bitfld.long 0x0 13. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4C4++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIM" group.long 0x524++0x3 line.long 0x0 "FREQUENCY,TWI frequency. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "FREQUENCY,TWI master clock frequency" group.long 0x588++0x3 line.long 0x0 "ADDRESS,Address used in the TWI transfer" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,Address used in the TWI transfer" tree "DMA" base ad:0x500C7000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C7000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIM22_NS" base ad:0x400C8000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" tree "SUBSCRIBE_DMA" base ad:0x400C8000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x400C60D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end tree "TASKS_DMA" base ad:0x400C8000 tree "RX (Peripheral tasks.)" base ad:0x400C6028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x400C6050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x400C8000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x128++0x3 line.long 0x0 "EVENTS_SUSPENDED,SUSPEND task has been issued. TWI traffic is now suspended." bitfld.long 0x0 0. "EVENTS_SUSPENDED,SUSPEND task has been issued TWI traffic is now suspended." "0: Event not generated,1: Event generated" group.long 0x134++0x7 line.long 0x0 "EVENTS_LASTRX,Byte boundary. starting to receive the last byte" bitfld.long 0x0 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LASTTX,Byte boundary. starting to transmit the last byte" bitfld.long 0x4 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400C8000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x400C8000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A8++0x3 line.long 0x0 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to" group.long 0x1B4++0x7 line.long 0x0 "PUBLISH_LASTRX,Publish configuration for event LASTRX" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to" line.long 0x4 "PUBLISH_LASTTX,Publish configuration for event LASTTX" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to" tree "PUBLISH_DMA" base ad:0x400C8000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x400C8000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 10. "LASTRX_DMA_TX_START,Shortcut between event LASTRX and task DMA.TX.START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "LASTTX_DMA_RX_START,Shortcut between event LASTTX and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disable,1: Enable" bitfld.long 0x0 13. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4C4++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIM" group.long 0x524++0x3 line.long 0x0 "FREQUENCY,TWI frequency. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "FREQUENCY,TWI master clock frequency" group.long 0x588++0x3 line.long 0x0 "ADDRESS,Address used in the TWI transfer" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,Address used in the TWI transfer" tree "DMA" base ad:0x400C8000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C8000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIM22_S" base ad:0x500C8000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" tree "SUBSCRIBE_DMA" base ad:0x500C8000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x400C60D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end tree "TASKS_DMA" base ad:0x500C8000 tree "RX (Peripheral tasks.)" base ad:0x400C6028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x400C6050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x500C8000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x128++0x3 line.long 0x0 "EVENTS_SUSPENDED,SUSPEND task has been issued. TWI traffic is now suspended." bitfld.long 0x0 0. "EVENTS_SUSPENDED,SUSPEND task has been issued TWI traffic is now suspended." "0: Event not generated,1: Event generated" group.long 0x134++0x7 line.long 0x0 "EVENTS_LASTRX,Byte boundary. starting to receive the last byte" bitfld.long 0x0 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LASTTX,Byte boundary. starting to transmit the last byte" bitfld.long 0x4 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500C8000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x500C8000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A8++0x3 line.long 0x0 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to" group.long 0x1B4++0x7 line.long 0x0 "PUBLISH_LASTRX,Publish configuration for event LASTRX" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to" line.long 0x4 "PUBLISH_LASTTX,Publish configuration for event LASTTX" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to" tree "PUBLISH_DMA" base ad:0x500C8000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x500C8000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 10. "LASTRX_DMA_TX_START,Shortcut between event LASTRX and task DMA.TX.START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "LASTTX_DMA_RX_START,Shortcut between event LASTTX and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disable,1: Enable" bitfld.long 0x0 13. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4C4++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIM" group.long 0x524++0x3 line.long 0x0 "FREQUENCY,TWI frequency. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "FREQUENCY,TWI master clock frequency" group.long 0x588++0x3 line.long 0x0 "ADDRESS,Address used in the TWI transfer" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,Address used in the TWI transfer" tree "DMA" base ad:0x500C8000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C8000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIM30_NS" base ad:0x40104000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" tree "SUBSCRIBE_DMA" base ad:0x40104000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x400C60D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end tree "TASKS_DMA" base ad:0x40104000 tree "RX (Peripheral tasks.)" base ad:0x400C6028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x400C6050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x40104000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x128++0x3 line.long 0x0 "EVENTS_SUSPENDED,SUSPEND task has been issued. TWI traffic is now suspended." bitfld.long 0x0 0. "EVENTS_SUSPENDED,SUSPEND task has been issued TWI traffic is now suspended." "0: Event not generated,1: Event generated" group.long 0x134++0x7 line.long 0x0 "EVENTS_LASTRX,Byte boundary. starting to receive the last byte" bitfld.long 0x0 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LASTTX,Byte boundary. starting to transmit the last byte" bitfld.long 0x4 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x40104000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x40104000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A8++0x3 line.long 0x0 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to" group.long 0x1B4++0x7 line.long 0x0 "PUBLISH_LASTRX,Publish configuration for event LASTRX" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to" line.long 0x4 "PUBLISH_LASTTX,Publish configuration for event LASTTX" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to" tree "PUBLISH_DMA" base ad:0x40104000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x40104000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 10. "LASTRX_DMA_TX_START,Shortcut between event LASTRX and task DMA.TX.START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "LASTTX_DMA_RX_START,Shortcut between event LASTTX and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disable,1: Enable" bitfld.long 0x0 13. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4C4++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIM" group.long 0x524++0x3 line.long 0x0 "FREQUENCY,TWI frequency. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "FREQUENCY,TWI master clock frequency" group.long 0x588++0x3 line.long 0x0 "ADDRESS,Address used in the TWI transfer" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,Address used in the TWI transfer" tree "DMA" base ad:0x40104000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x40104000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIM30_S" base ad:0x50104000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction. Must be issued while the TWI master is not suspended." "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" tree "SUBSCRIBE_DMA" base ad:0x50104000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x400C60D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end tree "TASKS_DMA" base ad:0x50104000 tree "RX (Peripheral tasks.)" base ad:0x400C6028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x400C6050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x50104000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0x104++0x3 line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x128++0x3 line.long 0x0 "EVENTS_SUSPENDED,SUSPEND task has been issued. TWI traffic is now suspended." bitfld.long 0x0 0. "EVENTS_SUSPENDED,SUSPEND task has been issued TWI traffic is now suspended." "0: Event not generated,1: Event generated" group.long 0x134++0x7 line.long 0x0 "EVENTS_LASTRX,Byte boundary. starting to receive the last byte" bitfld.long 0x0 0. "EVENTS_LASTRX,Byte boundary starting to receive the last byte" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_LASTTX,Byte boundary. starting to transmit the last byte" bitfld.long 0x4 0. "EVENTS_LASTTX,Byte boundary starting to transmit the last byte" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x50104000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x50104000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A8++0x3 line.long 0x0 "PUBLISH_SUSPENDED,Publish configuration for event SUSPENDED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event SUSPENDED will publish to" group.long 0x1B4++0x7 line.long 0x0 "PUBLISH_LASTRX,Publish configuration for event LASTRX" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event LASTRX will publish to" line.long 0x4 "PUBLISH_LASTTX,Publish configuration for event LASTTX" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event LASTTX will publish to" tree "PUBLISH_DMA" base ad:0x50104000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x50104000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 12. "LASTRX_STOP,Shortcut between event LASTRX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 10. "LASTRX_DMA_TX_START,Shortcut between event LASTRX and task DMA.TX.START" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 9. "LASTTX_STOP,Shortcut between event LASTTX and task STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 8. "LASTTX_SUSPEND,Shortcut between event LASTTX and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 7. "LASTTX_DMA_RX_START,Shortcut between event LASTTX and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 14. "LASTTX,Enable or disable interrupt for event LASTTX" "0: Disable,1: Enable" bitfld.long 0x0 13. "LASTRX,Enable or disable interrupt for event LASTRX" "0: Disable,1: Enable" newline bitfld.long 0x0 10. "SUSPENDED,Enable or disable interrupt for event SUSPENDED" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 14. "LASTTX,Write '1' to enable interrupt for event LASTTX" "0: Read: Disabled,1: Enable" bitfld.long 0x4 13. "LASTRX,Write '1' to enable interrupt for event LASTRX" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 10. "SUSPENDED,Write '1' to enable interrupt for event SUSPENDED" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 14. "LASTTX,Write '1' to disable interrupt for event LASTTX" "0: Read: Disabled,1: Disable" bitfld.long 0x8 13. "LASTRX,Write '1' to disable interrupt for event LASTRX" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 10. "SUSPENDED,Write '1' to disable interrupt for event SUSPENDED" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4C4++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 2. "DNACK,NACK received after sending a data byte (write '1' to clear)" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 1. "ANACK,NACK received after sending the address (write '1' to clear)" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Error did not occur,1: Error occurred" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIM" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIM" group.long 0x524++0x3 line.long 0x0 "FREQUENCY,TWI frequency. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "FREQUENCY,TWI master clock frequency" group.long 0x588++0x3 line.long 0x0 "ADDRESS,Address used in the TWI transfer" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,Address used in the TWI transfer" tree "DMA" base ad:0x50104000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x50104000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree.end tree "TWIS (Two-Wire Interface - Slave)" base ad:0x0 tree "GLOBAL_TWIS20_NS" base ad:0x400C6000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction" bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" wgroup.long 0x20++0x7 line.long 0x0 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" bitfld.long 0x0 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task" line.long 0x4 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" bitfld.long 0x4 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x400C6030 tree "RX (Peripheral tasks.)" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x400C6000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0xA0++0x7 line.long 0x0 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to" line.long 0x4 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x400C60B0 tree "RX (Subscribe configuration for tasks)" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x400C6000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x13C++0x7 line.long 0x0 "EVENTS_WRITE,Write command received" bitfld.long 0x0 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_READ,Read command received" bitfld.long 0x4 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400C614C tree "RX (Peripheral events.)" group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x400C6000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1BC++0x7 line.long 0x0 "PUBLISH_WRITE,Publish configuration for event WRITE" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to" line.long 0x4 "PUBLISH_READ,Publish configuration for event READ" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to" tree "PUBLISH_DMA" base ad:0x400C61CC tree "RX (Publish configuration for events)" group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x400C6000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "READ,Enable or disable interrupt for event READ" "0: Disable,1: Enable" bitfld.long 0x0 15. "WRITE,Enable or disable interrupt for event WRITE" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "READ,Write '1' to enable interrupt for event READ" "0: Read: Disabled,1: Enable" bitfld.long 0x4 15. "WRITE,Write '1' to enable interrupt for event WRITE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "READ,Write '1' to disable interrupt for event READ" "0: Read: Disabled,1: Disable" bitfld.long 0x8 15. "WRITE,Write '1' to disable interrupt for event WRITE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4D0++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred" rgroup.long 0x4D4++0x3 line.long 0x0 "MATCH,Status register indicating which address had a match" bitfld.long 0x0 0. "MATCH,Indication of which address in ADDRESS that matched the incoming address" "0,1" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIS" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIS" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x588)++0x3 line.long 0x0 "ADDRESS[$1],Description collection: TWI slave address n" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,TWI slave address" repeat.end group.long 0x594++0x3 line.long 0x0 "CONFIG,Configuration register for the address match mechanism" bitfld.long 0x0 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled" bitfld.long 0x0 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled" group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." tree "DMA" base ad:0x400C6700 tree "RX (Unspecified)" group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C6600 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIS20_S" base ad:0x500C6000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction" bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" wgroup.long 0x20++0x7 line.long 0x0 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" bitfld.long 0x0 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task" line.long 0x4 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" bitfld.long 0x4 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x500C6000 tree "RX (Peripheral tasks.)" base ad:0x400C6030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x500C6000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0xA0++0x7 line.long 0x0 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to" line.long 0x4 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x500C6000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x500C6000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x13C++0x7 line.long 0x0 "EVENTS_WRITE,Write command received" bitfld.long 0x0 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_READ,Read command received" bitfld.long 0x4 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500C6000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x500C6000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1BC++0x7 line.long 0x0 "PUBLISH_WRITE,Publish configuration for event WRITE" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to" line.long 0x4 "PUBLISH_READ,Publish configuration for event READ" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to" tree "PUBLISH_DMA" base ad:0x500C6000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x500C6000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "READ,Enable or disable interrupt for event READ" "0: Disable,1: Enable" bitfld.long 0x0 15. "WRITE,Enable or disable interrupt for event WRITE" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "READ,Write '1' to enable interrupt for event READ" "0: Read: Disabled,1: Enable" bitfld.long 0x4 15. "WRITE,Write '1' to enable interrupt for event WRITE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "READ,Write '1' to disable interrupt for event READ" "0: Read: Disabled,1: Disable" bitfld.long 0x8 15. "WRITE,Write '1' to disable interrupt for event WRITE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4D0++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred" rgroup.long 0x4D4++0x3 line.long 0x0 "MATCH,Status register indicating which address had a match" bitfld.long 0x0 0. "MATCH,Indication of which address in ADDRESS that matched the incoming address" "0,1" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIS" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIS" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x588)++0x3 line.long 0x0 "ADDRESS[$1],Description collection: TWI slave address n" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,TWI slave address" repeat.end group.long 0x594++0x3 line.long 0x0 "CONFIG,Configuration register for the address match mechanism" bitfld.long 0x0 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled" bitfld.long 0x0 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled" group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." tree "DMA" base ad:0x500C6000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C6000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIS21_NS" base ad:0x400C7000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction" bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" wgroup.long 0x20++0x7 line.long 0x0 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" bitfld.long 0x0 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task" line.long 0x4 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" bitfld.long 0x4 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x400C7000 tree "RX (Peripheral tasks.)" base ad:0x400C6030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x400C7000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0xA0++0x7 line.long 0x0 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to" line.long 0x4 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x400C7000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x400C7000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x13C++0x7 line.long 0x0 "EVENTS_WRITE,Write command received" bitfld.long 0x0 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_READ,Read command received" bitfld.long 0x4 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400C7000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x400C7000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1BC++0x7 line.long 0x0 "PUBLISH_WRITE,Publish configuration for event WRITE" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to" line.long 0x4 "PUBLISH_READ,Publish configuration for event READ" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to" tree "PUBLISH_DMA" base ad:0x400C7000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x400C7000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "READ,Enable or disable interrupt for event READ" "0: Disable,1: Enable" bitfld.long 0x0 15. "WRITE,Enable or disable interrupt for event WRITE" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "READ,Write '1' to enable interrupt for event READ" "0: Read: Disabled,1: Enable" bitfld.long 0x4 15. "WRITE,Write '1' to enable interrupt for event WRITE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "READ,Write '1' to disable interrupt for event READ" "0: Read: Disabled,1: Disable" bitfld.long 0x8 15. "WRITE,Write '1' to disable interrupt for event WRITE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4D0++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred" rgroup.long 0x4D4++0x3 line.long 0x0 "MATCH,Status register indicating which address had a match" bitfld.long 0x0 0. "MATCH,Indication of which address in ADDRESS that matched the incoming address" "0,1" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIS" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIS" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x588)++0x3 line.long 0x0 "ADDRESS[$1],Description collection: TWI slave address n" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,TWI slave address" repeat.end group.long 0x594++0x3 line.long 0x0 "CONFIG,Configuration register for the address match mechanism" bitfld.long 0x0 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled" bitfld.long 0x0 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled" group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." tree "DMA" base ad:0x400C7000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C7000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIS21_S" base ad:0x500C7000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction" bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" wgroup.long 0x20++0x7 line.long 0x0 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" bitfld.long 0x0 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task" line.long 0x4 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" bitfld.long 0x4 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x500C7000 tree "RX (Peripheral tasks.)" base ad:0x400C6030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x500C7000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0xA0++0x7 line.long 0x0 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to" line.long 0x4 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x500C7000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x500C7000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x13C++0x7 line.long 0x0 "EVENTS_WRITE,Write command received" bitfld.long 0x0 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_READ,Read command received" bitfld.long 0x4 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500C7000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x500C7000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1BC++0x7 line.long 0x0 "PUBLISH_WRITE,Publish configuration for event WRITE" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to" line.long 0x4 "PUBLISH_READ,Publish configuration for event READ" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to" tree "PUBLISH_DMA" base ad:0x500C7000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x500C7000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "READ,Enable or disable interrupt for event READ" "0: Disable,1: Enable" bitfld.long 0x0 15. "WRITE,Enable or disable interrupt for event WRITE" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "READ,Write '1' to enable interrupt for event READ" "0: Read: Disabled,1: Enable" bitfld.long 0x4 15. "WRITE,Write '1' to enable interrupt for event WRITE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "READ,Write '1' to disable interrupt for event READ" "0: Read: Disabled,1: Disable" bitfld.long 0x8 15. "WRITE,Write '1' to disable interrupt for event WRITE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4D0++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred" rgroup.long 0x4D4++0x3 line.long 0x0 "MATCH,Status register indicating which address had a match" bitfld.long 0x0 0. "MATCH,Indication of which address in ADDRESS that matched the incoming address" "0,1" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIS" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIS" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x588)++0x3 line.long 0x0 "ADDRESS[$1],Description collection: TWI slave address n" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,TWI slave address" repeat.end group.long 0x594++0x3 line.long 0x0 "CONFIG,Configuration register for the address match mechanism" bitfld.long 0x0 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled" bitfld.long 0x0 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled" group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." tree "DMA" base ad:0x500C7000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C7000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIS22_NS" base ad:0x400C8000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction" bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" wgroup.long 0x20++0x7 line.long 0x0 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" bitfld.long 0x0 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task" line.long 0x4 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" bitfld.long 0x4 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x400C8000 tree "RX (Peripheral tasks.)" base ad:0x400C6030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x400C8000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0xA0++0x7 line.long 0x0 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to" line.long 0x4 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x400C8000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x400C8000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x13C++0x7 line.long 0x0 "EVENTS_WRITE,Write command received" bitfld.long 0x0 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_READ,Read command received" bitfld.long 0x4 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400C8000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x400C8000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1BC++0x7 line.long 0x0 "PUBLISH_WRITE,Publish configuration for event WRITE" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to" line.long 0x4 "PUBLISH_READ,Publish configuration for event READ" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to" tree "PUBLISH_DMA" base ad:0x400C8000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x400C8000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "READ,Enable or disable interrupt for event READ" "0: Disable,1: Enable" bitfld.long 0x0 15. "WRITE,Enable or disable interrupt for event WRITE" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "READ,Write '1' to enable interrupt for event READ" "0: Read: Disabled,1: Enable" bitfld.long 0x4 15. "WRITE,Write '1' to enable interrupt for event WRITE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "READ,Write '1' to disable interrupt for event READ" "0: Read: Disabled,1: Disable" bitfld.long 0x8 15. "WRITE,Write '1' to disable interrupt for event WRITE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4D0++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred" rgroup.long 0x4D4++0x3 line.long 0x0 "MATCH,Status register indicating which address had a match" bitfld.long 0x0 0. "MATCH,Indication of which address in ADDRESS that matched the incoming address" "0,1" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIS" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIS" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x588)++0x3 line.long 0x0 "ADDRESS[$1],Description collection: TWI slave address n" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,TWI slave address" repeat.end group.long 0x594++0x3 line.long 0x0 "CONFIG,Configuration register for the address match mechanism" bitfld.long 0x0 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled" bitfld.long 0x0 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled" group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." tree "DMA" base ad:0x400C8000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C8000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIS22_S" base ad:0x500C8000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction" bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" wgroup.long 0x20++0x7 line.long 0x0 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" bitfld.long 0x0 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task" line.long 0x4 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" bitfld.long 0x4 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x500C8000 tree "RX (Peripheral tasks.)" base ad:0x400C6030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x500C8000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0xA0++0x7 line.long 0x0 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to" line.long 0x4 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x500C8000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x500C8000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x13C++0x7 line.long 0x0 "EVENTS_WRITE,Write command received" bitfld.long 0x0 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_READ,Read command received" bitfld.long 0x4 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500C8000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x500C8000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1BC++0x7 line.long 0x0 "PUBLISH_WRITE,Publish configuration for event WRITE" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to" line.long 0x4 "PUBLISH_READ,Publish configuration for event READ" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to" tree "PUBLISH_DMA" base ad:0x500C8000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x500C8000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "READ,Enable or disable interrupt for event READ" "0: Disable,1: Enable" bitfld.long 0x0 15. "WRITE,Enable or disable interrupt for event WRITE" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "READ,Write '1' to enable interrupt for event READ" "0: Read: Disabled,1: Enable" bitfld.long 0x4 15. "WRITE,Write '1' to enable interrupt for event WRITE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "READ,Write '1' to disable interrupt for event READ" "0: Read: Disabled,1: Disable" bitfld.long 0x8 15. "WRITE,Write '1' to disable interrupt for event WRITE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4D0++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred" rgroup.long 0x4D4++0x3 line.long 0x0 "MATCH,Status register indicating which address had a match" bitfld.long 0x0 0. "MATCH,Indication of which address in ADDRESS that matched the incoming address" "0,1" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIS" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIS" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x588)++0x3 line.long 0x0 "ADDRESS[$1],Description collection: TWI slave address n" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,TWI slave address" repeat.end group.long 0x594++0x3 line.long 0x0 "CONFIG,Configuration register for the address match mechanism" bitfld.long 0x0 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled" bitfld.long 0x0 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled" group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." tree "DMA" base ad:0x500C8000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C8000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIS30_NS" base ad:0x40104000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction" bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" wgroup.long 0x20++0x7 line.long 0x0 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" bitfld.long 0x0 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task" line.long 0x4 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" bitfld.long 0x4 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x40104000 tree "RX (Peripheral tasks.)" base ad:0x400C6030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x40104000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0xA0++0x7 line.long 0x0 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to" line.long 0x4 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x40104000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x40104000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x13C++0x7 line.long 0x0 "EVENTS_WRITE,Write command received" bitfld.long 0x0 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_READ,Read command received" bitfld.long 0x4 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x40104000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x40104000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1BC++0x7 line.long 0x0 "PUBLISH_WRITE,Publish configuration for event WRITE" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to" line.long 0x4 "PUBLISH_READ,Publish configuration for event READ" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to" tree "PUBLISH_DMA" base ad:0x40104000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x40104000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "READ,Enable or disable interrupt for event READ" "0: Disable,1: Enable" bitfld.long 0x0 15. "WRITE,Enable or disable interrupt for event WRITE" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "READ,Write '1' to enable interrupt for event READ" "0: Read: Disabled,1: Enable" bitfld.long 0x4 15. "WRITE,Write '1' to enable interrupt for event WRITE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "READ,Write '1' to disable interrupt for event READ" "0: Read: Disabled,1: Disable" bitfld.long 0x8 15. "WRITE,Write '1' to disable interrupt for event WRITE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4D0++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred" rgroup.long 0x4D4++0x3 line.long 0x0 "MATCH,Status register indicating which address had a match" bitfld.long 0x0 0. "MATCH,Indication of which address in ADDRESS that matched the incoming address" "0,1" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIS" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIS" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x588)++0x3 line.long 0x0 "ADDRESS[$1],Description collection: TWI slave address n" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,TWI slave address" repeat.end group.long 0x594++0x3 line.long 0x0 "CONFIG,Configuration register for the address match mechanism" bitfld.long 0x0 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled" bitfld.long 0x0 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled" group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." tree "DMA" base ad:0x40104000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x40104000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_TWIS30_S" base ad:0x50104000 wgroup.long 0x4++0x3 line.long 0x0 "TASKS_STOP,Stop TWI transaction" bitfld.long 0x0 0. "TASKS_STOP,Stop TWI transaction" "?,1: Trigger task" wgroup.long 0xC++0x7 line.long 0x0 "TASKS_SUSPEND,Suspend TWI transaction" bitfld.long 0x0 0. "TASKS_SUSPEND,Suspend TWI transaction" "?,1: Trigger task" line.long 0x4 "TASKS_RESUME,Resume TWI transaction" bitfld.long 0x4 0. "TASKS_RESUME,Resume TWI transaction" "?,1: Trigger task" wgroup.long 0x20++0x7 line.long 0x0 "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" bitfld.long 0x0 0. "TASKS_PREPARERX,Prepare the TWI slave to respond to a write command" "?,1: Trigger task" line.long 0x4 "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" bitfld.long 0x4 0. "TASKS_PREPARETX,Prepare the TWI slave to respond to a read command" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x50104000 tree "RX (Peripheral tasks.)" base ad:0x400C6030 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree.end base ad:0x50104000 newline group.long 0x84++0x3 newline line.long 0x0 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x8C++0x7 line.long 0x0 "SUBSCRIBE_SUSPEND,Subscribe configuration for task SUSPEND" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task SUSPEND will subscribe to" line.long 0x4 "SUBSCRIBE_RESUME,Subscribe configuration for task RESUME" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task RESUME will subscribe to" group.long 0xA0++0x7 line.long 0x0 "SUBSCRIBE_PREPARERX,Subscribe configuration for task PREPARERX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task PREPARERX will subscribe to" line.long 0x4 "SUBSCRIBE_PREPARETX,Subscribe configuration for task PREPARETX" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task PREPARETX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x50104000 tree "RX (Subscribe configuration for tasks)" base ad:0x400C60B0 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree.end base ad:0x50104000 newline group.long 0x104++0x3 newline line.long 0x0 "EVENTS_STOPPED,TWI stopped" bitfld.long 0x0 0. "EVENTS_STOPPED,TWI stopped" "0: Event not generated,1: Event generated" group.long 0x114++0x3 line.long 0x0 "EVENTS_ERROR,TWI error" bitfld.long 0x0 0. "EVENTS_ERROR,TWI error" "0: Event not generated,1: Event generated" group.long 0x13C++0x7 line.long 0x0 "EVENTS_WRITE,Write command received" bitfld.long 0x0 0. "EVENTS_WRITE,Write command received" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_READ,Read command received" bitfld.long 0x4 0. "EVENTS_READ,Read command received" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x50104000 tree "RX (Peripheral events.)" base ad:0x400C614C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x400C6168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x50104000 newline group.long 0x184++0x3 newline line.long 0x0 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x194++0x3 line.long 0x0 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1BC++0x7 line.long 0x0 "PUBLISH_WRITE,Publish configuration for event WRITE" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event WRITE will publish to" line.long 0x4 "PUBLISH_READ,Publish configuration for event READ" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READ will publish to" tree "PUBLISH_DMA" base ad:0x50104000 tree "RX (Publish configuration for events)" base ad:0x400C61CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x400C61E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x50104000 newline group.long 0x200++0x3 newline line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 14. "READ_SUSPEND,Shortcut between event READ and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 13. "WRITE_SUSPEND,Shortcut between event WRITE and task SUSPEND" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "READ,Enable or disable interrupt for event READ" "0: Disable,1: Enable" bitfld.long 0x0 15. "WRITE,Enable or disable interrupt for event WRITE" "0: Disable,1: Enable" newline bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" bitfld.long 0x0 1. "STOPPED,Enable or disable interrupt for event STOPPED" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "READ,Write '1' to enable interrupt for event READ" "0: Read: Disabled,1: Enable" bitfld.long 0x4 15. "WRITE,Write '1' to enable interrupt for event WRITE" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "READ,Write '1' to disable interrupt for event READ" "0: Read: Disabled,1: Disable" bitfld.long 0x8 15. "WRITE,Write '1' to disable interrupt for event WRITE" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" group.long 0x4D0++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "OVERREAD,TX buffer over-read detected and prevented" "0: Error did not occur,1: Error occurred" bitfld.long 0x0 2. "DNACK,NACK sent after receiving a data byte" "0: Error did not occur,1: Error occurred" newline bitfld.long 0x0 0. "OVERFLOW,RX buffer overflow detected and prevented" "0: Error did not occur,1: Error occurred" rgroup.long 0x4D4++0x3 line.long 0x0 "MATCH,Status register indicating which address had a match" bitfld.long 0x0 0. "MATCH,Indication of which address in ADDRESS that matched the incoming address" "0,1" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable TWIS" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable TWIS" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x588)++0x3 line.long 0x0 "ADDRESS[$1],Description collection: TWI slave address n" hexmask.long.byte 0x0 0.--6. 1. "ADDRESS,TWI slave address" repeat.end group.long 0x594++0x3 line.long 0x0 "CONFIG,Configuration register for the address match mechanism" bitfld.long 0x0 1. "ADDRESS1,Enable or disable address matching on ADDRESS[1]" "0: Disabled,1: Enabled" bitfld.long 0x0 0. "ADDRESS0,Enable or disable address matching on ADDRESS[0]" "0: Disabled,1: Enabled" group.long 0x5C0++0x3 line.long 0x0 "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." hexmask.long.byte 0x0 0.--7. 1. "ORC,Over-read character. Character sent out in case of an over-read of the transmit buffer." tree "DMA" base ad:0x50104000 tree "RX (Unspecified)" base ad:0x400C6700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x400C6724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or sticky" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long 0x0 0.--31. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x400C6738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x7 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" line.long 0x4 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x4 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x50104000 group.long 0x0++0x7 line.long 0x0 "SCL,Pin select for SCL signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "SDA,Pin select for SDA signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" tree.end tree.end tree.end tree "UARTE (Universal Asynchronous Receiver/Transmitter)" base ad:0x0 tree "GLOBAL_UARTE00_NS" base ad:0x4004A000 wgroup.long 0x1C++0x3 line.long 0x0 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" bitfld.long 0x0 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x4004A028 tree "RX (Peripheral tasks.)" wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x4004A050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x4004A000 newline group.long 0x9C++0x3 newline line.long 0x0 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x4004A0A8 tree "RX (Subscribe configuration for tasks)" group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x4004A0D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end base ad:0x4004A000 newline group.long 0x100++0x7 newline line.long 0x0 "EVENTS_CTS,CTS is activated (set low). Clear To Send." bitfld.long 0x0 0. "EVENTS_CTS,CTS is activated (set low). Clear To Send." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." bitfld.long 0x4 0. "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." "0: Event not generated,1: Event generated" group.long 0x10C++0xB line.long 0x0 "EVENTS_TXDRDY,Data sent from TXD" bitfld.long 0x0 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" bitfld.long 0x4 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ERROR,Error detected" bitfld.long 0x8 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated" group.long 0x124++0x3 line.long 0x0 "EVENTS_RXTO,Receiver timeout" bitfld.long 0x0 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated" group.long 0x130++0x3 line.long 0x0 "EVENTS_TXSTOPPED,Transmitter stopped" bitfld.long 0x0 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x4004A14C tree "RX (Peripheral events.)" group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x4004A000 newline group.long 0x174++0x3 newline line.long 0x0 "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." bitfld.long 0x0 0. "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_CTS,Publish configuration for event CTS" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to" line.long 0x4 "PUBLISH_NCTS,Publish configuration for event NCTS" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to" group.long 0x18C++0xB line.long 0x0 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to" line.long 0x4 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to" line.long 0x8 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A4++0x3 line.long 0x0 "PUBLISH_RXTO,Publish configuration for event RXTO" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to" group.long 0x1B0++0x3 line.long 0x0 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to" tree "PUBLISH_DMA" base ad:0x4004A1CC tree "RX (Publish configuration for events)" group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x4004A000 newline group.long 0x1F4++0x3 newline line.long 0x0 "PUBLISH_FRAMETIMEOUT,Publish configuration for event FRAMETIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event FRAMETIMEOUT will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 29. "FRAMETIMEOUT_DMA_RX_STOP,Shortcut between event FRAMETIMEOUT and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "DMA_TX_END_DMA_TX_STOP,Shortcut between event DMA.TX.END and task DMA.TX.STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_RX_END_DMA_RX_STOP,Shortcut between event DMA.RX.END and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DMA_RX_END_DMA_RX_START,Shortcut between event DMA.RX.END and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 29. "FRAMETIMEOUT,Enable or disable interrupt for event FRAMETIMEOUT" "0: Disable,1: Enable" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" bitfld.long 0x0 12. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "RXTO,Enable or disable interrupt for event RXTO" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disable,1: Enable" bitfld.long 0x0 3. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disable,1: Enable" bitfld.long 0x0 0. "CTS,Enable or disable interrupt for event CTS" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 29. "FRAMETIMEOUT,Write '1' to enable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Enable" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 3. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 29. "FRAMETIMEOUT,Write '1' to disable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Disable" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 3. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Disable" group.long 0x480++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present" newline bitfld.long 0x0 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable UART" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable UARTE" group.long 0x524++0x3 line.long 0x0 "BAUDRATE,Baud rate. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "BAUDRATE,Baud rate" group.long 0x56C++0x3 line.long 0x0 "CONFIG,Configuration of parity. hardware flow control. framesize. and packet timeout." bitfld.long 0x0 14. "FRAMETIMEOUT,Enable packet timeout." "0: Packet timeout is disabled.,1: Packet timeout is enabled." bitfld.long 0x0 13. "ENDIAN,Select if data is trimmed from MSB or LSB end when the data frame size is less than 8." "0: Data is trimmed from MSB end.,1: Data is trimmed from LSB end." newline hexmask.long.byte 0x0 9.--12. 1. "FRAMESIZE,Set the data frame size" bitfld.long 0x0 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits" bitfld.long 0x0 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit" newline bitfld.long 0x0 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled" group.long 0x574++0x7 line.long 0x0 "ADDRESS,Set the address of the UARTE for RX when used in 9 bit data frame mode." hexmask.long.byte 0x0 0.--7. 1. "ADDRESS,Set address" line.long 0x4 "FRAMETIMEOUT,Set the number of UARTE bits to count before triggering packet timeout." hexmask.long.word 0x4 0.--9. 1. "COUNTERTOP,Number of UARTE bits before timeout." tree "DMA" base ad:0x4004A700 tree "RX (Unspecified)" group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long.byte 0x0 0.--7. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x4004A604 group.long 0x0++0xF line.long 0x0 "TXD,Pin select for TXD signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "CTS,Pin select for CTS signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "RXD,Pin select for RXD signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "RTS,Pin select for RTS signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_UARTE00_S" base ad:0x5004A000 wgroup.long 0x1C++0x3 line.long 0x0 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" bitfld.long 0x0 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x5004A000 tree "RX (Peripheral tasks.)" base ad:0x4004A028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x4004A050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x5004A000 newline group.long 0x9C++0x3 newline line.long 0x0 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x5004A000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x4004A0D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end base ad:0x5004A000 newline group.long 0x100++0x7 newline line.long 0x0 "EVENTS_CTS,CTS is activated (set low). Clear To Send." bitfld.long 0x0 0. "EVENTS_CTS,CTS is activated (set low). Clear To Send." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." bitfld.long 0x4 0. "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." "0: Event not generated,1: Event generated" group.long 0x10C++0xB line.long 0x0 "EVENTS_TXDRDY,Data sent from TXD" bitfld.long 0x0 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" bitfld.long 0x4 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ERROR,Error detected" bitfld.long 0x8 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated" group.long 0x124++0x3 line.long 0x0 "EVENTS_RXTO,Receiver timeout" bitfld.long 0x0 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated" group.long 0x130++0x3 line.long 0x0 "EVENTS_TXSTOPPED,Transmitter stopped" bitfld.long 0x0 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x5004A000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x5004A000 newline group.long 0x174++0x3 newline line.long 0x0 "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." bitfld.long 0x0 0. "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_CTS,Publish configuration for event CTS" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to" line.long 0x4 "PUBLISH_NCTS,Publish configuration for event NCTS" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to" group.long 0x18C++0xB line.long 0x0 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to" line.long 0x4 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to" line.long 0x8 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A4++0x3 line.long 0x0 "PUBLISH_RXTO,Publish configuration for event RXTO" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to" group.long 0x1B0++0x3 line.long 0x0 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to" tree "PUBLISH_DMA" base ad:0x5004A000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x5004A000 newline group.long 0x1F4++0x3 newline line.long 0x0 "PUBLISH_FRAMETIMEOUT,Publish configuration for event FRAMETIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event FRAMETIMEOUT will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 29. "FRAMETIMEOUT_DMA_RX_STOP,Shortcut between event FRAMETIMEOUT and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "DMA_TX_END_DMA_TX_STOP,Shortcut between event DMA.TX.END and task DMA.TX.STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_RX_END_DMA_RX_STOP,Shortcut between event DMA.RX.END and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DMA_RX_END_DMA_RX_START,Shortcut between event DMA.RX.END and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 29. "FRAMETIMEOUT,Enable or disable interrupt for event FRAMETIMEOUT" "0: Disable,1: Enable" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" bitfld.long 0x0 12. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "RXTO,Enable or disable interrupt for event RXTO" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disable,1: Enable" bitfld.long 0x0 3. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disable,1: Enable" bitfld.long 0x0 0. "CTS,Enable or disable interrupt for event CTS" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 29. "FRAMETIMEOUT,Write '1' to enable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Enable" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 3. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 29. "FRAMETIMEOUT,Write '1' to disable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Disable" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 3. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Disable" group.long 0x480++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present" newline bitfld.long 0x0 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable UART" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable UARTE" group.long 0x524++0x3 line.long 0x0 "BAUDRATE,Baud rate. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "BAUDRATE,Baud rate" group.long 0x56C++0x3 line.long 0x0 "CONFIG,Configuration of parity. hardware flow control. framesize. and packet timeout." bitfld.long 0x0 14. "FRAMETIMEOUT,Enable packet timeout." "0: Packet timeout is disabled.,1: Packet timeout is enabled." bitfld.long 0x0 13. "ENDIAN,Select if data is trimmed from MSB or LSB end when the data frame size is less than 8." "0: Data is trimmed from MSB end.,1: Data is trimmed from LSB end." newline hexmask.long.byte 0x0 9.--12. 1. "FRAMESIZE,Set the data frame size" bitfld.long 0x0 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits" bitfld.long 0x0 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit" newline bitfld.long 0x0 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled" group.long 0x574++0x7 line.long 0x0 "ADDRESS,Set the address of the UARTE for RX when used in 9 bit data frame mode." hexmask.long.byte 0x0 0.--7. 1. "ADDRESS,Set address" line.long 0x4 "FRAMETIMEOUT,Set the number of UARTE bits to count before triggering packet timeout." hexmask.long.word 0x4 0.--9. 1. "COUNTERTOP,Number of UARTE bits before timeout." tree "DMA" base ad:0x5004A000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long.byte 0x0 0.--7. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x5004A000 group.long 0x0++0xF line.long 0x0 "TXD,Pin select for TXD signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "CTS,Pin select for CTS signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "RXD,Pin select for RXD signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "RTS,Pin select for RTS signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_UARTE20_NS" base ad:0x400C6000 wgroup.long 0x1C++0x3 line.long 0x0 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" bitfld.long 0x0 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x400C6000 tree "RX (Peripheral tasks.)" base ad:0x4004A028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x4004A050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x400C6000 newline group.long 0x9C++0x3 newline line.long 0x0 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x400C6000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x4004A0D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end base ad:0x400C6000 newline group.long 0x100++0x7 newline line.long 0x0 "EVENTS_CTS,CTS is activated (set low). Clear To Send." bitfld.long 0x0 0. "EVENTS_CTS,CTS is activated (set low). Clear To Send." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." bitfld.long 0x4 0. "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." "0: Event not generated,1: Event generated" group.long 0x10C++0xB line.long 0x0 "EVENTS_TXDRDY,Data sent from TXD" bitfld.long 0x0 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" bitfld.long 0x4 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ERROR,Error detected" bitfld.long 0x8 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated" group.long 0x124++0x3 line.long 0x0 "EVENTS_RXTO,Receiver timeout" bitfld.long 0x0 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated" group.long 0x130++0x3 line.long 0x0 "EVENTS_TXSTOPPED,Transmitter stopped" bitfld.long 0x0 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400C6000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x400C6000 newline group.long 0x174++0x3 newline line.long 0x0 "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." bitfld.long 0x0 0. "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_CTS,Publish configuration for event CTS" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to" line.long 0x4 "PUBLISH_NCTS,Publish configuration for event NCTS" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to" group.long 0x18C++0xB line.long 0x0 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to" line.long 0x4 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to" line.long 0x8 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A4++0x3 line.long 0x0 "PUBLISH_RXTO,Publish configuration for event RXTO" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to" group.long 0x1B0++0x3 line.long 0x0 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to" tree "PUBLISH_DMA" base ad:0x400C6000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x400C6000 newline group.long 0x1F4++0x3 newline line.long 0x0 "PUBLISH_FRAMETIMEOUT,Publish configuration for event FRAMETIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event FRAMETIMEOUT will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 29. "FRAMETIMEOUT_DMA_RX_STOP,Shortcut between event FRAMETIMEOUT and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "DMA_TX_END_DMA_TX_STOP,Shortcut between event DMA.TX.END and task DMA.TX.STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_RX_END_DMA_RX_STOP,Shortcut between event DMA.RX.END and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DMA_RX_END_DMA_RX_START,Shortcut between event DMA.RX.END and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 29. "FRAMETIMEOUT,Enable or disable interrupt for event FRAMETIMEOUT" "0: Disable,1: Enable" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" bitfld.long 0x0 12. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "RXTO,Enable or disable interrupt for event RXTO" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disable,1: Enable" bitfld.long 0x0 3. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disable,1: Enable" bitfld.long 0x0 0. "CTS,Enable or disable interrupt for event CTS" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 29. "FRAMETIMEOUT,Write '1' to enable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Enable" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 3. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 29. "FRAMETIMEOUT,Write '1' to disable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Disable" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 3. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Disable" group.long 0x480++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present" newline bitfld.long 0x0 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable UART" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable UARTE" group.long 0x524++0x3 line.long 0x0 "BAUDRATE,Baud rate. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "BAUDRATE,Baud rate" group.long 0x56C++0x3 line.long 0x0 "CONFIG,Configuration of parity. hardware flow control. framesize. and packet timeout." bitfld.long 0x0 14. "FRAMETIMEOUT,Enable packet timeout." "0: Packet timeout is disabled.,1: Packet timeout is enabled." bitfld.long 0x0 13. "ENDIAN,Select if data is trimmed from MSB or LSB end when the data frame size is less than 8." "0: Data is trimmed from MSB end.,1: Data is trimmed from LSB end." newline hexmask.long.byte 0x0 9.--12. 1. "FRAMESIZE,Set the data frame size" bitfld.long 0x0 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits" bitfld.long 0x0 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit" newline bitfld.long 0x0 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled" group.long 0x574++0x7 line.long 0x0 "ADDRESS,Set the address of the UARTE for RX when used in 9 bit data frame mode." hexmask.long.byte 0x0 0.--7. 1. "ADDRESS,Set address" line.long 0x4 "FRAMETIMEOUT,Set the number of UARTE bits to count before triggering packet timeout." hexmask.long.word 0x4 0.--9. 1. "COUNTERTOP,Number of UARTE bits before timeout." tree "DMA" base ad:0x400C6000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long.byte 0x0 0.--7. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C6000 group.long 0x0++0xF line.long 0x0 "TXD,Pin select for TXD signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "CTS,Pin select for CTS signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "RXD,Pin select for RXD signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "RTS,Pin select for RTS signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_UARTE20_S" base ad:0x500C6000 wgroup.long 0x1C++0x3 line.long 0x0 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" bitfld.long 0x0 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x500C6000 tree "RX (Peripheral tasks.)" base ad:0x4004A028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x4004A050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x500C6000 newline group.long 0x9C++0x3 newline line.long 0x0 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x500C6000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x4004A0D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end base ad:0x500C6000 newline group.long 0x100++0x7 newline line.long 0x0 "EVENTS_CTS,CTS is activated (set low). Clear To Send." bitfld.long 0x0 0. "EVENTS_CTS,CTS is activated (set low). Clear To Send." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." bitfld.long 0x4 0. "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." "0: Event not generated,1: Event generated" group.long 0x10C++0xB line.long 0x0 "EVENTS_TXDRDY,Data sent from TXD" bitfld.long 0x0 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" bitfld.long 0x4 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ERROR,Error detected" bitfld.long 0x8 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated" group.long 0x124++0x3 line.long 0x0 "EVENTS_RXTO,Receiver timeout" bitfld.long 0x0 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated" group.long 0x130++0x3 line.long 0x0 "EVENTS_TXSTOPPED,Transmitter stopped" bitfld.long 0x0 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500C6000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x500C6000 newline group.long 0x174++0x3 newline line.long 0x0 "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." bitfld.long 0x0 0. "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_CTS,Publish configuration for event CTS" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to" line.long 0x4 "PUBLISH_NCTS,Publish configuration for event NCTS" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to" group.long 0x18C++0xB line.long 0x0 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to" line.long 0x4 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to" line.long 0x8 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A4++0x3 line.long 0x0 "PUBLISH_RXTO,Publish configuration for event RXTO" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to" group.long 0x1B0++0x3 line.long 0x0 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to" tree "PUBLISH_DMA" base ad:0x500C6000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x500C6000 newline group.long 0x1F4++0x3 newline line.long 0x0 "PUBLISH_FRAMETIMEOUT,Publish configuration for event FRAMETIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event FRAMETIMEOUT will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 29. "FRAMETIMEOUT_DMA_RX_STOP,Shortcut between event FRAMETIMEOUT and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "DMA_TX_END_DMA_TX_STOP,Shortcut between event DMA.TX.END and task DMA.TX.STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_RX_END_DMA_RX_STOP,Shortcut between event DMA.RX.END and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DMA_RX_END_DMA_RX_START,Shortcut between event DMA.RX.END and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 29. "FRAMETIMEOUT,Enable or disable interrupt for event FRAMETIMEOUT" "0: Disable,1: Enable" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" bitfld.long 0x0 12. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "RXTO,Enable or disable interrupt for event RXTO" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disable,1: Enable" bitfld.long 0x0 3. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disable,1: Enable" bitfld.long 0x0 0. "CTS,Enable or disable interrupt for event CTS" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 29. "FRAMETIMEOUT,Write '1' to enable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Enable" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 3. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 29. "FRAMETIMEOUT,Write '1' to disable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Disable" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 3. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Disable" group.long 0x480++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present" newline bitfld.long 0x0 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable UART" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable UARTE" group.long 0x524++0x3 line.long 0x0 "BAUDRATE,Baud rate. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "BAUDRATE,Baud rate" group.long 0x56C++0x3 line.long 0x0 "CONFIG,Configuration of parity. hardware flow control. framesize. and packet timeout." bitfld.long 0x0 14. "FRAMETIMEOUT,Enable packet timeout." "0: Packet timeout is disabled.,1: Packet timeout is enabled." bitfld.long 0x0 13. "ENDIAN,Select if data is trimmed from MSB or LSB end when the data frame size is less than 8." "0: Data is trimmed from MSB end.,1: Data is trimmed from LSB end." newline hexmask.long.byte 0x0 9.--12. 1. "FRAMESIZE,Set the data frame size" bitfld.long 0x0 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits" bitfld.long 0x0 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit" newline bitfld.long 0x0 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled" group.long 0x574++0x7 line.long 0x0 "ADDRESS,Set the address of the UARTE for RX when used in 9 bit data frame mode." hexmask.long.byte 0x0 0.--7. 1. "ADDRESS,Set address" line.long 0x4 "FRAMETIMEOUT,Set the number of UARTE bits to count before triggering packet timeout." hexmask.long.word 0x4 0.--9. 1. "COUNTERTOP,Number of UARTE bits before timeout." tree "DMA" base ad:0x500C6000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long.byte 0x0 0.--7. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C6000 group.long 0x0++0xF line.long 0x0 "TXD,Pin select for TXD signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "CTS,Pin select for CTS signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "RXD,Pin select for RXD signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "RTS,Pin select for RTS signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_UARTE21_NS" base ad:0x400C7000 wgroup.long 0x1C++0x3 line.long 0x0 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" bitfld.long 0x0 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x400C7000 tree "RX (Peripheral tasks.)" base ad:0x4004A028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x4004A050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x400C7000 newline group.long 0x9C++0x3 newline line.long 0x0 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x400C7000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x4004A0D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end base ad:0x400C7000 newline group.long 0x100++0x7 newline line.long 0x0 "EVENTS_CTS,CTS is activated (set low). Clear To Send." bitfld.long 0x0 0. "EVENTS_CTS,CTS is activated (set low). Clear To Send." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." bitfld.long 0x4 0. "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." "0: Event not generated,1: Event generated" group.long 0x10C++0xB line.long 0x0 "EVENTS_TXDRDY,Data sent from TXD" bitfld.long 0x0 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" bitfld.long 0x4 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ERROR,Error detected" bitfld.long 0x8 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated" group.long 0x124++0x3 line.long 0x0 "EVENTS_RXTO,Receiver timeout" bitfld.long 0x0 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated" group.long 0x130++0x3 line.long 0x0 "EVENTS_TXSTOPPED,Transmitter stopped" bitfld.long 0x0 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400C7000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x400C7000 newline group.long 0x174++0x3 newline line.long 0x0 "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." bitfld.long 0x0 0. "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_CTS,Publish configuration for event CTS" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to" line.long 0x4 "PUBLISH_NCTS,Publish configuration for event NCTS" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to" group.long 0x18C++0xB line.long 0x0 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to" line.long 0x4 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to" line.long 0x8 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A4++0x3 line.long 0x0 "PUBLISH_RXTO,Publish configuration for event RXTO" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to" group.long 0x1B0++0x3 line.long 0x0 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to" tree "PUBLISH_DMA" base ad:0x400C7000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x400C7000 newline group.long 0x1F4++0x3 newline line.long 0x0 "PUBLISH_FRAMETIMEOUT,Publish configuration for event FRAMETIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event FRAMETIMEOUT will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 29. "FRAMETIMEOUT_DMA_RX_STOP,Shortcut between event FRAMETIMEOUT and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "DMA_TX_END_DMA_TX_STOP,Shortcut between event DMA.TX.END and task DMA.TX.STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_RX_END_DMA_RX_STOP,Shortcut between event DMA.RX.END and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DMA_RX_END_DMA_RX_START,Shortcut between event DMA.RX.END and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 29. "FRAMETIMEOUT,Enable or disable interrupt for event FRAMETIMEOUT" "0: Disable,1: Enable" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" bitfld.long 0x0 12. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "RXTO,Enable or disable interrupt for event RXTO" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disable,1: Enable" bitfld.long 0x0 3. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disable,1: Enable" bitfld.long 0x0 0. "CTS,Enable or disable interrupt for event CTS" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 29. "FRAMETIMEOUT,Write '1' to enable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Enable" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 3. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 29. "FRAMETIMEOUT,Write '1' to disable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Disable" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 3. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Disable" group.long 0x480++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present" newline bitfld.long 0x0 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable UART" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable UARTE" group.long 0x524++0x3 line.long 0x0 "BAUDRATE,Baud rate. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "BAUDRATE,Baud rate" group.long 0x56C++0x3 line.long 0x0 "CONFIG,Configuration of parity. hardware flow control. framesize. and packet timeout." bitfld.long 0x0 14. "FRAMETIMEOUT,Enable packet timeout." "0: Packet timeout is disabled.,1: Packet timeout is enabled." bitfld.long 0x0 13. "ENDIAN,Select if data is trimmed from MSB or LSB end when the data frame size is less than 8." "0: Data is trimmed from MSB end.,1: Data is trimmed from LSB end." newline hexmask.long.byte 0x0 9.--12. 1. "FRAMESIZE,Set the data frame size" bitfld.long 0x0 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits" bitfld.long 0x0 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit" newline bitfld.long 0x0 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled" group.long 0x574++0x7 line.long 0x0 "ADDRESS,Set the address of the UARTE for RX when used in 9 bit data frame mode." hexmask.long.byte 0x0 0.--7. 1. "ADDRESS,Set address" line.long 0x4 "FRAMETIMEOUT,Set the number of UARTE bits to count before triggering packet timeout." hexmask.long.word 0x4 0.--9. 1. "COUNTERTOP,Number of UARTE bits before timeout." tree "DMA" base ad:0x400C7000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long.byte 0x0 0.--7. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C7000 group.long 0x0++0xF line.long 0x0 "TXD,Pin select for TXD signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "CTS,Pin select for CTS signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "RXD,Pin select for RXD signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "RTS,Pin select for RTS signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_UARTE21_S" base ad:0x500C7000 wgroup.long 0x1C++0x3 line.long 0x0 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" bitfld.long 0x0 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x500C7000 tree "RX (Peripheral tasks.)" base ad:0x4004A028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x4004A050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x500C7000 newline group.long 0x9C++0x3 newline line.long 0x0 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x500C7000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x4004A0D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end base ad:0x500C7000 newline group.long 0x100++0x7 newline line.long 0x0 "EVENTS_CTS,CTS is activated (set low). Clear To Send." bitfld.long 0x0 0. "EVENTS_CTS,CTS is activated (set low). Clear To Send." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." bitfld.long 0x4 0. "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." "0: Event not generated,1: Event generated" group.long 0x10C++0xB line.long 0x0 "EVENTS_TXDRDY,Data sent from TXD" bitfld.long 0x0 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" bitfld.long 0x4 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ERROR,Error detected" bitfld.long 0x8 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated" group.long 0x124++0x3 line.long 0x0 "EVENTS_RXTO,Receiver timeout" bitfld.long 0x0 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated" group.long 0x130++0x3 line.long 0x0 "EVENTS_TXSTOPPED,Transmitter stopped" bitfld.long 0x0 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500C7000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x500C7000 newline group.long 0x174++0x3 newline line.long 0x0 "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." bitfld.long 0x0 0. "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_CTS,Publish configuration for event CTS" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to" line.long 0x4 "PUBLISH_NCTS,Publish configuration for event NCTS" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to" group.long 0x18C++0xB line.long 0x0 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to" line.long 0x4 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to" line.long 0x8 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A4++0x3 line.long 0x0 "PUBLISH_RXTO,Publish configuration for event RXTO" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to" group.long 0x1B0++0x3 line.long 0x0 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to" tree "PUBLISH_DMA" base ad:0x500C7000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x500C7000 newline group.long 0x1F4++0x3 newline line.long 0x0 "PUBLISH_FRAMETIMEOUT,Publish configuration for event FRAMETIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event FRAMETIMEOUT will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 29. "FRAMETIMEOUT_DMA_RX_STOP,Shortcut between event FRAMETIMEOUT and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "DMA_TX_END_DMA_TX_STOP,Shortcut between event DMA.TX.END and task DMA.TX.STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_RX_END_DMA_RX_STOP,Shortcut between event DMA.RX.END and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DMA_RX_END_DMA_RX_START,Shortcut between event DMA.RX.END and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 29. "FRAMETIMEOUT,Enable or disable interrupt for event FRAMETIMEOUT" "0: Disable,1: Enable" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" bitfld.long 0x0 12. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "RXTO,Enable or disable interrupt for event RXTO" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disable,1: Enable" bitfld.long 0x0 3. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disable,1: Enable" bitfld.long 0x0 0. "CTS,Enable or disable interrupt for event CTS" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 29. "FRAMETIMEOUT,Write '1' to enable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Enable" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 3. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 29. "FRAMETIMEOUT,Write '1' to disable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Disable" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 3. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Disable" group.long 0x480++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present" newline bitfld.long 0x0 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable UART" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable UARTE" group.long 0x524++0x3 line.long 0x0 "BAUDRATE,Baud rate. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "BAUDRATE,Baud rate" group.long 0x56C++0x3 line.long 0x0 "CONFIG,Configuration of parity. hardware flow control. framesize. and packet timeout." bitfld.long 0x0 14. "FRAMETIMEOUT,Enable packet timeout." "0: Packet timeout is disabled.,1: Packet timeout is enabled." bitfld.long 0x0 13. "ENDIAN,Select if data is trimmed from MSB or LSB end when the data frame size is less than 8." "0: Data is trimmed from MSB end.,1: Data is trimmed from LSB end." newline hexmask.long.byte 0x0 9.--12. 1. "FRAMESIZE,Set the data frame size" bitfld.long 0x0 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits" bitfld.long 0x0 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit" newline bitfld.long 0x0 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled" group.long 0x574++0x7 line.long 0x0 "ADDRESS,Set the address of the UARTE for RX when used in 9 bit data frame mode." hexmask.long.byte 0x0 0.--7. 1. "ADDRESS,Set address" line.long 0x4 "FRAMETIMEOUT,Set the number of UARTE bits to count before triggering packet timeout." hexmask.long.word 0x4 0.--9. 1. "COUNTERTOP,Number of UARTE bits before timeout." tree "DMA" base ad:0x500C7000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long.byte 0x0 0.--7. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C7000 group.long 0x0++0xF line.long 0x0 "TXD,Pin select for TXD signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "CTS,Pin select for CTS signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "RXD,Pin select for RXD signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "RTS,Pin select for RTS signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_UARTE22_NS" base ad:0x400C8000 wgroup.long 0x1C++0x3 line.long 0x0 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" bitfld.long 0x0 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x400C8000 tree "RX (Peripheral tasks.)" base ad:0x4004A028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x4004A050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x400C8000 newline group.long 0x9C++0x3 newline line.long 0x0 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x400C8000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x4004A0D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end base ad:0x400C8000 newline group.long 0x100++0x7 newline line.long 0x0 "EVENTS_CTS,CTS is activated (set low). Clear To Send." bitfld.long 0x0 0. "EVENTS_CTS,CTS is activated (set low). Clear To Send." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." bitfld.long 0x4 0. "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." "0: Event not generated,1: Event generated" group.long 0x10C++0xB line.long 0x0 "EVENTS_TXDRDY,Data sent from TXD" bitfld.long 0x0 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" bitfld.long 0x4 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ERROR,Error detected" bitfld.long 0x8 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated" group.long 0x124++0x3 line.long 0x0 "EVENTS_RXTO,Receiver timeout" bitfld.long 0x0 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated" group.long 0x130++0x3 line.long 0x0 "EVENTS_TXSTOPPED,Transmitter stopped" bitfld.long 0x0 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x400C8000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x400C8000 newline group.long 0x174++0x3 newline line.long 0x0 "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." bitfld.long 0x0 0. "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_CTS,Publish configuration for event CTS" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to" line.long 0x4 "PUBLISH_NCTS,Publish configuration for event NCTS" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to" group.long 0x18C++0xB line.long 0x0 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to" line.long 0x4 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to" line.long 0x8 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A4++0x3 line.long 0x0 "PUBLISH_RXTO,Publish configuration for event RXTO" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to" group.long 0x1B0++0x3 line.long 0x0 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to" tree "PUBLISH_DMA" base ad:0x400C8000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x400C8000 newline group.long 0x1F4++0x3 newline line.long 0x0 "PUBLISH_FRAMETIMEOUT,Publish configuration for event FRAMETIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event FRAMETIMEOUT will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 29. "FRAMETIMEOUT_DMA_RX_STOP,Shortcut between event FRAMETIMEOUT and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "DMA_TX_END_DMA_TX_STOP,Shortcut between event DMA.TX.END and task DMA.TX.STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_RX_END_DMA_RX_STOP,Shortcut between event DMA.RX.END and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DMA_RX_END_DMA_RX_START,Shortcut between event DMA.RX.END and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 29. "FRAMETIMEOUT,Enable or disable interrupt for event FRAMETIMEOUT" "0: Disable,1: Enable" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" bitfld.long 0x0 12. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "RXTO,Enable or disable interrupt for event RXTO" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disable,1: Enable" bitfld.long 0x0 3. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disable,1: Enable" bitfld.long 0x0 0. "CTS,Enable or disable interrupt for event CTS" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 29. "FRAMETIMEOUT,Write '1' to enable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Enable" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 3. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 29. "FRAMETIMEOUT,Write '1' to disable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Disable" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 3. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Disable" group.long 0x480++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present" newline bitfld.long 0x0 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable UART" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable UARTE" group.long 0x524++0x3 line.long 0x0 "BAUDRATE,Baud rate. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "BAUDRATE,Baud rate" group.long 0x56C++0x3 line.long 0x0 "CONFIG,Configuration of parity. hardware flow control. framesize. and packet timeout." bitfld.long 0x0 14. "FRAMETIMEOUT,Enable packet timeout." "0: Packet timeout is disabled.,1: Packet timeout is enabled." bitfld.long 0x0 13. "ENDIAN,Select if data is trimmed from MSB or LSB end when the data frame size is less than 8." "0: Data is trimmed from MSB end.,1: Data is trimmed from LSB end." newline hexmask.long.byte 0x0 9.--12. 1. "FRAMESIZE,Set the data frame size" bitfld.long 0x0 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits" bitfld.long 0x0 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit" newline bitfld.long 0x0 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled" group.long 0x574++0x7 line.long 0x0 "ADDRESS,Set the address of the UARTE for RX when used in 9 bit data frame mode." hexmask.long.byte 0x0 0.--7. 1. "ADDRESS,Set address" line.long 0x4 "FRAMETIMEOUT,Set the number of UARTE bits to count before triggering packet timeout." hexmask.long.word 0x4 0.--9. 1. "COUNTERTOP,Number of UARTE bits before timeout." tree "DMA" base ad:0x400C8000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long.byte 0x0 0.--7. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x400C8000 group.long 0x0++0xF line.long 0x0 "TXD,Pin select for TXD signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "CTS,Pin select for CTS signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "RXD,Pin select for RXD signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "RTS,Pin select for RTS signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_UARTE22_S" base ad:0x500C8000 wgroup.long 0x1C++0x3 line.long 0x0 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" bitfld.long 0x0 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x500C8000 tree "RX (Peripheral tasks.)" base ad:0x4004A028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x4004A050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x500C8000 newline group.long 0x9C++0x3 newline line.long 0x0 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x500C8000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x4004A0D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end base ad:0x500C8000 newline group.long 0x100++0x7 newline line.long 0x0 "EVENTS_CTS,CTS is activated (set low). Clear To Send." bitfld.long 0x0 0. "EVENTS_CTS,CTS is activated (set low). Clear To Send." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." bitfld.long 0x4 0. "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." "0: Event not generated,1: Event generated" group.long 0x10C++0xB line.long 0x0 "EVENTS_TXDRDY,Data sent from TXD" bitfld.long 0x0 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" bitfld.long 0x4 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ERROR,Error detected" bitfld.long 0x8 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated" group.long 0x124++0x3 line.long 0x0 "EVENTS_RXTO,Receiver timeout" bitfld.long 0x0 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated" group.long 0x130++0x3 line.long 0x0 "EVENTS_TXSTOPPED,Transmitter stopped" bitfld.long 0x0 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x500C8000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x500C8000 newline group.long 0x174++0x3 newline line.long 0x0 "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." bitfld.long 0x0 0. "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_CTS,Publish configuration for event CTS" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to" line.long 0x4 "PUBLISH_NCTS,Publish configuration for event NCTS" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to" group.long 0x18C++0xB line.long 0x0 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to" line.long 0x4 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to" line.long 0x8 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A4++0x3 line.long 0x0 "PUBLISH_RXTO,Publish configuration for event RXTO" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to" group.long 0x1B0++0x3 line.long 0x0 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to" tree "PUBLISH_DMA" base ad:0x500C8000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x500C8000 newline group.long 0x1F4++0x3 newline line.long 0x0 "PUBLISH_FRAMETIMEOUT,Publish configuration for event FRAMETIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event FRAMETIMEOUT will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 29. "FRAMETIMEOUT_DMA_RX_STOP,Shortcut between event FRAMETIMEOUT and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "DMA_TX_END_DMA_TX_STOP,Shortcut between event DMA.TX.END and task DMA.TX.STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_RX_END_DMA_RX_STOP,Shortcut between event DMA.RX.END and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DMA_RX_END_DMA_RX_START,Shortcut between event DMA.RX.END and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 29. "FRAMETIMEOUT,Enable or disable interrupt for event FRAMETIMEOUT" "0: Disable,1: Enable" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" bitfld.long 0x0 12. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "RXTO,Enable or disable interrupt for event RXTO" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disable,1: Enable" bitfld.long 0x0 3. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disable,1: Enable" bitfld.long 0x0 0. "CTS,Enable or disable interrupt for event CTS" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 29. "FRAMETIMEOUT,Write '1' to enable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Enable" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 3. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 29. "FRAMETIMEOUT,Write '1' to disable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Disable" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 3. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Disable" group.long 0x480++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present" newline bitfld.long 0x0 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable UART" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable UARTE" group.long 0x524++0x3 line.long 0x0 "BAUDRATE,Baud rate. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "BAUDRATE,Baud rate" group.long 0x56C++0x3 line.long 0x0 "CONFIG,Configuration of parity. hardware flow control. framesize. and packet timeout." bitfld.long 0x0 14. "FRAMETIMEOUT,Enable packet timeout." "0: Packet timeout is disabled.,1: Packet timeout is enabled." bitfld.long 0x0 13. "ENDIAN,Select if data is trimmed from MSB or LSB end when the data frame size is less than 8." "0: Data is trimmed from MSB end.,1: Data is trimmed from LSB end." newline hexmask.long.byte 0x0 9.--12. 1. "FRAMESIZE,Set the data frame size" bitfld.long 0x0 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits" bitfld.long 0x0 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit" newline bitfld.long 0x0 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled" group.long 0x574++0x7 line.long 0x0 "ADDRESS,Set the address of the UARTE for RX when used in 9 bit data frame mode." hexmask.long.byte 0x0 0.--7. 1. "ADDRESS,Set address" line.long 0x4 "FRAMETIMEOUT,Set the number of UARTE bits to count before triggering packet timeout." hexmask.long.word 0x4 0.--9. 1. "COUNTERTOP,Number of UARTE bits before timeout." tree "DMA" base ad:0x500C8000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long.byte 0x0 0.--7. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x500C8000 group.long 0x0++0xF line.long 0x0 "TXD,Pin select for TXD signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "CTS,Pin select for CTS signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "RXD,Pin select for RXD signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "RTS,Pin select for RTS signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_UARTE30_NS" base ad:0x40104000 wgroup.long 0x1C++0x3 line.long 0x0 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" bitfld.long 0x0 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x40104000 tree "RX (Peripheral tasks.)" base ad:0x4004A028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x4004A050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x40104000 newline group.long 0x9C++0x3 newline line.long 0x0 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x40104000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x4004A0D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end base ad:0x40104000 newline group.long 0x100++0x7 newline line.long 0x0 "EVENTS_CTS,CTS is activated (set low). Clear To Send." bitfld.long 0x0 0. "EVENTS_CTS,CTS is activated (set low). Clear To Send." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." bitfld.long 0x4 0. "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." "0: Event not generated,1: Event generated" group.long 0x10C++0xB line.long 0x0 "EVENTS_TXDRDY,Data sent from TXD" bitfld.long 0x0 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" bitfld.long 0x4 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ERROR,Error detected" bitfld.long 0x8 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated" group.long 0x124++0x3 line.long 0x0 "EVENTS_RXTO,Receiver timeout" bitfld.long 0x0 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated" group.long 0x130++0x3 line.long 0x0 "EVENTS_TXSTOPPED,Transmitter stopped" bitfld.long 0x0 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x40104000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x40104000 newline group.long 0x174++0x3 newline line.long 0x0 "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." bitfld.long 0x0 0. "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_CTS,Publish configuration for event CTS" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to" line.long 0x4 "PUBLISH_NCTS,Publish configuration for event NCTS" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to" group.long 0x18C++0xB line.long 0x0 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to" line.long 0x4 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to" line.long 0x8 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A4++0x3 line.long 0x0 "PUBLISH_RXTO,Publish configuration for event RXTO" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to" group.long 0x1B0++0x3 line.long 0x0 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to" tree "PUBLISH_DMA" base ad:0x40104000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x40104000 newline group.long 0x1F4++0x3 newline line.long 0x0 "PUBLISH_FRAMETIMEOUT,Publish configuration for event FRAMETIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event FRAMETIMEOUT will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 29. "FRAMETIMEOUT_DMA_RX_STOP,Shortcut between event FRAMETIMEOUT and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "DMA_TX_END_DMA_TX_STOP,Shortcut between event DMA.TX.END and task DMA.TX.STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_RX_END_DMA_RX_STOP,Shortcut between event DMA.RX.END and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DMA_RX_END_DMA_RX_START,Shortcut between event DMA.RX.END and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 29. "FRAMETIMEOUT,Enable or disable interrupt for event FRAMETIMEOUT" "0: Disable,1: Enable" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" bitfld.long 0x0 12. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "RXTO,Enable or disable interrupt for event RXTO" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disable,1: Enable" bitfld.long 0x0 3. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disable,1: Enable" bitfld.long 0x0 0. "CTS,Enable or disable interrupt for event CTS" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 29. "FRAMETIMEOUT,Write '1' to enable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Enable" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 3. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 29. "FRAMETIMEOUT,Write '1' to disable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Disable" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 3. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Disable" group.long 0x480++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present" newline bitfld.long 0x0 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable UART" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable UARTE" group.long 0x524++0x3 line.long 0x0 "BAUDRATE,Baud rate. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "BAUDRATE,Baud rate" group.long 0x56C++0x3 line.long 0x0 "CONFIG,Configuration of parity. hardware flow control. framesize. and packet timeout." bitfld.long 0x0 14. "FRAMETIMEOUT,Enable packet timeout." "0: Packet timeout is disabled.,1: Packet timeout is enabled." bitfld.long 0x0 13. "ENDIAN,Select if data is trimmed from MSB or LSB end when the data frame size is less than 8." "0: Data is trimmed from MSB end.,1: Data is trimmed from LSB end." newline hexmask.long.byte 0x0 9.--12. 1. "FRAMESIZE,Set the data frame size" bitfld.long 0x0 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits" bitfld.long 0x0 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit" newline bitfld.long 0x0 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled" group.long 0x574++0x7 line.long 0x0 "ADDRESS,Set the address of the UARTE for RX when used in 9 bit data frame mode." hexmask.long.byte 0x0 0.--7. 1. "ADDRESS,Set address" line.long 0x4 "FRAMETIMEOUT,Set the number of UARTE bits to count before triggering packet timeout." hexmask.long.word 0x4 0.--9. 1. "COUNTERTOP,Number of UARTE bits before timeout." tree "DMA" base ad:0x40104000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long.byte 0x0 0.--7. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x40104000 group.long 0x0++0xF line.long 0x0 "TXD,Pin select for TXD signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "CTS,Pin select for CTS signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "RXD,Pin select for RXD signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "RTS,Pin select for RTS signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" tree.end tree.end tree "GLOBAL_UARTE30_S" base ad:0x50104000 wgroup.long 0x1C++0x3 line.long 0x0 "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" bitfld.long 0x0 0. "TASKS_FLUSHRX,Flush RX FIFO into RX buffer" "?,1: Trigger task" tree "TASKS_DMA" base ad:0x50104000 tree "RX (Peripheral tasks.)" base ad:0x4004A028 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "ENABLEMATCH,Enables the MATCH[n] event by setting the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." bitfld.long 0x0 0. "DISABLEMATCH,Disables the MATCH[n] event by clearing the ENABLE[n] bit in the CONFIG register." "?,1: Trigger task" repeat.end tree.end tree "TX (Peripheral tasks.)" base ad:0x4004A050 wgroup.long 0x0++0x7 line.long 0x0 "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." bitfld.long 0x0 0. "START,Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA." "?,1: Trigger task" line.long 0x4 "STOP,Stops operation using easyDMA. This does not trigger an END event." bitfld.long 0x4 0. "STOP,Stops operation using easyDMA. This does not trigger an END event." "?,1: Trigger task" tree.end tree.end base ad:0x50104000 newline group.long 0x9C++0x3 newline line.long 0x0 "SUBSCRIBE_FLUSHRX,Subscribe configuration for task FLUSHRX" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task FLUSHRX will subscribe to" tree "SUBSCRIBE_DMA" base ad:0x50104000 tree "RX (Subscribe configuration for tasks)" base ad:0x4004A0A8 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "ENABLEMATCH[$1],Description collection: Subscribe configuration for task ENABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task ENABLEMATCH[n] will subscribe to" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x18)++0x3 line.long 0x0 "DISABLEMATCH[$1],Description collection: Subscribe configuration for task DISABLEMATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task DISABLEMATCH[n] will subscribe to" repeat.end tree.end tree "TX (Subscribe configuration for tasks)" base ad:0x4004A0D0 group.long 0x0++0x7 line.long 0x0 "START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" tree.end tree.end base ad:0x50104000 newline group.long 0x100++0x7 newline line.long 0x0 "EVENTS_CTS,CTS is activated (set low). Clear To Send." bitfld.long 0x0 0. "EVENTS_CTS,CTS is activated (set low). Clear To Send." "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." bitfld.long 0x4 0. "EVENTS_NCTS,CTS is deactivated (set high). Not Clear To Send." "0: Event not generated,1: Event generated" group.long 0x10C++0xB line.long 0x0 "EVENTS_TXDRDY,Data sent from TXD" bitfld.long 0x0 0. "EVENTS_TXDRDY,Data sent from TXD" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" bitfld.long 0x4 0. "EVENTS_RXDRDY,Data received in RXD (but potentially not yet transferred to Data RAM)" "0: Event not generated,1: Event generated" line.long 0x8 "EVENTS_ERROR,Error detected" bitfld.long 0x8 0. "EVENTS_ERROR,Error detected" "0: Event not generated,1: Event generated" group.long 0x124++0x3 line.long 0x0 "EVENTS_RXTO,Receiver timeout" bitfld.long 0x0 0. "EVENTS_RXTO,Receiver timeout" "0: Event not generated,1: Event generated" group.long 0x130++0x3 line.long 0x0 "EVENTS_TXSTOPPED,Transmitter stopped" bitfld.long 0x0 0. "EVENTS_TXSTOPPED,Transmitter stopped" "0: Event not generated,1: Event generated" tree "EVENTS_DMA" base ad:0x50104000 tree "RX (Peripheral events.)" base ad:0x4004A14C group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Pattern match is detected on the DMA data bus." bitfld.long 0x0 0. "MATCH,Pattern match is detected on the DMA data bus." "0: Event not generated,1: Event generated" repeat.end tree.end tree "TX (Peripheral events.)" base ad:0x4004A168 group.long 0x0++0xB line.long 0x0 "END,Generated after all MAXCNT bytes have been transferred" bitfld.long 0x0 0. "END,Generated after all MAXCNT bytes have been transferred" "0: Event not generated,1: Event generated" line.long 0x4 "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel. allowing them to be written to prepare for the next sequence." bitfld.long 0x4 0. "READY,Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel allowing them to be written to prepare for the next sequence." "0: Event not generated,1: Event generated" line.long 0x8 "BUSERROR,An error occured during the bus transfer." bitfld.long 0x8 0. "BUSERROR,An error occured during the bus transfer." "0: Event not generated,1: Event generated" tree.end tree.end base ad:0x50104000 newline group.long 0x174++0x3 newline line.long 0x0 "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." bitfld.long 0x0 0. "EVENTS_FRAMETIMEOUT,Timed out due to bus being idle while receiving data." "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_CTS,Publish configuration for event CTS" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event CTS will publish to" line.long 0x4 "PUBLISH_NCTS,Publish configuration for event NCTS" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event NCTS will publish to" group.long 0x18C++0xB line.long 0x0 "PUBLISH_TXDRDY,Publish configuration for event TXDRDY" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXDRDY will publish to" line.long 0x4 "PUBLISH_RXDRDY,Publish configuration for event RXDRDY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event RXDRDY will publish to" line.long 0x8 "PUBLISH_ERROR,Publish configuration for event ERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event ERROR will publish to" group.long 0x1A4++0x3 line.long 0x0 "PUBLISH_RXTO,Publish configuration for event RXTO" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event RXTO will publish to" group.long 0x1B0++0x3 line.long 0x0 "PUBLISH_TXSTOPPED,Publish configuration for event TXSTOPPED" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TXSTOPPED will publish to" tree "PUBLISH_DMA" base ad:0x50104000 tree "RX (Publish configuration for events)" base ad:0x4004A1CC group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "MATCH[$1],Description collection: Publish configuration for event MATCH[n]" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event MATCH[n] will publish to" repeat.end tree.end tree "TX (Publish configuration for events)" base ad:0x4004A1E8 group.long 0x0++0xB line.long 0x0 "END,Publish configuration for event END" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event END will publish to" line.long 0x4 "READY,Publish configuration for event READY" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event READY will publish to" line.long 0x8 "BUSERROR,Publish configuration for event BUSERROR" bitfld.long 0x8 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x8 0.--7. 1. "CHIDX,DPPI channel that event BUSERROR will publish to" tree.end tree.end base ad:0x50104000 newline group.long 0x1F4++0x3 newline line.long 0x0 "PUBLISH_FRAMETIMEOUT,Publish configuration for event FRAMETIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event FRAMETIMEOUT will publish to" group.long 0x200++0x3 line.long 0x0 "SHORTS,Shortcuts between local events and tasks" bitfld.long 0x0 29. "FRAMETIMEOUT_DMA_RX_STOP,Shortcut between event FRAMETIMEOUT and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 28. "DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 27. "DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 26. "DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 25. "DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.DISABLEMATCH[n]" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 24. "DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[0] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 23. "DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[3] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 22. "DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[2] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 21. "DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1,Shortcut between event DMA.RX.MATCH[n] and task DMA.RX.ENABLEMATCH[1] Allows daisy-chaining match events." "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 18. "DMA_TX_END_DMA_TX_STOP,Shortcut between event DMA.TX.END and task DMA.TX.STOP" "0: Disable shortcut,1: Enable shortcut" newline bitfld.long 0x0 6. "DMA_RX_END_DMA_RX_STOP,Shortcut between event DMA.RX.END and task DMA.RX.STOP" "0: Disable shortcut,1: Enable shortcut" bitfld.long 0x0 5. "DMA_RX_END_DMA_RX_START,Shortcut between event DMA.RX.END and task DMA.RX.START" "0: Disable shortcut,1: Enable shortcut" group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 29. "FRAMETIMEOUT,Enable or disable interrupt for event FRAMETIMEOUT" "0: Disable,1: Enable" bitfld.long 0x0 28. "DMATXBUSERROR,Enable or disable interrupt for event DMATXBUSERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "DMATXREADY,Enable or disable interrupt for event DMATXREADY" "0: Disable,1: Enable" bitfld.long 0x0 26. "DMATXEND,Enable or disable interrupt for event DMATXEND" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "DMARXMATCH3,Enable or disable interrupt for event DMARXMATCH[3]" "0: Disable,1: Enable" bitfld.long 0x0 24. "DMARXMATCH2,Enable or disable interrupt for event DMARXMATCH[2]" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "DMARXMATCH1,Enable or disable interrupt for event DMARXMATCH[1]" "0: Disable,1: Enable" bitfld.long 0x0 22. "DMARXMATCH0,Enable or disable interrupt for event DMARXMATCH[0]" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "DMARXBUSERROR,Enable or disable interrupt for event DMARXBUSERROR" "0: Disable,1: Enable" bitfld.long 0x0 20. "DMARXREADY,Enable or disable interrupt for event DMARXREADY" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "DMARXEND,Enable or disable interrupt for event DMARXEND" "0: Disable,1: Enable" bitfld.long 0x0 12. "TXSTOPPED,Enable or disable interrupt for event TXSTOPPED" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "RXTO,Enable or disable interrupt for event RXTO" "0: Disable,1: Enable" bitfld.long 0x0 5. "ERROR,Enable or disable interrupt for event ERROR" "0: Disable,1: Enable" newline bitfld.long 0x0 4. "RXDRDY,Enable or disable interrupt for event RXDRDY" "0: Disable,1: Enable" bitfld.long 0x0 3. "TXDRDY,Enable or disable interrupt for event TXDRDY" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "NCTS,Enable or disable interrupt for event NCTS" "0: Disable,1: Enable" bitfld.long 0x0 0. "CTS,Enable or disable interrupt for event CTS" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 29. "FRAMETIMEOUT,Write '1' to enable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Enable" bitfld.long 0x4 28. "DMATXBUSERROR,Write '1' to enable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 27. "DMATXREADY,Write '1' to enable interrupt for event DMATXREADY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 26. "DMATXEND,Write '1' to enable interrupt for event DMATXEND" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 25. "DMARXMATCH3,Write '1' to enable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 24. "DMARXMATCH2,Write '1' to enable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 23. "DMARXMATCH1,Write '1' to enable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 22. "DMARXMATCH0,Write '1' to enable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 21. "DMARXBUSERROR,Write '1' to enable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Enable" bitfld.long 0x4 20. "DMARXREADY,Write '1' to enable interrupt for event DMARXREADY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 19. "DMARXEND,Write '1' to enable interrupt for event DMARXEND" "0: Read: Disabled,1: Enable" bitfld.long 0x4 12. "TXSTOPPED,Write '1' to enable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 9. "RXTO,Write '1' to enable interrupt for event RXTO" "0: Read: Disabled,1: Enable" bitfld.long 0x4 5. "ERROR,Write '1' to enable interrupt for event ERROR" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 4. "RXDRDY,Write '1' to enable interrupt for event RXDRDY" "0: Read: Disabled,1: Enable" bitfld.long 0x4 3. "TXDRDY,Write '1' to enable interrupt for event TXDRDY" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 1. "NCTS,Write '1' to enable interrupt for event NCTS" "0: Read: Disabled,1: Enable" bitfld.long 0x4 0. "CTS,Write '1' to enable interrupt for event CTS" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 29. "FRAMETIMEOUT,Write '1' to disable interrupt for event FRAMETIMEOUT" "0: Read: Disabled,1: Disable" bitfld.long 0x8 28. "DMATXBUSERROR,Write '1' to disable interrupt for event DMATXBUSERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 27. "DMATXREADY,Write '1' to disable interrupt for event DMATXREADY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 26. "DMATXEND,Write '1' to disable interrupt for event DMATXEND" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 25. "DMARXMATCH3,Write '1' to disable interrupt for event DMARXMATCH[3]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 24. "DMARXMATCH2,Write '1' to disable interrupt for event DMARXMATCH[2]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 23. "DMARXMATCH1,Write '1' to disable interrupt for event DMARXMATCH[1]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 22. "DMARXMATCH0,Write '1' to disable interrupt for event DMARXMATCH[0]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 21. "DMARXBUSERROR,Write '1' to disable interrupt for event DMARXBUSERROR" "0: Read: Disabled,1: Disable" bitfld.long 0x8 20. "DMARXREADY,Write '1' to disable interrupt for event DMARXREADY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 19. "DMARXEND,Write '1' to disable interrupt for event DMARXEND" "0: Read: Disabled,1: Disable" bitfld.long 0x8 12. "TXSTOPPED,Write '1' to disable interrupt for event TXSTOPPED" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 9. "RXTO,Write '1' to disable interrupt for event RXTO" "0: Read: Disabled,1: Disable" bitfld.long 0x8 5. "ERROR,Write '1' to disable interrupt for event ERROR" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 4. "RXDRDY,Write '1' to disable interrupt for event RXDRDY" "0: Read: Disabled,1: Disable" bitfld.long 0x8 3. "TXDRDY,Write '1' to disable interrupt for event TXDRDY" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 1. "NCTS,Write '1' to disable interrupt for event NCTS" "0: Read: Disabled,1: Disable" bitfld.long 0x8 0. "CTS,Write '1' to disable interrupt for event CTS" "0: Read: Disabled,1: Disable" group.long 0x480++0x3 line.long 0x0 "ERRORSRC,Error source" bitfld.long 0x0 3. "BREAK,Break condition" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 2. "FRAMING,Framing error occurred" "0: Read: error not present,1: Read: error present" newline bitfld.long 0x0 1. "PARITY,Parity error" "0: Read: error not present,1: Read: error present" bitfld.long 0x0 0. "OVERRUN,Overrun error" "0: Read: error not present,1: Read: error present" group.long 0x500++0x3 line.long 0x0 "ENABLE,Enable UART" hexmask.long.byte 0x0 0.--3. 1. "ENABLE,Enable or disable UARTE" group.long 0x524++0x3 line.long 0x0 "BAUDRATE,Baud rate. Accuracy depends on the HFCLK source selected." hexmask.long 0x0 0.--31. 1. "BAUDRATE,Baud rate" group.long 0x56C++0x3 line.long 0x0 "CONFIG,Configuration of parity. hardware flow control. framesize. and packet timeout." bitfld.long 0x0 14. "FRAMETIMEOUT,Enable packet timeout." "0: Packet timeout is disabled.,1: Packet timeout is enabled." bitfld.long 0x0 13. "ENDIAN,Select if data is trimmed from MSB or LSB end when the data frame size is less than 8." "0: Data is trimmed from MSB end.,1: Data is trimmed from LSB end." newline hexmask.long.byte 0x0 9.--12. 1. "FRAMESIZE,Set the data frame size" bitfld.long 0x0 8. "PARITYTYPE,Even or odd parity type" "0: Even parity,1: Odd parity" newline bitfld.long 0x0 4. "STOP,Stop bits" "0: One stop bit,1: Two stop bits" bitfld.long 0x0 1.--3. "PARITY,Parity" "0: Exclude parity bit,?,?,?,?,?,?,7: Include even parity bit" newline bitfld.long 0x0 0. "HWFC,Hardware flow control" "0: Disabled,1: Enabled" group.long 0x574++0x7 line.long 0x0 "ADDRESS,Set the address of the UARTE for RX when used in 9 bit data frame mode." hexmask.long.byte 0x0 0.--7. 1. "ADDRESS,Set address" line.long 0x4 "FRAMETIMEOUT,Set the number of UARTE bits to count before triggering packet timeout." hexmask.long.word 0x4 0.--9. 1. "COUNTERTOP,Number of UARTE bits before timeout." tree "DMA" base ad:0x50104000 tree "RX (Unspecified)" base ad:0x4004A700 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree "MATCH (Registers to control the behavior of the pattern matcher engine)" base ad:0x4004A724 group.long 0x0++0x3 line.long 0x0 "CONFIG,Configure individual match events" bitfld.long 0x0 19. "ONESHOT_3,Configure match filter 3 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 18. "ONESHOT_2,Configure match filter 2 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 17. "ONESHOT_1,Configure match filter 1 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." bitfld.long 0x0 16. "ONESHOT_0,Configure match filter 0 as one-shot or continous" "0: Match filter stays enabled until disabled by task,1: Match filter stays enabled until next data word.." newline bitfld.long 0x0 3. "ENABLE_3,Enable match filter 3" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 2. "ENABLE_2,Enable match filter 2" "0: Match filter disabled,1: Match filter enabled" newline bitfld.long 0x0 1. "ENABLE_1,Enable match filter 1" "0: Match filter disabled,1: Match filter enabled" bitfld.long 0x0 0. "ENABLE_0,Enable match filter 0" "0: Match filter disabled,1: Match filter enabled" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "CANDIDATE[$1],Description collection: The data to look for - any match will trigger the MATCH[n] event. if enabled." hexmask.long.byte 0x0 0.--7. 1. "DATA,Data to look for" repeat.end tree.end tree.end tree "TX (Unspecified)" base ad:0x4004A738 group.long 0x4++0x7 line.long 0x0 "PTR,RAM buffer start address" hexmask.long 0x0 0.--31. 1. "PTR,RAM buffer start address for this EasyDMA channel. This address is a word aligned Data RAM address." line.long 0x4 "MAXCNT,Maximum number of bytes in channel buffer" hexmask.long.word 0x4 0.--15. 1. "MAXCNT,Maximum number of bytes in channel buffer" rgroup.long 0xC++0x3 line.long 0x0 "AMOUNT,Number of bytes transferred in the last transaction. updated after the END event. Also updated after each MATCH event." hexmask.long.word 0x0 0.--15. 1. "AMOUNT,Number of bytes transferred in the last transaction. In case of NACK error includes the NACK'ed byte." group.long 0x1C++0x3 line.long 0x0 "TERMINATEONBUSERROR,Terminate the transaction if a BUSERROR event is detected." bitfld.long 0x0 0. "ENABLE" "0: Disable,1: Enable" rgroup.long 0x20++0x3 line.long 0x0 "BUSERRORADDRESS,Address of transaction that generated the last BUSERROR event." hexmask.long 0x0 0.--31. 1. "ADDRESS" tree.end tree.end tree "PSEL" base ad:0x50104000 group.long 0x0++0xF line.long 0x0 "TXD,Pin select for TXD signal" bitfld.long 0x0 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x0 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "PIN,Pin number" line.long 0x4 "CTS,Pin select for CTS signal" bitfld.long 0x4 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x4 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--4. 1. "PIN,Pin number" line.long 0x8 "RXD,Pin select for RXD signal" bitfld.long 0x8 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0x8 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--4. 1. "PIN,Pin number" line.long 0xC "RTS,Pin select for RTS signal" bitfld.long 0xC 31. "CONNECT,Connection" "0: Connect,1: Disconnect" bitfld.long 0xC 5.--7. "PORT,Port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 0.--4. 1. "PIN,Pin number" tree.end tree.end tree.end tree "UICR (User Information Configuration Registers)" base ad:0x0 tree "GLOBAL_UICR_S" base ad:0xFFD000 tree "APPROTECT[%s]" group.long 0x0++0x3 line.long 0x0 "PROTECT0,Description cluster: Access port protection" hexmask.long 0x0 0.--31. 1. "PALL" group.long 0x1C++0x3 line.long 0x0 "PROTECT1,Description cluster: Access port protection" hexmask.long 0x0 0.--31. 1. "PALL" tree.end tree "AUXAPPROTECT[%s]" base ad:0xFFD040 group.long 0x0++0x3 line.long 0x0 "PROTECT0,Description cluster: Access port protection" hexmask.long 0x0 0.--31. 1. "PALL" group.long 0x1C++0x3 line.long 0x0 "PROTECT1,Description cluster: Access port protection register" hexmask.long 0x0 0.--31. 1. "PALL" tree.end tree "ERASEPROTECT[%s]" base ad:0xFFD060 group.long 0x0++0x3 line.long 0x0 "PROTECT0,Description cluster: Erase protection" hexmask.long 0x0 0.--31. 1. "PALL" group.long 0x1C++0x3 line.long 0x0 "PROTECT1,Description cluster: Erase protection" hexmask.long 0x0 0.--31. 1. "PALL" tree.end tree "SECUREAPPROTECT[%s]" base ad:0xFFD020 group.long 0x0++0x3 line.long 0x0 "PROTECT0,Description cluster: Access port protection" hexmask.long 0x0 0.--31. 1. "PALL" group.long 0x1C++0x3 line.long 0x0 "PROTECT1,Description cluster: Access port protection register" hexmask.long 0x0 0.--31. 1. "PALL" tree.end base ad:0xFFD000 newline group.long 0x80++0x3 newline line.long 0x0 "BOOTCONF,Immutable boot region configuration." hexmask.long.byte 0x0 16.--20. 1. "SIZE,Immutable boot region size" bitfld.long 0x0 13. "LOCK,Enable lock of configuration register" "0: Lock is disabled and the RRAMC region..,1: Lock is enabled and the RRAMC configuration.." newline bitfld.long 0x0 12. "WRITEONCE,Write-once" "0: Write-once disabled,1: Write-once enabled" bitfld.long 0x0 3. "SECURE,Secure access" "0: Both secure and non-secure access to region is..,1: Only secure access to region is allowed" newline bitfld.long 0x0 2. "EXECUTE,Execute access" "0: Executing code from the region is not allowed,1: Executing code from the region is allowed" bitfld.long 0x0 1. "WRITE,Write access" "0: Writing to the region is not allowed,1: Writing to the region is allowed" newline bitfld.long 0x0 0. "READ,Read access" "0: Reading from the region is not allowed,1: Reading from the region is allowed" tree "USER" base ad:0xFFD200 tree "ROT (Assets installed to establish initial Root of Trust in the device.)" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0xFFD200 ad:0xFFD22C ad:0xFFD258 ad:0xFFD284) tree "PUBKEY[$1]" base $2 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "DIGEST[$1],Description collection: First 256 bits of SHA2-512 digest over RoT public key generation [n]." hexmask.long 0x0 0.--31. 1. "VALUE,Value for word [o] in the key digest [n]." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x20)++0x3 line.long 0x0 "REVOKE[$1],Description collection: Revocation status for RoT public key generation [n]." hexmask.long 0x0 0.--31. 1. "STATUS,Revocation status." repeat.end tree.end repeat.end repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0xFFD2B0 ad:0xFFD2DC ad:0xFFD308 ad:0xFFD334) tree "AUTHOPKEY[$1]" base $2 repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "DIGEST[$1],Description collection: First 256 bits of SHA2-512 digest over RoT authenticated operation public key generation [n]." hexmask.long 0x0 0.--31. 1. "VALUE,Value for word [o] in the key digest [n]." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x20)++0x3 line.long 0x0 "REVOKE[$1],Description collection: Revocation status for RoT authenticated operation public key generation [n]." hexmask.long 0x0 0.--31. 1. "STATUS,Revocation status." repeat.end tree.end repeat.end tree.end tree.end newline repeat 320. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x500)++0x3 line.long 0x0 "OTP[$1],Description collection: One time programmable memory" hexmask.long 0x0 0.--31. 1. "OTP,OTP word" repeat.end tree.end tree.end tree "VPR (RISC-V CPU)" base ad:0x0 tree "GLOBAL_VPR00_NS" base ad:0x4004C000 repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_TRIGGER[$1],Description collection: VPR task [n] register" bitfld.long 0x0 0. "TASKS_TRIGGER,VPR task [n] register" "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TASKS_TRIGGER[n]" bitfld.long 0x0 31. "EN,Subscription enable bit" "0: Disable subscription,1: Enable subscription" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_TRIGGERED[$1],Description collection: VPR event [n] register" bitfld.long 0x0 0. "EVENTS_TRIGGERED,VPR event [n] register" "0: Event not generated,1: Event generated" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event EVENTS_TRIGGERED[n]" bitfld.long 0x0 31. "EN,Publication enable bit" "0: Disable publishing,1: Enable publishing" repeat.end group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 22. "TRIGGERED22,Enable or disable interrupt for event TRIGGERED[22]" "0: Disable,1: Enable" bitfld.long 0x0 21. "TRIGGERED21,Enable or disable interrupt for event TRIGGERED[21]" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "TRIGGERED20,Enable or disable interrupt for event TRIGGERED[20]" "0: Disable,1: Enable" bitfld.long 0x0 19. "TRIGGERED19,Enable or disable interrupt for event TRIGGERED[19]" "0: Disable,1: Enable" newline bitfld.long 0x0 18. "TRIGGERED18,Enable or disable interrupt for event TRIGGERED[18]" "0: Disable,1: Enable" bitfld.long 0x0 17. "TRIGGERED17,Enable or disable interrupt for event TRIGGERED[17]" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "TRIGGERED16,Enable or disable interrupt for event TRIGGERED[16]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 22. "TRIGGERED22,Write '1' to enable interrupt for event TRIGGERED[22]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "TRIGGERED21,Write '1' to enable interrupt for event TRIGGERED[21]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "TRIGGERED20,Write '1' to enable interrupt for event TRIGGERED[20]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "TRIGGERED19,Write '1' to enable interrupt for event TRIGGERED[19]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 18. "TRIGGERED18,Write '1' to enable interrupt for event TRIGGERED[18]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 17. "TRIGGERED17,Write '1' to enable interrupt for event TRIGGERED[17]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "TRIGGERED16,Write '1' to enable interrupt for event TRIGGERED[16]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 22. "TRIGGERED22,Write '1' to disable interrupt for event TRIGGERED[22]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "TRIGGERED21,Write '1' to disable interrupt for event TRIGGERED[21]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "TRIGGERED20,Write '1' to disable interrupt for event TRIGGERED[20]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "TRIGGERED19,Write '1' to disable interrupt for event TRIGGERED[19]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 18. "TRIGGERED18,Write '1' to disable interrupt for event TRIGGERED[18]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 17. "TRIGGERED17,Write '1' to disable interrupt for event TRIGGERED[17]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "TRIGGERED16,Write '1' to disable interrupt for event TRIGGERED[16]" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 22. "TRIGGERED22,Read pending status of interrupt for event TRIGGERED[22]" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 21. "TRIGGERED21,Read pending status of interrupt for event TRIGGERED[21]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 20. "TRIGGERED20,Read pending status of interrupt for event TRIGGERED[20]" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 19. "TRIGGERED19,Read pending status of interrupt for event TRIGGERED[19]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 18. "TRIGGERED18,Read pending status of interrupt for event TRIGGERED[18]" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 17. "TRIGGERED17,Read pending status of interrupt for event TRIGGERED[17]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 16. "TRIGGERED16,Read pending status of interrupt for event TRIGGERED[16]" "0: Read: Not pending,1: Read: Pending" tree "DEBUGIF" base ad:0x4004C400 group.long 0x10++0x7 line.long 0x0 "DATA0,Abstract Data 0. Read/write data for argument 0" hexmask.long 0x0 0.--31. 1. "DATA0,Abstract Data 0" line.long 0x4 "DATA1,Abstract Data 1. Read/write data for argument 1" hexmask.long 0x4 0.--31. 1. "DATA1,Abstract Data 1" group.long 0x40++0x3 line.long 0x0 "DMCONTROL,Debug Module Control" bitfld.long 0x0 31. "HALTREQ,Halt currently selected harts." "0: Clears halt request bit for all currently..,1: Currently selected harts halted." newline bitfld.long 0x0 30. "RESUMEREQ,Resume currently selected harts." "0: No operation when written 0.,1: Currently selected harts resumed." newline bitfld.long 0x0 29. "HARTRESET,Reset harts." "0: Reset de-asserted.,1: Reset asserted." newline bitfld.long 0x0 28. "ACKHAVERESET,Clear the havereset." "0: No operation when written 0.,1: Clears the havereset for selected harts." newline bitfld.long 0x0 26. "HASEL,Definition of currently selected harts." "0: Single hart selected.,1: Multiple harts selected" newline hexmask.long.word 0x0 16.--25. 1. "HARTSELLO,The low 10 bits of hartsel." newline hexmask.long.word 0x0 6.--15. 1. "HARTSELHI,The high 10 bits of hartsel." newline bitfld.long 0x0 3. "SETRESETHALTREQ,Set the halt on reset request." "0: No operation when written 0.,1: Sets the halt on reset request" newline bitfld.long 0x0 2. "CLRRESETHALTREQ,Clear the halt on reset request." "0: No operation when written 0.,1: Clears the halt on reset request" newline bitfld.long 0x0 1. "NDMRESET,Reset signal output from the debug module to the system." "0: Reset inactive,1: Reset active" newline bitfld.long 0x0 0. "DMACTIVE,Reset signal for the debug module." "0: Reset the debug module itself,1: Normal operation" rgroup.long 0x44++0xF line.long 0x0 "DMSTATUS,Debug Module Status" bitfld.long 0x0 22. "IMPEBREAK,Implicit ebreak instruction at the non-existent word immediately after the Program Buffer." "0: No implicit ebreak instruction.,1: Implicit ebreak instruction." newline bitfld.long 0x0 19. "ALLHAVERESET,All currently selected harts have been reset and reset is not acknowledge" "0: Not all of the currently selected harts have..,1: All of the currently selected harts have been.." newline bitfld.long 0x0 18. "ANYHAVERESET,Any currently selected harts have been reset and reset is not acknowledged." "0: None of the currently selected harts have been..,1: Any of the currently selected harts have been.." newline bitfld.long 0x0 17. "ALLRESUMEACK,All currently selected harts acknowledged last resume" "0: Not all of the currently selected harts..,1: All of the currently selected harts acknowledged.." newline bitfld.long 0x0 16. "ANYRESUMEACK,Any currently selected harts acknowledged last resume request." "0: None of the currently selected harts..,1: Any of the currently selected harts acknowledged.." newline bitfld.long 0x0 15. "ALLNONEXISTENT,All currently selected harts nonexistent status." "0: Not all of the currently selected harts..,1: All of the currently selected harts nonexistent." newline bitfld.long 0x0 14. "ANYNONEXISTENT,Any currently selected harts nonexistent status." "0: None of the currently selected harts nonexistent.,1: Any of the currently selected harts nonexistent." newline bitfld.long 0x0 13. "ALLUNAVAIL,All currently selected harts unavailable status." "0: Not all of the currently selected harts..,1: All of the currently selected harts unavailable." newline bitfld.long 0x0 12. "ANYUNAVAIL,Any currently selected harts unavailable status." "0: None of the currently selected harts unavailable.,1: Any of the currently selected harts unavailable." newline bitfld.long 0x0 11. "ALLRUNNING,All currently selected harts running status." "0: Not all of the currently selected harts running.,1: All of the currently selected harts running." newline bitfld.long 0x0 10. "ANYRUNNING,Any currently selected harts running status." "0: None of the currently selected harts running.,1: Any of the currently selected harts running." newline bitfld.long 0x0 9. "ALLHALTED,All currently selected harts halted status." "0: Not all of the currently selected harts halted.,1: All of the currently selected harts halted." newline bitfld.long 0x0 8. "ANYHALTED,Any currently selected harts halted status." "0: None of the currently selected harts halted.,1: Any of the currently selected harts halted." newline bitfld.long 0x0 7. "AUTHENTICATED,Authentication status." "0: Authentication required before using the debug..,1: Authentication passed." newline bitfld.long 0x0 6. "AUTHBUSY,Authentication busy status." "0: The authentication module is ready.,1: The authentication module is busy." newline bitfld.long 0x0 5. "HASRESETHALTREQ,Halt-on-reset support status." "0: Halt-on-reset is supported.,1: Halt-on-reset is not supported." newline bitfld.long 0x0 4. "CONFSTRPTRVALID,Configuration string." "0: The confstrptr0..confstrptr3 holds information..,1: The confstrptr0..confstrptr3 holds the address.." newline hexmask.long.byte 0x0 0.--3. 1. "VERSION,Version of the debug module." line.long 0x4 "HARTINFO,Hart Information" hexmask.long.byte 0x4 20.--23. 1. "NSCRATCH,Number of dscratch registers" newline bitfld.long 0x4 16. "DATAACCESS,Data Access" "0: The data registers are shadowed in the hart by..,1: The data registers are shadowed in the hart's.." newline hexmask.long.byte 0x4 12.--15. 1. "DATASIZE,Data Size" newline hexmask.long.word 0x4 0.--11. 1. "DATAADDR,Data Address" line.long 0x8 "HALTSUM1,Halt Summary 1" hexmask.long 0x8 0.--31. 1. "HALTSUM1,Halt Summary 1" line.long 0xC "HAWINDOWSEL,Hart Array Window Select" hexmask.long.word 0xC 0.--14. 1. "HAWINDOWSEL,The high bits of this field may be tied to 0 depending on how large the array mask register is." group.long 0x54++0x7 line.long 0x0 "HAWINDOW,Hart Array Window" hexmask.long 0x0 0.--31. 1. "MASKDATA,Mask data." line.long 0x4 "ABSTRACTCS,Abstract Control and Status" hexmask.long.byte 0x4 24.--28. 1. "PROGBUFSIZE,Size of the Program Buffer in 32-bit words. Valid sizes are 0 - 1." newline rbitfld.long 0x4 12. "BUSY,Abstract command execution status." "0: Not busy.,1: An abstract command is currently being executed." newline bitfld.long 0x4 8.--10. "CMDERR,Command error when the abstract command fails." "0: No error.,1: An abstract command was executing while command..,2: The requested command is notsupported regardless..,3: An exception occurred while executing the..,4: The abstract command couldn't execute because..,5: The abstract command failed due to abus error..,?,7: The command failed for another reason." newline hexmask.long.byte 0x4 0.--3. 1. "DATACOUNT,Number of data registers that are implemented as part of the abstract command interface. Valid sizes are 1..12." wgroup.long 0x5C++0x3 line.long 0x0 "ABSTRACTCMD,Abstract command" hexmask.long.byte 0x0 24.--31. 1. "CMDTYPE,The type determines the overall functionality of this abstract command." newline hexmask.long.tbyte 0x0 0.--23. 1. "CONTROL,This Field is interpreted in a command specific manner described for each abstract command." rgroup.long 0x60++0x3 line.long 0x0 "ABSTRACTAUTO,Abstract Command Autoexec" hexmask.long.word 0x0 16.--31. 1. "AUTOEXECPROGBUF,When a bit in this field is 1 read or write accesses to the corresponding progbuf word cause" newline hexmask.long.word 0x0 0.--11. 1. "AUTOEXECDATA,When a bit in this field is 1 read or write accesses to the corresponding data word cause the" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x64)++0x3 line.long 0x0 "CONFSTRPTR[$1],Description collection: Configuration String Pointer [n]" hexmask.long 0x0 0.--31. 1. "ADDR,Address" repeat.end rgroup.long 0x74++0x3 line.long 0x0 "NEXTDM,Next Debug Module" hexmask.long 0x0 0.--31. 1. "ADDR,Address" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x80)++0x3 line.long 0x0 "PROGBUF[$1],Description collection: Program Buffer [n]" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end rgroup.long 0xC0++0x3 line.long 0x0 "AUTHDATA,Authentication Data" hexmask.long 0x0 0.--31. 1. "DATA,Data" rgroup.long 0xD0++0x7 line.long 0x0 "HALTSUM2,Halt Summary 2" hexmask.long 0x0 0.--31. 1. "HALTSUM2,Halt Summary 2" line.long 0x4 "HALTSUM3,Halt Summary 3" hexmask.long 0x4 0.--31. 1. "HALTSUM3,Halt Summary 3" rgroup.long 0xDC++0x27 line.long 0x0 "SBADDRESS3,System Bus Addres 127:96" hexmask.long 0x0 0.--31. 1. "ADDRESS,Accesses bits 127:96 of the physical address in" line.long 0x4 "SBCS,System Bus Access Control and Status" bitfld.long 0x4 29.--31. "SBVERSION" "0: The System Bus interface conforms to mainline..,1: The System Bus interface conforms to RISC-V..,?,?,?,?,?,?" newline bitfld.long 0x4 22. "SBBUSYERROR" "0: No error.,1: Debugger access attempted while one in progress." newline bitfld.long 0x4 21. "SBBUSY" "0: System bus master is not busy.,1: System bus master is busy." newline bitfld.long 0x4 20. "SBREADONADDR" "?,1: Every write to sbaddress0 automatically triggers.." newline bitfld.long 0x4 17.--19. "SBACCESS" "0: 8-bit.,1: 16-bit.,2: 32-bit.,3: 64-bit.,4: 128-bit.,?,?,?" newline bitfld.long 0x4 16. "SBAUTOINCREMENT" "?,1: sbaddress is incremented by the access size (in.." newline bitfld.long 0x4 15. "SBREADONDATA" "?,1: Every read from sbdata0 automatically triggers a.." newline bitfld.long 0x4 12.--14. "SBERROR" "0: There was no bus error.,1: There was a timeout.,2: A bad address was accessed.,3: There was an alignment error.,4: An access of unsupported size was requested.,?,?,7: Other." newline hexmask.long.byte 0x4 5.--11. 1. "SBASIZE,Width of system bus addresses in bits. (0 indicates there is no bus access support.)" newline bitfld.long 0x4 4. "SBACCESS128" "?,1: 128-bit system bus accesses are supported." newline bitfld.long 0x4 3. "SBACCESS64" "?,1: 64-bit system bus accesses are supported." newline bitfld.long 0x4 2. "SBACCESS32" "?,1: 32-bit system bus accesses are supported." newline bitfld.long 0x4 1. "SBACCESS16" "?,1: 16-bit system bus accesses are supported." newline bitfld.long 0x4 0. "SBACCESS8" "?,1: 8-bit system bus accesses are supported." line.long 0x8 "SBADDRESS0,System Bus Addres 31:0" hexmask.long 0x8 0.--31. 1. "ADDRESS,Accesses bits 31:0 of the physical address in" line.long 0xC "SBADDRESS1,System Bus Addres 63:32" hexmask.long 0xC 0.--31. 1. "ADDRESS,Accesses bits 63:32 of the physical address in" line.long 0x10 "SBADDRESS2,System Bus Addres 95:64" hexmask.long 0x10 0.--31. 1. "ADDRESS,Accesses bits 95:64 of the physical address in" line.long 0x14 "SBDATA0,System Bus Data 31:0" hexmask.long 0x14 0.--31. 1. "DATA,Accesses bits 31:0 of sbdata" line.long 0x18 "SBDATA1,System Bus Data 63:32" hexmask.long 0x18 0.--31. 1. "DATA,Accesses bits 63:32 of sbdata (if the system bus" line.long 0x1C "SBDATA2,System Bus Data 95:64" hexmask.long 0x1C 0.--31. 1. "DATA,Accesses bits 95:64 of sbdata (if the system bus" line.long 0x20 "SBDATA3,System Bus Data 127:96" hexmask.long 0x20 0.--31. 1. "DATA,Accesses bits 127:96 of sbdata (if the system bus" line.long 0x24 "HALTSUM0,Halt summary 0" hexmask.long 0x24 0.--31. 1. "HALTSUM0,Halt summary 0" tree.end base ad:0x4004C000 newline group.long 0x800++0x3 newline line.long 0x0 "CPURUN,State of the CPU after a core reset" bitfld.long 0x0 0. "EN,Controls CPU running state after a core reset." "0: CPU stopped. If this is the CPU state after a..,1: CPU running. If this is the CPU state after a.." group.long 0x808++0x3 line.long 0x0 "INITPC,Initial value of the PC at CPU start." hexmask.long 0x0 0.--31. 1. "INITPC,Initial value of the PC at CPU start." tree.end tree "GLOBAL_VPR00_S" base ad:0x5004C000 repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "TASKS_TRIGGER[$1],Description collection: VPR task [n] register" bitfld.long 0x0 0. "TASKS_TRIGGER,VPR task [n] register" "?,1: Trigger task" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "SUBSCRIBE_TRIGGER[$1],Description collection: Subscribe configuration for task TASKS_TRIGGER[n]" bitfld.long 0x0 31. "EN,Subscription enable bit" "0: Disable subscription,1: Enable subscription" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "EVENTS_TRIGGERED[$1],Description collection: VPR event [n] register" bitfld.long 0x0 0. "EVENTS_TRIGGERED,VPR event [n] register" "0: Event not generated,1: Event generated" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "PUBLISH_TRIGGERED[$1],Description collection: Publish configuration for event EVENTS_TRIGGERED[n]" bitfld.long 0x0 31. "EN,Publication enable bit" "0: Disable publishing,1: Enable publishing" repeat.end group.long 0x300++0xB line.long 0x0 "INTEN,Enable or disable interrupt" bitfld.long 0x0 22. "TRIGGERED22,Enable or disable interrupt for event TRIGGERED[22]" "0: Disable,1: Enable" bitfld.long 0x0 21. "TRIGGERED21,Enable or disable interrupt for event TRIGGERED[21]" "0: Disable,1: Enable" newline bitfld.long 0x0 20. "TRIGGERED20,Enable or disable interrupt for event TRIGGERED[20]" "0: Disable,1: Enable" bitfld.long 0x0 19. "TRIGGERED19,Enable or disable interrupt for event TRIGGERED[19]" "0: Disable,1: Enable" newline bitfld.long 0x0 18. "TRIGGERED18,Enable or disable interrupt for event TRIGGERED[18]" "0: Disable,1: Enable" bitfld.long 0x0 17. "TRIGGERED17,Enable or disable interrupt for event TRIGGERED[17]" "0: Disable,1: Enable" newline bitfld.long 0x0 16. "TRIGGERED16,Enable or disable interrupt for event TRIGGERED[16]" "0: Disable,1: Enable" line.long 0x4 "INTENSET,Enable interrupt" bitfld.long 0x4 22. "TRIGGERED22,Write '1' to enable interrupt for event TRIGGERED[22]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 21. "TRIGGERED21,Write '1' to enable interrupt for event TRIGGERED[21]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 20. "TRIGGERED20,Write '1' to enable interrupt for event TRIGGERED[20]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 19. "TRIGGERED19,Write '1' to enable interrupt for event TRIGGERED[19]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 18. "TRIGGERED18,Write '1' to enable interrupt for event TRIGGERED[18]" "0: Read: Disabled,1: Enable" bitfld.long 0x4 17. "TRIGGERED17,Write '1' to enable interrupt for event TRIGGERED[17]" "0: Read: Disabled,1: Enable" newline bitfld.long 0x4 16. "TRIGGERED16,Write '1' to enable interrupt for event TRIGGERED[16]" "0: Read: Disabled,1: Enable" line.long 0x8 "INTENCLR,Disable interrupt" bitfld.long 0x8 22. "TRIGGERED22,Write '1' to disable interrupt for event TRIGGERED[22]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 21. "TRIGGERED21,Write '1' to disable interrupt for event TRIGGERED[21]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 20. "TRIGGERED20,Write '1' to disable interrupt for event TRIGGERED[20]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 19. "TRIGGERED19,Write '1' to disable interrupt for event TRIGGERED[19]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 18. "TRIGGERED18,Write '1' to disable interrupt for event TRIGGERED[18]" "0: Read: Disabled,1: Disable" bitfld.long 0x8 17. "TRIGGERED17,Write '1' to disable interrupt for event TRIGGERED[17]" "0: Read: Disabled,1: Disable" newline bitfld.long 0x8 16. "TRIGGERED16,Write '1' to disable interrupt for event TRIGGERED[16]" "0: Read: Disabled,1: Disable" rgroup.long 0x30C++0x3 line.long 0x0 "INTPEND,Pending interrupts" bitfld.long 0x0 22. "TRIGGERED22,Read pending status of interrupt for event TRIGGERED[22]" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 21. "TRIGGERED21,Read pending status of interrupt for event TRIGGERED[21]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 20. "TRIGGERED20,Read pending status of interrupt for event TRIGGERED[20]" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 19. "TRIGGERED19,Read pending status of interrupt for event TRIGGERED[19]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 18. "TRIGGERED18,Read pending status of interrupt for event TRIGGERED[18]" "0: Read: Not pending,1: Read: Pending" bitfld.long 0x0 17. "TRIGGERED17,Read pending status of interrupt for event TRIGGERED[17]" "0: Read: Not pending,1: Read: Pending" newline bitfld.long 0x0 16. "TRIGGERED16,Read pending status of interrupt for event TRIGGERED[16]" "0: Read: Not pending,1: Read: Pending" tree "DEBUGIF" base ad:0x5004C000 group.long 0x10++0x7 line.long 0x0 "DATA0,Abstract Data 0. Read/write data for argument 0" hexmask.long 0x0 0.--31. 1. "DATA0,Abstract Data 0" line.long 0x4 "DATA1,Abstract Data 1. Read/write data for argument 1" hexmask.long 0x4 0.--31. 1. "DATA1,Abstract Data 1" group.long 0x40++0x3 line.long 0x0 "DMCONTROL,Debug Module Control" bitfld.long 0x0 31. "HALTREQ,Halt currently selected harts." "0: Clears halt request bit for all currently..,1: Currently selected harts halted." newline bitfld.long 0x0 30. "RESUMEREQ,Resume currently selected harts." "0: No operation when written 0.,1: Currently selected harts resumed." newline bitfld.long 0x0 29. "HARTRESET,Reset harts." "0: Reset de-asserted.,1: Reset asserted." newline bitfld.long 0x0 28. "ACKHAVERESET,Clear the havereset." "0: No operation when written 0.,1: Clears the havereset for selected harts." newline bitfld.long 0x0 26. "HASEL,Definition of currently selected harts." "0: Single hart selected.,1: Multiple harts selected" newline hexmask.long.word 0x0 16.--25. 1. "HARTSELLO,The low 10 bits of hartsel." newline hexmask.long.word 0x0 6.--15. 1. "HARTSELHI,The high 10 bits of hartsel." newline bitfld.long 0x0 3. "SETRESETHALTREQ,Set the halt on reset request." "0: No operation when written 0.,1: Sets the halt on reset request" newline bitfld.long 0x0 2. "CLRRESETHALTREQ,Clear the halt on reset request." "0: No operation when written 0.,1: Clears the halt on reset request" newline bitfld.long 0x0 1. "NDMRESET,Reset signal output from the debug module to the system." "0: Reset inactive,1: Reset active" newline bitfld.long 0x0 0. "DMACTIVE,Reset signal for the debug module." "0: Reset the debug module itself,1: Normal operation" rgroup.long 0x44++0xF line.long 0x0 "DMSTATUS,Debug Module Status" bitfld.long 0x0 22. "IMPEBREAK,Implicit ebreak instruction at the non-existent word immediately after the Program Buffer." "0: No implicit ebreak instruction.,1: Implicit ebreak instruction." newline bitfld.long 0x0 19. "ALLHAVERESET,All currently selected harts have been reset and reset is not acknowledge" "0: Not all of the currently selected harts have..,1: All of the currently selected harts have been.." newline bitfld.long 0x0 18. "ANYHAVERESET,Any currently selected harts have been reset and reset is not acknowledged." "0: None of the currently selected harts have been..,1: Any of the currently selected harts have been.." newline bitfld.long 0x0 17. "ALLRESUMEACK,All currently selected harts acknowledged last resume" "0: Not all of the currently selected harts..,1: All of the currently selected harts acknowledged.." newline bitfld.long 0x0 16. "ANYRESUMEACK,Any currently selected harts acknowledged last resume request." "0: None of the currently selected harts..,1: Any of the currently selected harts acknowledged.." newline bitfld.long 0x0 15. "ALLNONEXISTENT,All currently selected harts nonexistent status." "0: Not all of the currently selected harts..,1: All of the currently selected harts nonexistent." newline bitfld.long 0x0 14. "ANYNONEXISTENT,Any currently selected harts nonexistent status." "0: None of the currently selected harts nonexistent.,1: Any of the currently selected harts nonexistent." newline bitfld.long 0x0 13. "ALLUNAVAIL,All currently selected harts unavailable status." "0: Not all of the currently selected harts..,1: All of the currently selected harts unavailable." newline bitfld.long 0x0 12. "ANYUNAVAIL,Any currently selected harts unavailable status." "0: None of the currently selected harts unavailable.,1: Any of the currently selected harts unavailable." newline bitfld.long 0x0 11. "ALLRUNNING,All currently selected harts running status." "0: Not all of the currently selected harts running.,1: All of the currently selected harts running." newline bitfld.long 0x0 10. "ANYRUNNING,Any currently selected harts running status." "0: None of the currently selected harts running.,1: Any of the currently selected harts running." newline bitfld.long 0x0 9. "ALLHALTED,All currently selected harts halted status." "0: Not all of the currently selected harts halted.,1: All of the currently selected harts halted." newline bitfld.long 0x0 8. "ANYHALTED,Any currently selected harts halted status." "0: None of the currently selected harts halted.,1: Any of the currently selected harts halted." newline bitfld.long 0x0 7. "AUTHENTICATED,Authentication status." "0: Authentication required before using the debug..,1: Authentication passed." newline bitfld.long 0x0 6. "AUTHBUSY,Authentication busy status." "0: The authentication module is ready.,1: The authentication module is busy." newline bitfld.long 0x0 5. "HASRESETHALTREQ,Halt-on-reset support status." "0: Halt-on-reset is supported.,1: Halt-on-reset is not supported." newline bitfld.long 0x0 4. "CONFSTRPTRVALID,Configuration string." "0: The confstrptr0..confstrptr3 holds information..,1: The confstrptr0..confstrptr3 holds the address.." newline hexmask.long.byte 0x0 0.--3. 1. "VERSION,Version of the debug module." line.long 0x4 "HARTINFO,Hart Information" hexmask.long.byte 0x4 20.--23. 1. "NSCRATCH,Number of dscratch registers" newline bitfld.long 0x4 16. "DATAACCESS,Data Access" "0: The data registers are shadowed in the hart by..,1: The data registers are shadowed in the hart's.." newline hexmask.long.byte 0x4 12.--15. 1. "DATASIZE,Data Size" newline hexmask.long.word 0x4 0.--11. 1. "DATAADDR,Data Address" line.long 0x8 "HALTSUM1,Halt Summary 1" hexmask.long 0x8 0.--31. 1. "HALTSUM1,Halt Summary 1" line.long 0xC "HAWINDOWSEL,Hart Array Window Select" hexmask.long.word 0xC 0.--14. 1. "HAWINDOWSEL,The high bits of this field may be tied to 0 depending on how large the array mask register is." group.long 0x54++0x7 line.long 0x0 "HAWINDOW,Hart Array Window" hexmask.long 0x0 0.--31. 1. "MASKDATA,Mask data." line.long 0x4 "ABSTRACTCS,Abstract Control and Status" hexmask.long.byte 0x4 24.--28. 1. "PROGBUFSIZE,Size of the Program Buffer in 32-bit words. Valid sizes are 0 - 1." newline rbitfld.long 0x4 12. "BUSY,Abstract command execution status." "0: Not busy.,1: An abstract command is currently being executed." newline bitfld.long 0x4 8.--10. "CMDERR,Command error when the abstract command fails." "0: No error.,1: An abstract command was executing while command..,2: The requested command is notsupported regardless..,3: An exception occurred while executing the..,4: The abstract command couldn't execute because..,5: The abstract command failed due to abus error..,?,7: The command failed for another reason." newline hexmask.long.byte 0x4 0.--3. 1. "DATACOUNT,Number of data registers that are implemented as part of the abstract command interface. Valid sizes are 1..12." wgroup.long 0x5C++0x3 line.long 0x0 "ABSTRACTCMD,Abstract command" hexmask.long.byte 0x0 24.--31. 1. "CMDTYPE,The type determines the overall functionality of this abstract command." newline hexmask.long.tbyte 0x0 0.--23. 1. "CONTROL,This Field is interpreted in a command specific manner described for each abstract command." rgroup.long 0x60++0x3 line.long 0x0 "ABSTRACTAUTO,Abstract Command Autoexec" hexmask.long.word 0x0 16.--31. 1. "AUTOEXECPROGBUF,When a bit in this field is 1 read or write accesses to the corresponding progbuf word cause" newline hexmask.long.word 0x0 0.--11. 1. "AUTOEXECDATA,When a bit in this field is 1 read or write accesses to the corresponding data word cause the" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x64)++0x3 line.long 0x0 "CONFSTRPTR[$1],Description collection: Configuration String Pointer [n]" hexmask.long 0x0 0.--31. 1. "ADDR,Address" repeat.end rgroup.long 0x74++0x3 line.long 0x0 "NEXTDM,Next Debug Module" hexmask.long 0x0 0.--31. 1. "ADDR,Address" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x80)++0x3 line.long 0x0 "PROGBUF[$1],Description collection: Program Buffer [n]" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end rgroup.long 0xC0++0x3 line.long 0x0 "AUTHDATA,Authentication Data" hexmask.long 0x0 0.--31. 1. "DATA,Data" rgroup.long 0xD0++0x7 line.long 0x0 "HALTSUM2,Halt Summary 2" hexmask.long 0x0 0.--31. 1. "HALTSUM2,Halt Summary 2" line.long 0x4 "HALTSUM3,Halt Summary 3" hexmask.long 0x4 0.--31. 1. "HALTSUM3,Halt Summary 3" rgroup.long 0xDC++0x27 line.long 0x0 "SBADDRESS3,System Bus Addres 127:96" hexmask.long 0x0 0.--31. 1. "ADDRESS,Accesses bits 127:96 of the physical address in" line.long 0x4 "SBCS,System Bus Access Control and Status" bitfld.long 0x4 29.--31. "SBVERSION" "0: The System Bus interface conforms to mainline..,1: The System Bus interface conforms to RISC-V..,?,?,?,?,?,?" newline bitfld.long 0x4 22. "SBBUSYERROR" "0: No error.,1: Debugger access attempted while one in progress." newline bitfld.long 0x4 21. "SBBUSY" "0: System bus master is not busy.,1: System bus master is busy." newline bitfld.long 0x4 20. "SBREADONADDR" "?,1: Every write to sbaddress0 automatically triggers.." newline bitfld.long 0x4 17.--19. "SBACCESS" "0: 8-bit.,1: 16-bit.,2: 32-bit.,3: 64-bit.,4: 128-bit.,?,?,?" newline bitfld.long 0x4 16. "SBAUTOINCREMENT" "?,1: sbaddress is incremented by the access size (in.." newline bitfld.long 0x4 15. "SBREADONDATA" "?,1: Every read from sbdata0 automatically triggers a.." newline bitfld.long 0x4 12.--14. "SBERROR" "0: There was no bus error.,1: There was a timeout.,2: A bad address was accessed.,3: There was an alignment error.,4: An access of unsupported size was requested.,?,?,7: Other." newline hexmask.long.byte 0x4 5.--11. 1. "SBASIZE,Width of system bus addresses in bits. (0 indicates there is no bus access support.)" newline bitfld.long 0x4 4. "SBACCESS128" "?,1: 128-bit system bus accesses are supported." newline bitfld.long 0x4 3. "SBACCESS64" "?,1: 64-bit system bus accesses are supported." newline bitfld.long 0x4 2. "SBACCESS32" "?,1: 32-bit system bus accesses are supported." newline bitfld.long 0x4 1. "SBACCESS16" "?,1: 16-bit system bus accesses are supported." newline bitfld.long 0x4 0. "SBACCESS8" "?,1: 8-bit system bus accesses are supported." line.long 0x8 "SBADDRESS0,System Bus Addres 31:0" hexmask.long 0x8 0.--31. 1. "ADDRESS,Accesses bits 31:0 of the physical address in" line.long 0xC "SBADDRESS1,System Bus Addres 63:32" hexmask.long 0xC 0.--31. 1. "ADDRESS,Accesses bits 63:32 of the physical address in" line.long 0x10 "SBADDRESS2,System Bus Addres 95:64" hexmask.long 0x10 0.--31. 1. "ADDRESS,Accesses bits 95:64 of the physical address in" line.long 0x14 "SBDATA0,System Bus Data 31:0" hexmask.long 0x14 0.--31. 1. "DATA,Accesses bits 31:0 of sbdata" line.long 0x18 "SBDATA1,System Bus Data 63:32" hexmask.long 0x18 0.--31. 1. "DATA,Accesses bits 63:32 of sbdata (if the system bus" line.long 0x1C "SBDATA2,System Bus Data 95:64" hexmask.long 0x1C 0.--31. 1. "DATA,Accesses bits 95:64 of sbdata (if the system bus" line.long 0x20 "SBDATA3,System Bus Data 127:96" hexmask.long 0x20 0.--31. 1. "DATA,Accesses bits 127:96 of sbdata (if the system bus" line.long 0x24 "HALTSUM0,Halt summary 0" hexmask.long 0x24 0.--31. 1. "HALTSUM0,Halt summary 0" tree.end base ad:0x5004C000 newline group.long 0x800++0x3 newline line.long 0x0 "CPURUN,State of the CPU after a core reset" bitfld.long 0x0 0. "EN,Controls CPU running state after a core reset." "0: CPU stopped. If this is the CPU state after a..,1: CPU running. If this is the CPU state after a.." group.long 0x808++0x3 line.long 0x0 "INITPC,Initial value of the PC at CPU start." hexmask.long 0x0 0.--31. 1. "INITPC,Initial value of the PC at CPU start." tree.end tree.end tree "WDT (Watchdog Timer)" base ad:0x0 tree "GLOBAL_WDT30_S" base ad:0x50108000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start WDT" bitfld.long 0x0 0. "TASKS_START,Start WDT" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop WDT" bitfld.long 0x4 0. "TASKS_STOP,Stop WDT" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0x7 line.long 0x0 "EVENTS_TIMEOUT,Watchdog timeout" bitfld.long 0x0 0. "EVENTS_TIMEOUT,Watchdog timeout" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,Watchdog stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,Watchdog stopped" "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_TIMEOUT,Publish configuration for event TIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TIMEOUT will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Disable" group.long 0x324++0x7 line.long 0x0 "NMIENSET,Enable interrupt" bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Enable" line.long 0x4 "NMIENCLR,Disable interrupt" bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x7 line.long 0x0 "RUNSTATUS,Run status" bitfld.long 0x0 0. "RUNSTATUSWDT,Indicates whether or not WDT is running" "0: Watchdog is not running,1: Watchdog is running" line.long 0x4 "REQSTATUS,Request status" bitfld.long 0x4 7. "RR7,Request status for RR[7] register" "0: RR[7] register is not enabled or are already..,1: RR[7] register is enabled and are not yet.." bitfld.long 0x4 6. "RR6,Request status for RR[6] register" "0: RR[6] register is not enabled or are already..,1: RR[6] register is enabled and are not yet.." newline bitfld.long 0x4 5. "RR5,Request status for RR[5] register" "0: RR[5] register is not enabled or are already..,1: RR[5] register is enabled and are not yet.." bitfld.long 0x4 4. "RR4,Request status for RR[4] register" "0: RR[4] register is not enabled or are already..,1: RR[4] register is enabled and are not yet.." newline bitfld.long 0x4 3. "RR3,Request status for RR[3] register" "0: RR[3] register is not enabled or are already..,1: RR[3] register is enabled and are not yet.." bitfld.long 0x4 2. "RR2,Request status for RR[2] register" "0: RR[2] register is not enabled or are already..,1: RR[2] register is enabled and are not yet.." newline bitfld.long 0x4 1. "RR1,Request status for RR[1] register" "0: RR[1] register is not enabled or are already..,1: RR[1] register is enabled and are not yet.." bitfld.long 0x4 0. "RR0,Request status for RR[0] register" "0: RR[0] register is not enabled or are already..,1: RR[0] register is enabled and are not yet.." group.long 0x504++0xB line.long 0x0 "CRV,Counter reload value" hexmask.long 0x0 0.--31. 1. "CRV,Counter reload value in number of cycles of the 32.768 kHz clock" line.long 0x4 "RREN,Enable register for reload request registers" bitfld.long 0x4 7. "RR7,Enable or disable RR[7] register" "0: Disable RR[7] register,1: Enable RR[7] register" bitfld.long 0x4 6. "RR6,Enable or disable RR[6] register" "0: Disable RR[6] register,1: Enable RR[6] register" newline bitfld.long 0x4 5. "RR5,Enable or disable RR[5] register" "0: Disable RR[5] register,1: Enable RR[5] register" bitfld.long 0x4 4. "RR4,Enable or disable RR[4] register" "0: Disable RR[4] register,1: Enable RR[4] register" newline bitfld.long 0x4 3. "RR3,Enable or disable RR[3] register" "0: Disable RR[3] register,1: Enable RR[3] register" bitfld.long 0x4 2. "RR2,Enable or disable RR[2] register" "0: Disable RR[2] register,1: Enable RR[2] register" newline bitfld.long 0x4 1. "RR1,Enable or disable RR[1] register" "0: Disable RR[1] register,1: Enable RR[1] register" bitfld.long 0x4 0. "RR0,Enable or disable RR[0] register" "0: Disable RR[0] register,1: Enable RR[0] register" line.long 0x8 "CONFIG,Configuration register" bitfld.long 0x8 6. "STOPEN,Allow stopping WDT" "0: Do not allow stopping WDT,1: Allow stopping WDT" bitfld.long 0x8 3. "HALT,Configure WDT to either be paused or kept running while the CPU is halted by the debugger" "0: Pause WDT while the CPU is halted by the debugger,1: Keep WDT running while the CPU is halted by the.." newline bitfld.long 0x8 0. "SLEEP,Configure WDT to either be paused or kept running while the CPU is sleeping" "0: Pause WDT while the CPU is sleeping,1: Keep WDT running while the CPU is sleeping" wgroup.long 0x520++0x3 line.long 0x0 "TSEN,Task stop enable" hexmask.long 0x0 0.--31. 1. "TSEN,Allow stopping WDT" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x600)++0x3 line.long 0x0 "RR[$1],Description collection: Reload request n" hexmask.long 0x0 0.--31. 1. "RR,Reload request register" repeat.end tree.end tree "GLOBAL_WDT31_NS" base ad:0x40109000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start WDT" bitfld.long 0x0 0. "TASKS_START,Start WDT" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop WDT" bitfld.long 0x4 0. "TASKS_STOP,Stop WDT" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0x7 line.long 0x0 "EVENTS_TIMEOUT,Watchdog timeout" bitfld.long 0x0 0. "EVENTS_TIMEOUT,Watchdog timeout" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,Watchdog stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,Watchdog stopped" "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_TIMEOUT,Publish configuration for event TIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TIMEOUT will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Disable" group.long 0x324++0x7 line.long 0x0 "NMIENSET,Enable interrupt" bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Enable" line.long 0x4 "NMIENCLR,Disable interrupt" bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x7 line.long 0x0 "RUNSTATUS,Run status" bitfld.long 0x0 0. "RUNSTATUSWDT,Indicates whether or not WDT is running" "0: Watchdog is not running,1: Watchdog is running" line.long 0x4 "REQSTATUS,Request status" bitfld.long 0x4 7. "RR7,Request status for RR[7] register" "0: RR[7] register is not enabled or are already..,1: RR[7] register is enabled and are not yet.." bitfld.long 0x4 6. "RR6,Request status for RR[6] register" "0: RR[6] register is not enabled or are already..,1: RR[6] register is enabled and are not yet.." newline bitfld.long 0x4 5. "RR5,Request status for RR[5] register" "0: RR[5] register is not enabled or are already..,1: RR[5] register is enabled and are not yet.." bitfld.long 0x4 4. "RR4,Request status for RR[4] register" "0: RR[4] register is not enabled or are already..,1: RR[4] register is enabled and are not yet.." newline bitfld.long 0x4 3. "RR3,Request status for RR[3] register" "0: RR[3] register is not enabled or are already..,1: RR[3] register is enabled and are not yet.." bitfld.long 0x4 2. "RR2,Request status for RR[2] register" "0: RR[2] register is not enabled or are already..,1: RR[2] register is enabled and are not yet.." newline bitfld.long 0x4 1. "RR1,Request status for RR[1] register" "0: RR[1] register is not enabled or are already..,1: RR[1] register is enabled and are not yet.." bitfld.long 0x4 0. "RR0,Request status for RR[0] register" "0: RR[0] register is not enabled or are already..,1: RR[0] register is enabled and are not yet.." group.long 0x504++0xB line.long 0x0 "CRV,Counter reload value" hexmask.long 0x0 0.--31. 1. "CRV,Counter reload value in number of cycles of the 32.768 kHz clock" line.long 0x4 "RREN,Enable register for reload request registers" bitfld.long 0x4 7. "RR7,Enable or disable RR[7] register" "0: Disable RR[7] register,1: Enable RR[7] register" bitfld.long 0x4 6. "RR6,Enable or disable RR[6] register" "0: Disable RR[6] register,1: Enable RR[6] register" newline bitfld.long 0x4 5. "RR5,Enable or disable RR[5] register" "0: Disable RR[5] register,1: Enable RR[5] register" bitfld.long 0x4 4. "RR4,Enable or disable RR[4] register" "0: Disable RR[4] register,1: Enable RR[4] register" newline bitfld.long 0x4 3. "RR3,Enable or disable RR[3] register" "0: Disable RR[3] register,1: Enable RR[3] register" bitfld.long 0x4 2. "RR2,Enable or disable RR[2] register" "0: Disable RR[2] register,1: Enable RR[2] register" newline bitfld.long 0x4 1. "RR1,Enable or disable RR[1] register" "0: Disable RR[1] register,1: Enable RR[1] register" bitfld.long 0x4 0. "RR0,Enable or disable RR[0] register" "0: Disable RR[0] register,1: Enable RR[0] register" line.long 0x8 "CONFIG,Configuration register" bitfld.long 0x8 6. "STOPEN,Allow stopping WDT" "0: Do not allow stopping WDT,1: Allow stopping WDT" bitfld.long 0x8 3. "HALT,Configure WDT to either be paused or kept running while the CPU is halted by the debugger" "0: Pause WDT while the CPU is halted by the debugger,1: Keep WDT running while the CPU is halted by the.." newline bitfld.long 0x8 0. "SLEEP,Configure WDT to either be paused or kept running while the CPU is sleeping" "0: Pause WDT while the CPU is sleeping,1: Keep WDT running while the CPU is sleeping" wgroup.long 0x520++0x3 line.long 0x0 "TSEN,Task stop enable" hexmask.long 0x0 0.--31. 1. "TSEN,Allow stopping WDT" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x600)++0x3 line.long 0x0 "RR[$1],Description collection: Reload request n" hexmask.long 0x0 0.--31. 1. "RR,Reload request register" repeat.end tree.end tree "GLOBAL_WDT31_S" base ad:0x50109000 wgroup.long 0x0++0x7 line.long 0x0 "TASKS_START,Start WDT" bitfld.long 0x0 0. "TASKS_START,Start WDT" "?,1: Trigger task" line.long 0x4 "TASKS_STOP,Stop WDT" bitfld.long 0x4 0. "TASKS_STOP,Stop WDT" "?,1: Trigger task" group.long 0x80++0x7 line.long 0x0 "SUBSCRIBE_START,Subscribe configuration for task START" bitfld.long 0x0 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that task START will subscribe to" line.long 0x4 "SUBSCRIBE_STOP,Subscribe configuration for task STOP" bitfld.long 0x4 31. "EN" "0: Disable subscription,1: Enable subscription" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that task STOP will subscribe to" group.long 0x100++0x7 line.long 0x0 "EVENTS_TIMEOUT,Watchdog timeout" bitfld.long 0x0 0. "EVENTS_TIMEOUT,Watchdog timeout" "0: Event not generated,1: Event generated" line.long 0x4 "EVENTS_STOPPED,Watchdog stopped" bitfld.long 0x4 0. "EVENTS_STOPPED,Watchdog stopped" "0: Event not generated,1: Event generated" group.long 0x180++0x7 line.long 0x0 "PUBLISH_TIMEOUT,Publish configuration for event TIMEOUT" bitfld.long 0x0 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x0 0.--7. 1. "CHIDX,DPPI channel that event TIMEOUT will publish to" line.long 0x4 "PUBLISH_STOPPED,Publish configuration for event STOPPED" bitfld.long 0x4 31. "EN" "0: Disable publishing,1: Enable publishing" hexmask.long.byte 0x4 0.--7. 1. "CHIDX,DPPI channel that event STOPPED will publish to" group.long 0x304++0x7 line.long 0x0 "INTENSET,Enable interrupt" bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Enable" line.long 0x4 "INTENCLR,Disable interrupt" bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Disable" group.long 0x324++0x7 line.long 0x0 "NMIENSET,Enable interrupt" bitfld.long 0x0 1. "STOPPED,Write '1' to enable interrupt for event STOPPED" "0: Read: Disabled,1: Enable" bitfld.long 0x0 0. "TIMEOUT,Write '1' to enable interrupt for event TIMEOUT" "0: Read: Disabled,1: Enable" line.long 0x4 "NMIENCLR,Disable interrupt" bitfld.long 0x4 1. "STOPPED,Write '1' to disable interrupt for event STOPPED" "0: Read: Disabled,1: Disable" bitfld.long 0x4 0. "TIMEOUT,Write '1' to disable interrupt for event TIMEOUT" "0: Read: Disabled,1: Disable" rgroup.long 0x400++0x7 line.long 0x0 "RUNSTATUS,Run status" bitfld.long 0x0 0. "RUNSTATUSWDT,Indicates whether or not WDT is running" "0: Watchdog is not running,1: Watchdog is running" line.long 0x4 "REQSTATUS,Request status" bitfld.long 0x4 7. "RR7,Request status for RR[7] register" "0: RR[7] register is not enabled or are already..,1: RR[7] register is enabled and are not yet.." bitfld.long 0x4 6. "RR6,Request status for RR[6] register" "0: RR[6] register is not enabled or are already..,1: RR[6] register is enabled and are not yet.." newline bitfld.long 0x4 5. "RR5,Request status for RR[5] register" "0: RR[5] register is not enabled or are already..,1: RR[5] register is enabled and are not yet.." bitfld.long 0x4 4. "RR4,Request status for RR[4] register" "0: RR[4] register is not enabled or are already..,1: RR[4] register is enabled and are not yet.." newline bitfld.long 0x4 3. "RR3,Request status for RR[3] register" "0: RR[3] register is not enabled or are already..,1: RR[3] register is enabled and are not yet.." bitfld.long 0x4 2. "RR2,Request status for RR[2] register" "0: RR[2] register is not enabled or are already..,1: RR[2] register is enabled and are not yet.." newline bitfld.long 0x4 1. "RR1,Request status for RR[1] register" "0: RR[1] register is not enabled or are already..,1: RR[1] register is enabled and are not yet.." bitfld.long 0x4 0. "RR0,Request status for RR[0] register" "0: RR[0] register is not enabled or are already..,1: RR[0] register is enabled and are not yet.." group.long 0x504++0xB line.long 0x0 "CRV,Counter reload value" hexmask.long 0x0 0.--31. 1. "CRV,Counter reload value in number of cycles of the 32.768 kHz clock" line.long 0x4 "RREN,Enable register for reload request registers" bitfld.long 0x4 7. "RR7,Enable or disable RR[7] register" "0: Disable RR[7] register,1: Enable RR[7] register" bitfld.long 0x4 6. "RR6,Enable or disable RR[6] register" "0: Disable RR[6] register,1: Enable RR[6] register" newline bitfld.long 0x4 5. "RR5,Enable or disable RR[5] register" "0: Disable RR[5] register,1: Enable RR[5] register" bitfld.long 0x4 4. "RR4,Enable or disable RR[4] register" "0: Disable RR[4] register,1: Enable RR[4] register" newline bitfld.long 0x4 3. "RR3,Enable or disable RR[3] register" "0: Disable RR[3] register,1: Enable RR[3] register" bitfld.long 0x4 2. "RR2,Enable or disable RR[2] register" "0: Disable RR[2] register,1: Enable RR[2] register" newline bitfld.long 0x4 1. "RR1,Enable or disable RR[1] register" "0: Disable RR[1] register,1: Enable RR[1] register" bitfld.long 0x4 0. "RR0,Enable or disable RR[0] register" "0: Disable RR[0] register,1: Enable RR[0] register" line.long 0x8 "CONFIG,Configuration register" bitfld.long 0x8 6. "STOPEN,Allow stopping WDT" "0: Do not allow stopping WDT,1: Allow stopping WDT" bitfld.long 0x8 3. "HALT,Configure WDT to either be paused or kept running while the CPU is halted by the debugger" "0: Pause WDT while the CPU is halted by the debugger,1: Keep WDT running while the CPU is halted by the.." newline bitfld.long 0x8 0. "SLEEP,Configure WDT to either be paused or kept running while the CPU is sleeping" "0: Pause WDT while the CPU is sleeping,1: Keep WDT running while the CPU is sleeping" wgroup.long 0x520++0x3 line.long 0x0 "TSEN,Task stop enable" hexmask.long 0x0 0.--31. 1. "TSEN,Allow stopping WDT" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x600)++0x3 line.long 0x0 "RR[$1],Description collection: Reload request n" hexmask.long 0x0 0.--31. 1. "RR,Reload request register" repeat.end tree.end tree.end newline AUTOINDENT.OFF